phase9: absorption batch 2 — 310 regions / 301 distinct bodies
Both worker-A-flagged high-value GTE rows closed by the coordinator: 0x80101C2C (nCLIP 0x480012 via lwc2/swc2/cfc2 asm, IR1-3 store + LZCR) and 0x80102FA4 (mfc2 IR1/IR2 halfword stores + IR3 swc2 + LZCR). Added gte_ldTRX/gte_ldTRY/gte_ldTRZ ($5-$7, translation block) to gtemac.h. Gate MATCH whole-binary SHA-1 e173426c157384ebf1b6caf8c6fea18a85a14af9. Bounded negatives recorded: 0x800F3BB4 (global-ra-save guard — CRT/library asm pattern not reachable from C), 0x800B34A4/0x800A6658 (alloc-tiebreak), 0x800C3514 (alloc+layout), 0x800518BC (return-merge), 0x800F7930 (record-builder alloc), 0x800690E4 (loop-rotation), 0x80012A98 (scheduler-bound family).
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@@ -77,7 +77,10 @@
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#define gte_ldRT3RT21(v) __asm__ volatile ("ctc2 %0,$1" : : "r"(v))
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#define gte_ldRT22RT23(v) __asm__ volatile ("ctc2 %0,$2" : : "r"(v))
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#define gte_ldRT31RT32(v) __asm__ volatile ("ctc2 %0,$3" : : "r"(v))
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#define gte_ldRT33(v) __asm__ volatile ("ctc2 %0,$4" : : "r"(v))
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#define gte_ldRT33(v) __asm__ volatile ("ctc2 %0,$4" : : "r"(v))
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#define gte_ldTRX(v) __asm__ volatile ("ctc2 %0,$5" : : "r"(v))
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#define gte_ldTRY(v) __asm__ volatile ("ctc2 %0,$6" : : "r"(v))
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#define gte_ldTRZ(v) __asm__ volatile ("ctc2 %0,$7" : : "r"(v))
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/* Rotation/light source and colour-matrix control words.
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* The executable's control-register numbering is the standard map shifted
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