mirror of
https://github.com/sal063/AC6_recomp
synced 2026-05-24 15:21:14 -04:00
salh
301 lines
9.0 KiB
C++
301 lines
9.0 KiB
C++
// Native runtime - Unified exception handling, thread context, and register defs
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// Part of the AC6 Recompilation native foundation
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//
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// Contains VIXL-derived ARM64 load/store decoding constants
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// (see VIXL license below).
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#pragma once
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#include <cstdint>
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#include <functional>
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#include <string>
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#include <vector>
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#include <native/assert.h>
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#include <native/platform.h>
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#include <native/vec128.h>
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#if REX_ARCH_AMD64
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#include <xmmintrin.h>
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#endif
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namespace rex::arch {
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//=============================================================================
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// ARM64 Register Definitions
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//=============================================================================
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enum class Arm64Register {
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kX0, kX1, kX2, kX3, kX4, kX5, kX6, kX7,
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kX8, kX9, kX10, kX11, kX12, kX13, kX14, kX15,
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kX16, kX17, kX18, kX19, kX20, kX21, kX22, kX23,
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kX24, kX25, kX26, kX27, kX28,
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kX29, // FP (frame pointer)
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kX30, // LR (link register)
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kSp, kPc, kPstate, kFpsr, kFpcr,
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kV0, kV1, kV2, kV3, kV4, kV5, kV6, kV7,
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kV8, kV9, kV10, kV11, kV12, kV13, kV14, kV15,
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kV16, kV17, kV18, kV19, kV20, kV21, kV22, kV23,
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kV24, kV25, kV26, kV27, kV28, kV29, kV30, kV31,
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};
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struct Arm64ThreadContextMembers {
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uint64_t x[31];
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uint64_t sp;
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uint64_t pc;
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uint64_t pstate;
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uint32_t fpsr;
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uint32_t fpcr;
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vec128_t v[32];
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};
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//=============================================================================
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// AMD64 Register Definitions
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//=============================================================================
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#if REX_ARCH_AMD64
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enum class X64Register {
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kRip, kEflags,
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kIntRegisterFirst,
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kRax = kIntRegisterFirst, kRcx, kRdx, kRbx, kRsp, kRbp, kRsi, kRdi,
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kR8, kR9, kR10, kR11, kR12, kR13, kR14, kR15,
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kIntRegisterLast = kR15,
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kXmm0, kXmm1, kXmm2, kXmm3, kXmm4, kXmm5, kXmm6, kXmm7,
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kXmm8, kXmm9, kXmm10, kXmm11, kXmm12, kXmm13, kXmm14, kXmm15,
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};
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struct X64ThreadContextMembers {
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uint64_t rip;
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uint32_t eflags;
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union {
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struct {
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uint64_t rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi;
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uint64_t r8, r9, r10, r11, r12, r13, r14, r15;
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};
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uint64_t int_registers[16];
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};
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union {
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struct {
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vec128_t xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7;
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vec128_t xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15;
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};
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vec128_t xmm_registers[16];
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};
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};
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#endif // REX_ARCH_AMD64
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//=============================================================================
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// Host Register Typedef
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//=============================================================================
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#if REX_ARCH_AMD64
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using HostRegister = X64Register;
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#elif REX_ARCH_ARM64
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using HostRegister = Arm64Register;
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#else
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enum class HostRegister {};
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#endif
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//=============================================================================
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// Host Thread Context
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//=============================================================================
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class HostThreadContext {
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public:
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#if REX_ARCH_AMD64
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uint64_t rip;
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uint32_t eflags;
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union {
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struct {
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uint64_t rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi;
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uint64_t r8, r9, r10, r11, r12, r13, r14, r15;
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};
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uint64_t int_registers[16];
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};
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union {
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struct {
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vec128_t xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7;
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vec128_t xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15;
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};
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vec128_t xmm_registers[16];
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};
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#elif REX_ARCH_ARM64
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uint64_t x[31];
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uint64_t sp;
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uint64_t pc;
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uint64_t pstate;
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uint32_t fpsr;
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uint32_t fpcr;
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vec128_t v[32];
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#endif
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static const char* GetRegisterName(HostRegister reg);
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std::string GetStringFromValue(HostRegister reg, bool hex) const;
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};
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//=============================================================================
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// ARM64 Load/Store Decoding (VIXL-derived)
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//=============================================================================
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// Copyright 2015, VIXL authors - All rights reserved.
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted under the VIXL BSD-style license.
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constexpr uint32_t kArm64LoadLiteralFMask = UINT32_C(0x3B000000);
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constexpr uint32_t kArm64LoadLiteralFixed = UINT32_C(0x18000000);
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constexpr uint32_t kArm64LoadStoreAnyFMask = UINT32_C(0x0A000000);
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constexpr uint32_t kArm64LoadStoreAnyFixed = UINT32_C(0x08000000);
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constexpr uint32_t kArm64LoadStorePairAnyFMask = UINT32_C(0x3A000000);
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constexpr uint32_t kArm64LoadStorePairAnyFixed = UINT32_C(0x28000000);
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constexpr uint32_t kArm64LoadStorePairLoadBit = UINT32_C(1) << 22;
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constexpr uint32_t kArm64LoadStoreMask = UINT32_C(0xC4C00000);
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enum class Arm64LoadStoreOp : uint32_t {
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kSTRB_w = UINT32_C(0x00000000), kSTRH_w = UINT32_C(0x40000000),
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kSTR_w = UINT32_C(0x80000000), kSTR_x = UINT32_C(0xC0000000),
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kLDRB_w = UINT32_C(0x00400000), kLDRH_w = UINT32_C(0x40400000),
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kLDR_w = UINT32_C(0x80400000), kLDR_x = UINT32_C(0xC0400000),
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kLDRSB_x = UINT32_C(0x00800000), kLDRSH_x = UINT32_C(0x40800000),
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kLDRSW_x = UINT32_C(0x80800000),
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kLDRSB_w = UINT32_C(0x00C00000), kLDRSH_w = UINT32_C(0x40C00000),
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kSTR_b = UINT32_C(0x04000000), kSTR_h = UINT32_C(0x44000000),
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kSTR_s = UINT32_C(0x84000000), kSTR_d = UINT32_C(0xC4000000),
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kSTR_q = UINT32_C(0x04800000),
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kLDR_b = UINT32_C(0x04400000), kLDR_h = UINT32_C(0x44400000),
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kLDR_s = UINT32_C(0x84400000), kLDR_d = UINT32_C(0xC4400000),
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kLDR_q = UINT32_C(0x04C00000),
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kPRFM = UINT32_C(0xC0800000),
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};
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constexpr uint32_t kArm64LoadStoreOffsetFMask = UINT32_C(0x3B200C00);
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enum class Arm64LoadStoreOffsetFixed : uint32_t {
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kUnscaledOffset = UINT32_C(0x38000000),
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kPostIndex = UINT32_C(0x38000400),
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kPreIndex = UINT32_C(0x38000C00),
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kRegisterOffset = UINT32_C(0x38200800),
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};
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constexpr uint32_t kArm64LoadStoreUnsignedOffsetFMask = UINT32_C(0x3B000000);
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constexpr uint32_t kArm64LoadStoreUnsignedOffsetFixed = UINT32_C(0x39000000);
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bool IsArm64LoadPrefetchStore(uint32_t instruction, bool& is_store_out);
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//=============================================================================
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// Exception Class
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//=============================================================================
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class Exception {
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public:
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enum class Code {
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kInvalidException = 0,
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kAccessViolation,
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kIllegalInstruction,
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};
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enum class AccessViolationOperation {
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kUnknown,
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kRead,
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kWrite,
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};
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void InitializeAccessViolation(HostThreadContext* thread_context, uint64_t fault_address,
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AccessViolationOperation operation) {
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code_ = Code::kAccessViolation;
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thread_context_ = thread_context;
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fault_address_ = fault_address;
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access_violation_operation_ = operation;
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}
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void InitializeIllegalInstruction(HostThreadContext* thread_context) {
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code_ = Code::kIllegalInstruction;
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thread_context_ = thread_context;
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}
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Code code() const { return code_; }
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HostThreadContext* thread_context() const { return thread_context_; }
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uint64_t pc() const {
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#if REX_ARCH_AMD64
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return thread_context_->rip;
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#elif REX_ARCH_ARM64
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return thread_context_->pc;
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#else
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assert_always();
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return 0;
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#endif
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}
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void set_resume_pc(uint64_t pc) {
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#if REX_ARCH_AMD64
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thread_context_->rip = pc;
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#elif REX_ARCH_ARM64
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thread_context_->pc = pc;
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#else
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assert_always();
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#endif
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}
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#if REX_ARCH_AMD64
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uint64_t& ModifyIntRegister(uint32_t index) {
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assert_true(index <= 15);
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modified_int_registers_ |= UINT16_C(1) << index;
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return thread_context_->int_registers[index];
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}
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uint16_t modified_int_registers() const { return modified_int_registers_; }
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vec128_t& ModifyXmmRegister(uint32_t index) {
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assert_true(index <= 15);
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modified_xmm_registers_ |= UINT16_C(1) << index;
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return thread_context_->xmm_registers[index];
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}
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uint16_t modified_xmm_registers() const { return modified_xmm_registers_; }
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#elif REX_ARCH_ARM64
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uint64_t& ModifyXRegister(uint32_t index) {
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assert_true(index <= 30);
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modified_x_registers_ |= UINT32_C(1) << index;
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return thread_context_->x[index];
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}
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uint32_t modified_x_registers() const { return modified_x_registers_; }
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vec128_t& ModifyVRegister(uint32_t index) {
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assert_true(index <= 31);
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modified_v_registers_ |= UINT32_C(1) << index;
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return thread_context_->v[index];
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}
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uint32_t modified_v_registers() const { return modified_v_registers_; }
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#endif
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uint64_t fault_address() const { return fault_address_; }
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AccessViolationOperation access_violation_operation() const {
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return access_violation_operation_;
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}
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private:
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Code code_ = Code::kInvalidException;
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HostThreadContext* thread_context_ = nullptr;
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#if REX_ARCH_AMD64
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uint16_t modified_int_registers_ = 0;
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uint16_t modified_xmm_registers_ = 0;
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#elif REX_ARCH_ARM64
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uint32_t modified_x_registers_ = 0;
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uint32_t modified_v_registers_ = 0;
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#endif
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uint64_t fault_address_ = 0;
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AccessViolationOperation access_violation_operation_ = AccessViolationOperation::kUnknown;
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};
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//=============================================================================
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// Exception Handler
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//=============================================================================
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class ExceptionHandler {
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public:
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typedef bool (*Handler)(Exception* ex, void* data);
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static void Install(Handler fn, void* data);
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static void Uninstall(Handler fn, void* data);
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};
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} // namespace rex::arch
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