diff --git a/config/overlays.mk b/config/overlays.mk index d3a5d40eb4..b1443a4f45 100644 --- a/config/overlays.mk +++ b/config/overlays.mk @@ -21,7 +21,7 @@ ov_SC01_077_ELF := $(ov_SC01_077_OUT).elf ov_SC01_077_MAPFILE := $(ov_SC01_077_OUT).map ov_SC01_077_LD_SCRIPT := $(ov_SC01_077_OUT).ld ov_SC01_077_SPLAT_YAML := config/splat.ov_SC01_077.yaml -ov_SC01_077_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_077_jr_8012ACE0.o,tail2.data.o,ov_SC01_077_jr_80135888.o,tail3.data.o,ov_SC01_077_jr_80135A4C.o,tail4.data.o,ov_SC01_077_jr_80135D20.o,tail5.data.o,ov_SC01_077_jr_801380E0.o,tail6.data.o,ov_SC01_077_o0.o,tail7.data.o,ov_SC01_077.o,tail8.data.o,ov_SC01_077_jr_8015444C.o,tail9.data.o,ov_SC01_077_jr_80154C24.o,ov_SC01_077_jr_801588CC.o,tail10.data.o,ov_SC01_077_jr_80159C84.o,tail11.data.o,ov_SC01_077_jr_8015A3C8.o,tail12.data.o,ov_SC01_077_jr_8015AE2C.o,tail13.data.o,ov_SC01_077_jr_8015C32C.o,tail14.data.o,ov_SC01_077_jr_8016AB6C.o,tail15.data.o,ov_SC01_077_jr_801734BC.o,tail16.data.o,ov_SC01_077_jr_80178D40.o,tail17.data.o,ov_SC01_077_jr_8017A4AC.o,tail18.data.o,ov_SC01_077_jr_8017AE2C.o,tail19.data.o,ov_SC01_077_jr_80182268.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC01_077_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_077_a.o,tail2.data.o,ov_SC01_077_jr_8012ACE0.o,tail3.data.o,ov_SC01_077_jr_80135888.o,tail4.data.o,ov_SC01_077_jr_80135A4C.o,tail5.data.o,ov_SC01_077_jr_80135D20.o,tail6.data.o,ov_SC01_077_jr_801380E0.o,tail7.data.o,ov_SC01_077_o0.o,tail8.data.o,ov_SC01_077.o,tail9.data.o,ov_SC01_077_jr_8015444C.o,tail10.data.o,ov_SC01_077_jr_80154C24.o,ov_SC01_077_jr_801588CC.o,tail11.data.o,ov_SC01_077_jr_80159C84.o,tail12.data.o,ov_SC01_077_jr_8015A3C8.o,tail13.data.o,ov_SC01_077_jr_8015AE2C.o,tail14.data.o,ov_SC01_077_jr_8015C32C.o,tail15.data.o,ov_SC01_077_jr_8016AB6C.o,tail16.data.o,ov_SC01_077_jr_801734BC.o,tail17.data.o,ov_SC01_077_jr_80178D40.o,tail18.data.o,ov_SC01_077_jr_8017A4AC.o,tail19.data.o,ov_SC01_077_jr_8017AE2C.o,tail20.data.o,ov_SC01_077_jr_80182268.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC01_077/ov_SC01_077.o: JTBL_PADS := 0,0,4,0,4,0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20,+0x38,+0x58,+0x70,+0x90,+0xa8 build/src/ov_SC01_077/ov_SC01_077_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc build/src/ov_SC01_077/ov_SC01_077_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -48,7 +48,7 @@ ov_SC01_005_ELF := $(ov_SC01_005_OUT).elf ov_SC01_005_MAPFILE := $(ov_SC01_005_OUT).map ov_SC01_005_LD_SCRIPT := $(ov_SC01_005_OUT).ld ov_SC01_005_SPLAT_YAML := config/splat.ov_SC01_005.yaml -ov_SC01_005_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_005_jr_8012ACE0.o,tail2.data.o,ov_SC01_005_jr_80135888.o,tail3.data.o,ov_SC01_005_jr_80135A4C.o,tail4.data.o,ov_SC01_005_jr_80135D20.o,tail5.data.o,ov_SC01_005_jr_801380E0.o,tail6.data.o,ov_SC01_005_jr_8013F350.o,tail7.data.o,ov_SC01_005_jr_8013FFD8.o,tail8.data.o,ov_SC01_005_jr_80140608.o,tail9.data.o,ov_SC01_005_jr_8015444C.o,tail10.data.o,ov_SC01_005_jr_80154C24.o,ov_SC01_005_jr_801588CC.o,tail11.data.o,ov_SC01_005_jr_80159C84.o,tail12.data.o,ov_SC01_005_jr_8015A3C8.o,tail13.data.o,ov_SC01_005_jr_8015AE2C.o,tail14.data.o,ov_SC01_005_jr_8015C32C.o,tail15.data.o,ov_SC01_005_jr_8016AB6C.o,tail16.data.o,ov_SC01_005_jr_801734BC.o,tail17.data.o,ov_SC01_005_jr_80178D40.o,tail18.data.o,ov_SC01_005_jr_8017A4AC.o,tail19.data.o,ov_SC01_005_jr_8017AE2C.o,ov_SC01_005_jr_8017C340.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC01_005_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_005.o,tail2.data.o,ov_SC01_005_jr_8012ACE0.o,tail3.data.o,ov_SC01_005_jr_80135888.o,tail4.data.o,ov_SC01_005_jr_80135A4C.o,tail5.data.o,ov_SC01_005_jr_80135D20.o,tail6.data.o,ov_SC01_005_jr_801380E0.o,tail7.data.o,ov_SC01_005_jr_8013F350.o,tail8.data.o,ov_SC01_005_jr_8013FFD8.o,tail9.data.o,ov_SC01_005_jr_80140608.o,tail10.data.o,ov_SC01_005_jr_8015444C.o,tail11.data.o,ov_SC01_005_jr_80154C24.o,ov_SC01_005_jr_801588CC.o,tail12.data.o,ov_SC01_005_jr_80159C84.o,tail13.data.o,ov_SC01_005_jr_8015A3C8.o,tail14.data.o,ov_SC01_005_jr_8015AE2C.o,tail15.data.o,ov_SC01_005_jr_8015C32C.o,tail16.data.o,ov_SC01_005_jr_8016AB6C.o,tail17.data.o,ov_SC01_005_jr_801734BC.o,tail18.data.o,ov_SC01_005_jr_80178D40.o,tail19.data.o,ov_SC01_005_jr_8017A4AC.o,tail20.data.o,ov_SC01_005_jr_8017AE2C.o,ov_SC01_005_jr_8017C340.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC01_005/ov_SC01_005_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC01_005/ov_SC01_005_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC01_005/ov_SC01_005_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -75,7 +75,7 @@ ov_SC01_006_ELF := $(ov_SC01_006_OUT).elf ov_SC01_006_MAPFILE := $(ov_SC01_006_OUT).map ov_SC01_006_LD_SCRIPT := $(ov_SC01_006_OUT).ld ov_SC01_006_SPLAT_YAML := config/splat.ov_SC01_006.yaml -ov_SC01_006_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_006_jr_8012ACE0.o,tail2.data.o,ov_SC01_006_jr_80135888.o,tail3.data.o,ov_SC01_006_jr_80135A4C.o,tail4.data.o,ov_SC01_006_jr_80135D20.o,tail5.data.o,ov_SC01_006_jr_801380E0.o,tail6.data.o,ov_SC01_006_jr_8013F350.o,tail7.data.o,ov_SC01_006_jr_8013FFD8.o,tail8.data.o,ov_SC01_006_jr_80140608.o,tail9.data.o,ov_SC01_006_jr_8015444C.o,tail10.data.o,ov_SC01_006_jr_80154C24.o,ov_SC01_006_jr_801588CC.o,tail11.data.o,ov_SC01_006_jr_80159C84.o,tail12.data.o,ov_SC01_006_jr_8015A3C8.o,tail13.data.o,ov_SC01_006_jr_8015AE2C.o,tail14.data.o,ov_SC01_006_jr_8015C32C.o,tail15.data.o,ov_SC01_006_jr_8016AB6C.o,tail16.data.o,ov_SC01_006_jr_801734BC.o,tail17.data.o,ov_SC01_006_jr_80178D40.o,tail18.data.o,ov_SC01_006_jr_8017A4AC.o,tail19.data.o,ov_SC01_006_jr_8017AE2C.o,ov_SC01_006_jr_8017C340.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC01_006_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_006.o,tail2.data.o,ov_SC01_006_jr_8012ACE0.o,tail3.data.o,ov_SC01_006_jr_80135888.o,tail4.data.o,ov_SC01_006_jr_80135A4C.o,tail5.data.o,ov_SC01_006_jr_80135D20.o,tail6.data.o,ov_SC01_006_jr_801380E0.o,tail7.data.o,ov_SC01_006_jr_8013F350.o,tail8.data.o,ov_SC01_006_jr_8013FFD8.o,tail9.data.o,ov_SC01_006_jr_80140608.o,tail10.data.o,ov_SC01_006_jr_8015444C.o,tail11.data.o,ov_SC01_006_jr_80154C24.o,ov_SC01_006_jr_801588CC.o,tail12.data.o,ov_SC01_006_jr_80159C84.o,tail13.data.o,ov_SC01_006_jr_8015A3C8.o,tail14.data.o,ov_SC01_006_jr_8015AE2C.o,tail15.data.o,ov_SC01_006_jr_8015C32C.o,tail16.data.o,ov_SC01_006_jr_8016AB6C.o,tail17.data.o,ov_SC01_006_jr_801734BC.o,tail18.data.o,ov_SC01_006_jr_80178D40.o,tail19.data.o,ov_SC01_006_jr_8017A4AC.o,tail20.data.o,ov_SC01_006_jr_8017AE2C.o,ov_SC01_006_jr_8017C340.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC01_006/ov_SC01_006_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC01_006/ov_SC01_006_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC01_006/ov_SC01_006_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -102,7 +102,7 @@ ov_SC03_001_ELF := $(ov_SC03_001_OUT).elf ov_SC03_001_MAPFILE := $(ov_SC03_001_OUT).map ov_SC03_001_LD_SCRIPT := $(ov_SC03_001_OUT).ld ov_SC03_001_SPLAT_YAML := config/splat.ov_SC03_001.yaml -ov_SC03_001_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_001_jr_8012ACE0.o,tail2.data.o,ov_SC03_001_jr_80135888.o,tail3.data.o,ov_SC03_001_jr_80135A4C.o,tail4.data.o,ov_SC03_001_jr_80135D20.o,tail5.data.o,ov_SC03_001_jr_801380E0.o,tail6.data.o,ov_SC03_001_jr_8013F350.o,tail7.data.o,ov_SC03_001_jr_8013FFD8.o,tail8.data.o,ov_SC03_001_jr_80140608.o,tail9.data.o,ov_SC03_001_jr_8015444C.o,tail10.data.o,ov_SC03_001_jr_80154C24.o,ov_SC03_001_jr_801588CC.o,tail11.data.o,ov_SC03_001_jr_80159C84.o,tail12.data.o,ov_SC03_001_jr_8015A3C8.o,tail13.data.o,ov_SC03_001_jr_8015AE2C.o,tail14.data.o,ov_SC03_001_jr_8015C32C.o,tail15.data.o,ov_SC03_001_jr_8016AB6C.o,tail16.data.o,ov_SC03_001_jr_801734BC.o,tail17.data.o,ov_SC03_001_jr_80178D40.o,tail18.data.o,ov_SC03_001_jr_8017A4AC.o,tail19.data.o,ov_SC03_001_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_001_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_001.o,tail2.data.o,ov_SC03_001_jr_8012ACE0.o,tail3.data.o,ov_SC03_001_jr_80135888.o,tail4.data.o,ov_SC03_001_jr_80135A4C.o,tail5.data.o,ov_SC03_001_jr_80135D20.o,tail6.data.o,ov_SC03_001_jr_801380E0.o,tail7.data.o,ov_SC03_001_jr_8013F350.o,tail8.data.o,ov_SC03_001_jr_8013FFD8.o,tail9.data.o,ov_SC03_001_jr_80140608.o,tail10.data.o,ov_SC03_001_jr_8015444C.o,tail11.data.o,ov_SC03_001_jr_80154C24.o,ov_SC03_001_jr_801588CC.o,tail12.data.o,ov_SC03_001_jr_80159C84.o,tail13.data.o,ov_SC03_001_jr_8015A3C8.o,tail14.data.o,ov_SC03_001_jr_8015AE2C.o,tail15.data.o,ov_SC03_001_jr_8015C32C.o,tail16.data.o,ov_SC03_001_jr_8016AB6C.o,tail17.data.o,ov_SC03_001_jr_801734BC.o,tail18.data.o,ov_SC03_001_jr_80178D40.o,tail19.data.o,ov_SC03_001_jr_8017A4AC.o,tail20.data.o,ov_SC03_001_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_001/ov_SC03_001_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_001/ov_SC03_001_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_001/ov_SC03_001_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -183,7 +183,7 @@ ov_SC02_000_ELF := $(ov_SC02_000_OUT).elf ov_SC02_000_MAPFILE := $(ov_SC02_000_OUT).map ov_SC02_000_LD_SCRIPT := $(ov_SC02_000_OUT).ld ov_SC02_000_SPLAT_YAML := config/splat.ov_SC02_000.yaml -ov_SC02_000_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_000_jr_8012ACE0.o,tail2.data.o,ov_SC02_000_jr_80135888.o,tail3.data.o,ov_SC02_000_jr_80135A4C.o,tail4.data.o,ov_SC02_000_jr_80135D20.o,tail5.data.o,ov_SC02_000_jr_801380E0.o,tail6.data.o,ov_SC02_000_jr_8013F350.o,tail7.data.o,ov_SC02_000_jr_8013FFD8.o,tail8.data.o,ov_SC02_000_jr_80140608.o,tail9.data.o,ov_SC02_000_jr_8015444C.o,tail10.data.o,ov_SC02_000_jr_80154C24.o,ov_SC02_000_jr_801588CC.o,tail11.data.o,ov_SC02_000_jr_80159C84.o,tail12.data.o,ov_SC02_000_jr_8015A3C8.o,tail13.data.o,ov_SC02_000_jr_8015AE2C.o,tail14.data.o,ov_SC02_000_jr_8015C32C.o,tail15.data.o,ov_SC02_000_jr_8016AB6C.o,tail16.data.o,ov_SC02_000_jr_801734BC.o,tail17.data.o,ov_SC02_000_jr_80178D40.o,tail18.data.o,ov_SC02_000_jr_8017A4AC.o,tail19.data.o,ov_SC02_000_jr_8017AE2C.o,tail20.data.o,ov_SC02_000_jr_8017FCB0.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC02_000_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_000.o,tail2.data.o,ov_SC02_000_jr_8012ACE0.o,tail3.data.o,ov_SC02_000_jr_80135888.o,tail4.data.o,ov_SC02_000_jr_80135A4C.o,tail5.data.o,ov_SC02_000_jr_80135D20.o,tail6.data.o,ov_SC02_000_jr_801380E0.o,tail7.data.o,ov_SC02_000_jr_8013F350.o,tail8.data.o,ov_SC02_000_jr_8013FFD8.o,tail9.data.o,ov_SC02_000_jr_80140608.o,tail10.data.o,ov_SC02_000_jr_8015444C.o,tail11.data.o,ov_SC02_000_jr_80154C24.o,ov_SC02_000_jr_801588CC.o,tail12.data.o,ov_SC02_000_jr_80159C84.o,tail13.data.o,ov_SC02_000_jr_8015A3C8.o,tail14.data.o,ov_SC02_000_jr_8015AE2C.o,tail15.data.o,ov_SC02_000_jr_8015C32C.o,tail16.data.o,ov_SC02_000_jr_8016AB6C.o,tail17.data.o,ov_SC02_000_jr_801734BC.o,tail18.data.o,ov_SC02_000_jr_80178D40.o,tail19.data.o,ov_SC02_000_jr_8017A4AC.o,tail20.data.o,ov_SC02_000_jr_8017AE2C.o,tail21.data.o,ov_SC02_000_jr_8017FCB0.o,tail22.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC02_000/ov_SC02_000_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC02_000/ov_SC02_000_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_000/ov_SC02_000_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -210,7 +210,7 @@ ov_SC02_003_ELF := $(ov_SC02_003_OUT).elf ov_SC02_003_MAPFILE := $(ov_SC02_003_OUT).map ov_SC02_003_LD_SCRIPT := $(ov_SC02_003_OUT).ld ov_SC02_003_SPLAT_YAML := config/splat.ov_SC02_003.yaml -ov_SC02_003_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_003_jr_8012ACE0.o,tail2.data.o,ov_SC02_003_jr_80135888.o,tail3.data.o,ov_SC02_003_jr_80135A4C.o,tail4.data.o,ov_SC02_003_jr_80135D20.o,tail5.data.o,ov_SC02_003_jr_801380E0.o,tail6.data.o,ov_SC02_003_jr_8013F350.o,tail7.data.o,ov_SC02_003_jr_8013FFD8.o,tail8.data.o,ov_SC02_003_jr_80140608.o,tail9.data.o,ov_SC02_003_jr_8015444C.o,tail10.data.o,ov_SC02_003_jr_80154C24.o,ov_SC02_003_jr_801588CC.o,tail11.data.o,ov_SC02_003_jr_80159C84.o,tail12.data.o,ov_SC02_003_jr_8015A3C8.o,tail13.data.o,ov_SC02_003_jr_8015AE2C.o,tail14.data.o,ov_SC02_003_jr_8015C32C.o,tail15.data.o,ov_SC02_003_jr_8016AB6C.o,tail16.data.o,ov_SC02_003_jr_801734BC.o,tail17.data.o,ov_SC02_003_jr_80178D40.o,tail18.data.o,ov_SC02_003_jr_8017A4AC.o,tail19.data.o,ov_SC02_003_jr_8017AE2C.o,tail20.data.o,ov_SC02_003_jr_8017FCB0.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC02_003_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_003.o,tail2.data.o,ov_SC02_003_jr_8012ACE0.o,tail3.data.o,ov_SC02_003_jr_80135888.o,tail4.data.o,ov_SC02_003_jr_80135A4C.o,tail5.data.o,ov_SC02_003_jr_80135D20.o,tail6.data.o,ov_SC02_003_jr_801380E0.o,tail7.data.o,ov_SC02_003_jr_8013F350.o,tail8.data.o,ov_SC02_003_jr_8013FFD8.o,tail9.data.o,ov_SC02_003_jr_80140608.o,tail10.data.o,ov_SC02_003_jr_8015444C.o,tail11.data.o,ov_SC02_003_jr_80154C24.o,ov_SC02_003_jr_801588CC.o,tail12.data.o,ov_SC02_003_jr_80159C84.o,tail13.data.o,ov_SC02_003_jr_8015A3C8.o,tail14.data.o,ov_SC02_003_jr_8015AE2C.o,tail15.data.o,ov_SC02_003_jr_8015C32C.o,tail16.data.o,ov_SC02_003_jr_8016AB6C.o,tail17.data.o,ov_SC02_003_jr_801734BC.o,tail18.data.o,ov_SC02_003_jr_80178D40.o,tail19.data.o,ov_SC02_003_jr_8017A4AC.o,tail20.data.o,ov_SC02_003_jr_8017AE2C.o,tail21.data.o,ov_SC02_003_jr_8017FCB0.o,tail22.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC02_003/ov_SC02_003_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC02_003/ov_SC02_003_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_003/ov_SC02_003_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -237,7 +237,7 @@ ov_SC03_002_ELF := $(ov_SC03_002_OUT).elf ov_SC03_002_MAPFILE := $(ov_SC03_002_OUT).map ov_SC03_002_LD_SCRIPT := $(ov_SC03_002_OUT).ld ov_SC03_002_SPLAT_YAML := config/splat.ov_SC03_002.yaml -ov_SC03_002_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_002_jr_8012ACE0.o,tail2.data.o,ov_SC03_002_jr_80135888.o,tail3.data.o,ov_SC03_002_jr_80135A4C.o,tail4.data.o,ov_SC03_002_jr_80135D20.o,tail5.data.o,ov_SC03_002_jr_801380E0.o,tail6.data.o,ov_SC03_002_jr_8013F350.o,tail7.data.o,ov_SC03_002_jr_8013FFD8.o,tail8.data.o,ov_SC03_002_jr_80140608.o,tail9.data.o,ov_SC03_002_jr_8015444C.o,tail10.data.o,ov_SC03_002_jr_80154C24.o,ov_SC03_002_jr_801588CC.o,tail11.data.o,ov_SC03_002_jr_80159C84.o,tail12.data.o,ov_SC03_002_jr_8015A3C8.o,tail13.data.o,ov_SC03_002_jr_8015AE2C.o,tail14.data.o,ov_SC03_002_jr_8015C32C.o,tail15.data.o,ov_SC03_002_jr_8016AB6C.o,tail16.data.o,ov_SC03_002_jr_801734BC.o,tail17.data.o,ov_SC03_002_jr_80178D40.o,tail18.data.o,ov_SC03_002_jr_8017A4AC.o,tail19.data.o,ov_SC03_002_jr_8017AE2C.o,ov_SC03_002_jr_8017D604.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_002_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_002.o,tail2.data.o,ov_SC03_002_jr_8012ACE0.o,tail3.data.o,ov_SC03_002_jr_80135888.o,tail4.data.o,ov_SC03_002_jr_80135A4C.o,tail5.data.o,ov_SC03_002_jr_80135D20.o,tail6.data.o,ov_SC03_002_jr_801380E0.o,tail7.data.o,ov_SC03_002_jr_8013F350.o,tail8.data.o,ov_SC03_002_jr_8013FFD8.o,tail9.data.o,ov_SC03_002_jr_80140608.o,tail10.data.o,ov_SC03_002_jr_8015444C.o,tail11.data.o,ov_SC03_002_jr_80154C24.o,ov_SC03_002_jr_801588CC.o,tail12.data.o,ov_SC03_002_jr_80159C84.o,tail13.data.o,ov_SC03_002_jr_8015A3C8.o,tail14.data.o,ov_SC03_002_jr_8015AE2C.o,tail15.data.o,ov_SC03_002_jr_8015C32C.o,tail16.data.o,ov_SC03_002_jr_8016AB6C.o,tail17.data.o,ov_SC03_002_jr_801734BC.o,tail18.data.o,ov_SC03_002_jr_80178D40.o,tail19.data.o,ov_SC03_002_jr_8017A4AC.o,tail20.data.o,ov_SC03_002_jr_8017AE2C.o,ov_SC03_002_jr_8017D604.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_002/ov_SC03_002_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_002/ov_SC03_002_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_002/ov_SC03_002_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -264,7 +264,7 @@ ov_SC03_006_ELF := $(ov_SC03_006_OUT).elf ov_SC03_006_MAPFILE := $(ov_SC03_006_OUT).map ov_SC03_006_LD_SCRIPT := $(ov_SC03_006_OUT).ld ov_SC03_006_SPLAT_YAML := config/splat.ov_SC03_006.yaml -ov_SC03_006_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_006_jr_8012ACE0.o,tail2.data.o,ov_SC03_006_jr_80135888.o,tail3.data.o,ov_SC03_006_jr_80135A4C.o,tail4.data.o,ov_SC03_006_jr_80135D20.o,tail5.data.o,ov_SC03_006_jr_801380E0.o,tail6.data.o,ov_SC03_006_jr_8013F350.o,tail7.data.o,ov_SC03_006_jr_8013FFD8.o,tail8.data.o,ov_SC03_006_jr_80140608.o,tail9.data.o,ov_SC03_006_jr_8015444C.o,tail10.data.o,ov_SC03_006_jr_80154C24.o,ov_SC03_006_jr_801588CC.o,tail11.data.o,ov_SC03_006_jr_80159C84.o,tail12.data.o,ov_SC03_006_jr_8015A3C8.o,tail13.data.o,ov_SC03_006_jr_8015AE2C.o,tail14.data.o,ov_SC03_006_jr_8015C32C.o,tail15.data.o,ov_SC03_006_jr_8016AB6C.o,tail16.data.o,ov_SC03_006_jr_801734BC.o,tail17.data.o,ov_SC03_006_jr_80178D40.o,tail18.data.o,ov_SC03_006_jr_8017A4AC.o,tail19.data.o,ov_SC03_006_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_006_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_006.o,tail2.data.o,ov_SC03_006_jr_8012ACE0.o,tail3.data.o,ov_SC03_006_jr_80135888.o,tail4.data.o,ov_SC03_006_jr_80135A4C.o,tail5.data.o,ov_SC03_006_jr_80135D20.o,tail6.data.o,ov_SC03_006_jr_801380E0.o,tail7.data.o,ov_SC03_006_jr_8013F350.o,tail8.data.o,ov_SC03_006_jr_8013FFD8.o,tail9.data.o,ov_SC03_006_jr_80140608.o,tail10.data.o,ov_SC03_006_jr_8015444C.o,tail11.data.o,ov_SC03_006_jr_80154C24.o,ov_SC03_006_jr_801588CC.o,tail12.data.o,ov_SC03_006_jr_80159C84.o,tail13.data.o,ov_SC03_006_jr_8015A3C8.o,tail14.data.o,ov_SC03_006_jr_8015AE2C.o,tail15.data.o,ov_SC03_006_jr_8015C32C.o,tail16.data.o,ov_SC03_006_jr_8016AB6C.o,tail17.data.o,ov_SC03_006_jr_801734BC.o,tail18.data.o,ov_SC03_006_jr_80178D40.o,tail19.data.o,ov_SC03_006_jr_8017A4AC.o,tail20.data.o,ov_SC03_006_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_006/ov_SC03_006_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_006/ov_SC03_006_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_006/ov_SC03_006_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -480,7 +480,7 @@ ov_SC01_008_ELF := $(ov_SC01_008_OUT).elf ov_SC01_008_MAPFILE := $(ov_SC01_008_OUT).map ov_SC01_008_LD_SCRIPT := $(ov_SC01_008_OUT).ld ov_SC01_008_SPLAT_YAML := config/splat.ov_SC01_008.yaml -ov_SC01_008_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_008_jr_8012ACE0.o,tail2.data.o,ov_SC01_008_jr_80135888.o,tail3.data.o,ov_SC01_008_jr_80135A4C.o,tail4.data.o,ov_SC01_008_jr_80135D20.o,tail5.data.o,ov_SC01_008_jr_801380E0.o,tail6.data.o,ov_SC01_008_jr_8013F350.o,tail7.data.o,ov_SC01_008_jr_8013FFD8.o,tail8.data.o,ov_SC01_008_jr_80140608.o,tail9.data.o,ov_SC01_008_jr_8015444C.o,tail10.data.o,ov_SC01_008_jr_80154C24.o,ov_SC01_008_jr_801588CC.o,tail11.data.o,ov_SC01_008_jr_80159C84.o,tail12.data.o,ov_SC01_008_jr_8015A3C8.o,tail13.data.o,ov_SC01_008_jr_8015AE2C.o,tail14.data.o,ov_SC01_008_jr_8015C32C.o,tail15.data.o,ov_SC01_008_jr_8016AB6C.o,tail16.data.o,ov_SC01_008_jr_801734BC.o,tail17.data.o,ov_SC01_008_jr_80178D40.o,tail18.data.o,ov_SC01_008_jr_8017A4AC.o,tail19.data.o,ov_SC01_008_jr_8017AE2C.o,ov_SC01_008_jr_8017BE9C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC01_008_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_008.o,tail2.data.o,ov_SC01_008_jr_8012ACE0.o,tail3.data.o,ov_SC01_008_jr_80135888.o,tail4.data.o,ov_SC01_008_jr_80135A4C.o,tail5.data.o,ov_SC01_008_jr_80135D20.o,tail6.data.o,ov_SC01_008_jr_801380E0.o,tail7.data.o,ov_SC01_008_jr_8013F350.o,tail8.data.o,ov_SC01_008_jr_8013FFD8.o,tail9.data.o,ov_SC01_008_jr_80140608.o,tail10.data.o,ov_SC01_008_jr_8015444C.o,tail11.data.o,ov_SC01_008_jr_80154C24.o,ov_SC01_008_jr_801588CC.o,tail12.data.o,ov_SC01_008_jr_80159C84.o,tail13.data.o,ov_SC01_008_jr_8015A3C8.o,tail14.data.o,ov_SC01_008_jr_8015AE2C.o,tail15.data.o,ov_SC01_008_jr_8015C32C.o,tail16.data.o,ov_SC01_008_jr_8016AB6C.o,tail17.data.o,ov_SC01_008_jr_801734BC.o,tail18.data.o,ov_SC01_008_jr_80178D40.o,tail19.data.o,ov_SC01_008_jr_8017A4AC.o,tail20.data.o,ov_SC01_008_jr_8017AE2C.o,ov_SC01_008_jr_8017BE9C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC01_008/ov_SC01_008_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC01_008/ov_SC01_008_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC01_008/ov_SC01_008_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -507,7 +507,7 @@ ov_SC01_009_ELF := $(ov_SC01_009_OUT).elf ov_SC01_009_MAPFILE := $(ov_SC01_009_OUT).map ov_SC01_009_LD_SCRIPT := $(ov_SC01_009_OUT).ld ov_SC01_009_SPLAT_YAML := config/splat.ov_SC01_009.yaml -ov_SC01_009_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_009_jr_8012ACE0.o,tail2.data.o,ov_SC01_009_jr_80135888.o,tail3.data.o,ov_SC01_009_jr_80135A4C.o,tail4.data.o,ov_SC01_009_jr_80135D20.o,tail5.data.o,ov_SC01_009_jr_801380E0.o,tail6.data.o,ov_SC01_009_jr_8013F350.o,tail7.data.o,ov_SC01_009_jr_8013FFD8.o,tail8.data.o,ov_SC01_009_jr_80140608.o,tail9.data.o,ov_SC01_009_jr_8015444C.o,tail10.data.o,ov_SC01_009_jr_80154C24.o,ov_SC01_009_jr_801588CC.o,tail11.data.o,ov_SC01_009_jr_80159C84.o,tail12.data.o,ov_SC01_009_jr_8015A3C8.o,tail13.data.o,ov_SC01_009_jr_8015AE2C.o,tail14.data.o,ov_SC01_009_jr_8015C32C.o,tail15.data.o,ov_SC01_009_jr_8016AB6C.o,tail16.data.o,ov_SC01_009_jr_801734BC.o,tail17.data.o,ov_SC01_009_jr_80178D40.o,tail18.data.o,ov_SC01_009_jr_8017A4AC.o,tail19.data.o,ov_SC01_009_jr_8017AE2C.o,ov_SC01_009_jr_8017BE9C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC01_009_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_009.o,tail2.data.o,ov_SC01_009_jr_8012ACE0.o,tail3.data.o,ov_SC01_009_jr_80135888.o,tail4.data.o,ov_SC01_009_jr_80135A4C.o,tail5.data.o,ov_SC01_009_jr_80135D20.o,tail6.data.o,ov_SC01_009_jr_801380E0.o,tail7.data.o,ov_SC01_009_jr_8013F350.o,tail8.data.o,ov_SC01_009_jr_8013FFD8.o,tail9.data.o,ov_SC01_009_jr_80140608.o,tail10.data.o,ov_SC01_009_jr_8015444C.o,tail11.data.o,ov_SC01_009_jr_80154C24.o,ov_SC01_009_jr_801588CC.o,tail12.data.o,ov_SC01_009_jr_80159C84.o,tail13.data.o,ov_SC01_009_jr_8015A3C8.o,tail14.data.o,ov_SC01_009_jr_8015AE2C.o,tail15.data.o,ov_SC01_009_jr_8015C32C.o,tail16.data.o,ov_SC01_009_jr_8016AB6C.o,tail17.data.o,ov_SC01_009_jr_801734BC.o,tail18.data.o,ov_SC01_009_jr_80178D40.o,tail19.data.o,ov_SC01_009_jr_8017A4AC.o,tail20.data.o,ov_SC01_009_jr_8017AE2C.o,ov_SC01_009_jr_8017BE9C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC01_009/ov_SC01_009_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC01_009/ov_SC01_009_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC01_009/ov_SC01_009_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -534,7 +534,7 @@ ov_SC01_074_ELF := $(ov_SC01_074_OUT).elf ov_SC01_074_MAPFILE := $(ov_SC01_074_OUT).map ov_SC01_074_LD_SCRIPT := $(ov_SC01_074_OUT).ld ov_SC01_074_SPLAT_YAML := config/splat.ov_SC01_074.yaml -ov_SC01_074_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_074_jr_8012ACE0.o,tail2.data.o,ov_SC01_074_jr_80135888.o,tail3.data.o,ov_SC01_074_jr_80135A4C.o,tail4.data.o,ov_SC01_074_jr_80135D20.o,tail5.data.o,ov_SC01_074_jr_801380E0.o,tail6.data.o,ov_SC01_074_jr_8013F350.o,tail7.data.o,ov_SC01_074_jr_8013FFD8.o,tail8.data.o,ov_SC01_074_jr_80140608.o,tail9.data.o,ov_SC01_074_jr_8015444C.o,tail10.data.o,ov_SC01_074_jr_80154C24.o,ov_SC01_074_jr_801588CC.o,tail11.data.o,ov_SC01_074_jr_80159C84.o,tail12.data.o,ov_SC01_074_jr_8015A3C8.o,tail13.data.o,ov_SC01_074_jr_8015AE2C.o,tail14.data.o,ov_SC01_074_jr_8015C32C.o,tail15.data.o,ov_SC01_074_jr_8016AB6C.o,tail16.data.o,ov_SC01_074_jr_801734BC.o,tail17.data.o,ov_SC01_074_jr_80178D40.o,tail18.data.o,ov_SC01_074_jr_8017A4AC.o,tail19.data.o,ov_SC01_074_jr_8017AE2C.o,ov_SC01_074_jr_8017BE9C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC01_074_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_074.o,tail2.data.o,ov_SC01_074_jr_8012ACE0.o,tail3.data.o,ov_SC01_074_jr_80135888.o,tail4.data.o,ov_SC01_074_jr_80135A4C.o,tail5.data.o,ov_SC01_074_jr_80135D20.o,tail6.data.o,ov_SC01_074_jr_801380E0.o,tail7.data.o,ov_SC01_074_jr_8013F350.o,tail8.data.o,ov_SC01_074_jr_8013FFD8.o,tail9.data.o,ov_SC01_074_jr_80140608.o,tail10.data.o,ov_SC01_074_jr_8015444C.o,tail11.data.o,ov_SC01_074_jr_80154C24.o,ov_SC01_074_jr_801588CC.o,tail12.data.o,ov_SC01_074_jr_80159C84.o,tail13.data.o,ov_SC01_074_jr_8015A3C8.o,tail14.data.o,ov_SC01_074_jr_8015AE2C.o,tail15.data.o,ov_SC01_074_jr_8015C32C.o,tail16.data.o,ov_SC01_074_jr_8016AB6C.o,tail17.data.o,ov_SC01_074_jr_801734BC.o,tail18.data.o,ov_SC01_074_jr_80178D40.o,tail19.data.o,ov_SC01_074_jr_8017A4AC.o,tail20.data.o,ov_SC01_074_jr_8017AE2C.o,ov_SC01_074_jr_8017BE9C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC01_074/ov_SC01_074_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC01_074/ov_SC01_074_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC01_074/ov_SC01_074_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -561,7 +561,7 @@ ov_SC01_080_ELF := $(ov_SC01_080_OUT).elf ov_SC01_080_MAPFILE := $(ov_SC01_080_OUT).map ov_SC01_080_LD_SCRIPT := $(ov_SC01_080_OUT).ld ov_SC01_080_SPLAT_YAML := config/splat.ov_SC01_080.yaml -ov_SC01_080_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_080_jr_8012ACE0.o,tail2.data.o,ov_SC01_080_jr_80135888.o,tail3.data.o,ov_SC01_080_jr_80135A4C.o,tail4.data.o,ov_SC01_080_jr_80135D20.o,tail5.data.o,ov_SC01_080_jr_801380E0.o,tail6.data.o,ov_SC01_080_jr_8013F350.o,tail7.data.o,ov_SC01_080_jr_8013FFD8.o,tail8.data.o,ov_SC01_080_jr_80140608.o,tail9.data.o,ov_SC01_080_jr_8015444C.o,tail10.data.o,ov_SC01_080_jr_80154C24.o,ov_SC01_080_jr_801588CC.o,tail11.data.o,ov_SC01_080_jr_80159C84.o,tail12.data.o,ov_SC01_080_jr_8015A3C8.o,tail13.data.o,ov_SC01_080_jr_8015AE2C.o,tail14.data.o,ov_SC01_080_jr_8015C32C.o,tail15.data.o,ov_SC01_080_jr_8016AB6C.o,tail16.data.o,ov_SC01_080_jr_801734BC.o,tail17.data.o,ov_SC01_080_jr_80178D40.o,tail18.data.o,ov_SC01_080_jr_8017A4AC.o,tail19.data.o,ov_SC01_080_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC01_080_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_080.o,tail2.data.o,ov_SC01_080_jr_8012ACE0.o,tail3.data.o,ov_SC01_080_jr_80135888.o,tail4.data.o,ov_SC01_080_jr_80135A4C.o,tail5.data.o,ov_SC01_080_jr_80135D20.o,tail6.data.o,ov_SC01_080_jr_801380E0.o,tail7.data.o,ov_SC01_080_jr_8013F350.o,tail8.data.o,ov_SC01_080_jr_8013FFD8.o,tail9.data.o,ov_SC01_080_jr_80140608.o,tail10.data.o,ov_SC01_080_jr_8015444C.o,tail11.data.o,ov_SC01_080_jr_80154C24.o,ov_SC01_080_jr_801588CC.o,tail12.data.o,ov_SC01_080_jr_80159C84.o,tail13.data.o,ov_SC01_080_jr_8015A3C8.o,tail14.data.o,ov_SC01_080_jr_8015AE2C.o,tail15.data.o,ov_SC01_080_jr_8015C32C.o,tail16.data.o,ov_SC01_080_jr_8016AB6C.o,tail17.data.o,ov_SC01_080_jr_801734BC.o,tail18.data.o,ov_SC01_080_jr_80178D40.o,tail19.data.o,ov_SC01_080_jr_8017A4AC.o,tail20.data.o,ov_SC01_080_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC01_080/ov_SC01_080_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC01_080/ov_SC01_080_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC01_080/ov_SC01_080_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -588,7 +588,7 @@ ov_SC01_084_ELF := $(ov_SC01_084_OUT).elf ov_SC01_084_MAPFILE := $(ov_SC01_084_OUT).map ov_SC01_084_LD_SCRIPT := $(ov_SC01_084_OUT).ld ov_SC01_084_SPLAT_YAML := config/splat.ov_SC01_084.yaml -ov_SC01_084_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_084_jr_8012ACE0.o,tail2.data.o,ov_SC01_084_jr_80135888.o,tail3.data.o,ov_SC01_084_jr_80135A4C.o,tail4.data.o,ov_SC01_084_jr_80135D20.o,tail5.data.o,ov_SC01_084_jr_801380E0.o,tail6.data.o,ov_SC01_084_jr_8013F350.o,tail7.data.o,ov_SC01_084_jr_8013FFD8.o,tail8.data.o,ov_SC01_084_jr_80140608.o,tail9.data.o,ov_SC01_084_jr_8015444C.o,tail10.data.o,ov_SC01_084_jr_80154C24.o,ov_SC01_084_jr_801588CC.o,tail11.data.o,ov_SC01_084_jr_80159C84.o,tail12.data.o,ov_SC01_084_jr_8015A3C8.o,tail13.data.o,ov_SC01_084_jr_8015AE2C.o,tail14.data.o,ov_SC01_084_jr_8015C32C.o,tail15.data.o,ov_SC01_084_jr_8016AB6C.o,tail16.data.o,ov_SC01_084_jr_801734BC.o,tail17.data.o,ov_SC01_084_jr_80178D40.o,tail18.data.o,ov_SC01_084_jr_8017A4AC.o,tail19.data.o,ov_SC01_084_jr_8017AE2C.o,ov_SC01_084_jr_8017CA80.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC01_084_JTBL_INTERLEAVE := --order tail.data.o,ov_SC01_084.o,tail2.data.o,ov_SC01_084_jr_8012ACE0.o,tail3.data.o,ov_SC01_084_jr_80135888.o,tail4.data.o,ov_SC01_084_jr_80135A4C.o,tail5.data.o,ov_SC01_084_jr_80135D20.o,tail6.data.o,ov_SC01_084_jr_801380E0.o,tail7.data.o,ov_SC01_084_jr_8013F350.o,tail8.data.o,ov_SC01_084_jr_8013FFD8.o,tail9.data.o,ov_SC01_084_jr_80140608.o,tail10.data.o,ov_SC01_084_jr_8015444C.o,tail11.data.o,ov_SC01_084_jr_80154C24.o,ov_SC01_084_jr_801588CC.o,tail12.data.o,ov_SC01_084_jr_80159C84.o,tail13.data.o,ov_SC01_084_jr_8015A3C8.o,tail14.data.o,ov_SC01_084_jr_8015AE2C.o,tail15.data.o,ov_SC01_084_jr_8015C32C.o,tail16.data.o,ov_SC01_084_jr_8016AB6C.o,tail17.data.o,ov_SC01_084_jr_801734BC.o,tail18.data.o,ov_SC01_084_jr_80178D40.o,tail19.data.o,ov_SC01_084_jr_8017A4AC.o,tail20.data.o,ov_SC01_084_jr_8017AE2C.o,ov_SC01_084_jr_8017CA80.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC01_084/ov_SC01_084_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC01_084/ov_SC01_084_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC01_084/ov_SC01_084_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -615,7 +615,7 @@ ov_SC02_004_ELF := $(ov_SC02_004_OUT).elf ov_SC02_004_MAPFILE := $(ov_SC02_004_OUT).map ov_SC02_004_LD_SCRIPT := $(ov_SC02_004_OUT).ld ov_SC02_004_SPLAT_YAML := config/splat.ov_SC02_004.yaml -ov_SC02_004_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_004_jr_8012ACE0.o,tail2.data.o,ov_SC02_004_jr_80135888.o,tail3.data.o,ov_SC02_004_jr_80135A4C.o,tail4.data.o,ov_SC02_004_jr_80135D20.o,tail5.data.o,ov_SC02_004_jr_801380E0.o,tail6.data.o,ov_SC02_004_jr_8013F350.o,tail7.data.o,ov_SC02_004_jr_8013FFD8.o,tail8.data.o,ov_SC02_004_jr_80140608.o,tail9.data.o,ov_SC02_004_jr_8015444C.o,tail10.data.o,ov_SC02_004_jr_80154C24.o,ov_SC02_004_jr_801588CC.o,tail11.data.o,ov_SC02_004_jr_80159C84.o,tail12.data.o,ov_SC02_004_jr_8015A3C8.o,tail13.data.o,ov_SC02_004_jr_8015AE2C.o,tail14.data.o,ov_SC02_004_jr_8015C32C.o,tail15.data.o,ov_SC02_004_jr_8016AB6C.o,tail16.data.o,ov_SC02_004_jr_801734BC.o,tail17.data.o,ov_SC02_004_jr_80178D40.o,tail18.data.o,ov_SC02_004_jr_8017A4AC.o,tail19.data.o,ov_SC02_004_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC02_004_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_004.o,tail2.data.o,ov_SC02_004_jr_8012ACE0.o,tail3.data.o,ov_SC02_004_jr_80135888.o,tail4.data.o,ov_SC02_004_jr_80135A4C.o,tail5.data.o,ov_SC02_004_jr_80135D20.o,tail6.data.o,ov_SC02_004_jr_801380E0.o,tail7.data.o,ov_SC02_004_jr_8013F350.o,tail8.data.o,ov_SC02_004_jr_8013FFD8.o,tail9.data.o,ov_SC02_004_jr_80140608.o,tail10.data.o,ov_SC02_004_jr_8015444C.o,tail11.data.o,ov_SC02_004_jr_80154C24.o,ov_SC02_004_jr_801588CC.o,tail12.data.o,ov_SC02_004_jr_80159C84.o,tail13.data.o,ov_SC02_004_jr_8015A3C8.o,tail14.data.o,ov_SC02_004_jr_8015AE2C.o,tail15.data.o,ov_SC02_004_jr_8015C32C.o,tail16.data.o,ov_SC02_004_jr_8016AB6C.o,tail17.data.o,ov_SC02_004_jr_801734BC.o,tail18.data.o,ov_SC02_004_jr_80178D40.o,tail19.data.o,ov_SC02_004_jr_8017A4AC.o,tail20.data.o,ov_SC02_004_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC02_004/ov_SC02_004_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC02_004/ov_SC02_004_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_004/ov_SC02_004_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -642,7 +642,7 @@ ov_SC02_005_ELF := $(ov_SC02_005_OUT).elf ov_SC02_005_MAPFILE := $(ov_SC02_005_OUT).map ov_SC02_005_LD_SCRIPT := $(ov_SC02_005_OUT).ld ov_SC02_005_SPLAT_YAML := config/splat.ov_SC02_005.yaml -ov_SC02_005_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_005_jr_8012ACE0.o,tail2.data.o,ov_SC02_005_jr_80135888.o,tail3.data.o,ov_SC02_005_jr_80135A4C.o,tail4.data.o,ov_SC02_005_jr_80135D20.o,tail5.data.o,ov_SC02_005_jr_801380E0.o,tail6.data.o,ov_SC02_005_jr_8013F350.o,tail7.data.o,ov_SC02_005_jr_8013FFD8.o,tail8.data.o,ov_SC02_005_jr_80140608.o,tail9.data.o,ov_SC02_005_jr_8015444C.o,tail10.data.o,ov_SC02_005_jr_80154C24.o,ov_SC02_005_jr_801588CC.o,tail11.data.o,ov_SC02_005_jr_80159C84.o,tail12.data.o,ov_SC02_005_jr_8015A3C8.o,tail13.data.o,ov_SC02_005_jr_8015AE2C.o,tail14.data.o,ov_SC02_005_jr_8015C32C.o,tail15.data.o,ov_SC02_005_jr_8016AB6C.o,tail16.data.o,ov_SC02_005_jr_801734BC.o,tail17.data.o,ov_SC02_005_jr_80178D40.o,tail18.data.o,ov_SC02_005_jr_8017A4AC.o,tail19.data.o,ov_SC02_005_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC02_005_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_005.o,tail2.data.o,ov_SC02_005_jr_8012ACE0.o,tail3.data.o,ov_SC02_005_jr_80135888.o,tail4.data.o,ov_SC02_005_jr_80135A4C.o,tail5.data.o,ov_SC02_005_jr_80135D20.o,tail6.data.o,ov_SC02_005_jr_801380E0.o,tail7.data.o,ov_SC02_005_jr_8013F350.o,tail8.data.o,ov_SC02_005_jr_8013FFD8.o,tail9.data.o,ov_SC02_005_jr_80140608.o,tail10.data.o,ov_SC02_005_jr_8015444C.o,tail11.data.o,ov_SC02_005_jr_80154C24.o,ov_SC02_005_jr_801588CC.o,tail12.data.o,ov_SC02_005_jr_80159C84.o,tail13.data.o,ov_SC02_005_jr_8015A3C8.o,tail14.data.o,ov_SC02_005_jr_8015AE2C.o,tail15.data.o,ov_SC02_005_jr_8015C32C.o,tail16.data.o,ov_SC02_005_jr_8016AB6C.o,tail17.data.o,ov_SC02_005_jr_801734BC.o,tail18.data.o,ov_SC02_005_jr_80178D40.o,tail19.data.o,ov_SC02_005_jr_8017A4AC.o,tail20.data.o,ov_SC02_005_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC02_005/ov_SC02_005_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC02_005/ov_SC02_005_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_005/ov_SC02_005_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -669,7 +669,7 @@ ov_SC02_011_ELF := $(ov_SC02_011_OUT).elf ov_SC02_011_MAPFILE := $(ov_SC02_011_OUT).map ov_SC02_011_LD_SCRIPT := $(ov_SC02_011_OUT).ld ov_SC02_011_SPLAT_YAML := config/splat.ov_SC02_011.yaml -ov_SC02_011_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_011_jr_8012ACE0.o,tail2.data.o,ov_SC02_011_jr_80135888.o,tail3.data.o,ov_SC02_011_jr_80135A4C.o,tail4.data.o,ov_SC02_011_jr_80135D20.o,tail5.data.o,ov_SC02_011_jr_801380E0.o,tail6.data.o,ov_SC02_011_jr_8013F350.o,tail7.data.o,ov_SC02_011_jr_8013FFD8.o,tail8.data.o,ov_SC02_011_jr_80140608.o,tail9.data.o,ov_SC02_011_jr_8015444C.o,tail10.data.o,ov_SC02_011_jr_80154C24.o,ov_SC02_011_jr_801588CC.o,tail11.data.o,ov_SC02_011_jr_80159C84.o,tail12.data.o,ov_SC02_011_jr_8015A3C8.o,tail13.data.o,ov_SC02_011_jr_8015AE2C.o,tail14.data.o,ov_SC02_011_jr_8015C32C.o,tail15.data.o,ov_SC02_011_jr_8016AB6C.o,tail16.data.o,ov_SC02_011_jr_801734BC.o,tail17.data.o,ov_SC02_011_jr_80178D40.o,tail18.data.o,ov_SC02_011_jr_8017A4AC.o,tail19.data.o,ov_SC02_011_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC02_011_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_011.o,tail2.data.o,ov_SC02_011_jr_8012ACE0.o,tail3.data.o,ov_SC02_011_jr_80135888.o,tail4.data.o,ov_SC02_011_jr_80135A4C.o,tail5.data.o,ov_SC02_011_jr_80135D20.o,tail6.data.o,ov_SC02_011_jr_801380E0.o,tail7.data.o,ov_SC02_011_jr_8013F350.o,tail8.data.o,ov_SC02_011_jr_8013FFD8.o,tail9.data.o,ov_SC02_011_jr_80140608.o,tail10.data.o,ov_SC02_011_jr_8015444C.o,tail11.data.o,ov_SC02_011_jr_80154C24.o,ov_SC02_011_jr_801588CC.o,tail12.data.o,ov_SC02_011_jr_80159C84.o,tail13.data.o,ov_SC02_011_jr_8015A3C8.o,tail14.data.o,ov_SC02_011_jr_8015AE2C.o,tail15.data.o,ov_SC02_011_jr_8015C32C.o,tail16.data.o,ov_SC02_011_jr_8016AB6C.o,tail17.data.o,ov_SC02_011_jr_801734BC.o,tail18.data.o,ov_SC02_011_jr_80178D40.o,tail19.data.o,ov_SC02_011_jr_8017A4AC.o,tail20.data.o,ov_SC02_011_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC02_011/ov_SC02_011_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC02_011/ov_SC02_011_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_011/ov_SC02_011_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -696,7 +696,7 @@ ov_SC02_015_ELF := $(ov_SC02_015_OUT).elf ov_SC02_015_MAPFILE := $(ov_SC02_015_OUT).map ov_SC02_015_LD_SCRIPT := $(ov_SC02_015_OUT).ld ov_SC02_015_SPLAT_YAML := config/splat.ov_SC02_015.yaml -ov_SC02_015_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_015_jr_8012ACE0.o,tail2.data.o,ov_SC02_015_jr_80135888.o,tail3.data.o,ov_SC02_015_jr_80135A4C.o,tail4.data.o,ov_SC02_015_jr_80135D20.o,tail5.data.o,ov_SC02_015_jr_801380E0.o,tail6.data.o,ov_SC02_015_jr_8013F350.o,tail7.data.o,ov_SC02_015_jr_8013FFD8.o,tail8.data.o,ov_SC02_015_jr_80140608.o,tail9.data.o,ov_SC02_015_jr_8015444C.o,tail10.data.o,ov_SC02_015_jr_80154C24.o,ov_SC02_015_jr_801588CC.o,tail11.data.o,ov_SC02_015_jr_80159C84.o,tail12.data.o,ov_SC02_015_jr_8015A3C8.o,tail13.data.o,ov_SC02_015_jr_8015AE2C.o,tail14.data.o,ov_SC02_015_jr_8015C32C.o,tail15.data.o,ov_SC02_015_jr_8016AB6C.o,tail16.data.o,ov_SC02_015_jr_801734BC.o,tail17.data.o,ov_SC02_015_jr_80178D40.o,tail18.data.o,ov_SC02_015_jr_8017A4AC.o,tail19.data.o,ov_SC02_015_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC02_015_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_015.o,tail2.data.o,ov_SC02_015_jr_8012ACE0.o,tail3.data.o,ov_SC02_015_jr_80135888.o,tail4.data.o,ov_SC02_015_jr_80135A4C.o,tail5.data.o,ov_SC02_015_jr_80135D20.o,tail6.data.o,ov_SC02_015_jr_801380E0.o,tail7.data.o,ov_SC02_015_jr_8013F350.o,tail8.data.o,ov_SC02_015_jr_8013FFD8.o,tail9.data.o,ov_SC02_015_jr_80140608.o,tail10.data.o,ov_SC02_015_jr_8015444C.o,tail11.data.o,ov_SC02_015_jr_80154C24.o,ov_SC02_015_jr_801588CC.o,tail12.data.o,ov_SC02_015_jr_80159C84.o,tail13.data.o,ov_SC02_015_jr_8015A3C8.o,tail14.data.o,ov_SC02_015_jr_8015AE2C.o,tail15.data.o,ov_SC02_015_jr_8015C32C.o,tail16.data.o,ov_SC02_015_jr_8016AB6C.o,tail17.data.o,ov_SC02_015_jr_801734BC.o,tail18.data.o,ov_SC02_015_jr_80178D40.o,tail19.data.o,ov_SC02_015_jr_8017A4AC.o,tail20.data.o,ov_SC02_015_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC02_015/ov_SC02_015_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC02_015/ov_SC02_015_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_015/ov_SC02_015_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -723,7 +723,7 @@ ov_SC02_016_ELF := $(ov_SC02_016_OUT).elf ov_SC02_016_MAPFILE := $(ov_SC02_016_OUT).map ov_SC02_016_LD_SCRIPT := $(ov_SC02_016_OUT).ld ov_SC02_016_SPLAT_YAML := config/splat.ov_SC02_016.yaml -ov_SC02_016_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_016_jr_8012ACE0.o,tail2.data.o,ov_SC02_016_jr_80135888.o,tail3.data.o,ov_SC02_016_jr_80135A4C.o,tail4.data.o,ov_SC02_016_jr_80135D20.o,tail5.data.o,ov_SC02_016_jr_801380E0.o,tail6.data.o,ov_SC02_016_jr_8013F350.o,tail7.data.o,ov_SC02_016_jr_8013FFD8.o,tail8.data.o,ov_SC02_016_jr_80140608.o,tail9.data.o,ov_SC02_016_jr_8015444C.o,tail10.data.o,ov_SC02_016_jr_80154C24.o,ov_SC02_016_jr_801588CC.o,tail11.data.o,ov_SC02_016_jr_80159C84.o,tail12.data.o,ov_SC02_016_jr_8015A3C8.o,tail13.data.o,ov_SC02_016_jr_8015AE2C.o,tail14.data.o,ov_SC02_016_jr_8015C32C.o,tail15.data.o,ov_SC02_016_jr_8016AB6C.o,tail16.data.o,ov_SC02_016_jr_801734BC.o,tail17.data.o,ov_SC02_016_jr_80178D40.o,tail18.data.o,ov_SC02_016_jr_8017A4AC.o,tail19.data.o,ov_SC02_016_jr_8017AE2C.o,ov_SC02_016_jr_8017DC70.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC02_016_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_016.o,tail2.data.o,ov_SC02_016_jr_8012ACE0.o,tail3.data.o,ov_SC02_016_jr_80135888.o,tail4.data.o,ov_SC02_016_jr_80135A4C.o,tail5.data.o,ov_SC02_016_jr_80135D20.o,tail6.data.o,ov_SC02_016_jr_801380E0.o,tail7.data.o,ov_SC02_016_jr_8013F350.o,tail8.data.o,ov_SC02_016_jr_8013FFD8.o,tail9.data.o,ov_SC02_016_jr_80140608.o,tail10.data.o,ov_SC02_016_jr_8015444C.o,tail11.data.o,ov_SC02_016_jr_80154C24.o,ov_SC02_016_jr_801588CC.o,tail12.data.o,ov_SC02_016_jr_80159C84.o,tail13.data.o,ov_SC02_016_jr_8015A3C8.o,tail14.data.o,ov_SC02_016_jr_8015AE2C.o,tail15.data.o,ov_SC02_016_jr_8015C32C.o,tail16.data.o,ov_SC02_016_jr_8016AB6C.o,tail17.data.o,ov_SC02_016_jr_801734BC.o,tail18.data.o,ov_SC02_016_jr_80178D40.o,tail19.data.o,ov_SC02_016_jr_8017A4AC.o,tail20.data.o,ov_SC02_016_jr_8017AE2C.o,ov_SC02_016_jr_8017DC70.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC02_016/ov_SC02_016_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC02_016/ov_SC02_016_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_016/ov_SC02_016_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -750,7 +750,7 @@ ov_SC02_017_ELF := $(ov_SC02_017_OUT).elf ov_SC02_017_MAPFILE := $(ov_SC02_017_OUT).map ov_SC02_017_LD_SCRIPT := $(ov_SC02_017_OUT).ld ov_SC02_017_SPLAT_YAML := config/splat.ov_SC02_017.yaml -ov_SC02_017_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_017_jr_8012ACE0.o,tail2.data.o,ov_SC02_017_jr_80135888.o,tail3.data.o,ov_SC02_017_jr_80135A4C.o,tail4.data.o,ov_SC02_017_jr_80135D20.o,tail5.data.o,ov_SC02_017_jr_801380E0.o,tail6.data.o,ov_SC02_017_jr_8013F350.o,tail7.data.o,ov_SC02_017_jr_8013FFD8.o,tail8.data.o,ov_SC02_017_jr_80140608.o,tail9.data.o,ov_SC02_017_jr_8015444C.o,tail10.data.o,ov_SC02_017_jr_80154C24.o,ov_SC02_017_jr_801588CC.o,tail11.data.o,ov_SC02_017_jr_80159C84.o,tail12.data.o,ov_SC02_017_jr_8015A3C8.o,tail13.data.o,ov_SC02_017_jr_8015AE2C.o,tail14.data.o,ov_SC02_017_jr_8015C32C.o,tail15.data.o,ov_SC02_017_jr_8016AB6C.o,tail16.data.o,ov_SC02_017_jr_801734BC.o,tail17.data.o,ov_SC02_017_jr_80178D40.o,tail18.data.o,ov_SC02_017_jr_8017A4AC.o,tail19.data.o,ov_SC02_017_jr_8017AE2C.o,ov_SC02_017_jr_8017DF34.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC02_017_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_017.o,tail2.data.o,ov_SC02_017_jr_8012ACE0.o,tail3.data.o,ov_SC02_017_jr_80135888.o,tail4.data.o,ov_SC02_017_jr_80135A4C.o,tail5.data.o,ov_SC02_017_jr_80135D20.o,tail6.data.o,ov_SC02_017_jr_801380E0.o,tail7.data.o,ov_SC02_017_jr_8013F350.o,tail8.data.o,ov_SC02_017_jr_8013FFD8.o,tail9.data.o,ov_SC02_017_jr_80140608.o,tail10.data.o,ov_SC02_017_jr_8015444C.o,tail11.data.o,ov_SC02_017_jr_80154C24.o,ov_SC02_017_jr_801588CC.o,tail12.data.o,ov_SC02_017_jr_80159C84.o,tail13.data.o,ov_SC02_017_jr_8015A3C8.o,tail14.data.o,ov_SC02_017_jr_8015AE2C.o,tail15.data.o,ov_SC02_017_jr_8015C32C.o,tail16.data.o,ov_SC02_017_jr_8016AB6C.o,tail17.data.o,ov_SC02_017_jr_801734BC.o,tail18.data.o,ov_SC02_017_jr_80178D40.o,tail19.data.o,ov_SC02_017_jr_8017A4AC.o,tail20.data.o,ov_SC02_017_jr_8017AE2C.o,ov_SC02_017_jr_8017DF34.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC02_017/ov_SC02_017_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC02_017/ov_SC02_017_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_017/ov_SC02_017_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -777,7 +777,7 @@ ov_SC02_021_ELF := $(ov_SC02_021_OUT).elf ov_SC02_021_MAPFILE := $(ov_SC02_021_OUT).map ov_SC02_021_LD_SCRIPT := $(ov_SC02_021_OUT).ld ov_SC02_021_SPLAT_YAML := config/splat.ov_SC02_021.yaml -ov_SC02_021_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_021_jr_8012ACE0.o,tail2.data.o,ov_SC02_021_jr_80135888.o,tail3.data.o,ov_SC02_021_jr_80135A4C.o,tail4.data.o,ov_SC02_021_jr_80135D20.o,tail5.data.o,ov_SC02_021_jr_801380E0.o,tail6.data.o,ov_SC02_021_jr_8013F350.o,tail7.data.o,ov_SC02_021_jr_8013FFD8.o,tail8.data.o,ov_SC02_021_jr_80140608.o,tail9.data.o,ov_SC02_021_jr_8015444C.o,tail10.data.o,ov_SC02_021_jr_80154C24.o,ov_SC02_021_jr_801588CC.o,tail11.data.o,ov_SC02_021_jr_80159C84.o,tail12.data.o,ov_SC02_021_jr_8015A3C8.o,tail13.data.o,ov_SC02_021_jr_8015AE2C.o,tail14.data.o,ov_SC02_021_jr_8015C32C.o,tail15.data.o,ov_SC02_021_jr_8016AB6C.o,tail16.data.o,ov_SC02_021_jr_801734BC.o,tail17.data.o,ov_SC02_021_jr_80178D40.o,tail18.data.o,ov_SC02_021_jr_8017A4AC.o,tail19.data.o,ov_SC02_021_jr_8017AE2C.o,ov_SC02_021_jr_8017C294.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC02_021_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_021.o,tail2.data.o,ov_SC02_021_jr_8012ACE0.o,tail3.data.o,ov_SC02_021_jr_80135888.o,tail4.data.o,ov_SC02_021_jr_80135A4C.o,tail5.data.o,ov_SC02_021_jr_80135D20.o,tail6.data.o,ov_SC02_021_jr_801380E0.o,tail7.data.o,ov_SC02_021_jr_8013F350.o,tail8.data.o,ov_SC02_021_jr_8013FFD8.o,tail9.data.o,ov_SC02_021_jr_80140608.o,tail10.data.o,ov_SC02_021_jr_8015444C.o,tail11.data.o,ov_SC02_021_jr_80154C24.o,ov_SC02_021_jr_801588CC.o,tail12.data.o,ov_SC02_021_jr_80159C84.o,tail13.data.o,ov_SC02_021_jr_8015A3C8.o,tail14.data.o,ov_SC02_021_jr_8015AE2C.o,tail15.data.o,ov_SC02_021_jr_8015C32C.o,tail16.data.o,ov_SC02_021_jr_8016AB6C.o,tail17.data.o,ov_SC02_021_jr_801734BC.o,tail18.data.o,ov_SC02_021_jr_80178D40.o,tail19.data.o,ov_SC02_021_jr_8017A4AC.o,tail20.data.o,ov_SC02_021_jr_8017AE2C.o,ov_SC02_021_jr_8017C294.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC02_021/ov_SC02_021_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC02_021/ov_SC02_021_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_021/ov_SC02_021_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -804,7 +804,7 @@ ov_SC02_026_ELF := $(ov_SC02_026_OUT).elf ov_SC02_026_MAPFILE := $(ov_SC02_026_OUT).map ov_SC02_026_LD_SCRIPT := $(ov_SC02_026_OUT).ld ov_SC02_026_SPLAT_YAML := config/splat.ov_SC02_026.yaml -ov_SC02_026_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_026_jr_8012ACE0.o,tail2.data.o,ov_SC02_026_jr_80135888.o,tail3.data.o,ov_SC02_026_jr_80135A4C.o,tail4.data.o,ov_SC02_026_jr_80135D20.o,tail5.data.o,ov_SC02_026_jr_801380E0.o,tail6.data.o,ov_SC02_026_jr_8013F350.o,tail7.data.o,ov_SC02_026_jr_8013FFD8.o,tail8.data.o,ov_SC02_026_jr_80140608.o,tail9.data.o,ov_SC02_026_jr_8015444C.o,tail10.data.o,ov_SC02_026_jr_80154C24.o,ov_SC02_026_jr_801588CC.o,tail11.data.o,ov_SC02_026_jr_80159C84.o,tail12.data.o,ov_SC02_026_jr_8015A3C8.o,tail13.data.o,ov_SC02_026_jr_8015AE2C.o,tail14.data.o,ov_SC02_026_jr_8015C32C.o,tail15.data.o,ov_SC02_026_jr_8016AB6C.o,tail16.data.o,ov_SC02_026_jr_801734BC.o,tail17.data.o,ov_SC02_026_jr_80178D40.o,tail18.data.o,ov_SC02_026_jr_8017A4AC.o,tail19.data.o,ov_SC02_026_jr_8017AE2C.o,ov_SC02_026_jr_8017C180.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC02_026_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_026.o,tail2.data.o,ov_SC02_026_jr_8012ACE0.o,tail3.data.o,ov_SC02_026_jr_80135888.o,tail4.data.o,ov_SC02_026_jr_80135A4C.o,tail5.data.o,ov_SC02_026_jr_80135D20.o,tail6.data.o,ov_SC02_026_jr_801380E0.o,tail7.data.o,ov_SC02_026_jr_8013F350.o,tail8.data.o,ov_SC02_026_jr_8013FFD8.o,tail9.data.o,ov_SC02_026_jr_80140608.o,tail10.data.o,ov_SC02_026_jr_8015444C.o,tail11.data.o,ov_SC02_026_jr_80154C24.o,ov_SC02_026_jr_801588CC.o,tail12.data.o,ov_SC02_026_jr_80159C84.o,tail13.data.o,ov_SC02_026_jr_8015A3C8.o,tail14.data.o,ov_SC02_026_jr_8015AE2C.o,tail15.data.o,ov_SC02_026_jr_8015C32C.o,tail16.data.o,ov_SC02_026_jr_8016AB6C.o,tail17.data.o,ov_SC02_026_jr_801734BC.o,tail18.data.o,ov_SC02_026_jr_80178D40.o,tail19.data.o,ov_SC02_026_jr_8017A4AC.o,tail20.data.o,ov_SC02_026_jr_8017AE2C.o,ov_SC02_026_jr_8017C180.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC02_026/ov_SC02_026_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC02_026/ov_SC02_026_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_026/ov_SC02_026_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -831,7 +831,7 @@ ov_SC02_027_ELF := $(ov_SC02_027_OUT).elf ov_SC02_027_MAPFILE := $(ov_SC02_027_OUT).map ov_SC02_027_LD_SCRIPT := $(ov_SC02_027_OUT).ld ov_SC02_027_SPLAT_YAML := config/splat.ov_SC02_027.yaml -ov_SC02_027_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_027_jr_8012ACE0.o,tail2.data.o,ov_SC02_027_jr_80135888.o,tail3.data.o,ov_SC02_027_jr_80135A4C.o,tail4.data.o,ov_SC02_027_jr_80135D20.o,tail5.data.o,ov_SC02_027_jr_801380E0.o,tail6.data.o,ov_SC02_027_jr_8013F350.o,tail7.data.o,ov_SC02_027_jr_8013FFD8.o,tail8.data.o,ov_SC02_027_jr_80140608.o,tail9.data.o,ov_SC02_027_jr_8015444C.o,tail10.data.o,ov_SC02_027_jr_80154C24.o,ov_SC02_027_jr_801588CC.o,tail11.data.o,ov_SC02_027_jr_80159C84.o,tail12.data.o,ov_SC02_027_jr_8015A3C8.o,tail13.data.o,ov_SC02_027_jr_8015AE2C.o,tail14.data.o,ov_SC02_027_jr_8015C32C.o,tail15.data.o,ov_SC02_027_jr_8016AB6C.o,tail16.data.o,ov_SC02_027_jr_801734BC.o,tail17.data.o,ov_SC02_027_jr_80178D40.o,tail18.data.o,ov_SC02_027_jr_8017A4AC.o,tail19.data.o,ov_SC02_027_jr_8017AE2C.o,ov_SC02_027_jr_8017D898.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC02_027_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_027.o,tail2.data.o,ov_SC02_027_jr_8012ACE0.o,tail3.data.o,ov_SC02_027_jr_80135888.o,tail4.data.o,ov_SC02_027_jr_80135A4C.o,tail5.data.o,ov_SC02_027_jr_80135D20.o,tail6.data.o,ov_SC02_027_jr_801380E0.o,tail7.data.o,ov_SC02_027_jr_8013F350.o,tail8.data.o,ov_SC02_027_jr_8013FFD8.o,tail9.data.o,ov_SC02_027_jr_80140608.o,tail10.data.o,ov_SC02_027_jr_8015444C.o,tail11.data.o,ov_SC02_027_jr_80154C24.o,ov_SC02_027_jr_801588CC.o,tail12.data.o,ov_SC02_027_jr_80159C84.o,tail13.data.o,ov_SC02_027_jr_8015A3C8.o,tail14.data.o,ov_SC02_027_jr_8015AE2C.o,tail15.data.o,ov_SC02_027_jr_8015C32C.o,tail16.data.o,ov_SC02_027_jr_8016AB6C.o,tail17.data.o,ov_SC02_027_jr_801734BC.o,tail18.data.o,ov_SC02_027_jr_80178D40.o,tail19.data.o,ov_SC02_027_jr_8017A4AC.o,tail20.data.o,ov_SC02_027_jr_8017AE2C.o,ov_SC02_027_jr_8017D898.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC02_027/ov_SC02_027_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC02_027/ov_SC02_027_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_027/ov_SC02_027_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -858,7 +858,7 @@ ov_SC02_028_ELF := $(ov_SC02_028_OUT).elf ov_SC02_028_MAPFILE := $(ov_SC02_028_OUT).map ov_SC02_028_LD_SCRIPT := $(ov_SC02_028_OUT).ld ov_SC02_028_SPLAT_YAML := config/splat.ov_SC02_028.yaml -ov_SC02_028_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_028_jr_8012ACE0.o,tail2.data.o,ov_SC02_028_jr_80135888.o,tail3.data.o,ov_SC02_028_jr_80135A4C.o,tail4.data.o,ov_SC02_028_jr_80135D20.o,tail5.data.o,ov_SC02_028_jr_801380E0.o,tail6.data.o,ov_SC02_028_jr_8013F350.o,tail7.data.o,ov_SC02_028_jr_8013FFD8.o,tail8.data.o,ov_SC02_028_jr_80140608.o,tail9.data.o,ov_SC02_028_jr_8015444C.o,tail10.data.o,ov_SC02_028_jr_80154C24.o,ov_SC02_028_jr_801588CC.o,tail11.data.o,ov_SC02_028_jr_80159C84.o,tail12.data.o,ov_SC02_028_jr_8015A3C8.o,tail13.data.o,ov_SC02_028_jr_8015AE2C.o,tail14.data.o,ov_SC02_028_jr_8015C32C.o,tail15.data.o,ov_SC02_028_jr_8016AB6C.o,tail16.data.o,ov_SC02_028_jr_801734BC.o,tail17.data.o,ov_SC02_028_jr_80178D40.o,tail18.data.o,ov_SC02_028_jr_8017A4AC.o,tail19.data.o,ov_SC02_028_jr_8017AE2C.o,ov_SC02_028_jr_8017D898.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC02_028_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_028.o,tail2.data.o,ov_SC02_028_jr_8012ACE0.o,tail3.data.o,ov_SC02_028_jr_80135888.o,tail4.data.o,ov_SC02_028_jr_80135A4C.o,tail5.data.o,ov_SC02_028_jr_80135D20.o,tail6.data.o,ov_SC02_028_jr_801380E0.o,tail7.data.o,ov_SC02_028_jr_8013F350.o,tail8.data.o,ov_SC02_028_jr_8013FFD8.o,tail9.data.o,ov_SC02_028_jr_80140608.o,tail10.data.o,ov_SC02_028_jr_8015444C.o,tail11.data.o,ov_SC02_028_jr_80154C24.o,ov_SC02_028_jr_801588CC.o,tail12.data.o,ov_SC02_028_jr_80159C84.o,tail13.data.o,ov_SC02_028_jr_8015A3C8.o,tail14.data.o,ov_SC02_028_jr_8015AE2C.o,tail15.data.o,ov_SC02_028_jr_8015C32C.o,tail16.data.o,ov_SC02_028_jr_8016AB6C.o,tail17.data.o,ov_SC02_028_jr_801734BC.o,tail18.data.o,ov_SC02_028_jr_80178D40.o,tail19.data.o,ov_SC02_028_jr_8017A4AC.o,tail20.data.o,ov_SC02_028_jr_8017AE2C.o,ov_SC02_028_jr_8017D898.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC02_028/ov_SC02_028_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC02_028/ov_SC02_028_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_028/ov_SC02_028_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -885,7 +885,7 @@ ov_SC02_031_ELF := $(ov_SC02_031_OUT).elf ov_SC02_031_MAPFILE := $(ov_SC02_031_OUT).map ov_SC02_031_LD_SCRIPT := $(ov_SC02_031_OUT).ld ov_SC02_031_SPLAT_YAML := config/splat.ov_SC02_031.yaml -ov_SC02_031_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_031_jr_8012ACE0.o,tail2.data.o,ov_SC02_031_jr_80135888.o,tail3.data.o,ov_SC02_031_jr_80135A4C.o,tail4.data.o,ov_SC02_031_jr_80135D20.o,tail5.data.o,ov_SC02_031_jr_801380E0.o,tail6.data.o,ov_SC02_031_jr_8013F350.o,tail7.data.o,ov_SC02_031_jr_8013FFD8.o,tail8.data.o,ov_SC02_031_jr_80140608.o,tail9.data.o,ov_SC02_031_jr_8015444C.o,tail10.data.o,ov_SC02_031_jr_80154C24.o,ov_SC02_031_jr_801588CC.o,tail11.data.o,ov_SC02_031_jr_80159C84.o,tail12.data.o,ov_SC02_031_jr_8015A3C8.o,tail13.data.o,ov_SC02_031_jr_8015AE2C.o,tail14.data.o,ov_SC02_031_jr_8015C32C.o,tail15.data.o,ov_SC02_031_jr_8016AB6C.o,tail16.data.o,ov_SC02_031_jr_801734BC.o,tail17.data.o,ov_SC02_031_jr_80178D40.o,tail18.data.o,ov_SC02_031_jr_8017A4AC.o,tail19.data.o,ov_SC02_031_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC02_031_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_031.o,tail2.data.o,ov_SC02_031_jr_8012ACE0.o,tail3.data.o,ov_SC02_031_jr_80135888.o,tail4.data.o,ov_SC02_031_jr_80135A4C.o,tail5.data.o,ov_SC02_031_jr_80135D20.o,tail6.data.o,ov_SC02_031_jr_801380E0.o,tail7.data.o,ov_SC02_031_jr_8013F350.o,tail8.data.o,ov_SC02_031_jr_8013FFD8.o,tail9.data.o,ov_SC02_031_jr_80140608.o,tail10.data.o,ov_SC02_031_jr_8015444C.o,tail11.data.o,ov_SC02_031_jr_80154C24.o,ov_SC02_031_jr_801588CC.o,tail12.data.o,ov_SC02_031_jr_80159C84.o,tail13.data.o,ov_SC02_031_jr_8015A3C8.o,tail14.data.o,ov_SC02_031_jr_8015AE2C.o,tail15.data.o,ov_SC02_031_jr_8015C32C.o,tail16.data.o,ov_SC02_031_jr_8016AB6C.o,tail17.data.o,ov_SC02_031_jr_801734BC.o,tail18.data.o,ov_SC02_031_jr_80178D40.o,tail19.data.o,ov_SC02_031_jr_8017A4AC.o,tail20.data.o,ov_SC02_031_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC02_031/ov_SC02_031_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC02_031/ov_SC02_031_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_031/ov_SC02_031_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -912,7 +912,7 @@ ov_SC02_035_ELF := $(ov_SC02_035_OUT).elf ov_SC02_035_MAPFILE := $(ov_SC02_035_OUT).map ov_SC02_035_LD_SCRIPT := $(ov_SC02_035_OUT).ld ov_SC02_035_SPLAT_YAML := config/splat.ov_SC02_035.yaml -ov_SC02_035_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_035_jr_8012ACE0.o,tail2.data.o,ov_SC02_035_jr_80135888.o,tail3.data.o,ov_SC02_035_jr_80135A4C.o,tail4.data.o,ov_SC02_035_jr_80135D20.o,tail5.data.o,ov_SC02_035_jr_801380E0.o,tail6.data.o,ov_SC02_035_jr_8013F350.o,tail7.data.o,ov_SC02_035_jr_8013FFD8.o,tail8.data.o,ov_SC02_035_jr_80140608.o,tail9.data.o,ov_SC02_035_jr_8015444C.o,tail10.data.o,ov_SC02_035_jr_80154C24.o,ov_SC02_035_jr_801588CC.o,tail11.data.o,ov_SC02_035_jr_80159C84.o,tail12.data.o,ov_SC02_035_jr_8015A3C8.o,tail13.data.o,ov_SC02_035_jr_8015AE2C.o,tail14.data.o,ov_SC02_035_jr_8015C32C.o,tail15.data.o,ov_SC02_035_jr_8016AB6C.o,tail16.data.o,ov_SC02_035_jr_801734BC.o,tail17.data.o,ov_SC02_035_jr_80178D40.o,tail18.data.o,ov_SC02_035_jr_8017A4AC.o,tail19.data.o,ov_SC02_035_jr_8017AE2C.o,ov_SC02_035_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC02_035_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_035.o,tail2.data.o,ov_SC02_035_jr_8012ACE0.o,tail3.data.o,ov_SC02_035_jr_80135888.o,tail4.data.o,ov_SC02_035_jr_80135A4C.o,tail5.data.o,ov_SC02_035_jr_80135D20.o,tail6.data.o,ov_SC02_035_jr_801380E0.o,tail7.data.o,ov_SC02_035_jr_8013F350.o,tail8.data.o,ov_SC02_035_jr_8013FFD8.o,tail9.data.o,ov_SC02_035_jr_80140608.o,tail10.data.o,ov_SC02_035_jr_8015444C.o,tail11.data.o,ov_SC02_035_jr_80154C24.o,ov_SC02_035_jr_801588CC.o,tail12.data.o,ov_SC02_035_jr_80159C84.o,tail13.data.o,ov_SC02_035_jr_8015A3C8.o,tail14.data.o,ov_SC02_035_jr_8015AE2C.o,tail15.data.o,ov_SC02_035_jr_8015C32C.o,tail16.data.o,ov_SC02_035_jr_8016AB6C.o,tail17.data.o,ov_SC02_035_jr_801734BC.o,tail18.data.o,ov_SC02_035_jr_80178D40.o,tail19.data.o,ov_SC02_035_jr_8017A4AC.o,tail20.data.o,ov_SC02_035_jr_8017AE2C.o,ov_SC02_035_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC02_035/ov_SC02_035_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC02_035/ov_SC02_035_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_035/ov_SC02_035_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -939,7 +939,7 @@ ov_SC02_039_ELF := $(ov_SC02_039_OUT).elf ov_SC02_039_MAPFILE := $(ov_SC02_039_OUT).map ov_SC02_039_LD_SCRIPT := $(ov_SC02_039_OUT).ld ov_SC02_039_SPLAT_YAML := config/splat.ov_SC02_039.yaml -ov_SC02_039_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_039_jr_8012ACE0.o,tail2.data.o,ov_SC02_039_jr_80135888.o,tail3.data.o,ov_SC02_039_jr_80135A4C.o,tail4.data.o,ov_SC02_039_jr_80135D20.o,tail5.data.o,ov_SC02_039_jr_801380E0.o,tail6.data.o,ov_SC02_039_jr_8013F350.o,tail7.data.o,ov_SC02_039_jr_8013FFD8.o,tail8.data.o,ov_SC02_039_jr_80140608.o,tail9.data.o,ov_SC02_039_jr_8015444C.o,tail10.data.o,ov_SC02_039_jr_80154C24.o,ov_SC02_039_jr_801588CC.o,tail11.data.o,ov_SC02_039_jr_80159C84.o,tail12.data.o,ov_SC02_039_jr_8015A3C8.o,tail13.data.o,ov_SC02_039_jr_8015AE2C.o,tail14.data.o,ov_SC02_039_jr_8015C32C.o,tail15.data.o,ov_SC02_039_jr_8016AB6C.o,tail16.data.o,ov_SC02_039_jr_801734BC.o,tail17.data.o,ov_SC02_039_jr_80178D40.o,tail18.data.o,ov_SC02_039_jr_8017A4AC.o,tail19.data.o,ov_SC02_039_jr_8017AE2C.o,ov_SC02_039_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC02_039_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_039.o,tail2.data.o,ov_SC02_039_jr_8012ACE0.o,tail3.data.o,ov_SC02_039_jr_80135888.o,tail4.data.o,ov_SC02_039_jr_80135A4C.o,tail5.data.o,ov_SC02_039_jr_80135D20.o,tail6.data.o,ov_SC02_039_jr_801380E0.o,tail7.data.o,ov_SC02_039_jr_8013F350.o,tail8.data.o,ov_SC02_039_jr_8013FFD8.o,tail9.data.o,ov_SC02_039_jr_80140608.o,tail10.data.o,ov_SC02_039_jr_8015444C.o,tail11.data.o,ov_SC02_039_jr_80154C24.o,ov_SC02_039_jr_801588CC.o,tail12.data.o,ov_SC02_039_jr_80159C84.o,tail13.data.o,ov_SC02_039_jr_8015A3C8.o,tail14.data.o,ov_SC02_039_jr_8015AE2C.o,tail15.data.o,ov_SC02_039_jr_8015C32C.o,tail16.data.o,ov_SC02_039_jr_8016AB6C.o,tail17.data.o,ov_SC02_039_jr_801734BC.o,tail18.data.o,ov_SC02_039_jr_80178D40.o,tail19.data.o,ov_SC02_039_jr_8017A4AC.o,tail20.data.o,ov_SC02_039_jr_8017AE2C.o,ov_SC02_039_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC02_039/ov_SC02_039_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC02_039/ov_SC02_039_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_039/ov_SC02_039_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -966,7 +966,7 @@ ov_SC02_041_ELF := $(ov_SC02_041_OUT).elf ov_SC02_041_MAPFILE := $(ov_SC02_041_OUT).map ov_SC02_041_LD_SCRIPT := $(ov_SC02_041_OUT).ld ov_SC02_041_SPLAT_YAML := config/splat.ov_SC02_041.yaml -ov_SC02_041_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_041_jr_8012ACE0.o,tail2.data.o,ov_SC02_041_jr_80135888.o,tail3.data.o,ov_SC02_041_jr_80135A4C.o,tail4.data.o,ov_SC02_041_jr_80135D20.o,tail5.data.o,ov_SC02_041_jr_801380E0.o,tail6.data.o,ov_SC02_041_jr_8013F350.o,tail7.data.o,ov_SC02_041_jr_8013FFD8.o,tail8.data.o,ov_SC02_041_jr_80140608.o,tail9.data.o,ov_SC02_041_jr_8015444C.o,tail10.data.o,ov_SC02_041_jr_80154C24.o,ov_SC02_041_jr_801588CC.o,tail11.data.o,ov_SC02_041_jr_80159C84.o,tail12.data.o,ov_SC02_041_jr_8015A3C8.o,tail13.data.o,ov_SC02_041_jr_8015AE2C.o,tail14.data.o,ov_SC02_041_jr_8015C32C.o,tail15.data.o,ov_SC02_041_jr_8016AB6C.o,tail16.data.o,ov_SC02_041_jr_801734BC.o,tail17.data.o,ov_SC02_041_jr_80178D40.o,tail18.data.o,ov_SC02_041_jr_8017A4AC.o,tail19.data.o,ov_SC02_041_jr_8017AE2C.o,ov_SC02_041_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC02_041_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_041.o,tail2.data.o,ov_SC02_041_jr_8012ACE0.o,tail3.data.o,ov_SC02_041_jr_80135888.o,tail4.data.o,ov_SC02_041_jr_80135A4C.o,tail5.data.o,ov_SC02_041_jr_80135D20.o,tail6.data.o,ov_SC02_041_jr_801380E0.o,tail7.data.o,ov_SC02_041_jr_8013F350.o,tail8.data.o,ov_SC02_041_jr_8013FFD8.o,tail9.data.o,ov_SC02_041_jr_80140608.o,tail10.data.o,ov_SC02_041_jr_8015444C.o,tail11.data.o,ov_SC02_041_jr_80154C24.o,ov_SC02_041_jr_801588CC.o,tail12.data.o,ov_SC02_041_jr_80159C84.o,tail13.data.o,ov_SC02_041_jr_8015A3C8.o,tail14.data.o,ov_SC02_041_jr_8015AE2C.o,tail15.data.o,ov_SC02_041_jr_8015C32C.o,tail16.data.o,ov_SC02_041_jr_8016AB6C.o,tail17.data.o,ov_SC02_041_jr_801734BC.o,tail18.data.o,ov_SC02_041_jr_80178D40.o,tail19.data.o,ov_SC02_041_jr_8017A4AC.o,tail20.data.o,ov_SC02_041_jr_8017AE2C.o,ov_SC02_041_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC02_041/ov_SC02_041_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC02_041/ov_SC02_041_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_041/ov_SC02_041_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -993,7 +993,7 @@ ov_SC03_003_ELF := $(ov_SC03_003_OUT).elf ov_SC03_003_MAPFILE := $(ov_SC03_003_OUT).map ov_SC03_003_LD_SCRIPT := $(ov_SC03_003_OUT).ld ov_SC03_003_SPLAT_YAML := config/splat.ov_SC03_003.yaml -ov_SC03_003_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_003_jr_8012ACE0.o,tail2.data.o,ov_SC03_003_jr_80135888.o,tail3.data.o,ov_SC03_003_jr_80135A4C.o,tail4.data.o,ov_SC03_003_jr_80135D20.o,tail5.data.o,ov_SC03_003_jr_801380E0.o,tail6.data.o,ov_SC03_003_jr_8013F350.o,tail7.data.o,ov_SC03_003_jr_8013FFD8.o,tail8.data.o,ov_SC03_003_jr_80140608.o,tail9.data.o,ov_SC03_003_jr_8015444C.o,tail10.data.o,ov_SC03_003_jr_80154C24.o,ov_SC03_003_jr_801588CC.o,tail11.data.o,ov_SC03_003_jr_80159C84.o,tail12.data.o,ov_SC03_003_jr_8015A3C8.o,tail13.data.o,ov_SC03_003_jr_8015AE2C.o,tail14.data.o,ov_SC03_003_jr_8015C32C.o,tail15.data.o,ov_SC03_003_jr_8016AB6C.o,tail16.data.o,ov_SC03_003_jr_801734BC.o,tail17.data.o,ov_SC03_003_jr_80178D40.o,tail18.data.o,ov_SC03_003_jr_8017A4AC.o,tail19.data.o,ov_SC03_003_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_003_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_003.o,tail2.data.o,ov_SC03_003_jr_8012ACE0.o,tail3.data.o,ov_SC03_003_jr_80135888.o,tail4.data.o,ov_SC03_003_jr_80135A4C.o,tail5.data.o,ov_SC03_003_jr_80135D20.o,tail6.data.o,ov_SC03_003_jr_801380E0.o,tail7.data.o,ov_SC03_003_jr_8013F350.o,tail8.data.o,ov_SC03_003_jr_8013FFD8.o,tail9.data.o,ov_SC03_003_jr_80140608.o,tail10.data.o,ov_SC03_003_jr_8015444C.o,tail11.data.o,ov_SC03_003_jr_80154C24.o,ov_SC03_003_jr_801588CC.o,tail12.data.o,ov_SC03_003_jr_80159C84.o,tail13.data.o,ov_SC03_003_jr_8015A3C8.o,tail14.data.o,ov_SC03_003_jr_8015AE2C.o,tail15.data.o,ov_SC03_003_jr_8015C32C.o,tail16.data.o,ov_SC03_003_jr_8016AB6C.o,tail17.data.o,ov_SC03_003_jr_801734BC.o,tail18.data.o,ov_SC03_003_jr_80178D40.o,tail19.data.o,ov_SC03_003_jr_8017A4AC.o,tail20.data.o,ov_SC03_003_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_003/ov_SC03_003_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_003/ov_SC03_003_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_003/ov_SC03_003_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1020,7 +1020,7 @@ ov_SC03_007_ELF := $(ov_SC03_007_OUT).elf ov_SC03_007_MAPFILE := $(ov_SC03_007_OUT).map ov_SC03_007_LD_SCRIPT := $(ov_SC03_007_OUT).ld ov_SC03_007_SPLAT_YAML := config/splat.ov_SC03_007.yaml -ov_SC03_007_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_007_jr_8012ACE0.o,tail2.data.o,ov_SC03_007_jr_80135888.o,tail3.data.o,ov_SC03_007_jr_80135A4C.o,tail4.data.o,ov_SC03_007_jr_80135D20.o,tail5.data.o,ov_SC03_007_jr_801380E0.o,tail6.data.o,ov_SC03_007_jr_8013F350.o,tail7.data.o,ov_SC03_007_jr_8013FFD8.o,tail8.data.o,ov_SC03_007_jr_80140608.o,tail9.data.o,ov_SC03_007_jr_8015444C.o,tail10.data.o,ov_SC03_007_jr_80154C24.o,ov_SC03_007_jr_801588CC.o,tail11.data.o,ov_SC03_007_jr_80159C84.o,tail12.data.o,ov_SC03_007_jr_8015A3C8.o,tail13.data.o,ov_SC03_007_jr_8015AE2C.o,tail14.data.o,ov_SC03_007_jr_8015C32C.o,tail15.data.o,ov_SC03_007_jr_8016AB6C.o,tail16.data.o,ov_SC03_007_jr_801734BC.o,tail17.data.o,ov_SC03_007_jr_80178D40.o,tail18.data.o,ov_SC03_007_jr_8017A4AC.o,tail19.data.o,ov_SC03_007_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_007_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_007.o,tail2.data.o,ov_SC03_007_jr_8012ACE0.o,tail3.data.o,ov_SC03_007_jr_80135888.o,tail4.data.o,ov_SC03_007_jr_80135A4C.o,tail5.data.o,ov_SC03_007_jr_80135D20.o,tail6.data.o,ov_SC03_007_jr_801380E0.o,tail7.data.o,ov_SC03_007_jr_8013F350.o,tail8.data.o,ov_SC03_007_jr_8013FFD8.o,tail9.data.o,ov_SC03_007_jr_80140608.o,tail10.data.o,ov_SC03_007_jr_8015444C.o,tail11.data.o,ov_SC03_007_jr_80154C24.o,ov_SC03_007_jr_801588CC.o,tail12.data.o,ov_SC03_007_jr_80159C84.o,tail13.data.o,ov_SC03_007_jr_8015A3C8.o,tail14.data.o,ov_SC03_007_jr_8015AE2C.o,tail15.data.o,ov_SC03_007_jr_8015C32C.o,tail16.data.o,ov_SC03_007_jr_8016AB6C.o,tail17.data.o,ov_SC03_007_jr_801734BC.o,tail18.data.o,ov_SC03_007_jr_80178D40.o,tail19.data.o,ov_SC03_007_jr_8017A4AC.o,tail20.data.o,ov_SC03_007_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_007/ov_SC03_007_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_007/ov_SC03_007_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_007/ov_SC03_007_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1047,7 +1047,7 @@ ov_SC03_010_ELF := $(ov_SC03_010_OUT).elf ov_SC03_010_MAPFILE := $(ov_SC03_010_OUT).map ov_SC03_010_LD_SCRIPT := $(ov_SC03_010_OUT).ld ov_SC03_010_SPLAT_YAML := config/splat.ov_SC03_010.yaml -ov_SC03_010_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_010_jr_8012ACE0.o,tail2.data.o,ov_SC03_010_jr_80135888.o,tail3.data.o,ov_SC03_010_jr_80135A4C.o,tail4.data.o,ov_SC03_010_jr_80135D20.o,tail5.data.o,ov_SC03_010_jr_801380E0.o,tail6.data.o,ov_SC03_010_jr_8013F350.o,tail7.data.o,ov_SC03_010_jr_8013FFD8.o,tail8.data.o,ov_SC03_010_jr_80140608.o,tail9.data.o,ov_SC03_010_jr_8015444C.o,tail10.data.o,ov_SC03_010_jr_80154C24.o,ov_SC03_010_jr_801588CC.o,tail11.data.o,ov_SC03_010_jr_80159C84.o,tail12.data.o,ov_SC03_010_jr_8015A3C8.o,tail13.data.o,ov_SC03_010_jr_8015AE2C.o,tail14.data.o,ov_SC03_010_jr_8015C32C.o,tail15.data.o,ov_SC03_010_jr_8016AB6C.o,tail16.data.o,ov_SC03_010_jr_801734BC.o,tail17.data.o,ov_SC03_010_jr_80178D40.o,tail18.data.o,ov_SC03_010_jr_8017A4AC.o,tail19.data.o,ov_SC03_010_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_010_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_010.o,tail2.data.o,ov_SC03_010_jr_8012ACE0.o,tail3.data.o,ov_SC03_010_jr_80135888.o,tail4.data.o,ov_SC03_010_jr_80135A4C.o,tail5.data.o,ov_SC03_010_jr_80135D20.o,tail6.data.o,ov_SC03_010_jr_801380E0.o,tail7.data.o,ov_SC03_010_jr_8013F350.o,tail8.data.o,ov_SC03_010_jr_8013FFD8.o,tail9.data.o,ov_SC03_010_jr_80140608.o,tail10.data.o,ov_SC03_010_jr_8015444C.o,tail11.data.o,ov_SC03_010_jr_80154C24.o,ov_SC03_010_jr_801588CC.o,tail12.data.o,ov_SC03_010_jr_80159C84.o,tail13.data.o,ov_SC03_010_jr_8015A3C8.o,tail14.data.o,ov_SC03_010_jr_8015AE2C.o,tail15.data.o,ov_SC03_010_jr_8015C32C.o,tail16.data.o,ov_SC03_010_jr_8016AB6C.o,tail17.data.o,ov_SC03_010_jr_801734BC.o,tail18.data.o,ov_SC03_010_jr_80178D40.o,tail19.data.o,ov_SC03_010_jr_8017A4AC.o,tail20.data.o,ov_SC03_010_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_010/ov_SC03_010_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_010/ov_SC03_010_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_010/ov_SC03_010_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1074,7 +1074,7 @@ ov_SC03_011_ELF := $(ov_SC03_011_OUT).elf ov_SC03_011_MAPFILE := $(ov_SC03_011_OUT).map ov_SC03_011_LD_SCRIPT := $(ov_SC03_011_OUT).ld ov_SC03_011_SPLAT_YAML := config/splat.ov_SC03_011.yaml -ov_SC03_011_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_011_jr_8012ACE0.o,tail2.data.o,ov_SC03_011_jr_80135888.o,tail3.data.o,ov_SC03_011_jr_80135A4C.o,tail4.data.o,ov_SC03_011_jr_80135D20.o,tail5.data.o,ov_SC03_011_jr_801380E0.o,tail6.data.o,ov_SC03_011_jr_8013F350.o,tail7.data.o,ov_SC03_011_jr_80140608.o,tail8.data.o,ov_SC03_011_jr_8015444C.o,tail9.data.o,ov_SC03_011_jr_80154C24.o,ov_SC03_011_jr_801588CC.o,tail10.data.o,ov_SC03_011_jr_80159C84.o,tail11.data.o,ov_SC03_011_jr_8015A3C8.o,tail12.data.o,ov_SC03_011_jr_8015AE2C.o,tail13.data.o,ov_SC03_011_jr_8015C32C.o,tail14.data.o,ov_SC03_011_jr_8016AB6C.o,tail15.data.o,ov_SC03_011_jr_801734BC.o,tail16.data.o,ov_SC03_011_jr_80178D40.o,tail17.data.o,ov_SC03_011_jr_8017A4AC.o,tail18.data.o,ov_SC03_011_jr_8017AE2C.o,ov_SC03_011_jr_8017C730.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_011_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_011.o,tail2.data.o,ov_SC03_011_jr_8012ACE0.o,tail3.data.o,ov_SC03_011_jr_80135888.o,tail4.data.o,ov_SC03_011_jr_80135A4C.o,tail5.data.o,ov_SC03_011_jr_80135D20.o,tail6.data.o,ov_SC03_011_jr_801380E0.o,tail7.data.o,ov_SC03_011_jr_8013F350.o,tail8.data.o,ov_SC03_011_jr_80140608.o,tail9.data.o,ov_SC03_011_jr_8015444C.o,tail10.data.o,ov_SC03_011_jr_80154C24.o,ov_SC03_011_jr_801588CC.o,tail11.data.o,ov_SC03_011_jr_80159C84.o,tail12.data.o,ov_SC03_011_jr_8015A3C8.o,tail13.data.o,ov_SC03_011_jr_8015AE2C.o,tail14.data.o,ov_SC03_011_jr_8015C32C.o,tail15.data.o,ov_SC03_011_jr_8016AB6C.o,tail16.data.o,ov_SC03_011_jr_801734BC.o,tail17.data.o,ov_SC03_011_jr_80178D40.o,tail18.data.o,ov_SC03_011_jr_8017A4AC.o,tail19.data.o,ov_SC03_011_jr_8017AE2C.o,ov_SC03_011_jr_8017C730.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_011/ov_SC03_011_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_011/ov_SC03_011_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_011/ov_SC03_011_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1101,7 +1101,7 @@ ov_SC03_012_ELF := $(ov_SC03_012_OUT).elf ov_SC03_012_MAPFILE := $(ov_SC03_012_OUT).map ov_SC03_012_LD_SCRIPT := $(ov_SC03_012_OUT).ld ov_SC03_012_SPLAT_YAML := config/splat.ov_SC03_012.yaml -ov_SC03_012_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_012_jr_8012ACE0.o,tail2.data.o,ov_SC03_012_jr_80135888.o,tail3.data.o,ov_SC03_012_jr_80135A4C.o,tail4.data.o,ov_SC03_012_jr_80135D20.o,tail5.data.o,ov_SC03_012_jr_801380E0.o,tail6.data.o,ov_SC03_012_jr_8013F350.o,tail7.data.o,ov_SC03_012_jr_8013FFD8.o,tail8.data.o,ov_SC03_012_jr_80140608.o,tail9.data.o,ov_SC03_012_jr_8015444C.o,tail10.data.o,ov_SC03_012_jr_80154C24.o,ov_SC03_012_jr_801588CC.o,tail11.data.o,ov_SC03_012_jr_80159C84.o,tail12.data.o,ov_SC03_012_jr_8015A3C8.o,tail13.data.o,ov_SC03_012_jr_8015AE2C.o,tail14.data.o,ov_SC03_012_jr_8015C32C.o,tail15.data.o,ov_SC03_012_jr_8016AB6C.o,tail16.data.o,ov_SC03_012_jr_801734BC.o,tail17.data.o,ov_SC03_012_jr_80178D40.o,tail18.data.o,ov_SC03_012_jr_8017A4AC.o,tail19.data.o,ov_SC03_012_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_012_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_012.o,tail2.data.o,ov_SC03_012_jr_8012ACE0.o,tail3.data.o,ov_SC03_012_jr_80135888.o,tail4.data.o,ov_SC03_012_jr_80135A4C.o,tail5.data.o,ov_SC03_012_jr_80135D20.o,tail6.data.o,ov_SC03_012_jr_801380E0.o,tail7.data.o,ov_SC03_012_jr_8013F350.o,tail8.data.o,ov_SC03_012_jr_8013FFD8.o,tail9.data.o,ov_SC03_012_jr_80140608.o,tail10.data.o,ov_SC03_012_jr_8015444C.o,tail11.data.o,ov_SC03_012_jr_80154C24.o,ov_SC03_012_jr_801588CC.o,tail12.data.o,ov_SC03_012_jr_80159C84.o,tail13.data.o,ov_SC03_012_jr_8015A3C8.o,tail14.data.o,ov_SC03_012_jr_8015AE2C.o,tail15.data.o,ov_SC03_012_jr_8015C32C.o,tail16.data.o,ov_SC03_012_jr_8016AB6C.o,tail17.data.o,ov_SC03_012_jr_801734BC.o,tail18.data.o,ov_SC03_012_jr_80178D40.o,tail19.data.o,ov_SC03_012_jr_8017A4AC.o,tail20.data.o,ov_SC03_012_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_012/ov_SC03_012_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_012/ov_SC03_012_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_012/ov_SC03_012_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1128,7 +1128,7 @@ ov_SC03_013_ELF := $(ov_SC03_013_OUT).elf ov_SC03_013_MAPFILE := $(ov_SC03_013_OUT).map ov_SC03_013_LD_SCRIPT := $(ov_SC03_013_OUT).ld ov_SC03_013_SPLAT_YAML := config/splat.ov_SC03_013.yaml -ov_SC03_013_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_013_jr_8012ACE0.o,tail2.data.o,ov_SC03_013_jr_80135888.o,tail3.data.o,ov_SC03_013_jr_80135A4C.o,tail4.data.o,ov_SC03_013_jr_80135D20.o,tail5.data.o,ov_SC03_013_jr_801380E0.o,tail6.data.o,ov_SC03_013_jr_8013F350.o,tail7.data.o,ov_SC03_013_jr_8013FFD8.o,tail8.data.o,ov_SC03_013_jr_80140608.o,tail9.data.o,ov_SC03_013_jr_8015444C.o,tail10.data.o,ov_SC03_013_jr_80154C24.o,ov_SC03_013_jr_801588CC.o,tail11.data.o,ov_SC03_013_jr_80159C84.o,tail12.data.o,ov_SC03_013_jr_8015A3C8.o,tail13.data.o,ov_SC03_013_jr_8015AE2C.o,tail14.data.o,ov_SC03_013_jr_8015C32C.o,tail15.data.o,ov_SC03_013_jr_8016AB6C.o,tail16.data.o,ov_SC03_013_jr_801734BC.o,tail17.data.o,ov_SC03_013_jr_80178D40.o,tail18.data.o,ov_SC03_013_jr_8017A4AC.o,tail19.data.o,ov_SC03_013_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_013_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_013.o,tail2.data.o,ov_SC03_013_jr_8012ACE0.o,tail3.data.o,ov_SC03_013_jr_80135888.o,tail4.data.o,ov_SC03_013_jr_80135A4C.o,tail5.data.o,ov_SC03_013_jr_80135D20.o,tail6.data.o,ov_SC03_013_jr_801380E0.o,tail7.data.o,ov_SC03_013_jr_8013F350.o,tail8.data.o,ov_SC03_013_jr_8013FFD8.o,tail9.data.o,ov_SC03_013_jr_80140608.o,tail10.data.o,ov_SC03_013_jr_8015444C.o,tail11.data.o,ov_SC03_013_jr_80154C24.o,ov_SC03_013_jr_801588CC.o,tail12.data.o,ov_SC03_013_jr_80159C84.o,tail13.data.o,ov_SC03_013_jr_8015A3C8.o,tail14.data.o,ov_SC03_013_jr_8015AE2C.o,tail15.data.o,ov_SC03_013_jr_8015C32C.o,tail16.data.o,ov_SC03_013_jr_8016AB6C.o,tail17.data.o,ov_SC03_013_jr_801734BC.o,tail18.data.o,ov_SC03_013_jr_80178D40.o,tail19.data.o,ov_SC03_013_jr_8017A4AC.o,tail20.data.o,ov_SC03_013_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_013/ov_SC03_013_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_013/ov_SC03_013_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_013/ov_SC03_013_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1155,7 +1155,7 @@ ov_SC03_014_ELF := $(ov_SC03_014_OUT).elf ov_SC03_014_MAPFILE := $(ov_SC03_014_OUT).map ov_SC03_014_LD_SCRIPT := $(ov_SC03_014_OUT).ld ov_SC03_014_SPLAT_YAML := config/splat.ov_SC03_014.yaml -ov_SC03_014_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_014_jr_8012ACE0.o,tail2.data.o,ov_SC03_014_jr_80135888.o,tail3.data.o,ov_SC03_014_jr_80135A4C.o,tail4.data.o,ov_SC03_014_jr_80135D20.o,tail5.data.o,ov_SC03_014_jr_801380E0.o,tail6.data.o,ov_SC03_014_jr_8013F350.o,tail7.data.o,ov_SC03_014_jr_8013FFD8.o,tail8.data.o,ov_SC03_014_jr_80140608.o,tail9.data.o,ov_SC03_014_jr_8015444C.o,tail10.data.o,ov_SC03_014_jr_80154C24.o,ov_SC03_014_jr_801588CC.o,tail11.data.o,ov_SC03_014_jr_80159C84.o,tail12.data.o,ov_SC03_014_jr_8015A3C8.o,tail13.data.o,ov_SC03_014_jr_8015AE2C.o,tail14.data.o,ov_SC03_014_jr_8015C32C.o,tail15.data.o,ov_SC03_014_jr_8016AB6C.o,tail16.data.o,ov_SC03_014_jr_801734BC.o,tail17.data.o,ov_SC03_014_jr_80178D40.o,tail18.data.o,ov_SC03_014_jr_8017A4AC.o,tail19.data.o,ov_SC03_014_jr_8017AE2C.o,tail20.data.o,ov_SC03_014_jr_8017EB7C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_014_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_014.o,tail2.data.o,ov_SC03_014_jr_8012ACE0.o,tail3.data.o,ov_SC03_014_jr_80135888.o,tail4.data.o,ov_SC03_014_jr_80135A4C.o,tail5.data.o,ov_SC03_014_jr_80135D20.o,tail6.data.o,ov_SC03_014_jr_801380E0.o,tail7.data.o,ov_SC03_014_jr_8013F350.o,tail8.data.o,ov_SC03_014_jr_8013FFD8.o,tail9.data.o,ov_SC03_014_jr_80140608.o,tail10.data.o,ov_SC03_014_jr_8015444C.o,tail11.data.o,ov_SC03_014_jr_80154C24.o,ov_SC03_014_jr_801588CC.o,tail12.data.o,ov_SC03_014_jr_80159C84.o,tail13.data.o,ov_SC03_014_jr_8015A3C8.o,tail14.data.o,ov_SC03_014_jr_8015AE2C.o,tail15.data.o,ov_SC03_014_jr_8015C32C.o,tail16.data.o,ov_SC03_014_jr_8016AB6C.o,tail17.data.o,ov_SC03_014_jr_801734BC.o,tail18.data.o,ov_SC03_014_jr_80178D40.o,tail19.data.o,ov_SC03_014_jr_8017A4AC.o,tail20.data.o,ov_SC03_014_jr_8017AE2C.o,tail21.data.o,ov_SC03_014_jr_8017EB7C.o,tail22.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1182,7 +1182,7 @@ ov_SC03_015_ELF := $(ov_SC03_015_OUT).elf ov_SC03_015_MAPFILE := $(ov_SC03_015_OUT).map ov_SC03_015_LD_SCRIPT := $(ov_SC03_015_OUT).ld ov_SC03_015_SPLAT_YAML := config/splat.ov_SC03_015.yaml -ov_SC03_015_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_015_jr_8012ACE0.o,tail2.data.o,ov_SC03_015_jr_80135888.o,tail3.data.o,ov_SC03_015_jr_80135A4C.o,tail4.data.o,ov_SC03_015_jr_80135D20.o,tail5.data.o,ov_SC03_015_jr_801380E0.o,tail6.data.o,ov_SC03_015_jr_8013F350.o,tail7.data.o,ov_SC03_015_jr_8013FFD8.o,tail8.data.o,ov_SC03_015_jr_80140608.o,tail9.data.o,ov_SC03_015_jr_8015444C.o,tail10.data.o,ov_SC03_015_jr_80154C24.o,ov_SC03_015_jr_801588CC.o,tail11.data.o,ov_SC03_015_jr_80159C84.o,tail12.data.o,ov_SC03_015_jr_8015A3C8.o,tail13.data.o,ov_SC03_015_jr_8015AE2C.o,tail14.data.o,ov_SC03_015_jr_8015C32C.o,tail15.data.o,ov_SC03_015_jr_8016AB6C.o,tail16.data.o,ov_SC03_015_jr_801734BC.o,tail17.data.o,ov_SC03_015_jr_80178D40.o,tail18.data.o,ov_SC03_015_jr_8017A4AC.o,tail19.data.o,ov_SC03_015_jr_8017AE2C.o,tail20.data.o,ov_SC03_015_jr_8017EB7C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_015_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_015.o,tail2.data.o,ov_SC03_015_jr_8012ACE0.o,tail3.data.o,ov_SC03_015_jr_80135888.o,tail4.data.o,ov_SC03_015_jr_80135A4C.o,tail5.data.o,ov_SC03_015_jr_80135D20.o,tail6.data.o,ov_SC03_015_jr_801380E0.o,tail7.data.o,ov_SC03_015_jr_8013F350.o,tail8.data.o,ov_SC03_015_jr_8013FFD8.o,tail9.data.o,ov_SC03_015_jr_80140608.o,tail10.data.o,ov_SC03_015_jr_8015444C.o,tail11.data.o,ov_SC03_015_jr_80154C24.o,ov_SC03_015_jr_801588CC.o,tail12.data.o,ov_SC03_015_jr_80159C84.o,tail13.data.o,ov_SC03_015_jr_8015A3C8.o,tail14.data.o,ov_SC03_015_jr_8015AE2C.o,tail15.data.o,ov_SC03_015_jr_8015C32C.o,tail16.data.o,ov_SC03_015_jr_8016AB6C.o,tail17.data.o,ov_SC03_015_jr_801734BC.o,tail18.data.o,ov_SC03_015_jr_80178D40.o,tail19.data.o,ov_SC03_015_jr_8017A4AC.o,tail20.data.o,ov_SC03_015_jr_8017AE2C.o,tail21.data.o,ov_SC03_015_jr_8017EB7C.o,tail22.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_015/ov_SC03_015_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1209,7 +1209,7 @@ ov_SC03_023_ELF := $(ov_SC03_023_OUT).elf ov_SC03_023_MAPFILE := $(ov_SC03_023_OUT).map ov_SC03_023_LD_SCRIPT := $(ov_SC03_023_OUT).ld ov_SC03_023_SPLAT_YAML := config/splat.ov_SC03_023.yaml -ov_SC03_023_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_023_jr_8012ACE0.o,tail2.data.o,ov_SC03_023_jr_80135888.o,tail3.data.o,ov_SC03_023_jr_80135A4C.o,tail4.data.o,ov_SC03_023_jr_80135D20.o,tail5.data.o,ov_SC03_023_jr_801380E0.o,tail6.data.o,ov_SC03_023_jr_8013F350.o,tail7.data.o,ov_SC03_023_jr_8013FFD8.o,tail8.data.o,ov_SC03_023_jr_80140608.o,tail9.data.o,ov_SC03_023_jr_8015444C.o,tail10.data.o,ov_SC03_023_jr_80154C24.o,ov_SC03_023_jr_801588CC.o,tail11.data.o,ov_SC03_023_jr_80159C84.o,tail12.data.o,ov_SC03_023_jr_8015A3C8.o,tail13.data.o,ov_SC03_023_jr_8015AE2C.o,tail14.data.o,ov_SC03_023_jr_8015C32C.o,tail15.data.o,ov_SC03_023_jr_8016AB6C.o,tail16.data.o,ov_SC03_023_jr_801734BC.o,tail17.data.o,ov_SC03_023_jr_80178D40.o,tail18.data.o,ov_SC03_023_jr_8017A4AC.o,tail19.data.o,ov_SC03_023_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_023_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_023.o,tail2.data.o,ov_SC03_023_jr_8012ACE0.o,tail3.data.o,ov_SC03_023_jr_80135888.o,tail4.data.o,ov_SC03_023_jr_80135A4C.o,tail5.data.o,ov_SC03_023_jr_80135D20.o,tail6.data.o,ov_SC03_023_jr_801380E0.o,tail7.data.o,ov_SC03_023_jr_8013F350.o,tail8.data.o,ov_SC03_023_jr_8013FFD8.o,tail9.data.o,ov_SC03_023_jr_80140608.o,tail10.data.o,ov_SC03_023_jr_8015444C.o,tail11.data.o,ov_SC03_023_jr_80154C24.o,ov_SC03_023_jr_801588CC.o,tail12.data.o,ov_SC03_023_jr_80159C84.o,tail13.data.o,ov_SC03_023_jr_8015A3C8.o,tail14.data.o,ov_SC03_023_jr_8015AE2C.o,tail15.data.o,ov_SC03_023_jr_8015C32C.o,tail16.data.o,ov_SC03_023_jr_8016AB6C.o,tail17.data.o,ov_SC03_023_jr_801734BC.o,tail18.data.o,ov_SC03_023_jr_80178D40.o,tail19.data.o,ov_SC03_023_jr_8017A4AC.o,tail20.data.o,ov_SC03_023_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_023/ov_SC03_023_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_023/ov_SC03_023_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_023/ov_SC03_023_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1236,7 +1236,7 @@ ov_SC03_024_ELF := $(ov_SC03_024_OUT).elf ov_SC03_024_MAPFILE := $(ov_SC03_024_OUT).map ov_SC03_024_LD_SCRIPT := $(ov_SC03_024_OUT).ld ov_SC03_024_SPLAT_YAML := config/splat.ov_SC03_024.yaml -ov_SC03_024_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_024_jr_8012ACE0.o,tail2.data.o,ov_SC03_024_jr_80135888.o,tail3.data.o,ov_SC03_024_jr_80135A4C.o,tail4.data.o,ov_SC03_024_jr_80135D20.o,tail5.data.o,ov_SC03_024_jr_801380E0.o,tail6.data.o,ov_SC03_024_jr_8013F350.o,tail7.data.o,ov_SC03_024_jr_8013FFD8.o,tail8.data.o,ov_SC03_024_jr_80140608.o,tail9.data.o,ov_SC03_024_jr_8015444C.o,tail10.data.o,ov_SC03_024_jr_80154C24.o,ov_SC03_024_jr_801588CC.o,tail11.data.o,ov_SC03_024_jr_80159C84.o,tail12.data.o,ov_SC03_024_jr_8015A3C8.o,tail13.data.o,ov_SC03_024_jr_8015AE2C.o,tail14.data.o,ov_SC03_024_jr_8015C32C.o,tail15.data.o,ov_SC03_024_jr_8016AB6C.o,tail16.data.o,ov_SC03_024_jr_801734BC.o,tail17.data.o,ov_SC03_024_jr_80178D40.o,tail18.data.o,ov_SC03_024_jr_8017A4AC.o,tail19.data.o,ov_SC03_024_jr_8017AE2C.o,tail20.data.o,ov_SC03_024_jr_8017DF84.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_024_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_024.o,tail2.data.o,ov_SC03_024_jr_8012ACE0.o,tail3.data.o,ov_SC03_024_jr_80135888.o,tail4.data.o,ov_SC03_024_jr_80135A4C.o,tail5.data.o,ov_SC03_024_jr_80135D20.o,tail6.data.o,ov_SC03_024_jr_801380E0.o,tail7.data.o,ov_SC03_024_jr_8013F350.o,tail8.data.o,ov_SC03_024_jr_8013FFD8.o,tail9.data.o,ov_SC03_024_jr_80140608.o,tail10.data.o,ov_SC03_024_jr_8015444C.o,tail11.data.o,ov_SC03_024_jr_80154C24.o,ov_SC03_024_jr_801588CC.o,tail12.data.o,ov_SC03_024_jr_80159C84.o,tail13.data.o,ov_SC03_024_jr_8015A3C8.o,tail14.data.o,ov_SC03_024_jr_8015AE2C.o,tail15.data.o,ov_SC03_024_jr_8015C32C.o,tail16.data.o,ov_SC03_024_jr_8016AB6C.o,tail17.data.o,ov_SC03_024_jr_801734BC.o,tail18.data.o,ov_SC03_024_jr_80178D40.o,tail19.data.o,ov_SC03_024_jr_8017A4AC.o,tail20.data.o,ov_SC03_024_jr_8017AE2C.o,tail21.data.o,ov_SC03_024_jr_8017DF84.o,tail22.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_024/ov_SC03_024_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_024/ov_SC03_024_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_024/ov_SC03_024_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1263,7 +1263,7 @@ ov_SC03_028_ELF := $(ov_SC03_028_OUT).elf ov_SC03_028_MAPFILE := $(ov_SC03_028_OUT).map ov_SC03_028_LD_SCRIPT := $(ov_SC03_028_OUT).ld ov_SC03_028_SPLAT_YAML := config/splat.ov_SC03_028.yaml -ov_SC03_028_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_028_jr_8012ACE0.o,tail2.data.o,ov_SC03_028_jr_80135888.o,tail3.data.o,ov_SC03_028_jr_80135A4C.o,tail4.data.o,ov_SC03_028_jr_80135D20.o,tail5.data.o,ov_SC03_028_jr_801380E0.o,tail6.data.o,ov_SC03_028_jr_8013F350.o,tail7.data.o,ov_SC03_028_jr_8013FFD8.o,tail8.data.o,ov_SC03_028_jr_80140608.o,tail9.data.o,ov_SC03_028_jr_8015444C.o,tail10.data.o,ov_SC03_028_jr_80154C24.o,ov_SC03_028_jr_801588CC.o,tail11.data.o,ov_SC03_028_jr_80159C84.o,tail12.data.o,ov_SC03_028_jr_8015A3C8.o,tail13.data.o,ov_SC03_028_jr_8015AE2C.o,tail14.data.o,ov_SC03_028_jr_8015C32C.o,tail15.data.o,ov_SC03_028_jr_8016AB6C.o,tail16.data.o,ov_SC03_028_jr_801734BC.o,tail17.data.o,ov_SC03_028_jr_80178D40.o,tail18.data.o,ov_SC03_028_jr_8017A4AC.o,tail19.data.o,ov_SC03_028_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_028_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_028.o,tail2.data.o,ov_SC03_028_jr_8012ACE0.o,tail3.data.o,ov_SC03_028_jr_80135888.o,tail4.data.o,ov_SC03_028_jr_80135A4C.o,tail5.data.o,ov_SC03_028_jr_80135D20.o,tail6.data.o,ov_SC03_028_jr_801380E0.o,tail7.data.o,ov_SC03_028_jr_8013F350.o,tail8.data.o,ov_SC03_028_jr_8013FFD8.o,tail9.data.o,ov_SC03_028_jr_80140608.o,tail10.data.o,ov_SC03_028_jr_8015444C.o,tail11.data.o,ov_SC03_028_jr_80154C24.o,ov_SC03_028_jr_801588CC.o,tail12.data.o,ov_SC03_028_jr_80159C84.o,tail13.data.o,ov_SC03_028_jr_8015A3C8.o,tail14.data.o,ov_SC03_028_jr_8015AE2C.o,tail15.data.o,ov_SC03_028_jr_8015C32C.o,tail16.data.o,ov_SC03_028_jr_8016AB6C.o,tail17.data.o,ov_SC03_028_jr_801734BC.o,tail18.data.o,ov_SC03_028_jr_80178D40.o,tail19.data.o,ov_SC03_028_jr_8017A4AC.o,tail20.data.o,ov_SC03_028_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_028/ov_SC03_028_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_028/ov_SC03_028_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_028/ov_SC03_028_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1290,7 +1290,7 @@ ov_SC03_029_ELF := $(ov_SC03_029_OUT).elf ov_SC03_029_MAPFILE := $(ov_SC03_029_OUT).map ov_SC03_029_LD_SCRIPT := $(ov_SC03_029_OUT).ld ov_SC03_029_SPLAT_YAML := config/splat.ov_SC03_029.yaml -ov_SC03_029_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_029_jr_8012ACE0.o,tail2.data.o,ov_SC03_029_jr_80135888.o,tail3.data.o,ov_SC03_029_jr_80135A4C.o,tail4.data.o,ov_SC03_029_jr_80135D20.o,tail5.data.o,ov_SC03_029_jr_801380E0.o,tail6.data.o,ov_SC03_029_jr_8013F350.o,tail7.data.o,ov_SC03_029_jr_8013FFD8.o,tail8.data.o,ov_SC03_029_jr_80140608.o,tail9.data.o,ov_SC03_029_jr_8015444C.o,tail10.data.o,ov_SC03_029_jr_80154C24.o,ov_SC03_029_jr_801588CC.o,tail11.data.o,ov_SC03_029_jr_80159C84.o,tail12.data.o,ov_SC03_029_jr_8015A3C8.o,tail13.data.o,ov_SC03_029_jr_8015AE2C.o,tail14.data.o,ov_SC03_029_jr_8015C32C.o,tail15.data.o,ov_SC03_029_jr_8016AB6C.o,tail16.data.o,ov_SC03_029_jr_801734BC.o,tail17.data.o,ov_SC03_029_jr_80178D40.o,tail18.data.o,ov_SC03_029_jr_8017A4AC.o,tail19.data.o,ov_SC03_029_jr_8017AE2C.o,ov_SC03_029_jr_8017DC70.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_029_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_029.o,tail2.data.o,ov_SC03_029_jr_8012ACE0.o,tail3.data.o,ov_SC03_029_jr_80135888.o,tail4.data.o,ov_SC03_029_jr_80135A4C.o,tail5.data.o,ov_SC03_029_jr_80135D20.o,tail6.data.o,ov_SC03_029_jr_801380E0.o,tail7.data.o,ov_SC03_029_jr_8013F350.o,tail8.data.o,ov_SC03_029_jr_8013FFD8.o,tail9.data.o,ov_SC03_029_jr_80140608.o,tail10.data.o,ov_SC03_029_jr_8015444C.o,tail11.data.o,ov_SC03_029_jr_80154C24.o,ov_SC03_029_jr_801588CC.o,tail12.data.o,ov_SC03_029_jr_80159C84.o,tail13.data.o,ov_SC03_029_jr_8015A3C8.o,tail14.data.o,ov_SC03_029_jr_8015AE2C.o,tail15.data.o,ov_SC03_029_jr_8015C32C.o,tail16.data.o,ov_SC03_029_jr_8016AB6C.o,tail17.data.o,ov_SC03_029_jr_801734BC.o,tail18.data.o,ov_SC03_029_jr_80178D40.o,tail19.data.o,ov_SC03_029_jr_8017A4AC.o,tail20.data.o,ov_SC03_029_jr_8017AE2C.o,ov_SC03_029_jr_8017DC70.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_029/ov_SC03_029_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_029/ov_SC03_029_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_029/ov_SC03_029_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1317,7 +1317,7 @@ ov_SC03_030_ELF := $(ov_SC03_030_OUT).elf ov_SC03_030_MAPFILE := $(ov_SC03_030_OUT).map ov_SC03_030_LD_SCRIPT := $(ov_SC03_030_OUT).ld ov_SC03_030_SPLAT_YAML := config/splat.ov_SC03_030.yaml -ov_SC03_030_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_030_jr_8012ACE0.o,tail2.data.o,ov_SC03_030_jr_80135888.o,tail3.data.o,ov_SC03_030_jr_80135A4C.o,tail4.data.o,ov_SC03_030_jr_80135D20.o,tail5.data.o,ov_SC03_030_jr_801380E0.o,tail6.data.o,ov_SC03_030_jr_8013F350.o,tail7.data.o,ov_SC03_030_jr_80140608.o,tail8.data.o,ov_SC03_030_jr_8015444C.o,tail9.data.o,ov_SC03_030_jr_80154C24.o,ov_SC03_030_jr_801588CC.o,tail10.data.o,ov_SC03_030_jr_80159C84.o,tail11.data.o,ov_SC03_030_jr_8015A3C8.o,tail12.data.o,ov_SC03_030_jr_8015AE2C.o,tail13.data.o,ov_SC03_030_jr_8015C32C.o,tail14.data.o,ov_SC03_030_jr_8016AB6C.o,tail15.data.o,ov_SC03_030_jr_801734BC.o,tail16.data.o,ov_SC03_030_jr_80178D40.o,tail17.data.o,ov_SC03_030_jr_8017A4AC.o,tail18.data.o,ov_SC03_030_jr_8017AE2C.o,tail19.data.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_030_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_030.o,tail2.data.o,ov_SC03_030_jr_8012ACE0.o,tail3.data.o,ov_SC03_030_jr_80135888.o,tail4.data.o,ov_SC03_030_jr_80135A4C.o,tail5.data.o,ov_SC03_030_jr_80135D20.o,tail6.data.o,ov_SC03_030_jr_801380E0.o,tail7.data.o,ov_SC03_030_jr_8013F350.o,tail8.data.o,ov_SC03_030_jr_80140608.o,tail9.data.o,ov_SC03_030_jr_8015444C.o,tail10.data.o,ov_SC03_030_jr_80154C24.o,ov_SC03_030_jr_801588CC.o,tail11.data.o,ov_SC03_030_jr_80159C84.o,tail12.data.o,ov_SC03_030_jr_8015A3C8.o,tail13.data.o,ov_SC03_030_jr_8015AE2C.o,tail14.data.o,ov_SC03_030_jr_8015C32C.o,tail15.data.o,ov_SC03_030_jr_8016AB6C.o,tail16.data.o,ov_SC03_030_jr_801734BC.o,tail17.data.o,ov_SC03_030_jr_80178D40.o,tail18.data.o,ov_SC03_030_jr_8017A4AC.o,tail19.data.o,ov_SC03_030_jr_8017AE2C.o,tail20.data.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_030/ov_SC03_030_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_030/ov_SC03_030_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_030/ov_SC03_030_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1344,7 +1344,7 @@ ov_SC03_031_ELF := $(ov_SC03_031_OUT).elf ov_SC03_031_MAPFILE := $(ov_SC03_031_OUT).map ov_SC03_031_LD_SCRIPT := $(ov_SC03_031_OUT).ld ov_SC03_031_SPLAT_YAML := config/splat.ov_SC03_031.yaml -ov_SC03_031_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_031_jr_8012ACE0.o,tail2.data.o,ov_SC03_031_jr_80135888.o,tail3.data.o,ov_SC03_031_jr_80135A4C.o,tail4.data.o,ov_SC03_031_jr_80135D20.o,tail5.data.o,ov_SC03_031_jr_801380E0.o,tail6.data.o,ov_SC03_031_jr_8013F350.o,tail7.data.o,ov_SC03_031_jr_8013FFD8.o,tail8.data.o,ov_SC03_031_jr_80140608.o,tail9.data.o,ov_SC03_031_jr_8015444C.o,tail10.data.o,ov_SC03_031_jr_80154C24.o,ov_SC03_031_jr_801588CC.o,tail11.data.o,ov_SC03_031_jr_80159C84.o,tail12.data.o,ov_SC03_031_jr_8015A3C8.o,tail13.data.o,ov_SC03_031_jr_8015AE2C.o,tail14.data.o,ov_SC03_031_jr_8015C32C.o,tail15.data.o,ov_SC03_031_jr_8016AB6C.o,tail16.data.o,ov_SC03_031_jr_801734BC.o,tail17.data.o,ov_SC03_031_jr_80178D40.o,tail18.data.o,ov_SC03_031_jr_8017A4AC.o,tail19.data.o,ov_SC03_031_jr_8017AE2C.o,ov_SC03_031_jr_8017DB5C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_031_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_031.o,tail2.data.o,ov_SC03_031_jr_8012ACE0.o,tail3.data.o,ov_SC03_031_jr_80135888.o,tail4.data.o,ov_SC03_031_jr_80135A4C.o,tail5.data.o,ov_SC03_031_jr_80135D20.o,tail6.data.o,ov_SC03_031_jr_801380E0.o,tail7.data.o,ov_SC03_031_jr_8013F350.o,tail8.data.o,ov_SC03_031_jr_8013FFD8.o,tail9.data.o,ov_SC03_031_jr_80140608.o,tail10.data.o,ov_SC03_031_jr_8015444C.o,tail11.data.o,ov_SC03_031_jr_80154C24.o,ov_SC03_031_jr_801588CC.o,tail12.data.o,ov_SC03_031_jr_80159C84.o,tail13.data.o,ov_SC03_031_jr_8015A3C8.o,tail14.data.o,ov_SC03_031_jr_8015AE2C.o,tail15.data.o,ov_SC03_031_jr_8015C32C.o,tail16.data.o,ov_SC03_031_jr_8016AB6C.o,tail17.data.o,ov_SC03_031_jr_801734BC.o,tail18.data.o,ov_SC03_031_jr_80178D40.o,tail19.data.o,ov_SC03_031_jr_8017A4AC.o,tail20.data.o,ov_SC03_031_jr_8017AE2C.o,ov_SC03_031_jr_8017DB5C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_031/ov_SC03_031_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_031/ov_SC03_031_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_031/ov_SC03_031_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1371,7 +1371,7 @@ ov_SC03_089_ELF := $(ov_SC03_089_OUT).elf ov_SC03_089_MAPFILE := $(ov_SC03_089_OUT).map ov_SC03_089_LD_SCRIPT := $(ov_SC03_089_OUT).ld ov_SC03_089_SPLAT_YAML := config/splat.ov_SC03_089.yaml -ov_SC03_089_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_089_jr_8012ACE0.o,tail2.data.o,ov_SC03_089_jr_80135888.o,tail3.data.o,ov_SC03_089_jr_80135A4C.o,tail4.data.o,ov_SC03_089_jr_80135D20.o,tail5.data.o,ov_SC03_089_jr_801380E0.o,tail6.data.o,ov_SC03_089_jr_8013F350.o,tail7.data.o,ov_SC03_089_jr_8013FFD8.o,tail8.data.o,ov_SC03_089_jr_80140608.o,tail9.data.o,ov_SC03_089_jr_8015444C.o,tail10.data.o,ov_SC03_089_jr_80154C24.o,ov_SC03_089_jr_801588CC.o,tail11.data.o,ov_SC03_089_jr_80159C84.o,tail12.data.o,ov_SC03_089_jr_8015A3C8.o,tail13.data.o,ov_SC03_089_jr_8015AE2C.o,tail14.data.o,ov_SC03_089_jr_8015C32C.o,tail15.data.o,ov_SC03_089_jr_8016AB6C.o,tail16.data.o,ov_SC03_089_jr_801734BC.o,tail17.data.o,ov_SC03_089_jr_80178D40.o,tail18.data.o,ov_SC03_089_jr_8017A4AC.o,tail19.data.o,ov_SC03_089_jr_8017AE2C.o,ov_SC03_089_jr_8017CA80.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_089_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_089.o,tail2.data.o,ov_SC03_089_jr_8012ACE0.o,tail3.data.o,ov_SC03_089_jr_80135888.o,tail4.data.o,ov_SC03_089_jr_80135A4C.o,tail5.data.o,ov_SC03_089_jr_80135D20.o,tail6.data.o,ov_SC03_089_jr_801380E0.o,tail7.data.o,ov_SC03_089_jr_8013F350.o,tail8.data.o,ov_SC03_089_jr_8013FFD8.o,tail9.data.o,ov_SC03_089_jr_80140608.o,tail10.data.o,ov_SC03_089_jr_8015444C.o,tail11.data.o,ov_SC03_089_jr_80154C24.o,ov_SC03_089_jr_801588CC.o,tail12.data.o,ov_SC03_089_jr_80159C84.o,tail13.data.o,ov_SC03_089_jr_8015A3C8.o,tail14.data.o,ov_SC03_089_jr_8015AE2C.o,tail15.data.o,ov_SC03_089_jr_8015C32C.o,tail16.data.o,ov_SC03_089_jr_8016AB6C.o,tail17.data.o,ov_SC03_089_jr_801734BC.o,tail18.data.o,ov_SC03_089_jr_80178D40.o,tail19.data.o,ov_SC03_089_jr_8017A4AC.o,tail20.data.o,ov_SC03_089_jr_8017AE2C.o,ov_SC03_089_jr_8017CA80.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_089/ov_SC03_089_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_089/ov_SC03_089_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_089/ov_SC03_089_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1398,7 +1398,7 @@ ov_SC03_090_ELF := $(ov_SC03_090_OUT).elf ov_SC03_090_MAPFILE := $(ov_SC03_090_OUT).map ov_SC03_090_LD_SCRIPT := $(ov_SC03_090_OUT).ld ov_SC03_090_SPLAT_YAML := config/splat.ov_SC03_090.yaml -ov_SC03_090_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_090_jr_8012ACE0.o,tail2.data.o,ov_SC03_090_jr_80135888.o,tail3.data.o,ov_SC03_090_jr_80135A4C.o,tail4.data.o,ov_SC03_090_jr_80135D20.o,tail5.data.o,ov_SC03_090_jr_801380E0.o,tail6.data.o,ov_SC03_090_jr_8013F350.o,tail7.data.o,ov_SC03_090_jr_8013FFD8.o,tail8.data.o,ov_SC03_090_jr_80140608.o,tail9.data.o,ov_SC03_090_jr_8015444C.o,tail10.data.o,ov_SC03_090_jr_80154C24.o,ov_SC03_090_jr_801588CC.o,tail11.data.o,ov_SC03_090_jr_80159C84.o,tail12.data.o,ov_SC03_090_jr_8015A3C8.o,tail13.data.o,ov_SC03_090_jr_8015AE2C.o,tail14.data.o,ov_SC03_090_jr_8015C32C.o,tail15.data.o,ov_SC03_090_jr_8016AB6C.o,tail16.data.o,ov_SC03_090_jr_801734BC.o,tail17.data.o,ov_SC03_090_jr_80178D40.o,tail18.data.o,ov_SC03_090_jr_8017A4AC.o,tail19.data.o,ov_SC03_090_jr_8017AE2C.o,ov_SC03_090_jr_8017CA80.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_090_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_090.o,tail2.data.o,ov_SC03_090_jr_8012ACE0.o,tail3.data.o,ov_SC03_090_jr_80135888.o,tail4.data.o,ov_SC03_090_jr_80135A4C.o,tail5.data.o,ov_SC03_090_jr_80135D20.o,tail6.data.o,ov_SC03_090_jr_801380E0.o,tail7.data.o,ov_SC03_090_jr_8013F350.o,tail8.data.o,ov_SC03_090_jr_8013FFD8.o,tail9.data.o,ov_SC03_090_jr_80140608.o,tail10.data.o,ov_SC03_090_jr_8015444C.o,tail11.data.o,ov_SC03_090_jr_80154C24.o,ov_SC03_090_jr_801588CC.o,tail12.data.o,ov_SC03_090_jr_80159C84.o,tail13.data.o,ov_SC03_090_jr_8015A3C8.o,tail14.data.o,ov_SC03_090_jr_8015AE2C.o,tail15.data.o,ov_SC03_090_jr_8015C32C.o,tail16.data.o,ov_SC03_090_jr_8016AB6C.o,tail17.data.o,ov_SC03_090_jr_801734BC.o,tail18.data.o,ov_SC03_090_jr_80178D40.o,tail19.data.o,ov_SC03_090_jr_8017A4AC.o,tail20.data.o,ov_SC03_090_jr_8017AE2C.o,ov_SC03_090_jr_8017CA80.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_090/ov_SC03_090_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_090/ov_SC03_090_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_090/ov_SC03_090_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1425,7 +1425,7 @@ ov_SC03_091_ELF := $(ov_SC03_091_OUT).elf ov_SC03_091_MAPFILE := $(ov_SC03_091_OUT).map ov_SC03_091_LD_SCRIPT := $(ov_SC03_091_OUT).ld ov_SC03_091_SPLAT_YAML := config/splat.ov_SC03_091.yaml -ov_SC03_091_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_091_jr_8012ACE0.o,tail2.data.o,ov_SC03_091_jr_80135888.o,tail3.data.o,ov_SC03_091_jr_80135A4C.o,tail4.data.o,ov_SC03_091_jr_80135D20.o,tail5.data.o,ov_SC03_091_jr_801380E0.o,tail6.data.o,ov_SC03_091_jr_8013F350.o,tail7.data.o,ov_SC03_091_jr_8013FFD8.o,tail8.data.o,ov_SC03_091_jr_80140608.o,tail9.data.o,ov_SC03_091_jr_8015444C.o,tail10.data.o,ov_SC03_091_jr_80154C24.o,ov_SC03_091_jr_801588CC.o,tail11.data.o,ov_SC03_091_jr_80159C84.o,tail12.data.o,ov_SC03_091_jr_8015A3C8.o,tail13.data.o,ov_SC03_091_jr_8015AE2C.o,tail14.data.o,ov_SC03_091_jr_8015C32C.o,tail15.data.o,ov_SC03_091_jr_8016AB6C.o,tail16.data.o,ov_SC03_091_jr_801734BC.o,tail17.data.o,ov_SC03_091_jr_80178D40.o,tail18.data.o,ov_SC03_091_jr_8017A4AC.o,tail19.data.o,ov_SC03_091_jr_8017AE2C.o,ov_SC03_091_jr_8017D898.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_091_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_091.o,tail2.data.o,ov_SC03_091_jr_8012ACE0.o,tail3.data.o,ov_SC03_091_jr_80135888.o,tail4.data.o,ov_SC03_091_jr_80135A4C.o,tail5.data.o,ov_SC03_091_jr_80135D20.o,tail6.data.o,ov_SC03_091_jr_801380E0.o,tail7.data.o,ov_SC03_091_jr_8013F350.o,tail8.data.o,ov_SC03_091_jr_8013FFD8.o,tail9.data.o,ov_SC03_091_jr_80140608.o,tail10.data.o,ov_SC03_091_jr_8015444C.o,tail11.data.o,ov_SC03_091_jr_80154C24.o,ov_SC03_091_jr_801588CC.o,tail12.data.o,ov_SC03_091_jr_80159C84.o,tail13.data.o,ov_SC03_091_jr_8015A3C8.o,tail14.data.o,ov_SC03_091_jr_8015AE2C.o,tail15.data.o,ov_SC03_091_jr_8015C32C.o,tail16.data.o,ov_SC03_091_jr_8016AB6C.o,tail17.data.o,ov_SC03_091_jr_801734BC.o,tail18.data.o,ov_SC03_091_jr_80178D40.o,tail19.data.o,ov_SC03_091_jr_8017A4AC.o,tail20.data.o,ov_SC03_091_jr_8017AE2C.o,ov_SC03_091_jr_8017D898.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_091/ov_SC03_091_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_091/ov_SC03_091_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_091/ov_SC03_091_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1452,7 +1452,7 @@ ov_SC03_092_ELF := $(ov_SC03_092_OUT).elf ov_SC03_092_MAPFILE := $(ov_SC03_092_OUT).map ov_SC03_092_LD_SCRIPT := $(ov_SC03_092_OUT).ld ov_SC03_092_SPLAT_YAML := config/splat.ov_SC03_092.yaml -ov_SC03_092_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_092_jr_8012ACE0.o,tail2.data.o,ov_SC03_092_jr_80135888.o,tail3.data.o,ov_SC03_092_jr_80135A4C.o,tail4.data.o,ov_SC03_092_jr_80135D20.o,tail5.data.o,ov_SC03_092_jr_801380E0.o,tail6.data.o,ov_SC03_092_jr_8013F350.o,tail7.data.o,ov_SC03_092_jr_8013FFD8.o,tail8.data.o,ov_SC03_092_jr_80140608.o,tail9.data.o,ov_SC03_092_jr_8015444C.o,tail10.data.o,ov_SC03_092_jr_80154C24.o,ov_SC03_092_jr_801588CC.o,tail11.data.o,ov_SC03_092_jr_80159C84.o,tail12.data.o,ov_SC03_092_jr_8015A3C8.o,tail13.data.o,ov_SC03_092_jr_8015AE2C.o,tail14.data.o,ov_SC03_092_jr_8015C32C.o,tail15.data.o,ov_SC03_092_jr_8016AB6C.o,tail16.data.o,ov_SC03_092_jr_801734BC.o,tail17.data.o,ov_SC03_092_jr_80178D40.o,tail18.data.o,ov_SC03_092_jr_8017A4AC.o,tail19.data.o,ov_SC03_092_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_092_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_092.o,tail2.data.o,ov_SC03_092_jr_8012ACE0.o,tail3.data.o,ov_SC03_092_jr_80135888.o,tail4.data.o,ov_SC03_092_jr_80135A4C.o,tail5.data.o,ov_SC03_092_jr_80135D20.o,tail6.data.o,ov_SC03_092_jr_801380E0.o,tail7.data.o,ov_SC03_092_jr_8013F350.o,tail8.data.o,ov_SC03_092_jr_8013FFD8.o,tail9.data.o,ov_SC03_092_jr_80140608.o,tail10.data.o,ov_SC03_092_jr_8015444C.o,tail11.data.o,ov_SC03_092_jr_80154C24.o,ov_SC03_092_jr_801588CC.o,tail12.data.o,ov_SC03_092_jr_80159C84.o,tail13.data.o,ov_SC03_092_jr_8015A3C8.o,tail14.data.o,ov_SC03_092_jr_8015AE2C.o,tail15.data.o,ov_SC03_092_jr_8015C32C.o,tail16.data.o,ov_SC03_092_jr_8016AB6C.o,tail17.data.o,ov_SC03_092_jr_801734BC.o,tail18.data.o,ov_SC03_092_jr_80178D40.o,tail19.data.o,ov_SC03_092_jr_8017A4AC.o,tail20.data.o,ov_SC03_092_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_092/ov_SC03_092_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_092/ov_SC03_092_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_092/ov_SC03_092_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 diff --git a/config/splat.ov_SC01_005.yaml b/config/splat.ov_SC01_005.yaml index 99b7249b51..33e4f3b2d2 100644 --- a/config/splat.ov_SC01_005.yaml +++ b/config/splat.ov_SC01_005.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC01_005_jr_8017AE2C] - [0x541e8, c, ov_SC01_005_jr_8017C340] - [0x5a20c, data, tail] + - [0xa2d00, .rodata, ov_SC01_005] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xa2d14, data, tail2] - [0xa2ddc, .rodata, ov_SC01_005_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2ebc, data, tail2] + - [0xa2ebc, data, tail3] - [0xa2ed4, .rodata, ov_SC01_005_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2ee8, data, tail3] + - [0xa2ee8, data, tail4] - [0xa2eec, .rodata, ov_SC01_005_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2f00, data, tail4] + - [0xa2f00, data, tail5] - [0xa2f04, .rodata, ov_SC01_005_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2f18, data, tail5] + - [0xa2f18, data, tail6] - [0xa2f54, .rodata, ov_SC01_005_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2fb8, data, tail6] + - [0xa2fb8, data, tail7] - [0xa35c4, .rodata, ov_SC01_005_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa35f8, data, tail7] + - [0xa35f8, data, tail8] - [0xa35fc, .rodata, ov_SC01_005_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3630, data, tail8] + - [0xa3630, data, tail9] - [0xa366c, .rodata, ov_SC01_005_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3680, data, tail9] + - [0xa3680, data, tail10] - [0xa3698, .rodata, ov_SC01_005_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3704, data, tail10] + - [0xa3704, data, tail11] - [0xa3774, .rodata, ov_SC01_005_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa37b8, .rodata, ov_SC01_005_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3800, data, tail11] + - [0xa3800, data, tail12] - [0xa3860, .rodata, ov_SC01_005_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3894, data, tail12] + - [0xa3894, data, tail13] - [0xa3898, .rodata, ov_SC01_005_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa38b4, data, tail13] + - [0xa38b4, data, tail14] - [0xa38b8, .rodata, ov_SC01_005_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa38d4, data, tail14] + - [0xa38d4, data, tail15] - [0xa38f8, .rodata, ov_SC01_005_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3914, data, tail15] + - [0xa3914, data, tail16] - [0xa392c, .rodata, ov_SC01_005_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa394c, data, tail16] + - [0xa394c, data, tail17] - [0xa39cc, .rodata, ov_SC01_005_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa39e0, data, tail17] + - [0xa39e0, data, tail18] - [0xa3b88, .rodata, ov_SC01_005_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3d00, data, tail18] + - [0xa3d00, data, tail19] - [0xa3d90, .rodata, ov_SC01_005_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3e1c, data, tail19] + - [0xa3e1c, data, tail20] - [0xa3e20, .rodata, ov_SC01_005_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa3e34, .rodata, ov_SC01_005_jr_8017C340] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3e54, data, tail20] + - [0xa3e54, data, tail21] - [0xA5F08, bin, trailing] # final 1 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xA5F09] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC01_006.yaml b/config/splat.ov_SC01_006.yaml index a36ec4e04e..5638a4e428 100644 --- a/config/splat.ov_SC01_006.yaml +++ b/config/splat.ov_SC01_006.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC01_006_jr_8017AE2C] - [0x541e8, c, ov_SC01_006_jr_8017C340] - [0x5a20c, data, tail] + - [0xa2d00, .rodata, ov_SC01_006] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xa2d14, data, tail2] - [0xa2ddc, .rodata, ov_SC01_006_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2ebc, data, tail2] + - [0xa2ebc, data, tail3] - [0xa2ed4, .rodata, ov_SC01_006_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2ee8, data, tail3] + - [0xa2ee8, data, tail4] - [0xa2eec, .rodata, ov_SC01_006_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2f00, data, tail4] + - [0xa2f00, data, tail5] - [0xa2f04, .rodata, ov_SC01_006_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2f18, data, tail5] + - [0xa2f18, data, tail6] - [0xa2f54, .rodata, ov_SC01_006_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2fb8, data, tail6] + - [0xa2fb8, data, tail7] - [0xa35c4, .rodata, ov_SC01_006_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa35f8, data, tail7] + - [0xa35f8, data, tail8] - [0xa35fc, .rodata, ov_SC01_006_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3630, data, tail8] + - [0xa3630, data, tail9] - [0xa366c, .rodata, ov_SC01_006_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3680, data, tail9] + - [0xa3680, data, tail10] - [0xa3698, .rodata, ov_SC01_006_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3704, data, tail10] + - [0xa3704, data, tail11] - [0xa3774, .rodata, ov_SC01_006_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa37b8, .rodata, ov_SC01_006_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3800, data, tail11] + - [0xa3800, data, tail12] - [0xa3860, .rodata, ov_SC01_006_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3894, data, tail12] + - [0xa3894, data, tail13] - [0xa3898, .rodata, ov_SC01_006_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa38b4, data, tail13] + - [0xa38b4, data, tail14] - [0xa38b8, .rodata, ov_SC01_006_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa38d4, data, tail14] + - [0xa38d4, data, tail15] - [0xa38f8, .rodata, ov_SC01_006_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3914, data, tail15] + - [0xa3914, data, tail16] - [0xa392c, .rodata, ov_SC01_006_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa394c, data, tail16] + - [0xa394c, data, tail17] - [0xa39cc, .rodata, ov_SC01_006_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa39e0, data, tail17] + - [0xa39e0, data, tail18] - [0xa3b88, .rodata, ov_SC01_006_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3d00, data, tail18] + - [0xa3d00, data, tail19] - [0xa3d90, .rodata, ov_SC01_006_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3e1c, data, tail19] + - [0xa3e1c, data, tail20] - [0xa3e20, .rodata, ov_SC01_006_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa3e34, .rodata, ov_SC01_006_jr_8017C340] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3e54, data, tail20] + - [0xa3e54, data, tail21] - [0xA5F08, bin, trailing] # final 1 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xA5F09] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC01_008.yaml b/config/splat.ov_SC01_008.yaml index b735eefef2..bdb9b484e3 100644 --- a/config/splat.ov_SC01_008.yaml +++ b/config/splat.ov_SC01_008.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC01_008_jr_8017AE2C] - [0x53d44, c, ov_SC01_008_jr_8017BE9C] - [0x575ec, data, tail] + - [0x787b0, .rodata, ov_SC01_008] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x787c4, data, tail2] - [0x7888c, .rodata, ov_SC01_008_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7896c, data, tail2] + - [0x7896c, data, tail3] - [0x78984, .rodata, ov_SC01_008_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78998, data, tail3] + - [0x78998, data, tail4] - [0x7899c, .rodata, ov_SC01_008_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x789b0, data, tail4] + - [0x789b0, data, tail5] - [0x789b4, .rodata, ov_SC01_008_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x789c8, data, tail5] + - [0x789c8, data, tail6] - [0x78a04, .rodata, ov_SC01_008_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78a68, data, tail6] + - [0x78a68, data, tail7] - [0x79074, .rodata, ov_SC01_008_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x790a8, data, tail7] + - [0x790a8, data, tail8] - [0x790ac, .rodata, ov_SC01_008_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x790e0, data, tail8] + - [0x790e0, data, tail9] - [0x7911c, .rodata, ov_SC01_008_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x79130, data, tail9] + - [0x79130, data, tail10] - [0x79148, .rodata, ov_SC01_008_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x791b4, data, tail10] + - [0x791b4, data, tail11] - [0x79224, .rodata, ov_SC01_008_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x79268, .rodata, ov_SC01_008_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x792b0, data, tail11] + - [0x792b0, data, tail12] - [0x79310, .rodata, ov_SC01_008_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x79344, data, tail12] + - [0x79344, data, tail13] - [0x79348, .rodata, ov_SC01_008_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x79364, data, tail13] + - [0x79364, data, tail14] - [0x79368, .rodata, ov_SC01_008_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x79384, data, tail14] + - [0x79384, data, tail15] - [0x793a8, .rodata, ov_SC01_008_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x793c4, data, tail15] + - [0x793c4, data, tail16] - [0x793dc, .rodata, ov_SC01_008_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x793fc, data, tail16] + - [0x793fc, data, tail17] - [0x7947c, .rodata, ov_SC01_008_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x79490, data, tail17] + - [0x79490, data, tail18] - [0x79638, .rodata, ov_SC01_008_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x797b0, data, tail18] + - [0x797b0, data, tail19] - [0x79840, .rodata, ov_SC01_008_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x798cc, data, tail19] + - [0x798cc, data, tail20] - [0x798d0, .rodata, ov_SC01_008_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x798e4, .rodata, ov_SC01_008_jr_8017BE9C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x79904, data, tail20] + - [0x79904, data, tail21] - [0x7B484, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x7B487] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC01_009.yaml b/config/splat.ov_SC01_009.yaml index 26347153cb..72a0228de7 100644 --- a/config/splat.ov_SC01_009.yaml +++ b/config/splat.ov_SC01_009.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC01_009_jr_8017AE2C] - [0x53d44, c, ov_SC01_009_jr_8017BE9C] - [0x5a7d4, data, tail] + - [0xc8574, .rodata, ov_SC01_009] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xc8588, data, tail2] - [0xc8650, .rodata, ov_SC01_009_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc8730, data, tail2] + - [0xc8730, data, tail3] - [0xc8748, .rodata, ov_SC01_009_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc875c, data, tail3] + - [0xc875c, data, tail4] - [0xc8760, .rodata, ov_SC01_009_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc8774, data, tail4] + - [0xc8774, data, tail5] - [0xc8778, .rodata, ov_SC01_009_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc878c, data, tail5] + - [0xc878c, data, tail6] - [0xc87c8, .rodata, ov_SC01_009_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc882c, data, tail6] + - [0xc882c, data, tail7] - [0xc8e38, .rodata, ov_SC01_009_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc8e6c, data, tail7] + - [0xc8e6c, data, tail8] - [0xc8e70, .rodata, ov_SC01_009_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc8ea4, data, tail8] + - [0xc8ea4, data, tail9] - [0xc8ee0, .rodata, ov_SC01_009_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc8ef4, data, tail9] + - [0xc8ef4, data, tail10] - [0xc8f0c, .rodata, ov_SC01_009_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc8f78, data, tail10] + - [0xc8f78, data, tail11] - [0xc8fe8, .rodata, ov_SC01_009_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xc902c, .rodata, ov_SC01_009_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc9074, data, tail11] + - [0xc9074, data, tail12] - [0xc90d4, .rodata, ov_SC01_009_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc9108, data, tail12] + - [0xc9108, data, tail13] - [0xc910c, .rodata, ov_SC01_009_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc9128, data, tail13] + - [0xc9128, data, tail14] - [0xc912c, .rodata, ov_SC01_009_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc9148, data, tail14] + - [0xc9148, data, tail15] - [0xc916c, .rodata, ov_SC01_009_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc9188, data, tail15] + - [0xc9188, data, tail16] - [0xc91a0, .rodata, ov_SC01_009_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc91c0, data, tail16] + - [0xc91c0, data, tail17] - [0xc9240, .rodata, ov_SC01_009_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc9254, data, tail17] + - [0xc9254, data, tail18] - [0xc93fc, .rodata, ov_SC01_009_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc9574, data, tail18] + - [0xc9574, data, tail19] - [0xc9604, .rodata, ov_SC01_009_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc9690, data, tail19] + - [0xc9690, data, tail20] - [0xc9694, .rodata, ov_SC01_009_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xc96a8, .rodata, ov_SC01_009_jr_8017BE9C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc96c8, data, tail20] + - [0xc96c8, data, tail21] - [0xCB304, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xCB307] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC01_074.yaml b/config/splat.ov_SC01_074.yaml index de2f0f3880..14636ebe4f 100644 --- a/config/splat.ov_SC01_074.yaml +++ b/config/splat.ov_SC01_074.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC01_074_jr_8017AE2C] - [0x53d44, c, ov_SC01_074_jr_8017BE9C] - [0x56454, data, tail] + - [0x71604, .rodata, ov_SC01_074] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x71618, data, tail2] - [0x716e0, .rodata, ov_SC01_074_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x717c0, data, tail2] + - [0x717c0, data, tail3] - [0x717d8, .rodata, ov_SC01_074_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x717ec, data, tail3] + - [0x717ec, data, tail4] - [0x717f0, .rodata, ov_SC01_074_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x71804, data, tail4] + - [0x71804, data, tail5] - [0x71808, .rodata, ov_SC01_074_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7181c, data, tail5] + - [0x7181c, data, tail6] - [0x71858, .rodata, ov_SC01_074_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x718bc, data, tail6] + - [0x718bc, data, tail7] - [0x71ec8, .rodata, ov_SC01_074_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x71efc, data, tail7] + - [0x71efc, data, tail8] - [0x71f00, .rodata, ov_SC01_074_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x71f34, data, tail8] + - [0x71f34, data, tail9] - [0x71f70, .rodata, ov_SC01_074_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x71f84, data, tail9] + - [0x71f84, data, tail10] - [0x71f9c, .rodata, ov_SC01_074_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72008, data, tail10] + - [0x72008, data, tail11] - [0x72078, .rodata, ov_SC01_074_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x720bc, .rodata, ov_SC01_074_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72104, data, tail11] + - [0x72104, data, tail12] - [0x72164, .rodata, ov_SC01_074_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72198, data, tail12] + - [0x72198, data, tail13] - [0x7219c, .rodata, ov_SC01_074_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x721b8, data, tail13] + - [0x721b8, data, tail14] - [0x721bc, .rodata, ov_SC01_074_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x721d8, data, tail14] + - [0x721d8, data, tail15] - [0x721fc, .rodata, ov_SC01_074_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72218, data, tail15] + - [0x72218, data, tail16] - [0x72230, .rodata, ov_SC01_074_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72250, data, tail16] + - [0x72250, data, tail17] - [0x722d0, .rodata, ov_SC01_074_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x722e4, data, tail17] + - [0x722e4, data, tail18] - [0x7248c, .rodata, ov_SC01_074_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72604, data, tail18] + - [0x72604, data, tail19] - [0x72694, .rodata, ov_SC01_074_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72720, data, tail19] + - [0x72720, data, tail20] - [0x72724, .rodata, ov_SC01_074_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x72738, .rodata, ov_SC01_074_jr_8017BE9C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72758, data, tail20] + - [0x72758, data, tail21] - [0x73C14, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x73C17] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC01_077.yaml b/config/splat.ov_SC01_077.yaml index 861373da83..babbfcf569 100644 --- a/config/splat.ov_SC01_077.yaml +++ b/config/splat.ov_SC01_077.yaml @@ -95,45 +95,47 @@ segments: # = file 0xAFF20..0xAFFEC. func_8012ACE0 lives in the ov_SC01_077_a subseg. Other functions' # jtbls stay raw .data until matched (each matched fn's jtbl gets its own carve — the ×134 tool). - [0x5e978, data, tail] + - [0xafe44, .rodata, ov_SC01_077_a] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xafe58, data, tail2] - [0xaff20, .rodata, ov_SC01_077_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0000, data, tail2] + - [0xb0000, data, tail3] - [0xb0018, .rodata, ov_SC01_077_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb002c, data, tail3] + - [0xb002c, data, tail4] - [0xb0030, .rodata, ov_SC01_077_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0044, data, tail4] + - [0xb0044, data, tail5] - [0xb0048, .rodata, ov_SC01_077_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb005c, data, tail5] + - [0xb005c, data, tail6] - [0xb0098, .rodata, ov_SC01_077_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb00fc, data, tail6] + - [0xb00fc, data, tail7] - [0xb01a4, .rodata, ov_SC01_077_o0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0280, data, tail7] + - [0xb0280, data, tail8] - [0xb0708, .rodata, ov_SC01_077] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb07c4, data, tail8] + - [0xb07c4, data, tail9] - [0xb07dc, .rodata, ov_SC01_077_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0848, data, tail9] + - [0xb0848, data, tail10] - [0xb08b8, .rodata, ov_SC01_077_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xb08fc, .rodata, ov_SC01_077_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0944, data, tail10] + - [0xb0944, data, tail11] - [0xb09a4, .rodata, ov_SC01_077_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb09d8, data, tail11] + - [0xb09d8, data, tail12] - [0xb09dc, .rodata, ov_SC01_077_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb09f8, data, tail12] + - [0xb09f8, data, tail13] - [0xb09fc, .rodata, ov_SC01_077_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0a18, data, tail13] + - [0xb0a18, data, tail14] - [0xb0a3c, .rodata, ov_SC01_077_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0a58, data, tail14] + - [0xb0a58, data, tail15] - [0xb0a70, .rodata, ov_SC01_077_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0a90, data, tail15] + - [0xb0a90, data, tail16] - [0xb0b10, .rodata, ov_SC01_077_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0b24, data, tail16] + - [0xb0b24, data, tail17] - [0xb0ccc, .rodata, ov_SC01_077_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0e44, data, tail17] + - [0xb0e44, data, tail18] - [0xb0ed4, .rodata, ov_SC01_077_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0f60, data, tail18] + - [0xb0f60, data, tail19] - [0xb0f64, .rodata, ov_SC01_077_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0f78, data, tail19] + - [0xb0f78, data, tail20] - [0xb1148, .rodata, ov_SC01_077_jr_80182268] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb1168, data, tail20] + - [0xb1168, data, tail21] - [0xB29D4, bin, trailing] # final 3 bytes (EOF 0xB29D7 not word-aligned; spimdisasm drops # a trailing partial word and a <4-byte `data` carve emits nothing, # so use `bin` = raw .incbin, byte-exact). Word-aligned overlays omit this. diff --git a/config/splat.ov_SC01_080.yaml b/config/splat.ov_SC01_080.yaml index 179381d3ef..19e089bac7 100644 --- a/config/splat.ov_SC01_080.yaml +++ b/config/splat.ov_SC01_080.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC01_080_jr_8017A4AC] - [0x52cd4, c, ov_SC01_080_jr_8017AE2C] - [0x5b3b4, data, tail] + - [0x9b424, .rodata, ov_SC01_080] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x9b438, data, tail2] - [0x9b500, .rodata, ov_SC01_080_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b5e0, data, tail2] + - [0x9b5e0, data, tail3] - [0x9b5f8, .rodata, ov_SC01_080_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b60c, data, tail3] + - [0x9b60c, data, tail4] - [0x9b610, .rodata, ov_SC01_080_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b624, data, tail4] + - [0x9b624, data, tail5] - [0x9b628, .rodata, ov_SC01_080_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b63c, data, tail5] + - [0x9b63c, data, tail6] - [0x9b678, .rodata, ov_SC01_080_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b6dc, data, tail6] + - [0x9b6dc, data, tail7] - [0x9bce8, .rodata, ov_SC01_080_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9bd1c, data, tail7] + - [0x9bd1c, data, tail8] - [0x9bd20, .rodata, ov_SC01_080_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9bd54, data, tail8] + - [0x9bd54, data, tail9] - [0x9bd90, .rodata, ov_SC01_080_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9bda4, data, tail9] + - [0x9bda4, data, tail10] - [0x9bdbc, .rodata, ov_SC01_080_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9be28, data, tail10] + - [0x9be28, data, tail11] - [0x9be98, .rodata, ov_SC01_080_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9bedc, .rodata, ov_SC01_080_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9bf24, data, tail11] + - [0x9bf24, data, tail12] - [0x9bf84, .rodata, ov_SC01_080_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9bfb8, data, tail12] + - [0x9bfb8, data, tail13] - [0x9bfbc, .rodata, ov_SC01_080_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9bfd8, data, tail13] + - [0x9bfd8, data, tail14] - [0x9bfdc, .rodata, ov_SC01_080_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9bff8, data, tail14] + - [0x9bff8, data, tail15] - [0x9c01c, .rodata, ov_SC01_080_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c038, data, tail15] + - [0x9c038, data, tail16] - [0x9c050, .rodata, ov_SC01_080_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c070, data, tail16] + - [0x9c070, data, tail17] - [0x9c0f0, .rodata, ov_SC01_080_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c104, data, tail17] + - [0x9c104, data, tail18] - [0x9c2ac, .rodata, ov_SC01_080_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c424, data, tail18] + - [0x9c424, data, tail19] - [0x9c4b4, .rodata, ov_SC01_080_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c540, data, tail19] + - [0x9c540, data, tail20] - [0x9c544, .rodata, ov_SC01_080_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c558, data, tail20] + - [0x9c558, data, tail21] - [0x9FDF4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x9FDF7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC01_084.yaml b/config/splat.ov_SC01_084.yaml index b62d4b9d05..2d404382b2 100644 --- a/config/splat.ov_SC01_084.yaml +++ b/config/splat.ov_SC01_084.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC01_084_jr_8017AE2C] - [0x54928, c, ov_SC01_084_jr_8017CA80] - [0x5e6a8, data, tail] + - [0x9cdf4, .rodata, ov_SC01_084] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x9ce08, data, tail2] - [0x9ced0, .rodata, ov_SC01_084_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9cfb0, data, tail2] + - [0x9cfb0, data, tail3] - [0x9cfc8, .rodata, ov_SC01_084_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9cfdc, data, tail3] + - [0x9cfdc, data, tail4] - [0x9cfe0, .rodata, ov_SC01_084_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9cff4, data, tail4] + - [0x9cff4, data, tail5] - [0x9cff8, .rodata, ov_SC01_084_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9d00c, data, tail5] + - [0x9d00c, data, tail6] - [0x9d048, .rodata, ov_SC01_084_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9d0ac, data, tail6] + - [0x9d0ac, data, tail7] - [0x9d6b8, .rodata, ov_SC01_084_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9d6ec, data, tail7] + - [0x9d6ec, data, tail8] - [0x9d6f0, .rodata, ov_SC01_084_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9d724, data, tail8] + - [0x9d724, data, tail9] - [0x9d760, .rodata, ov_SC01_084_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9d774, data, tail9] + - [0x9d774, data, tail10] - [0x9d78c, .rodata, ov_SC01_084_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9d7f8, data, tail10] + - [0x9d7f8, data, tail11] - [0x9d868, .rodata, ov_SC01_084_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9d8ac, .rodata, ov_SC01_084_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9d8f4, data, tail11] + - [0x9d8f4, data, tail12] - [0x9d954, .rodata, ov_SC01_084_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9d988, data, tail12] + - [0x9d988, data, tail13] - [0x9d98c, .rodata, ov_SC01_084_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9d9a8, data, tail13] + - [0x9d9a8, data, tail14] - [0x9d9ac, .rodata, ov_SC01_084_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9d9c8, data, tail14] + - [0x9d9c8, data, tail15] - [0x9d9ec, .rodata, ov_SC01_084_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9da08, data, tail15] + - [0x9da08, data, tail16] - [0x9da20, .rodata, ov_SC01_084_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9da40, data, tail16] + - [0x9da40, data, tail17] - [0x9dac0, .rodata, ov_SC01_084_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9dad4, data, tail17] + - [0x9dad4, data, tail18] - [0x9dc7c, .rodata, ov_SC01_084_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ddf4, data, tail18] + - [0x9ddf4, data, tail19] - [0x9de84, .rodata, ov_SC01_084_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9df10, data, tail19] + - [0x9df10, data, tail20] - [0x9df14, .rodata, ov_SC01_084_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9df28, .rodata, ov_SC01_084_jr_8017CA80] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9df48, data, tail20] + - [0x9df48, data, tail21] - [0x9FA9C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x9FA9F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC02_000.yaml b/config/splat.ov_SC02_000.yaml index ecfae52cbc..947a4431e6 100644 --- a/config/splat.ov_SC02_000.yaml +++ b/config/splat.ov_SC02_000.yaml @@ -118,47 +118,49 @@ segments: - [0x52cd4, c, ov_SC02_000_jr_8017AE2C] - [0x57b58, c, ov_SC02_000_jr_8017FCB0] - [0x62a58, data, tail] + - [0xbd648, .rodata, ov_SC02_000] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xbd65c, data, tail2] - [0xbd724, .rodata, ov_SC02_000_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbd804, data, tail2] + - [0xbd804, data, tail3] - [0xbd81c, .rodata, ov_SC02_000_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbd830, data, tail3] + - [0xbd830, data, tail4] - [0xbd834, .rodata, ov_SC02_000_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbd848, data, tail4] + - [0xbd848, data, tail5] - [0xbd84c, .rodata, ov_SC02_000_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbd860, data, tail5] + - [0xbd860, data, tail6] - [0xbd89c, .rodata, ov_SC02_000_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbd900, data, tail6] + - [0xbd900, data, tail7] - [0xbdf0c, .rodata, ov_SC02_000_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbdf40, data, tail7] + - [0xbdf40, data, tail8] - [0xbdf44, .rodata, ov_SC02_000_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbdf78, data, tail8] + - [0xbdf78, data, tail9] - [0xbdfb4, .rodata, ov_SC02_000_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbdfc8, data, tail9] + - [0xbdfc8, data, tail10] - [0xbdfe0, .rodata, ov_SC02_000_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe04c, data, tail10] + - [0xbe04c, data, tail11] - [0xbe0bc, .rodata, ov_SC02_000_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xbe100, .rodata, ov_SC02_000_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe148, data, tail11] + - [0xbe148, data, tail12] - [0xbe1a8, .rodata, ov_SC02_000_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe1dc, data, tail12] + - [0xbe1dc, data, tail13] - [0xbe1e0, .rodata, ov_SC02_000_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe1fc, data, tail13] + - [0xbe1fc, data, tail14] - [0xbe200, .rodata, ov_SC02_000_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe21c, data, tail14] + - [0xbe21c, data, tail15] - [0xbe240, .rodata, ov_SC02_000_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe25c, data, tail15] + - [0xbe25c, data, tail16] - [0xbe274, .rodata, ov_SC02_000_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe294, data, tail16] + - [0xbe294, data, tail17] - [0xbe314, .rodata, ov_SC02_000_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe328, data, tail17] + - [0xbe328, data, tail18] - [0xbe4d0, .rodata, ov_SC02_000_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe648, data, tail18] + - [0xbe648, data, tail19] - [0xbe6d8, .rodata, ov_SC02_000_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe764, data, tail19] + - [0xbe764, data, tail20] - [0xbe768, .rodata, ov_SC02_000_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe77c, data, tail20] + - [0xbe77c, data, tail21] - [0xbe944, .rodata, ov_SC02_000_jr_8017FCB0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe964, data, tail21] + - [0xbe964, data, tail22] - [0xC070C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xC070F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC02_003.yaml b/config/splat.ov_SC02_003.yaml index 6c7e038c01..7ae348e08a 100644 --- a/config/splat.ov_SC02_003.yaml +++ b/config/splat.ov_SC02_003.yaml @@ -118,47 +118,49 @@ segments: - [0x52cd4, c, ov_SC02_003_jr_8017AE2C] - [0x57b58, c, ov_SC02_003_jr_8017FCB0] - [0x62a58, data, tail] + - [0xbd648, .rodata, ov_SC02_003] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xbd65c, data, tail2] - [0xbd724, .rodata, ov_SC02_003_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbd804, data, tail2] + - [0xbd804, data, tail3] - [0xbd81c, .rodata, ov_SC02_003_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbd830, data, tail3] + - [0xbd830, data, tail4] - [0xbd834, .rodata, ov_SC02_003_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbd848, data, tail4] + - [0xbd848, data, tail5] - [0xbd84c, .rodata, ov_SC02_003_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbd860, data, tail5] + - [0xbd860, data, tail6] - [0xbd89c, .rodata, ov_SC02_003_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbd900, data, tail6] + - [0xbd900, data, tail7] - [0xbdf0c, .rodata, ov_SC02_003_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbdf40, data, tail7] + - [0xbdf40, data, tail8] - [0xbdf44, .rodata, ov_SC02_003_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbdf78, data, tail8] + - [0xbdf78, data, tail9] - [0xbdfb4, .rodata, ov_SC02_003_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbdfc8, data, tail9] + - [0xbdfc8, data, tail10] - [0xbdfe0, .rodata, ov_SC02_003_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe04c, data, tail10] + - [0xbe04c, data, tail11] - [0xbe0bc, .rodata, ov_SC02_003_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xbe100, .rodata, ov_SC02_003_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe148, data, tail11] + - [0xbe148, data, tail12] - [0xbe1a8, .rodata, ov_SC02_003_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe1dc, data, tail12] + - [0xbe1dc, data, tail13] - [0xbe1e0, .rodata, ov_SC02_003_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe1fc, data, tail13] + - [0xbe1fc, data, tail14] - [0xbe200, .rodata, ov_SC02_003_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe21c, data, tail14] + - [0xbe21c, data, tail15] - [0xbe240, .rodata, ov_SC02_003_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe25c, data, tail15] + - [0xbe25c, data, tail16] - [0xbe274, .rodata, ov_SC02_003_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe294, data, tail16] + - [0xbe294, data, tail17] - [0xbe314, .rodata, ov_SC02_003_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe328, data, tail17] + - [0xbe328, data, tail18] - [0xbe4d0, .rodata, ov_SC02_003_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe648, data, tail18] + - [0xbe648, data, tail19] - [0xbe6d8, .rodata, ov_SC02_003_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe764, data, tail19] + - [0xbe764, data, tail20] - [0xbe768, .rodata, ov_SC02_003_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe77c, data, tail20] + - [0xbe77c, data, tail21] - [0xbe944, .rodata, ov_SC02_003_jr_8017FCB0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbe964, data, tail21] + - [0xbe964, data, tail22] - [0xC070C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xC070F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC02_004.yaml b/config/splat.ov_SC02_004.yaml index 6783e2e7b0..f317a967db 100644 --- a/config/splat.ov_SC02_004.yaml +++ b/config/splat.ov_SC02_004.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC02_004_jr_8017A4AC] - [0x52cd4, c, ov_SC02_004_jr_8017AE2C] - [0x55b38, data, tail] + - [0x6bc58, .rodata, ov_SC02_004] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x6bc6c, data, tail2] - [0x6bd34, .rodata, ov_SC02_004_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6be14, data, tail2] + - [0x6be14, data, tail3] - [0x6be2c, .rodata, ov_SC02_004_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6be40, data, tail3] + - [0x6be40, data, tail4] - [0x6be44, .rodata, ov_SC02_004_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6be58, data, tail4] + - [0x6be58, data, tail5] - [0x6be5c, .rodata, ov_SC02_004_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6be70, data, tail5] + - [0x6be70, data, tail6] - [0x6beac, .rodata, ov_SC02_004_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6bf10, data, tail6] + - [0x6bf10, data, tail7] - [0x6c51c, .rodata, ov_SC02_004_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6c550, data, tail7] + - [0x6c550, data, tail8] - [0x6c554, .rodata, ov_SC02_004_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6c588, data, tail8] + - [0x6c588, data, tail9] - [0x6c5c4, .rodata, ov_SC02_004_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6c5d8, data, tail9] + - [0x6c5d8, data, tail10] - [0x6c5f0, .rodata, ov_SC02_004_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6c65c, data, tail10] + - [0x6c65c, data, tail11] - [0x6c6cc, .rodata, ov_SC02_004_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x6c710, .rodata, ov_SC02_004_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6c758, data, tail11] + - [0x6c758, data, tail12] - [0x6c7b8, .rodata, ov_SC02_004_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6c7ec, data, tail12] + - [0x6c7ec, data, tail13] - [0x6c7f0, .rodata, ov_SC02_004_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6c80c, data, tail13] + - [0x6c80c, data, tail14] - [0x6c810, .rodata, ov_SC02_004_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6c82c, data, tail14] + - [0x6c82c, data, tail15] - [0x6c850, .rodata, ov_SC02_004_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6c86c, data, tail15] + - [0x6c86c, data, tail16] - [0x6c884, .rodata, ov_SC02_004_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6c8a4, data, tail16] + - [0x6c8a4, data, tail17] - [0x6c924, .rodata, ov_SC02_004_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6c938, data, tail17] + - [0x6c938, data, tail18] - [0x6cae0, .rodata, ov_SC02_004_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6cc58, data, tail18] + - [0x6cc58, data, tail19] - [0x6cce8, .rodata, ov_SC02_004_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6cd74, data, tail19] + - [0x6cd74, data, tail20] - [0x6cd78, .rodata, ov_SC02_004_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6cd8c, data, tail20] + - [0x6cd8c, data, tail21] - [0x6E26C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x6E26F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC02_005.yaml b/config/splat.ov_SC02_005.yaml index e2a3d080ac..6f00e786e8 100644 --- a/config/splat.ov_SC02_005.yaml +++ b/config/splat.ov_SC02_005.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC02_005_jr_8017A4AC] - [0x52cd4, c, ov_SC02_005_jr_8017AE2C] - [0x6873c, data, tail] + - [0xb998c, .rodata, ov_SC02_005] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xb99a0, data, tail2] - [0xb9a68, .rodata, ov_SC02_005_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb9b48, data, tail2] + - [0xb9b48, data, tail3] - [0xb9b60, .rodata, ov_SC02_005_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb9b74, data, tail3] + - [0xb9b74, data, tail4] - [0xb9b78, .rodata, ov_SC02_005_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb9b8c, data, tail4] + - [0xb9b8c, data, tail5] - [0xb9b90, .rodata, ov_SC02_005_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb9ba4, data, tail5] + - [0xb9ba4, data, tail6] - [0xb9be0, .rodata, ov_SC02_005_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb9c44, data, tail6] + - [0xb9c44, data, tail7] - [0xba250, .rodata, ov_SC02_005_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xba284, data, tail7] + - [0xba284, data, tail8] - [0xba288, .rodata, ov_SC02_005_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xba2bc, data, tail8] + - [0xba2bc, data, tail9] - [0xba2f8, .rodata, ov_SC02_005_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xba30c, data, tail9] + - [0xba30c, data, tail10] - [0xba324, .rodata, ov_SC02_005_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xba390, data, tail10] + - [0xba390, data, tail11] - [0xba400, .rodata, ov_SC02_005_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xba444, .rodata, ov_SC02_005_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xba48c, data, tail11] + - [0xba48c, data, tail12] - [0xba4ec, .rodata, ov_SC02_005_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xba520, data, tail12] + - [0xba520, data, tail13] - [0xba524, .rodata, ov_SC02_005_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xba540, data, tail13] + - [0xba540, data, tail14] - [0xba544, .rodata, ov_SC02_005_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xba560, data, tail14] + - [0xba560, data, tail15] - [0xba584, .rodata, ov_SC02_005_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xba5a0, data, tail15] + - [0xba5a0, data, tail16] - [0xba5b8, .rodata, ov_SC02_005_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xba5d8, data, tail16] + - [0xba5d8, data, tail17] - [0xba658, .rodata, ov_SC02_005_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xba66c, data, tail17] + - [0xba66c, data, tail18] - [0xba814, .rodata, ov_SC02_005_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xba98c, data, tail18] + - [0xba98c, data, tail19] - [0xbaa1c, .rodata, ov_SC02_005_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbaaa8, data, tail19] + - [0xbaaa8, data, tail20] - [0xbaaac, .rodata, ov_SC02_005_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbaac0, data, tail20] + - [0xbaac0, data, tail21] - [0xBCB00, bin, trailing] # final 1 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xBCB01] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC02_011.yaml b/config/splat.ov_SC02_011.yaml index b20dcdfd20..5a1ec2145b 100644 --- a/config/splat.ov_SC02_011.yaml +++ b/config/splat.ov_SC02_011.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC02_011_jr_8017A4AC] - [0x52cd4, c, ov_SC02_011_jr_8017AE2C] - [0x68b8c, data, tail] + - [0xc0ae8, .rodata, ov_SC02_011] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xc0afc, data, tail2] - [0xc0bc4, .rodata, ov_SC02_011_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0ca4, data, tail2] + - [0xc0ca4, data, tail3] - [0xc0cbc, .rodata, ov_SC02_011_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0cd0, data, tail3] + - [0xc0cd0, data, tail4] - [0xc0cd4, .rodata, ov_SC02_011_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0ce8, data, tail4] + - [0xc0ce8, data, tail5] - [0xc0cec, .rodata, ov_SC02_011_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0d00, data, tail5] + - [0xc0d00, data, tail6] - [0xc0d3c, .rodata, ov_SC02_011_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0da0, data, tail6] + - [0xc0da0, data, tail7] - [0xc13ac, .rodata, ov_SC02_011_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc13e0, data, tail7] + - [0xc13e0, data, tail8] - [0xc13e4, .rodata, ov_SC02_011_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1418, data, tail8] + - [0xc1418, data, tail9] - [0xc1454, .rodata, ov_SC02_011_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1468, data, tail9] + - [0xc1468, data, tail10] - [0xc1480, .rodata, ov_SC02_011_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc14ec, data, tail10] + - [0xc14ec, data, tail11] - [0xc155c, .rodata, ov_SC02_011_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xc15a0, .rodata, ov_SC02_011_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc15e8, data, tail11] + - [0xc15e8, data, tail12] - [0xc1648, .rodata, ov_SC02_011_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc167c, data, tail12] + - [0xc167c, data, tail13] - [0xc1680, .rodata, ov_SC02_011_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc169c, data, tail13] + - [0xc169c, data, tail14] - [0xc16a0, .rodata, ov_SC02_011_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc16bc, data, tail14] + - [0xc16bc, data, tail15] - [0xc16e0, .rodata, ov_SC02_011_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc16fc, data, tail15] + - [0xc16fc, data, tail16] - [0xc1714, .rodata, ov_SC02_011_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1734, data, tail16] + - [0xc1734, data, tail17] - [0xc17b4, .rodata, ov_SC02_011_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc17c8, data, tail17] + - [0xc17c8, data, tail18] - [0xc1970, .rodata, ov_SC02_011_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1ae8, data, tail18] + - [0xc1ae8, data, tail19] - [0xc1b78, .rodata, ov_SC02_011_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1c04, data, tail19] + - [0xc1c04, data, tail20] - [0xc1c08, .rodata, ov_SC02_011_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1c1c, data, tail20] + - [0xc1c1c, data, tail21] - [0xC3924, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xC3927] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC02_015.yaml b/config/splat.ov_SC02_015.yaml index ac3f973641..a74e0a053a 100644 --- a/config/splat.ov_SC02_015.yaml +++ b/config/splat.ov_SC02_015.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC02_015_jr_8017A4AC] - [0x52cd4, c, ov_SC02_015_jr_8017AE2C] - [0x560a0, data, tail] + - [0x65d40, .rodata, ov_SC02_015] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x65d54, data, tail2] - [0x65e1c, .rodata, ov_SC02_015_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65efc, data, tail2] + - [0x65efc, data, tail3] - [0x65f14, .rodata, ov_SC02_015_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65f28, data, tail3] + - [0x65f28, data, tail4] - [0x65f2c, .rodata, ov_SC02_015_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65f40, data, tail4] + - [0x65f40, data, tail5] - [0x65f44, .rodata, ov_SC02_015_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65f58, data, tail5] + - [0x65f58, data, tail6] - [0x65f94, .rodata, ov_SC02_015_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65ff8, data, tail6] + - [0x65ff8, data, tail7] - [0x66604, .rodata, ov_SC02_015_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x66638, data, tail7] + - [0x66638, data, tail8] - [0x6663c, .rodata, ov_SC02_015_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x66670, data, tail8] + - [0x66670, data, tail9] - [0x666ac, .rodata, ov_SC02_015_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x666c0, data, tail9] + - [0x666c0, data, tail10] - [0x666d8, .rodata, ov_SC02_015_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x66744, data, tail10] + - [0x66744, data, tail11] - [0x667b4, .rodata, ov_SC02_015_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x667f8, .rodata, ov_SC02_015_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x66840, data, tail11] + - [0x66840, data, tail12] - [0x668a0, .rodata, ov_SC02_015_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x668d4, data, tail12] + - [0x668d4, data, tail13] - [0x668d8, .rodata, ov_SC02_015_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x668f4, data, tail13] + - [0x668f4, data, tail14] - [0x668f8, .rodata, ov_SC02_015_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x66914, data, tail14] + - [0x66914, data, tail15] - [0x66938, .rodata, ov_SC02_015_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x66954, data, tail15] + - [0x66954, data, tail16] - [0x6696c, .rodata, ov_SC02_015_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6698c, data, tail16] + - [0x6698c, data, tail17] - [0x66a0c, .rodata, ov_SC02_015_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x66a20, data, tail17] + - [0x66a20, data, tail18] - [0x66bc8, .rodata, ov_SC02_015_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x66d40, data, tail18] + - [0x66d40, data, tail19] - [0x66dd0, .rodata, ov_SC02_015_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x66e5c, data, tail19] + - [0x66e5c, data, tail20] - [0x66e60, .rodata, ov_SC02_015_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x66e74, data, tail20] + - [0x66e74, data, tail21] - [0x68544, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x68547] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC02_016.yaml b/config/splat.ov_SC02_016.yaml index 69040925b4..5ca1371519 100644 --- a/config/splat.ov_SC02_016.yaml +++ b/config/splat.ov_SC02_016.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC02_016_jr_8017AE2C] - [0x55b18, c, ov_SC02_016_jr_8017DC70] - [0x5c2d8, data, tail] + - [0x89920, .rodata, ov_SC02_016] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x89934, data, tail2] - [0x899fc, .rodata, ov_SC02_016_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89adc, data, tail2] + - [0x89adc, data, tail3] - [0x89af4, .rodata, ov_SC02_016_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89b08, data, tail3] + - [0x89b08, data, tail4] - [0x89b0c, .rodata, ov_SC02_016_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89b20, data, tail4] + - [0x89b20, data, tail5] - [0x89b24, .rodata, ov_SC02_016_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89b38, data, tail5] + - [0x89b38, data, tail6] - [0x89b74, .rodata, ov_SC02_016_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89bd8, data, tail6] + - [0x89bd8, data, tail7] - [0x8a1e4, .rodata, ov_SC02_016_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8a218, data, tail7] + - [0x8a218, data, tail8] - [0x8a21c, .rodata, ov_SC02_016_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8a250, data, tail8] + - [0x8a250, data, tail9] - [0x8a28c, .rodata, ov_SC02_016_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8a2a0, data, tail9] + - [0x8a2a0, data, tail10] - [0x8a2b8, .rodata, ov_SC02_016_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8a324, data, tail10] + - [0x8a324, data, tail11] - [0x8a394, .rodata, ov_SC02_016_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x8a3d8, .rodata, ov_SC02_016_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8a420, data, tail11] + - [0x8a420, data, tail12] - [0x8a480, .rodata, ov_SC02_016_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8a4b4, data, tail12] + - [0x8a4b4, data, tail13] - [0x8a4b8, .rodata, ov_SC02_016_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8a4d4, data, tail13] + - [0x8a4d4, data, tail14] - [0x8a4d8, .rodata, ov_SC02_016_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8a4f4, data, tail14] + - [0x8a4f4, data, tail15] - [0x8a518, .rodata, ov_SC02_016_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8a534, data, tail15] + - [0x8a534, data, tail16] - [0x8a54c, .rodata, ov_SC02_016_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8a56c, data, tail16] + - [0x8a56c, data, tail17] - [0x8a5ec, .rodata, ov_SC02_016_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8a600, data, tail17] + - [0x8a600, data, tail18] - [0x8a7a8, .rodata, ov_SC02_016_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8a920, data, tail18] + - [0x8a920, data, tail19] - [0x8a9b0, .rodata, ov_SC02_016_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8aa3c, data, tail19] + - [0x8aa3c, data, tail20] - [0x8aa40, .rodata, ov_SC02_016_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x8aa54, .rodata, ov_SC02_016_jr_8017DC70] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8aa74, data, tail20] + - [0x8aa74, data, tail21] - [0x8C97C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x8C97F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC02_017.yaml b/config/splat.ov_SC02_017.yaml index 63bf932ae8..6180ce15a2 100644 --- a/config/splat.ov_SC02_017.yaml +++ b/config/splat.ov_SC02_017.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC02_017_jr_8017AE2C] - [0x55ddc, c, ov_SC02_017_jr_8017DF34] - [0x62330, data, tail] + - [0xc5140, .rodata, ov_SC02_017] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xc5154, data, tail2] - [0xc521c, .rodata, ov_SC02_017_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc52fc, data, tail2] + - [0xc52fc, data, tail3] - [0xc5314, .rodata, ov_SC02_017_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5328, data, tail3] + - [0xc5328, data, tail4] - [0xc532c, .rodata, ov_SC02_017_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5340, data, tail4] + - [0xc5340, data, tail5] - [0xc5344, .rodata, ov_SC02_017_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5358, data, tail5] + - [0xc5358, data, tail6] - [0xc5394, .rodata, ov_SC02_017_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc53f8, data, tail6] + - [0xc53f8, data, tail7] - [0xc5a04, .rodata, ov_SC02_017_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5a38, data, tail7] + - [0xc5a38, data, tail8] - [0xc5a3c, .rodata, ov_SC02_017_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5a70, data, tail8] + - [0xc5a70, data, tail9] - [0xc5aac, .rodata, ov_SC02_017_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5ac0, data, tail9] + - [0xc5ac0, data, tail10] - [0xc5ad8, .rodata, ov_SC02_017_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5b44, data, tail10] + - [0xc5b44, data, tail11] - [0xc5bb4, .rodata, ov_SC02_017_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xc5bf8, .rodata, ov_SC02_017_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5c40, data, tail11] + - [0xc5c40, data, tail12] - [0xc5ca0, .rodata, ov_SC02_017_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5cd4, data, tail12] + - [0xc5cd4, data, tail13] - [0xc5cd8, .rodata, ov_SC02_017_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5cf4, data, tail13] + - [0xc5cf4, data, tail14] - [0xc5cf8, .rodata, ov_SC02_017_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5d14, data, tail14] + - [0xc5d14, data, tail15] - [0xc5d38, .rodata, ov_SC02_017_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5d54, data, tail15] + - [0xc5d54, data, tail16] - [0xc5d6c, .rodata, ov_SC02_017_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5d8c, data, tail16] + - [0xc5d8c, data, tail17] - [0xc5e0c, .rodata, ov_SC02_017_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5e20, data, tail17] + - [0xc5e20, data, tail18] - [0xc5fc8, .rodata, ov_SC02_017_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc6140, data, tail18] + - [0xc6140, data, tail19] - [0xc61d0, .rodata, ov_SC02_017_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc625c, data, tail19] + - [0xc625c, data, tail20] - [0xc6260, .rodata, ov_SC02_017_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xc6274, .rodata, ov_SC02_017_jr_8017DF34] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc6294, data, tail20] + - [0xc6294, data, tail21] - [0xC7BDC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xC7BDF] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC02_021.yaml b/config/splat.ov_SC02_021.yaml index e52967fe14..5c8b981294 100644 --- a/config/splat.ov_SC02_021.yaml +++ b/config/splat.ov_SC02_021.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC02_021_jr_8017AE2C] - [0x5413c, c, ov_SC02_021_jr_8017C294] - [0x57924, data, tail] + - [0x686bc, .rodata, ov_SC02_021] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x686d0, data, tail2] - [0x68798, .rodata, ov_SC02_021_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68878, data, tail2] + - [0x68878, data, tail3] - [0x68890, .rodata, ov_SC02_021_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x688a4, data, tail3] + - [0x688a4, data, tail4] - [0x688a8, .rodata, ov_SC02_021_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x688bc, data, tail4] + - [0x688bc, data, tail5] - [0x688c0, .rodata, ov_SC02_021_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x688d4, data, tail5] + - [0x688d4, data, tail6] - [0x68910, .rodata, ov_SC02_021_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68974, data, tail6] + - [0x68974, data, tail7] - [0x68f80, .rodata, ov_SC02_021_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68fb4, data, tail7] + - [0x68fb4, data, tail8] - [0x68fb8, .rodata, ov_SC02_021_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68fec, data, tail8] + - [0x68fec, data, tail9] - [0x69028, .rodata, ov_SC02_021_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6903c, data, tail9] + - [0x6903c, data, tail10] - [0x69054, .rodata, ov_SC02_021_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x690c0, data, tail10] + - [0x690c0, data, tail11] - [0x69130, .rodata, ov_SC02_021_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x69174, .rodata, ov_SC02_021_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x691bc, data, tail11] + - [0x691bc, data, tail12] - [0x6921c, .rodata, ov_SC02_021_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x69250, data, tail12] + - [0x69250, data, tail13] - [0x69254, .rodata, ov_SC02_021_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x69270, data, tail13] + - [0x69270, data, tail14] - [0x69274, .rodata, ov_SC02_021_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x69290, data, tail14] + - [0x69290, data, tail15] - [0x692b4, .rodata, ov_SC02_021_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x692d0, data, tail15] + - [0x692d0, data, tail16] - [0x692e8, .rodata, ov_SC02_021_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x69308, data, tail16] + - [0x69308, data, tail17] - [0x69388, .rodata, ov_SC02_021_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6939c, data, tail17] + - [0x6939c, data, tail18] - [0x69544, .rodata, ov_SC02_021_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x696bc, data, tail18] + - [0x696bc, data, tail19] - [0x6974c, .rodata, ov_SC02_021_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x697d8, data, tail19] + - [0x697d8, data, tail20] - [0x697dc, .rodata, ov_SC02_021_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x697f0, .rodata, ov_SC02_021_jr_8017C294] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x69810, data, tail20] + - [0x69810, data, tail21] - [0x6B744, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x6B747] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC02_026.yaml b/config/splat.ov_SC02_026.yaml index 2e643e7fd4..7e6bcf4f60 100644 --- a/config/splat.ov_SC02_026.yaml +++ b/config/splat.ov_SC02_026.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC02_026_jr_8017AE2C] - [0x54028, c, ov_SC02_026_jr_8017C180] - [0x5df78, data, tail] + - [0xa5af0, .rodata, ov_SC02_026] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xa5b04, data, tail2] - [0xa5bcc, .rodata, ov_SC02_026_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa5cac, data, tail2] + - [0xa5cac, data, tail3] - [0xa5cc4, .rodata, ov_SC02_026_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa5cd8, data, tail3] + - [0xa5cd8, data, tail4] - [0xa5cdc, .rodata, ov_SC02_026_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa5cf0, data, tail4] + - [0xa5cf0, data, tail5] - [0xa5cf4, .rodata, ov_SC02_026_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa5d08, data, tail5] + - [0xa5d08, data, tail6] - [0xa5d44, .rodata, ov_SC02_026_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa5da8, data, tail6] + - [0xa5da8, data, tail7] - [0xa63b4, .rodata, ov_SC02_026_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa63e8, data, tail7] + - [0xa63e8, data, tail8] - [0xa63ec, .rodata, ov_SC02_026_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa6420, data, tail8] + - [0xa6420, data, tail9] - [0xa645c, .rodata, ov_SC02_026_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa6470, data, tail9] + - [0xa6470, data, tail10] - [0xa6488, .rodata, ov_SC02_026_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa64f4, data, tail10] + - [0xa64f4, data, tail11] - [0xa6564, .rodata, ov_SC02_026_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa65a8, .rodata, ov_SC02_026_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa65f0, data, tail11] + - [0xa65f0, data, tail12] - [0xa6650, .rodata, ov_SC02_026_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa6684, data, tail12] + - [0xa6684, data, tail13] - [0xa6688, .rodata, ov_SC02_026_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa66a4, data, tail13] + - [0xa66a4, data, tail14] - [0xa66a8, .rodata, ov_SC02_026_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa66c4, data, tail14] + - [0xa66c4, data, tail15] - [0xa66e8, .rodata, ov_SC02_026_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa6704, data, tail15] + - [0xa6704, data, tail16] - [0xa671c, .rodata, ov_SC02_026_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa673c, data, tail16] + - [0xa673c, data, tail17] - [0xa67bc, .rodata, ov_SC02_026_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa67d0, data, tail17] + - [0xa67d0, data, tail18] - [0xa6978, .rodata, ov_SC02_026_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa6af0, data, tail18] + - [0xa6af0, data, tail19] - [0xa6b80, .rodata, ov_SC02_026_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa6c0c, data, tail19] + - [0xa6c0c, data, tail20] - [0xa6c10, .rodata, ov_SC02_026_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa6c24, .rodata, ov_SC02_026_jr_8017C180] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa6c44, data, tail20] + - [0xa6c44, data, tail21] - [0xA8164, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xA8167] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC02_027.yaml b/config/splat.ov_SC02_027.yaml index f72b80b644..926d987d32 100644 --- a/config/splat.ov_SC02_027.yaml +++ b/config/splat.ov_SC02_027.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC02_027_jr_8017AE2C] - [0x55740, c, ov_SC02_027_jr_8017D898] - [0x6309c, data, tail] + - [0xaf85c, .rodata, ov_SC02_027] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xaf870, data, tail2] - [0xaf938, .rodata, ov_SC02_027_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xafa18, data, tail2] + - [0xafa18, data, tail3] - [0xafa30, .rodata, ov_SC02_027_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xafa44, data, tail3] + - [0xafa44, data, tail4] - [0xafa48, .rodata, ov_SC02_027_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xafa5c, data, tail4] + - [0xafa5c, data, tail5] - [0xafa60, .rodata, ov_SC02_027_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xafa74, data, tail5] + - [0xafa74, data, tail6] - [0xafab0, .rodata, ov_SC02_027_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xafb14, data, tail6] + - [0xafb14, data, tail7] - [0xb0120, .rodata, ov_SC02_027_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0154, data, tail7] + - [0xb0154, data, tail8] - [0xb0158, .rodata, ov_SC02_027_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb018c, data, tail8] + - [0xb018c, data, tail9] - [0xb01c8, .rodata, ov_SC02_027_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb01dc, data, tail9] + - [0xb01dc, data, tail10] - [0xb01f4, .rodata, ov_SC02_027_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0260, data, tail10] + - [0xb0260, data, tail11] - [0xb02d0, .rodata, ov_SC02_027_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xb0314, .rodata, ov_SC02_027_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb035c, data, tail11] + - [0xb035c, data, tail12] - [0xb03bc, .rodata, ov_SC02_027_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb03f0, data, tail12] + - [0xb03f0, data, tail13] - [0xb03f4, .rodata, ov_SC02_027_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0410, data, tail13] + - [0xb0410, data, tail14] - [0xb0414, .rodata, ov_SC02_027_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0430, data, tail14] + - [0xb0430, data, tail15] - [0xb0454, .rodata, ov_SC02_027_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0470, data, tail15] + - [0xb0470, data, tail16] - [0xb0488, .rodata, ov_SC02_027_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb04a8, data, tail16] + - [0xb04a8, data, tail17] - [0xb0528, .rodata, ov_SC02_027_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb053c, data, tail17] + - [0xb053c, data, tail18] - [0xb06e4, .rodata, ov_SC02_027_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb085c, data, tail18] + - [0xb085c, data, tail19] - [0xb08ec, .rodata, ov_SC02_027_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb0978, data, tail19] + - [0xb0978, data, tail20] - [0xb097c, .rodata, ov_SC02_027_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xb0990, .rodata, ov_SC02_027_jr_8017D898] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb09b0, data, tail20] + - [0xb09b0, data, tail21] - [0xB28E4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xB28E7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC02_028.yaml b/config/splat.ov_SC02_028.yaml index 498b93607c..6e0c814fe5 100644 --- a/config/splat.ov_SC02_028.yaml +++ b/config/splat.ov_SC02_028.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC02_028_jr_8017AE2C] - [0x55740, c, ov_SC02_028_jr_8017D898] - [0x632a0, data, tail] + - [0xa87e0, .rodata, ov_SC02_028] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xa87f4, data, tail2] - [0xa88bc, .rodata, ov_SC02_028_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa899c, data, tail2] + - [0xa899c, data, tail3] - [0xa89b4, .rodata, ov_SC02_028_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa89c8, data, tail3] + - [0xa89c8, data, tail4] - [0xa89cc, .rodata, ov_SC02_028_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa89e0, data, tail4] + - [0xa89e0, data, tail5] - [0xa89e4, .rodata, ov_SC02_028_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa89f8, data, tail5] + - [0xa89f8, data, tail6] - [0xa8a34, .rodata, ov_SC02_028_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa8a98, data, tail6] + - [0xa8a98, data, tail7] - [0xa90a4, .rodata, ov_SC02_028_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa90d8, data, tail7] + - [0xa90d8, data, tail8] - [0xa90dc, .rodata, ov_SC02_028_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9110, data, tail8] + - [0xa9110, data, tail9] - [0xa914c, .rodata, ov_SC02_028_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9160, data, tail9] + - [0xa9160, data, tail10] - [0xa9178, .rodata, ov_SC02_028_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa91e4, data, tail10] + - [0xa91e4, data, tail11] - [0xa9254, .rodata, ov_SC02_028_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa9298, .rodata, ov_SC02_028_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa92e0, data, tail11] + - [0xa92e0, data, tail12] - [0xa9340, .rodata, ov_SC02_028_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9374, data, tail12] + - [0xa9374, data, tail13] - [0xa9378, .rodata, ov_SC02_028_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9394, data, tail13] + - [0xa9394, data, tail14] - [0xa9398, .rodata, ov_SC02_028_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa93b4, data, tail14] + - [0xa93b4, data, tail15] - [0xa93d8, .rodata, ov_SC02_028_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa93f4, data, tail15] + - [0xa93f4, data, tail16] - [0xa940c, .rodata, ov_SC02_028_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa942c, data, tail16] + - [0xa942c, data, tail17] - [0xa94ac, .rodata, ov_SC02_028_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa94c0, data, tail17] + - [0xa94c0, data, tail18] - [0xa9668, .rodata, ov_SC02_028_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa97e0, data, tail18] + - [0xa97e0, data, tail19] - [0xa9870, .rodata, ov_SC02_028_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa98fc, data, tail19] + - [0xa98fc, data, tail20] - [0xa9900, .rodata, ov_SC02_028_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa9914, .rodata, ov_SC02_028_jr_8017D898] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9934, data, tail20] + - [0xa9934, data, tail21] - [0xAB4E4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xAB4E7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC02_031.yaml b/config/splat.ov_SC02_031.yaml index c95bac7bb5..bd7c723598 100644 --- a/config/splat.ov_SC02_031.yaml +++ b/config/splat.ov_SC02_031.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC02_031_jr_8017A4AC] - [0x52cd4, c, ov_SC02_031_jr_8017AE2C] - [0x5cacc, data, tail] + - [0x8cfdc, .rodata, ov_SC02_031] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x8cff0, data, tail2] - [0x8d0b8, .rodata, ov_SC02_031_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8d198, data, tail2] + - [0x8d198, data, tail3] - [0x8d1b0, .rodata, ov_SC02_031_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8d1c4, data, tail3] + - [0x8d1c4, data, tail4] - [0x8d1c8, .rodata, ov_SC02_031_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8d1dc, data, tail4] + - [0x8d1dc, data, tail5] - [0x8d1e0, .rodata, ov_SC02_031_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8d1f4, data, tail5] + - [0x8d1f4, data, tail6] - [0x8d230, .rodata, ov_SC02_031_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8d294, data, tail6] + - [0x8d294, data, tail7] - [0x8d8a0, .rodata, ov_SC02_031_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8d8d4, data, tail7] + - [0x8d8d4, data, tail8] - [0x8d8d8, .rodata, ov_SC02_031_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8d90c, data, tail8] + - [0x8d90c, data, tail9] - [0x8d948, .rodata, ov_SC02_031_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8d95c, data, tail9] + - [0x8d95c, data, tail10] - [0x8d974, .rodata, ov_SC02_031_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8d9e0, data, tail10] + - [0x8d9e0, data, tail11] - [0x8da50, .rodata, ov_SC02_031_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x8da94, .rodata, ov_SC02_031_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8dadc, data, tail11] + - [0x8dadc, data, tail12] - [0x8db3c, .rodata, ov_SC02_031_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8db70, data, tail12] + - [0x8db70, data, tail13] - [0x8db74, .rodata, ov_SC02_031_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8db90, data, tail13] + - [0x8db90, data, tail14] - [0x8db94, .rodata, ov_SC02_031_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8dbb0, data, tail14] + - [0x8dbb0, data, tail15] - [0x8dbd4, .rodata, ov_SC02_031_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8dbf0, data, tail15] + - [0x8dbf0, data, tail16] - [0x8dc08, .rodata, ov_SC02_031_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8dc28, data, tail16] + - [0x8dc28, data, tail17] - [0x8dca8, .rodata, ov_SC02_031_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8dcbc, data, tail17] + - [0x8dcbc, data, tail18] - [0x8de64, .rodata, ov_SC02_031_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8dfdc, data, tail18] + - [0x8dfdc, data, tail19] - [0x8e06c, .rodata, ov_SC02_031_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8e0f8, data, tail19] + - [0x8e0f8, data, tail20] - [0x8e0fc, .rodata, ov_SC02_031_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8e110, data, tail20] + - [0x8e110, data, tail21] - [0x8F9B4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x8F9B7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC02_035.yaml b/config/splat.ov_SC02_035.yaml index f0a29f03d4..7c472c7814 100644 --- a/config/splat.ov_SC02_035.yaml +++ b/config/splat.ov_SC02_035.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC02_035_jr_8017AE2C] - [0x53d64, c, ov_SC02_035_jr_8017BEBC] - [0x5c32c, data, tail] + - [0x942a4, .rodata, ov_SC02_035] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x942b8, data, tail2] - [0x94380, .rodata, ov_SC02_035_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94460, data, tail2] + - [0x94460, data, tail3] - [0x94478, .rodata, ov_SC02_035_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9448c, data, tail3] + - [0x9448c, data, tail4] - [0x94490, .rodata, ov_SC02_035_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x944a4, data, tail4] + - [0x944a4, data, tail5] - [0x944a8, .rodata, ov_SC02_035_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x944bc, data, tail5] + - [0x944bc, data, tail6] - [0x944f8, .rodata, ov_SC02_035_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9455c, data, tail6] + - [0x9455c, data, tail7] - [0x94b68, .rodata, ov_SC02_035_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94b9c, data, tail7] + - [0x94b9c, data, tail8] - [0x94ba0, .rodata, ov_SC02_035_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94bd4, data, tail8] + - [0x94bd4, data, tail9] - [0x94c10, .rodata, ov_SC02_035_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94c24, data, tail9] + - [0x94c24, data, tail10] - [0x94c3c, .rodata, ov_SC02_035_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94ca8, data, tail10] + - [0x94ca8, data, tail11] - [0x94d18, .rodata, ov_SC02_035_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x94d5c, .rodata, ov_SC02_035_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94da4, data, tail11] + - [0x94da4, data, tail12] - [0x94e04, .rodata, ov_SC02_035_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94e38, data, tail12] + - [0x94e38, data, tail13] - [0x94e3c, .rodata, ov_SC02_035_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94e58, data, tail13] + - [0x94e58, data, tail14] - [0x94e5c, .rodata, ov_SC02_035_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94e78, data, tail14] + - [0x94e78, data, tail15] - [0x94e9c, .rodata, ov_SC02_035_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94eb8, data, tail15] + - [0x94eb8, data, tail16] - [0x94ed0, .rodata, ov_SC02_035_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94ef0, data, tail16] + - [0x94ef0, data, tail17] - [0x94f70, .rodata, ov_SC02_035_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94f84, data, tail17] + - [0x94f84, data, tail18] - [0x9512c, .rodata, ov_SC02_035_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x952a4, data, tail18] + - [0x952a4, data, tail19] - [0x95334, .rodata, ov_SC02_035_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x953c0, data, tail19] + - [0x953c0, data, tail20] - [0x953c4, .rodata, ov_SC02_035_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x953d8, .rodata, ov_SC02_035_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x953f8, data, tail20] + - [0x953f8, data, tail21] - [0x968EC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x968EF] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC02_039.yaml b/config/splat.ov_SC02_039.yaml index 6c8be8bd99..3a9211979e 100644 --- a/config/splat.ov_SC02_039.yaml +++ b/config/splat.ov_SC02_039.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC02_039_jr_8017AE2C] - [0x53d64, c, ov_SC02_039_jr_8017BEBC] - [0x56f58, data, tail] + - [0x76690, .rodata, ov_SC02_039] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x766a4, data, tail2] - [0x7676c, .rodata, ov_SC02_039_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7684c, data, tail2] + - [0x7684c, data, tail3] - [0x76864, .rodata, ov_SC02_039_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x76878, data, tail3] + - [0x76878, data, tail4] - [0x7687c, .rodata, ov_SC02_039_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x76890, data, tail4] + - [0x76890, data, tail5] - [0x76894, .rodata, ov_SC02_039_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x768a8, data, tail5] + - [0x768a8, data, tail6] - [0x768e4, .rodata, ov_SC02_039_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x76948, data, tail6] + - [0x76948, data, tail7] - [0x76f54, .rodata, ov_SC02_039_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x76f88, data, tail7] + - [0x76f88, data, tail8] - [0x76f8c, .rodata, ov_SC02_039_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x76fc0, data, tail8] + - [0x76fc0, data, tail9] - [0x76ffc, .rodata, ov_SC02_039_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77010, data, tail9] + - [0x77010, data, tail10] - [0x77028, .rodata, ov_SC02_039_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77094, data, tail10] + - [0x77094, data, tail11] - [0x77104, .rodata, ov_SC02_039_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x77148, .rodata, ov_SC02_039_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77190, data, tail11] + - [0x77190, data, tail12] - [0x771f0, .rodata, ov_SC02_039_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77224, data, tail12] + - [0x77224, data, tail13] - [0x77228, .rodata, ov_SC02_039_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77244, data, tail13] + - [0x77244, data, tail14] - [0x77248, .rodata, ov_SC02_039_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77264, data, tail14] + - [0x77264, data, tail15] - [0x77288, .rodata, ov_SC02_039_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x772a4, data, tail15] + - [0x772a4, data, tail16] - [0x772bc, .rodata, ov_SC02_039_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x772dc, data, tail16] + - [0x772dc, data, tail17] - [0x7735c, .rodata, ov_SC02_039_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77370, data, tail17] + - [0x77370, data, tail18] - [0x77518, .rodata, ov_SC02_039_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77690, data, tail18] + - [0x77690, data, tail19] - [0x77720, .rodata, ov_SC02_039_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x777ac, data, tail19] + - [0x777ac, data, tail20] - [0x777b0, .rodata, ov_SC02_039_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x777c4, .rodata, ov_SC02_039_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x777e4, data, tail20] + - [0x777e4, data, tail21] - [0x78CA4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x78CA7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC02_041.yaml b/config/splat.ov_SC02_041.yaml index 7dd54af3e1..1024f4c687 100644 --- a/config/splat.ov_SC02_041.yaml +++ b/config/splat.ov_SC02_041.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC02_041_jr_8017AE2C] - [0x53d64, c, ov_SC02_041_jr_8017BEBC] - [0x5cc28, data, tail] + - [0x8e9fc, .rodata, ov_SC02_041] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x8ea10, data, tail2] - [0x8ead8, .rodata, ov_SC02_041_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8ebb8, data, tail2] + - [0x8ebb8, data, tail3] - [0x8ebd0, .rodata, ov_SC02_041_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8ebe4, data, tail3] + - [0x8ebe4, data, tail4] - [0x8ebe8, .rodata, ov_SC02_041_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8ebfc, data, tail4] + - [0x8ebfc, data, tail5] - [0x8ec00, .rodata, ov_SC02_041_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8ec14, data, tail5] + - [0x8ec14, data, tail6] - [0x8ec50, .rodata, ov_SC02_041_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8ecb4, data, tail6] + - [0x8ecb4, data, tail7] - [0x8f2c0, .rodata, ov_SC02_041_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f2f4, data, tail7] + - [0x8f2f4, data, tail8] - [0x8f2f8, .rodata, ov_SC02_041_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f32c, data, tail8] + - [0x8f32c, data, tail9] - [0x8f368, .rodata, ov_SC02_041_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f37c, data, tail9] + - [0x8f37c, data, tail10] - [0x8f394, .rodata, ov_SC02_041_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f400, data, tail10] + - [0x8f400, data, tail11] - [0x8f470, .rodata, ov_SC02_041_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x8f4b4, .rodata, ov_SC02_041_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f4fc, data, tail11] + - [0x8f4fc, data, tail12] - [0x8f55c, .rodata, ov_SC02_041_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f590, data, tail12] + - [0x8f590, data, tail13] - [0x8f594, .rodata, ov_SC02_041_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f5b0, data, tail13] + - [0x8f5b0, data, tail14] - [0x8f5b4, .rodata, ov_SC02_041_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f5d0, data, tail14] + - [0x8f5d0, data, tail15] - [0x8f5f4, .rodata, ov_SC02_041_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f610, data, tail15] + - [0x8f610, data, tail16] - [0x8f628, .rodata, ov_SC02_041_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f648, data, tail16] + - [0x8f648, data, tail17] - [0x8f6c8, .rodata, ov_SC02_041_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f6dc, data, tail17] + - [0x8f6dc, data, tail18] - [0x8f884, .rodata, ov_SC02_041_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f9fc, data, tail18] + - [0x8f9fc, data, tail19] - [0x8fa8c, .rodata, ov_SC02_041_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fb18, data, tail19] + - [0x8fb18, data, tail20] - [0x8fb1c, .rodata, ov_SC02_041_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x8fb30, .rodata, ov_SC02_041_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fb50, data, tail20] + - [0x8fb50, data, tail21] - [0x9157C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x9157F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_001.yaml b/config/splat.ov_SC03_001.yaml index 86d99c997f..bced7d4702 100644 --- a/config/splat.ov_SC03_001.yaml +++ b/config/splat.ov_SC03_001.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC03_001_jr_8017A4AC] - [0x52cd4, c, ov_SC03_001_jr_8017AE2C] - [0x650c8, data, tail] + - [0xc3b1c, .rodata, ov_SC03_001] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xc3b30, data, tail2] - [0xc3bf8, .rodata, ov_SC03_001_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc3cd8, data, tail2] + - [0xc3cd8, data, tail3] - [0xc3cf0, .rodata, ov_SC03_001_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc3d04, data, tail3] + - [0xc3d04, data, tail4] - [0xc3d08, .rodata, ov_SC03_001_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc3d1c, data, tail4] + - [0xc3d1c, data, tail5] - [0xc3d20, .rodata, ov_SC03_001_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc3d34, data, tail5] + - [0xc3d34, data, tail6] - [0xc3d70, .rodata, ov_SC03_001_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc3dd4, data, tail6] + - [0xc3dd4, data, tail7] - [0xc43e0, .rodata, ov_SC03_001_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc4414, data, tail7] + - [0xc4414, data, tail8] - [0xc4418, .rodata, ov_SC03_001_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc444c, data, tail8] + - [0xc444c, data, tail9] - [0xc4488, .rodata, ov_SC03_001_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc449c, data, tail9] + - [0xc449c, data, tail10] - [0xc44b4, .rodata, ov_SC03_001_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc4520, data, tail10] + - [0xc4520, data, tail11] - [0xc4590, .rodata, ov_SC03_001_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xc45d4, .rodata, ov_SC03_001_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc461c, data, tail11] + - [0xc461c, data, tail12] - [0xc467c, .rodata, ov_SC03_001_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc46b0, data, tail12] + - [0xc46b0, data, tail13] - [0xc46b4, .rodata, ov_SC03_001_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc46d0, data, tail13] + - [0xc46d0, data, tail14] - [0xc46d4, .rodata, ov_SC03_001_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc46f0, data, tail14] + - [0xc46f0, data, tail15] - [0xc4714, .rodata, ov_SC03_001_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc4730, data, tail15] + - [0xc4730, data, tail16] - [0xc4748, .rodata, ov_SC03_001_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc4768, data, tail16] + - [0xc4768, data, tail17] - [0xc47e8, .rodata, ov_SC03_001_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc47fc, data, tail17] + - [0xc47fc, data, tail18] - [0xc49a4, .rodata, ov_SC03_001_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc4b1c, data, tail18] + - [0xc4b1c, data, tail19] - [0xc4bac, .rodata, ov_SC03_001_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc4c38, data, tail19] + - [0xc4c38, data, tail20] - [0xc4c3c, .rodata, ov_SC03_001_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc4c50, data, tail20] + - [0xc4c50, data, tail21] - [0xC730C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xC730F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_002.yaml b/config/splat.ov_SC03_002.yaml index 3ab898dea6..0caf9e0f64 100644 --- a/config/splat.ov_SC03_002.yaml +++ b/config/splat.ov_SC03_002.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_002_jr_8017AE2C] - [0x554ac, c, ov_SC03_002_jr_8017D604] - [0x5d358, data, tail] + - [0xa1078, .rodata, ov_SC03_002] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xa108c, data, tail2] - [0xa1154, .rodata, ov_SC03_002_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1234, data, tail2] + - [0xa1234, data, tail3] - [0xa124c, .rodata, ov_SC03_002_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1260, data, tail3] + - [0xa1260, data, tail4] - [0xa1264, .rodata, ov_SC03_002_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1278, data, tail4] + - [0xa1278, data, tail5] - [0xa127c, .rodata, ov_SC03_002_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1290, data, tail5] + - [0xa1290, data, tail6] - [0xa12cc, .rodata, ov_SC03_002_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1330, data, tail6] + - [0xa1330, data, tail7] - [0xa193c, .rodata, ov_SC03_002_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1970, data, tail7] + - [0xa1970, data, tail8] - [0xa1974, .rodata, ov_SC03_002_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa19a8, data, tail8] + - [0xa19a8, data, tail9] - [0xa19e4, .rodata, ov_SC03_002_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa19f8, data, tail9] + - [0xa19f8, data, tail10] - [0xa1a10, .rodata, ov_SC03_002_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1a7c, data, tail10] + - [0xa1a7c, data, tail11] - [0xa1aec, .rodata, ov_SC03_002_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa1b30, .rodata, ov_SC03_002_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1b78, data, tail11] + - [0xa1b78, data, tail12] - [0xa1bd8, .rodata, ov_SC03_002_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1c0c, data, tail12] + - [0xa1c0c, data, tail13] - [0xa1c10, .rodata, ov_SC03_002_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1c2c, data, tail13] + - [0xa1c2c, data, tail14] - [0xa1c30, .rodata, ov_SC03_002_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1c4c, data, tail14] + - [0xa1c4c, data, tail15] - [0xa1c70, .rodata, ov_SC03_002_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1c8c, data, tail15] + - [0xa1c8c, data, tail16] - [0xa1ca4, .rodata, ov_SC03_002_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1cc4, data, tail16] + - [0xa1cc4, data, tail17] - [0xa1d44, .rodata, ov_SC03_002_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1d58, data, tail17] + - [0xa1d58, data, tail18] - [0xa1f00, .rodata, ov_SC03_002_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2078, data, tail18] + - [0xa2078, data, tail19] - [0xa2108, .rodata, ov_SC03_002_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2194, data, tail19] + - [0xa2194, data, tail20] - [0xa2198, .rodata, ov_SC03_002_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa21ac, .rodata, ov_SC03_002_jr_8017D604] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa21cc, data, tail20] + - [0xa21cc, data, tail21] - [0xA39F4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xA39F7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_003.yaml b/config/splat.ov_SC03_003.yaml index 3234a6d05d..0016d54171 100644 --- a/config/splat.ov_SC03_003.yaml +++ b/config/splat.ov_SC03_003.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC03_003_jr_8017A4AC] - [0x52cd4, c, ov_SC03_003_jr_8017AE2C] - [0x57120, data, tail] + - [0x653f8, .rodata, ov_SC03_003] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x6540c, data, tail2] - [0x654d4, .rodata, ov_SC03_003_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x655b4, data, tail2] + - [0x655b4, data, tail3] - [0x655cc, .rodata, ov_SC03_003_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x655e0, data, tail3] + - [0x655e0, data, tail4] - [0x655e4, .rodata, ov_SC03_003_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x655f8, data, tail4] + - [0x655f8, data, tail5] - [0x655fc, .rodata, ov_SC03_003_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65610, data, tail5] + - [0x65610, data, tail6] - [0x6564c, .rodata, ov_SC03_003_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x656b0, data, tail6] + - [0x656b0, data, tail7] - [0x65cbc, .rodata, ov_SC03_003_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65cf0, data, tail7] + - [0x65cf0, data, tail8] - [0x65cf4, .rodata, ov_SC03_003_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65d28, data, tail8] + - [0x65d28, data, tail9] - [0x65d64, .rodata, ov_SC03_003_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65d78, data, tail9] + - [0x65d78, data, tail10] - [0x65d90, .rodata, ov_SC03_003_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65dfc, data, tail10] + - [0x65dfc, data, tail11] - [0x65e6c, .rodata, ov_SC03_003_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x65eb0, .rodata, ov_SC03_003_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65ef8, data, tail11] + - [0x65ef8, data, tail12] - [0x65f58, .rodata, ov_SC03_003_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65f8c, data, tail12] + - [0x65f8c, data, tail13] - [0x65f90, .rodata, ov_SC03_003_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65fac, data, tail13] + - [0x65fac, data, tail14] - [0x65fb0, .rodata, ov_SC03_003_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65fcc, data, tail14] + - [0x65fcc, data, tail15] - [0x65ff0, .rodata, ov_SC03_003_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6600c, data, tail15] + - [0x6600c, data, tail16] - [0x66024, .rodata, ov_SC03_003_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x66044, data, tail16] + - [0x66044, data, tail17] - [0x660c4, .rodata, ov_SC03_003_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x660d8, data, tail17] + - [0x660d8, data, tail18] - [0x66280, .rodata, ov_SC03_003_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x663f8, data, tail18] + - [0x663f8, data, tail19] - [0x66488, .rodata, ov_SC03_003_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x66514, data, tail19] + - [0x66514, data, tail20] - [0x66518, .rodata, ov_SC03_003_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6652c, data, tail20] + - [0x6652c, data, tail21] - [0x67A24, bin, trailing] # final 1 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x67A25] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_006.yaml b/config/splat.ov_SC03_006.yaml index 8f7ceb57d8..51d5e89606 100644 --- a/config/splat.ov_SC03_006.yaml +++ b/config/splat.ov_SC03_006.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC03_006_jr_8017A4AC] - [0x52cd4, c, ov_SC03_006_jr_8017AE2C] - [0x6443c, data, tail] + - [0xcccb4, .rodata, ov_SC03_006] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xcccc8, data, tail2] - [0xccd90, .rodata, ov_SC03_006_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcce70, data, tail2] + - [0xcce70, data, tail3] - [0xcce88, .rodata, ov_SC03_006_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcce9c, data, tail3] + - [0xcce9c, data, tail4] - [0xccea0, .rodata, ov_SC03_006_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcceb4, data, tail4] + - [0xcceb4, data, tail5] - [0xcceb8, .rodata, ov_SC03_006_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xccecc, data, tail5] + - [0xccecc, data, tail6] - [0xccf08, .rodata, ov_SC03_006_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xccf6c, data, tail6] + - [0xccf6c, data, tail7] - [0xcd578, .rodata, ov_SC03_006_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcd5ac, data, tail7] + - [0xcd5ac, data, tail8] - [0xcd5b0, .rodata, ov_SC03_006_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcd5e4, data, tail8] + - [0xcd5e4, data, tail9] - [0xcd620, .rodata, ov_SC03_006_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcd634, data, tail9] + - [0xcd634, data, tail10] - [0xcd64c, .rodata, ov_SC03_006_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcd6b8, data, tail10] + - [0xcd6b8, data, tail11] - [0xcd728, .rodata, ov_SC03_006_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xcd76c, .rodata, ov_SC03_006_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcd7b4, data, tail11] + - [0xcd7b4, data, tail12] - [0xcd814, .rodata, ov_SC03_006_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcd848, data, tail12] + - [0xcd848, data, tail13] - [0xcd84c, .rodata, ov_SC03_006_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcd868, data, tail13] + - [0xcd868, data, tail14] - [0xcd86c, .rodata, ov_SC03_006_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcd888, data, tail14] + - [0xcd888, data, tail15] - [0xcd8ac, .rodata, ov_SC03_006_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcd8c8, data, tail15] + - [0xcd8c8, data, tail16] - [0xcd8e0, .rodata, ov_SC03_006_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcd900, data, tail16] + - [0xcd900, data, tail17] - [0xcd980, .rodata, ov_SC03_006_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcd994, data, tail17] + - [0xcd994, data, tail18] - [0xcdb3c, .rodata, ov_SC03_006_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcdcb4, data, tail18] + - [0xcdcb4, data, tail19] - [0xcdd44, .rodata, ov_SC03_006_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcddd0, data, tail19] + - [0xcddd0, data, tail20] - [0xcddd4, .rodata, ov_SC03_006_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xcdde8, data, tail20] + - [0xcdde8, data, tail21] - [0xCF75C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xCF75F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_007.yaml b/config/splat.ov_SC03_007.yaml index cd12a5c96d..6e20f2f141 100644 --- a/config/splat.ov_SC03_007.yaml +++ b/config/splat.ov_SC03_007.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC03_007_jr_8017A4AC] - [0x52cd4, c, ov_SC03_007_jr_8017AE2C] - [0x5f234, data, tail] + - [0xbf63c, .rodata, ov_SC03_007] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xbf650, data, tail2] - [0xbf718, .rodata, ov_SC03_007_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbf7f8, data, tail2] + - [0xbf7f8, data, tail3] - [0xbf810, .rodata, ov_SC03_007_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbf824, data, tail3] + - [0xbf824, data, tail4] - [0xbf828, .rodata, ov_SC03_007_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbf83c, data, tail4] + - [0xbf83c, data, tail5] - [0xbf840, .rodata, ov_SC03_007_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbf854, data, tail5] + - [0xbf854, data, tail6] - [0xbf890, .rodata, ov_SC03_007_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbf8f4, data, tail6] + - [0xbf8f4, data, tail7] - [0xbff00, .rodata, ov_SC03_007_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbff34, data, tail7] + - [0xbff34, data, tail8] - [0xbff38, .rodata, ov_SC03_007_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbff6c, data, tail8] + - [0xbff6c, data, tail9] - [0xbffa8, .rodata, ov_SC03_007_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbffbc, data, tail9] + - [0xbffbc, data, tail10] - [0xbffd4, .rodata, ov_SC03_007_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0040, data, tail10] + - [0xc0040, data, tail11] - [0xc00b0, .rodata, ov_SC03_007_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xc00f4, .rodata, ov_SC03_007_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc013c, data, tail11] + - [0xc013c, data, tail12] - [0xc019c, .rodata, ov_SC03_007_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc01d0, data, tail12] + - [0xc01d0, data, tail13] - [0xc01d4, .rodata, ov_SC03_007_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc01f0, data, tail13] + - [0xc01f0, data, tail14] - [0xc01f4, .rodata, ov_SC03_007_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0210, data, tail14] + - [0xc0210, data, tail15] - [0xc0234, .rodata, ov_SC03_007_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0250, data, tail15] + - [0xc0250, data, tail16] - [0xc0268, .rodata, ov_SC03_007_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0288, data, tail16] + - [0xc0288, data, tail17] - [0xc0308, .rodata, ov_SC03_007_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc031c, data, tail17] + - [0xc031c, data, tail18] - [0xc04c4, .rodata, ov_SC03_007_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc063c, data, tail18] + - [0xc063c, data, tail19] - [0xc06cc, .rodata, ov_SC03_007_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0758, data, tail19] + - [0xc0758, data, tail20] - [0xc075c, .rodata, ov_SC03_007_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0770, data, tail20] + - [0xc0770, data, tail21] - [0xC316C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xC316F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_010.yaml b/config/splat.ov_SC03_010.yaml index 69dec4b67f..05cfdbb5c6 100644 --- a/config/splat.ov_SC03_010.yaml +++ b/config/splat.ov_SC03_010.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC03_010_jr_8017A4AC] - [0x52cd4, c, ov_SC03_010_jr_8017AE2C] - [0x57d54, data, tail] + - [0x75918, .rodata, ov_SC03_010] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x7592c, data, tail2] - [0x759f4, .rodata, ov_SC03_010_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x75ad4, data, tail2] + - [0x75ad4, data, tail3] - [0x75aec, .rodata, ov_SC03_010_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x75b00, data, tail3] + - [0x75b00, data, tail4] - [0x75b04, .rodata, ov_SC03_010_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x75b18, data, tail4] + - [0x75b18, data, tail5] - [0x75b1c, .rodata, ov_SC03_010_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x75b30, data, tail5] + - [0x75b30, data, tail6] - [0x75b6c, .rodata, ov_SC03_010_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x75bd0, data, tail6] + - [0x75bd0, data, tail7] - [0x761dc, .rodata, ov_SC03_010_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x76210, data, tail7] + - [0x76210, data, tail8] - [0x76214, .rodata, ov_SC03_010_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x76248, data, tail8] + - [0x76248, data, tail9] - [0x76284, .rodata, ov_SC03_010_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x76298, data, tail9] + - [0x76298, data, tail10] - [0x762b0, .rodata, ov_SC03_010_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7631c, data, tail10] + - [0x7631c, data, tail11] - [0x7638c, .rodata, ov_SC03_010_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x763d0, .rodata, ov_SC03_010_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x76418, data, tail11] + - [0x76418, data, tail12] - [0x76478, .rodata, ov_SC03_010_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x764ac, data, tail12] + - [0x764ac, data, tail13] - [0x764b0, .rodata, ov_SC03_010_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x764cc, data, tail13] + - [0x764cc, data, tail14] - [0x764d0, .rodata, ov_SC03_010_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x764ec, data, tail14] + - [0x764ec, data, tail15] - [0x76510, .rodata, ov_SC03_010_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7652c, data, tail15] + - [0x7652c, data, tail16] - [0x76544, .rodata, ov_SC03_010_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x76564, data, tail16] + - [0x76564, data, tail17] - [0x765e4, .rodata, ov_SC03_010_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x765f8, data, tail17] + - [0x765f8, data, tail18] - [0x767a0, .rodata, ov_SC03_010_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x76918, data, tail18] + - [0x76918, data, tail19] - [0x769a8, .rodata, ov_SC03_010_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x76a34, data, tail19] + - [0x76a34, data, tail20] - [0x76a38, .rodata, ov_SC03_010_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x76a4c, data, tail20] + - [0x76a4c, data, tail21] - [0x78074, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x78077] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_011.yaml b/config/splat.ov_SC03_011.yaml index 8d7148cbcf..a15bc73dd5 100644 --- a/config/splat.ov_SC03_011.yaml +++ b/config/splat.ov_SC03_011.yaml @@ -117,44 +117,46 @@ segments: - [0x52cd4, c, ov_SC03_011_jr_8017AE2C] - [0x545d8, c, ov_SC03_011_jr_8017C730] - [0x590c4, data, tail] + - [0x77b88, .rodata, ov_SC03_011] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x77b9c, data, tail2] - [0x77c64, .rodata, ov_SC03_011_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77d44, data, tail2] + - [0x77d44, data, tail3] - [0x77d5c, .rodata, ov_SC03_011_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77d70, data, tail3] + - [0x77d70, data, tail4] - [0x77d74, .rodata, ov_SC03_011_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77d88, data, tail4] + - [0x77d88, data, tail5] - [0x77d8c, .rodata, ov_SC03_011_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77da0, data, tail5] + - [0x77da0, data, tail6] - [0x77ddc, .rodata, ov_SC03_011_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77e40, data, tail6] + - [0x77e40, data, tail7] - [0x7844c, .rodata, ov_SC03_011_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78480, data, tail7] + - [0x78480, data, tail8] - [0x784f4, .rodata, ov_SC03_011_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78508, data, tail8] + - [0x78508, data, tail9] - [0x78520, .rodata, ov_SC03_011_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7858c, data, tail9] + - [0x7858c, data, tail10] - [0x785fc, .rodata, ov_SC03_011_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x78640, .rodata, ov_SC03_011_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78688, data, tail10] + - [0x78688, data, tail11] - [0x786e8, .rodata, ov_SC03_011_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7871c, data, tail11] + - [0x7871c, data, tail12] - [0x78720, .rodata, ov_SC03_011_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7873c, data, tail12] + - [0x7873c, data, tail13] - [0x78740, .rodata, ov_SC03_011_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7875c, data, tail13] + - [0x7875c, data, tail14] - [0x78780, .rodata, ov_SC03_011_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7879c, data, tail14] + - [0x7879c, data, tail15] - [0x787b4, .rodata, ov_SC03_011_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x787d4, data, tail15] + - [0x787d4, data, tail16] - [0x78854, .rodata, ov_SC03_011_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78868, data, tail16] + - [0x78868, data, tail17] - [0x78a10, .rodata, ov_SC03_011_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78b88, data, tail17] + - [0x78b88, data, tail18] - [0x78c18, .rodata, ov_SC03_011_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78ca4, data, tail18] + - [0x78ca4, data, tail19] - [0x78ca8, .rodata, ov_SC03_011_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x78cbc, .rodata, ov_SC03_011_jr_8017C730] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78cdc, data, tail19] + - [0x78cdc, data, tail20] - [0x7A2A8, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x7A2AB] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_012.yaml b/config/splat.ov_SC03_012.yaml index 138f6f0472..ae1b2c3f7f 100644 --- a/config/splat.ov_SC03_012.yaml +++ b/config/splat.ov_SC03_012.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC03_012_jr_8017A4AC] - [0x52cd4, c, ov_SC03_012_jr_8017AE2C] - [0x55fa4, data, tail] + - [0x6a9e4, .rodata, ov_SC03_012] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x6a9f8, data, tail2] - [0x6aac0, .rodata, ov_SC03_012_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6aba0, data, tail2] + - [0x6aba0, data, tail3] - [0x6abb8, .rodata, ov_SC03_012_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6abcc, data, tail3] + - [0x6abcc, data, tail4] - [0x6abd0, .rodata, ov_SC03_012_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6abe4, data, tail4] + - [0x6abe4, data, tail5] - [0x6abe8, .rodata, ov_SC03_012_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6abfc, data, tail5] + - [0x6abfc, data, tail6] - [0x6ac38, .rodata, ov_SC03_012_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6ac9c, data, tail6] + - [0x6ac9c, data, tail7] - [0x6b2a8, .rodata, ov_SC03_012_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b2dc, data, tail7] + - [0x6b2dc, data, tail8] - [0x6b2e0, .rodata, ov_SC03_012_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b314, data, tail8] + - [0x6b314, data, tail9] - [0x6b350, .rodata, ov_SC03_012_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b364, data, tail9] + - [0x6b364, data, tail10] - [0x6b37c, .rodata, ov_SC03_012_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b3e8, data, tail10] + - [0x6b3e8, data, tail11] - [0x6b458, .rodata, ov_SC03_012_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x6b49c, .rodata, ov_SC03_012_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b4e4, data, tail11] + - [0x6b4e4, data, tail12] - [0x6b544, .rodata, ov_SC03_012_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b578, data, tail12] + - [0x6b578, data, tail13] - [0x6b57c, .rodata, ov_SC03_012_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b598, data, tail13] + - [0x6b598, data, tail14] - [0x6b59c, .rodata, ov_SC03_012_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b5b8, data, tail14] + - [0x6b5b8, data, tail15] - [0x6b5dc, .rodata, ov_SC03_012_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b5f8, data, tail15] + - [0x6b5f8, data, tail16] - [0x6b610, .rodata, ov_SC03_012_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b630, data, tail16] + - [0x6b630, data, tail17] - [0x6b6b0, .rodata, ov_SC03_012_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b6c4, data, tail17] + - [0x6b6c4, data, tail18] - [0x6b86c, .rodata, ov_SC03_012_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b9e4, data, tail18] + - [0x6b9e4, data, tail19] - [0x6ba74, .rodata, ov_SC03_012_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6bb00, data, tail19] + - [0x6bb00, data, tail20] - [0x6bb04, .rodata, ov_SC03_012_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6bb18, data, tail20] + - [0x6bb18, data, tail21] - [0x6D004, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x6D007] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_013.yaml b/config/splat.ov_SC03_013.yaml index f9dfedab47..739a0dcc0f 100644 --- a/config/splat.ov_SC03_013.yaml +++ b/config/splat.ov_SC03_013.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC03_013_jr_8017A4AC] - [0x52cd4, c, ov_SC03_013_jr_8017AE2C] - [0x58d8c, data, tail] + - [0x82c7c, .rodata, ov_SC03_013] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x82c90, data, tail2] - [0x82d58, .rodata, ov_SC03_013_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x82e38, data, tail2] + - [0x82e38, data, tail3] - [0x82e50, .rodata, ov_SC03_013_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x82e64, data, tail3] + - [0x82e64, data, tail4] - [0x82e68, .rodata, ov_SC03_013_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x82e7c, data, tail4] + - [0x82e7c, data, tail5] - [0x82e80, .rodata, ov_SC03_013_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x82e94, data, tail5] + - [0x82e94, data, tail6] - [0x82ed0, .rodata, ov_SC03_013_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x82f34, data, tail6] + - [0x82f34, data, tail7] - [0x83540, .rodata, ov_SC03_013_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x83574, data, tail7] + - [0x83574, data, tail8] - [0x83578, .rodata, ov_SC03_013_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x835ac, data, tail8] + - [0x835ac, data, tail9] - [0x835e8, .rodata, ov_SC03_013_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x835fc, data, tail9] + - [0x835fc, data, tail10] - [0x83614, .rodata, ov_SC03_013_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x83680, data, tail10] + - [0x83680, data, tail11] - [0x836f0, .rodata, ov_SC03_013_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x83734, .rodata, ov_SC03_013_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8377c, data, tail11] + - [0x8377c, data, tail12] - [0x837dc, .rodata, ov_SC03_013_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x83810, data, tail12] + - [0x83810, data, tail13] - [0x83814, .rodata, ov_SC03_013_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x83830, data, tail13] + - [0x83830, data, tail14] - [0x83834, .rodata, ov_SC03_013_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x83850, data, tail14] + - [0x83850, data, tail15] - [0x83874, .rodata, ov_SC03_013_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x83890, data, tail15] + - [0x83890, data, tail16] - [0x838a8, .rodata, ov_SC03_013_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x838c8, data, tail16] + - [0x838c8, data, tail17] - [0x83948, .rodata, ov_SC03_013_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8395c, data, tail17] + - [0x8395c, data, tail18] - [0x83b04, .rodata, ov_SC03_013_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x83c7c, data, tail18] + - [0x83c7c, data, tail19] - [0x83d0c, .rodata, ov_SC03_013_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x83d98, data, tail19] + - [0x83d98, data, tail20] - [0x83d9c, .rodata, ov_SC03_013_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x83db0, data, tail20] + - [0x83db0, data, tail21] - [0x853FC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x853FF] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_014.yaml b/config/splat.ov_SC03_014.yaml index 62f397fd0b..2080a0e81d 100644 --- a/config/splat.ov_SC03_014.yaml +++ b/config/splat.ov_SC03_014.yaml @@ -118,47 +118,49 @@ segments: - [0x52cd4, c, ov_SC03_014_jr_8017AE2C] - [0x56a24, c, ov_SC03_014_jr_8017EB7C] - [0x633c8, data, tail] + - [0xc0050, .rodata, ov_SC03_014] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xc0064, data, tail2] - [0xc012c, .rodata, ov_SC03_014_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc020c, data, tail2] + - [0xc020c, data, tail3] - [0xc0224, .rodata, ov_SC03_014_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0238, data, tail3] + - [0xc0238, data, tail4] - [0xc023c, .rodata, ov_SC03_014_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0250, data, tail4] + - [0xc0250, data, tail5] - [0xc0254, .rodata, ov_SC03_014_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0268, data, tail5] + - [0xc0268, data, tail6] - [0xc02a4, .rodata, ov_SC03_014_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0308, data, tail6] + - [0xc0308, data, tail7] - [0xc0914, .rodata, ov_SC03_014_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0948, data, tail7] + - [0xc0948, data, tail8] - [0xc094c, .rodata, ov_SC03_014_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0980, data, tail8] + - [0xc0980, data, tail9] - [0xc09bc, .rodata, ov_SC03_014_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc09d0, data, tail9] + - [0xc09d0, data, tail10] - [0xc09e8, .rodata, ov_SC03_014_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0a54, data, tail10] + - [0xc0a54, data, tail11] - [0xc0ac4, .rodata, ov_SC03_014_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xc0b08, .rodata, ov_SC03_014_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0b50, data, tail11] + - [0xc0b50, data, tail12] - [0xc0bb0, .rodata, ov_SC03_014_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0be4, data, tail12] + - [0xc0be4, data, tail13] - [0xc0be8, .rodata, ov_SC03_014_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0c04, data, tail13] + - [0xc0c04, data, tail14] - [0xc0c08, .rodata, ov_SC03_014_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0c24, data, tail14] + - [0xc0c24, data, tail15] - [0xc0c48, .rodata, ov_SC03_014_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0c64, data, tail15] + - [0xc0c64, data, tail16] - [0xc0c7c, .rodata, ov_SC03_014_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0c9c, data, tail16] + - [0xc0c9c, data, tail17] - [0xc0d1c, .rodata, ov_SC03_014_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0d30, data, tail17] + - [0xc0d30, data, tail18] - [0xc0ed8, .rodata, ov_SC03_014_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1050, data, tail18] + - [0xc1050, data, tail19] - [0xc10e0, .rodata, ov_SC03_014_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc116c, data, tail19] + - [0xc116c, data, tail20] - [0xc1170, .rodata, ov_SC03_014_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1184, data, tail20] + - [0xc1184, data, tail21] - [0xc11b0, .rodata, ov_SC03_014_jr_8017EB7C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc11d0, data, tail21] + - [0xc11d0, data, tail22] - [0xC2EE4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xC2EE7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_015.yaml b/config/splat.ov_SC03_015.yaml index 4f5c55166a..ae5c49e2e2 100644 --- a/config/splat.ov_SC03_015.yaml +++ b/config/splat.ov_SC03_015.yaml @@ -118,47 +118,49 @@ segments: - [0x52cd4, c, ov_SC03_015_jr_8017AE2C] - [0x56a24, c, ov_SC03_015_jr_8017EB7C] - [0x633c8, data, tail] + - [0xc0050, .rodata, ov_SC03_015] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xc0064, data, tail2] - [0xc012c, .rodata, ov_SC03_015_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc020c, data, tail2] + - [0xc020c, data, tail3] - [0xc0224, .rodata, ov_SC03_015_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0238, data, tail3] + - [0xc0238, data, tail4] - [0xc023c, .rodata, ov_SC03_015_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0250, data, tail4] + - [0xc0250, data, tail5] - [0xc0254, .rodata, ov_SC03_015_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0268, data, tail5] + - [0xc0268, data, tail6] - [0xc02a4, .rodata, ov_SC03_015_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0308, data, tail6] + - [0xc0308, data, tail7] - [0xc0914, .rodata, ov_SC03_015_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0948, data, tail7] + - [0xc0948, data, tail8] - [0xc094c, .rodata, ov_SC03_015_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0980, data, tail8] + - [0xc0980, data, tail9] - [0xc09bc, .rodata, ov_SC03_015_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc09d0, data, tail9] + - [0xc09d0, data, tail10] - [0xc09e8, .rodata, ov_SC03_015_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0a54, data, tail10] + - [0xc0a54, data, tail11] - [0xc0ac4, .rodata, ov_SC03_015_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xc0b08, .rodata, ov_SC03_015_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0b50, data, tail11] + - [0xc0b50, data, tail12] - [0xc0bb0, .rodata, ov_SC03_015_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0be4, data, tail12] + - [0xc0be4, data, tail13] - [0xc0be8, .rodata, ov_SC03_015_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0c04, data, tail13] + - [0xc0c04, data, tail14] - [0xc0c08, .rodata, ov_SC03_015_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0c24, data, tail14] + - [0xc0c24, data, tail15] - [0xc0c48, .rodata, ov_SC03_015_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0c64, data, tail15] + - [0xc0c64, data, tail16] - [0xc0c7c, .rodata, ov_SC03_015_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0c9c, data, tail16] + - [0xc0c9c, data, tail17] - [0xc0d1c, .rodata, ov_SC03_015_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0d30, data, tail17] + - [0xc0d30, data, tail18] - [0xc0ed8, .rodata, ov_SC03_015_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1050, data, tail18] + - [0xc1050, data, tail19] - [0xc10e0, .rodata, ov_SC03_015_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc116c, data, tail19] + - [0xc116c, data, tail20] - [0xc1170, .rodata, ov_SC03_015_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1184, data, tail20] + - [0xc1184, data, tail21] - [0xc11b0, .rodata, ov_SC03_015_jr_8017EB7C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc11d0, data, tail21] + - [0xc11d0, data, tail22] - [0xC2EE4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xC2EE7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_023.yaml b/config/splat.ov_SC03_023.yaml index 20c1f3258c..68a37c1375 100644 --- a/config/splat.ov_SC03_023.yaml +++ b/config/splat.ov_SC03_023.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC03_023_jr_8017A4AC] - [0x52cd4, c, ov_SC03_023_jr_8017AE2C] - [0x56d44, data, tail] + - [0x6e628, .rodata, ov_SC03_023] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x6e63c, data, tail2] - [0x6e704, .rodata, ov_SC03_023_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e7e4, data, tail2] + - [0x6e7e4, data, tail3] - [0x6e7fc, .rodata, ov_SC03_023_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e810, data, tail3] + - [0x6e810, data, tail4] - [0x6e814, .rodata, ov_SC03_023_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e828, data, tail4] + - [0x6e828, data, tail5] - [0x6e82c, .rodata, ov_SC03_023_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e840, data, tail5] + - [0x6e840, data, tail6] - [0x6e87c, .rodata, ov_SC03_023_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e8e0, data, tail6] + - [0x6e8e0, data, tail7] - [0x6eeec, .rodata, ov_SC03_023_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6ef20, data, tail7] + - [0x6ef20, data, tail8] - [0x6ef24, .rodata, ov_SC03_023_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6ef58, data, tail8] + - [0x6ef58, data, tail9] - [0x6ef94, .rodata, ov_SC03_023_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6efa8, data, tail9] + - [0x6efa8, data, tail10] - [0x6efc0, .rodata, ov_SC03_023_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6f02c, data, tail10] + - [0x6f02c, data, tail11] - [0x6f09c, .rodata, ov_SC03_023_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x6f0e0, .rodata, ov_SC03_023_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6f128, data, tail11] + - [0x6f128, data, tail12] - [0x6f188, .rodata, ov_SC03_023_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6f1bc, data, tail12] + - [0x6f1bc, data, tail13] - [0x6f1c0, .rodata, ov_SC03_023_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6f1dc, data, tail13] + - [0x6f1dc, data, tail14] - [0x6f1e0, .rodata, ov_SC03_023_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6f1fc, data, tail14] + - [0x6f1fc, data, tail15] - [0x6f220, .rodata, ov_SC03_023_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6f23c, data, tail15] + - [0x6f23c, data, tail16] - [0x6f254, .rodata, ov_SC03_023_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6f274, data, tail16] + - [0x6f274, data, tail17] - [0x6f2f4, .rodata, ov_SC03_023_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6f308, data, tail17] + - [0x6f308, data, tail18] - [0x6f4b0, .rodata, ov_SC03_023_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6f628, data, tail18] + - [0x6f628, data, tail19] - [0x6f6b8, .rodata, ov_SC03_023_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6f744, data, tail19] + - [0x6f744, data, tail20] - [0x6f748, .rodata, ov_SC03_023_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6f75c, data, tail20] + - [0x6f75c, data, tail21] - [0x70C2C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x70C2F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_024.yaml b/config/splat.ov_SC03_024.yaml index 9cf286210d..f41f636433 100644 --- a/config/splat.ov_SC03_024.yaml +++ b/config/splat.ov_SC03_024.yaml @@ -118,47 +118,49 @@ segments: - [0x52cd4, c, ov_SC03_024_jr_8017AE2C] - [0x55e2c, c, ov_SC03_024_jr_8017DF84] - [0x5ed68, data, tail] + - [0x96ab0, .rodata, ov_SC03_024] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x96ac4, data, tail2] - [0x96b8c, .rodata, ov_SC03_024_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96c6c, data, tail2] + - [0x96c6c, data, tail3] - [0x96c84, .rodata, ov_SC03_024_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96c98, data, tail3] + - [0x96c98, data, tail4] - [0x96c9c, .rodata, ov_SC03_024_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96cb0, data, tail4] + - [0x96cb0, data, tail5] - [0x96cb4, .rodata, ov_SC03_024_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96cc8, data, tail5] + - [0x96cc8, data, tail6] - [0x96d04, .rodata, ov_SC03_024_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96d68, data, tail6] + - [0x96d68, data, tail7] - [0x97374, .rodata, ov_SC03_024_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x973a8, data, tail7] + - [0x973a8, data, tail8] - [0x973ac, .rodata, ov_SC03_024_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x973e0, data, tail8] + - [0x973e0, data, tail9] - [0x9741c, .rodata, ov_SC03_024_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97430, data, tail9] + - [0x97430, data, tail10] - [0x97448, .rodata, ov_SC03_024_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x974b4, data, tail10] + - [0x974b4, data, tail11] - [0x97524, .rodata, ov_SC03_024_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x97568, .rodata, ov_SC03_024_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x975b0, data, tail11] + - [0x975b0, data, tail12] - [0x97610, .rodata, ov_SC03_024_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97644, data, tail12] + - [0x97644, data, tail13] - [0x97648, .rodata, ov_SC03_024_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97664, data, tail13] + - [0x97664, data, tail14] - [0x97668, .rodata, ov_SC03_024_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97684, data, tail14] + - [0x97684, data, tail15] - [0x976a8, .rodata, ov_SC03_024_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x976c4, data, tail15] + - [0x976c4, data, tail16] - [0x976dc, .rodata, ov_SC03_024_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x976fc, data, tail16] + - [0x976fc, data, tail17] - [0x9777c, .rodata, ov_SC03_024_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97790, data, tail17] + - [0x97790, data, tail18] - [0x97938, .rodata, ov_SC03_024_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97ab0, data, tail18] + - [0x97ab0, data, tail19] - [0x97b40, .rodata, ov_SC03_024_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97bcc, data, tail19] + - [0x97bcc, data, tail20] - [0x97bd0, .rodata, ov_SC03_024_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97be4, data, tail20] + - [0x97be4, data, tail21] - [0x97c10, .rodata, ov_SC03_024_jr_8017DF84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97c30, data, tail21] + - [0x97c30, data, tail22] - [0x996F4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x996F7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_028.yaml b/config/splat.ov_SC03_028.yaml index 35b9d624e8..112613014b 100644 --- a/config/splat.ov_SC03_028.yaml +++ b/config/splat.ov_SC03_028.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC03_028_jr_8017A4AC] - [0x52cd4, c, ov_SC03_028_jr_8017AE2C] - [0x63834, data, tail] + - [0xc0c38, .rodata, ov_SC03_028] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xc0c4c, data, tail2] - [0xc0d14, .rodata, ov_SC03_028_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0df4, data, tail2] + - [0xc0df4, data, tail3] - [0xc0e0c, .rodata, ov_SC03_028_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0e20, data, tail3] + - [0xc0e20, data, tail4] - [0xc0e24, .rodata, ov_SC03_028_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0e38, data, tail4] + - [0xc0e38, data, tail5] - [0xc0e3c, .rodata, ov_SC03_028_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0e50, data, tail5] + - [0xc0e50, data, tail6] - [0xc0e8c, .rodata, ov_SC03_028_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc0ef0, data, tail6] + - [0xc0ef0, data, tail7] - [0xc14fc, .rodata, ov_SC03_028_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1530, data, tail7] + - [0xc1530, data, tail8] - [0xc1534, .rodata, ov_SC03_028_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1568, data, tail8] + - [0xc1568, data, tail9] - [0xc15a4, .rodata, ov_SC03_028_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc15b8, data, tail9] + - [0xc15b8, data, tail10] - [0xc15d0, .rodata, ov_SC03_028_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc163c, data, tail10] + - [0xc163c, data, tail11] - [0xc16ac, .rodata, ov_SC03_028_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xc16f0, .rodata, ov_SC03_028_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1738, data, tail11] + - [0xc1738, data, tail12] - [0xc1798, .rodata, ov_SC03_028_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc17cc, data, tail12] + - [0xc17cc, data, tail13] - [0xc17d0, .rodata, ov_SC03_028_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc17ec, data, tail13] + - [0xc17ec, data, tail14] - [0xc17f0, .rodata, ov_SC03_028_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc180c, data, tail14] + - [0xc180c, data, tail15] - [0xc1830, .rodata, ov_SC03_028_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc184c, data, tail15] + - [0xc184c, data, tail16] - [0xc1864, .rodata, ov_SC03_028_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1884, data, tail16] + - [0xc1884, data, tail17] - [0xc1904, .rodata, ov_SC03_028_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1918, data, tail17] + - [0xc1918, data, tail18] - [0xc1ac0, .rodata, ov_SC03_028_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1c38, data, tail18] + - [0xc1c38, data, tail19] - [0xc1cc8, .rodata, ov_SC03_028_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1d54, data, tail19] + - [0xc1d54, data, tail20] - [0xc1d58, .rodata, ov_SC03_028_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1d6c, data, tail20] + - [0xc1d6c, data, tail21] - [0xC44AC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xC44AF] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_029.yaml b/config/splat.ov_SC03_029.yaml index a2014f8a97..778dc85d98 100644 --- a/config/splat.ov_SC03_029.yaml +++ b/config/splat.ov_SC03_029.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_029_jr_8017AE2C] - [0x55b18, c, ov_SC03_029_jr_8017DC70] - [0x5f66c, data, tail] + - [0xaed6c, .rodata, ov_SC03_029] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xaed80, data, tail2] - [0xaee48, .rodata, ov_SC03_029_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaef28, data, tail2] + - [0xaef28, data, tail3] - [0xaef40, .rodata, ov_SC03_029_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaef54, data, tail3] + - [0xaef54, data, tail4] - [0xaef58, .rodata, ov_SC03_029_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaef6c, data, tail4] + - [0xaef6c, data, tail5] - [0xaef70, .rodata, ov_SC03_029_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaef84, data, tail5] + - [0xaef84, data, tail6] - [0xaefc0, .rodata, ov_SC03_029_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaf024, data, tail6] + - [0xaf024, data, tail7] - [0xaf630, .rodata, ov_SC03_029_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaf664, data, tail7] + - [0xaf664, data, tail8] - [0xaf668, .rodata, ov_SC03_029_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaf69c, data, tail8] + - [0xaf69c, data, tail9] - [0xaf6d8, .rodata, ov_SC03_029_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaf6ec, data, tail9] + - [0xaf6ec, data, tail10] - [0xaf704, .rodata, ov_SC03_029_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaf770, data, tail10] + - [0xaf770, data, tail11] - [0xaf7e0, .rodata, ov_SC03_029_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xaf824, .rodata, ov_SC03_029_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaf86c, data, tail11] + - [0xaf86c, data, tail12] - [0xaf8cc, .rodata, ov_SC03_029_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaf900, data, tail12] + - [0xaf900, data, tail13] - [0xaf904, .rodata, ov_SC03_029_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaf920, data, tail13] + - [0xaf920, data, tail14] - [0xaf924, .rodata, ov_SC03_029_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaf940, data, tail14] + - [0xaf940, data, tail15] - [0xaf964, .rodata, ov_SC03_029_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaf980, data, tail15] + - [0xaf980, data, tail16] - [0xaf998, .rodata, ov_SC03_029_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaf9b8, data, tail16] + - [0xaf9b8, data, tail17] - [0xafa38, .rodata, ov_SC03_029_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xafa4c, data, tail17] + - [0xafa4c, data, tail18] - [0xafbf4, .rodata, ov_SC03_029_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xafd6c, data, tail18] + - [0xafd6c, data, tail19] - [0xafdfc, .rodata, ov_SC03_029_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xafe88, data, tail19] + - [0xafe88, data, tail20] - [0xafe8c, .rodata, ov_SC03_029_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xafea0, .rodata, ov_SC03_029_jr_8017DC70] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xafec0, data, tail20] + - [0xafec0, data, tail21] - [0xB18EC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xB18EF] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_030.yaml b/config/splat.ov_SC03_030.yaml index da624e3767..15f049621c 100644 --- a/config/splat.ov_SC03_030.yaml +++ b/config/splat.ov_SC03_030.yaml @@ -116,43 +116,45 @@ segments: - [0x52354, c, ov_SC03_030_jr_8017A4AC] - [0x52cd4, c, ov_SC03_030_jr_8017AE2C] - [0x59ca8, data, tail] + - [0xb7410, .rodata, ov_SC03_030] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xb7424, data, tail2] - [0xb74ec, .rodata, ov_SC03_030_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb75cc, data, tail2] + - [0xb75cc, data, tail3] - [0xb75e4, .rodata, ov_SC03_030_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb75f8, data, tail3] + - [0xb75f8, data, tail4] - [0xb75fc, .rodata, ov_SC03_030_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7610, data, tail4] + - [0xb7610, data, tail5] - [0xb7614, .rodata, ov_SC03_030_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7628, data, tail5] + - [0xb7628, data, tail6] - [0xb7664, .rodata, ov_SC03_030_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb76c8, data, tail6] + - [0xb76c8, data, tail7] - [0xb7cd4, .rodata, ov_SC03_030_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7d08, data, tail7] + - [0xb7d08, data, tail8] - [0xb7d7c, .rodata, ov_SC03_030_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7d90, data, tail8] + - [0xb7d90, data, tail9] - [0xb7da8, .rodata, ov_SC03_030_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7e14, data, tail9] + - [0xb7e14, data, tail10] - [0xb7e84, .rodata, ov_SC03_030_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xb7ec8, .rodata, ov_SC03_030_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7f10, data, tail10] + - [0xb7f10, data, tail11] - [0xb7f70, .rodata, ov_SC03_030_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7fa4, data, tail11] + - [0xb7fa4, data, tail12] - [0xb7fa8, .rodata, ov_SC03_030_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7fc4, data, tail12] + - [0xb7fc4, data, tail13] - [0xb7fc8, .rodata, ov_SC03_030_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7fe4, data, tail13] + - [0xb7fe4, data, tail14] - [0xb8008, .rodata, ov_SC03_030_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb8024, data, tail14] + - [0xb8024, data, tail15] - [0xb803c, .rodata, ov_SC03_030_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb805c, data, tail15] + - [0xb805c, data, tail16] - [0xb80dc, .rodata, ov_SC03_030_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb80f0, data, tail16] + - [0xb80f0, data, tail17] - [0xb8298, .rodata, ov_SC03_030_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb8410, data, tail17] + - [0xb8410, data, tail18] - [0xb84a0, .rodata, ov_SC03_030_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb852c, data, tail18] + - [0xb852c, data, tail19] - [0xb8530, .rodata, ov_SC03_030_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb8544, data, tail19] + - [0xb8544, data, tail20] - [0xB9AF0] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes # ` - [0x, bin, trailing]` (the final 1-3 bytes spimdisasm's data path drops); diff --git a/config/splat.ov_SC03_031.yaml b/config/splat.ov_SC03_031.yaml index bc2817f04d..1c2b25dd85 100644 --- a/config/splat.ov_SC03_031.yaml +++ b/config/splat.ov_SC03_031.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_031_jr_8017AE2C] - [0x55a04, c, ov_SC03_031_jr_8017DB5C] - [0x5a1c4, data, tail] + - [0x9b8b4, .rodata, ov_SC03_031] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x9b8c8, data, tail2] - [0x9b990, .rodata, ov_SC03_031_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ba70, data, tail2] + - [0x9ba70, data, tail3] - [0x9ba88, .rodata, ov_SC03_031_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ba9c, data, tail3] + - [0x9ba9c, data, tail4] - [0x9baa0, .rodata, ov_SC03_031_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9bab4, data, tail4] + - [0x9bab4, data, tail5] - [0x9bab8, .rodata, ov_SC03_031_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9bacc, data, tail5] + - [0x9bacc, data, tail6] - [0x9bb08, .rodata, ov_SC03_031_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9bb6c, data, tail6] + - [0x9bb6c, data, tail7] - [0x9c178, .rodata, ov_SC03_031_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c1ac, data, tail7] + - [0x9c1ac, data, tail8] - [0x9c1b0, .rodata, ov_SC03_031_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c1e4, data, tail8] + - [0x9c1e4, data, tail9] - [0x9c220, .rodata, ov_SC03_031_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c234, data, tail9] + - [0x9c234, data, tail10] - [0x9c24c, .rodata, ov_SC03_031_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c2b8, data, tail10] + - [0x9c2b8, data, tail11] - [0x9c328, .rodata, ov_SC03_031_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9c36c, .rodata, ov_SC03_031_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c3b4, data, tail11] + - [0x9c3b4, data, tail12] - [0x9c414, .rodata, ov_SC03_031_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c448, data, tail12] + - [0x9c448, data, tail13] - [0x9c44c, .rodata, ov_SC03_031_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c468, data, tail13] + - [0x9c468, data, tail14] - [0x9c46c, .rodata, ov_SC03_031_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c488, data, tail14] + - [0x9c488, data, tail15] - [0x9c4ac, .rodata, ov_SC03_031_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c4c8, data, tail15] + - [0x9c4c8, data, tail16] - [0x9c4e0, .rodata, ov_SC03_031_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c500, data, tail16] + - [0x9c500, data, tail17] - [0x9c580, .rodata, ov_SC03_031_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c594, data, tail17] + - [0x9c594, data, tail18] - [0x9c73c, .rodata, ov_SC03_031_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c8b4, data, tail18] + - [0x9c8b4, data, tail19] - [0x9c944, .rodata, ov_SC03_031_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c9d0, data, tail19] + - [0x9c9d0, data, tail20] - [0x9c9d4, .rodata, ov_SC03_031_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9c9e8, .rodata, ov_SC03_031_jr_8017DB5C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ca08, data, tail20] + - [0x9ca08, data, tail21] - [0x9E14C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x9E14F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_089.yaml b/config/splat.ov_SC03_089.yaml index 2d9bbcab2d..fca76094bf 100644 --- a/config/splat.ov_SC03_089.yaml +++ b/config/splat.ov_SC03_089.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_089_jr_8017AE2C] - [0x54928, c, ov_SC03_089_jr_8017CA80] - [0x614c0, data, tail] + - [0x9c120, .rodata, ov_SC03_089] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x9c134, data, tail2] - [0x9c1fc, .rodata, ov_SC03_089_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c2dc, data, tail2] + - [0x9c2dc, data, tail3] - [0x9c2f4, .rodata, ov_SC03_089_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c308, data, tail3] + - [0x9c308, data, tail4] - [0x9c30c, .rodata, ov_SC03_089_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c320, data, tail4] + - [0x9c320, data, tail5] - [0x9c324, .rodata, ov_SC03_089_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c338, data, tail5] + - [0x9c338, data, tail6] - [0x9c374, .rodata, ov_SC03_089_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9c3d8, data, tail6] + - [0x9c3d8, data, tail7] - [0x9c9e4, .rodata, ov_SC03_089_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ca18, data, tail7] + - [0x9ca18, data, tail8] - [0x9ca1c, .rodata, ov_SC03_089_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ca50, data, tail8] + - [0x9ca50, data, tail9] - [0x9ca8c, .rodata, ov_SC03_089_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9caa0, data, tail9] + - [0x9caa0, data, tail10] - [0x9cab8, .rodata, ov_SC03_089_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9cb24, data, tail10] + - [0x9cb24, data, tail11] - [0x9cb94, .rodata, ov_SC03_089_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9cbd8, .rodata, ov_SC03_089_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9cc20, data, tail11] + - [0x9cc20, data, tail12] - [0x9cc80, .rodata, ov_SC03_089_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ccb4, data, tail12] + - [0x9ccb4, data, tail13] - [0x9ccb8, .rodata, ov_SC03_089_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ccd4, data, tail13] + - [0x9ccd4, data, tail14] - [0x9ccd8, .rodata, ov_SC03_089_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ccf4, data, tail14] + - [0x9ccf4, data, tail15] - [0x9cd18, .rodata, ov_SC03_089_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9cd34, data, tail15] + - [0x9cd34, data, tail16] - [0x9cd4c, .rodata, ov_SC03_089_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9cd6c, data, tail16] + - [0x9cd6c, data, tail17] - [0x9cdec, .rodata, ov_SC03_089_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ce00, data, tail17] + - [0x9ce00, data, tail18] - [0x9cfa8, .rodata, ov_SC03_089_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9d120, data, tail18] + - [0x9d120, data, tail19] - [0x9d1b0, .rodata, ov_SC03_089_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9d23c, data, tail19] + - [0x9d23c, data, tail20] - [0x9d240, .rodata, ov_SC03_089_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9d254, .rodata, ov_SC03_089_jr_8017CA80] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9d274, data, tail20] + - [0x9d274, data, tail21] - [0x9E7C4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x9E7C7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_090.yaml b/config/splat.ov_SC03_090.yaml index 227ceb7915..ceefd54f24 100644 --- a/config/splat.ov_SC03_090.yaml +++ b/config/splat.ov_SC03_090.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_090_jr_8017AE2C] - [0x54928, c, ov_SC03_090_jr_8017CA80] - [0x638e4, data, tail] + - [0xa158c, .rodata, ov_SC03_090] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xa15a0, data, tail2] - [0xa1668, .rodata, ov_SC03_090_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1748, data, tail2] + - [0xa1748, data, tail3] - [0xa1760, .rodata, ov_SC03_090_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1774, data, tail3] + - [0xa1774, data, tail4] - [0xa1778, .rodata, ov_SC03_090_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa178c, data, tail4] + - [0xa178c, data, tail5] - [0xa1790, .rodata, ov_SC03_090_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa17a4, data, tail5] + - [0xa17a4, data, tail6] - [0xa17e0, .rodata, ov_SC03_090_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1844, data, tail6] + - [0xa1844, data, tail7] - [0xa1e50, .rodata, ov_SC03_090_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1e84, data, tail7] + - [0xa1e84, data, tail8] - [0xa1e88, .rodata, ov_SC03_090_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1ebc, data, tail8] + - [0xa1ebc, data, tail9] - [0xa1ef8, .rodata, ov_SC03_090_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1f0c, data, tail9] + - [0xa1f0c, data, tail10] - [0xa1f24, .rodata, ov_SC03_090_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1f90, data, tail10] + - [0xa1f90, data, tail11] - [0xa2000, .rodata, ov_SC03_090_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa2044, .rodata, ov_SC03_090_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa208c, data, tail11] + - [0xa208c, data, tail12] - [0xa20ec, .rodata, ov_SC03_090_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2120, data, tail12] + - [0xa2120, data, tail13] - [0xa2124, .rodata, ov_SC03_090_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2140, data, tail13] + - [0xa2140, data, tail14] - [0xa2144, .rodata, ov_SC03_090_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2160, data, tail14] + - [0xa2160, data, tail15] - [0xa2184, .rodata, ov_SC03_090_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa21a0, data, tail15] + - [0xa21a0, data, tail16] - [0xa21b8, .rodata, ov_SC03_090_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa21d8, data, tail16] + - [0xa21d8, data, tail17] - [0xa2258, .rodata, ov_SC03_090_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa226c, data, tail17] + - [0xa226c, data, tail18] - [0xa2414, .rodata, ov_SC03_090_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa258c, data, tail18] + - [0xa258c, data, tail19] - [0xa261c, .rodata, ov_SC03_090_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa26a8, data, tail19] + - [0xa26a8, data, tail20] - [0xa26ac, .rodata, ov_SC03_090_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa26c0, .rodata, ov_SC03_090_jr_8017CA80] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa26e0, data, tail20] + - [0xa26e0, data, tail21] - [0xA3C34, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xA3C37] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_091.yaml b/config/splat.ov_SC03_091.yaml index 6a3cdad99a..ec6d552ede 100644 --- a/config/splat.ov_SC03_091.yaml +++ b/config/splat.ov_SC03_091.yaml @@ -119,46 +119,48 @@ segments: - [0x55740, c, ov_SC03_091_jr_8017D898] - [0x5a110, c, ov_SC03_091_jr_80182268] - [0x6478c, data, tail] + - [0xa7c58, .rodata, ov_SC03_091] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xa7c6c, data, tail2] - [0xa7d34, .rodata, ov_SC03_091_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa7e14, data, tail2] + - [0xa7e14, data, tail3] - [0xa7e2c, .rodata, ov_SC03_091_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa7e40, data, tail3] + - [0xa7e40, data, tail4] - [0xa7e44, .rodata, ov_SC03_091_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa7e58, data, tail4] + - [0xa7e58, data, tail5] - [0xa7e5c, .rodata, ov_SC03_091_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa7e70, data, tail5] + - [0xa7e70, data, tail6] - [0xa7eac, .rodata, ov_SC03_091_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa7f10, data, tail6] + - [0xa7f10, data, tail7] - [0xa851c, .rodata, ov_SC03_091_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa8550, data, tail7] + - [0xa8550, data, tail8] - [0xa8554, .rodata, ov_SC03_091_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa8588, data, tail8] + - [0xa8588, data, tail9] - [0xa85c4, .rodata, ov_SC03_091_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa85d8, data, tail9] + - [0xa85d8, data, tail10] - [0xa85f0, .rodata, ov_SC03_091_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa865c, data, tail10] + - [0xa865c, data, tail11] - [0xa86cc, .rodata, ov_SC03_091_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa8710, .rodata, ov_SC03_091_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa8758, data, tail11] + - [0xa8758, data, tail12] - [0xa87b8, .rodata, ov_SC03_091_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa87ec, data, tail12] + - [0xa87ec, data, tail13] - [0xa87f0, .rodata, ov_SC03_091_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa880c, data, tail13] + - [0xa880c, data, tail14] - [0xa8810, .rodata, ov_SC03_091_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa882c, data, tail14] + - [0xa882c, data, tail15] - [0xa8850, .rodata, ov_SC03_091_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa886c, data, tail15] + - [0xa886c, data, tail16] - [0xa8884, .rodata, ov_SC03_091_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa88a4, data, tail16] + - [0xa88a4, data, tail17] - [0xa8924, .rodata, ov_SC03_091_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa8938, data, tail17] + - [0xa8938, data, tail18] - [0xa8ae0, .rodata, ov_SC03_091_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa8c58, data, tail18] + - [0xa8c58, data, tail19] - [0xa8ce8, .rodata, ov_SC03_091_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa8d74, data, tail19] + - [0xa8d74, data, tail20] - [0xa8d78, .rodata, ov_SC03_091_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa8d8c, .rodata, ov_SC03_091_jr_8017D898] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa8dac, data, tail20] + - [0xa8dac, data, tail21] - [0xAA584, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xAA587] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_092.yaml b/config/splat.ov_SC03_092.yaml index 6c2f1fc8b1..3da09ca3e7 100644 --- a/config/splat.ov_SC03_092.yaml +++ b/config/splat.ov_SC03_092.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC03_092_jr_8017A4AC] - [0x52cd4, c, ov_SC03_092_jr_8017AE2C] - [0x5cb5c, data, tail] + - [0x88830, .rodata, ov_SC03_092] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x88844, data, tail2] - [0x8890c, .rodata, ov_SC03_092_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x889ec, data, tail2] + - [0x889ec, data, tail3] - [0x88a04, .rodata, ov_SC03_092_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x88a18, data, tail3] + - [0x88a18, data, tail4] - [0x88a1c, .rodata, ov_SC03_092_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x88a30, data, tail4] + - [0x88a30, data, tail5] - [0x88a34, .rodata, ov_SC03_092_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x88a48, data, tail5] + - [0x88a48, data, tail6] - [0x88a84, .rodata, ov_SC03_092_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x88ae8, data, tail6] + - [0x88ae8, data, tail7] - [0x890f4, .rodata, ov_SC03_092_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89128, data, tail7] + - [0x89128, data, tail8] - [0x8912c, .rodata, ov_SC03_092_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89160, data, tail8] + - [0x89160, data, tail9] - [0x8919c, .rodata, ov_SC03_092_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x891b0, data, tail9] + - [0x891b0, data, tail10] - [0x891c8, .rodata, ov_SC03_092_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89234, data, tail10] + - [0x89234, data, tail11] - [0x892a4, .rodata, ov_SC03_092_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x892e8, .rodata, ov_SC03_092_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89330, data, tail11] + - [0x89330, data, tail12] - [0x89390, .rodata, ov_SC03_092_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x893c4, data, tail12] + - [0x893c4, data, tail13] - [0x893c8, .rodata, ov_SC03_092_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x893e4, data, tail13] + - [0x893e4, data, tail14] - [0x893e8, .rodata, ov_SC03_092_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89404, data, tail14] + - [0x89404, data, tail15] - [0x89428, .rodata, ov_SC03_092_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89444, data, tail15] + - [0x89444, data, tail16] - [0x8945c, .rodata, ov_SC03_092_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8947c, data, tail16] + - [0x8947c, data, tail17] - [0x894fc, .rodata, ov_SC03_092_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89510, data, tail17] + - [0x89510, data, tail18] - [0x896b8, .rodata, ov_SC03_092_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89830, data, tail18] + - [0x89830, data, tail19] - [0x898c0, .rodata, ov_SC03_092_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8994c, data, tail19] + - [0x8994c, data, tail20] - [0x89950, .rodata, ov_SC03_092_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89964, data, tail20] + - [0x89964, data, tail21] - [0x8AF2C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x8AF2F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/src/ov_SC01_005/ov_SC01_005.c b/src/ov_SC01_005/ov_SC01_005.c index a7a2838cb7..e68ddfa6fd 100644 --- a/src/ov_SC01_005/ov_SC01_005.c +++ b/src/ov_SC01_005/ov_SC01_005.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_005/nonmatchings/ov_SC01_005", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801CC538/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801CDEC0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801CDFBA; +extern u8 D_801CDEE2; +extern u8 D_801CDEC0; +extern u8 D_801CC538[]; +extern u8 D_801CC539[]; +extern u8 D_801CC53A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801CDFBA; + g = D_801CDEE2; + b = D_801CDEC0; + D_801CC538[0] = r * 5 >> 3; + D_801CC539[0] = g << 3; + D_801CC53A[0] = (s32)(b * 255) >> 4; + D_801CC538[4] = (s32)(r * 143) >> 4; + D_801CC539[4] = g * 25 >> 1; + D_801CC53A[4] = (s32)(b * 255) >> 4; + D_801CC538[8] = (s32)(r * 255) >> 4; + D_801CC539[8] = (s32)(g * 255) >> 4; + D_801CC53A[8] = (s32)(b * 255) >> 4; + D_801CC538[12] = (s32)(r * 143) >> 4; + D_801CC539[12] = (s32)(g * 255) >> 4; + D_801CC53A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801CC538[i] = arg2[0x44] * D_801CDFBA >> 4; + D_801CC539[i] = arg2[0x45] * D_801CDEE2 >> 4; + D_801CC53A[i] = arg2[0x46] * D_801CDEC0 >> 4; + i = (arg1 + 1) * 4; + D_801CC538[i] = arg2[0x47] * D_801CDFBA >> 4; + D_801CC539[i] = arg2[0x48] * D_801CDEE2 >> 4; + D_801CC53A[i] = arg2[0x49] * D_801CDEC0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801CDFBA << 3; + arg2[0x21] = D_801CDEE2 << 3; + arg2[0x22] = D_801CDEC0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC01_006/ov_SC01_006.c b/src/ov_SC01_006/ov_SC01_006.c index c63dccd6ad..0238064241 100644 --- a/src/ov_SC01_006/ov_SC01_006.c +++ b/src/ov_SC01_006/ov_SC01_006.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_006/nonmatchings/ov_SC01_006", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801CC538/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801CDEC0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801CDFBA; +extern u8 D_801CDEE2; +extern u8 D_801CDEC0; +extern u8 D_801CC538[]; +extern u8 D_801CC539[]; +extern u8 D_801CC53A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801CDFBA; + g = D_801CDEE2; + b = D_801CDEC0; + D_801CC538[0] = r * 5 >> 3; + D_801CC539[0] = g << 3; + D_801CC53A[0] = (s32)(b * 255) >> 4; + D_801CC538[4] = (s32)(r * 143) >> 4; + D_801CC539[4] = g * 25 >> 1; + D_801CC53A[4] = (s32)(b * 255) >> 4; + D_801CC538[8] = (s32)(r * 255) >> 4; + D_801CC539[8] = (s32)(g * 255) >> 4; + D_801CC53A[8] = (s32)(b * 255) >> 4; + D_801CC538[12] = (s32)(r * 143) >> 4; + D_801CC539[12] = (s32)(g * 255) >> 4; + D_801CC53A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801CC538[i] = arg2[0x44] * D_801CDFBA >> 4; + D_801CC539[i] = arg2[0x45] * D_801CDEE2 >> 4; + D_801CC53A[i] = arg2[0x46] * D_801CDEC0 >> 4; + i = (arg1 + 1) * 4; + D_801CC538[i] = arg2[0x47] * D_801CDFBA >> 4; + D_801CC539[i] = arg2[0x48] * D_801CDEE2 >> 4; + D_801CC53A[i] = arg2[0x49] * D_801CDEC0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801CDFBA << 3; + arg2[0x21] = D_801CDEE2 << 3; + arg2[0x22] = D_801CDEC0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC01_008/ov_SC01_008.c b/src/ov_SC01_008/ov_SC01_008.c index 06ff5e142d..dc71eb73f0 100644 --- a/src/ov_SC01_008/ov_SC01_008.c +++ b/src/ov_SC01_008/ov_SC01_008.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_008/nonmatchings/ov_SC01_008", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801A1FE8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801A3470 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801A356A; +extern u8 D_801A3492; +extern u8 D_801A3470; +extern u8 D_801A1FE8[]; +extern u8 D_801A1FE9[]; +extern u8 D_801A1FEA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801A356A; + g = D_801A3492; + b = D_801A3470; + D_801A1FE8[0] = r * 5 >> 3; + D_801A1FE9[0] = g << 3; + D_801A1FEA[0] = (s32)(b * 255) >> 4; + D_801A1FE8[4] = (s32)(r * 143) >> 4; + D_801A1FE9[4] = g * 25 >> 1; + D_801A1FEA[4] = (s32)(b * 255) >> 4; + D_801A1FE8[8] = (s32)(r * 255) >> 4; + D_801A1FE9[8] = (s32)(g * 255) >> 4; + D_801A1FEA[8] = (s32)(b * 255) >> 4; + D_801A1FE8[12] = (s32)(r * 143) >> 4; + D_801A1FE9[12] = (s32)(g * 255) >> 4; + D_801A1FEA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801A1FE8[i] = arg2[0x44] * D_801A356A >> 4; + D_801A1FE9[i] = arg2[0x45] * D_801A3492 >> 4; + D_801A1FEA[i] = arg2[0x46] * D_801A3470 >> 4; + i = (arg1 + 1) * 4; + D_801A1FE8[i] = arg2[0x47] * D_801A356A >> 4; + D_801A1FE9[i] = arg2[0x48] * D_801A3492 >> 4; + D_801A1FEA[i] = arg2[0x49] * D_801A3470 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801A356A << 3; + arg2[0x21] = D_801A3492 << 3; + arg2[0x22] = D_801A3470 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC01_009/ov_SC01_009.c b/src/ov_SC01_009/ov_SC01_009.c index 824f015912..beb1857a3f 100644 --- a/src/ov_SC01_009/ov_SC01_009.c +++ b/src/ov_SC01_009/ov_SC01_009.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_009/nonmatchings/ov_SC01_009", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801F1E48/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801F32F0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801F33EA; +extern u8 D_801F3312; +extern u8 D_801F32F0; +extern u8 D_801F1E48[]; +extern u8 D_801F1E49[]; +extern u8 D_801F1E4A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801F33EA; + g = D_801F3312; + b = D_801F32F0; + D_801F1E48[0] = r * 5 >> 3; + D_801F1E49[0] = g << 3; + D_801F1E4A[0] = (s32)(b * 255) >> 4; + D_801F1E48[4] = (s32)(r * 143) >> 4; + D_801F1E49[4] = g * 25 >> 1; + D_801F1E4A[4] = (s32)(b * 255) >> 4; + D_801F1E48[8] = (s32)(r * 255) >> 4; + D_801F1E49[8] = (s32)(g * 255) >> 4; + D_801F1E4A[8] = (s32)(b * 255) >> 4; + D_801F1E48[12] = (s32)(r * 143) >> 4; + D_801F1E49[12] = (s32)(g * 255) >> 4; + D_801F1E4A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801F1E48[i] = arg2[0x44] * D_801F33EA >> 4; + D_801F1E49[i] = arg2[0x45] * D_801F3312 >> 4; + D_801F1E4A[i] = arg2[0x46] * D_801F32F0 >> 4; + i = (arg1 + 1) * 4; + D_801F1E48[i] = arg2[0x47] * D_801F33EA >> 4; + D_801F1E49[i] = arg2[0x48] * D_801F3312 >> 4; + D_801F1E4A[i] = arg2[0x49] * D_801F32F0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801F33EA << 3; + arg2[0x21] = D_801F3312 << 3; + arg2[0x22] = D_801F32F0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC01_074/ov_SC01_074.c b/src/ov_SC01_074/ov_SC01_074.c index bee73ac553..2ffd2088e6 100644 --- a/src/ov_SC01_074/ov_SC01_074.c +++ b/src/ov_SC01_074/ov_SC01_074.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_074/nonmatchings/ov_SC01_074", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_8019A8C8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_8019BC00 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_8019BCFA; +extern u8 D_8019BC22; +extern u8 D_8019BC00; +extern u8 D_8019A8C8[]; +extern u8 D_8019A8C9[]; +extern u8 D_8019A8CA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_8019BCFA; + g = D_8019BC22; + b = D_8019BC00; + D_8019A8C8[0] = r * 5 >> 3; + D_8019A8C9[0] = g << 3; + D_8019A8CA[0] = (s32)(b * 255) >> 4; + D_8019A8C8[4] = (s32)(r * 143) >> 4; + D_8019A8C9[4] = g * 25 >> 1; + D_8019A8CA[4] = (s32)(b * 255) >> 4; + D_8019A8C8[8] = (s32)(r * 255) >> 4; + D_8019A8C9[8] = (s32)(g * 255) >> 4; + D_8019A8CA[8] = (s32)(b * 255) >> 4; + D_8019A8C8[12] = (s32)(r * 143) >> 4; + D_8019A8C9[12] = (s32)(g * 255) >> 4; + D_8019A8CA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_8019A8C8[i] = arg2[0x44] * D_8019BCFA >> 4; + D_8019A8C9[i] = arg2[0x45] * D_8019BC22 >> 4; + D_8019A8CA[i] = arg2[0x46] * D_8019BC00 >> 4; + i = (arg1 + 1) * 4; + D_8019A8C8[i] = arg2[0x47] * D_8019BCFA >> 4; + D_8019A8C9[i] = arg2[0x48] * D_8019BC22 >> 4; + D_8019A8CA[i] = arg2[0x49] * D_8019BC00 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_8019BCFA << 3; + arg2[0x21] = D_8019BC22 << 3; + arg2[0x22] = D_8019BC00 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC01_077/ov_SC01_077_a.c b/src/ov_SC01_077/ov_SC01_077_a.c index ad2e722961..bc9a626ee4 100644 --- a/src/ov_SC01_077/ov_SC01_077_a.c +++ b/src/ov_SC01_077/ov_SC01_077_a.c @@ -646,7 +646,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077_a", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801D9488/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801DA998 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801DAABA; +extern u8 D_801DA9C2; +extern u8 D_801DA998; +extern u8 D_801D9488[]; +extern u8 D_801D9489[]; +extern u8 D_801D948A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801DAABA; + g = D_801DA9C2; + b = D_801DA998; + D_801D9488[0] = r * 5 >> 3; + D_801D9489[0] = g << 3; + D_801D948A[0] = (s32)(b * 255) >> 4; + D_801D9488[4] = (s32)(r * 143) >> 4; + D_801D9489[4] = g * 25 >> 1; + D_801D948A[4] = (s32)(b * 255) >> 4; + D_801D9488[8] = (s32)(r * 255) >> 4; + D_801D9489[8] = (s32)(g * 255) >> 4; + D_801D948A[8] = (s32)(b * 255) >> 4; + D_801D9488[12] = (s32)(r * 143) >> 4; + D_801D9489[12] = (s32)(g * 255) >> 4; + D_801D948A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801D9488[i] = arg2[0x44] * D_801DAABA >> 4; + D_801D9489[i] = arg2[0x45] * D_801DA9C2 >> 4; + D_801D948A[i] = arg2[0x46] * D_801DA998 >> 4; + i = (arg1 + 1) * 4; + D_801D9488[i] = arg2[0x47] * D_801DAABA >> 4; + D_801D9489[i] = arg2[0x48] * D_801DA9C2 >> 4; + D_801D948A[i] = arg2[0x49] * D_801DA998 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801DAABA << 3; + arg2[0x21] = D_801DA9C2 << 3; + arg2[0x22] = D_801DA998 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC01_080/ov_SC01_080.c b/src/ov_SC01_080/ov_SC01_080.c index 40f1df6ae4..183b897072 100644 --- a/src/ov_SC01_080/ov_SC01_080.c +++ b/src/ov_SC01_080/ov_SC01_080.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_080/nonmatchings/ov_SC01_080", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801C46F8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801C75D8 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801C7EDE; +extern u8 D_801C7E00; +extern u8 D_801C75D8; +extern u8 D_801C46F8[]; +extern u8 D_801C46F9[]; +extern u8 D_801C46FA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801C7EDE; + g = D_801C7E00; + b = D_801C75D8; + D_801C46F8[0] = r * 5 >> 3; + D_801C46F9[0] = g << 3; + D_801C46FA[0] = (s32)(b * 255) >> 4; + D_801C46F8[4] = (s32)(r * 143) >> 4; + D_801C46F9[4] = g * 25 >> 1; + D_801C46FA[4] = (s32)(b * 255) >> 4; + D_801C46F8[8] = (s32)(r * 255) >> 4; + D_801C46F9[8] = (s32)(g * 255) >> 4; + D_801C46FA[8] = (s32)(b * 255) >> 4; + D_801C46F8[12] = (s32)(r * 143) >> 4; + D_801C46F9[12] = (s32)(g * 255) >> 4; + D_801C46FA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801C46F8[i] = arg2[0x44] * D_801C7EDE >> 4; + D_801C46F9[i] = arg2[0x45] * D_801C7E00 >> 4; + D_801C46FA[i] = arg2[0x46] * D_801C75D8 >> 4; + i = (arg1 + 1) * 4; + D_801C46F8[i] = arg2[0x47] * D_801C7EDE >> 4; + D_801C46F9[i] = arg2[0x48] * D_801C7E00 >> 4; + D_801C46FA[i] = arg2[0x49] * D_801C75D8 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801C7EDE << 3; + arg2[0x21] = D_801C7E00 << 3; + arg2[0x22] = D_801C75D8 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC01_084/ov_SC01_084.c b/src/ov_SC01_084/ov_SC01_084.c index b2c0fea559..e70f5b508d 100644 --- a/src/ov_SC01_084/ov_SC01_084.c +++ b/src/ov_SC01_084/ov_SC01_084.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_084/nonmatchings/ov_SC01_084", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801C61A0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801C7730 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801C7ABA; +extern u8 D_801C7762; +extern u8 D_801C7730; +extern u8 D_801C61A0[]; +extern u8 D_801C61A1[]; +extern u8 D_801C61A2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801C7ABA; + g = D_801C7762; + b = D_801C7730; + D_801C61A0[0] = r * 5 >> 3; + D_801C61A1[0] = g << 3; + D_801C61A2[0] = (s32)(b * 255) >> 4; + D_801C61A0[4] = (s32)(r * 143) >> 4; + D_801C61A1[4] = g * 25 >> 1; + D_801C61A2[4] = (s32)(b * 255) >> 4; + D_801C61A0[8] = (s32)(r * 255) >> 4; + D_801C61A1[8] = (s32)(g * 255) >> 4; + D_801C61A2[8] = (s32)(b * 255) >> 4; + D_801C61A0[12] = (s32)(r * 143) >> 4; + D_801C61A1[12] = (s32)(g * 255) >> 4; + D_801C61A2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801C61A0[i] = arg2[0x44] * D_801C7ABA >> 4; + D_801C61A1[i] = arg2[0x45] * D_801C7762 >> 4; + D_801C61A2[i] = arg2[0x46] * D_801C7730 >> 4; + i = (arg1 + 1) * 4; + D_801C61A0[i] = arg2[0x47] * D_801C7ABA >> 4; + D_801C61A1[i] = arg2[0x48] * D_801C7762 >> 4; + D_801C61A2[i] = arg2[0x49] * D_801C7730 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801C7ABA << 3; + arg2[0x21] = D_801C7762 << 3; + arg2[0x22] = D_801C7730 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC02_000/ov_SC02_000.c b/src/ov_SC02_000/ov_SC02_000.c index a42a9c0f60..60a3a43ada 100644 --- a/src/ov_SC02_000/ov_SC02_000.c +++ b/src/ov_SC02_000/ov_SC02_000.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801E6CD0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801E8670 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801E87BE; +extern u8 D_801E8692; +extern u8 D_801E8670; +extern u8 D_801E6CD0[]; +extern u8 D_801E6CD1[]; +extern u8 D_801E6CD2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801E87BE; + g = D_801E8692; + b = D_801E8670; + D_801E6CD0[0] = r * 5 >> 3; + D_801E6CD1[0] = g << 3; + D_801E6CD2[0] = (s32)(b * 255) >> 4; + D_801E6CD0[4] = (s32)(r * 143) >> 4; + D_801E6CD1[4] = g * 25 >> 1; + D_801E6CD2[4] = (s32)(b * 255) >> 4; + D_801E6CD0[8] = (s32)(r * 255) >> 4; + D_801E6CD1[8] = (s32)(g * 255) >> 4; + D_801E6CD2[8] = (s32)(b * 255) >> 4; + D_801E6CD0[12] = (s32)(r * 143) >> 4; + D_801E6CD1[12] = (s32)(g * 255) >> 4; + D_801E6CD2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801E6CD0[i] = arg2[0x44] * D_801E87BE >> 4; + D_801E6CD1[i] = arg2[0x45] * D_801E8692 >> 4; + D_801E6CD2[i] = arg2[0x46] * D_801E8670 >> 4; + i = (arg1 + 1) * 4; + D_801E6CD0[i] = arg2[0x47] * D_801E87BE >> 4; + D_801E6CD1[i] = arg2[0x48] * D_801E8692 >> 4; + D_801E6CD2[i] = arg2[0x49] * D_801E8670 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801E87BE << 3; + arg2[0x21] = D_801E8692 << 3; + arg2[0x22] = D_801E8670 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC02_003/ov_SC02_003.c b/src/ov_SC02_003/ov_SC02_003.c index ad232feab8..b2d47ca82c 100644 --- a/src/ov_SC02_003/ov_SC02_003.c +++ b/src/ov_SC02_003/ov_SC02_003.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_003/nonmatchings/ov_SC02_003", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801E6CD0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801E8670 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801E87BE; +extern u8 D_801E8692; +extern u8 D_801E8670; +extern u8 D_801E6CD0[]; +extern u8 D_801E6CD1[]; +extern u8 D_801E6CD2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801E87BE; + g = D_801E8692; + b = D_801E8670; + D_801E6CD0[0] = r * 5 >> 3; + D_801E6CD1[0] = g << 3; + D_801E6CD2[0] = (s32)(b * 255) >> 4; + D_801E6CD0[4] = (s32)(r * 143) >> 4; + D_801E6CD1[4] = g * 25 >> 1; + D_801E6CD2[4] = (s32)(b * 255) >> 4; + D_801E6CD0[8] = (s32)(r * 255) >> 4; + D_801E6CD1[8] = (s32)(g * 255) >> 4; + D_801E6CD2[8] = (s32)(b * 255) >> 4; + D_801E6CD0[12] = (s32)(r * 143) >> 4; + D_801E6CD1[12] = (s32)(g * 255) >> 4; + D_801E6CD2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801E6CD0[i] = arg2[0x44] * D_801E87BE >> 4; + D_801E6CD1[i] = arg2[0x45] * D_801E8692 >> 4; + D_801E6CD2[i] = arg2[0x46] * D_801E8670 >> 4; + i = (arg1 + 1) * 4; + D_801E6CD0[i] = arg2[0x47] * D_801E87BE >> 4; + D_801E6CD1[i] = arg2[0x48] * D_801E8692 >> 4; + D_801E6CD2[i] = arg2[0x49] * D_801E8670 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801E87BE << 3; + arg2[0x21] = D_801E8692 << 3; + arg2[0x22] = D_801E8670 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC02_004/ov_SC02_004.c b/src/ov_SC02_004/ov_SC02_004.c index e6c5e0fd9d..fbd93e8a1a 100644 --- a/src/ov_SC02_004/ov_SC02_004.c +++ b/src/ov_SC02_004/ov_SC02_004.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_004/nonmatchings/ov_SC02_004", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_80194F20/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_80196258 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_80196352; +extern u8 D_8019627A; +extern u8 D_80196258; +extern u8 D_80194F20[]; +extern u8 D_80194F21[]; +extern u8 D_80194F22[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_80196352; + g = D_8019627A; + b = D_80196258; + D_80194F20[0] = r * 5 >> 3; + D_80194F21[0] = g << 3; + D_80194F22[0] = (s32)(b * 255) >> 4; + D_80194F20[4] = (s32)(r * 143) >> 4; + D_80194F21[4] = g * 25 >> 1; + D_80194F22[4] = (s32)(b * 255) >> 4; + D_80194F20[8] = (s32)(r * 255) >> 4; + D_80194F21[8] = (s32)(g * 255) >> 4; + D_80194F22[8] = (s32)(b * 255) >> 4; + D_80194F20[12] = (s32)(r * 143) >> 4; + D_80194F21[12] = (s32)(g * 255) >> 4; + D_80194F22[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_80194F20[i] = arg2[0x44] * D_80196352 >> 4; + D_80194F21[i] = arg2[0x45] * D_8019627A >> 4; + D_80194F22[i] = arg2[0x46] * D_80196258 >> 4; + i = (arg1 + 1) * 4; + D_80194F20[i] = arg2[0x47] * D_80196352 >> 4; + D_80194F21[i] = arg2[0x48] * D_8019627A >> 4; + D_80194F22[i] = arg2[0x49] * D_80196258 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_80196352 << 3; + arg2[0x21] = D_8019627A << 3; + arg2[0x22] = D_80196258 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC02_005/ov_SC02_005.c b/src/ov_SC02_005/ov_SC02_005.c index 74867c7d7c..4cf793eb27 100644 --- a/src/ov_SC02_005/ov_SC02_005.c +++ b/src/ov_SC02_005/ov_SC02_005.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801E2F98/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801E4A40 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801E4BDA; +extern u8 D_801E4B00; +extern u8 D_801E4A40; +extern u8 D_801E2F98[]; +extern u8 D_801E2F99[]; +extern u8 D_801E2F9A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801E4BDA; + g = D_801E4B00; + b = D_801E4A40; + D_801E2F98[0] = r * 5 >> 3; + D_801E2F99[0] = g << 3; + D_801E2F9A[0] = (s32)(b * 255) >> 4; + D_801E2F98[4] = (s32)(r * 143) >> 4; + D_801E2F99[4] = g * 25 >> 1; + D_801E2F9A[4] = (s32)(b * 255) >> 4; + D_801E2F98[8] = (s32)(r * 255) >> 4; + D_801E2F99[8] = (s32)(g * 255) >> 4; + D_801E2F9A[8] = (s32)(b * 255) >> 4; + D_801E2F98[12] = (s32)(r * 143) >> 4; + D_801E2F99[12] = (s32)(g * 255) >> 4; + D_801E2F9A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801E2F98[i] = arg2[0x44] * D_801E4BDA >> 4; + D_801E2F99[i] = arg2[0x45] * D_801E4B00 >> 4; + D_801E2F9A[i] = arg2[0x46] * D_801E4A40 >> 4; + i = (arg1 + 1) * 4; + D_801E2F98[i] = arg2[0x47] * D_801E4BDA >> 4; + D_801E2F99[i] = arg2[0x48] * D_801E4B00 >> 4; + D_801E2F9A[i] = arg2[0x49] * D_801E4A40 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801E4BDA << 3; + arg2[0x21] = D_801E4B00 << 3; + arg2[0x22] = D_801E4A40 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC02_011/ov_SC02_011.c b/src/ov_SC02_011/ov_SC02_011.c index 24447072a8..d1b83bda01 100644 --- a/src/ov_SC02_011/ov_SC02_011.c +++ b/src/ov_SC02_011/ov_SC02_011.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801E9E78/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801EB910 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801EBA0A; +extern u8 D_801EB932; +extern u8 D_801EB910; +extern u8 D_801E9E78[]; +extern u8 D_801E9E79[]; +extern u8 D_801E9E7A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801EBA0A; + g = D_801EB932; + b = D_801EB910; + D_801E9E78[0] = r * 5 >> 3; + D_801E9E79[0] = g << 3; + D_801E9E7A[0] = (s32)(b * 255) >> 4; + D_801E9E78[4] = (s32)(r * 143) >> 4; + D_801E9E79[4] = g * 25 >> 1; + D_801E9E7A[4] = (s32)(b * 255) >> 4; + D_801E9E78[8] = (s32)(r * 255) >> 4; + D_801E9E79[8] = (s32)(g * 255) >> 4; + D_801E9E7A[8] = (s32)(b * 255) >> 4; + D_801E9E78[12] = (s32)(r * 143) >> 4; + D_801E9E79[12] = (s32)(g * 255) >> 4; + D_801E9E7A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801E9E78[i] = arg2[0x44] * D_801EBA0A >> 4; + D_801E9E79[i] = arg2[0x45] * D_801EB932 >> 4; + D_801E9E7A[i] = arg2[0x46] * D_801EB910 >> 4; + i = (arg1 + 1) * 4; + D_801E9E78[i] = arg2[0x47] * D_801EBA0A >> 4; + D_801E9E79[i] = arg2[0x48] * D_801EB932 >> 4; + D_801E9E7A[i] = arg2[0x49] * D_801EB910 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801EBA0A << 3; + arg2[0x21] = D_801EB932 << 3; + arg2[0x22] = D_801EB910 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC02_015/ov_SC02_015.c b/src/ov_SC02_015/ov_SC02_015.c index 7550ba40a1..6e46b562df 100644 --- a/src/ov_SC02_015/ov_SC02_015.c +++ b/src/ov_SC02_015/ov_SC02_015.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_015/nonmatchings/ov_SC02_015", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_8018EFF8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_80190530 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_8019062A; +extern u8 D_80190552; +extern u8 D_80190530; +extern u8 D_8018EFF8[]; +extern u8 D_8018EFF9[]; +extern u8 D_8018EFFA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_8019062A; + g = D_80190552; + b = D_80190530; + D_8018EFF8[0] = r * 5 >> 3; + D_8018EFF9[0] = g << 3; + D_8018EFFA[0] = (s32)(b * 255) >> 4; + D_8018EFF8[4] = (s32)(r * 143) >> 4; + D_8018EFF9[4] = g * 25 >> 1; + D_8018EFFA[4] = (s32)(b * 255) >> 4; + D_8018EFF8[8] = (s32)(r * 255) >> 4; + D_8018EFF9[8] = (s32)(g * 255) >> 4; + D_8018EFFA[8] = (s32)(b * 255) >> 4; + D_8018EFF8[12] = (s32)(r * 143) >> 4; + D_8018EFF9[12] = (s32)(g * 255) >> 4; + D_8018EFFA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_8018EFF8[i] = arg2[0x44] * D_8019062A >> 4; + D_8018EFF9[i] = arg2[0x45] * D_80190552 >> 4; + D_8018EFFA[i] = arg2[0x46] * D_80190530 >> 4; + i = (arg1 + 1) * 4; + D_8018EFF8[i] = arg2[0x47] * D_8019062A >> 4; + D_8018EFF9[i] = arg2[0x48] * D_80190552 >> 4; + D_8018EFFA[i] = arg2[0x49] * D_80190530 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_8019062A << 3; + arg2[0x21] = D_80190552 << 3; + arg2[0x22] = D_80190530 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC02_016/ov_SC02_016.c b/src/ov_SC02_016/ov_SC02_016.c index 997dc98aa7..11d7707c46 100644 --- a/src/ov_SC02_016/ov_SC02_016.c +++ b/src/ov_SC02_016/ov_SC02_016.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_016/nonmatchings/ov_SC02_016", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801B2C10/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801B4968 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801B4A62; +extern u8 D_801B498A; +extern u8 D_801B4968; +extern u8 D_801B2C10[]; +extern u8 D_801B2C11[]; +extern u8 D_801B2C12[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801B4A62; + g = D_801B498A; + b = D_801B4968; + D_801B2C10[0] = r * 5 >> 3; + D_801B2C11[0] = g << 3; + D_801B2C12[0] = (s32)(b * 255) >> 4; + D_801B2C10[4] = (s32)(r * 143) >> 4; + D_801B2C11[4] = g * 25 >> 1; + D_801B2C12[4] = (s32)(b * 255) >> 4; + D_801B2C10[8] = (s32)(r * 255) >> 4; + D_801B2C11[8] = (s32)(g * 255) >> 4; + D_801B2C12[8] = (s32)(b * 255) >> 4; + D_801B2C10[12] = (s32)(r * 143) >> 4; + D_801B2C11[12] = (s32)(g * 255) >> 4; + D_801B2C12[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801B2C10[i] = arg2[0x44] * D_801B4A62 >> 4; + D_801B2C11[i] = arg2[0x45] * D_801B498A >> 4; + D_801B2C12[i] = arg2[0x46] * D_801B4968 >> 4; + i = (arg1 + 1) * 4; + D_801B2C10[i] = arg2[0x47] * D_801B4A62 >> 4; + D_801B2C11[i] = arg2[0x48] * D_801B498A >> 4; + D_801B2C12[i] = arg2[0x49] * D_801B4968 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801B4A62 << 3; + arg2[0x21] = D_801B498A << 3; + arg2[0x22] = D_801B4968 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC02_017/ov_SC02_017.c b/src/ov_SC02_017/ov_SC02_017.c index 69afc7f6c2..59fb4cbb80 100644 --- a/src/ov_SC02_017/ov_SC02_017.c +++ b/src/ov_SC02_017/ov_SC02_017.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801EE438/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801EFBC8 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801EFCC2; +extern u8 D_801EFBEA; +extern u8 D_801EFBC8; +extern u8 D_801EE438[]; +extern u8 D_801EE439[]; +extern u8 D_801EE43A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801EFCC2; + g = D_801EFBEA; + b = D_801EFBC8; + D_801EE438[0] = r * 5 >> 3; + D_801EE439[0] = g << 3; + D_801EE43A[0] = (s32)(b * 255) >> 4; + D_801EE438[4] = (s32)(r * 143) >> 4; + D_801EE439[4] = g * 25 >> 1; + D_801EE43A[4] = (s32)(b * 255) >> 4; + D_801EE438[8] = (s32)(r * 255) >> 4; + D_801EE439[8] = (s32)(g * 255) >> 4; + D_801EE43A[8] = (s32)(b * 255) >> 4; + D_801EE438[12] = (s32)(r * 143) >> 4; + D_801EE439[12] = (s32)(g * 255) >> 4; + D_801EE43A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801EE438[i] = arg2[0x44] * D_801EFCC2 >> 4; + D_801EE439[i] = arg2[0x45] * D_801EFBEA >> 4; + D_801EE43A[i] = arg2[0x46] * D_801EFBC8 >> 4; + i = (arg1 + 1) * 4; + D_801EE438[i] = arg2[0x47] * D_801EFCC2 >> 4; + D_801EE439[i] = arg2[0x48] * D_801EFBEA >> 4; + D_801EE43A[i] = arg2[0x49] * D_801EFBC8 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801EFCC2 << 3; + arg2[0x21] = D_801EFBEA << 3; + arg2[0x22] = D_801EFBC8 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC02_021/ov_SC02_021.c b/src/ov_SC02_021/ov_SC02_021.c index 3fac826936..0207f230ac 100644 --- a/src/ov_SC02_021/ov_SC02_021.c +++ b/src/ov_SC02_021/ov_SC02_021.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_021/nonmatchings/ov_SC02_021", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801919A8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_80193730 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_8019382A; +extern u8 D_80193752; +extern u8 D_80193730; +extern u8 D_801919A8[]; +extern u8 D_801919A9[]; +extern u8 D_801919AA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_8019382A; + g = D_80193752; + b = D_80193730; + D_801919A8[0] = r * 5 >> 3; + D_801919A9[0] = g << 3; + D_801919AA[0] = (s32)(b * 255) >> 4; + D_801919A8[4] = (s32)(r * 143) >> 4; + D_801919A9[4] = g * 25 >> 1; + D_801919AA[4] = (s32)(b * 255) >> 4; + D_801919A8[8] = (s32)(r * 255) >> 4; + D_801919A9[8] = (s32)(g * 255) >> 4; + D_801919AA[8] = (s32)(b * 255) >> 4; + D_801919A8[12] = (s32)(r * 143) >> 4; + D_801919A9[12] = (s32)(g * 255) >> 4; + D_801919AA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801919A8[i] = arg2[0x44] * D_8019382A >> 4; + D_801919A9[i] = arg2[0x45] * D_80193752 >> 4; + D_801919AA[i] = arg2[0x46] * D_80193730 >> 4; + i = (arg1 + 1) * 4; + D_801919A8[i] = arg2[0x47] * D_8019382A >> 4; + D_801919A9[i] = arg2[0x48] * D_80193752 >> 4; + D_801919AA[i] = arg2[0x49] * D_80193730 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_8019382A << 3; + arg2[0x21] = D_80193752 << 3; + arg2[0x22] = D_80193730 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC02_026/ov_SC02_026.c b/src/ov_SC02_026/ov_SC02_026.c index ed8d42529b..0cb8611c5e 100644 --- a/src/ov_SC02_026/ov_SC02_026.c +++ b/src/ov_SC02_026/ov_SC02_026.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801CEDE8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801D0150 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801D024A; +extern u8 D_801D0172; +extern u8 D_801D0150; +extern u8 D_801CEDE8[]; +extern u8 D_801CEDE9[]; +extern u8 D_801CEDEA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801D024A; + g = D_801D0172; + b = D_801D0150; + D_801CEDE8[0] = r * 5 >> 3; + D_801CEDE9[0] = g << 3; + D_801CEDEA[0] = (s32)(b * 255) >> 4; + D_801CEDE8[4] = (s32)(r * 143) >> 4; + D_801CEDE9[4] = g * 25 >> 1; + D_801CEDEA[4] = (s32)(b * 255) >> 4; + D_801CEDE8[8] = (s32)(r * 255) >> 4; + D_801CEDE9[8] = (s32)(g * 255) >> 4; + D_801CEDEA[8] = (s32)(b * 255) >> 4; + D_801CEDE8[12] = (s32)(r * 143) >> 4; + D_801CEDE9[12] = (s32)(g * 255) >> 4; + D_801CEDEA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801CEDE8[i] = arg2[0x44] * D_801D024A >> 4; + D_801CEDE9[i] = arg2[0x45] * D_801D0172 >> 4; + D_801CEDEA[i] = arg2[0x46] * D_801D0150 >> 4; + i = (arg1 + 1) * 4; + D_801CEDE8[i] = arg2[0x47] * D_801D024A >> 4; + D_801CEDE9[i] = arg2[0x48] * D_801D0172 >> 4; + D_801CEDEA[i] = arg2[0x49] * D_801D0150 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801D024A << 3; + arg2[0x21] = D_801D0172 << 3; + arg2[0x22] = D_801D0150 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC02_027/ov_SC02_027.c b/src/ov_SC02_027/ov_SC02_027.c index 8ecec65710..7cbe27d558 100644 --- a/src/ov_SC02_027/ov_SC02_027.c +++ b/src/ov_SC02_027/ov_SC02_027.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801D8B58/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801DA8D0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801DA9CA; +extern u8 D_801DA8F2; +extern u8 D_801DA8D0; +extern u8 D_801D8B58[]; +extern u8 D_801D8B59[]; +extern u8 D_801D8B5A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801DA9CA; + g = D_801DA8F2; + b = D_801DA8D0; + D_801D8B58[0] = r * 5 >> 3; + D_801D8B59[0] = g << 3; + D_801D8B5A[0] = (s32)(b * 255) >> 4; + D_801D8B58[4] = (s32)(r * 143) >> 4; + D_801D8B59[4] = g * 25 >> 1; + D_801D8B5A[4] = (s32)(b * 255) >> 4; + D_801D8B58[8] = (s32)(r * 255) >> 4; + D_801D8B59[8] = (s32)(g * 255) >> 4; + D_801D8B5A[8] = (s32)(b * 255) >> 4; + D_801D8B58[12] = (s32)(r * 143) >> 4; + D_801D8B59[12] = (s32)(g * 255) >> 4; + D_801D8B5A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801D8B58[i] = arg2[0x44] * D_801DA9CA >> 4; + D_801D8B59[i] = arg2[0x45] * D_801DA8F2 >> 4; + D_801D8B5A[i] = arg2[0x46] * D_801DA8D0 >> 4; + i = (arg1 + 1) * 4; + D_801D8B58[i] = arg2[0x47] * D_801DA9CA >> 4; + D_801D8B59[i] = arg2[0x48] * D_801DA8F2 >> 4; + D_801D8B5A[i] = arg2[0x49] * D_801DA8D0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801DA9CA << 3; + arg2[0x21] = D_801DA8F2 << 3; + arg2[0x22] = D_801DA8D0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC02_028/ov_SC02_028.c b/src/ov_SC02_028/ov_SC02_028.c index 80cda6229c..3943b314fe 100644 --- a/src/ov_SC02_028/ov_SC02_028.c +++ b/src/ov_SC02_028/ov_SC02_028.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_028/nonmatchings/ov_SC02_028", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801D1AF8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801D34D0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801D35CA; +extern u8 D_801D34F2; +extern u8 D_801D34D0; +extern u8 D_801D1AF8[]; +extern u8 D_801D1AF9[]; +extern u8 D_801D1AFA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801D35CA; + g = D_801D34F2; + b = D_801D34D0; + D_801D1AF8[0] = r * 5 >> 3; + D_801D1AF9[0] = g << 3; + D_801D1AFA[0] = (s32)(b * 255) >> 4; + D_801D1AF8[4] = (s32)(r * 143) >> 4; + D_801D1AF9[4] = g * 25 >> 1; + D_801D1AFA[4] = (s32)(b * 255) >> 4; + D_801D1AF8[8] = (s32)(r * 255) >> 4; + D_801D1AF9[8] = (s32)(g * 255) >> 4; + D_801D1AFA[8] = (s32)(b * 255) >> 4; + D_801D1AF8[12] = (s32)(r * 143) >> 4; + D_801D1AF9[12] = (s32)(g * 255) >> 4; + D_801D1AFA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801D1AF8[i] = arg2[0x44] * D_801D35CA >> 4; + D_801D1AF9[i] = arg2[0x45] * D_801D34F2 >> 4; + D_801D1AFA[i] = arg2[0x46] * D_801D34D0 >> 4; + i = (arg1 + 1) * 4; + D_801D1AF8[i] = arg2[0x47] * D_801D35CA >> 4; + D_801D1AF9[i] = arg2[0x48] * D_801D34F2 >> 4; + D_801D1AFA[i] = arg2[0x49] * D_801D34D0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801D35CA << 3; + arg2[0x21] = D_801D34F2 << 3; + arg2[0x22] = D_801D34D0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC02_031/ov_SC02_031.c b/src/ov_SC02_031/ov_SC02_031.c index 50729175cf..78b5a27fe5 100644 --- a/src/ov_SC02_031/ov_SC02_031.c +++ b/src/ov_SC02_031/ov_SC02_031.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_031/nonmatchings/ov_SC02_031", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801B6270/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801B79A0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801B7A9A; +extern u8 D_801B79C2; +extern u8 D_801B79A0; +extern u8 D_801B6270[]; +extern u8 D_801B6271[]; +extern u8 D_801B6272[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801B7A9A; + g = D_801B79C2; + b = D_801B79A0; + D_801B6270[0] = r * 5 >> 3; + D_801B6271[0] = g << 3; + D_801B6272[0] = (s32)(b * 255) >> 4; + D_801B6270[4] = (s32)(r * 143) >> 4; + D_801B6271[4] = g * 25 >> 1; + D_801B6272[4] = (s32)(b * 255) >> 4; + D_801B6270[8] = (s32)(r * 255) >> 4; + D_801B6271[8] = (s32)(g * 255) >> 4; + D_801B6272[8] = (s32)(b * 255) >> 4; + D_801B6270[12] = (s32)(r * 143) >> 4; + D_801B6271[12] = (s32)(g * 255) >> 4; + D_801B6272[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801B6270[i] = arg2[0x44] * D_801B7A9A >> 4; + D_801B6271[i] = arg2[0x45] * D_801B79C2 >> 4; + D_801B6272[i] = arg2[0x46] * D_801B79A0 >> 4; + i = (arg1 + 1) * 4; + D_801B6270[i] = arg2[0x47] * D_801B7A9A >> 4; + D_801B6271[i] = arg2[0x48] * D_801B79C2 >> 4; + D_801B6272[i] = arg2[0x49] * D_801B79A0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801B7A9A << 3; + arg2[0x21] = D_801B79C2 << 3; + arg2[0x22] = D_801B79A0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC02_035/ov_SC02_035.c b/src/ov_SC02_035/ov_SC02_035.c index b8be94d336..38fd029a3e 100644 --- a/src/ov_SC02_035/ov_SC02_035.c +++ b/src/ov_SC02_035/ov_SC02_035.c @@ -561,7 +561,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_035/nonmatchings/ov_SC02_035", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801BD5A0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801BE8D8 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801BE9D2; +extern u8 D_801BE8FA; +extern u8 D_801BE8D8; +extern u8 D_801BD5A0[]; +extern u8 D_801BD5A1[]; +extern u8 D_801BD5A2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801BE9D2; + g = D_801BE8FA; + b = D_801BE8D8; + D_801BD5A0[0] = r * 5 >> 3; + D_801BD5A1[0] = g << 3; + D_801BD5A2[0] = (s32)(b * 255) >> 4; + D_801BD5A0[4] = (s32)(r * 143) >> 4; + D_801BD5A1[4] = g * 25 >> 1; + D_801BD5A2[4] = (s32)(b * 255) >> 4; + D_801BD5A0[8] = (s32)(r * 255) >> 4; + D_801BD5A1[8] = (s32)(g * 255) >> 4; + D_801BD5A2[8] = (s32)(b * 255) >> 4; + D_801BD5A0[12] = (s32)(r * 143) >> 4; + D_801BD5A1[12] = (s32)(g * 255) >> 4; + D_801BD5A2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801BD5A0[i] = arg2[0x44] * D_801BE9D2 >> 4; + D_801BD5A1[i] = arg2[0x45] * D_801BE8FA >> 4; + D_801BD5A2[i] = arg2[0x46] * D_801BE8D8 >> 4; + i = (arg1 + 1) * 4; + D_801BD5A0[i] = arg2[0x47] * D_801BE9D2 >> 4; + D_801BD5A1[i] = arg2[0x48] * D_801BE8FA >> 4; + D_801BD5A2[i] = arg2[0x49] * D_801BE8D8 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801BE9D2 << 3; + arg2[0x21] = D_801BE8FA << 3; + arg2[0x22] = D_801BE8D8 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC02_039/ov_SC02_039.c b/src/ov_SC02_039/ov_SC02_039.c index e569b4c22d..9c953a022c 100644 --- a/src/ov_SC02_039/ov_SC02_039.c +++ b/src/ov_SC02_039/ov_SC02_039.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_039/nonmatchings/ov_SC02_039", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_8019F950/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801A0C90 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801A0D8A; +extern u8 D_801A0CB2; +extern u8 D_801A0C90; +extern u8 D_8019F950[]; +extern u8 D_8019F951[]; +extern u8 D_8019F952[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801A0D8A; + g = D_801A0CB2; + b = D_801A0C90; + D_8019F950[0] = r * 5 >> 3; + D_8019F951[0] = g << 3; + D_8019F952[0] = (s32)(b * 255) >> 4; + D_8019F950[4] = (s32)(r * 143) >> 4; + D_8019F951[4] = g * 25 >> 1; + D_8019F952[4] = (s32)(b * 255) >> 4; + D_8019F950[8] = (s32)(r * 255) >> 4; + D_8019F951[8] = (s32)(g * 255) >> 4; + D_8019F952[8] = (s32)(b * 255) >> 4; + D_8019F950[12] = (s32)(r * 143) >> 4; + D_8019F951[12] = (s32)(g * 255) >> 4; + D_8019F952[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_8019F950[i] = arg2[0x44] * D_801A0D8A >> 4; + D_8019F951[i] = arg2[0x45] * D_801A0CB2 >> 4; + D_8019F952[i] = arg2[0x46] * D_801A0C90 >> 4; + i = (arg1 + 1) * 4; + D_8019F950[i] = arg2[0x47] * D_801A0D8A >> 4; + D_8019F951[i] = arg2[0x48] * D_801A0CB2 >> 4; + D_8019F952[i] = arg2[0x49] * D_801A0C90 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801A0D8A << 3; + arg2[0x21] = D_801A0CB2 << 3; + arg2[0x22] = D_801A0C90 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC02_041/ov_SC02_041.c b/src/ov_SC02_041/ov_SC02_041.c index 87436cd3f8..d198161f5d 100644 --- a/src/ov_SC02_041/ov_SC02_041.c +++ b/src/ov_SC02_041/ov_SC02_041.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801B7CC8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801B9568 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801B9662; +extern u8 D_801B958A; +extern u8 D_801B9568; +extern u8 D_801B7CC8[]; +extern u8 D_801B7CC9[]; +extern u8 D_801B7CCA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801B9662; + g = D_801B958A; + b = D_801B9568; + D_801B7CC8[0] = r * 5 >> 3; + D_801B7CC9[0] = g << 3; + D_801B7CCA[0] = (s32)(b * 255) >> 4; + D_801B7CC8[4] = (s32)(r * 143) >> 4; + D_801B7CC9[4] = g * 25 >> 1; + D_801B7CCA[4] = (s32)(b * 255) >> 4; + D_801B7CC8[8] = (s32)(r * 255) >> 4; + D_801B7CC9[8] = (s32)(g * 255) >> 4; + D_801B7CCA[8] = (s32)(b * 255) >> 4; + D_801B7CC8[12] = (s32)(r * 143) >> 4; + D_801B7CC9[12] = (s32)(g * 255) >> 4; + D_801B7CCA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801B7CC8[i] = arg2[0x44] * D_801B9662 >> 4; + D_801B7CC9[i] = arg2[0x45] * D_801B958A >> 4; + D_801B7CCA[i] = arg2[0x46] * D_801B9568 >> 4; + i = (arg1 + 1) * 4; + D_801B7CC8[i] = arg2[0x47] * D_801B9662 >> 4; + D_801B7CC9[i] = arg2[0x48] * D_801B958A >> 4; + D_801B7CCA[i] = arg2[0x49] * D_801B9568 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801B9662 << 3; + arg2[0x21] = D_801B958A << 3; + arg2[0x22] = D_801B9568 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_001/ov_SC03_001.c b/src/ov_SC03_001/ov_SC03_001.c index a26083a9e7..c3918735f9 100644 --- a/src/ov_SC03_001/ov_SC03_001.c +++ b/src/ov_SC03_001/ov_SC03_001.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_001/nonmatchings/ov_SC03_001", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801ED348/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801EF2C8 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801EF3F2; +extern u8 D_801EF2F2; +extern u8 D_801EF2C8; +extern u8 D_801ED348[]; +extern u8 D_801ED349[]; +extern u8 D_801ED34A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801EF3F2; + g = D_801EF2F2; + b = D_801EF2C8; + D_801ED348[0] = r * 5 >> 3; + D_801ED349[0] = g << 3; + D_801ED34A[0] = (s32)(b * 255) >> 4; + D_801ED348[4] = (s32)(r * 143) >> 4; + D_801ED349[4] = g * 25 >> 1; + D_801ED34A[4] = (s32)(b * 255) >> 4; + D_801ED348[8] = (s32)(r * 255) >> 4; + D_801ED349[8] = (s32)(g * 255) >> 4; + D_801ED34A[8] = (s32)(b * 255) >> 4; + D_801ED348[12] = (s32)(r * 143) >> 4; + D_801ED349[12] = (s32)(g * 255) >> 4; + D_801ED34A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801ED348[i] = arg2[0x44] * D_801EF3F2 >> 4; + D_801ED349[i] = arg2[0x45] * D_801EF2F2 >> 4; + D_801ED34A[i] = arg2[0x46] * D_801EF2C8 >> 4; + i = (arg1 + 1) * 4; + D_801ED348[i] = arg2[0x47] * D_801EF3F2 >> 4; + D_801ED349[i] = arg2[0x48] * D_801EF2F2 >> 4; + D_801ED34A[i] = arg2[0x49] * D_801EF2C8 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801EF3F2 << 3; + arg2[0x21] = D_801EF2F2 << 3; + arg2[0x22] = D_801EF2C8 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_002/ov_SC03_002.c b/src/ov_SC03_002/ov_SC03_002.c index 0dc4a41fbb..bf847a2721 100644 --- a/src/ov_SC03_002/ov_SC03_002.c +++ b/src/ov_SC03_002/ov_SC03_002.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_002/nonmatchings/ov_SC03_002", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801CA3C8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801CB9B0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801CBADA; +extern u8 D_801CB9DA; +extern u8 D_801CB9B0; +extern u8 D_801CA3C8[]; +extern u8 D_801CA3C9[]; +extern u8 D_801CA3CA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801CBADA; + g = D_801CB9DA; + b = D_801CB9B0; + D_801CA3C8[0] = r * 5 >> 3; + D_801CA3C9[0] = g << 3; + D_801CA3CA[0] = (s32)(b * 255) >> 4; + D_801CA3C8[4] = (s32)(r * 143) >> 4; + D_801CA3C9[4] = g * 25 >> 1; + D_801CA3CA[4] = (s32)(b * 255) >> 4; + D_801CA3C8[8] = (s32)(r * 255) >> 4; + D_801CA3C9[8] = (s32)(g * 255) >> 4; + D_801CA3CA[8] = (s32)(b * 255) >> 4; + D_801CA3C8[12] = (s32)(r * 143) >> 4; + D_801CA3C9[12] = (s32)(g * 255) >> 4; + D_801CA3CA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801CA3C8[i] = arg2[0x44] * D_801CBADA >> 4; + D_801CA3C9[i] = arg2[0x45] * D_801CB9DA >> 4; + D_801CA3CA[i] = arg2[0x46] * D_801CB9B0 >> 4; + i = (arg1 + 1) * 4; + D_801CA3C8[i] = arg2[0x47] * D_801CBADA >> 4; + D_801CA3C9[i] = arg2[0x48] * D_801CB9DA >> 4; + D_801CA3CA[i] = arg2[0x49] * D_801CB9B0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801CBADA << 3; + arg2[0x21] = D_801CB9DA << 3; + arg2[0x22] = D_801CB9B0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_003/ov_SC03_003.c b/src/ov_SC03_003/ov_SC03_003.c index 0557fff58d..d29282eb1b 100644 --- a/src/ov_SC03_003/ov_SC03_003.c +++ b/src/ov_SC03_003/ov_SC03_003.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_003/nonmatchings/ov_SC03_003", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_8018E6D0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_8018FA08 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_8018FB02; +extern u8 D_8018FA2A; +extern u8 D_8018FA08; +extern u8 D_8018E6D0[]; +extern u8 D_8018E6D1[]; +extern u8 D_8018E6D2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_8018FB02; + g = D_8018FA2A; + b = D_8018FA08; + D_8018E6D0[0] = r * 5 >> 3; + D_8018E6D1[0] = g << 3; + D_8018E6D2[0] = (s32)(b * 255) >> 4; + D_8018E6D0[4] = (s32)(r * 143) >> 4; + D_8018E6D1[4] = g * 25 >> 1; + D_8018E6D2[4] = (s32)(b * 255) >> 4; + D_8018E6D0[8] = (s32)(r * 255) >> 4; + D_8018E6D1[8] = (s32)(g * 255) >> 4; + D_8018E6D2[8] = (s32)(b * 255) >> 4; + D_8018E6D0[12] = (s32)(r * 143) >> 4; + D_8018E6D1[12] = (s32)(g * 255) >> 4; + D_8018E6D2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_8018E6D0[i] = arg2[0x44] * D_8018FB02 >> 4; + D_8018E6D1[i] = arg2[0x45] * D_8018FA2A >> 4; + D_8018E6D2[i] = arg2[0x46] * D_8018FA08 >> 4; + i = (arg1 + 1) * 4; + D_8018E6D0[i] = arg2[0x47] * D_8018FB02 >> 4; + D_8018E6D1[i] = arg2[0x48] * D_8018FA2A >> 4; + D_8018E6D2[i] = arg2[0x49] * D_8018FA08 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_8018FB02 << 3; + arg2[0x21] = D_8018FA2A << 3; + arg2[0x22] = D_8018FA08 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_006/ov_SC03_006.c b/src/ov_SC03_006/ov_SC03_006.c index 27d8a3b5f6..5e341b2d5e 100644 --- a/src/ov_SC03_006/ov_SC03_006.c +++ b/src/ov_SC03_006/ov_SC03_006.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_006/nonmatchings/ov_SC03_006", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801F6048/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801F7748 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801F7842; +extern u8 D_801F776A; +extern u8 D_801F7748; +extern u8 D_801F6048[]; +extern u8 D_801F6049[]; +extern u8 D_801F604A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801F7842; + g = D_801F776A; + b = D_801F7748; + D_801F6048[0] = r * 5 >> 3; + D_801F6049[0] = g << 3; + D_801F604A[0] = (s32)(b * 255) >> 4; + D_801F6048[4] = (s32)(r * 143) >> 4; + D_801F6049[4] = g * 25 >> 1; + D_801F604A[4] = (s32)(b * 255) >> 4; + D_801F6048[8] = (s32)(r * 255) >> 4; + D_801F6049[8] = (s32)(g * 255) >> 4; + D_801F604A[8] = (s32)(b * 255) >> 4; + D_801F6048[12] = (s32)(r * 143) >> 4; + D_801F6049[12] = (s32)(g * 255) >> 4; + D_801F604A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801F6048[i] = arg2[0x44] * D_801F7842 >> 4; + D_801F6049[i] = arg2[0x45] * D_801F776A >> 4; + D_801F604A[i] = arg2[0x46] * D_801F7748 >> 4; + i = (arg1 + 1) * 4; + D_801F6048[i] = arg2[0x47] * D_801F7842 >> 4; + D_801F6049[i] = arg2[0x48] * D_801F776A >> 4; + D_801F604A[i] = arg2[0x49] * D_801F7748 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801F7842 << 3; + arg2[0x21] = D_801F776A << 3; + arg2[0x22] = D_801F7748 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_007/ov_SC03_007.c b/src/ov_SC03_007/ov_SC03_007.c index 94112ec56a..ff0ccbafa9 100644 --- a/src/ov_SC03_007/ov_SC03_007.c +++ b/src/ov_SC03_007/ov_SC03_007.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_007/nonmatchings/ov_SC03_007", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801E89A0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801EB158 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801EB252; +extern u8 D_801EB17A; +extern u8 D_801EB158; +extern u8 D_801E89A0[]; +extern u8 D_801E89A1[]; +extern u8 D_801E89A2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801EB252; + g = D_801EB17A; + b = D_801EB158; + D_801E89A0[0] = r * 5 >> 3; + D_801E89A1[0] = g << 3; + D_801E89A2[0] = (s32)(b * 255) >> 4; + D_801E89A0[4] = (s32)(r * 143) >> 4; + D_801E89A1[4] = g * 25 >> 1; + D_801E89A2[4] = (s32)(b * 255) >> 4; + D_801E89A0[8] = (s32)(r * 255) >> 4; + D_801E89A1[8] = (s32)(g * 255) >> 4; + D_801E89A2[8] = (s32)(b * 255) >> 4; + D_801E89A0[12] = (s32)(r * 143) >> 4; + D_801E89A1[12] = (s32)(g * 255) >> 4; + D_801E89A2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801E89A0[i] = arg2[0x44] * D_801EB252 >> 4; + D_801E89A1[i] = arg2[0x45] * D_801EB17A >> 4; + D_801E89A2[i] = arg2[0x46] * D_801EB158 >> 4; + i = (arg1 + 1) * 4; + D_801E89A0[i] = arg2[0x47] * D_801EB252 >> 4; + D_801E89A1[i] = arg2[0x48] * D_801EB17A >> 4; + D_801E89A2[i] = arg2[0x49] * D_801EB158 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801EB252 << 3; + arg2[0x21] = D_801EB17A << 3; + arg2[0x22] = D_801EB158 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_010/ov_SC03_010.c b/src/ov_SC03_010/ov_SC03_010.c index 2b2d4e80b5..53996a7482 100644 --- a/src/ov_SC03_010/ov_SC03_010.c +++ b/src/ov_SC03_010/ov_SC03_010.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_010/nonmatchings/ov_SC03_010", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_8019EC00/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801A0060 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801A015A; +extern u8 D_801A0082; +extern u8 D_801A0060; +extern u8 D_8019EC00[]; +extern u8 D_8019EC01[]; +extern u8 D_8019EC02[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801A015A; + g = D_801A0082; + b = D_801A0060; + D_8019EC00[0] = r * 5 >> 3; + D_8019EC01[0] = g << 3; + D_8019EC02[0] = (s32)(b * 255) >> 4; + D_8019EC00[4] = (s32)(r * 143) >> 4; + D_8019EC01[4] = g * 25 >> 1; + D_8019EC02[4] = (s32)(b * 255) >> 4; + D_8019EC00[8] = (s32)(r * 255) >> 4; + D_8019EC01[8] = (s32)(g * 255) >> 4; + D_8019EC02[8] = (s32)(b * 255) >> 4; + D_8019EC00[12] = (s32)(r * 143) >> 4; + D_8019EC01[12] = (s32)(g * 255) >> 4; + D_8019EC02[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_8019EC00[i] = arg2[0x44] * D_801A015A >> 4; + D_8019EC01[i] = arg2[0x45] * D_801A0082 >> 4; + D_8019EC02[i] = arg2[0x46] * D_801A0060 >> 4; + i = (arg1 + 1) * 4; + D_8019EC00[i] = arg2[0x47] * D_801A015A >> 4; + D_8019EC01[i] = arg2[0x48] * D_801A0082 >> 4; + D_8019EC02[i] = arg2[0x49] * D_801A0060 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801A015A << 3; + arg2[0x21] = D_801A0082 << 3; + arg2[0x22] = D_801A0060 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_011/ov_SC03_011.c b/src/ov_SC03_011/ov_SC03_011.c index 6f12967f64..3cf27e18a5 100644 --- a/src/ov_SC03_011/ov_SC03_011.c +++ b/src/ov_SC03_011/ov_SC03_011.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_011/nonmatchings/ov_SC03_011", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801A0E98/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801A2290 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801A238A; +extern u8 D_801A22B2; +extern u8 D_801A2290; +extern u8 D_801A0E98[]; +extern u8 D_801A0E99[]; +extern u8 D_801A0E9A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801A238A; + g = D_801A22B2; + b = D_801A2290; + D_801A0E98[0] = r * 5 >> 3; + D_801A0E99[0] = g << 3; + D_801A0E9A[0] = (s32)(b * 255) >> 4; + D_801A0E98[4] = (s32)(r * 143) >> 4; + D_801A0E99[4] = g * 25 >> 1; + D_801A0E9A[4] = (s32)(b * 255) >> 4; + D_801A0E98[8] = (s32)(r * 255) >> 4; + D_801A0E99[8] = (s32)(g * 255) >> 4; + D_801A0E9A[8] = (s32)(b * 255) >> 4; + D_801A0E98[12] = (s32)(r * 143) >> 4; + D_801A0E99[12] = (s32)(g * 255) >> 4; + D_801A0E9A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801A0E98[i] = arg2[0x44] * D_801A238A >> 4; + D_801A0E99[i] = arg2[0x45] * D_801A22B2 >> 4; + D_801A0E9A[i] = arg2[0x46] * D_801A2290 >> 4; + i = (arg1 + 1) * 4; + D_801A0E98[i] = arg2[0x47] * D_801A238A >> 4; + D_801A0E99[i] = arg2[0x48] * D_801A22B2 >> 4; + D_801A0E9A[i] = arg2[0x49] * D_801A2290 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801A238A << 3; + arg2[0x21] = D_801A22B2 << 3; + arg2[0x22] = D_801A2290 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_012/ov_SC03_012.c b/src/ov_SC03_012/ov_SC03_012.c index fce0f48a3e..e2166bdc5f 100644 --- a/src/ov_SC03_012/ov_SC03_012.c +++ b/src/ov_SC03_012/ov_SC03_012.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_012/nonmatchings/ov_SC03_012", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_80193CB8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_80194FF0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801950EA; +extern u8 D_80195012; +extern u8 D_80194FF0; +extern u8 D_80193CB8[]; +extern u8 D_80193CB9[]; +extern u8 D_80193CBA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801950EA; + g = D_80195012; + b = D_80194FF0; + D_80193CB8[0] = r * 5 >> 3; + D_80193CB9[0] = g << 3; + D_80193CBA[0] = (s32)(b * 255) >> 4; + D_80193CB8[4] = (s32)(r * 143) >> 4; + D_80193CB9[4] = g * 25 >> 1; + D_80193CBA[4] = (s32)(b * 255) >> 4; + D_80193CB8[8] = (s32)(r * 255) >> 4; + D_80193CB9[8] = (s32)(g * 255) >> 4; + D_80193CBA[8] = (s32)(b * 255) >> 4; + D_80193CB8[12] = (s32)(r * 143) >> 4; + D_80193CB9[12] = (s32)(g * 255) >> 4; + D_80193CBA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_80193CB8[i] = arg2[0x44] * D_801950EA >> 4; + D_80193CB9[i] = arg2[0x45] * D_80195012 >> 4; + D_80193CBA[i] = arg2[0x46] * D_80194FF0 >> 4; + i = (arg1 + 1) * 4; + D_80193CB8[i] = arg2[0x47] * D_801950EA >> 4; + D_80193CB9[i] = arg2[0x48] * D_80195012 >> 4; + D_80193CBA[i] = arg2[0x49] * D_80194FF0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801950EA << 3; + arg2[0x21] = D_80195012 << 3; + arg2[0x22] = D_80194FF0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_013/ov_SC03_013.c b/src/ov_SC03_013/ov_SC03_013.c index a9a7b6b7a9..871728d70c 100644 --- a/src/ov_SC03_013/ov_SC03_013.c +++ b/src/ov_SC03_013/ov_SC03_013.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_013/nonmatchings/ov_SC03_013", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801ABF88/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801AD3E8 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801AD4E2; +extern u8 D_801AD40A; +extern u8 D_801AD3E8; +extern u8 D_801ABF88[]; +extern u8 D_801ABF89[]; +extern u8 D_801ABF8A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801AD4E2; + g = D_801AD40A; + b = D_801AD3E8; + D_801ABF88[0] = r * 5 >> 3; + D_801ABF89[0] = g << 3; + D_801ABF8A[0] = (s32)(b * 255) >> 4; + D_801ABF88[4] = (s32)(r * 143) >> 4; + D_801ABF89[4] = g * 25 >> 1; + D_801ABF8A[4] = (s32)(b * 255) >> 4; + D_801ABF88[8] = (s32)(r * 255) >> 4; + D_801ABF89[8] = (s32)(g * 255) >> 4; + D_801ABF8A[8] = (s32)(b * 255) >> 4; + D_801ABF88[12] = (s32)(r * 143) >> 4; + D_801ABF89[12] = (s32)(g * 255) >> 4; + D_801ABF8A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801ABF88[i] = arg2[0x44] * D_801AD4E2 >> 4; + D_801ABF89[i] = arg2[0x45] * D_801AD40A >> 4; + D_801ABF8A[i] = arg2[0x46] * D_801AD3E8 >> 4; + i = (arg1 + 1) * 4; + D_801ABF88[i] = arg2[0x47] * D_801AD4E2 >> 4; + D_801ABF89[i] = arg2[0x48] * D_801AD40A >> 4; + D_801ABF8A[i] = arg2[0x49] * D_801AD3E8 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801AD4E2 << 3; + arg2[0x21] = D_801AD40A << 3; + arg2[0x22] = D_801AD3E8 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_014/ov_SC03_014.c b/src/ov_SC03_014/ov_SC03_014.c index 5b8235153c..7ee6749cf5 100644 --- a/src/ov_SC03_014/ov_SC03_014.c +++ b/src/ov_SC03_014/ov_SC03_014.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801E9508/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801EAED0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801EAFCA; +extern u8 D_801EAEF2; +extern u8 D_801EAED0; +extern u8 D_801E9508[]; +extern u8 D_801E9509[]; +extern u8 D_801E950A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801EAFCA; + g = D_801EAEF2; + b = D_801EAED0; + D_801E9508[0] = r * 5 >> 3; + D_801E9509[0] = g << 3; + D_801E950A[0] = (s32)(b * 255) >> 4; + D_801E9508[4] = (s32)(r * 143) >> 4; + D_801E9509[4] = g * 25 >> 1; + D_801E950A[4] = (s32)(b * 255) >> 4; + D_801E9508[8] = (s32)(r * 255) >> 4; + D_801E9509[8] = (s32)(g * 255) >> 4; + D_801E950A[8] = (s32)(b * 255) >> 4; + D_801E9508[12] = (s32)(r * 143) >> 4; + D_801E9509[12] = (s32)(g * 255) >> 4; + D_801E950A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801E9508[i] = arg2[0x44] * D_801EAFCA >> 4; + D_801E9509[i] = arg2[0x45] * D_801EAEF2 >> 4; + D_801E950A[i] = arg2[0x46] * D_801EAED0 >> 4; + i = (arg1 + 1) * 4; + D_801E9508[i] = arg2[0x47] * D_801EAFCA >> 4; + D_801E9509[i] = arg2[0x48] * D_801EAEF2 >> 4; + D_801E950A[i] = arg2[0x49] * D_801EAED0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801EAFCA << 3; + arg2[0x21] = D_801EAEF2 << 3; + arg2[0x22] = D_801EAED0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_015/ov_SC03_015.c b/src/ov_SC03_015/ov_SC03_015.c index 4f5cca3d82..f116df507c 100644 --- a/src/ov_SC03_015/ov_SC03_015.c +++ b/src/ov_SC03_015/ov_SC03_015.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801E9508/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801EAED0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801EAFCA; +extern u8 D_801EAEF2; +extern u8 D_801EAED0; +extern u8 D_801E9508[]; +extern u8 D_801E9509[]; +extern u8 D_801E950A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801EAFCA; + g = D_801EAEF2; + b = D_801EAED0; + D_801E9508[0] = r * 5 >> 3; + D_801E9509[0] = g << 3; + D_801E950A[0] = (s32)(b * 255) >> 4; + D_801E9508[4] = (s32)(r * 143) >> 4; + D_801E9509[4] = g * 25 >> 1; + D_801E950A[4] = (s32)(b * 255) >> 4; + D_801E9508[8] = (s32)(r * 255) >> 4; + D_801E9509[8] = (s32)(g * 255) >> 4; + D_801E950A[8] = (s32)(b * 255) >> 4; + D_801E9508[12] = (s32)(r * 143) >> 4; + D_801E9509[12] = (s32)(g * 255) >> 4; + D_801E950A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801E9508[i] = arg2[0x44] * D_801EAFCA >> 4; + D_801E9509[i] = arg2[0x45] * D_801EAEF2 >> 4; + D_801E950A[i] = arg2[0x46] * D_801EAED0 >> 4; + i = (arg1 + 1) * 4; + D_801E9508[i] = arg2[0x47] * D_801EAFCA >> 4; + D_801E9509[i] = arg2[0x48] * D_801EAEF2 >> 4; + D_801E950A[i] = arg2[0x49] * D_801EAED0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801EAFCA << 3; + arg2[0x21] = D_801EAEF2 << 3; + arg2[0x22] = D_801EAED0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_023/ov_SC03_023.c b/src/ov_SC03_023/ov_SC03_023.c index 7a66a1c53e..1646f286f4 100644 --- a/src/ov_SC03_023/ov_SC03_023.c +++ b/src/ov_SC03_023/ov_SC03_023.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_023/nonmatchings/ov_SC03_023", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801978E0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_80198C18 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_80198D12; +extern u8 D_80198C3A; +extern u8 D_80198C18; +extern u8 D_801978E0[]; +extern u8 D_801978E1[]; +extern u8 D_801978E2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_80198D12; + g = D_80198C3A; + b = D_80198C18; + D_801978E0[0] = r * 5 >> 3; + D_801978E1[0] = g << 3; + D_801978E2[0] = (s32)(b * 255) >> 4; + D_801978E0[4] = (s32)(r * 143) >> 4; + D_801978E1[4] = g * 25 >> 1; + D_801978E2[4] = (s32)(b * 255) >> 4; + D_801978E0[8] = (s32)(r * 255) >> 4; + D_801978E1[8] = (s32)(g * 255) >> 4; + D_801978E2[8] = (s32)(b * 255) >> 4; + D_801978E0[12] = (s32)(r * 143) >> 4; + D_801978E1[12] = (s32)(g * 255) >> 4; + D_801978E2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801978E0[i] = arg2[0x44] * D_80198D12 >> 4; + D_801978E1[i] = arg2[0x45] * D_80198C3A >> 4; + D_801978E2[i] = arg2[0x46] * D_80198C18 >> 4; + i = (arg1 + 1) * 4; + D_801978E0[i] = arg2[0x47] * D_80198D12 >> 4; + D_801978E1[i] = arg2[0x48] * D_80198C3A >> 4; + D_801978E2[i] = arg2[0x49] * D_80198C18 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_80198D12 << 3; + arg2[0x21] = D_80198C3A << 3; + arg2[0x22] = D_80198C18 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_024/ov_SC03_024.c b/src/ov_SC03_024/ov_SC03_024.c index 028b20d201..8b005a6f2f 100644 --- a/src/ov_SC03_024/ov_SC03_024.c +++ b/src/ov_SC03_024/ov_SC03_024.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_024/nonmatchings/ov_SC03_024", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801BFE78/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801C16E0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801C17DA; +extern u8 D_801C1702; +extern u8 D_801C16E0; +extern u8 D_801BFE78[]; +extern u8 D_801BFE79[]; +extern u8 D_801BFE7A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801C17DA; + g = D_801C1702; + b = D_801C16E0; + D_801BFE78[0] = r * 5 >> 3; + D_801BFE79[0] = g << 3; + D_801BFE7A[0] = (s32)(b * 255) >> 4; + D_801BFE78[4] = (s32)(r * 143) >> 4; + D_801BFE79[4] = g * 25 >> 1; + D_801BFE7A[4] = (s32)(b * 255) >> 4; + D_801BFE78[8] = (s32)(r * 255) >> 4; + D_801BFE79[8] = (s32)(g * 255) >> 4; + D_801BFE7A[8] = (s32)(b * 255) >> 4; + D_801BFE78[12] = (s32)(r * 143) >> 4; + D_801BFE79[12] = (s32)(g * 255) >> 4; + D_801BFE7A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801BFE78[i] = arg2[0x44] * D_801C17DA >> 4; + D_801BFE79[i] = arg2[0x45] * D_801C1702 >> 4; + D_801BFE7A[i] = arg2[0x46] * D_801C16E0 >> 4; + i = (arg1 + 1) * 4; + D_801BFE78[i] = arg2[0x47] * D_801C17DA >> 4; + D_801BFE79[i] = arg2[0x48] * D_801C1702 >> 4; + D_801BFE7A[i] = arg2[0x49] * D_801C16E0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801C17DA << 3; + arg2[0x21] = D_801C1702 << 3; + arg2[0x22] = D_801C16E0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_028/ov_SC03_028.c b/src/ov_SC03_028/ov_SC03_028.c index d37a73d19c..e64d670dee 100644 --- a/src/ov_SC03_028/ov_SC03_028.c +++ b/src/ov_SC03_028/ov_SC03_028.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_028/nonmatchings/ov_SC03_028", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801EA1B0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801EC498 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801EC592; +extern u8 D_801EC4BA; +extern u8 D_801EC498; +extern u8 D_801EA1B0[]; +extern u8 D_801EA1B1[]; +extern u8 D_801EA1B2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801EC592; + g = D_801EC4BA; + b = D_801EC498; + D_801EA1B0[0] = r * 5 >> 3; + D_801EA1B1[0] = g << 3; + D_801EA1B2[0] = (s32)(b * 255) >> 4; + D_801EA1B0[4] = (s32)(r * 143) >> 4; + D_801EA1B1[4] = g * 25 >> 1; + D_801EA1B2[4] = (s32)(b * 255) >> 4; + D_801EA1B0[8] = (s32)(r * 255) >> 4; + D_801EA1B1[8] = (s32)(g * 255) >> 4; + D_801EA1B2[8] = (s32)(b * 255) >> 4; + D_801EA1B0[12] = (s32)(r * 143) >> 4; + D_801EA1B1[12] = (s32)(g * 255) >> 4; + D_801EA1B2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801EA1B0[i] = arg2[0x44] * D_801EC592 >> 4; + D_801EA1B1[i] = arg2[0x45] * D_801EC4BA >> 4; + D_801EA1B2[i] = arg2[0x46] * D_801EC498 >> 4; + i = (arg1 + 1) * 4; + D_801EA1B0[i] = arg2[0x47] * D_801EC592 >> 4; + D_801EA1B1[i] = arg2[0x48] * D_801EC4BA >> 4; + D_801EA1B2[i] = arg2[0x49] * D_801EC498 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801EC592 << 3; + arg2[0x21] = D_801EC4BA << 3; + arg2[0x22] = D_801EC498 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_029/ov_SC03_029.c b/src/ov_SC03_029/ov_SC03_029.c index 38565050d0..86030418e5 100644 --- a/src/ov_SC03_029/ov_SC03_029.c +++ b/src/ov_SC03_029/ov_SC03_029.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_029/nonmatchings/ov_SC03_029", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801D8188/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801D98D8 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801D99D2; +extern u8 D_801D98FA; +extern u8 D_801D98D8; +extern u8 D_801D8188[]; +extern u8 D_801D8189[]; +extern u8 D_801D818A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801D99D2; + g = D_801D98FA; + b = D_801D98D8; + D_801D8188[0] = r * 5 >> 3; + D_801D8189[0] = g << 3; + D_801D818A[0] = (s32)(b * 255) >> 4; + D_801D8188[4] = (s32)(r * 143) >> 4; + D_801D8189[4] = g * 25 >> 1; + D_801D818A[4] = (s32)(b * 255) >> 4; + D_801D8188[8] = (s32)(r * 255) >> 4; + D_801D8189[8] = (s32)(g * 255) >> 4; + D_801D818A[8] = (s32)(b * 255) >> 4; + D_801D8188[12] = (s32)(r * 143) >> 4; + D_801D8189[12] = (s32)(g * 255) >> 4; + D_801D818A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801D8188[i] = arg2[0x44] * D_801D99D2 >> 4; + D_801D8189[i] = arg2[0x45] * D_801D98FA >> 4; + D_801D818A[i] = arg2[0x46] * D_801D98D8 >> 4; + i = (arg1 + 1) * 4; + D_801D8188[i] = arg2[0x47] * D_801D99D2 >> 4; + D_801D8189[i] = arg2[0x48] * D_801D98FA >> 4; + D_801D818A[i] = arg2[0x49] * D_801D98D8 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801D99D2 << 3; + arg2[0x21] = D_801D98FA << 3; + arg2[0x22] = D_801D98D8 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_030/ov_SC03_030.c b/src/ov_SC03_030/ov_SC03_030.c index fc41e68110..767138762a 100644 --- a/src/ov_SC03_030/ov_SC03_030.c +++ b/src/ov_SC03_030/ov_SC03_030.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_030/nonmatchings/ov_SC03_030", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801E0780/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801E1AD0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801E1BCA; +extern u8 D_801E1AF2; +extern u8 D_801E1AD0; +extern u8 D_801E0780[]; +extern u8 D_801E0781[]; +extern u8 D_801E0782[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801E1BCA; + g = D_801E1AF2; + b = D_801E1AD0; + D_801E0780[0] = r * 5 >> 3; + D_801E0781[0] = g << 3; + D_801E0782[0] = (s32)(b * 255) >> 4; + D_801E0780[4] = (s32)(r * 143) >> 4; + D_801E0781[4] = g * 25 >> 1; + D_801E0782[4] = (s32)(b * 255) >> 4; + D_801E0780[8] = (s32)(r * 255) >> 4; + D_801E0781[8] = (s32)(g * 255) >> 4; + D_801E0782[8] = (s32)(b * 255) >> 4; + D_801E0780[12] = (s32)(r * 143) >> 4; + D_801E0781[12] = (s32)(g * 255) >> 4; + D_801E0782[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801E0780[i] = arg2[0x44] * D_801E1BCA >> 4; + D_801E0781[i] = arg2[0x45] * D_801E1AF2 >> 4; + D_801E0782[i] = arg2[0x46] * D_801E1AD0 >> 4; + i = (arg1 + 1) * 4; + D_801E0780[i] = arg2[0x47] * D_801E1BCA >> 4; + D_801E0781[i] = arg2[0x48] * D_801E1AF2 >> 4; + D_801E0782[i] = arg2[0x49] * D_801E1AD0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801E1BCA << 3; + arg2[0x21] = D_801E1AF2 << 3; + arg2[0x22] = D_801E1AD0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_031/ov_SC03_031.c b/src/ov_SC03_031/ov_SC03_031.c index 2529d7389c..c2db796dee 100644 --- a/src/ov_SC03_031/ov_SC03_031.c +++ b/src/ov_SC03_031/ov_SC03_031.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_031/nonmatchings/ov_SC03_031", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801C4B80/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801C6138 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801C6232; +extern u8 D_801C615A; +extern u8 D_801C6138; +extern u8 D_801C4B80[]; +extern u8 D_801C4B81[]; +extern u8 D_801C4B82[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801C6232; + g = D_801C615A; + b = D_801C6138; + D_801C4B80[0] = r * 5 >> 3; + D_801C4B81[0] = g << 3; + D_801C4B82[0] = (s32)(b * 255) >> 4; + D_801C4B80[4] = (s32)(r * 143) >> 4; + D_801C4B81[4] = g * 25 >> 1; + D_801C4B82[4] = (s32)(b * 255) >> 4; + D_801C4B80[8] = (s32)(r * 255) >> 4; + D_801C4B81[8] = (s32)(g * 255) >> 4; + D_801C4B82[8] = (s32)(b * 255) >> 4; + D_801C4B80[12] = (s32)(r * 143) >> 4; + D_801C4B81[12] = (s32)(g * 255) >> 4; + D_801C4B82[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801C4B80[i] = arg2[0x44] * D_801C6232 >> 4; + D_801C4B81[i] = arg2[0x45] * D_801C615A >> 4; + D_801C4B82[i] = arg2[0x46] * D_801C6138 >> 4; + i = (arg1 + 1) * 4; + D_801C4B80[i] = arg2[0x47] * D_801C6232 >> 4; + D_801C4B81[i] = arg2[0x48] * D_801C615A >> 4; + D_801C4B82[i] = arg2[0x49] * D_801C6138 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801C6232 << 3; + arg2[0x21] = D_801C615A << 3; + arg2[0x22] = D_801C6138 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_089/ov_SC03_089.c b/src/ov_SC03_089/ov_SC03_089.c index 4bd5c2dff9..8b1e2a8269 100644 --- a/src/ov_SC03_089/ov_SC03_089.c +++ b/src/ov_SC03_089/ov_SC03_089.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_089/nonmatchings/ov_SC03_089", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801C5438/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801C67B0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801C68AA; +extern u8 D_801C67D2; +extern u8 D_801C67B0; +extern u8 D_801C5438[]; +extern u8 D_801C5439[]; +extern u8 D_801C543A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801C68AA; + g = D_801C67D2; + b = D_801C67B0; + D_801C5438[0] = r * 5 >> 3; + D_801C5439[0] = g << 3; + D_801C543A[0] = (s32)(b * 255) >> 4; + D_801C5438[4] = (s32)(r * 143) >> 4; + D_801C5439[4] = g * 25 >> 1; + D_801C543A[4] = (s32)(b * 255) >> 4; + D_801C5438[8] = (s32)(r * 255) >> 4; + D_801C5439[8] = (s32)(g * 255) >> 4; + D_801C543A[8] = (s32)(b * 255) >> 4; + D_801C5438[12] = (s32)(r * 143) >> 4; + D_801C5439[12] = (s32)(g * 255) >> 4; + D_801C543A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801C5438[i] = arg2[0x44] * D_801C68AA >> 4; + D_801C5439[i] = arg2[0x45] * D_801C67D2 >> 4; + D_801C543A[i] = arg2[0x46] * D_801C67B0 >> 4; + i = (arg1 + 1) * 4; + D_801C5438[i] = arg2[0x47] * D_801C68AA >> 4; + D_801C5439[i] = arg2[0x48] * D_801C67D2 >> 4; + D_801C543A[i] = arg2[0x49] * D_801C67B0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801C68AA << 3; + arg2[0x21] = D_801C67D2 << 3; + arg2[0x22] = D_801C67B0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_090/ov_SC03_090.c b/src/ov_SC03_090/ov_SC03_090.c index 76fd795fb3..b9c9743945 100644 --- a/src/ov_SC03_090/ov_SC03_090.c +++ b/src/ov_SC03_090/ov_SC03_090.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801CA8A0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801CBC20 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801CBD1A; +extern u8 D_801CBC42; +extern u8 D_801CBC20; +extern u8 D_801CA8A0[]; +extern u8 D_801CA8A1[]; +extern u8 D_801CA8A2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801CBD1A; + g = D_801CBC42; + b = D_801CBC20; + D_801CA8A0[0] = r * 5 >> 3; + D_801CA8A1[0] = g << 3; + D_801CA8A2[0] = (s32)(b * 255) >> 4; + D_801CA8A0[4] = (s32)(r * 143) >> 4; + D_801CA8A1[4] = g * 25 >> 1; + D_801CA8A2[4] = (s32)(b * 255) >> 4; + D_801CA8A0[8] = (s32)(r * 255) >> 4; + D_801CA8A1[8] = (s32)(g * 255) >> 4; + D_801CA8A2[8] = (s32)(b * 255) >> 4; + D_801CA8A0[12] = (s32)(r * 143) >> 4; + D_801CA8A1[12] = (s32)(g * 255) >> 4; + D_801CA8A2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801CA8A0[i] = arg2[0x44] * D_801CBD1A >> 4; + D_801CA8A1[i] = arg2[0x45] * D_801CBC42 >> 4; + D_801CA8A2[i] = arg2[0x46] * D_801CBC20 >> 4; + i = (arg1 + 1) * 4; + D_801CA8A0[i] = arg2[0x47] * D_801CBD1A >> 4; + D_801CA8A1[i] = arg2[0x48] * D_801CBC42 >> 4; + D_801CA8A2[i] = arg2[0x49] * D_801CBC20 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801CBD1A << 3; + arg2[0x21] = D_801CBC42 << 3; + arg2[0x22] = D_801CBC20 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_091/ov_SC03_091.c b/src/ov_SC03_091/ov_SC03_091.c index e645e33c6f..de26d7d55f 100644 --- a/src/ov_SC03_091/ov_SC03_091.c +++ b/src/ov_SC03_091/ov_SC03_091.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801D0F70/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801D2570 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801D266A; +extern u8 D_801D2592; +extern u8 D_801D2570; +extern u8 D_801D0F70[]; +extern u8 D_801D0F71[]; +extern u8 D_801D0F72[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801D266A; + g = D_801D2592; + b = D_801D2570; + D_801D0F70[0] = r * 5 >> 3; + D_801D0F71[0] = g << 3; + D_801D0F72[0] = (s32)(b * 255) >> 4; + D_801D0F70[4] = (s32)(r * 143) >> 4; + D_801D0F71[4] = g * 25 >> 1; + D_801D0F72[4] = (s32)(b * 255) >> 4; + D_801D0F70[8] = (s32)(r * 255) >> 4; + D_801D0F71[8] = (s32)(g * 255) >> 4; + D_801D0F72[8] = (s32)(b * 255) >> 4; + D_801D0F70[12] = (s32)(r * 143) >> 4; + D_801D0F71[12] = (s32)(g * 255) >> 4; + D_801D0F72[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801D0F70[i] = arg2[0x44] * D_801D266A >> 4; + D_801D0F71[i] = arg2[0x45] * D_801D2592 >> 4; + D_801D0F72[i] = arg2[0x46] * D_801D2570 >> 4; + i = (arg1 + 1) * 4; + D_801D0F70[i] = arg2[0x47] * D_801D266A >> 4; + D_801D0F71[i] = arg2[0x48] * D_801D2592 >> 4; + D_801D0F72[i] = arg2[0x49] * D_801D2570 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801D266A << 3; + arg2[0x21] = D_801D2592 << 3; + arg2[0x22] = D_801D2570 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_092/ov_SC03_092.c b/src/ov_SC03_092/ov_SC03_092.c index d15cc28120..1e1d0071dc 100644 --- a/src/ov_SC03_092/ov_SC03_092.c +++ b/src/ov_SC03_092/ov_SC03_092.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_092/nonmatchings/ov_SC03_092", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801B1B38/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801B2F18 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801B3012; +extern u8 D_801B2F3A; +extern u8 D_801B2F18; +extern u8 D_801B1B38[]; +extern u8 D_801B1B39[]; +extern u8 D_801B1B3A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801B3012; + g = D_801B2F3A; + b = D_801B2F18; + D_801B1B38[0] = r * 5 >> 3; + D_801B1B39[0] = g << 3; + D_801B1B3A[0] = (s32)(b * 255) >> 4; + D_801B1B38[4] = (s32)(r * 143) >> 4; + D_801B1B39[4] = g * 25 >> 1; + D_801B1B3A[4] = (s32)(b * 255) >> 4; + D_801B1B38[8] = (s32)(r * 255) >> 4; + D_801B1B39[8] = (s32)(g * 255) >> 4; + D_801B1B3A[8] = (s32)(b * 255) >> 4; + D_801B1B38[12] = (s32)(r * 143) >> 4; + D_801B1B39[12] = (s32)(g * 255) >> 4; + D_801B1B3A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801B1B38[i] = arg2[0x44] * D_801B3012 >> 4; + D_801B1B39[i] = arg2[0x45] * D_801B2F3A >> 4; + D_801B1B3A[i] = arg2[0x46] * D_801B2F18 >> 4; + i = (arg1 + 1) * 4; + D_801B1B38[i] = arg2[0x47] * D_801B3012 >> 4; + D_801B1B39[i] = arg2[0x48] * D_801B2F3A >> 4; + D_801B1B3A[i] = arg2[0x49] * D_801B2F18 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801B3012 << 3; + arg2[0x21] = D_801B2F3A << 3; + arg2[0x22] = D_801B2F18 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */