From 0d92599f6c4d97095a5869037a6a321d7f4702aa Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Tue, 25 Aug 2026 20:32:16 -0600 Subject: [PATCH] chore(decomp): commit in-tree banked work before the serial lane --- src/ov_SC02_021/ov_SC02_021_jr_8017C294.c | 79 ++++++++++++++++++++++- src/ov_SC03_029/ov_SC03_029_jr_8017DC70.c | 58 ++++++++++++++++- src/ov_SC03_102/ov_SC03_102_jr_8017BEBC.c | 53 ++++++++++++++- 3 files changed, 187 insertions(+), 3 deletions(-) diff --git a/src/ov_SC02_021/ov_SC02_021_jr_8017C294.c b/src/ov_SC02_021/ov_SC02_021_jr_8017C294.c index e369538f66..cb9ebd88bc 100644 --- a/src/ov_SC02_021/ov_SC02_021_jr_8017C294.c +++ b/src/ov_SC02_021/ov_SC02_021_jr_8017C294.c @@ -3730,7 +3730,84 @@ void func_8017E940(s32 a0) { INCLUDE_ASM("asm/ov_SC02_021/nonmatchings/ov_SC02_021_jr_8017C294", func_8017EA5C); -INCLUDE_ASM("asm/ov_SC02_021/nonmatchings/ov_SC02_021_jr_8017C294", func_8017EB00); +extern s32 func_80029178(s32); +extern s32 func_80029504(void); +extern s32 func_8012BD14(s32); +extern void func_8012C218(s32); +extern void func_8017ECFC(s16*); + +extern s32 D_80126B58; +extern u16 D_80126B5E; +extern u16 D_80126B62; +extern u16 D_80126B66; +extern s32 D_80126B9C; + +void func_8017EB00(s32 arg0) { + s32 ret; + s32 ret2; + s32 var; + s16* p; + p = (s16*) &D_80126B58; + ret = func_80029504(); + if (ret < 240) { + var = 0; + } else if (ret < 250) { + var = 1; + } else if (ret < 260) { + var = 2; + } else { + if (ret < 270) { + var = 3; + } else if (ret < 280) { + var = 4; + } else { + var = 5; + } + } + switch (var) { + case 0: + break; + case 1: + case 2: + if ((*(s16 *)&D_80126B5E) >= -31) { + (*(s16 *)&D_80126B5E) = -32; + } + if ((*(s16 *)&D_80126B66) < 727) { + (*(s16 *)&D_80126B66) = 727; + } + if (((D_80126B9C & 0x8000000) && (*(s16 *)&D_80126B62) < -1343) == 0) { + return; + } + if (p[3] >= -159) { + func_8017ECFC((s16*) arg0); + } + break; + case 3: + case 4: + ret2 = func_8012BD14(arg0); + if (ret2 <= 147455) { + if ((*(s16 *)&D_80126B5E) < -160) { + (*(s16 *)&D_80126B5E) = -160; + } + if ((*(s16 *)&D_80126B66) < 727) { + (*(s16 *)&D_80126B66) = 727; + } + } + if (((D_80126B9C & 0x8000000) && (*(s16 *)&D_80126B62) < -1343) == 0) { + return; + } + if (p[3] < -32) { + func_8017ECFC((s16*) arg0); + } + break; + case 5: + if ((func_80029178(250) & 0xFF) == 0) { + func_8012C218(arg0); + } + break; + } +} + INCLUDE_ASM("asm/ov_SC02_021/nonmatchings/ov_SC02_021_jr_8017C294", func_8017ECFC); diff --git a/src/ov_SC03_029/ov_SC03_029_jr_8017DC70.c b/src/ov_SC03_029/ov_SC03_029_jr_8017DC70.c index ed5ef8d887..c70e0ff3a3 100644 --- a/src/ov_SC03_029/ov_SC03_029_jr_8017DC70.c +++ b/src/ov_SC03_029/ov_SC03_029_jr_8017DC70.c @@ -8276,7 +8276,63 @@ L9F0: } -INCLUDE_ASM("asm/ov_SC03_029/nonmatchings/ov_SC03_029_jr_8017DC70", func_80186A34); +typedef struct { s32 w[8]; } Mtx32_80186A34; + +extern void func_8012A828(s32 a0, void *a1); +extern void func_8012B2CC(s32 a0); +extern s32 func_8012B864(s32 a0); +extern void RotMatrixY(s32 a0, void *a1); +extern void func_800484EC(s32 a0, s32 a1, s32 a2); + +extern struct Mtx32_80184008 D_800AE620; + +void func_80186A34(s32 arg0) +{ + extern void func_80186F9C(s32 a0, s32 a1, s32 a2); + extern s32 D_801C9234; + extern u8 D_801C9268[]; + extern s32 D_801C92AC[]; + extern s32 D_801C92BC[]; + extern s32 D_801C92CC[]; + + Mtx32_80186A34 m; /* sp+0x10 */ + s32 *p; + + func_80186F9C(arg0, (s32)&D_801C9234, 0); + func_8012A828(arg0, D_801C9268); + func_8012B2CC(arg0); + + m = *(Mtx32_80186A34 *)&D_800AE620; + RotMatrixY((func_8012B864(arg0) + 0x800) & 0xFFF, &m); + + switch (*(u16 *)(arg0 + 0x5E) - 1) { /* jtbl_801D80B8, 50 entries */ + case 7: + p = D_801C92BC; + break; + case 4: + case 28: + case 31: + p = D_801C92CC; + break; + case 0: case 1: case 2: case 3: case 5: case 6: case 8: case 9: + case 10: case 11: case 12: case 13: case 14: case 15: case 16: case 17: + case 18: case 19: case 20: case 21: case 22: case 23: case 24: case 25: + case 26: case 27: case 29: case 30: case 32: case 33: case 34: case 35: + case 36: case 37: case 38: case 39: case 40: case 41: case 42: case 43: + case 44: case 45: case 46: case 47: case 48: case 49: + p = D_801C92AC; + break; + default: + p = D_801C92AC; + break; + } + + func_800484EC((s32)&m, (s32)p, arg0 + 0x10); + + *(u16 *)(arg0 + 0x34) = 0; + *(s32 *)(arg0 + 0x1C) = 0; +} + #include "common.h" diff --git a/src/ov_SC03_102/ov_SC03_102_jr_8017BEBC.c b/src/ov_SC03_102/ov_SC03_102_jr_8017BEBC.c index 4aa8ca5425..e2f0316503 100644 --- a/src/ov_SC03_102/ov_SC03_102_jr_8017BEBC.c +++ b/src/ov_SC03_102/ov_SC03_102_jr_8017BEBC.c @@ -4341,7 +4341,58 @@ s32 func_80181260(s32 param_1, s16 param_2) } -INCLUDE_ASM("asm/ov_SC03_102/nonmatchings/ov_SC03_102_jr_8017BEBC", func_8018139C); +void func_8018139C(s32 param_1) +{ + extern s32 D_80126B58; + extern u16 D_80126B62; + extern s32 rand(void); + extern void func_8002D59C(s32 a0, u16 a1, s32 a2); + + register s32 t __asm__("$7"); + register s32 cv __asm__("$3"); + register s32 fv __asm__("$2"); + register s32 q __asm__("$2"); + s16 *cam; + s32 c; + s32 val; + + cam = (s16 *)&D_80126B58; + + if (*(u16 *)(param_1 + 2) == 0) { + *(u16 *)(param_1 + 2) = 1; + if (*(s16 *)&D_80126B62 < -0x7EF) { + func_8002D4C8(0xA20, 0); + } + } + + if (*(s32 *)(param_1 + 0x1C) == 0) { + *(s32 *)(param_1 + 0x1C) = (rand() & 3) + 2; + cv = cam[5]; + fv = *(s16 *)(param_1 + 0xA); + t = cv - fv; + c = t + 0x47F; + if ((u32)c >= 0x4FF || + (u32)((cv = cam[7], fv = *(s16 *)(param_1 + 0xE), t = cv - fv, c = t + 0x27F)) >= 0x4FF) { + if (*(s16 *)(param_1 + 0x84) != 0) { + func_8002D59C(4, 0x76E, *(u16 *)(param_1 + 0x36)); + *(s16 *)(param_1 + 0x84) = 0; + } + } else { + q = t / 80; + val = (8 - q) << 8; + if (t < 0) { + t = -t; + } + t = t * 127 / 640; + func_8002D59C(0x76E, val | 0x3000 | (0x7F - t), + *(u16 *)(param_1 + 0x36)); + *(s16 *)(param_1 + 0x84) = 1; + } + } else { + *(s32 *)(param_1 + 0x1C) = *(s32 *)(param_1 + 0x1C) - 1; + } +} + extern void (*D_80189CBC[])(void);