diff --git a/src/800.c b/src/800.c index f3cba8812..6fd1cf834 100644 --- a/src/800.c +++ b/src/800.c @@ -10134,7 +10134,122 @@ INCLUDE_ASM("asm/nonmatchings/800", func_800268D0); INCLUDE_ASM("asm/nonmatchings/800", func_80026D64); -INCLUDE_ASM("asm/nonmatchings/800", func_80027058); +extern s32 D_800A2B78; + +void func_80027058() +{ + __asm__ __volatile__( + ".set\tnoreorder\n" + "addiu $29, $29, -8\n" + "lw $11, 24($29)\n" + "lw $15, 28($29)\n" + "lw $14, 32($29)\n" + "beqz $11, 100f\n" + "addu $2, $7, $0\n" + "addiu $13, $29, 4\n" + "lui $10, 0xFF\n" + "ori $10, $10, 0xFFFF\n" + "addiu $9, $4, 4\n" + "addiu $8, $7, 4\n" + "98:\n" + "lhu $4, 6($9)\n" + "lhu $3, 8($9)\n" + "lhu $2, 10($9)\n" + "sll $4, $4, 3\n" + "addu $4, $5, $4\n" + "sll $3, $3, 3\n" + "addu $3, $5, $3\n" + "sll $2, $2, 3\n" + "addu $2, $5, $2\n" + "lwc2 $0, 0($4)\n" + "lwc2 $1, 4($4)\n" + "lwc2 $2, 0($3)\n" + "lwc2 $3, 4($3)\n" + "lwc2 $4, 0($2)\n" + "lwc2 $5, 4($2)\n" + "nop\n" + "nop\n" + "rtpt\n" + "cfc2 $12, $31\n" + "nop\n" + "sw $12, 0($29)\n" + "lw $2, 0($29)\n" + "addiu $3, $0, -4097\n" + "and $2, $2, $3\n" + "bnez $2, 99f\n" + "nop\n" + "nop\n" + "nop\n" + "nclip\n" + "swc2 $24, 0($13)\n" + "lw $2, 4($29)\n" + "nop\n" + "blez $2, 99f\n" + "nop\n" + "swc2 $12, 8($7)\n" + "swc2 $13, 12($7)\n" + "swc2 $14, 16($7)\n" + "nop\n" + "nop\n" + "avsz3\n" + "swc2 $7, 0($13)\n" + "lw $2, 0($9)\n" + "nop\n" + "sw $2, 0($8)\n" + "lw $2, 4($29)\n" + "addiu $8, $8, 20\n" + "srav $2, $2, $15\n" + "sll $2, $2, 2\n" + "addu $6, $14, $2\n" + "lw $3, 0($6)\n" + "lui $2, 0x400\n" + "and $3, $3, $10\n" + "or $3, $3, $2\n" + "and $2, $7, $10\n" + "sw $3, 0($7)\n" + "sw $2, 0($6)\n" + "lui $2, %hi(D_800A2B78)\n" + "lw $2, %lo(D_800A2B78)($2)\n" + "nop\n" + "beqz $2, 99f\n" + "addiu $7, $7, 20\n" + "lbu $2, -17($8)\n" + "nop\n" + "andi $2, $2, 0x2\n" + "beqz $2, 99f\n" + "lui $4, 0xE100\n" + "ori $4, $4, 0xA\n" + "lw $3, 4($29)\n" + "addiu $2, $0, 1\n" + "sb $2, -1($8)\n" + "lui $2, %hi(D_800A2B78)\n" + "lw $2, %lo(D_800A2B78)($2)\n" + "srav $3, $3, $15\n" + "sll $3, $3, 2\n" + "addu $6, $14, $3\n" + "andi $2, $2, 0x3\n" + "sll $2, $2, 5\n" + "or $2, $2, $4\n" + "sw $2, 0($8)\n" + "addiu $8, $8, 8\n" + "lw $3, 0($6)\n" + "lui $2, 0x100\n" + "and $3, $3, $10\n" + "or $3, $3, $2\n" + "and $2, $7, $10\n" + "sw $3, 0($7)\n" + "addiu $7, $7, 8\n" + "sw $2, 0($6)\n" + "99:\n" + "addiu $11, $11, -1\n" + "bnez $11, 98b\n" + "addiu $9, $9, 16\n" + "addu $2, $7, $0\n" + "100:\n" + "addiu $29, $29, 8\n" + ".set\treorder\n" + ); +} /* func_80027200 — HANDWRITTEN assembly (splat marks it "Handwritten function").