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feat(phase-31): S79 #9 (5) — main: func_8002AC98 (114 ins) banked: the generic arm's val = r + b routed through a fresh s32 temp ({ s32 xt = r + b; val = xt; }, with b widened to s32) so expand_binop's target==op1 swap does not fire — the same lever as func_80015608; gate_main BYTE-IDENTICAL 143dbb89

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Drew T
2026-09-04 19:05:29 -06:00
parent a296bba0f3
commit 1961a7bfb1
1 changed files with 81 additions and 1 deletions
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src/800.c
+81 -1
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@@ -21166,7 +21166,87 @@ void func_8002AC00(s32 a0)
*(u16*)(s0 - 2) = (u16)v0;
}
INCLUDE_ASM("asm/nonmatchings/800", func_8002AC98);
extern s32 func_800291B4(s32);
extern u16 D_800A6588[];
extern u8 D_8010F46C[];
extern u8 D_80078EBA;
void func_8002AC98(void)
{
register u16 *base __asm__("$20");
s16 i;
s16 val;
s32 t;
s32 r;
s32 idx;
s16 rc;
s32 b;
base = D_800A6588;
if (D_80078EBA == 0)
{
for (i = 0; i < 0x40; i++)
{
t = func_800291B4(((s16) i) + 0x63) & 0xF;
if (t != 0)
{
r = rand() & 0x1F;
switch (t)
{
case 1:
rc = r;
if ((rc != 0) && (rc != 0xB))
{
b = base[i] - 0xB;
{ s32 xt = r + b; val = xt; }
}
else
{
val = ((s16) base[i]) >> 1;
}
break;
case 2:
if (r != 0)
{
b = base[i] - 0xB;
{ s32 xt = r + b; val = xt; }
}
break;
case 3:
rc = r;
if ((rc != 0) && (rc != 0xB))
{
b = base[i] - 0xB;
{ s32 xt = r + b; val = xt; }
}
else
{
val = base[i] * 2;
}
break;
}
idx = i + 1;
if (val < (*((s16 *) (&D_8010F46C[idx * 8]))))
{
base[i] = *((s16 *) (&D_8010F46C[idx * 8]));
}
else
if (((*((s16 *) (&D_8010F46C[idx * 8]))) * 4) < val)
{
rc = 4;
base[i] = (*((s16 *) (&D_8010F46C[idx * 8]))) * rc;
}
else
{
base[i] = val;
}
}
}
}
}
s32 func_8002AE60(void) {
s16 i;