diff --git a/docs/progress.fleet.md b/docs/progress.fleet.md index 43aff1cf57..dc20fffcd9 100644 --- a/docs/progress.fleet.md +++ b/docs/progress.fleet.md @@ -3,148 +3,148 @@ # source-derived (committed src/*.c + config/dedup.us.yaml). Live byte gate: `make check-all`; # cross-binary collapsible-byte leverage: docs/duplicates.cross.md. -FLEET REAL substantive : 251804 (of which dedup-shared 223275 via 1813 groups / 223725 instances) +FLEET REAL substantive : 252072 (of which dedup-shared 223275 via 1813 groups / 223725 instances) FLEET LINKED PsyQ objs : 959 -FLEET byte-identical : 253333 / 344306 = 73.58% (REAL+LINKED+empties) +FLEET byte-identical : 253601 / 344306 = 73.66% (REAL+LINKED+empties) FLEET NON_MATCHING : 7 (0 in any default build — G4) -FLEET INCLUDE_ASM stubs : 90966 +FLEET INCLUDE_ASM stubs : 90698 FLEET matchable : 344306 | binary | REAL | shared | LINKED | byte-ident | matchable | byte-ident % | |---|---:|---:|---:|---:|---:|---:| | main | 54 | 2 | 959 | 1055 | 2096 | 50.3% | | resident | 123 | 0 | 0 | 125 | 146 | 85.6% | -| ov_SC01_000 | 1872 | 1669 | 0 | 1872 | 2407 | 77.8% | -| ov_SC01_001 | 1869 | 1669 | 0 | 1871 | 2471 | 75.7% | -| ov_SC01_004 | 1862 | 1660 | 0 | 1863 | 2418 | 77.0% | -| ov_SC01_005 | 1886 | 1682 | 0 | 1886 | 2508 | 75.2% | -| ov_SC01_006 | 1885 | 1682 | 0 | 1885 | 2508 | 75.2% | -| ov_SC01_008 | 1863 | 1660 | 0 | 1865 | 2430 | 76.7% | -| ov_SC01_009 | 1883 | 1661 | 0 | 1884 | 2512 | 75.0% | -| ov_SC01_074 | 1863 | 1661 | 0 | 1865 | 2429 | 76.8% | -| ov_SC01_077 | 2260 | 1624 | 0 | 2262 | 2586 | 87.5% | -| ov_SC01_080 | 1881 | 1664 | 0 | 1881 | 2517 | 74.7% | -| ov_SC01_084 | 1884 | 1664 | 0 | 1889 | 2583 | 73.1% | -| ov_SC02_000 | 1901 | 1699 | 0 | 1901 | 2688 | 70.7% | -| ov_SC02_003 | 1901 | 1699 | 0 | 1901 | 2688 | 70.7% | -| ov_SC02_004 | 1867 | 1664 | 0 | 1867 | 2405 | 77.6% | -| ov_SC02_005 | 1926 | 1660 | 0 | 1936 | 2932 | 66.0% | -| ov_SC02_011 | 1907 | 1667 | 0 | 1918 | 2898 | 66.2% | -| ov_SC02_015 | 1868 | 1666 | 0 | 1868 | 2418 | 77.3% | -| ov_SC02_016 | 1872 | 1666 | 0 | 1875 | 2550 | 73.5% | -| ov_SC02_017 | 1891 | 1666 | 0 | 1899 | 2737 | 69.4% | -| ov_SC02_021 | 1871 | 1666 | 0 | 1871 | 2441 | 76.6% | -| ov_SC02_026 | 1875 | 1664 | 0 | 1881 | 2577 | 73.0% | -| ov_SC02_027 | 1884 | 1664 | 0 | 1893 | 2697 | 70.2% | -| ov_SC02_028 | 1892 | 1664 | 0 | 1902 | 2706 | 70.3% | -| ov_SC02_031 | 1882 | 1665 | 0 | 1887 | 2567 | 73.5% | -| ov_SC02_035 | 1873 | 1664 | 0 | 1876 | 2525 | 74.3% | -| ov_SC02_039 | 1864 | 1664 | 0 | 1864 | 2420 | 77.0% | -| ov_SC02_041 | 1871 | 1664 | 0 | 1874 | 2565 | 73.1% | -| ov_SC03_001 | 1924 | 1665 | 0 | 1941 | 2874 | 67.5% | -| ov_SC03_002 | 1890 | 1669 | 0 | 1905 | 2636 | 72.3% | -| ov_SC03_003 | 1862 | 1664 | 0 | 1863 | 2427 | 76.8% | -| ov_SC03_006 | 1903 | 1670 | 0 | 1912 | 2772 | 69.0% | -| ov_SC03_007 | 1878 | 1664 | 0 | 1882 | 2628 | 71.6% | -| ov_SC03_010 | 1872 | 1664 | 0 | 1872 | 2474 | 75.7% | -| ov_SC03_011 | 1868 | 1664 | 0 | 1874 | 2532 | 74.0% | -| ov_SC03_012 | 1863 | 1664 | 0 | 1864 | 2410 | 77.3% | -| ov_SC03_013 | 1871 | 1664 | 0 | 1871 | 2497 | 74.9% | -| ov_SC03_014 | 1893 | 1689 | 0 | 1893 | 2690 | 70.4% | -| ov_SC03_015 | 1899 | 1689 | 0 | 1899 | 2690 | 70.6% | -| ov_SC03_023 | 1865 | 1664 | 0 | 1866 | 2439 | 76.5% | -| ov_SC03_024 | 1895 | 1669 | 0 | 1902 | 2646 | 71.9% | -| ov_SC03_028 | 1886 | 1664 | 0 | 1890 | 2669 | 70.8% | -| ov_SC03_029 | 1872 | 1666 | 0 | 1882 | 2649 | 71.0% | -| ov_SC03_030 | 1873 | 1668 | 0 | 1875 | 2500 | 75.0% | -| ov_SC03_031 | 1867 | 1664 | 0 | 1871 | 2519 | 74.3% | -| ov_SC03_089 | 1877 | 1664 | 0 | 1884 | 2586 | 72.9% | -| ov_SC03_090 | 1878 | 1664 | 0 | 1886 | 2630 | 71.7% | -| ov_SC03_091 | 1877 | 1664 | 0 | 1885 | 2645 | 71.3% | -| ov_SC03_092 | 1877 | 1664 | 0 | 1889 | 2592 | 72.9% | -| ov_SC03_093 | 1874 | 1664 | 0 | 1878 | 2568 | 73.1% | -| ov_SC03_094 | 1868 | 1664 | 0 | 1874 | 2581 | 72.6% | -| ov_SC03_095 | 1866 | 1664 | 0 | 1869 | 2479 | 75.4% | -| ov_SC03_096 | 1869 | 1664 | 0 | 1872 | 2470 | 75.8% | -| ov_SC03_097 | 1873 | 1664 | 0 | 1880 | 2608 | 72.1% | -| ov_SC03_098 | 1869 | 1664 | 0 | 1872 | 2546 | 73.5% | -| ov_SC03_099 | 1866 | 1664 | 0 | 1869 | 2509 | 74.5% | -| ov_SC03_100 | 1868 | 1664 | 0 | 1872 | 2544 | 73.6% | -| ov_SC03_101 | 1870 | 1664 | 0 | 1874 | 2533 | 74.0% | -| ov_SC03_102 | 1870 | 1664 | 0 | 1873 | 2497 | 75.0% | -| ov_SC03_103 | 1869 | 1666 | 0 | 1872 | 2515 | 74.4% | -| ov_SC03_104 | 1880 | 1664 | 0 | 1887 | 2621 | 72.0% | -| ov_SC03_105 | 1874 | 1664 | 0 | 1881 | 2602 | 72.3% | -| ov_SC03_108 | 1862 | 1664 | 0 | 1862 | 2448 | 76.1% | -| ov_SC03_109 | 1863 | 1664 | 0 | 1865 | 2428 | 76.8% | -| ov_SC03_110 | 1865 | 1664 | 0 | 1865 | 2473 | 75.4% | -| ov_SC03_111 | 1870 | 1664 | 0 | 1873 | 2515 | 74.5% | -| ov_SC03_112 | 1868 | 1666 | 0 | 1870 | 2531 | 73.9% | -| ov_SC03_113 | 1865 | 1666 | 0 | 1868 | 2473 | 75.5% | -| ov_SC03_114 | 1861 | 1664 | 0 | 1863 | 2419 | 77.0% | -| ov_SC03_115 | 1869 | 1664 | 0 | 1871 | 2477 | 75.5% | -| ov_SC03_116 | 1867 | 1664 | 0 | 1870 | 2443 | 76.5% | -| ov_SC03_117 | 1867 | 1664 | 0 | 1873 | 2562 | 73.1% | -| ov_SC03_118 | 1895 | 1688 | 0 | 1896 | 2690 | 70.5% | -| ov_SC03_119 | 1890 | 1688 | 0 | 1891 | 2690 | 70.3% | -| ov_SC03_121 | 1867 | 1664 | 0 | 1870 | 2464 | 75.9% | -| ov_SC03_124 | 1891 | 1660 | 0 | 1911 | 2746 | 69.6% | -| ov_SC03_125 | 1873 | 1664 | 0 | 1885 | 2593 | 72.7% | -| ov_SC03_126 | 1864 | 1666 | 0 | 1864 | 2427 | 76.8% | -| ov_SC04_000 | 1873 | 1668 | 0 | 1882 | 2551 | 73.8% | -| ov_SC04_002 | 1877 | 1664 | 0 | 1881 | 2641 | 71.2% | -| ov_SC04_003 | 1865 | 1664 | 0 | 1869 | 2507 | 74.6% | -| ov_SC04_004 | 1872 | 1664 | 0 | 1874 | 2563 | 73.1% | -| ov_SC04_005 | 1874 | 1664 | 0 | 1880 | 2617 | 71.8% | -| ov_SC04_006 | 1863 | 1664 | 0 | 1865 | 2458 | 75.9% | -| ov_SC04_007 | 1873 | 1664 | 0 | 1877 | 2574 | 72.9% | -| ov_SC04_008 | 1863 | 1664 | 0 | 1863 | 2419 | 77.0% | -| ov_SC04_009 | 1866 | 1664 | 0 | 1869 | 2445 | 76.4% | -| ov_SC04_010 | 1866 | 1664 | 0 | 1867 | 2423 | 77.1% | -| ov_SC04_011 | 1889 | 1664 | 0 | 1895 | 2808 | 67.5% | -| ov_SC04_012 | 1863 | 1664 | 0 | 1864 | 2424 | 76.9% | -| ov_SC04_015 | 1883 | 1665 | 0 | 1894 | 2616 | 72.4% | -| ov_SC04_016 | 1861 | 1664 | 0 | 1863 | 2444 | 76.2% | -| ov_SC04_018 | 1909 | 1699 | 0 | 1909 | 2862 | 66.7% | -| ov_SC04_019 | 1914 | 1699 | 0 | 1914 | 2862 | 66.9% | -| ov_SC04_020 | 1876 | 1664 | 0 | 1888 | 2572 | 73.4% | -| ov_SC04_021 | 1862 | 1666 | 0 | 1862 | 2427 | 76.7% | -| ov_SC05_000 | 1866 | 1668 | 0 | 1869 | 2426 | 77.0% | -| ov_SC05_001 | 1866 | 1664 | 0 | 1871 | 2579 | 72.5% | -| ov_SC05_002 | 1863 | 1664 | 0 | 1866 | 2447 | 76.3% | -| ov_SC05_003 | 1864 | 1664 | 0 | 1865 | 2486 | 75.0% | -| ov_SC05_004 | 1864 | 1664 | 0 | 1866 | 2469 | 75.6% | -| ov_SC05_005 | 1865 | 1664 | 0 | 1866 | 2496 | 74.8% | -| ov_SC05_006 | 1862 | 1664 | 0 | 1862 | 2434 | 76.5% | -| ov_SC05_007 | 1867 | 1664 | 0 | 1872 | 2487 | 75.3% | -| ov_SC05_008 | 1887 | 1664 | 0 | 1889 | 2548 | 74.1% | -| ov_SC05_009 | 1867 | 1664 | 0 | 1871 | 2442 | 76.6% | -| ov_SC05_010 | 1875 | 1664 | 0 | 1879 | 2593 | 72.5% | -| ov_SC05_011 | 1862 | 1664 | 0 | 1863 | 2413 | 77.2% | -| ov_SC05_017 | 1894 | 1661 | 0 | 1905 | 2847 | 66.9% | -| ov_SC05_018 | 1885 | 1664 | 0 | 1898 | 2678 | 70.9% | -| ov_SC05_019 | 1863 | 1666 | 0 | 1863 | 2427 | 76.8% | -| ov_SC06_000 | 1897 | 1673 | 0 | 1900 | 2696 | 70.5% | -| ov_SC06_006 | 1870 | 1664 | 0 | 1871 | 2516 | 74.4% | -| ov_SC06_008 | 1875 | 1666 | 0 | 1881 | 2546 | 73.9% | -| ov_SC06_010 | 1874 | 1664 | 0 | 1879 | 2522 | 74.5% | -| ov_SC06_011 | 1866 | 1664 | 0 | 1870 | 2473 | 75.6% | -| ov_SC06_013 | 1865 | 1664 | 0 | 1866 | 2429 | 76.8% | -| ov_SC06_014 | 1867 | 1664 | 0 | 1869 | 2457 | 76.1% | -| ov_SC06_015 | 1864 | 1664 | 0 | 1864 | 2425 | 76.9% | -| ov_SC06_016 | 1875 | 1664 | 0 | 1877 | 2554 | 73.5% | -| ov_SC06_018 | 1874 | 1667 | 0 | 1881 | 2670 | 70.4% | -| ov_SC06_020 | 1868 | 1666 | 0 | 1869 | 2523 | 74.1% | -| ov_SC06_022 | 1874 | 1664 | 0 | 1882 | 2647 | 71.1% | -| ov_SC06_024 | 1879 | 1664 | 0 | 1885 | 2672 | 70.5% | -| ov_SC06_025 | 1872 | 1664 | 0 | 1877 | 2577 | 72.8% | -| ov_SC06_027 | 1860 | 1664 | 0 | 1861 | 2412 | 77.2% | -| ov_SC06_029 | 1888 | 1664 | 0 | 1900 | 2667 | 71.2% | -| ov_SC06_030 | 1866 | 1664 | 0 | 1866 | 2461 | 75.8% | -| ov_SC06_032 | 1867 | 1665 | 0 | 1874 | 2663 | 70.4% | -| ov_SC06_033 | 1875 | 1665 | 0 | 1882 | 2636 | 71.4% | -| ov_SC07_000 | 1878 | 1668 | 0 | 1880 | 2526 | 74.4% | -| ov_SC07_001 | 1867 | 1664 | 0 | 1869 | 2459 | 76.0% | -| ov_SC07_002 | 1881 | 1664 | 0 | 1885 | 2584 | 72.9% | -| ov_SC07_008 | 1861 | 1664 | 0 | 1861 | 2390 | 77.9% | -| ov_SC07_009 | 1869 | 1664 | 0 | 1871 | 2434 | 76.9% | +| ov_SC01_000 | 1874 | 1669 | 0 | 1874 | 2407 | 77.9% | +| ov_SC01_001 | 1871 | 1669 | 0 | 1873 | 2471 | 75.8% | +| ov_SC01_004 | 1864 | 1660 | 0 | 1865 | 2418 | 77.1% | +| ov_SC01_005 | 1888 | 1682 | 0 | 1888 | 2508 | 75.3% | +| ov_SC01_006 | 1887 | 1682 | 0 | 1887 | 2508 | 75.2% | +| ov_SC01_008 | 1865 | 1660 | 0 | 1867 | 2430 | 76.8% | +| ov_SC01_009 | 1885 | 1661 | 0 | 1886 | 2512 | 75.1% | +| ov_SC01_074 | 1865 | 1661 | 0 | 1867 | 2429 | 76.9% | +| ov_SC01_077 | 2262 | 1624 | 0 | 2264 | 2586 | 87.5% | +| ov_SC01_080 | 1883 | 1664 | 0 | 1883 | 2517 | 74.8% | +| ov_SC01_084 | 1886 | 1664 | 0 | 1891 | 2583 | 73.2% | +| ov_SC02_000 | 1903 | 1699 | 0 | 1903 | 2688 | 70.8% | +| ov_SC02_003 | 1903 | 1699 | 0 | 1903 | 2688 | 70.8% | +| ov_SC02_004 | 1869 | 1664 | 0 | 1869 | 2405 | 77.7% | +| ov_SC02_005 | 1928 | 1660 | 0 | 1938 | 2932 | 66.1% | +| ov_SC02_011 | 1909 | 1667 | 0 | 1920 | 2898 | 66.3% | +| ov_SC02_015 | 1870 | 1666 | 0 | 1870 | 2418 | 77.3% | +| ov_SC02_016 | 1874 | 1666 | 0 | 1877 | 2550 | 73.6% | +| ov_SC02_017 | 1893 | 1666 | 0 | 1901 | 2737 | 69.5% | +| ov_SC02_021 | 1873 | 1666 | 0 | 1873 | 2441 | 76.7% | +| ov_SC02_026 | 1877 | 1664 | 0 | 1883 | 2577 | 73.1% | +| ov_SC02_027 | 1886 | 1664 | 0 | 1895 | 2697 | 70.3% | +| ov_SC02_028 | 1894 | 1664 | 0 | 1904 | 2706 | 70.4% | +| ov_SC02_031 | 1884 | 1665 | 0 | 1889 | 2567 | 73.6% | +| ov_SC02_035 | 1875 | 1664 | 0 | 1878 | 2525 | 74.4% | +| ov_SC02_039 | 1866 | 1664 | 0 | 1866 | 2420 | 77.1% | +| ov_SC02_041 | 1873 | 1664 | 0 | 1876 | 2565 | 73.1% | +| ov_SC03_001 | 1926 | 1665 | 0 | 1943 | 2874 | 67.6% | +| ov_SC03_002 | 1892 | 1669 | 0 | 1907 | 2636 | 72.3% | +| ov_SC03_003 | 1864 | 1664 | 0 | 1865 | 2427 | 76.8% | +| ov_SC03_006 | 1905 | 1670 | 0 | 1914 | 2772 | 69.0% | +| ov_SC03_007 | 1880 | 1664 | 0 | 1884 | 2628 | 71.7% | +| ov_SC03_010 | 1874 | 1664 | 0 | 1874 | 2474 | 75.7% | +| ov_SC03_011 | 1870 | 1664 | 0 | 1876 | 2532 | 74.1% | +| ov_SC03_012 | 1865 | 1664 | 0 | 1866 | 2410 | 77.4% | +| ov_SC03_013 | 1873 | 1664 | 0 | 1873 | 2497 | 75.0% | +| ov_SC03_014 | 1895 | 1689 | 0 | 1895 | 2690 | 70.4% | +| ov_SC03_015 | 1901 | 1689 | 0 | 1901 | 2690 | 70.7% | +| ov_SC03_023 | 1867 | 1664 | 0 | 1868 | 2439 | 76.6% | +| ov_SC03_024 | 1897 | 1669 | 0 | 1904 | 2646 | 72.0% | +| ov_SC03_028 | 1888 | 1664 | 0 | 1892 | 2669 | 70.9% | +| ov_SC03_029 | 1874 | 1666 | 0 | 1884 | 2649 | 71.1% | +| ov_SC03_030 | 1875 | 1668 | 0 | 1877 | 2500 | 75.1% | +| ov_SC03_031 | 1869 | 1664 | 0 | 1873 | 2519 | 74.4% | +| ov_SC03_089 | 1879 | 1664 | 0 | 1886 | 2586 | 72.9% | +| ov_SC03_090 | 1880 | 1664 | 0 | 1888 | 2630 | 71.8% | +| ov_SC03_091 | 1879 | 1664 | 0 | 1887 | 2645 | 71.3% | +| ov_SC03_092 | 1879 | 1664 | 0 | 1891 | 2592 | 73.0% | +| ov_SC03_093 | 1876 | 1664 | 0 | 1880 | 2568 | 73.2% | +| ov_SC03_094 | 1870 | 1664 | 0 | 1876 | 2581 | 72.7% | +| ov_SC03_095 | 1868 | 1664 | 0 | 1871 | 2479 | 75.5% | +| ov_SC03_096 | 1871 | 1664 | 0 | 1874 | 2470 | 75.9% | +| ov_SC03_097 | 1875 | 1664 | 0 | 1882 | 2608 | 72.2% | +| ov_SC03_098 | 1871 | 1664 | 0 | 1874 | 2546 | 73.6% | +| ov_SC03_099 | 1868 | 1664 | 0 | 1871 | 2509 | 74.6% | +| ov_SC03_100 | 1870 | 1664 | 0 | 1874 | 2544 | 73.7% | +| ov_SC03_101 | 1872 | 1664 | 0 | 1876 | 2533 | 74.1% | +| ov_SC03_102 | 1872 | 1664 | 0 | 1875 | 2497 | 75.1% | +| ov_SC03_103 | 1871 | 1666 | 0 | 1874 | 2515 | 74.5% | +| ov_SC03_104 | 1882 | 1664 | 0 | 1889 | 2621 | 72.1% | +| ov_SC03_105 | 1876 | 1664 | 0 | 1883 | 2602 | 72.4% | +| ov_SC03_108 | 1864 | 1664 | 0 | 1864 | 2448 | 76.1% | +| ov_SC03_109 | 1865 | 1664 | 0 | 1867 | 2428 | 76.9% | +| ov_SC03_110 | 1867 | 1664 | 0 | 1867 | 2473 | 75.5% | +| ov_SC03_111 | 1872 | 1664 | 0 | 1875 | 2515 | 74.6% | +| ov_SC03_112 | 1870 | 1666 | 0 | 1872 | 2531 | 74.0% | +| ov_SC03_113 | 1867 | 1666 | 0 | 1870 | 2473 | 75.6% | +| ov_SC03_114 | 1863 | 1664 | 0 | 1865 | 2419 | 77.1% | +| ov_SC03_115 | 1871 | 1664 | 0 | 1873 | 2477 | 75.6% | +| ov_SC03_116 | 1869 | 1664 | 0 | 1872 | 2443 | 76.6% | +| ov_SC03_117 | 1869 | 1664 | 0 | 1875 | 2562 | 73.2% | +| ov_SC03_118 | 1897 | 1688 | 0 | 1898 | 2690 | 70.6% | +| ov_SC03_119 | 1892 | 1688 | 0 | 1893 | 2690 | 70.4% | +| ov_SC03_121 | 1869 | 1664 | 0 | 1872 | 2464 | 76.0% | +| ov_SC03_124 | 1893 | 1660 | 0 | 1913 | 2746 | 69.7% | +| ov_SC03_125 | 1875 | 1664 | 0 | 1887 | 2593 | 72.8% | +| ov_SC03_126 | 1866 | 1666 | 0 | 1866 | 2427 | 76.9% | +| ov_SC04_000 | 1875 | 1668 | 0 | 1884 | 2551 | 73.9% | +| ov_SC04_002 | 1879 | 1664 | 0 | 1883 | 2641 | 71.3% | +| ov_SC04_003 | 1867 | 1664 | 0 | 1871 | 2507 | 74.6% | +| ov_SC04_004 | 1874 | 1664 | 0 | 1876 | 2563 | 73.2% | +| ov_SC04_005 | 1876 | 1664 | 0 | 1882 | 2617 | 71.9% | +| ov_SC04_006 | 1865 | 1664 | 0 | 1867 | 2458 | 76.0% | +| ov_SC04_007 | 1875 | 1664 | 0 | 1879 | 2574 | 73.0% | +| ov_SC04_008 | 1865 | 1664 | 0 | 1865 | 2419 | 77.1% | +| ov_SC04_009 | 1868 | 1664 | 0 | 1871 | 2445 | 76.5% | +| ov_SC04_010 | 1868 | 1664 | 0 | 1869 | 2423 | 77.1% | +| ov_SC04_011 | 1891 | 1664 | 0 | 1897 | 2808 | 67.6% | +| ov_SC04_012 | 1865 | 1664 | 0 | 1866 | 2424 | 77.0% | +| ov_SC04_015 | 1885 | 1665 | 0 | 1896 | 2616 | 72.5% | +| ov_SC04_016 | 1863 | 1664 | 0 | 1865 | 2444 | 76.3% | +| ov_SC04_018 | 1911 | 1699 | 0 | 1911 | 2862 | 66.8% | +| ov_SC04_019 | 1916 | 1699 | 0 | 1916 | 2862 | 66.9% | +| ov_SC04_020 | 1878 | 1664 | 0 | 1890 | 2572 | 73.5% | +| ov_SC04_021 | 1864 | 1666 | 0 | 1864 | 2427 | 76.8% | +| ov_SC05_000 | 1868 | 1668 | 0 | 1871 | 2426 | 77.1% | +| ov_SC05_001 | 1868 | 1664 | 0 | 1873 | 2579 | 72.6% | +| ov_SC05_002 | 1865 | 1664 | 0 | 1868 | 2447 | 76.3% | +| ov_SC05_003 | 1866 | 1664 | 0 | 1867 | 2486 | 75.1% | +| ov_SC05_004 | 1866 | 1664 | 0 | 1868 | 2469 | 75.7% | +| ov_SC05_005 | 1867 | 1664 | 0 | 1868 | 2496 | 74.8% | +| ov_SC05_006 | 1864 | 1664 | 0 | 1864 | 2434 | 76.6% | +| ov_SC05_007 | 1869 | 1664 | 0 | 1874 | 2487 | 75.4% | +| ov_SC05_008 | 1889 | 1664 | 0 | 1891 | 2548 | 74.2% | +| ov_SC05_009 | 1869 | 1664 | 0 | 1873 | 2442 | 76.7% | +| ov_SC05_010 | 1877 | 1664 | 0 | 1881 | 2593 | 72.5% | +| ov_SC05_011 | 1864 | 1664 | 0 | 1865 | 2413 | 77.3% | +| ov_SC05_017 | 1896 | 1661 | 0 | 1907 | 2847 | 67.0% | +| ov_SC05_018 | 1887 | 1664 | 0 | 1900 | 2678 | 70.9% | +| ov_SC05_019 | 1865 | 1666 | 0 | 1865 | 2427 | 76.8% | +| ov_SC06_000 | 1899 | 1673 | 0 | 1902 | 2696 | 70.5% | +| ov_SC06_006 | 1872 | 1664 | 0 | 1873 | 2516 | 74.4% | +| ov_SC06_008 | 1877 | 1666 | 0 | 1883 | 2546 | 74.0% | +| ov_SC06_010 | 1876 | 1664 | 0 | 1881 | 2522 | 74.6% | +| ov_SC06_011 | 1868 | 1664 | 0 | 1872 | 2473 | 75.7% | +| ov_SC06_013 | 1867 | 1664 | 0 | 1868 | 2429 | 76.9% | +| ov_SC06_014 | 1869 | 1664 | 0 | 1871 | 2457 | 76.1% | +| ov_SC06_015 | 1866 | 1664 | 0 | 1866 | 2425 | 76.9% | +| ov_SC06_016 | 1877 | 1664 | 0 | 1879 | 2554 | 73.6% | +| ov_SC06_018 | 1876 | 1667 | 0 | 1883 | 2670 | 70.5% | +| ov_SC06_020 | 1870 | 1666 | 0 | 1871 | 2523 | 74.2% | +| ov_SC06_022 | 1876 | 1664 | 0 | 1884 | 2647 | 71.2% | +| ov_SC06_024 | 1881 | 1664 | 0 | 1887 | 2672 | 70.6% | +| ov_SC06_025 | 1874 | 1664 | 0 | 1879 | 2577 | 72.9% | +| ov_SC06_027 | 1862 | 1664 | 0 | 1863 | 2412 | 77.2% | +| ov_SC06_029 | 1890 | 1664 | 0 | 1902 | 2667 | 71.3% | +| ov_SC06_030 | 1868 | 1664 | 0 | 1868 | 2461 | 75.9% | +| ov_SC06_032 | 1869 | 1665 | 0 | 1876 | 2663 | 70.4% | +| ov_SC06_033 | 1877 | 1665 | 0 | 1884 | 2636 | 71.5% | +| ov_SC07_000 | 1880 | 1668 | 0 | 1882 | 2526 | 74.5% | +| ov_SC07_001 | 1869 | 1664 | 0 | 1871 | 2459 | 76.1% | +| ov_SC07_002 | 1883 | 1664 | 0 | 1887 | 2584 | 73.0% | +| ov_SC07_008 | 1863 | 1664 | 0 | 1863 | 2390 | 77.9% | +| ov_SC07_009 | 1871 | 1664 | 0 | 1873 | 2434 | 77.0% | diff --git a/src/ov_SC01_000/ov_SC01_000.c b/src/ov_SC01_000/ov_SC01_000.c index c89ddeacb5..ed0d250df9 100644 --- a/src/ov_SC01_000/ov_SC01_000.c +++ b/src/ov_SC01_000/ov_SC01_000.c @@ -795,7 +795,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_000/nonmatchings/ov_SC01_000", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017EF44; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017EF44); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC01_000/ov_SC01_000_after.c b/src/ov_SC01_000/ov_SC01_000_after.c index 8142633236..93ef1c64e6 100644 --- a/src/ov_SC01_000/ov_SC01_000_after.c +++ b/src/ov_SC01_000/ov_SC01_000_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC01_000/nonmatchings/ov_SC01_000_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_000/nonmatchings/ov_SC01_000_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80181468; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80181468 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC01_000/nonmatchings/ov_SC01_000_after", func_8015D104); diff --git a/src/ov_SC01_001/ov_SC01_001.c b/src/ov_SC01_001/ov_SC01_001.c index c2f8241a99..bfcc1c0bb6 100644 --- a/src/ov_SC01_001/ov_SC01_001.c +++ b/src/ov_SC01_001/ov_SC01_001.c @@ -797,7 +797,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_001/nonmatchings/ov_SC01_001", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80183B94; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80183B94); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC01_001/ov_SC01_001_after.c b/src/ov_SC01_001/ov_SC01_001_after.c index 6d89ed49bd..2283a530e6 100644 --- a/src/ov_SC01_001/ov_SC01_001_after.c +++ b/src/ov_SC01_001/ov_SC01_001_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC01_001/nonmatchings/ov_SC01_001_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_001/nonmatchings/ov_SC01_001_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801860B8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801860B8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC01_001/nonmatchings/ov_SC01_001_after", func_8015D104); diff --git a/src/ov_SC01_004/ov_SC01_004.c b/src/ov_SC01_004/ov_SC01_004.c index 4dc2ef7057..2167583ba8 100644 --- a/src/ov_SC01_004/ov_SC01_004.c +++ b/src/ov_SC01_004/ov_SC01_004.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_004/nonmatchings/ov_SC01_004", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017F558; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017F558); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC01_004/ov_SC01_004_after.c b/src/ov_SC01_004/ov_SC01_004_after.c index fdaba048e0..884c6ffb85 100644 --- a/src/ov_SC01_004/ov_SC01_004_after.c +++ b/src/ov_SC01_004/ov_SC01_004_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC01_004/nonmatchings/ov_SC01_004_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_004/nonmatchings/ov_SC01_004_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80181A7C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80181A7C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC01_004/nonmatchings/ov_SC01_004_after", func_8015D104); diff --git a/src/ov_SC01_005/ov_SC01_005.c b/src/ov_SC01_005/ov_SC01_005.c index 04211e8e4e..99e5c1176d 100644 --- a/src/ov_SC01_005/ov_SC01_005.c +++ b/src/ov_SC01_005/ov_SC01_005.c @@ -792,7 +792,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_005/nonmatchings/ov_SC01_005", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801826EC; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801826EC); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC01_005/ov_SC01_005_after.c b/src/ov_SC01_005/ov_SC01_005_after.c index 06c548e88a..53290d5b87 100644 --- a/src/ov_SC01_005/ov_SC01_005_after.c +++ b/src/ov_SC01_005/ov_SC01_005_after.c @@ -3248,7 +3248,39 @@ INCLUDE_ASM("asm/ov_SC01_005/nonmatchings/ov_SC01_005_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_005/nonmatchings/ov_SC01_005_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80184C10; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80184C10 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC01_005/nonmatchings/ov_SC01_005_after", func_8015D104); diff --git a/src/ov_SC01_006/ov_SC01_006.c b/src/ov_SC01_006/ov_SC01_006.c index 9728779290..c7cb590105 100644 --- a/src/ov_SC01_006/ov_SC01_006.c +++ b/src/ov_SC01_006/ov_SC01_006.c @@ -792,7 +792,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_006/nonmatchings/ov_SC01_006", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801826EC; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801826EC); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC01_006/ov_SC01_006_after.c b/src/ov_SC01_006/ov_SC01_006_after.c index 0177000e1b..9462e9472f 100644 --- a/src/ov_SC01_006/ov_SC01_006_after.c +++ b/src/ov_SC01_006/ov_SC01_006_after.c @@ -3248,7 +3248,39 @@ INCLUDE_ASM("asm/ov_SC01_006/nonmatchings/ov_SC01_006_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_006/nonmatchings/ov_SC01_006_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80184C10; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80184C10 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC01_006/nonmatchings/ov_SC01_006_after", func_8015D104); diff --git a/src/ov_SC01_008/ov_SC01_008.c b/src/ov_SC01_008/ov_SC01_008.c index ffe53aa922..0c9447b4c9 100644 --- a/src/ov_SC01_008/ov_SC01_008.c +++ b/src/ov_SC01_008/ov_SC01_008.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_008/nonmatchings/ov_SC01_008", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017FACC; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017FACC); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC01_008/ov_SC01_008_after.c b/src/ov_SC01_008/ov_SC01_008_after.c index f4b1122bed..a46cf23c86 100644 --- a/src/ov_SC01_008/ov_SC01_008_after.c +++ b/src/ov_SC01_008/ov_SC01_008_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC01_008/nonmatchings/ov_SC01_008_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_008/nonmatchings/ov_SC01_008_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80181FF0; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80181FF0 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC01_008/nonmatchings/ov_SC01_008_after", func_8015D104); diff --git a/src/ov_SC01_009/ov_SC01_009.c b/src/ov_SC01_009/ov_SC01_009.c index d57770ce10..e5023ba16f 100644 --- a/src/ov_SC01_009/ov_SC01_009.c +++ b/src/ov_SC01_009/ov_SC01_009.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_009/nonmatchings/ov_SC01_009", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80182CB4; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80182CB4); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC01_009/ov_SC01_009_after.c b/src/ov_SC01_009/ov_SC01_009_after.c index eda25e71f9..618aa89cc9 100644 --- a/src/ov_SC01_009/ov_SC01_009_after.c +++ b/src/ov_SC01_009/ov_SC01_009_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC01_009/nonmatchings/ov_SC01_009_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_009/nonmatchings/ov_SC01_009_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801851D8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801851D8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC01_009/nonmatchings/ov_SC01_009_after", func_8015D104); diff --git a/src/ov_SC01_074/ov_SC01_074.c b/src/ov_SC01_074/ov_SC01_074.c index 99ca7d130a..cbec6d47b6 100644 --- a/src/ov_SC01_074/ov_SC01_074.c +++ b/src/ov_SC01_074/ov_SC01_074.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_074/nonmatchings/ov_SC01_074", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017E934; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017E934); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC01_074/ov_SC01_074_after.c b/src/ov_SC01_074/ov_SC01_074_after.c index 5af19ef6a3..a101245d0b 100644 --- a/src/ov_SC01_074/ov_SC01_074_after.c +++ b/src/ov_SC01_074/ov_SC01_074_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC01_074/nonmatchings/ov_SC01_074_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_074/nonmatchings/ov_SC01_074_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80180E58; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80180E58 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC01_074/nonmatchings/ov_SC01_074_after", func_8015D104); diff --git a/src/ov_SC01_077/ov_SC01_077_a.c b/src/ov_SC01_077/ov_SC01_077_a.c index 65d64f89de..eda8a6e692 100644 --- a/src/ov_SC01_077/ov_SC01_077_a.c +++ b/src/ov_SC01_077/ov_SC01_077_a.c @@ -1215,7 +1215,32 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077_a", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80186E58; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80186E58); + return 1; + } + return 0; +} + // @class: struct // @stuck: none — MATCH expected; base = (*(u32*)(p+0x58) & 0xFFFFFFF) | 0x80000000 held once, %lo folds via offsets diff --git a/src/ov_SC01_077/ov_SC01_077_after.c b/src/ov_SC01_077/ov_SC01_077_after.c index a9b01947c4..1ad847d8c5 100644 --- a/src/ov_SC01_077/ov_SC01_077_after.c +++ b/src/ov_SC01_077/ov_SC01_077_after.c @@ -4010,7 +4010,38 @@ void func_8015CFC0(s32 * a0) DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_077/nonmatchings/ov_SC01_077_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018937C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018937C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + // @class: struct // @stuck: none — MATCH (pending gate) diff --git a/src/ov_SC01_080/ov_SC01_080.c b/src/ov_SC01_080/ov_SC01_080.c index ccd4505e41..2bbd7106f7 100644 --- a/src/ov_SC01_080/ov_SC01_080.c +++ b/src/ov_SC01_080/ov_SC01_080.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_080/nonmatchings/ov_SC01_080", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80183894; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80183894); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC01_080/ov_SC01_080_after.c b/src/ov_SC01_080/ov_SC01_080_after.c index 77fe6d296a..a6f4df0e5f 100644 --- a/src/ov_SC01_080/ov_SC01_080_after.c +++ b/src/ov_SC01_080/ov_SC01_080_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC01_080/nonmatchings/ov_SC01_080_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_080/nonmatchings/ov_SC01_080_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80185DB8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80185DB8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC01_080/nonmatchings/ov_SC01_080_after", func_8015D104); diff --git a/src/ov_SC01_084/ov_SC01_084.c b/src/ov_SC01_084/ov_SC01_084.c index 03aa68e8b3..809b7d6d45 100644 --- a/src/ov_SC01_084/ov_SC01_084.c +++ b/src/ov_SC01_084/ov_SC01_084.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_084/nonmatchings/ov_SC01_084", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80186B88; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80186B88); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC01_084/ov_SC01_084_after.c b/src/ov_SC01_084/ov_SC01_084_after.c index b10f08341d..d9f5d6e272 100644 --- a/src/ov_SC01_084/ov_SC01_084_after.c +++ b/src/ov_SC01_084/ov_SC01_084_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC01_084/nonmatchings/ov_SC01_084_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC01_084/nonmatchings/ov_SC01_084_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801890AC; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801890AC | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC01_084/nonmatchings/ov_SC01_084_after", func_8015D104); diff --git a/src/ov_SC02_000/ov_SC02_000.c b/src/ov_SC02_000/ov_SC02_000.c index 61db883d78..2fb7fb3eb2 100644 --- a/src/ov_SC02_000/ov_SC02_000.c +++ b/src/ov_SC02_000/ov_SC02_000.c @@ -797,7 +797,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018AF38; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018AF38); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC02_000/ov_SC02_000_after.c b/src/ov_SC02_000/ov_SC02_000_after.c index 46c8e67560..441bd8f58a 100644 --- a/src/ov_SC02_000/ov_SC02_000_after.c +++ b/src/ov_SC02_000/ov_SC02_000_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018D45C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018D45C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_after", func_8015D104); diff --git a/src/ov_SC02_003/ov_SC02_003.c b/src/ov_SC02_003/ov_SC02_003.c index d8270046b8..383e0a0c82 100644 --- a/src/ov_SC02_003/ov_SC02_003.c +++ b/src/ov_SC02_003/ov_SC02_003.c @@ -797,7 +797,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_003/nonmatchings/ov_SC02_003", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018AF38; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018AF38); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC02_003/ov_SC02_003_after.c b/src/ov_SC02_003/ov_SC02_003_after.c index c0006790cc..0a28701a51 100644 --- a/src/ov_SC02_003/ov_SC02_003_after.c +++ b/src/ov_SC02_003/ov_SC02_003_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC02_003/nonmatchings/ov_SC02_003_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_003/nonmatchings/ov_SC02_003_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018D45C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018D45C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC02_003/nonmatchings/ov_SC02_003_after", func_8015D104); diff --git a/src/ov_SC02_004/ov_SC02_004.c b/src/ov_SC02_004/ov_SC02_004.c index cf01613a5e..477e5c011c 100644 --- a/src/ov_SC02_004/ov_SC02_004.c +++ b/src/ov_SC02_004/ov_SC02_004.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_004/nonmatchings/ov_SC02_004", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017E018; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017E018); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC02_004/ov_SC02_004_after.c b/src/ov_SC02_004/ov_SC02_004_after.c index b48ab99370..c860c76c09 100644 --- a/src/ov_SC02_004/ov_SC02_004_after.c +++ b/src/ov_SC02_004/ov_SC02_004_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC02_004/nonmatchings/ov_SC02_004_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_004/nonmatchings/ov_SC02_004_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018053C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018053C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC02_004/nonmatchings/ov_SC02_004_after", func_8015D104); diff --git a/src/ov_SC02_005/ov_SC02_005.c b/src/ov_SC02_005/ov_SC02_005.c index 46b95ad518..7cbd8e54dd 100644 --- a/src/ov_SC02_005/ov_SC02_005.c +++ b/src/ov_SC02_005/ov_SC02_005.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80190C1C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80190C1C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC02_005/ov_SC02_005_after.c b/src/ov_SC02_005/ov_SC02_005_after.c index 2b581568a4..36dbd9f31f 100644 --- a/src/ov_SC02_005/ov_SC02_005_after.c +++ b/src/ov_SC02_005/ov_SC02_005_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80193140; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80193140 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_after", func_8015D104); diff --git a/src/ov_SC02_011/ov_SC02_011.c b/src/ov_SC02_011/ov_SC02_011.c index ab07157fd2..7c7cdad17c 100644 --- a/src/ov_SC02_011/ov_SC02_011.c +++ b/src/ov_SC02_011/ov_SC02_011.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8019106C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8019106C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC02_011/ov_SC02_011_after.c b/src/ov_SC02_011/ov_SC02_011_after.c index a878047806..954eb23df7 100644 --- a/src/ov_SC02_011/ov_SC02_011_after.c +++ b/src/ov_SC02_011/ov_SC02_011_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80193590; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80193590 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_after", func_8015D104); diff --git a/src/ov_SC02_015/ov_SC02_015.c b/src/ov_SC02_015/ov_SC02_015.c index 7e3645b0b6..5f5f02c35c 100644 --- a/src/ov_SC02_015/ov_SC02_015.c +++ b/src/ov_SC02_015/ov_SC02_015.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_015/nonmatchings/ov_SC02_015", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017E580; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017E580); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC02_015/ov_SC02_015_after.c b/src/ov_SC02_015/ov_SC02_015_after.c index 662661ccc9..91eb37e989 100644 --- a/src/ov_SC02_015/ov_SC02_015_after.c +++ b/src/ov_SC02_015/ov_SC02_015_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC02_015/nonmatchings/ov_SC02_015_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_015/nonmatchings/ov_SC02_015_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80180AA4; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80180AA4 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC02_015/nonmatchings/ov_SC02_015_after", func_8015D104); diff --git a/src/ov_SC02_016/ov_SC02_016.c b/src/ov_SC02_016/ov_SC02_016.c index e8bbca2a93..8b2dd26d58 100644 --- a/src/ov_SC02_016/ov_SC02_016.c +++ b/src/ov_SC02_016/ov_SC02_016.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_016/nonmatchings/ov_SC02_016", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801847B8; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801847B8); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC02_016/ov_SC02_016_after.c b/src/ov_SC02_016/ov_SC02_016_after.c index 8997935039..8dbc6dc4c4 100644 --- a/src/ov_SC02_016/ov_SC02_016_after.c +++ b/src/ov_SC02_016/ov_SC02_016_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC02_016/nonmatchings/ov_SC02_016_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_016/nonmatchings/ov_SC02_016_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80186CDC; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80186CDC | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC02_016/nonmatchings/ov_SC02_016_after", func_8015D104); diff --git a/src/ov_SC02_017/ov_SC02_017.c b/src/ov_SC02_017/ov_SC02_017.c index a4ad618115..c307085544 100644 --- a/src/ov_SC02_017/ov_SC02_017.c +++ b/src/ov_SC02_017/ov_SC02_017.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018A810; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018A810); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC02_017/ov_SC02_017_after.c b/src/ov_SC02_017/ov_SC02_017_after.c index faf615082c..babdf57331 100644 --- a/src/ov_SC02_017/ov_SC02_017_after.c +++ b/src/ov_SC02_017/ov_SC02_017_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018CD34; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018CD34 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_after", func_8015D104); diff --git a/src/ov_SC02_021/ov_SC02_021.c b/src/ov_SC02_021/ov_SC02_021.c index 5035470565..feff9cb137 100644 --- a/src/ov_SC02_021/ov_SC02_021.c +++ b/src/ov_SC02_021/ov_SC02_021.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_021/nonmatchings/ov_SC02_021", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017FE04; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017FE04); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC02_021/ov_SC02_021_after.c b/src/ov_SC02_021/ov_SC02_021_after.c index 5bcd892986..5fefbedde3 100644 --- a/src/ov_SC02_021/ov_SC02_021_after.c +++ b/src/ov_SC02_021/ov_SC02_021_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC02_021/nonmatchings/ov_SC02_021_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_021/nonmatchings/ov_SC02_021_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80182328; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80182328 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC02_021/nonmatchings/ov_SC02_021_after", func_8015D104); diff --git a/src/ov_SC02_026/ov_SC02_026.c b/src/ov_SC02_026/ov_SC02_026.c index 4f385c4203..e96964abf0 100644 --- a/src/ov_SC02_026/ov_SC02_026.c +++ b/src/ov_SC02_026/ov_SC02_026.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80186458; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80186458); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC02_026/ov_SC02_026_after.c b/src/ov_SC02_026/ov_SC02_026_after.c index 017fec901a..2297d7e838 100644 --- a/src/ov_SC02_026/ov_SC02_026_after.c +++ b/src/ov_SC02_026/ov_SC02_026_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018897C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018897C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_after", func_8015D104); diff --git a/src/ov_SC02_027/ov_SC02_027.c b/src/ov_SC02_027/ov_SC02_027.c index a63c1fe56c..31a26c5765 100644 --- a/src/ov_SC02_027/ov_SC02_027.c +++ b/src/ov_SC02_027/ov_SC02_027.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018B57C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018B57C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC02_027/ov_SC02_027_after.c b/src/ov_SC02_027/ov_SC02_027_after.c index 947d09b1f6..a9fc85b348 100644 --- a/src/ov_SC02_027/ov_SC02_027_after.c +++ b/src/ov_SC02_027/ov_SC02_027_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018DAA0; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018DAA0 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_after", func_8015D104); diff --git a/src/ov_SC02_028/ov_SC02_028.c b/src/ov_SC02_028/ov_SC02_028.c index 79329dee86..7a4e1125f2 100644 --- a/src/ov_SC02_028/ov_SC02_028.c +++ b/src/ov_SC02_028/ov_SC02_028.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_028/nonmatchings/ov_SC02_028", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018B780; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018B780); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC02_028/ov_SC02_028_after.c b/src/ov_SC02_028/ov_SC02_028_after.c index f926a81b14..d31910a40c 100644 --- a/src/ov_SC02_028/ov_SC02_028_after.c +++ b/src/ov_SC02_028/ov_SC02_028_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC02_028/nonmatchings/ov_SC02_028_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_028/nonmatchings/ov_SC02_028_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018DCA4; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018DCA4 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC02_028/nonmatchings/ov_SC02_028_after", func_8015D104); diff --git a/src/ov_SC02_031/ov_SC02_031.c b/src/ov_SC02_031/ov_SC02_031.c index 98952daf2d..13b5eaa54b 100644 --- a/src/ov_SC02_031/ov_SC02_031.c +++ b/src/ov_SC02_031/ov_SC02_031.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_031/nonmatchings/ov_SC02_031", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80184FAC; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80184FAC); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC02_031/ov_SC02_031_after.c b/src/ov_SC02_031/ov_SC02_031_after.c index cbff2f6a49..496c4a3dc3 100644 --- a/src/ov_SC02_031/ov_SC02_031_after.c +++ b/src/ov_SC02_031/ov_SC02_031_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC02_031/nonmatchings/ov_SC02_031_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_031/nonmatchings/ov_SC02_031_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801874D0; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801874D0 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC02_031/nonmatchings/ov_SC02_031_after", func_8015D104); diff --git a/src/ov_SC02_035/ov_SC02_035.c b/src/ov_SC02_035/ov_SC02_035.c index 775c5c659d..0c429193a4 100644 --- a/src/ov_SC02_035/ov_SC02_035.c +++ b/src/ov_SC02_035/ov_SC02_035.c @@ -803,7 +803,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_035/nonmatchings/ov_SC02_035", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018480C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018480C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC02_035/ov_SC02_035_after.c b/src/ov_SC02_035/ov_SC02_035_after.c index 61818b703f..4353c12ab7 100644 --- a/src/ov_SC02_035/ov_SC02_035_after.c +++ b/src/ov_SC02_035/ov_SC02_035_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC02_035/nonmatchings/ov_SC02_035_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_035/nonmatchings/ov_SC02_035_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80186D30; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80186D30 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC02_035/nonmatchings/ov_SC02_035_after", func_8015D104); diff --git a/src/ov_SC02_039/ov_SC02_039.c b/src/ov_SC02_039/ov_SC02_039.c index aced9d1eda..fa7ee8f1d1 100644 --- a/src/ov_SC02_039/ov_SC02_039.c +++ b/src/ov_SC02_039/ov_SC02_039.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_039/nonmatchings/ov_SC02_039", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017F438; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017F438); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC02_039/ov_SC02_039_after.c b/src/ov_SC02_039/ov_SC02_039_after.c index 38cf8bf986..0025a74174 100644 --- a/src/ov_SC02_039/ov_SC02_039_after.c +++ b/src/ov_SC02_039/ov_SC02_039_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC02_039/nonmatchings/ov_SC02_039_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_039/nonmatchings/ov_SC02_039_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018195C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018195C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC02_039/nonmatchings/ov_SC02_039_after", func_8015D104); diff --git a/src/ov_SC02_041/ov_SC02_041.c b/src/ov_SC02_041/ov_SC02_041.c index e9247358c7..cf1e2e7f14 100644 --- a/src/ov_SC02_041/ov_SC02_041.c +++ b/src/ov_SC02_041/ov_SC02_041.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80185108; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80185108); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC02_041/ov_SC02_041_after.c b/src/ov_SC02_041/ov_SC02_041_after.c index c13b842976..4e2cf02803 100644 --- a/src/ov_SC02_041/ov_SC02_041_after.c +++ b/src/ov_SC02_041/ov_SC02_041_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018762C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018762C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_after", func_8015D104); diff --git a/src/ov_SC03_001/ov_SC03_001.c b/src/ov_SC03_001/ov_SC03_001.c index d9bad90d30..42d324f4f9 100644 --- a/src/ov_SC03_001/ov_SC03_001.c +++ b/src/ov_SC03_001/ov_SC03_001.c @@ -797,7 +797,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_001/nonmatchings/ov_SC03_001", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018D848; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018D848); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_001/ov_SC03_001_after.c b/src/ov_SC03_001/ov_SC03_001_after.c index 65b33db008..4130eac451 100644 --- a/src/ov_SC03_001/ov_SC03_001_after.c +++ b/src/ov_SC03_001/ov_SC03_001_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_001/nonmatchings/ov_SC03_001_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_001/nonmatchings/ov_SC03_001_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018FD6C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018FD6C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_001/nonmatchings/ov_SC03_001_after", func_8015D104); diff --git a/src/ov_SC03_002/ov_SC03_002.c b/src/ov_SC03_002/ov_SC03_002.c index 459cc20268..313a7953a4 100644 --- a/src/ov_SC03_002/ov_SC03_002.c +++ b/src/ov_SC03_002/ov_SC03_002.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_002/nonmatchings/ov_SC03_002", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80185838; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80185838); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_002/ov_SC03_002_after.c b/src/ov_SC03_002/ov_SC03_002_after.c index d7bdb3446e..c4780574e7 100644 --- a/src/ov_SC03_002/ov_SC03_002_after.c +++ b/src/ov_SC03_002/ov_SC03_002_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_002/nonmatchings/ov_SC03_002_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_002/nonmatchings/ov_SC03_002_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80187D5C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80187D5C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_002/nonmatchings/ov_SC03_002_after", func_8015D104); diff --git a/src/ov_SC03_003/ov_SC03_003.c b/src/ov_SC03_003/ov_SC03_003.c index f13e66f2ff..b1be882a7a 100644 --- a/src/ov_SC03_003/ov_SC03_003.c +++ b/src/ov_SC03_003/ov_SC03_003.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_003/nonmatchings/ov_SC03_003", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017F600; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017F600); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_003/ov_SC03_003_after.c b/src/ov_SC03_003/ov_SC03_003_after.c index 1617e69f63..5279ce8bdd 100644 --- a/src/ov_SC03_003/ov_SC03_003_after.c +++ b/src/ov_SC03_003/ov_SC03_003_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_003/nonmatchings/ov_SC03_003_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_003/nonmatchings/ov_SC03_003_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80181B24; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80181B24 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_003/nonmatchings/ov_SC03_003_after", func_8015D104); diff --git a/src/ov_SC03_006/ov_SC03_006.c b/src/ov_SC03_006/ov_SC03_006.c index e389b6d9ed..17578af35f 100644 --- a/src/ov_SC03_006/ov_SC03_006.c +++ b/src/ov_SC03_006/ov_SC03_006.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_006/nonmatchings/ov_SC03_006", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018C91C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018C91C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_006/ov_SC03_006_after.c b/src/ov_SC03_006/ov_SC03_006_after.c index 3016f5f538..c1b90c6257 100644 --- a/src/ov_SC03_006/ov_SC03_006_after.c +++ b/src/ov_SC03_006/ov_SC03_006_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_006/nonmatchings/ov_SC03_006_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_006/nonmatchings/ov_SC03_006_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018EE40; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018EE40 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_006/nonmatchings/ov_SC03_006_after", func_8015D104); diff --git a/src/ov_SC03_007/ov_SC03_007.c b/src/ov_SC03_007/ov_SC03_007.c index 7a05544d2e..dda699a4e9 100644 --- a/src/ov_SC03_007/ov_SC03_007.c +++ b/src/ov_SC03_007/ov_SC03_007.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_007/nonmatchings/ov_SC03_007", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80187714; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80187714); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_007/ov_SC03_007_after.c b/src/ov_SC03_007/ov_SC03_007_after.c index c996f01149..13847adb3d 100644 --- a/src/ov_SC03_007/ov_SC03_007_after.c +++ b/src/ov_SC03_007/ov_SC03_007_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_007/nonmatchings/ov_SC03_007_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_007/nonmatchings/ov_SC03_007_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80189C38; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80189C38 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_007/nonmatchings/ov_SC03_007_after", func_8015D104); diff --git a/src/ov_SC03_010/ov_SC03_010.c b/src/ov_SC03_010/ov_SC03_010.c index c7a0252f5a..d36e65f410 100644 --- a/src/ov_SC03_010/ov_SC03_010.c +++ b/src/ov_SC03_010/ov_SC03_010.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_010/nonmatchings/ov_SC03_010", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80180234; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80180234); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_010/ov_SC03_010_after.c b/src/ov_SC03_010/ov_SC03_010_after.c index ab1a09544c..93b5ec3cb8 100644 --- a/src/ov_SC03_010/ov_SC03_010_after.c +++ b/src/ov_SC03_010/ov_SC03_010_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_010/nonmatchings/ov_SC03_010_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_010/nonmatchings/ov_SC03_010_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80182758; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80182758 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_010/nonmatchings/ov_SC03_010_after", func_8015D104); diff --git a/src/ov_SC03_011/ov_SC03_011.c b/src/ov_SC03_011/ov_SC03_011.c index 97e2cc45fa..4071adcaa2 100644 --- a/src/ov_SC03_011/ov_SC03_011.c +++ b/src/ov_SC03_011/ov_SC03_011.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_011/nonmatchings/ov_SC03_011", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801815A4; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801815A4); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_011/ov_SC03_011_after.c b/src/ov_SC03_011/ov_SC03_011_after.c index e581671f49..9bb658f711 100644 --- a/src/ov_SC03_011/ov_SC03_011_after.c +++ b/src/ov_SC03_011/ov_SC03_011_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_011/nonmatchings/ov_SC03_011_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_011/nonmatchings/ov_SC03_011_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80183AC8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80183AC8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_011/nonmatchings/ov_SC03_011_after", func_8015D104); diff --git a/src/ov_SC03_012/ov_SC03_012.c b/src/ov_SC03_012/ov_SC03_012.c index 8349b21ee3..73fedba140 100644 --- a/src/ov_SC03_012/ov_SC03_012.c +++ b/src/ov_SC03_012/ov_SC03_012.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_012/nonmatchings/ov_SC03_012", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017E484; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017E484); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_012/ov_SC03_012_after.c b/src/ov_SC03_012/ov_SC03_012_after.c index b2af9d61b3..3f6d566ead 100644 --- a/src/ov_SC03_012/ov_SC03_012_after.c +++ b/src/ov_SC03_012/ov_SC03_012_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_012/nonmatchings/ov_SC03_012_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_012/nonmatchings/ov_SC03_012_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801809A8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801809A8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_012/nonmatchings/ov_SC03_012_after", func_8015D104); diff --git a/src/ov_SC03_013/ov_SC03_013.c b/src/ov_SC03_013/ov_SC03_013.c index 24d73b8db6..b8c5429c45 100644 --- a/src/ov_SC03_013/ov_SC03_013.c +++ b/src/ov_SC03_013/ov_SC03_013.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_013/nonmatchings/ov_SC03_013", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018126C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018126C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_013/ov_SC03_013_after.c b/src/ov_SC03_013/ov_SC03_013_after.c index f17eb2cbd2..50e597c1ab 100644 --- a/src/ov_SC03_013/ov_SC03_013_after.c +++ b/src/ov_SC03_013/ov_SC03_013_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_013/nonmatchings/ov_SC03_013_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_013/nonmatchings/ov_SC03_013_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80183790; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80183790 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_013/nonmatchings/ov_SC03_013_after", func_8015D104); diff --git a/src/ov_SC03_014/ov_SC03_014.c b/src/ov_SC03_014/ov_SC03_014.c index f77c1cc4c1..f71b34fba3 100644 --- a/src/ov_SC03_014/ov_SC03_014.c +++ b/src/ov_SC03_014/ov_SC03_014.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018B8A8; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018B8A8); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_014/ov_SC03_014_after.c b/src/ov_SC03_014/ov_SC03_014_after.c index 7649d7bfce..be4c7392c0 100644 --- a/src/ov_SC03_014/ov_SC03_014_after.c +++ b/src/ov_SC03_014/ov_SC03_014_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018DDCC; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018DDCC | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014_after", func_8015D104); diff --git a/src/ov_SC03_015/ov_SC03_015.c b/src/ov_SC03_015/ov_SC03_015.c index 2c3f774314..36d0fb949e 100644 --- a/src/ov_SC03_015/ov_SC03_015.c +++ b/src/ov_SC03_015/ov_SC03_015.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018B8A8; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018B8A8); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_015/ov_SC03_015_after.c b/src/ov_SC03_015/ov_SC03_015_after.c index c50c58c096..0d78562619 100644 --- a/src/ov_SC03_015/ov_SC03_015_after.c +++ b/src/ov_SC03_015/ov_SC03_015_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018DDCC; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018DDCC | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_after", func_8015D104); diff --git a/src/ov_SC03_023/ov_SC03_023.c b/src/ov_SC03_023/ov_SC03_023.c index 4dcb5d3451..a01895fe78 100644 --- a/src/ov_SC03_023/ov_SC03_023.c +++ b/src/ov_SC03_023/ov_SC03_023.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_023/nonmatchings/ov_SC03_023", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017F224; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017F224); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_023/ov_SC03_023_after.c b/src/ov_SC03_023/ov_SC03_023_after.c index 0ec8e9752b..d43fcafce6 100644 --- a/src/ov_SC03_023/ov_SC03_023_after.c +++ b/src/ov_SC03_023/ov_SC03_023_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_023/nonmatchings/ov_SC03_023_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_023/nonmatchings/ov_SC03_023_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80181748; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80181748 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_023/nonmatchings/ov_SC03_023_after", func_8015D104); diff --git a/src/ov_SC03_024/ov_SC03_024.c b/src/ov_SC03_024/ov_SC03_024.c index cede21bcd0..c12c5abd2a 100644 --- a/src/ov_SC03_024/ov_SC03_024.c +++ b/src/ov_SC03_024/ov_SC03_024.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_024/nonmatchings/ov_SC03_024", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80187248; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80187248); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_024/ov_SC03_024_after.c b/src/ov_SC03_024/ov_SC03_024_after.c index 87b5ae2a02..2f5fc0a5a5 100644 --- a/src/ov_SC03_024/ov_SC03_024_after.c +++ b/src/ov_SC03_024/ov_SC03_024_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_024/nonmatchings/ov_SC03_024_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_024/nonmatchings/ov_SC03_024_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018976C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018976C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_024/nonmatchings/ov_SC03_024_after", func_8015D104); diff --git a/src/ov_SC03_028/ov_SC03_028.c b/src/ov_SC03_028/ov_SC03_028.c index be9527507a..d747d5009a 100644 --- a/src/ov_SC03_028/ov_SC03_028.c +++ b/src/ov_SC03_028/ov_SC03_028.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_028/nonmatchings/ov_SC03_028", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018BD14; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018BD14); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_028/ov_SC03_028_after.c b/src/ov_SC03_028/ov_SC03_028_after.c index ddf755a843..e6ba970f01 100644 --- a/src/ov_SC03_028/ov_SC03_028_after.c +++ b/src/ov_SC03_028/ov_SC03_028_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_028/nonmatchings/ov_SC03_028_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_028/nonmatchings/ov_SC03_028_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018E238; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018E238 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_028/nonmatchings/ov_SC03_028_after", func_8015D104); diff --git a/src/ov_SC03_029/ov_SC03_029.c b/src/ov_SC03_029/ov_SC03_029.c index ea12fd3bff..2950de4fcb 100644 --- a/src/ov_SC03_029/ov_SC03_029.c +++ b/src/ov_SC03_029/ov_SC03_029.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_029/nonmatchings/ov_SC03_029", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80187B4C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80187B4C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_029/ov_SC03_029_after.c b/src/ov_SC03_029/ov_SC03_029_after.c index a69781f4bd..0109e38852 100644 --- a/src/ov_SC03_029/ov_SC03_029_after.c +++ b/src/ov_SC03_029/ov_SC03_029_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_029/nonmatchings/ov_SC03_029_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_029/nonmatchings/ov_SC03_029_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018A070; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018A070 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_029/nonmatchings/ov_SC03_029_after", func_8015D104); diff --git a/src/ov_SC03_030/ov_SC03_030.c b/src/ov_SC03_030/ov_SC03_030.c index bc3ca73bdb..2b1e01fdec 100644 --- a/src/ov_SC03_030/ov_SC03_030.c +++ b/src/ov_SC03_030/ov_SC03_030.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_030/nonmatchings/ov_SC03_030", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80182188; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80182188); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_030/ov_SC03_030_after.c b/src/ov_SC03_030/ov_SC03_030_after.c index 886a1a4717..3de9890d72 100644 --- a/src/ov_SC03_030/ov_SC03_030_after.c +++ b/src/ov_SC03_030/ov_SC03_030_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_030/nonmatchings/ov_SC03_030_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_030/nonmatchings/ov_SC03_030_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801846AC; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801846AC | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_030/nonmatchings/ov_SC03_030_after", func_8015D104); diff --git a/src/ov_SC03_031/ov_SC03_031.c b/src/ov_SC03_031/ov_SC03_031.c index cfdee5ddd7..b3aca6c0f1 100644 --- a/src/ov_SC03_031/ov_SC03_031.c +++ b/src/ov_SC03_031/ov_SC03_031.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_031/nonmatchings/ov_SC03_031", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801826A4; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801826A4); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_031/ov_SC03_031_after.c b/src/ov_SC03_031/ov_SC03_031_after.c index c556a1bddd..4fa46057ad 100644 --- a/src/ov_SC03_031/ov_SC03_031_after.c +++ b/src/ov_SC03_031/ov_SC03_031_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_031/nonmatchings/ov_SC03_031_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_031/nonmatchings/ov_SC03_031_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80184BC8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80184BC8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_031/nonmatchings/ov_SC03_031_after", func_8015D104); diff --git a/src/ov_SC03_089/ov_SC03_089.c b/src/ov_SC03_089/ov_SC03_089.c index ab80e3bad7..3650f2637b 100644 --- a/src/ov_SC03_089/ov_SC03_089.c +++ b/src/ov_SC03_089/ov_SC03_089.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_089/nonmatchings/ov_SC03_089", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801899A0; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801899A0); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_089/ov_SC03_089_after.c b/src/ov_SC03_089/ov_SC03_089_after.c index 03718adead..d70100b63e 100644 --- a/src/ov_SC03_089/ov_SC03_089_after.c +++ b/src/ov_SC03_089/ov_SC03_089_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_089/nonmatchings/ov_SC03_089_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_089/nonmatchings/ov_SC03_089_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018BEC4; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018BEC4 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_089/nonmatchings/ov_SC03_089_after", func_8015D104); diff --git a/src/ov_SC03_090/ov_SC03_090.c b/src/ov_SC03_090/ov_SC03_090.c index 7848ed5d95..12283dc879 100644 --- a/src/ov_SC03_090/ov_SC03_090.c +++ b/src/ov_SC03_090/ov_SC03_090.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018BDC4; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018BDC4); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_090/ov_SC03_090_after.c b/src/ov_SC03_090/ov_SC03_090_after.c index c09361a283..c90d31feaa 100644 --- a/src/ov_SC03_090/ov_SC03_090_after.c +++ b/src/ov_SC03_090/ov_SC03_090_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018E2E8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018E2E8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_after", func_8015D104); diff --git a/src/ov_SC03_091/ov_SC03_091.c b/src/ov_SC03_091/ov_SC03_091.c index 29598f52d5..57b59a3e31 100644 --- a/src/ov_SC03_091/ov_SC03_091.c +++ b/src/ov_SC03_091/ov_SC03_091.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018CC6C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018CC6C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_091/ov_SC03_091_after.c b/src/ov_SC03_091/ov_SC03_091_after.c index cde32f0efa..dee0f03a30 100644 --- a/src/ov_SC03_091/ov_SC03_091_after.c +++ b/src/ov_SC03_091/ov_SC03_091_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018F190; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018F190 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091_after", func_8015D104); diff --git a/src/ov_SC03_092/ov_SC03_092.c b/src/ov_SC03_092/ov_SC03_092.c index e5a0f0bedc..7e42db4002 100644 --- a/src/ov_SC03_092/ov_SC03_092.c +++ b/src/ov_SC03_092/ov_SC03_092.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_092/nonmatchings/ov_SC03_092", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018503C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018503C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_092/ov_SC03_092_after.c b/src/ov_SC03_092/ov_SC03_092_after.c index 044ba20c67..75f6336b11 100644 --- a/src/ov_SC03_092/ov_SC03_092_after.c +++ b/src/ov_SC03_092/ov_SC03_092_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_092/nonmatchings/ov_SC03_092_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_092/nonmatchings/ov_SC03_092_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80187560; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80187560 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_092/nonmatchings/ov_SC03_092_after", func_8015D104); diff --git a/src/ov_SC03_093/ov_SC03_093.c b/src/ov_SC03_093/ov_SC03_093.c index 20b76072a5..39212e9e66 100644 --- a/src/ov_SC03_093/ov_SC03_093.c +++ b/src/ov_SC03_093/ov_SC03_093.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_093/nonmatchings/ov_SC03_093", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80186214; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80186214); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_093/ov_SC03_093_after.c b/src/ov_SC03_093/ov_SC03_093_after.c index 004f7f0396..115f8e56fd 100644 --- a/src/ov_SC03_093/ov_SC03_093_after.c +++ b/src/ov_SC03_093/ov_SC03_093_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_093/nonmatchings/ov_SC03_093_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_093/nonmatchings/ov_SC03_093_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80188738; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80188738 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_093/nonmatchings/ov_SC03_093_after", func_8015D104); diff --git a/src/ov_SC03_094/ov_SC03_094.c b/src/ov_SC03_094/ov_SC03_094.c index d27ebf5c7b..195176946a 100644 --- a/src/ov_SC03_094/ov_SC03_094.c +++ b/src/ov_SC03_094/ov_SC03_094.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80187C10; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80187C10); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_094/ov_SC03_094_after.c b/src/ov_SC03_094/ov_SC03_094_after.c index 3539487872..f5f3405ae4 100644 --- a/src/ov_SC03_094/ov_SC03_094_after.c +++ b/src/ov_SC03_094/ov_SC03_094_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018A134; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018A134 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094_after", func_8015D104); diff --git a/src/ov_SC03_095/ov_SC03_095.c b/src/ov_SC03_095/ov_SC03_095.c index e724a796b6..f88b68742e 100644 --- a/src/ov_SC03_095/ov_SC03_095.c +++ b/src/ov_SC03_095/ov_SC03_095.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_095/nonmatchings/ov_SC03_095", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80181270; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80181270); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_095/ov_SC03_095_after.c b/src/ov_SC03_095/ov_SC03_095_after.c index 426db8d2b3..d029955dd3 100644 --- a/src/ov_SC03_095/ov_SC03_095_after.c +++ b/src/ov_SC03_095/ov_SC03_095_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_095/nonmatchings/ov_SC03_095_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_095/nonmatchings/ov_SC03_095_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80183794; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80183794 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_095/nonmatchings/ov_SC03_095_after", func_8015D104); diff --git a/src/ov_SC03_096/ov_SC03_096.c b/src/ov_SC03_096/ov_SC03_096.c index fb48fdd6f5..60f566b081 100644 --- a/src/ov_SC03_096/ov_SC03_096.c +++ b/src/ov_SC03_096/ov_SC03_096.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_096/nonmatchings/ov_SC03_096", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80180DF0; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80180DF0); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_096/ov_SC03_096_after.c b/src/ov_SC03_096/ov_SC03_096_after.c index bb7eb9fd2a..2735c72309 100644 --- a/src/ov_SC03_096/ov_SC03_096_after.c +++ b/src/ov_SC03_096/ov_SC03_096_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_096/nonmatchings/ov_SC03_096_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_096/nonmatchings/ov_SC03_096_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80183314; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80183314 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_096/nonmatchings/ov_SC03_096_after", func_8015D104); diff --git a/src/ov_SC03_097/ov_SC03_097.c b/src/ov_SC03_097/ov_SC03_097.c index 8bd5241137..e0cf6ea60f 100644 --- a/src/ov_SC03_097/ov_SC03_097.c +++ b/src/ov_SC03_097/ov_SC03_097.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_097/nonmatchings/ov_SC03_097", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801861D0; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801861D0); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_097/ov_SC03_097_after.c b/src/ov_SC03_097/ov_SC03_097_after.c index 1e45e188b3..d893cf04ed 100644 --- a/src/ov_SC03_097/ov_SC03_097_after.c +++ b/src/ov_SC03_097/ov_SC03_097_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_097/nonmatchings/ov_SC03_097_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_097/nonmatchings/ov_SC03_097_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801886F4; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801886F4 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_097/nonmatchings/ov_SC03_097_after", func_8015D104); diff --git a/src/ov_SC03_098/ov_SC03_098.c b/src/ov_SC03_098/ov_SC03_098.c index 8c97c8ca96..6146d7dd0f 100644 --- a/src/ov_SC03_098/ov_SC03_098.c +++ b/src/ov_SC03_098/ov_SC03_098.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018565C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018565C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_098/ov_SC03_098_after.c b/src/ov_SC03_098/ov_SC03_098_after.c index f870486353..93164b1fbd 100644 --- a/src/ov_SC03_098/ov_SC03_098_after.c +++ b/src/ov_SC03_098/ov_SC03_098_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80187B80; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80187B80 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098_after", func_8015D104); diff --git a/src/ov_SC03_099/ov_SC03_099.c b/src/ov_SC03_099/ov_SC03_099.c index a90bfe5a45..7f5577b322 100644 --- a/src/ov_SC03_099/ov_SC03_099.c +++ b/src/ov_SC03_099/ov_SC03_099.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_099/nonmatchings/ov_SC03_099", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018375C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018375C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_099/ov_SC03_099_after.c b/src/ov_SC03_099/ov_SC03_099_after.c index 6095cb579d..5135289866 100644 --- a/src/ov_SC03_099/ov_SC03_099_after.c +++ b/src/ov_SC03_099/ov_SC03_099_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_099/nonmatchings/ov_SC03_099_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_099/nonmatchings/ov_SC03_099_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80185C80; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80185C80 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_099/nonmatchings/ov_SC03_099_after", func_8015D104); diff --git a/src/ov_SC03_100/ov_SC03_100.c b/src/ov_SC03_100/ov_SC03_100.c index 0d1c81c4eb..fc82b13669 100644 --- a/src/ov_SC03_100/ov_SC03_100.c +++ b/src/ov_SC03_100/ov_SC03_100.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_100/nonmatchings/ov_SC03_100", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80184C28; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80184C28); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_100/ov_SC03_100_after.c b/src/ov_SC03_100/ov_SC03_100_after.c index 903100ae50..76cbc5b62c 100644 --- a/src/ov_SC03_100/ov_SC03_100_after.c +++ b/src/ov_SC03_100/ov_SC03_100_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_100/nonmatchings/ov_SC03_100_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_100/nonmatchings/ov_SC03_100_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018714C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018714C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_100/nonmatchings/ov_SC03_100_after", func_8015D104); diff --git a/src/ov_SC03_101/ov_SC03_101.c b/src/ov_SC03_101/ov_SC03_101.c index 92a0b84643..171aedc966 100644 --- a/src/ov_SC03_101/ov_SC03_101.c +++ b/src/ov_SC03_101/ov_SC03_101.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_101/nonmatchings/ov_SC03_101", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80183C04; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80183C04); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_101/ov_SC03_101_after.c b/src/ov_SC03_101/ov_SC03_101_after.c index f4dfb535c1..a2f80abaf8 100644 --- a/src/ov_SC03_101/ov_SC03_101_after.c +++ b/src/ov_SC03_101/ov_SC03_101_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_101/nonmatchings/ov_SC03_101_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_101/nonmatchings/ov_SC03_101_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80186128; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80186128 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_101/nonmatchings/ov_SC03_101_after", func_8015D104); diff --git a/src/ov_SC03_102/ov_SC03_102.c b/src/ov_SC03_102/ov_SC03_102.c index 50ef6a532e..41459d5917 100644 --- a/src/ov_SC03_102/ov_SC03_102.c +++ b/src/ov_SC03_102/ov_SC03_102.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_102/nonmatchings/ov_SC03_102", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801864BC; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801864BC); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_102/ov_SC03_102_after.c b/src/ov_SC03_102/ov_SC03_102_after.c index 44e5eb27bc..3823a9ca32 100644 --- a/src/ov_SC03_102/ov_SC03_102_after.c +++ b/src/ov_SC03_102/ov_SC03_102_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_102/nonmatchings/ov_SC03_102_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_102/nonmatchings/ov_SC03_102_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801889E0; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801889E0 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_102/nonmatchings/ov_SC03_102_after", func_8015D104); diff --git a/src/ov_SC03_103/ov_SC03_103.c b/src/ov_SC03_103/ov_SC03_103.c index 56902b0d82..b6c6e5ec73 100644 --- a/src/ov_SC03_103/ov_SC03_103.c +++ b/src/ov_SC03_103/ov_SC03_103.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_103/nonmatchings/ov_SC03_103", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018446C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018446C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_103/ov_SC03_103_after.c b/src/ov_SC03_103/ov_SC03_103_after.c index 8ec301e812..257d7727dc 100644 --- a/src/ov_SC03_103/ov_SC03_103_after.c +++ b/src/ov_SC03_103/ov_SC03_103_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_103/nonmatchings/ov_SC03_103_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_103/nonmatchings/ov_SC03_103_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80186990; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80186990 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_103/nonmatchings/ov_SC03_103_after", func_8015D104); diff --git a/src/ov_SC03_104/ov_SC03_104.c b/src/ov_SC03_104/ov_SC03_104.c index 736cd4b787..d962284430 100644 --- a/src/ov_SC03_104/ov_SC03_104.c +++ b/src/ov_SC03_104/ov_SC03_104.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_104/nonmatchings/ov_SC03_104", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018AFFC; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018AFFC); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_104/ov_SC03_104_after.c b/src/ov_SC03_104/ov_SC03_104_after.c index 6b021ad7bf..653265d42b 100644 --- a/src/ov_SC03_104/ov_SC03_104_after.c +++ b/src/ov_SC03_104/ov_SC03_104_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_104/nonmatchings/ov_SC03_104_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_104/nonmatchings/ov_SC03_104_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018D520; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018D520 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_104/nonmatchings/ov_SC03_104_after", func_8015D104); diff --git a/src/ov_SC03_105/ov_SC03_105.c b/src/ov_SC03_105/ov_SC03_105.c index 564a23def3..682b0db0a1 100644 --- a/src/ov_SC03_105/ov_SC03_105.c +++ b/src/ov_SC03_105/ov_SC03_105.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_105/nonmatchings/ov_SC03_105", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018A684; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018A684); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_105/ov_SC03_105_after.c b/src/ov_SC03_105/ov_SC03_105_after.c index aa174ecb28..157d448b74 100644 --- a/src/ov_SC03_105/ov_SC03_105_after.c +++ b/src/ov_SC03_105/ov_SC03_105_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_105/nonmatchings/ov_SC03_105_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_105/nonmatchings/ov_SC03_105_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018CBA8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018CBA8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_105/nonmatchings/ov_SC03_105_after", func_8015D104); diff --git a/src/ov_SC03_108/ov_SC03_108.c b/src/ov_SC03_108/ov_SC03_108.c index 5255600e62..ba369990da 100644 --- a/src/ov_SC03_108/ov_SC03_108.c +++ b/src/ov_SC03_108/ov_SC03_108.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_108/nonmatchings/ov_SC03_108", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80180FDC; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80180FDC); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_108/ov_SC03_108_after.c b/src/ov_SC03_108/ov_SC03_108_after.c index cb60dfa64d..c2016f1c8f 100644 --- a/src/ov_SC03_108/ov_SC03_108_after.c +++ b/src/ov_SC03_108/ov_SC03_108_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_108/nonmatchings/ov_SC03_108_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_108/nonmatchings/ov_SC03_108_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80183500; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80183500 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_108/nonmatchings/ov_SC03_108_after", func_8015D104); diff --git a/src/ov_SC03_109/ov_SC03_109.c b/src/ov_SC03_109/ov_SC03_109.c index bbfae1a144..64f783849c 100644 --- a/src/ov_SC03_109/ov_SC03_109.c +++ b/src/ov_SC03_109/ov_SC03_109.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_109/nonmatchings/ov_SC03_109", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017E688; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017E688); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_109/ov_SC03_109_after.c b/src/ov_SC03_109/ov_SC03_109_after.c index 0b32abd593..cb7d4b8d3b 100644 --- a/src/ov_SC03_109/ov_SC03_109_after.c +++ b/src/ov_SC03_109/ov_SC03_109_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_109/nonmatchings/ov_SC03_109_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_109/nonmatchings/ov_SC03_109_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80180BAC; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80180BAC | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_109/nonmatchings/ov_SC03_109_after", func_8015D104); diff --git a/src/ov_SC03_110/ov_SC03_110.c b/src/ov_SC03_110/ov_SC03_110.c index 99fb8d5ce8..0ddc2bff70 100644 --- a/src/ov_SC03_110/ov_SC03_110.c +++ b/src/ov_SC03_110/ov_SC03_110.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_110/nonmatchings/ov_SC03_110", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801820A8; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801820A8); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_110/ov_SC03_110_after.c b/src/ov_SC03_110/ov_SC03_110_after.c index 6007d7e903..bfabda0422 100644 --- a/src/ov_SC03_110/ov_SC03_110_after.c +++ b/src/ov_SC03_110/ov_SC03_110_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_110/nonmatchings/ov_SC03_110_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_110/nonmatchings/ov_SC03_110_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801845CC; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801845CC | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_110/nonmatchings/ov_SC03_110_after", func_8015D104); diff --git a/src/ov_SC03_111/ov_SC03_111.c b/src/ov_SC03_111/ov_SC03_111.c index 58a62508a4..113f06b2fa 100644 --- a/src/ov_SC03_111/ov_SC03_111.c +++ b/src/ov_SC03_111/ov_SC03_111.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_111/nonmatchings/ov_SC03_111", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80184C5C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80184C5C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_111/ov_SC03_111_after.c b/src/ov_SC03_111/ov_SC03_111_after.c index 45cad64c89..c7f29c6ac5 100644 --- a/src/ov_SC03_111/ov_SC03_111_after.c +++ b/src/ov_SC03_111/ov_SC03_111_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_111/nonmatchings/ov_SC03_111_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_111/nonmatchings/ov_SC03_111_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80187180; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80187180 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_111/nonmatchings/ov_SC03_111_after", func_8015D104); diff --git a/src/ov_SC03_112/ov_SC03_112.c b/src/ov_SC03_112/ov_SC03_112.c index ac1e1d78e2..b54bec4c6a 100644 --- a/src/ov_SC03_112/ov_SC03_112.c +++ b/src/ov_SC03_112/ov_SC03_112.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_112/nonmatchings/ov_SC03_112", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80185A64; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80185A64); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_112/ov_SC03_112_after.c b/src/ov_SC03_112/ov_SC03_112_after.c index a054982c6c..067ef0e51e 100644 --- a/src/ov_SC03_112/ov_SC03_112_after.c +++ b/src/ov_SC03_112/ov_SC03_112_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_112/nonmatchings/ov_SC03_112_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_112/nonmatchings/ov_SC03_112_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80187F88; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80187F88 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_112/nonmatchings/ov_SC03_112_after", func_8015D104); diff --git a/src/ov_SC03_113/ov_SC03_113.c b/src/ov_SC03_113/ov_SC03_113.c index 0f4c660095..cbdf546fd9 100644 --- a/src/ov_SC03_113/ov_SC03_113.c +++ b/src/ov_SC03_113/ov_SC03_113.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_113/nonmatchings/ov_SC03_113", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80183114; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80183114); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_113/ov_SC03_113_after.c b/src/ov_SC03_113/ov_SC03_113_after.c index 667a9e2598..ce275c3d31 100644 --- a/src/ov_SC03_113/ov_SC03_113_after.c +++ b/src/ov_SC03_113/ov_SC03_113_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_113/nonmatchings/ov_SC03_113_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_113/nonmatchings/ov_SC03_113_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80185638; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80185638 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_113/nonmatchings/ov_SC03_113_after", func_8015D104); diff --git a/src/ov_SC03_114/ov_SC03_114.c b/src/ov_SC03_114/ov_SC03_114.c index 55c78a01d2..ea7e460fca 100644 --- a/src/ov_SC03_114/ov_SC03_114.c +++ b/src/ov_SC03_114/ov_SC03_114.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_114/nonmatchings/ov_SC03_114", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017ED7C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017ED7C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_114/ov_SC03_114_after.c b/src/ov_SC03_114/ov_SC03_114_after.c index 89c672eccf..c6124aafa3 100644 --- a/src/ov_SC03_114/ov_SC03_114_after.c +++ b/src/ov_SC03_114/ov_SC03_114_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_114/nonmatchings/ov_SC03_114_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_114/nonmatchings/ov_SC03_114_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801812A0; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801812A0 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_114/nonmatchings/ov_SC03_114_after", func_8015D104); diff --git a/src/ov_SC03_115/ov_SC03_115.c b/src/ov_SC03_115/ov_SC03_115.c index 0182a93d86..143639fde3 100644 --- a/src/ov_SC03_115/ov_SC03_115.c +++ b/src/ov_SC03_115/ov_SC03_115.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_115/nonmatchings/ov_SC03_115", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801807E8; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801807E8); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_115/ov_SC03_115_after.c b/src/ov_SC03_115/ov_SC03_115_after.c index 1b89b894b4..309ad89dfe 100644 --- a/src/ov_SC03_115/ov_SC03_115_after.c +++ b/src/ov_SC03_115/ov_SC03_115_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_115/nonmatchings/ov_SC03_115_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_115/nonmatchings/ov_SC03_115_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80182D0C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80182D0C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_115/nonmatchings/ov_SC03_115_after", func_8015D104); diff --git a/src/ov_SC03_116/ov_SC03_116.c b/src/ov_SC03_116/ov_SC03_116.c index d29c65b156..35bee26417 100644 --- a/src/ov_SC03_116/ov_SC03_116.c +++ b/src/ov_SC03_116/ov_SC03_116.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_116/nonmatchings/ov_SC03_116", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80182BEC; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80182BEC); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_116/ov_SC03_116_after.c b/src/ov_SC03_116/ov_SC03_116_after.c index 71f284a8ad..d9d89866d2 100644 --- a/src/ov_SC03_116/ov_SC03_116_after.c +++ b/src/ov_SC03_116/ov_SC03_116_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_116/nonmatchings/ov_SC03_116_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_116/nonmatchings/ov_SC03_116_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80185110; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80185110 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_116/nonmatchings/ov_SC03_116_after", func_8015D104); diff --git a/src/ov_SC03_117/ov_SC03_117.c b/src/ov_SC03_117/ov_SC03_117.c index 83447186f0..1ef58775c3 100644 --- a/src/ov_SC03_117/ov_SC03_117.c +++ b/src/ov_SC03_117/ov_SC03_117.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80184BF8; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80184BF8); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_117/ov_SC03_117_after.c b/src/ov_SC03_117/ov_SC03_117_after.c index 0651fe8397..7c15315988 100644 --- a/src/ov_SC03_117/ov_SC03_117_after.c +++ b/src/ov_SC03_117/ov_SC03_117_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018711C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018711C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_after", func_8015D104); diff --git a/src/ov_SC03_118/ov_SC03_118.c b/src/ov_SC03_118/ov_SC03_118.c index 961ab80b38..dced79ec32 100644 --- a/src/ov_SC03_118/ov_SC03_118.c +++ b/src/ov_SC03_118/ov_SC03_118.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_118/nonmatchings/ov_SC03_118", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80189CA4; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80189CA4); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_118/ov_SC03_118_after.c b/src/ov_SC03_118/ov_SC03_118_after.c index 90630cbea3..4ca99511f6 100644 --- a/src/ov_SC03_118/ov_SC03_118_after.c +++ b/src/ov_SC03_118/ov_SC03_118_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_118/nonmatchings/ov_SC03_118_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_118/nonmatchings/ov_SC03_118_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018C1C8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018C1C8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_118/nonmatchings/ov_SC03_118_after", func_8015D104); diff --git a/src/ov_SC03_119/ov_SC03_119.c b/src/ov_SC03_119/ov_SC03_119.c index 7d5c8462fe..5fa1594c5e 100644 --- a/src/ov_SC03_119/ov_SC03_119.c +++ b/src/ov_SC03_119/ov_SC03_119.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80189CA4; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80189CA4); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_119/ov_SC03_119_after.c b/src/ov_SC03_119/ov_SC03_119_after.c index 04bc3b0601..04e9293790 100644 --- a/src/ov_SC03_119/ov_SC03_119_after.c +++ b/src/ov_SC03_119/ov_SC03_119_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018C1C8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018C1C8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_after", func_8015D104); diff --git a/src/ov_SC03_121/ov_SC03_121.c b/src/ov_SC03_121/ov_SC03_121.c index db919cf05c..feffdae480 100644 --- a/src/ov_SC03_121/ov_SC03_121.c +++ b/src/ov_SC03_121/ov_SC03_121.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_121/nonmatchings/ov_SC03_121", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801824C0; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801824C0); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_121/ov_SC03_121_after.c b/src/ov_SC03_121/ov_SC03_121_after.c index 1be23c6973..9d7aa59972 100644 --- a/src/ov_SC03_121/ov_SC03_121_after.c +++ b/src/ov_SC03_121/ov_SC03_121_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_121/nonmatchings/ov_SC03_121_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_121/nonmatchings/ov_SC03_121_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801849E4; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801849E4 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_121/nonmatchings/ov_SC03_121_after", func_8015D104); diff --git a/src/ov_SC03_124/ov_SC03_124.c b/src/ov_SC03_124/ov_SC03_124.c index aeceec4131..4768799e34 100644 --- a/src/ov_SC03_124/ov_SC03_124.c +++ b/src/ov_SC03_124/ov_SC03_124.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_124/nonmatchings/ov_SC03_124", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018AEEC; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018AEEC); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_124/ov_SC03_124_after.c b/src/ov_SC03_124/ov_SC03_124_after.c index 5df92e6317..ae7ac18745 100644 --- a/src/ov_SC03_124/ov_SC03_124_after.c +++ b/src/ov_SC03_124/ov_SC03_124_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_124/nonmatchings/ov_SC03_124_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_124/nonmatchings/ov_SC03_124_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018D410; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018D410 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_124/nonmatchings/ov_SC03_124_after", func_8015D104); diff --git a/src/ov_SC03_125/ov_SC03_125.c b/src/ov_SC03_125/ov_SC03_125.c index ffbf9144bf..b1a5245b04 100644 --- a/src/ov_SC03_125/ov_SC03_125.c +++ b/src/ov_SC03_125/ov_SC03_125.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_125/nonmatchings/ov_SC03_125", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801840BC; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801840BC); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_125/ov_SC03_125_after.c b/src/ov_SC03_125/ov_SC03_125_after.c index 70cfd324fe..59b50eab7f 100644 --- a/src/ov_SC03_125/ov_SC03_125_after.c +++ b/src/ov_SC03_125/ov_SC03_125_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_125/nonmatchings/ov_SC03_125_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_125/nonmatchings/ov_SC03_125_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801865E0; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801865E0 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_125/nonmatchings/ov_SC03_125_after", func_8015D104); diff --git a/src/ov_SC03_126/ov_SC03_126.c b/src/ov_SC03_126/ov_SC03_126.c index bd47e8f9b8..96c42cd127 100644 --- a/src/ov_SC03_126/ov_SC03_126.c +++ b/src/ov_SC03_126/ov_SC03_126.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_126/nonmatchings/ov_SC03_126", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017F5B4; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017F5B4); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC03_126/ov_SC03_126_after.c b/src/ov_SC03_126/ov_SC03_126_after.c index ad4090f384..414b59224c 100644 --- a/src/ov_SC03_126/ov_SC03_126_after.c +++ b/src/ov_SC03_126/ov_SC03_126_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC03_126/nonmatchings/ov_SC03_126_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_126/nonmatchings/ov_SC03_126_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80181AD8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80181AD8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC03_126/nonmatchings/ov_SC03_126_after", func_8015D104); diff --git a/src/ov_SC04_000/ov_SC04_000.c b/src/ov_SC04_000/ov_SC04_000.c index 772ddee2f9..834aa53caa 100644 --- a/src/ov_SC04_000/ov_SC04_000.c +++ b/src/ov_SC04_000/ov_SC04_000.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_000/nonmatchings/ov_SC04_000", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801835C0; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801835C0); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_000/ov_SC04_000_after.c b/src/ov_SC04_000/ov_SC04_000_after.c index 93fa6c353f..d62e8562a2 100644 --- a/src/ov_SC04_000/ov_SC04_000_after.c +++ b/src/ov_SC04_000/ov_SC04_000_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_000/nonmatchings/ov_SC04_000_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_000/nonmatchings/ov_SC04_000_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80185AE4; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80185AE4 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_000/nonmatchings/ov_SC04_000_after", func_8015D104); diff --git a/src/ov_SC04_002/ov_SC04_002.c b/src/ov_SC04_002/ov_SC04_002.c index b5ecc1fd9b..ed4ab5101d 100644 --- a/src/ov_SC04_002/ov_SC04_002.c +++ b/src/ov_SC04_002/ov_SC04_002.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_002/nonmatchings/ov_SC04_002", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018872C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018872C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_002/ov_SC04_002_after.c b/src/ov_SC04_002/ov_SC04_002_after.c index a1ed309df0..67f1cede07 100644 --- a/src/ov_SC04_002/ov_SC04_002_after.c +++ b/src/ov_SC04_002/ov_SC04_002_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_002/nonmatchings/ov_SC04_002_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_002/nonmatchings/ov_SC04_002_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018AC50; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018AC50 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_002/nonmatchings/ov_SC04_002_after", func_8015D104); diff --git a/src/ov_SC04_003/ov_SC04_003.c b/src/ov_SC04_003/ov_SC04_003.c index ff83c27ba8..08854763f7 100644 --- a/src/ov_SC04_003/ov_SC04_003.c +++ b/src/ov_SC04_003/ov_SC04_003.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_003/nonmatchings/ov_SC04_003", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801824C8; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801824C8); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_003/ov_SC04_003_after.c b/src/ov_SC04_003/ov_SC04_003_after.c index e51fdd40ef..a214973e20 100644 --- a/src/ov_SC04_003/ov_SC04_003_after.c +++ b/src/ov_SC04_003/ov_SC04_003_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_003/nonmatchings/ov_SC04_003_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_003/nonmatchings/ov_SC04_003_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801849EC; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801849EC | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_003/nonmatchings/ov_SC04_003_after", func_8015D104); diff --git a/src/ov_SC04_004/ov_SC04_004.c b/src/ov_SC04_004/ov_SC04_004.c index 0fc4f88816..da97f9a806 100644 --- a/src/ov_SC04_004/ov_SC04_004.c +++ b/src/ov_SC04_004/ov_SC04_004.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_004/nonmatchings/ov_SC04_004", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801849FC; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801849FC); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_004/ov_SC04_004_after.c b/src/ov_SC04_004/ov_SC04_004_after.c index ce7811d6b3..dedf5e8133 100644 --- a/src/ov_SC04_004/ov_SC04_004_after.c +++ b/src/ov_SC04_004/ov_SC04_004_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_004/nonmatchings/ov_SC04_004_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_004/nonmatchings/ov_SC04_004_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80186F20; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80186F20 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_004/nonmatchings/ov_SC04_004_after", func_8015D104); diff --git a/src/ov_SC04_005/ov_SC04_005.c b/src/ov_SC04_005/ov_SC04_005.c index 3eb0e4a16a..01038985d5 100644 --- a/src/ov_SC04_005/ov_SC04_005.c +++ b/src/ov_SC04_005/ov_SC04_005.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_005/nonmatchings/ov_SC04_005", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80187E30; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80187E30); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_005/ov_SC04_005_after.c b/src/ov_SC04_005/ov_SC04_005_after.c index 848917929c..e9c3828c85 100644 --- a/src/ov_SC04_005/ov_SC04_005_after.c +++ b/src/ov_SC04_005/ov_SC04_005_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_005/nonmatchings/ov_SC04_005_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_005/nonmatchings/ov_SC04_005_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018A354; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018A354 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_005/nonmatchings/ov_SC04_005_after", func_8015D104); diff --git a/src/ov_SC04_006/ov_SC04_006.c b/src/ov_SC04_006/ov_SC04_006.c index af1167390a..b41caea259 100644 --- a/src/ov_SC04_006/ov_SC04_006.c +++ b/src/ov_SC04_006/ov_SC04_006.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_006/nonmatchings/ov_SC04_006", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017FF10; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017FF10); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_006/ov_SC04_006_after.c b/src/ov_SC04_006/ov_SC04_006_after.c index dee9300495..5889923dcc 100644 --- a/src/ov_SC04_006/ov_SC04_006_after.c +++ b/src/ov_SC04_006/ov_SC04_006_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_006/nonmatchings/ov_SC04_006_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_006/nonmatchings/ov_SC04_006_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80182434; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80182434 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_006/nonmatchings/ov_SC04_006_after", func_8015D104); diff --git a/src/ov_SC04_007/ov_SC04_007.c b/src/ov_SC04_007/ov_SC04_007.c index 1109c450b6..11fe1eba99 100644 --- a/src/ov_SC04_007/ov_SC04_007.c +++ b/src/ov_SC04_007/ov_SC04_007.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_007/nonmatchings/ov_SC04_007", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80185EC8; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80185EC8); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_007/ov_SC04_007_after.c b/src/ov_SC04_007/ov_SC04_007_after.c index 7f29ccda75..d047eba6db 100644 --- a/src/ov_SC04_007/ov_SC04_007_after.c +++ b/src/ov_SC04_007/ov_SC04_007_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_007/nonmatchings/ov_SC04_007_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_007/nonmatchings/ov_SC04_007_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801883EC; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801883EC | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_007/nonmatchings/ov_SC04_007_after", func_8015D104); diff --git a/src/ov_SC04_008/ov_SC04_008.c b/src/ov_SC04_008/ov_SC04_008.c index 2bfa01f480..149bf722cf 100644 --- a/src/ov_SC04_008/ov_SC04_008.c +++ b/src/ov_SC04_008/ov_SC04_008.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_008/nonmatchings/ov_SC04_008", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017EE00; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017EE00); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_008/ov_SC04_008_after.c b/src/ov_SC04_008/ov_SC04_008_after.c index 01d803ffbd..36d4533bdb 100644 --- a/src/ov_SC04_008/ov_SC04_008_after.c +++ b/src/ov_SC04_008/ov_SC04_008_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_008/nonmatchings/ov_SC04_008_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_008/nonmatchings/ov_SC04_008_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80181324; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80181324 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_008/nonmatchings/ov_SC04_008_after", func_8015D104); diff --git a/src/ov_SC04_009/ov_SC04_009.c b/src/ov_SC04_009/ov_SC04_009.c index 329f865cbd..50d75ce081 100644 --- a/src/ov_SC04_009/ov_SC04_009.c +++ b/src/ov_SC04_009/ov_SC04_009.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_009/nonmatchings/ov_SC04_009", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017EE2C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017EE2C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_009/ov_SC04_009_after.c b/src/ov_SC04_009/ov_SC04_009_after.c index 92f41d4bba..3c9eca1633 100644 --- a/src/ov_SC04_009/ov_SC04_009_after.c +++ b/src/ov_SC04_009/ov_SC04_009_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_009/nonmatchings/ov_SC04_009_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_009/nonmatchings/ov_SC04_009_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80181350; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80181350 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_009/nonmatchings/ov_SC04_009_after", func_8015D104); diff --git a/src/ov_SC04_010/ov_SC04_010.c b/src/ov_SC04_010/ov_SC04_010.c index 5d34becb6d..47064a3407 100644 --- a/src/ov_SC04_010/ov_SC04_010.c +++ b/src/ov_SC04_010/ov_SC04_010.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_010/nonmatchings/ov_SC04_010", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017E4D8; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017E4D8); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_010/ov_SC04_010_after.c b/src/ov_SC04_010/ov_SC04_010_after.c index f013a9c284..230d13b554 100644 --- a/src/ov_SC04_010/ov_SC04_010_after.c +++ b/src/ov_SC04_010/ov_SC04_010_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_010/nonmatchings/ov_SC04_010_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_010/nonmatchings/ov_SC04_010_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801809FC; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801809FC | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_010/nonmatchings/ov_SC04_010_after", func_8015D104); diff --git a/src/ov_SC04_011/ov_SC04_011.c b/src/ov_SC04_011/ov_SC04_011.c index 20f9b61328..647d7ed92e 100644 --- a/src/ov_SC04_011/ov_SC04_011.c +++ b/src/ov_SC04_011/ov_SC04_011.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80190768; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80190768); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_011/ov_SC04_011_after.c b/src/ov_SC04_011/ov_SC04_011_after.c index 2930c70400..ec1c2a96a3 100644 --- a/src/ov_SC04_011/ov_SC04_011_after.c +++ b/src/ov_SC04_011/ov_SC04_011_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80192C8C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80192C8C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_after", func_8015D104); diff --git a/src/ov_SC04_012/ov_SC04_012.c b/src/ov_SC04_012/ov_SC04_012.c index 216f567408..5d03af49ee 100644 --- a/src/ov_SC04_012/ov_SC04_012.c +++ b/src/ov_SC04_012/ov_SC04_012.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_012/nonmatchings/ov_SC04_012", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017E93C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017E93C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_012/ov_SC04_012_after.c b/src/ov_SC04_012/ov_SC04_012_after.c index 3b86789b4e..be059a3989 100644 --- a/src/ov_SC04_012/ov_SC04_012_after.c +++ b/src/ov_SC04_012/ov_SC04_012_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_012/nonmatchings/ov_SC04_012_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_012/nonmatchings/ov_SC04_012_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80180E60; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80180E60 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_012/nonmatchings/ov_SC04_012_after", func_8015D104); diff --git a/src/ov_SC04_015/ov_SC04_015.c b/src/ov_SC04_015/ov_SC04_015.c index d844c36b56..d74e02de41 100644 --- a/src/ov_SC04_015/ov_SC04_015.c +++ b/src/ov_SC04_015/ov_SC04_015.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_015/nonmatchings/ov_SC04_015", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80184874; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80184874); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_015/ov_SC04_015_after.c b/src/ov_SC04_015/ov_SC04_015_after.c index adea90dee5..a8ee2f2b7b 100644 --- a/src/ov_SC04_015/ov_SC04_015_after.c +++ b/src/ov_SC04_015/ov_SC04_015_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_015/nonmatchings/ov_SC04_015_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_015/nonmatchings/ov_SC04_015_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80186D98; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80186D98 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_015/nonmatchings/ov_SC04_015_after", func_8015D104); diff --git a/src/ov_SC04_016/ov_SC04_016.c b/src/ov_SC04_016/ov_SC04_016.c index 5a69f916ce..8642780cb5 100644 --- a/src/ov_SC04_016/ov_SC04_016.c +++ b/src/ov_SC04_016/ov_SC04_016.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_016/nonmatchings/ov_SC04_016", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80180338; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80180338); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_016/ov_SC04_016_after.c b/src/ov_SC04_016/ov_SC04_016_after.c index b54ee78cf7..11fc656414 100644 --- a/src/ov_SC04_016/ov_SC04_016_after.c +++ b/src/ov_SC04_016/ov_SC04_016_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_016/nonmatchings/ov_SC04_016_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_016/nonmatchings/ov_SC04_016_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018285C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018285C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_016/nonmatchings/ov_SC04_016_after", func_8015D104); diff --git a/src/ov_SC04_018/ov_SC04_018.c b/src/ov_SC04_018/ov_SC04_018.c index e3ca0bed28..aa7140324e 100644 --- a/src/ov_SC04_018/ov_SC04_018.c +++ b/src/ov_SC04_018/ov_SC04_018.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018D550; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018D550); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_018/ov_SC04_018_after.c b/src/ov_SC04_018/ov_SC04_018_after.c index f78b699d63..8cb85602f9 100644 --- a/src/ov_SC04_018/ov_SC04_018_after.c +++ b/src/ov_SC04_018/ov_SC04_018_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018FA74; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018FA74 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_after", func_8015D104); diff --git a/src/ov_SC04_019/ov_SC04_019.c b/src/ov_SC04_019/ov_SC04_019.c index f536a4df03..f99416dec8 100644 --- a/src/ov_SC04_019/ov_SC04_019.c +++ b/src/ov_SC04_019/ov_SC04_019.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_019/nonmatchings/ov_SC04_019", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018D550; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018D550); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_019/ov_SC04_019_after.c b/src/ov_SC04_019/ov_SC04_019_after.c index 764c4f1554..c1655f0b13 100644 --- a/src/ov_SC04_019/ov_SC04_019_after.c +++ b/src/ov_SC04_019/ov_SC04_019_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_019/nonmatchings/ov_SC04_019_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_019/nonmatchings/ov_SC04_019_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018FA74; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018FA74 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_019/nonmatchings/ov_SC04_019_after", func_8015D104); diff --git a/src/ov_SC04_020/ov_SC04_020.c b/src/ov_SC04_020/ov_SC04_020.c index 30ac1959f1..9672172641 100644 --- a/src/ov_SC04_020/ov_SC04_020.c +++ b/src/ov_SC04_020/ov_SC04_020.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_020/nonmatchings/ov_SC04_020", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80183688; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80183688); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_020/ov_SC04_020_after.c b/src/ov_SC04_020/ov_SC04_020_after.c index de8f1c85bc..e61c01e5b2 100644 --- a/src/ov_SC04_020/ov_SC04_020_after.c +++ b/src/ov_SC04_020/ov_SC04_020_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_020/nonmatchings/ov_SC04_020_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_020/nonmatchings/ov_SC04_020_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80185BAC; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80185BAC | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_020/nonmatchings/ov_SC04_020_after", func_8015D104); diff --git a/src/ov_SC04_021/ov_SC04_021.c b/src/ov_SC04_021/ov_SC04_021.c index ecde2ca671..2d6df4520f 100644 --- a/src/ov_SC04_021/ov_SC04_021.c +++ b/src/ov_SC04_021/ov_SC04_021.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_021/nonmatchings/ov_SC04_021", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017F5B4; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017F5B4); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC04_021/ov_SC04_021_after.c b/src/ov_SC04_021/ov_SC04_021_after.c index 356463545c..fb1012b4e4 100644 --- a/src/ov_SC04_021/ov_SC04_021_after.c +++ b/src/ov_SC04_021/ov_SC04_021_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC04_021/nonmatchings/ov_SC04_021_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_021/nonmatchings/ov_SC04_021_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80181AD8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80181AD8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC04_021/nonmatchings/ov_SC04_021_after", func_8015D104); diff --git a/src/ov_SC05_000/ov_SC05_000.c b/src/ov_SC05_000/ov_SC05_000.c index 32ecad9155..9c00d10f71 100644 --- a/src/ov_SC05_000/ov_SC05_000.c +++ b/src/ov_SC05_000/ov_SC05_000.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_000/nonmatchings/ov_SC05_000", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017E5C8; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017E5C8); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC05_000/ov_SC05_000_after.c b/src/ov_SC05_000/ov_SC05_000_after.c index ca10aac0ab..f810c57c76 100644 --- a/src/ov_SC05_000/ov_SC05_000_after.c +++ b/src/ov_SC05_000/ov_SC05_000_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC05_000/nonmatchings/ov_SC05_000_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_000/nonmatchings/ov_SC05_000_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80180AEC; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80180AEC | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC05_000/nonmatchings/ov_SC05_000_after", func_8015D104); diff --git a/src/ov_SC05_001/ov_SC05_001.c b/src/ov_SC05_001/ov_SC05_001.c index 6022b0e019..1a349181dc 100644 --- a/src/ov_SC05_001/ov_SC05_001.c +++ b/src/ov_SC05_001/ov_SC05_001.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_001/nonmatchings/ov_SC05_001", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80185DA4; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80185DA4); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC05_001/ov_SC05_001_after.c b/src/ov_SC05_001/ov_SC05_001_after.c index f2348ba023..5e686422ad 100644 --- a/src/ov_SC05_001/ov_SC05_001_after.c +++ b/src/ov_SC05_001/ov_SC05_001_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC05_001/nonmatchings/ov_SC05_001_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_001/nonmatchings/ov_SC05_001_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801882C8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801882C8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC05_001/nonmatchings/ov_SC05_001_after", func_8015D104); diff --git a/src/ov_SC05_002/ov_SC05_002.c b/src/ov_SC05_002/ov_SC05_002.c index ffbcd9cc3a..88291a5c28 100644 --- a/src/ov_SC05_002/ov_SC05_002.c +++ b/src/ov_SC05_002/ov_SC05_002.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_002/nonmatchings/ov_SC05_002", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80180564; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80180564); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC05_002/ov_SC05_002_after.c b/src/ov_SC05_002/ov_SC05_002_after.c index a869c92096..eafbfbbd4f 100644 --- a/src/ov_SC05_002/ov_SC05_002_after.c +++ b/src/ov_SC05_002/ov_SC05_002_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC05_002/nonmatchings/ov_SC05_002_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_002/nonmatchings/ov_SC05_002_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80182A88; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80182A88 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC05_002/nonmatchings/ov_SC05_002_after", func_8015D104); diff --git a/src/ov_SC05_003/ov_SC05_003.c b/src/ov_SC05_003/ov_SC05_003.c index 5453b37ba9..55dc7b661d 100644 --- a/src/ov_SC05_003/ov_SC05_003.c +++ b/src/ov_SC05_003/ov_SC05_003.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_003/nonmatchings/ov_SC05_003", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018289C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018289C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC05_003/ov_SC05_003_after.c b/src/ov_SC05_003/ov_SC05_003_after.c index a2e540cade..cc717994e7 100644 --- a/src/ov_SC05_003/ov_SC05_003_after.c +++ b/src/ov_SC05_003/ov_SC05_003_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC05_003/nonmatchings/ov_SC05_003_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_003/nonmatchings/ov_SC05_003_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80184DC0; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80184DC0 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC05_003/nonmatchings/ov_SC05_003_after", func_8015D104); diff --git a/src/ov_SC05_004/ov_SC05_004.c b/src/ov_SC05_004/ov_SC05_004.c index 97b3746032..6653504dba 100644 --- a/src/ov_SC05_004/ov_SC05_004.c +++ b/src/ov_SC05_004/ov_SC05_004.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801819A8; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801819A8); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC05_004/ov_SC05_004_after.c b/src/ov_SC05_004/ov_SC05_004_after.c index c48e1b35ab..5ac5e98956 100644 --- a/src/ov_SC05_004/ov_SC05_004_after.c +++ b/src/ov_SC05_004/ov_SC05_004_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80183ECC; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80183ECC | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_after", func_8015D104); diff --git a/src/ov_SC05_005/ov_SC05_005.c b/src/ov_SC05_005/ov_SC05_005.c index 92e50ac67e..0a58ad5c44 100644 --- a/src/ov_SC05_005/ov_SC05_005.c +++ b/src/ov_SC05_005/ov_SC05_005.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_005/nonmatchings/ov_SC05_005", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018277C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018277C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC05_005/ov_SC05_005_after.c b/src/ov_SC05_005/ov_SC05_005_after.c index 016ca16222..525531ad29 100644 --- a/src/ov_SC05_005/ov_SC05_005_after.c +++ b/src/ov_SC05_005/ov_SC05_005_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC05_005/nonmatchings/ov_SC05_005_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_005/nonmatchings/ov_SC05_005_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80184CA0; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80184CA0 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC05_005/nonmatchings/ov_SC05_005_after", func_8015D104); diff --git a/src/ov_SC05_006/ov_SC05_006.c b/src/ov_SC05_006/ov_SC05_006.c index 4f5f8bc1d0..0326c16517 100644 --- a/src/ov_SC05_006/ov_SC05_006.c +++ b/src/ov_SC05_006/ov_SC05_006.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_006/nonmatchings/ov_SC05_006", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017F79C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017F79C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC05_006/ov_SC05_006_after.c b/src/ov_SC05_006/ov_SC05_006_after.c index bce134c6bd..36c6b83534 100644 --- a/src/ov_SC05_006/ov_SC05_006_after.c +++ b/src/ov_SC05_006/ov_SC05_006_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC05_006/nonmatchings/ov_SC05_006_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_006/nonmatchings/ov_SC05_006_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80181CC0; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80181CC0 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC05_006/nonmatchings/ov_SC05_006_after", func_8015D104); diff --git a/src/ov_SC05_007/ov_SC05_007.c b/src/ov_SC05_007/ov_SC05_007.c index 8f4dadf10d..1494755756 100644 --- a/src/ov_SC05_007/ov_SC05_007.c +++ b/src/ov_SC05_007/ov_SC05_007.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_007/nonmatchings/ov_SC05_007", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80180D98; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80180D98); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC05_007/ov_SC05_007_after.c b/src/ov_SC05_007/ov_SC05_007_after.c index 6d98d98f65..b009d577df 100644 --- a/src/ov_SC05_007/ov_SC05_007_after.c +++ b/src/ov_SC05_007/ov_SC05_007_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC05_007/nonmatchings/ov_SC05_007_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_007/nonmatchings/ov_SC05_007_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801832BC; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801832BC | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC05_007/nonmatchings/ov_SC05_007_after", func_8015D104); diff --git a/src/ov_SC05_008/ov_SC05_008.c b/src/ov_SC05_008/ov_SC05_008.c index 3dcadb4a2b..3f1903f240 100644 --- a/src/ov_SC05_008/ov_SC05_008.c +++ b/src/ov_SC05_008/ov_SC05_008.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_008/nonmatchings/ov_SC05_008", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80182CF0; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80182CF0); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC05_008/ov_SC05_008_after.c b/src/ov_SC05_008/ov_SC05_008_after.c index c2ff480f19..e8bbd07179 100644 --- a/src/ov_SC05_008/ov_SC05_008_after.c +++ b/src/ov_SC05_008/ov_SC05_008_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC05_008/nonmatchings/ov_SC05_008_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_008/nonmatchings/ov_SC05_008_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80185214; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80185214 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC05_008/nonmatchings/ov_SC05_008_after", func_8015D104); diff --git a/src/ov_SC05_009/ov_SC05_009.c b/src/ov_SC05_009/ov_SC05_009.c index 9e50f67eae..06cc0d59ac 100644 --- a/src/ov_SC05_009/ov_SC05_009.c +++ b/src/ov_SC05_009/ov_SC05_009.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_009/nonmatchings/ov_SC05_009", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017EE00; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017EE00); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC05_009/ov_SC05_009_after.c b/src/ov_SC05_009/ov_SC05_009_after.c index 52cbf7a72a..274ce68093 100644 --- a/src/ov_SC05_009/ov_SC05_009_after.c +++ b/src/ov_SC05_009/ov_SC05_009_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC05_009/nonmatchings/ov_SC05_009_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_009/nonmatchings/ov_SC05_009_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80181324; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80181324 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC05_009/nonmatchings/ov_SC05_009_after", func_8015D104); diff --git a/src/ov_SC05_010/ov_SC05_010.c b/src/ov_SC05_010/ov_SC05_010.c index 2b1da83ce3..bf4e73ac89 100644 --- a/src/ov_SC05_010/ov_SC05_010.c +++ b/src/ov_SC05_010/ov_SC05_010.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_010/nonmatchings/ov_SC05_010", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80188CDC; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80188CDC); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC05_010/ov_SC05_010_after.c b/src/ov_SC05_010/ov_SC05_010_after.c index f560595424..e87a139261 100644 --- a/src/ov_SC05_010/ov_SC05_010_after.c +++ b/src/ov_SC05_010/ov_SC05_010_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC05_010/nonmatchings/ov_SC05_010_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_010/nonmatchings/ov_SC05_010_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018B200; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018B200 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC05_010/nonmatchings/ov_SC05_010_after", func_8015D104); diff --git a/src/ov_SC05_011/ov_SC05_011.c b/src/ov_SC05_011/ov_SC05_011.c index e14053dca4..a8d5a9db75 100644 --- a/src/ov_SC05_011/ov_SC05_011.c +++ b/src/ov_SC05_011/ov_SC05_011.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_011/nonmatchings/ov_SC05_011", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017E054; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017E054); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC05_011/ov_SC05_011_after.c b/src/ov_SC05_011/ov_SC05_011_after.c index f504b19386..d5e869d039 100644 --- a/src/ov_SC05_011/ov_SC05_011_after.c +++ b/src/ov_SC05_011/ov_SC05_011_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC05_011/nonmatchings/ov_SC05_011_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_011/nonmatchings/ov_SC05_011_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80180578; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80180578 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC05_011/nonmatchings/ov_SC05_011_after", func_8015D104); diff --git a/src/ov_SC05_017/ov_SC05_017.c b/src/ov_SC05_017/ov_SC05_017.c index d32362f34c..b64f21d439 100644 --- a/src/ov_SC05_017/ov_SC05_017.c +++ b/src/ov_SC05_017/ov_SC05_017.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_017/nonmatchings/ov_SC05_017", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018D514; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018D514); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC05_017/ov_SC05_017_after.c b/src/ov_SC05_017/ov_SC05_017_after.c index 9739830c49..25dc621dc8 100644 --- a/src/ov_SC05_017/ov_SC05_017_after.c +++ b/src/ov_SC05_017/ov_SC05_017_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC05_017/nonmatchings/ov_SC05_017_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_017/nonmatchings/ov_SC05_017_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018FA38; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018FA38 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC05_017/nonmatchings/ov_SC05_017_after", func_8015D104); diff --git a/src/ov_SC05_018/ov_SC05_018.c b/src/ov_SC05_018/ov_SC05_018.c index 763aea9957..0eb3c64cb8 100644 --- a/src/ov_SC05_018/ov_SC05_018.c +++ b/src/ov_SC05_018/ov_SC05_018.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_018/nonmatchings/ov_SC05_018", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80186C70; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80186C70); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC05_018/ov_SC05_018_after.c b/src/ov_SC05_018/ov_SC05_018_after.c index c5135ee49c..ee7ea477dc 100644 --- a/src/ov_SC05_018/ov_SC05_018_after.c +++ b/src/ov_SC05_018/ov_SC05_018_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC05_018/nonmatchings/ov_SC05_018_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_018/nonmatchings/ov_SC05_018_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80189194; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80189194 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC05_018/nonmatchings/ov_SC05_018_after", func_8015D104); diff --git a/src/ov_SC05_019/ov_SC05_019.c b/src/ov_SC05_019/ov_SC05_019.c index 24affef578..ae6ae8e94b 100644 --- a/src/ov_SC05_019/ov_SC05_019.c +++ b/src/ov_SC05_019/ov_SC05_019.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_019/nonmatchings/ov_SC05_019", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017F5B4; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017F5B4); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC05_019/ov_SC05_019_after.c b/src/ov_SC05_019/ov_SC05_019_after.c index eee3ab7c06..d003123064 100644 --- a/src/ov_SC05_019/ov_SC05_019_after.c +++ b/src/ov_SC05_019/ov_SC05_019_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC05_019/nonmatchings/ov_SC05_019_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC05_019/nonmatchings/ov_SC05_019_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80181AD8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80181AD8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC05_019/nonmatchings/ov_SC05_019_after", func_8015D104); diff --git a/src/ov_SC06_000/ov_SC06_000.c b/src/ov_SC06_000/ov_SC06_000.c index abe0dae6e0..111b0b7d87 100644 --- a/src/ov_SC06_000/ov_SC06_000.c +++ b/src/ov_SC06_000/ov_SC06_000.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_000/nonmatchings/ov_SC06_000", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801885C4; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801885C4); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_000/ov_SC06_000_after.c b/src/ov_SC06_000/ov_SC06_000_after.c index fd0bf468dd..a5ddadb1d2 100644 --- a/src/ov_SC06_000/ov_SC06_000_after.c +++ b/src/ov_SC06_000/ov_SC06_000_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_000/nonmatchings/ov_SC06_000_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_000/nonmatchings/ov_SC06_000_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018AAE8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018AAE8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_000/nonmatchings/ov_SC06_000_after", func_8015D104); diff --git a/src/ov_SC06_006/ov_SC06_006.c b/src/ov_SC06_006/ov_SC06_006.c index b01e067bea..0a7d30ad30 100644 --- a/src/ov_SC06_006/ov_SC06_006.c +++ b/src/ov_SC06_006/ov_SC06_006.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_006/nonmatchings/ov_SC06_006", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801820E8; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801820E8); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_006/ov_SC06_006_after.c b/src/ov_SC06_006/ov_SC06_006_after.c index e5fe9731ef..d252981f79 100644 --- a/src/ov_SC06_006/ov_SC06_006_after.c +++ b/src/ov_SC06_006/ov_SC06_006_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_006/nonmatchings/ov_SC06_006_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_006/nonmatchings/ov_SC06_006_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018460C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018460C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_006/nonmatchings/ov_SC06_006_after", func_8015D104); diff --git a/src/ov_SC06_008/ov_SC06_008.c b/src/ov_SC06_008/ov_SC06_008.c index e3da14ec80..ab50825ef6 100644 --- a/src/ov_SC06_008/ov_SC06_008.c +++ b/src/ov_SC06_008/ov_SC06_008.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_008/nonmatchings/ov_SC06_008", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80185B50; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80185B50); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_008/ov_SC06_008_after.c b/src/ov_SC06_008/ov_SC06_008_after.c index ca40d7c1ab..ecb636fa06 100644 --- a/src/ov_SC06_008/ov_SC06_008_after.c +++ b/src/ov_SC06_008/ov_SC06_008_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_008/nonmatchings/ov_SC06_008_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_008/nonmatchings/ov_SC06_008_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80188074; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80188074 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_008/nonmatchings/ov_SC06_008_after", func_8015D104); diff --git a/src/ov_SC06_010/ov_SC06_010.c b/src/ov_SC06_010/ov_SC06_010.c index 6f956978d3..3fbbdd9888 100644 --- a/src/ov_SC06_010/ov_SC06_010.c +++ b/src/ov_SC06_010/ov_SC06_010.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_010/nonmatchings/ov_SC06_010", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80186D2C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80186D2C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_010/ov_SC06_010_after.c b/src/ov_SC06_010/ov_SC06_010_after.c index 0b86f78a45..b043af6a97 100644 --- a/src/ov_SC06_010/ov_SC06_010_after.c +++ b/src/ov_SC06_010/ov_SC06_010_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_010/nonmatchings/ov_SC06_010_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_010/nonmatchings/ov_SC06_010_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80189250; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80189250 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_010/nonmatchings/ov_SC06_010_after", func_8015D104); diff --git a/src/ov_SC06_011/ov_SC06_011.c b/src/ov_SC06_011/ov_SC06_011.c index 38ba878b62..df1c5b444a 100644 --- a/src/ov_SC06_011/ov_SC06_011.c +++ b/src/ov_SC06_011/ov_SC06_011.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_011/nonmatchings/ov_SC06_011", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018078C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018078C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_011/ov_SC06_011_after.c b/src/ov_SC06_011/ov_SC06_011_after.c index 0794bdaf66..afbeabee07 100644 --- a/src/ov_SC06_011/ov_SC06_011_after.c +++ b/src/ov_SC06_011/ov_SC06_011_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_011/nonmatchings/ov_SC06_011_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_011/nonmatchings/ov_SC06_011_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80182CB0; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80182CB0 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_011/nonmatchings/ov_SC06_011_after", func_8015D104); diff --git a/src/ov_SC06_013/ov_SC06_013.c b/src/ov_SC06_013/ov_SC06_013.c index dd61a9f0d2..92a39fd508 100644 --- a/src/ov_SC06_013/ov_SC06_013.c +++ b/src/ov_SC06_013/ov_SC06_013.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_013/nonmatchings/ov_SC06_013", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017EF08; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017EF08); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_013/ov_SC06_013_after.c b/src/ov_SC06_013/ov_SC06_013_after.c index 2549047406..cec38954ca 100644 --- a/src/ov_SC06_013/ov_SC06_013_after.c +++ b/src/ov_SC06_013/ov_SC06_013_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_013/nonmatchings/ov_SC06_013_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_013/nonmatchings/ov_SC06_013_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018142C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018142C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_013/nonmatchings/ov_SC06_013_after", func_8015D104); diff --git a/src/ov_SC06_014/ov_SC06_014.c b/src/ov_SC06_014/ov_SC06_014.c index 061820b5f3..16446917b1 100644 --- a/src/ov_SC06_014/ov_SC06_014.c +++ b/src/ov_SC06_014/ov_SC06_014.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_014/nonmatchings/ov_SC06_014", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018026C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018026C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_014/ov_SC06_014_after.c b/src/ov_SC06_014/ov_SC06_014_after.c index 36071a5796..cad503da0f 100644 --- a/src/ov_SC06_014/ov_SC06_014_after.c +++ b/src/ov_SC06_014/ov_SC06_014_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_014/nonmatchings/ov_SC06_014_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_014/nonmatchings/ov_SC06_014_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80182790; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80182790 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_014/nonmatchings/ov_SC06_014_after", func_8015D104); diff --git a/src/ov_SC06_015/ov_SC06_015.c b/src/ov_SC06_015/ov_SC06_015.c index e886c429e0..c4c6b7f3a7 100644 --- a/src/ov_SC06_015/ov_SC06_015.c +++ b/src/ov_SC06_015/ov_SC06_015.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_015/nonmatchings/ov_SC06_015", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017EDC4; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017EDC4); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_015/ov_SC06_015_after.c b/src/ov_SC06_015/ov_SC06_015_after.c index b897b19e38..0d36fe995b 100644 --- a/src/ov_SC06_015/ov_SC06_015_after.c +++ b/src/ov_SC06_015/ov_SC06_015_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_015/nonmatchings/ov_SC06_015_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_015/nonmatchings/ov_SC06_015_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801812E8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801812E8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_015/nonmatchings/ov_SC06_015_after", func_8015D104); diff --git a/src/ov_SC06_016/ov_SC06_016.c b/src/ov_SC06_016/ov_SC06_016.c index 4c9f865275..da273901ee 100644 --- a/src/ov_SC06_016/ov_SC06_016.c +++ b/src/ov_SC06_016/ov_SC06_016.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_016/nonmatchings/ov_SC06_016", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801851D4; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801851D4); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_016/ov_SC06_016_after.c b/src/ov_SC06_016/ov_SC06_016_after.c index 184a96aa7d..08250eb684 100644 --- a/src/ov_SC06_016/ov_SC06_016_after.c +++ b/src/ov_SC06_016/ov_SC06_016_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_016/nonmatchings/ov_SC06_016_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_016/nonmatchings/ov_SC06_016_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801876F8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801876F8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_016/nonmatchings/ov_SC06_016_after", func_8015D104); diff --git a/src/ov_SC06_018/ov_SC06_018.c b/src/ov_SC06_018/ov_SC06_018.c index f4774901e3..a49143cf7e 100644 --- a/src/ov_SC06_018/ov_SC06_018.c +++ b/src/ov_SC06_018/ov_SC06_018.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80193910; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80193910); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_018/ov_SC06_018_after.c b/src/ov_SC06_018/ov_SC06_018_after.c index 83947a8062..345b8a6145 100644 --- a/src/ov_SC06_018/ov_SC06_018_after.c +++ b/src/ov_SC06_018/ov_SC06_018_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80195E34; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80195E34 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_after", func_8015D104); diff --git a/src/ov_SC06_020/ov_SC06_020.c b/src/ov_SC06_020/ov_SC06_020.c index 1d79dd98a5..aa57767a5e 100644 --- a/src/ov_SC06_020/ov_SC06_020.c +++ b/src/ov_SC06_020/ov_SC06_020.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_020/nonmatchings/ov_SC06_020", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80185398; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80185398); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_020/ov_SC06_020_after.c b/src/ov_SC06_020/ov_SC06_020_after.c index f8ec1bca64..6c2ad30a6d 100644 --- a/src/ov_SC06_020/ov_SC06_020_after.c +++ b/src/ov_SC06_020/ov_SC06_020_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_020/nonmatchings/ov_SC06_020_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_020/nonmatchings/ov_SC06_020_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801878BC; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801878BC | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_020/nonmatchings/ov_SC06_020_after", func_8015D104); diff --git a/src/ov_SC06_022/ov_SC06_022.c b/src/ov_SC06_022/ov_SC06_022.c index 9a285b98fa..a9d85682fd 100644 --- a/src/ov_SC06_022/ov_SC06_022.c +++ b/src/ov_SC06_022/ov_SC06_022.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018D654; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018D654); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_022/ov_SC06_022_after.c b/src/ov_SC06_022/ov_SC06_022_after.c index ac2ad7402e..871b16fc7a 100644 --- a/src/ov_SC06_022/ov_SC06_022_after.c +++ b/src/ov_SC06_022/ov_SC06_022_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018FB78; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018FB78 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_after", func_8015D104); diff --git a/src/ov_SC06_024/ov_SC06_024.c b/src/ov_SC06_024/ov_SC06_024.c index 256fb7a5a0..bc4a63f44f 100644 --- a/src/ov_SC06_024/ov_SC06_024.c +++ b/src/ov_SC06_024/ov_SC06_024.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018FB2C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018FB2C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_024/ov_SC06_024_after.c b/src/ov_SC06_024/ov_SC06_024_after.c index 0a1857d726..0680a9c59b 100644 --- a/src/ov_SC06_024/ov_SC06_024_after.c +++ b/src/ov_SC06_024/ov_SC06_024_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80192050; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80192050 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_after", func_8015D104); diff --git a/src/ov_SC06_025/ov_SC06_025.c b/src/ov_SC06_025/ov_SC06_025.c index bcafd1bddc..56fa006056 100644 --- a/src/ov_SC06_025/ov_SC06_025.c +++ b/src/ov_SC06_025/ov_SC06_025.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_025/nonmatchings/ov_SC06_025", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80184FD0; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80184FD0); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_025/ov_SC06_025_after.c b/src/ov_SC06_025/ov_SC06_025_after.c index 6c7c49e0e9..d456476500 100644 --- a/src/ov_SC06_025/ov_SC06_025_after.c +++ b/src/ov_SC06_025/ov_SC06_025_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_025/nonmatchings/ov_SC06_025_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_025/nonmatchings/ov_SC06_025_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801874F4; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801874F4 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_025/nonmatchings/ov_SC06_025_after", func_8015D104); diff --git a/src/ov_SC06_027/ov_SC06_027.c b/src/ov_SC06_027/ov_SC06_027.c index a2963b9ee1..cc21ccf227 100644 --- a/src/ov_SC06_027/ov_SC06_027.c +++ b/src/ov_SC06_027/ov_SC06_027.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_027/nonmatchings/ov_SC06_027", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017E310; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017E310); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_027/ov_SC06_027_after.c b/src/ov_SC06_027/ov_SC06_027_after.c index b6aedd4631..376a6c961b 100644 --- a/src/ov_SC06_027/ov_SC06_027_after.c +++ b/src/ov_SC06_027/ov_SC06_027_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_027/nonmatchings/ov_SC06_027_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_027/nonmatchings/ov_SC06_027_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80180834; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80180834 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_027/nonmatchings/ov_SC06_027_after", func_8015D104); diff --git a/src/ov_SC06_029/ov_SC06_029.c b/src/ov_SC06_029/ov_SC06_029.c index d3d798eb0a..a4e9b7c7ea 100644 --- a/src/ov_SC06_029/ov_SC06_029.c +++ b/src/ov_SC06_029/ov_SC06_029.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_029/nonmatchings/ov_SC06_029", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8018C8A4; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8018C8A4); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_029/ov_SC06_029_after.c b/src/ov_SC06_029/ov_SC06_029_after.c index 6baea36258..7fd5b31e4c 100644 --- a/src/ov_SC06_029/ov_SC06_029_after.c +++ b/src/ov_SC06_029/ov_SC06_029_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_029/nonmatchings/ov_SC06_029_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_029/nonmatchings/ov_SC06_029_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8018EDC8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8018EDC8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_029/nonmatchings/ov_SC06_029_after", func_8015D104); diff --git a/src/ov_SC06_030/ov_SC06_030.c b/src/ov_SC06_030/ov_SC06_030.c index 5eab27a2ee..9b90a92d10 100644 --- a/src/ov_SC06_030/ov_SC06_030.c +++ b/src/ov_SC06_030/ov_SC06_030.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_030/nonmatchings/ov_SC06_030", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80182194; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80182194); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_030/ov_SC06_030_after.c b/src/ov_SC06_030/ov_SC06_030_after.c index 5d84307add..7b51bf84e3 100644 --- a/src/ov_SC06_030/ov_SC06_030_after.c +++ b/src/ov_SC06_030/ov_SC06_030_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_030/nonmatchings/ov_SC06_030_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_030/nonmatchings/ov_SC06_030_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_801846B8; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_801846B8 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_030/nonmatchings/ov_SC06_030_after", func_8015D104); diff --git a/src/ov_SC06_032/ov_SC06_032.c b/src/ov_SC06_032/ov_SC06_032.c index e123a38d14..2a16fc20d7 100644 --- a/src/ov_SC06_032/ov_SC06_032.c +++ b/src/ov_SC06_032/ov_SC06_032.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_032/nonmatchings/ov_SC06_032", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80193660; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80193660); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_032/ov_SC06_032_after.c b/src/ov_SC06_032/ov_SC06_032_after.c index b163ae7a4a..a725ee6ecb 100644 --- a/src/ov_SC06_032/ov_SC06_032_after.c +++ b/src/ov_SC06_032/ov_SC06_032_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_032/nonmatchings/ov_SC06_032_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_032/nonmatchings/ov_SC06_032_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80195B84; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80195B84 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_032/nonmatchings/ov_SC06_032_after", func_8015D104); diff --git a/src/ov_SC06_033/ov_SC06_033.c b/src/ov_SC06_033/ov_SC06_033.c index 2b0b4814b5..523a77992a 100644 --- a/src/ov_SC06_033/ov_SC06_033.c +++ b/src/ov_SC06_033/ov_SC06_033.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_033/nonmatchings/ov_SC06_033", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80191B70; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80191B70); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC06_033/ov_SC06_033_after.c b/src/ov_SC06_033/ov_SC06_033_after.c index 8bd815b8fc..8c213f685a 100644 --- a/src/ov_SC06_033/ov_SC06_033_after.c +++ b/src/ov_SC06_033/ov_SC06_033_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC06_033/nonmatchings/ov_SC06_033_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC06_033/nonmatchings/ov_SC06_033_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80194094; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80194094 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC06_033/nonmatchings/ov_SC06_033_after", func_8015D104); diff --git a/src/ov_SC07_000/ov_SC07_000.c b/src/ov_SC07_000/ov_SC07_000.c index 60cd8b784b..6bfd1d825d 100644 --- a/src/ov_SC07_000/ov_SC07_000.c +++ b/src/ov_SC07_000/ov_SC07_000.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC07_000/nonmatchings/ov_SC07_000", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_801829B8; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_801829B8); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC07_000/ov_SC07_000_after.c b/src/ov_SC07_000/ov_SC07_000_after.c index 5ba50178ed..5aa13b95a4 100644 --- a/src/ov_SC07_000/ov_SC07_000_after.c +++ b/src/ov_SC07_000/ov_SC07_000_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC07_000/nonmatchings/ov_SC07_000_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC07_000/nonmatchings/ov_SC07_000_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80184EDC; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80184EDC | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC07_000/nonmatchings/ov_SC07_000_after", func_8015D104); diff --git a/src/ov_SC07_001/ov_SC07_001.c b/src/ov_SC07_001/ov_SC07_001.c index b6008920ba..cea98646ba 100644 --- a/src/ov_SC07_001/ov_SC07_001.c +++ b/src/ov_SC07_001/ov_SC07_001.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC07_001/nonmatchings/ov_SC07_001", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80181868; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80181868); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC07_001/ov_SC07_001_after.c b/src/ov_SC07_001/ov_SC07_001_after.c index 5d9daea0b4..886299fb1b 100644 --- a/src/ov_SC07_001/ov_SC07_001_after.c +++ b/src/ov_SC07_001/ov_SC07_001_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC07_001/nonmatchings/ov_SC07_001_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC07_001/nonmatchings/ov_SC07_001_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80183D8C; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80183D8C | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC07_001/nonmatchings/ov_SC07_001_after", func_8015D104); diff --git a/src/ov_SC07_002/ov_SC07_002.c b/src/ov_SC07_002/ov_SC07_002.c index 6945a4213d..d1924007f3 100644 --- a/src/ov_SC07_002/ov_SC07_002.c +++ b/src/ov_SC07_002/ov_SC07_002.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC07_002/nonmatchings/ov_SC07_002", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_80186B24; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_80186B24); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC07_002/ov_SC07_002_after.c b/src/ov_SC07_002/ov_SC07_002_after.c index 1fa17218fb..a8a8dc6a83 100644 --- a/src/ov_SC07_002/ov_SC07_002_after.c +++ b/src/ov_SC07_002/ov_SC07_002_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC07_002/nonmatchings/ov_SC07_002_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC07_002/nonmatchings/ov_SC07_002_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80189048; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80189048 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC07_002/nonmatchings/ov_SC07_002_after", func_8015D104); diff --git a/src/ov_SC07_008/ov_SC07_008.c b/src/ov_SC07_008/ov_SC07_008.c index 432d414039..28b05ee8ff 100644 --- a/src/ov_SC07_008/ov_SC07_008.c +++ b/src/ov_SC07_008/ov_SC07_008.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC07_008/nonmatchings/ov_SC07_008", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017D63C; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017D63C); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC07_008/ov_SC07_008_after.c b/src/ov_SC07_008/ov_SC07_008_after.c index b7c32757a4..0fd4812617 100644 --- a/src/ov_SC07_008/ov_SC07_008_after.c +++ b/src/ov_SC07_008/ov_SC07_008_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC07_008/nonmatchings/ov_SC07_008_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC07_008/nonmatchings/ov_SC07_008_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_8017FB60; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_8017FB60 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC07_008/nonmatchings/ov_SC07_008_after", func_8015D104); diff --git a/src/ov_SC07_009/ov_SC07_009.c b/src/ov_SC07_009/ov_SC07_009.c index a43082ec69..79e98fc7fd 100644 --- a/src/ov_SC07_009/ov_SC07_009.c +++ b/src/ov_SC07_009/ov_SC07_009.c @@ -800,7 +800,33 @@ DEFINE_func_8012D5E4() /* dedup: shared engine-core @0x8012D5E4 (src/shared) */ DEFINE_func_8012D624() /* dedup: shared engine-core @0x8012D624 (src/shared) */ -INCLUDE_ASM("asm/ov_SC07_009/nonmatchings/ov_SC07_009", func_8012D664); +// @class: schedule +// @stuck: none — MATCH + + +struct S8012D664_8012D664 { short a, b, c; }; + +int func_8012D664(int arg0, int arg1, int arg2) { + extern int func_8012F568(); + extern int D_8017E0E0; + + struct S8012D664_8012D664 s; + int ret; + int t; + + s.a = (*(unsigned short*)&D_80126B5E); + s.b = (*(unsigned short*)&D_80126B62) - 0x40; + s.c = (*(unsigned short*)&D_80126B66); + ret = ((int(*)())func_800132BC)(arg0, &s); + t = arg1 + 0x20; + if (ret < t * t) { + func_8012F568(1, 1, 0, arg2, arg0, &D_8017E0E0); + return 1; + } + return 0; +} + + DEFINE_func_8012D714() /* dedup: shared engine-core @0x8012D714 (src/shared) */ diff --git a/src/ov_SC07_009/ov_SC07_009_after.c b/src/ov_SC07_009/ov_SC07_009_after.c index 3685603467..3de77da5ca 100644 --- a/src/ov_SC07_009/ov_SC07_009_after.c +++ b/src/ov_SC07_009/ov_SC07_009_after.c @@ -3247,7 +3247,39 @@ INCLUDE_ASM("asm/ov_SC07_009/nonmatchings/ov_SC07_009_after", func_8015CFC0); DEFINE_func_8015CFFC() /* dedup: shared engine-core @0x8015CFFC (src/shared) */ -INCLUDE_ASM("asm/ov_SC07_009/nonmatchings/ov_SC07_009_after", func_8015D01C); +// @class: regalloc-order +// @stuck: none — MATCH (uVar1 pinned $s3, uVar5 pinned $s1; param_1->s2, iVar4->s0 fall out) + + +void func_8015D01C(int param_1) { + extern s32 func_801725F4(u8 *a0); + extern int D_800D550C; + extern int D_80180604; + + int iVar4; + register unsigned short uVar1 __asm__("$19"); + register unsigned short uVar5 __asm__("$17"); + short sVar2; + short sVar3; + + ((void (*)(int, void *))func_80154274)(param_1, &D_800D550C); + *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0; + iVar4 = *(short *)(*(int *)(param_1 + 0x20) + 0x12); + uVar1 = *(unsigned short *)(*(int *)(*(int *)(param_1 + 0x180) + 0x20) + 0x12); + uVar5 = (uVar1 + 0x800) & 0xfff; + sVar2 = func_80012A60(iVar4, (short)uVar1); + sVar3 = func_80012A60(iVar4, uVar5); + if (sVar2 < sVar3) { + *(short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar1; + } else { + *(unsigned short *)(*(int *)(param_1 + 0x20) + 0x12) = uVar5; + } + *(int *)(param_1 + 0x38) = (int)&D_80180604 | 0x40000000; + ((void (*)(int))func_801725F4)(param_1); + ((void (*)(int))func_80146CA0)(param_1); +} + + INCLUDE_ASM("asm/ov_SC07_009/nonmatchings/ov_SC07_009_after", func_8015D104); diff --git a/src/shared/engine_core.h b/src/shared/engine_core.h index 25c76cab18..c0d6a567ce 100644 --- a/src/shared/engine_core.h +++ b/src/shared/engine_core.h @@ -1848,7 +1848,7 @@ } #define DEFINE_func_8015CFFC() \ - extern void func_8015D01C(void); \ + extern void func_8015D01C(); \ void func_8015CFFC(void) { \ func_8015D01C(); \ } @@ -2014,7 +2014,7 @@ } #define DEFINE_func_801747AC() \ - extern s32 func_8016F0AC(s32); \ + extern s32 func_8016F0AC(); \ s32 func_801747AC(s32 a0) { \ return func_8016F0AC(a0); \ } @@ -3504,7 +3504,7 @@ } #define DEFINE_func_8012D624() \ - extern void func_8012D664(void *a0); \ + extern int func_8012D664(); \ void func_8012D624(s32 a0) { \ u16 sp[3]; \ sp[0] = *(u16 *)(a0 + 0x6); \ @@ -5060,7 +5060,7 @@ } #define DEFINE_func_8012F75C() \ - extern void func_80131B14(void); \ + extern void func_80131B14(); \ extern void func_80131CA8(int a0, int a1); \ void func_8012F75C(s32 a0) { \ *(u8 *)(a0 + 0xC1) = 3; \ @@ -6302,7 +6302,7 @@ } #define DEFINE_func_8012FC30() \ - extern void func_80131B14(void); \ + extern void func_80131B14(); \ extern void func_8012B23C(s32 a0); \ extern s32 func_80131A34(s32, s32); \ extern void func_8002D4C8(s32 a0, s32 a1); \ @@ -7452,7 +7452,7 @@ } #define DEFINE_func_8017484C() \ - extern s32 func_8016F0AC(s32); \ + extern s32 func_8016F0AC(); \ extern s32 D_80126B9C; \ void func_8017484C(s32 a0) { \ func_8016F0AC(a0); \ @@ -17423,7 +17423,7 @@ } #define DEFINE_func_8012F5F4() \ - extern void func_80131B14(void); \ + extern void func_80131B14(); \ extern void func_80131E00(struct S80131E00 *a0, s32 a1); \ extern s32 func_80131A34(s32, s32); \ extern void func_80131CA8(int a0, int a1); \ @@ -19161,7 +19161,7 @@ } #define DEFINE_func_8015CF58() \ - extern void func_8015D01C(void); \ + extern void func_8015D01C(); \ void func_8015CF58(s32 *param_1) \ { \ func_80147078(param_1, 0xC); \ @@ -22566,7 +22566,7 @@ #define DEFINE_func_80130AF0() \ extern s32 func_80146A6C(s32 a0, void *a1, s32 a2, s32 a3, s32 a4, s32 a5, s32 a6); \ - extern void func_80131B14(void); \ + extern void func_80131B14(); \ extern void func_80131E00(struct S80131E00 *a0, s32 a1); \ extern int func_80131A34(int a0, int a1); \ extern void func_80131CA8(int a0, int a1); \ @@ -22971,7 +22971,7 @@ } #define DEFINE_func_80130438() \ - extern void func_80131B14(void); \ + extern void func_80131B14(); \ extern void func_80143CD4(s32 a0); \ extern void func_8002D4C8(s32 a0, s32 a1); \ extern void func_800CB0E8(s32 a0); \