From 2e7bc0947463a71cb207e7aaeaa367686c09c157 Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Fri, 11 Sep 2026 00:42:31 -0600 Subject: [PATCH] =?UTF-8?q?phase-36:=20S104=20s104=5Fe1=20=E2=80=94=20func?= =?UTF-8?q?=5F801AB818=20banked=20at=200=20through=20the=20whole-object=20?= =?UTF-8?q?gate=20+=20propagated=20=E2=80=94=20memory=20barrier=20?= =?UTF-8?q?=E2=86=92=200:=20a=20memory=20read=20between=20the=20two=20stac?= =?UTF-8?q?k-slot=20stores=20(flow.c:1726-1727/2379)=20spelled=20as=20an?= =?UTF-8?q?=20array=20index=20(expr.c:4568-4577,=20sched.c:831-839)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../agents/md_SC07_004__func_801A1E94/body.c | 15 + .../body_minlever.c | 17 + .../md_SC07_004__func_801A1E94/mechanism.md | 48 +++ .../agents/md_SC07_004__func_801A5C44/body.c | 8 + .../body_minlever.c | 10 + .../md_SC07_004__func_801A5C44/mechanism.md | 39 ++ .../agents/md_SC07_004__func_801AB818/body.c | 21 + .../md_SC07_004__func_801AB818/mechanism.md | 44 +++ .run/P36/delever/calibration.json | 368 +++++++++--------- .run/P36/delever/ledger.jsonl | 1 + src/md_SC07_004/md_SC07_004.c | 15 +- 11 files changed, 391 insertions(+), 195 deletions(-) create mode 100644 .run/P36/agents/md_SC07_004__func_801A1E94/body.c create mode 100644 .run/P36/agents/md_SC07_004__func_801A1E94/body_minlever.c create mode 100644 .run/P36/agents/md_SC07_004__func_801A1E94/mechanism.md create mode 100644 .run/P36/agents/md_SC07_004__func_801A5C44/body.c create mode 100644 .run/P36/agents/md_SC07_004__func_801A5C44/body_minlever.c create mode 100644 .run/P36/agents/md_SC07_004__func_801A5C44/mechanism.md create mode 100644 .run/P36/agents/md_SC07_004__func_801AB818/body.c create mode 100644 .run/P36/agents/md_SC07_004__func_801AB818/mechanism.md diff --git a/.run/P36/agents/md_SC07_004__func_801A1E94/body.c b/.run/P36/agents/md_SC07_004__func_801A1E94/body.c new file mode 100644 index 000000000..91aefb221 --- /dev/null +++ b/.run/P36/agents/md_SC07_004__func_801A1E94/body.c @@ -0,0 +1,15 @@ +void func_801A1E94(s32 a0) +{ + s32 *sp = &D_801BF01C; + + func_8001C924(*(s32 *)(a0 + 0x20), sp); + func_80132288(&D_801F8724, &D_801AFB58, *sp); + *(s16 *)(a0 + 0xA) = -0x240; + *(s16 *)(a0 + 0xE) = 0x30; + *(s32 *)(a0 + 0xD4) = func_801A8528(a0); + func_80178B18(a0, (s32)&D_801AFCF8); + *(s32 *)(a0 + 0x1C) = 0x60; + *(s16 *)(a0 + 0x100) = 0xFF; + *(s16 *)(a0 + 0x84) = 0; + func_8012AD44((s32 *)a0, 0xE); +} diff --git a/.run/P36/agents/md_SC07_004__func_801A1E94/body_minlever.c b/.run/P36/agents/md_SC07_004__func_801A1E94/body_minlever.c new file mode 100644 index 000000000..2229d2d9f --- /dev/null +++ b/.run/P36/agents/md_SC07_004__func_801A1E94/body_minlever.c @@ -0,0 +1,17 @@ +void func_801A1E94(void) +{ + register s32 arg __asm__("$4"); // !FAKE: pin $4 — the caller's argument read by a function the TU declares (void): no pass can supply it: the incoming $a0 is only named by a PARAMETER (function.c:3157 assign_parms); a SIGNATURE lever (fix = `(s32 a0)` + the TU externs/callers, signature.diff), parked for the structs phase (P36 S104 e1 minimum-lever) + s32 a0 = arg; + s32 *sp = &D_801BF01C; + + func_8001C924(*(s32 *)(a0 + 0x20), sp); + func_80132288(&D_801F8724, &D_801AFB58, *sp); + *(s16 *)(a0 + 0xA) = -0x240; + *(s16 *)(a0 + 0xE) = 0x30; + *(s32 *)(a0 + 0xD4) = func_801A8528(a0); + func_80178B18(a0, (s32)&D_801AFCF8); + *(s32 *)(a0 + 0x1C) = 0x60; + *(s16 *)(a0 + 0x100) = 0xFF; + *(s16 *)(a0 + 0x84) = 0; + func_8012AD44((s32 *)a0, 0xE); +} diff --git a/.run/P36/agents/md_SC07_004__func_801A1E94/mechanism.md b/.run/P36/agents/md_SC07_004__func_801A1E94/mechanism.md new file mode 100644 index 000000000..012c9d7b3 --- /dev/null +++ b/.run/P36/agents/md_SC07_004__func_801A1E94/mechanism.md @@ -0,0 +1,48 @@ +# func_801A1E94 (md_SC07_004) — P36 S104 agent e1 — score 14 (lever-free) -> 0 with ZERO levers via a SIGNATURE change + +(a) Residual: body_free.c is 41 ins vs 42 — the target's `move s0,a0` in the prologue is missing and `$s0/$s1` are swapped. +The function reads the caller's `$a0` (the object pointer) but the TU declares and defines it `void func_801A1E94(void)`; +the tree's `register s32 param_1 __asm__("$4")` pin was faking a PARAMETER. Lever-free, `param_1` is an uninitialised local: +nothing copies `$a0`, so one instruction is missing and the allocation of the remaining pseudos reshuffles. + +(b) Pass/decision: no optimisation pass — the incoming argument register is only named through a PARM_DECL +(`function.c:3157` `assign_parms`, which emits the `move s0,a0` parameter copy). A `(void)` function cannot read `$a0` in C: +proven on bytes both ways — a prototype definition `void func_801A1E94(s32 p)` against the TU's `extern ... (void)` is +"conflicting types" (line 10 / 4471), and a K&R definition `void func_801A1E94(p) s32 p;` is "number of arguments doesn't +match prototype". Every caller already has the object in `$a0` at the call: `func_801A0230` calls it through a cast +`((void (*)(s32))func_801A1E94)(a0)` and `func_801A6A18(void) { func_801A1E94(); }` is a pass-through wrapper. + +(c) The close (proven, score 0; all callers byte-identical; WHOLE OBJECT .text/.data/.rodata/.sdata/.bss sha1-identical to the +baseline and .text relocations identical, with all three of this agent's bodies spliced — `scratch/tu_all3.c`): +1. `void func_801A1E94(s32 a0)` — the parameter replaces the pin + `p = param_1` copy + the dead `s0` local. +2. Both `extern void func_801A1E94(void);` (lines 10, 4471) -> `(s32 a0)`. +3. `func_801A0230`: `((void (*)(s32))func_801A1E94)(a0);` -> `func_801A1E94(a0);` (0 bytes). +4. `func_801A6A18(void) { func_801A1E94(); }` -> `func_801A6A18(s32 a0) { func_801A1E94(a0); }` (0 bytes; no other + declaration of func_801A6A18 in src/). +The whole-TU patch (with func_801A5C44's identical fix) is `signature.diff`; `scratch/mktu.py` regenerates it. +body.c is the new definition; it does NOT compile under `--try --body` alone (the TU's `(void)` externs conflict) — it +needs signature.diff. PARKED for the structs phase per Drew S104 (d). +Fallback if the signature change is refused: `body_minlever.c` — ONE marked pin (`register s32 arg __asm__("$4"); s32 a0 = +arg;`), score 0 under `--try --body`. Lever count 1 -> 1 (the tree's pin, now honestly marked as a signature lever); the pinned +variable must be COPIED into an ordinary local (using the pinned var directly scored 18: it stays in `$a0`). + +(d) GENERATOR PROPOSAL: when a `(void)` function's first statement pins `$4`–`$7` and reads it before any write, rewrite it +as a parameter of that type, update every `extern` of it in the TU and route each caller's value in that register as the +argument (a cast call `((void (*)(T))f)(x)` -> `f(x)`; a `(void)` pass-through wrapper gains the parameter too), then score +the callee AND every caller. A regex census finds 158 such `(void)`+early-`$4..$7`-pin functions in src/ (unverified +denominator: the regex does not check read-before-write; ~110 are copies of `func_80157D20`); a third in this TU is +`func_801A4258`. + +(e) Did NOT work / not needed: the free sweep's R12 width moves (`p`/`param_1` s32->u16/u8, score 1) and every R4–R18 move at +1 were operating on an UNINITIALISED variable — no spelling can create the missing parameter copy. Lower-level alternative +spelling of the final body: dropping the `sp = &D_801BF01C` local (using the global directly) scored 13 — the target keeps +the address in `$s1` (`lui/addiu s1` once, `lw a2,0(s1)`); the local, as sibling `func_801A66DC` spells it, is the shape. + +(f) Method gap: the residual reads as a register permutation + one missing copy; the real defect is the SIGNATURE, visible +only in body_tree.c (a pin as the first statement, read before written) and in the TU's callers. A pre-check for "a pinned +argument register read before any write in a (void) function" would have skipped the 312+246 sweep compiles. + +(g) Structs: NO for the lever — a struct type changes nothing about how `$a0` enters the function; only the parameter does. +Once it is a parameter, typing it as the object struct (fields 0x0A/0x0E s16, 0x1C s32, 0x20 s32 handle, 0xD4 s32, 0x84/0x100 +s16) is a readability gain only; there is no scalar-vs-aggregate ordering question left in this body (no stores are +reordered in the residual). Not tested on bytes (nothing to close). diff --git a/.run/P36/agents/md_SC07_004__func_801A5C44/body.c b/.run/P36/agents/md_SC07_004__func_801A5C44/body.c new file mode 100644 index 000000000..d62fcd866 --- /dev/null +++ b/.run/P36/agents/md_SC07_004__func_801A5C44/body.c @@ -0,0 +1,8 @@ +void func_801A5C44(s32 a0) { + s32 s2 = *(s32 *)(a0 + 0xCC); + s32 s1 = *(s32 *)(a0 + 0xD4); + + *(s16 *)(s2 + 0x18) = *(u16 *)(s1 + *(s16 *)(a0 + 0x70) * 4) + (func_8004787C(*(s16 *)(a0 + 0x100)) >> 4); + *(s16 *)(s2 + 0x1A) = *(u16 *)(s1 + *(s16 *)(a0 + 0x70) * 4 + 2) + (func_8004787C(*(s16 *)(a0 + 0x100) + 0x800) >> 4); + *(u16 *)(a0 + 0x100) += 0x40; +} diff --git a/.run/P36/agents/md_SC07_004__func_801A5C44/body_minlever.c b/.run/P36/agents/md_SC07_004__func_801A5C44/body_minlever.c new file mode 100644 index 000000000..e5df5f952 --- /dev/null +++ b/.run/P36/agents/md_SC07_004__func_801A5C44/body_minlever.c @@ -0,0 +1,10 @@ +void func_801A5C44(void) { + register s32 arg __asm__("$4"); // !FAKE: pin $4 — the caller's argument read by a function the TU declares (void): no pass can supply it: the incoming $a0 is only named by a PARAMETER (function.c:3157 assign_parms); a SIGNATURE lever (fix = `(s32 a0)` + the TU externs/callers, signature.diff), parked for the structs phase (P36 S104 e1 minimum-lever) + s32 a0 = arg; + s32 s2 = *(s32 *)(a0 + 0xCC); + s32 s1 = *(s32 *)(a0 + 0xD4); + + *(s16 *)(s2 + 0x18) = *(u16 *)(s1 + *(s16 *)(a0 + 0x70) * 4) + (func_8004787C(*(s16 *)(a0 + 0x100)) >> 4); + *(s16 *)(s2 + 0x1A) = *(u16 *)(s1 + *(s16 *)(a0 + 0x70) * 4 + 2) + (func_8004787C(*(s16 *)(a0 + 0x100) + 0x800) >> 4); + *(u16 *)(a0 + 0x100) += 0x40; +} diff --git a/.run/P36/agents/md_SC07_004__func_801A5C44/mechanism.md b/.run/P36/agents/md_SC07_004__func_801A5C44/mechanism.md new file mode 100644 index 000000000..0842eefa0 --- /dev/null +++ b/.run/P36/agents/md_SC07_004__func_801A5C44/mechanism.md @@ -0,0 +1,39 @@ +# func_801A5C44 (md_SC07_004) — P36 S104 agent e1 — score 15 (lever-free) -> 0 with ZERO levers via a SIGNATURE change + +(a) Residual: body_free.c is 40 ins vs 41 — the target's `sw s0,16(sp); move s0,a0` parameter copy is missing and the +three callee-saved holders rotate (`s2->s0, s0->s1, s1->s2`). Same defect as func_801A1E94 in this TU: the function reads the +caller's `$a0` but is declared and defined `void func_801A5C44(void)`; the tree's `register s32 a0 __asm__("$4")` pin was +faking a parameter, and lever-free `a0` is an uninitialised local. + +(b) Pass/decision: none — the incoming `$a0` is only named by a PARM_DECL (`function.c:3157` `assign_parms`, which emits the +`move s0,a0`). Proven for this TU on func_801A1E94: both a prototype definition against the `(void)` externs ("conflicting +types") and a K&R definition ("number of arguments doesn't match prototype") are compile errors. All three callers hold the +object in `$a0` at the call (`func_801A6560`: first statement; `func_801A6FD4`: after a load into `s1`; `func_801A7184`: +already a cast call `((void (*)(void *))func_801A5C44)(arg0)`). + +(c) The close (proven, score 0; every caller byte-identical; whole object sha1-identical per section with all three of this +agent's bodies spliced — see func_801A1E94's pack `scratch/tu_all3.c`): +1. `void func_801A5C44(s32 a0)`, and the body tidied: `s2`/`s1` initialised at declaration, the `temp` local and the + `s32 s0 = a0` copy deleted, each `func_8004787C(...) >> 4` written inline in its sum (score 0; the tree-shaped text with + just the parameter also scores 0 — `scratch/b2_1.c`). +2. The three `extern void func_801A5C44(void);` (lines 4265, 4753, 4811) -> `(s32 a0)`. +3. Callers: `func_801A5C44();` -> `func_801A5C44(arg0);` in `func_801A6560`, `func_801A5C44((s32)arg0);` in `func_801A6FD4`, + and `((void (*)(void *))func_801A5C44)(arg0);` -> `func_801A5C44((s32)arg0);` in `func_801A7184` (all 0 bytes). +The whole-TU patch (both functions) is `signature.diff` (same file as in func_801A1E94's pack). body.c needs it: alone under +`--try --body` it is a "conflicting types" error. PARKED for the structs phase per Drew S104 (d). +Fallback if the signature change is refused: `body_minlever.c` — ONE marked pin (`register s32 arg __asm__("$4"); s32 a0 = +arg;`), score 0 under `--try --body`. Lever count 1 -> 1. + +(d) GENERATOR PROPOSAL: a `(void)` function whose first statement pins `$4`–`$7` and reads it before writing -> make it a +parameter, update every TU `extern`, pass the caller's value at each call site (cast calls collapse), score callee + callers +(158 regex hits across src/, unverified; third in this TU: `func_801A4258`). + +(e) Did NOT work / not needed: the sweep's best 1 (R12 `s0` s32->u16, R5/R6/R7/R8/R9/R18) all act on an uninitialised +variable; none can create the parameter copy. + +(f) Method gap: same as func_801A1E94 — a register-rotation + one-missing-copy residual whose cause is the signature; detect +"pinned arg register read before write in a (void) function" before sweeping. + +(g) Structs: NO for the lever (only a parameter brings `$a0` in). With the parameter, a struct for the object (0x70 s16 index, +0x100 s16 angle, 0xCC s32 sprite ptr, 0xD4 s32 table ptr of {u16, u16} pairs) is readability only; no ordering decision +remains. Not tested on bytes. diff --git a/.run/P36/agents/md_SC07_004__func_801AB818/body.c b/.run/P36/agents/md_SC07_004__func_801AB818/body.c new file mode 100644 index 000000000..9707f288b --- /dev/null +++ b/.run/P36/agents/md_SC07_004__func_801AB818/body.c @@ -0,0 +1,21 @@ +void func_801AB818(void *a0) { + u8 *s1 = *(u8 **)((s32)a0 + 0x24); + + if (*(s32 *)((s32)a0 + 0x1C) != 0) { + U16x2N tmp; + + *(s32 *)((s32)a0 + 0x1C) -= 1; + func_801A8440((s32)a0); + + *(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x18) -= 0x370; + *(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x1A) = *(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x18); + + /* tmp is stored twice and the target keeps both stores: the addend read between them resets flow.c's + * last_mem_set; as ((s32 *)a0)[12] it is an in-struct access, which sched1 hoists above the frame store. */ + *(s32 *)&tmp = *(s32 *)(s1 + 0); + *(s32 *)&tmp += ((s32 *)a0)[12]; + *(U16x2N *)(s1 + 0) = tmp; + } else { + func_801292C8((u8 *)a0); + } +} diff --git a/.run/P36/agents/md_SC07_004__func_801AB818/mechanism.md b/.run/P36/agents/md_SC07_004__func_801AB818/mechanism.md new file mode 100644 index 000000000..af72b752f --- /dev/null +++ b/.run/P36/agents/md_SC07_004__func_801AB818/mechanism.md @@ -0,0 +1,44 @@ +# func_801AB818 (md_SC07_004) — P36 S104 agent e1 — score 1 -> 0, ZERO levers (was 1 `"memory"` barrier) + +(a) Residual: lever-free, the FIRST of the two `sw v0,16(sp)` stores to the struct temp `tmp` is deleted (mine has a `nop` +where the target has the store; same count otherwise). + +(b) Pass and decision: +- flow.c dead-store rule: `insn_dead_p` (`flow.c:1726-1727`) deletes a MEM store whose address is `rtx_equal_p` to + `last_mem_set`, the last store seen scanning BACKWARDS; `mark_set_1` records it (`flow.c:1966-1974`) and ANY memory read + resets it (`mark_used_regs` case MEM, `flow.c:2379`). In body_free.c both source loads (`cur`, `addend`) precede both + stores, so nothing between the stores reads memory and the first store is dead. The tree's `__asm__("" ::: "memory")` + was faking an intervening memory access. +- sched.c `true_dependence` (`sched.c:831-839`): a READ after a pending WRITE is independent when the read is + `MEM_IN_STRUCT_P` with a varying address and the write is non-struct with a fixed (frame) address. `MEM_IN_STRUCT_P` on an + INDIRECT_REF is set only when the pointer operand is itself a `PLUS_EXPR` (or an aggregate/ADDR_EXPR of one), + `expr.c:4568-4577`; `*(s32 *)((s32)a0 + 0x30)` has a NOP_EXPR (the cast) on top and is NOT in-struct. + +(c) Moves that closed it (joint; proven on bytes): +1. Read the addend BETWEEN the two stores: `*(s32 *)&tmp = cur; *(s32 *)&tmp = cur + ;` — the read resets + `last_mem_set`, the first store survives (score 1 -> 5 alone: store kept, but the load stays after it -> 2 nops). +2. Spell the addend `((s32 *)a0)[12]` (array index = INDIRECT_REF of a pointer PLUS_EXPR -> in-struct, varying address) so + sched1 hoists it above the frame store, as in the target (5 -> 0). A struct field + `((struct { u8 pad[0x30]; s32 addend; } *)a0)->addend` also scores 0 (COMPONENT_REF, in-struct) — proven. + `*(s32 *)((u8 *)a0 + 0x30)` scores 5 (cast on top of the PLUS -> not in-struct) — proven. +3. Final text (body.c, 0): `cur`/`addend` locals deleted — `*(s32 *)&tmp = *(s32 *)(s1 + 0); *(s32 *)&tmp += + ((s32 *)a0)[12];` (the compound read of tmp is forwarded by cse, the addend read stays between the stores). The same + with the struct-field addend also scores 0. + +(d) GENERATOR PROPOSAL: when a `"memory"` barrier sits between two stores to the same stack slot (the target keeps a +dead-looking first store), delete the barrier and move a memory READ that feeds the second store's value to between the +stores, spelling it as an array index `((T *)p)[K/sizeof(T)]` (or a struct field) so the scheduler may still hoist it. + +(e) Did NOT work: the free sweep's 191 compiles (R7 block/do-while, R8 temp, R10 param-copy, R18 bystander) all stay at 1 — +none moves a read between the stores. `*(s32 *)((u8 *)a0 + 0x30)` between the stores = 5 (not in-struct, stays put). + +(f) Method gap: none for this one — the tree's own comment named the pass (flow last_mem_set); the missing half was +sched.c's in-struct channel, which step 10's struct question pointed straight at. Note: `--try` returned two transient +`COMPILE-ERROR — ... At top level:` (truncated at 300 chars) on unchanged text; a retry compiled it. The 300-char truncation +hides the real message. + +(g) Structs: YES, and proven on bytes — this is exactly the `expr.c:4568-4577` channel. With `a0` typed as a struct whose +field at 0x30 is `s32` (the same object also has `s32` at 0x1C (counter), `s32` at 0x20 (sprite pointer, `u16` fields at +0x18/0x1A), `u8 *` at 0x24), `a0->f30` is a COMPONENT_REF -> in-struct -> the scheduler hoists it over the stack store, +and the natural source `tmp = *s1; tmp += a0->f30;` closes with no index trick: the body-local struct cast +`((struct { u8 pad[0x30]; s32 addend; } *)a0)->addend` scored 0 in both the two-statement and the `cur` spellings (proven). diff --git a/.run/P36/delever/calibration.json b/.run/P36/delever/calibration.json index 184bc1fec..67667e7d1 100644 --- a/.run/P36/delever/calibration.json +++ b/.run/P36/delever/calibration.json @@ -1,7 +1,7 @@ { - "head": "65b0855c1", + "head": "74657a03b", "stamp": "15956e4a96c4", - "generated": "2026-09-11 00:35", + "generated": "2026-09-11 00:42", "aliases": [ "main", "ov_SC03_014", @@ -21,207 +21,207 @@ "main": { "objects": 85, "identical": 85, - "seconds": 10.965, - "mean_s": 0.129 + "seconds": 10.104000000000001, + "mean_s": 0.119 }, "ov_SC03_014": { "objects": 32, "identical": 32, - "seconds": 6.564000000000001, - "mean_s": 0.205 + "seconds": 6.751, + "mean_s": 0.211 }, "ov_SC03_015": { "objects": 32, "identical": 32, - "seconds": 6.766, - "mean_s": 0.211 + "seconds": 6.818, + "mean_s": 0.213 }, "ov_SC04_011": { "objects": 28, "identical": 28, - "seconds": 6.163000000000001, - "mean_s": 0.22 + "seconds": 6.424, + "mean_s": 0.229 } }, "per_object_seconds": { - "build/src/800.o": 1.063, - "build/src/800_b.o": 0.142, - "build/src/800_b_2.o": 0.476, - "build/src/800_b_o0a.o": 0.119, - "build/src/800_c.o": 0.301, - "build/src/800b2.o": 0.137, - "build/src/apicard1.o": 0.123, - "build/src/apicard2.o": 0.104, - "build/src/apicard3.o": 0.112, + "build/src/800.o": 1.017, + "build/src/800_b.o": 0.098, + "build/src/800_b_2.o": 0.542, + "build/src/800_b_o0a.o": 0.091, + "build/src/800_c.o": 0.273, + "build/src/800b2.o": 0.088, + "build/src/apicard1.o": 0.075, + "build/src/apicard2.o": 0.129, + "build/src/apicard3.o": 0.099, "build/src/apicard4.o": 0.087, - "build/src/apicard5.o": 0.101, + "build/src/apicard5.o": 0.124, "build/src/apicard6.o": 0.077, - "build/src/apicard7.o": 0.075, - "build/src/boot.o": 0.163, - "build/src/gap.o": 0.147, - "build/src/libapi1.o": 0.109, - "build/src/libapi2.o": 0.085, - "build/src/libc2_1.o": 0.106, - "build/src/libc2_2.o": 0.086, - "build/src/libcd1.o": 0.101, - "build/src/libcd2.o": 0.088, - "build/src/libetc.o": 0.148, - "build/src/libgpu.o": 0.132, - "build/src/libgpu2.o": 0.144, - "build/src/libgs1.o": 0.095, - "build/src/libgs2.o": 0.077, - "build/src/libgs3.o": 0.095, - "build/src/libgs4.o": 0.092, - "build/src/libgs5.o": 0.085, - "build/src/libgs6.o": 0.106, - "build/src/libgs7.o": 0.091, - "build/src/libgs8.o": 0.086, - "build/src/libgte1.o": 0.083, - "build/src/libgte10.o": 0.099, - "build/src/libgte11.o": 0.088, - "build/src/libgte12.o": 0.114, - "build/src/libgte13.o": 0.131, - "build/src/libgte14.o": 0.166, - "build/src/libgte15.o": 0.132, - "build/src/libgte16.o": 0.174, - "build/src/libgte17.o": 0.1, - "build/src/libgte18.o": 0.077, - "build/src/libgte19.o": 0.079, - "build/src/libgte2.o": 0.098, - "build/src/libgte20.o": 0.09, - "build/src/libgte21.o": 0.131, - "build/src/libgte22.o": 0.083, - "build/src/libgte23.o": 0.104, - "build/src/libgte24.o": 0.088, - "build/src/libgte25.o": 0.086, - "build/src/libgte26.o": 0.112, - "build/src/libgte27.o": 0.133, - "build/src/libgte28.o": 0.134, - "build/src/libgte29.o": 0.129, - "build/src/libgte3.o": 0.124, - "build/src/libgte30.o": 0.086, - "build/src/libgte4.o": 0.144, - "build/src/libgte5.o": 0.097, - "build/src/libgte6.o": 0.127, - "build/src/libgte7.o": 0.087, - "build/src/libgte8.o": 0.099, - "build/src/libgte9.o": 0.102, - "build/src/libmcrd1.o": 0.122, - "build/src/libmcrd2.o": 0.132, - "build/src/libpad1.o": 0.083, - "build/src/libpad2.o": 0.087, - "build/src/sgap.o": 0.16, - "build/src/sgap_2.o": 0.129, - "build/src/sgap_3.o": 0.148, - "build/src/sgap_4.o": 0.168, - "build/src/sgap_5.o": 0.086, - "build/src/sgap_6.o": 0.077, - "build/src/sgap_8.o": 0.093, - "build/src/snd1.o": 0.079, - "build/src/snd10.o": 0.093, - "build/src/snd11.o": 0.095, - "build/src/snd12.o": 0.156, - "build/src/snd2.o": 0.139, - "build/src/snd3.o": 0.139, - "build/src/snd4.o": 0.117, - "build/src/snd5.o": 0.136, - "build/src/snd6.o": 0.151, - "build/src/snd7.o": 0.12, - "build/src/snd8.o": 0.078, - "build/src/snd9.o": 0.127, - "build/src/ov_SC03_014/ov_SC03_014.o": 0.21, - "build/src/ov_SC03_014/ov_SC03_014_after.o": 0.654, - "build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o": 0.525, - "build/src/ov_SC03_014/ov_SC03_014_jr_80135888.o": 0.071, - "build/src/ov_SC03_014/ov_SC03_014_jr_80135A4C.o": 0.093, - "build/src/ov_SC03_014/ov_SC03_014_jr_80135D20.o": 0.223, - "build/src/ov_SC03_014/ov_SC03_014_jr_801380E0.o": 0.234, - "build/src/ov_SC03_014/ov_SC03_014_jr_8013C98C.o": 0.194, - "build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o": 0.151, - "build/src/ov_SC03_014/ov_SC03_014_jr_8013FFD8.o": 0.095, - "build/src/ov_SC03_014/ov_SC03_014_jr_80140608.o": 0.211, - "build/src/ov_SC03_014/ov_SC03_014_jr_8015444C.o": 0.115, - "build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o": 0.229, - "build/src/ov_SC03_014/ov_SC03_014_jr_801588CC.o": 0.147, - "build/src/ov_SC03_014/ov_SC03_014_jr_80159C84.o": 0.086, - "build/src/ov_SC03_014/ov_SC03_014_jr_8015A3C8.o": 0.124, - "build/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.o": 0.144, - "build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o": 0.582, - "build/src/ov_SC03_014/ov_SC03_014_jr_8016AB6C.o": 0.325, - "build/src/ov_SC03_014/ov_SC03_014_jr_80171B4C.o": 0.158, - "build/src/ov_SC03_014/ov_SC03_014_jr_801734BC.o": 0.277, - "build/src/ov_SC03_014/ov_SC03_014_jr_801789AC.o": 0.131, - "build/src/ov_SC03_014/ov_SC03_014_jr_80178D40.o": 0.146, - "build/src/ov_SC03_014/ov_SC03_014_jr_8017A4AC.o": 0.098, - "build/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.o": 0.234, - "build/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.o": 0.256, - "build/src/ov_SC03_014/ov_SC03_014_jr_80184440.o": 0.071, - "build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o": 0.351, - "build/src/ov_SC03_014/ov_SC03_014_o0b.o": 0.08, - "build/src/ov_SC03_014/ov_SC03_014_o0c.o": 0.124, - "build/src/ov_SC03_014/ov_SC03_014_o0d.o": 0.131, - "build/src/ov_SC03_014/ov_SC03_014_o0e.o": 0.094, - "build/src/ov_SC03_015/ov_SC03_015.o": 0.144, - "build/src/ov_SC03_015/ov_SC03_015_after.o": 0.802, - "build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o": 0.588, - "build/src/ov_SC03_015/ov_SC03_015_jr_80135888.o": 0.077, - "build/src/ov_SC03_015/ov_SC03_015_jr_80135A4C.o": 0.093, - "build/src/ov_SC03_015/ov_SC03_015_jr_80135D20.o": 0.193, - "build/src/ov_SC03_015/ov_SC03_015_jr_801380E0.o": 0.193, - "build/src/ov_SC03_015/ov_SC03_015_jr_8013C98C.o": 0.154, - "build/src/ov_SC03_015/ov_SC03_015_jr_8013F350.o": 0.128, - "build/src/ov_SC03_015/ov_SC03_015_jr_8013FFD8.o": 0.101, - "build/src/ov_SC03_015/ov_SC03_015_jr_80140608.o": 0.202, - "build/src/ov_SC03_015/ov_SC03_015_jr_8015444C.o": 0.086, - "build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o": 0.192, - "build/src/ov_SC03_015/ov_SC03_015_jr_801588CC.o": 0.118, - "build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o": 0.103, - "build/src/ov_SC03_015/ov_SC03_015_jr_8015A3C8.o": 0.15, - "build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o": 0.126, - "build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o": 0.658, - "build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o": 0.335, - "build/src/ov_SC03_015/ov_SC03_015_jr_80171B4C.o": 0.167, - "build/src/ov_SC03_015/ov_SC03_015_jr_801734BC.o": 0.316, - "build/src/ov_SC03_015/ov_SC03_015_jr_801789AC.o": 0.113, - "build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o": 0.147, - "build/src/ov_SC03_015/ov_SC03_015_jr_8017A4AC.o": 0.131, - "build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o": 0.244, - "build/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.o": 0.348, - "build/src/ov_SC03_015/ov_SC03_015_jr_80184440.o": 0.072, - "build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o": 0.378, - "build/src/ov_SC03_015/ov_SC03_015_o0b.o": 0.087, - "build/src/ov_SC03_015/ov_SC03_015_o0c.o": 0.105, + "build/src/apicard7.o": 0.082, + "build/src/boot.o": 0.191, + "build/src/gap.o": 0.082, + "build/src/libapi1.o": 0.073, + "build/src/libapi2.o": 0.113, + "build/src/libc2_1.o": 0.18, + "build/src/libc2_2.o": 0.092, + "build/src/libcd1.o": 0.117, + "build/src/libcd2.o": 0.099, + "build/src/libetc.o": 0.101, + "build/src/libgpu.o": 0.11, + "build/src/libgpu2.o": 0.076, + "build/src/libgs1.o": 0.113, + "build/src/libgs2.o": 0.101, + "build/src/libgs3.o": 0.082, + "build/src/libgs4.o": 0.128, + "build/src/libgs5.o": 0.12, + "build/src/libgs6.o": 0.17, + "build/src/libgs7.o": 0.084, + "build/src/libgs8.o": 0.118, + "build/src/libgte1.o": 0.142, + "build/src/libgte10.o": 0.072, + "build/src/libgte11.o": 0.114, + "build/src/libgte12.o": 0.073, + "build/src/libgte13.o": 0.071, + "build/src/libgte14.o": 0.093, + "build/src/libgte15.o": 0.083, + "build/src/libgte16.o": 0.093, + "build/src/libgte17.o": 0.11, + "build/src/libgte18.o": 0.116, + "build/src/libgte19.o": 0.076, + "build/src/libgte2.o": 0.112, + "build/src/libgte20.o": 0.086, + "build/src/libgte21.o": 0.147, + "build/src/libgte22.o": 0.085, + "build/src/libgte23.o": 0.089, + "build/src/libgte24.o": 0.111, + "build/src/libgte25.o": 0.094, + "build/src/libgte26.o": 0.084, + "build/src/libgte27.o": 0.109, + "build/src/libgte28.o": 0.088, + "build/src/libgte29.o": 0.087, + "build/src/libgte3.o": 0.071, + "build/src/libgte30.o": 0.09, + "build/src/libgte4.o": 0.074, + "build/src/libgte5.o": 0.086, + "build/src/libgte6.o": 0.098, + "build/src/libgte7.o": 0.097, + "build/src/libgte8.o": 0.077, + "build/src/libgte9.o": 0.081, + "build/src/libmcrd1.o": 0.105, + "build/src/libmcrd2.o": 0.1, + "build/src/libpad1.o": 0.102, + "build/src/libpad2.o": 0.1, + "build/src/sgap.o": 0.108, + "build/src/sgap_2.o": 0.11, + "build/src/sgap_3.o": 0.078, + "build/src/sgap_4.o": 0.144, + "build/src/sgap_5.o": 0.096, + "build/src/sgap_6.o": 0.13, + "build/src/sgap_8.o": 0.114, + "build/src/snd1.o": 0.102, + "build/src/snd10.o": 0.118, + "build/src/snd11.o": 0.141, + "build/src/snd12.o": 0.126, + "build/src/snd2.o": 0.081, + "build/src/snd3.o": 0.08, + "build/src/snd4.o": 0.11, + "build/src/snd5.o": 0.071, + "build/src/snd6.o": 0.081, + "build/src/snd7.o": 0.093, + "build/src/snd8.o": 0.093, + "build/src/snd9.o": 0.08, + "build/src/ov_SC03_014/ov_SC03_014.o": 0.159, + "build/src/ov_SC03_014/ov_SC03_014_after.o": 0.658, + "build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o": 0.471, + "build/src/ov_SC03_014/ov_SC03_014_jr_80135888.o": 0.117, + "build/src/ov_SC03_014/ov_SC03_014_jr_80135A4C.o": 0.068, + "build/src/ov_SC03_014/ov_SC03_014_jr_80135D20.o": 0.251, + "build/src/ov_SC03_014/ov_SC03_014_jr_801380E0.o": 0.222, + "build/src/ov_SC03_014/ov_SC03_014_jr_8013C98C.o": 0.191, + "build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o": 0.12, + "build/src/ov_SC03_014/ov_SC03_014_jr_8013FFD8.o": 0.142, + "build/src/ov_SC03_014/ov_SC03_014_jr_80140608.o": 0.218, + "build/src/ov_SC03_014/ov_SC03_014_jr_8015444C.o": 0.144, + "build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o": 0.234, + "build/src/ov_SC03_014/ov_SC03_014_jr_801588CC.o": 0.145, + "build/src/ov_SC03_014/ov_SC03_014_jr_80159C84.o": 0.125, + "build/src/ov_SC03_014/ov_SC03_014_jr_8015A3C8.o": 0.112, + "build/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.o": 0.124, + "build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o": 0.612, + "build/src/ov_SC03_014/ov_SC03_014_jr_8016AB6C.o": 0.408, + "build/src/ov_SC03_014/ov_SC03_014_jr_80171B4C.o": 0.186, + "build/src/ov_SC03_014/ov_SC03_014_jr_801734BC.o": 0.254, + "build/src/ov_SC03_014/ov_SC03_014_jr_801789AC.o": 0.103, + "build/src/ov_SC03_014/ov_SC03_014_jr_80178D40.o": 0.152, + "build/src/ov_SC03_014/ov_SC03_014_jr_8017A4AC.o": 0.122, + "build/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.o": 0.235, + "build/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.o": 0.231, + "build/src/ov_SC03_014/ov_SC03_014_jr_80184440.o": 0.113, + "build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o": 0.414, + "build/src/ov_SC03_014/ov_SC03_014_o0b.o": 0.139, + "build/src/ov_SC03_014/ov_SC03_014_o0c.o": 0.084, + "build/src/ov_SC03_014/ov_SC03_014_o0d.o": 0.098, + "build/src/ov_SC03_014/ov_SC03_014_o0e.o": 0.099, + "build/src/ov_SC03_015/ov_SC03_015.o": 0.172, + "build/src/ov_SC03_015/ov_SC03_015_after.o": 0.721, + "build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o": 0.475, + "build/src/ov_SC03_015/ov_SC03_015_jr_80135888.o": 0.114, + "build/src/ov_SC03_015/ov_SC03_015_jr_80135A4C.o": 0.089, + "build/src/ov_SC03_015/ov_SC03_015_jr_80135D20.o": 0.157, + "build/src/ov_SC03_015/ov_SC03_015_jr_801380E0.o": 0.223, + "build/src/ov_SC03_015/ov_SC03_015_jr_8013C98C.o": 0.186, + "build/src/ov_SC03_015/ov_SC03_015_jr_8013F350.o": 0.093, + "build/src/ov_SC03_015/ov_SC03_015_jr_8013FFD8.o": 0.12, + "build/src/ov_SC03_015/ov_SC03_015_jr_80140608.o": 0.303, + "build/src/ov_SC03_015/ov_SC03_015_jr_8015444C.o": 0.097, + "build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o": 0.241, + "build/src/ov_SC03_015/ov_SC03_015_jr_801588CC.o": 0.142, + "build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o": 0.11, + "build/src/ov_SC03_015/ov_SC03_015_jr_8015A3C8.o": 0.122, + "build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o": 0.162, + "build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o": 0.617, + "build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o": 0.383, + "build/src/ov_SC03_015/ov_SC03_015_jr_80171B4C.o": 0.127, + "build/src/ov_SC03_015/ov_SC03_015_jr_801734BC.o": 0.28, + "build/src/ov_SC03_015/ov_SC03_015_jr_801789AC.o": 0.071, + "build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o": 0.199, + "build/src/ov_SC03_015/ov_SC03_015_jr_8017A4AC.o": 0.137, + "build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o": 0.207, + "build/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.o": 0.288, + "build/src/ov_SC03_015/ov_SC03_015_jr_80184440.o": 0.124, + "build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o": 0.384, + "build/src/ov_SC03_015/ov_SC03_015_o0b.o": 0.122, + "build/src/ov_SC03_015/ov_SC03_015_o0c.o": 0.102, "build/src/ov_SC03_015/ov_SC03_015_o0d.o": 0.119, - "build/src/ov_SC03_015/ov_SC03_015_o0e.o": 0.096, - "build/src/ov_SC04_011/ov_SC04_011.o": 0.216, - "build/src/ov_SC04_011/ov_SC04_011_after.o": 0.602, - "build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o": 0.532, - "build/src/ov_SC04_011/ov_SC04_011_jr_80135888.o": 0.106, - "build/src/ov_SC04_011/ov_SC04_011_jr_80135A4C.o": 0.07, - "build/src/ov_SC04_011/ov_SC04_011_jr_80135D20.o": 0.156, - "build/src/ov_SC04_011/ov_SC04_011_jr_801380E0.o": 0.261, - "build/src/ov_SC04_011/ov_SC04_011_jr_8013C98C.o": 0.177, - "build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o": 0.09, - "build/src/ov_SC04_011/ov_SC04_011_jr_8013FFD8.o": 0.14, - "build/src/ov_SC04_011/ov_SC04_011_jr_80140608.o": 0.23, - "build/src/ov_SC04_011/ov_SC04_011_jr_8015444C.o": 0.14, - "build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o": 0.237, - "build/src/ov_SC04_011/ov_SC04_011_jr_801588CC.o": 0.113, - "build/src/ov_SC04_011/ov_SC04_011_jr_80159C84.o": 0.086, - "build/src/ov_SC04_011/ov_SC04_011_jr_8015A3C8.o": 0.113, - "build/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.o": 0.157, - "build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o": 0.547, - "build/src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.o": 0.337, + "build/src/ov_SC03_015/ov_SC03_015_o0e.o": 0.131, + "build/src/ov_SC04_011/ov_SC04_011.o": 0.24, + "build/src/ov_SC04_011/ov_SC04_011_after.o": 0.67, + "build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o": 0.474, + "build/src/ov_SC04_011/ov_SC04_011_jr_80135888.o": 0.137, + "build/src/ov_SC04_011/ov_SC04_011_jr_80135A4C.o": 0.138, + "build/src/ov_SC04_011/ov_SC04_011_jr_80135D20.o": 0.172, + "build/src/ov_SC04_011/ov_SC04_011_jr_801380E0.o": 0.213, + "build/src/ov_SC04_011/ov_SC04_011_jr_8013C98C.o": 0.216, + "build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o": 0.136, + "build/src/ov_SC04_011/ov_SC04_011_jr_8013FFD8.o": 0.127, + "build/src/ov_SC04_011/ov_SC04_011_jr_80140608.o": 0.221, + "build/src/ov_SC04_011/ov_SC04_011_jr_8015444C.o": 0.127, + "build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o": 0.224, + "build/src/ov_SC04_011/ov_SC04_011_jr_801588CC.o": 0.159, + "build/src/ov_SC04_011/ov_SC04_011_jr_80159C84.o": 0.103, + "build/src/ov_SC04_011/ov_SC04_011_jr_8015A3C8.o": 0.108, + "build/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.o": 0.141, + "build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o": 0.602, + "build/src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.o": 0.321, "build/src/ov_SC04_011/ov_SC04_011_jr_80171B4C.o": 0.146, - "build/src/ov_SC04_011/ov_SC04_011_jr_801734BC.o": 0.267, - "build/src/ov_SC04_011/ov_SC04_011_jr_801789AC.o": 0.104, - "build/src/ov_SC04_011/ov_SC04_011_jr_80178D40.o": 0.152, - "build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.124, - "build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.149, - "build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.741, - "build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.081, - "build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.089 + "build/src/ov_SC04_011/ov_SC04_011_jr_801734BC.o": 0.266, + "build/src/ov_SC04_011/ov_SC04_011_jr_801789AC.o": 0.109, + "build/src/ov_SC04_011/ov_SC04_011_jr_80178D40.o": 0.133, + "build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.101, + "build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.179, + "build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.777, + "build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.088, + "build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.096 }, "ok": true, - "seconds": 3.9 + "seconds": 3.8 } diff --git a/.run/P36/delever/ledger.jsonl b/.run/P36/delever/ledger.jsonl index 518df060a..f10dbaa50 100644 --- a/.run/P36/delever/ledger.jsonl +++ b/.run/P36/delever/ledger.jsonl @@ -29365,3 +29365,4 @@ {"ts": "2026-09-11 00:36:12", "label": "s104_r31r35", "rung": "E", "calib": {"head": "65b0855c1", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_006/ov_SC06_006_jr_8017DB90.c", "fn": "func_801800B8", "addr": 2149056696, "aliases": null, "header": false, "includers": 0, "nhash_before": "ae46306a0ae9b638a04403b296f17fac4bdb5646", "nhash_after": "672ac01f157ccfbe9dd3edaffea45dd53873921b", "source": "delever_regen R35 drop-param-copy ctl->((Ctl801800B8 *)a0) @2", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.18, "objects": ["build/src/ov_SC06_006/ov_SC06_006_jr_8017DB90.o"], "before_text": "void func_801800B8(void *a0) {\n Ctl801800B8 *ctl = (Ctl801800B8 *)a0;\n Cmd801800B8 *p;\n u8 *obj;\n s32 t;\n s32 u;\n\n func_801802E0((s32 *)a0);\n\n u = ctl->unk0C;\n t = D_801861F0[(*(u16 *)((u8 *)D_801F8118 + 2)) * 5];\n D_801F80A4 = 0;\n D_801F8084 = 0;\n D_801F8088 = -1;\n D_801F808C = u;\n if (t != -1) {\n D_801F809C = t;\n }\n\n do { func_8017F5D0(); } while (0); // !FAKE: do-while \u2014 a LOOP-note scheduling barrier (sched.c:2058-2074; P36 R7)\n\n D_801F8090 = ctl->unk10;\n func_80180E68(ctl->unk04, ctl->unk10);\n\n D_801F8AEC = ctl->unk08;\n\n func_80129CF8();\n\n p = ctl->cmds;\n while (p->kind != -1) {\n obj = D_801F80AC[p->kind];\n switch (p->cmd) {\n case 0:\n func_8012E8A8(obj);\n *(s16 *)(obj + 0x98) = 0;\n *(s16 *)(obj + 0x34) = 0;\n break;\n case 1:\n func_8012E88C(obj);\n func_801802A0((s32)obj, p->arg,\n D_80185870[*(s16 *)(obj + 0x70)],\n D_801858A8[*(s16 *)(obj + 0x70)]);\n *(s16 *)(obj + 0x34) = 1;\n break;\n case 2:\n func_8012E88C(obj);\n func_8012A828((s32)obj, (void *)p->arg);\n *(s16 *)(obj + 0x34) = 2;\n break;\n case 3:\n *(s32 *)(obj + 0xDC) = p->arg;\n break;\n }\n p++;\n }\n}\n", "after_text": "void func_801800B8(void *a0) {\n Cmd801800B8 *p;\n u8 *obj;\n s32 t;\n s32 u;\n\n func_801802E0((s32 *)a0);\n\n u = ((Ctl801800B8 *)a0)->unk0C;\n t = D_801861F0[(*(u16 *)((u8 *)D_801F8118 + 2)) * 5];\n D_801F80A4 = 0;\n D_801F8084 = 0;\n D_801F8088 = -1;\n D_801F808C = u;\n if (t != -1) {\n D_801F809C = t;\n }\n\n func_8017F5D0();\n\n D_801F8090 = ((Ctl801800B8 *)a0)->unk10;\n func_80180E68(((Ctl801800B8 *)a0)->unk04, ((Ctl801800B8 *)a0)->unk10);\n\n D_801F8AEC = ((Ctl801800B8 *)a0)->unk08;\n\n func_80129CF8();\n\n p = ((Ctl801800B8 *)a0)->cmds;\n while (p->kind != -1) {\n obj = D_801F80AC[p->kind];\n switch (p->cmd) {\n case 0:\n func_8012E8A8(obj);\n *(s16 *)(obj + 0x98) = 0;\n *(s16 *)(obj + 0x34) = 0;\n break;\n case 1:\n func_8012E88C(obj);\n func_801802A0((s32)obj, p->arg,\n D_80185870[*(s16 *)(obj + 0x70)],\n D_801858A8[*(s16 *)(obj + 0x70)]);\n *(s16 *)(obj + 0x34) = 1;\n break;\n case 2:\n func_8012E88C(obj);\n func_8012A828((s32)obj, (void *)p->arg);\n *(s16 *)(obj + 0x34) = 2;\n break;\n case 3:\n *(s32 *)(obj + 0xDC) = p->arg;\n break;\n }\n p++;\n }\n}\n"} {"ts": "2026-09-11 00:36:15", "label": "s104_r31r35", "rung": "E", "calib": {"head": "65b0855c1", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_006/ov_SC06_006_jr_8017DB90.c", "fn": "func_8017E330", "addr": 2149049136, "aliases": null, "header": false, "includers": 0, "nhash_before": "d64d41a1b204313cdf05992f81148fa49a84405f", "nhash_after": "f38e1aaeb186eaba8e3c9abafc1ef6f1b18af6b2", "source": "delever_regen R31 shift-cast (s16) at all 3 shifts", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.198, "objects": ["build/src/ov_SC06_006/ov_SC06_006_jr_8017DB90.o"], "before_text": "void func_8017E330(Actor_8017E330 *a0) {\n Work_8017E330 v; /* sp+0x10 */\n Drv_8017E330 *p;\n s32 i;\n s32 t;\n\n p = (Drv_8017E330 *)D_801F80E4;\n if (p == NULL) {\n return;\n }\n\n a0->fDC = 0x200;\n i = a0->f70;\n\n if ((p->f02 == 1) && (p->f34 == 1)) {\n func_8012E88C((u8 *)a0);\n a0->f98 = 0;\n\n v.x = (D_801F8428[i].x * D_801F8090) >> 12;\n v.y = (D_801F8428[i].y * D_801F8090) >> 12;\n v.z = (D_801F8428[i].z * D_801F8090) >> 12;\n\n if (*(u16 *)((u8 *)D_801F8118 + 2) == 2) {\n func_8017F824(&v, 0x200);\n a0->f06 = v.x;\n a0->f0A = v.y;\n a0->f0E = v.z;\n /* The target keeps `lh` + `sra 3` (the UNCOMBINED extendhisi2_internal\n * form). At -O2 mips.md's extendhisi2 expander does\n * `if (optimize && MEM) force_not_mem`, so expand always emits\n * lhu + sll 16 + sra 16, and combine folds that back to a\n * `(sign_extend (mem))` == `lh` only to immediately re-fold it with\n * the `>> 3` into `sll 16 ; sra 19` (3 insns). Blocking that LAST\n * merge is what the target did: can_combine_p bails when i2 and i3\n * are non-adjacent AND memory was written between them\n * (combine.c use_crosses_set_p -> `mem_last_set > from_cuid`).\n * The split load/shift statements give the non-adjacency (the\n * `lw 0x20($s0)` sits between them); the zero-byte re-tie with a\n * \"memory\" clobber supplies the write. Byte-exact, emits nothing. */\n t = p->f20->rot.x;\n __asm__(\"\" : \"=r\"(t) : \"0\"(t) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n a0->f20->rot.x = t >> 3;\n t = p->f20->rot.y;\n __asm__(\"\" : \"=r\"(t) : \"0\"(t) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n a0->f20->rot.y = t >> 3;\n t = p->f20->rot.z;\n __asm__(\"\" : \"=r\"(t) : \"0\"(t) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n a0->f20->rot.z = t >> 3;\n } else {\n a0->f06 = v.x;\n a0->f0A = v.y;\n a0->f0E = v.z;\n a0->f20->rot = p->f20->rot; /* 8-byte align-2 copy: lwl/lwr + swl/swr */\n }\n\n a0->f20->f10 = D_801F8428[i].a;\n a0->f20->f12 = D_801F8428[i].b;\n a0->f20->f14 = D_801F8428[i].c;\n } else {\n func_8012E8A8((u8 *)a0);\n a0->f98 = 0;\n }\n}\n", "after_text": "void func_8017E330(Actor_8017E330 *a0) {\n Work_8017E330 v; /* sp+0x10 */\n Drv_8017E330 *p;\n s32 i;\n s32 t;\n\n p = (Drv_8017E330 *)D_801F80E4;\n if (p == NULL) {\n return;\n }\n\n a0->fDC = 0x200;\n i = a0->f70;\n\n if ((p->f02 == 1) && (p->f34 == 1)) {\n func_8012E88C((u8 *)a0);\n a0->f98 = 0;\n\n v.x = (D_801F8428[i].x * D_801F8090) >> 12;\n v.y = (D_801F8428[i].y * D_801F8090) >> 12;\n v.z = (D_801F8428[i].z * D_801F8090) >> 12;\n\n if (*(u16 *)((u8 *)D_801F8118 + 2) == 2) {\n func_8017F824(&v, 0x200);\n a0->f06 = v.x;\n a0->f0A = v.y;\n a0->f0E = v.z;\n /* The target keeps `lh` + `sra 3` (the UNCOMBINED extendhisi2_internal\n * form). At -O2 mips.md's extendhisi2 expander does\n * `if (optimize && MEM) force_not_mem`, so expand always emits\n * lhu + sll 16 + sra 16, and combine folds that back to a\n * `(sign_extend (mem))` == `lh` only to immediately re-fold it with\n * the `>> 3` into `sll 16 ; sra 19` (3 insns). Blocking that LAST\n * merge is what the target did: can_combine_p bails when i2 and i3\n * are non-adjacent AND memory was written between them\n * (combine.c use_crosses_set_p -> `mem_last_set > from_cuid`).\n * The split load/shift statements give the non-adjacency (the\n * `lw 0x20($s0)` sits between them); the zero-byte re-tie with a\n * \"memory\" clobber supplies the write. Byte-exact, emits nothing. */\n t = p->f20->rot.x;\n a0->f20->rot.x = (s16)t >> 3;\n t = p->f20->rot.y;\n a0->f20->rot.y = (s16)t >> 3;\n t = p->f20->rot.z;\n a0->f20->rot.z = (s16)t >> 3;\n } else {\n a0->f06 = v.x;\n a0->f0A = v.y;\n a0->f0E = v.z;\n a0->f20->rot = p->f20->rot; /* 8-byte align-2 copy: lwl/lwr + swl/swr */\n }\n\n a0->f20->f10 = D_801F8428[i].a;\n a0->f20->f12 = D_801F8428[i].b;\n a0->f20->f14 = D_801F8428[i].c;\n } else {\n func_8012E8A8((u8 *)a0);\n a0->f98 = 0;\n }\n}\n"} {"ts": "2026-09-11 00:36:18", "label": "s104_r31r35", "rung": "E", "calib": {"head": "65b0855c1", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_006/ov_SC06_006_jr_8017DB90.c", "fn": "func_8017E550", "addr": 2149049680, "aliases": null, "header": false, "includers": 0, "nhash_before": "624581e55918ffa3158c64e6028a7e371b46853e", "nhash_after": "93b0e3d3c919b5b84f69af250b17f43a0cb017f6", "source": "delever_regen R31 shift-cast (s16) at all 3 shifts", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.193, "objects": ["build/src/ov_SC06_006/ov_SC06_006_jr_8017DB90.o"], "before_text": "void func_8017E550(Actor_8017E550 *a0) {\n Work_8017E550 v;\n Drv_8017E550 *p;\n Pose_8017E550 *pp;\n s32 t;\n\n p = (Drv_8017E550 *)a0->f64;\n if (p == NULL) {\n return;\n }\n\n pp = (Pose_8017E550 *)D_80185F6C[a0->f70];\n\n if ((p->f02 == 1) && (p->f34 == 1)) {\n func_8012E88C((u8 *)a0);\n a0->f98 = 0;\n\n v.x = (pp->x * D_801F8090) >> 12;\n v.y = (pp->y * D_801F8090) >> 12;\n v.z = (pp->z * D_801F8090) >> 12;\n\n if (*(u16 *)((u8 *)D_801F8118 + 2) == 2) {\n func_8017F824(&v, 0x200);\n a0->f06 = v.x;\n a0->f0A = v.y;\n a0->f0E = v.z;\n t = p->f20->rot.x;\n __asm__(\"\" : \"=r\"(t) : \"0\"(t) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n a0->f20->rot.x = t >> 3;\n t = p->f20->rot.y;\n __asm__(\"\" : \"=r\"(t) : \"0\"(t) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n a0->f20->rot.y = t >> 3;\n t = p->f20->rot.z;\n __asm__(\"\" : \"=r\"(t) : \"0\"(t) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n a0->f20->rot.z = t >> 3;\n } else {\n a0->f06 = v.x;\n a0->f0A = v.y;\n a0->f0E = v.z;\n a0->f20->rot = p->f20->rot;\n }\n\n a0->f20->f10 = pp->a;\n a0->f20->f12 = pp->b;\n a0->f20->f14 = pp->c;\n } else {\n func_8012E8A8((u8 *)a0);\n a0->f98 = 0;\n }\n}\n", "after_text": "void func_8017E550(Actor_8017E550 *a0) {\n Work_8017E550 v;\n Drv_8017E550 *p;\n Pose_8017E550 *pp;\n s32 t;\n\n p = (Drv_8017E550 *)a0->f64;\n if (p == NULL) {\n return;\n }\n\n pp = (Pose_8017E550 *)D_80185F6C[a0->f70];\n\n if ((p->f02 == 1) && (p->f34 == 1)) {\n func_8012E88C((u8 *)a0);\n a0->f98 = 0;\n\n v.x = (pp->x * D_801F8090) >> 12;\n v.y = (pp->y * D_801F8090) >> 12;\n v.z = (pp->z * D_801F8090) >> 12;\n\n if (*(u16 *)((u8 *)D_801F8118 + 2) == 2) {\n func_8017F824(&v, 0x200);\n a0->f06 = v.x;\n a0->f0A = v.y;\n a0->f0E = v.z;\n t = p->f20->rot.x;\n a0->f20->rot.x = (s16)t >> 3;\n t = p->f20->rot.y;\n a0->f20->rot.y = (s16)t >> 3;\n t = p->f20->rot.z;\n a0->f20->rot.z = (s16)t >> 3;\n } else {\n a0->f06 = v.x;\n a0->f0A = v.y;\n a0->f0E = v.z;\n a0->f20->rot = p->f20->rot;\n }\n\n a0->f20->f10 = pp->a;\n a0->f20->f12 = pp->b;\n a0->f20->f14 = pp->c;\n } else {\n func_8012E8A8((u8 *)a0);\n a0->f98 = 0;\n }\n}\n"} +{"ts": "2026-09-11 00:42:28", "label": "s104_e1", "rung": "E", "calib": {"head": "74657a03b", "stamp": "15956e4a96c4"}, "tu": "src/md_SC07_004/md_SC07_004.c", "fn": "func_801AB818", "addr": 2149234712, "aliases": null, "header": false, "includers": 0, "nhash_before": "e7e5db288102da5485911009cd95e11c51020c31", "nhash_after": "9cfa6a0187dbc2d273412cbeef6acf0f530c744a", "source": ".run/P36/agents/md_SC07_004__func_801AB818/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.571, "objects": ["build/src/md_SC07_004/md_SC07_004.o"], "before_text": "void func_801AB818(void *a0) {\n u8 *s1 = *(u8 **)((s32)a0 + 0x24);\n\n if (*(s32 *)((s32)a0 + 0x1C) != 0) {\n U16x2N tmp;\n s32 cur;\n s32 addend;\n\n *(s32 *)((s32)a0 + 0x1C) -= 1;\n func_801A8440((s32)a0);\n\n *(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x18) -= 0x370;\n *(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x1A) = *(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x18);\n\n cur = *(s32 *)(s1 + 0);\n addend = *(s32 *)((s32)a0 + 0x30);\n *(s32 *)&tmp = cur;\n /* \u00a722-ADDENDUM: a plain memory clobber, not `volatile`. It defeats\n * flow.c's last_mem_set dead-store rule so the FIRST store to the\n * temp survives, without pinning either store's schedule. Without\n * it the target's `sw $v0,0x10($sp)` at idx 24 is deleted. */\n __asm__(\"\" ::: \"memory\"); // !FAKE: barrier memory \u2014 NEEDED DIFFERS (P36 rung B tus9)\n *(s32 *)&tmp = cur + addend;\n *(U16x2N *)(s1 + 0) = tmp;\n } else {\n func_801292C8((u8 *)a0);\n }\n}\n", "after_text": "void func_801AB818(void *a0) {\n u8 *s1 = *(u8 **)((s32)a0 + 0x24);\n\n if (*(s32 *)((s32)a0 + 0x1C) != 0) {\n U16x2N tmp;\n\n *(s32 *)((s32)a0 + 0x1C) -= 1;\n func_801A8440((s32)a0);\n\n *(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x18) -= 0x370;\n *(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x1A) = *(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x18);\n\n /* tmp is stored twice and the target keeps both stores: the addend read between them resets flow.c's\n * last_mem_set; as ((s32 *)a0)[12] it is an in-struct access, which sched1 hoists above the frame store. */\n *(s32 *)&tmp = *(s32 *)(s1 + 0);\n *(s32 *)&tmp += ((s32 *)a0)[12];\n *(U16x2N *)(s1 + 0) = tmp;\n } else {\n func_801292C8((u8 *)a0);\n }\n}\n"} diff --git a/src/md_SC07_004/md_SC07_004.c b/src/md_SC07_004/md_SC07_004.c index faeb4d9cc..6c6280192 100644 --- a/src/md_SC07_004/md_SC07_004.c +++ b/src/md_SC07_004/md_SC07_004.c @@ -7960,8 +7960,6 @@ void func_801AB818(void *a0) { if (*(s32 *)((s32)a0 + 0x1C) != 0) { U16x2N tmp; - s32 cur; - s32 addend; *(s32 *)((s32)a0 + 0x1C) -= 1; func_801A8440((s32)a0); @@ -7969,15 +7967,10 @@ void func_801AB818(void *a0) { *(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x18) -= 0x370; *(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x1A) = *(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x18); - cur = *(s32 *)(s1 + 0); - addend = *(s32 *)((s32)a0 + 0x30); - *(s32 *)&tmp = cur; - /* §22-ADDENDUM: a plain memory clobber, not `volatile`. It defeats - * flow.c's last_mem_set dead-store rule so the FIRST store to the - * temp survives, without pinning either store's schedule. Without - * it the target's `sw $v0,0x10($sp)` at idx 24 is deleted. */ - __asm__("" ::: "memory"); // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus9) - *(s32 *)&tmp = cur + addend; + /* tmp is stored twice and the target keeps both stores: the addend read between them resets flow.c's + * last_mem_set; as ((s32 *)a0)[12] it is an in-struct access, which sched1 hoists above the frame store. */ + *(s32 *)&tmp = *(s32 *)(s1 + 0); + *(s32 *)&tmp += ((s32 *)a0)[12]; *(U16x2N *)(s1 + 0) = tmp; } else { func_801292C8((u8 *)a0);