diff --git a/src/ov_SC01_000/ov_SC01_000_jr_8015AE2C.c b/src/ov_SC01_000/ov_SC01_000_jr_8015AE2C.c
index 155ceb43da..b06f87a9c8 100644
--- a/src/ov_SC01_000/ov_SC01_000_jr_8015AE2C.c
+++ b/src/ov_SC01_000/ov_SC01_000_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC01_000/nonmatchings/ov_SC01_000_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801A4680;
+extern u8 D_801A4681;
+extern u8 D_801A4682;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801A4680;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801A4681 != 0) {
+        D_801A4681 -= 0x10;
+    }
+    if (D_801A4682 != 0) {
+        D_801A4682 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80181828[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801A46C0;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801A46C0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC01_001/ov_SC01_001_jr_8015AE2C.c b/src/ov_SC01_001/ov_SC01_001_jr_8015AE2C.c
index 8f0403a917..8684e408ee 100644
--- a/src/ov_SC01_001/ov_SC01_001_jr_8015AE2C.c
+++ b/src/ov_SC01_001/ov_SC01_001_jr_8015AE2C.c
@@ -4350,7 +4350,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC01_001/nonmatchings/ov_SC01_001_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801EC910;
+extern u8 D_801EC911;
+extern u8 D_801EC912;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801EC910;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801EC911 != 0) {
+        D_801EC911 -= 0x10;
+    }
+    if (D_801EC912 != 0) {
+        D_801EC912 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80186478[])(void);
@@ -4435,7 +4456,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801EC950;
 
 void func_801651B8(void * param_1)
@@ -4445,14 +4466,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801EC950;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC01_004/ov_SC01_004_jr_8015AE2C.c b/src/ov_SC01_004/ov_SC01_004_jr_8015AE2C.c
index 9a06ddc3e7..fb108ae71b 100644
--- a/src/ov_SC01_004/ov_SC01_004_jr_8015AE2C.c
+++ b/src/ov_SC01_004/ov_SC01_004_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC01_004/nonmatchings/ov_SC01_004_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8018F078;
+extern u8 D_8018F079;
+extern u8 D_8018F07A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8018F078;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8018F079 != 0) {
+        D_8018F079 -= 0x10;
+    }
+    if (D_8018F07A != 0) {
+        D_8018F07A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80181E3C[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8018F0B8;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8018F0B8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC01_005/ov_SC01_005_jr_8015AE2C.c b/src/ov_SC01_005/ov_SC01_005_jr_8015AE2C.c
index 225a70a47f..2bea7cbbb4 100644
--- a/src/ov_SC01_005/ov_SC01_005_jr_8015AE2C.c
+++ b/src/ov_SC01_005/ov_SC01_005_jr_8015AE2C.c
@@ -4353,7 +4353,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC01_005/nonmatchings/ov_SC01_005_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801CC7D8;
+extern u8 D_801CC7D9;
+extern u8 D_801CC7DA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801CC7D8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801CC7D9 != 0) {
+        D_801CC7D9 -= 0x10;
+    }
+    if (D_801CC7DA != 0) {
+        D_801CC7DA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80184FD0[])(void);
@@ -4438,7 +4459,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801CC818;
 
 void func_801651B8(void * param_1)
@@ -4448,14 +4469,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801CC818;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC01_006/ov_SC01_006_jr_8015AE2C.c b/src/ov_SC01_006/ov_SC01_006_jr_8015AE2C.c
index a16e3c173d..ef483b1c3d 100644
--- a/src/ov_SC01_006/ov_SC01_006_jr_8015AE2C.c
+++ b/src/ov_SC01_006/ov_SC01_006_jr_8015AE2C.c
@@ -4353,7 +4353,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC01_006/nonmatchings/ov_SC01_006_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801CC7D8;
+extern u8 D_801CC7D9;
+extern u8 D_801CC7DA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801CC7D8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801CC7D9 != 0) {
+        D_801CC7D9 -= 0x10;
+    }
+    if (D_801CC7DA != 0) {
+        D_801CC7DA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80184FD0[])(void);
@@ -4438,7 +4459,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801CC818;
 
 void func_801651B8(void * param_1)
@@ -4448,14 +4469,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801CC818;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC01_008/ov_SC01_008_jr_8015AE2C.c b/src/ov_SC01_008/ov_SC01_008_jr_8015AE2C.c
index 4019927293..16e3c183a3 100644
--- a/src/ov_SC01_008/ov_SC01_008_jr_8015AE2C.c
+++ b/src/ov_SC01_008/ov_SC01_008_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC01_008/nonmatchings/ov_SC01_008_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801A2288;
+extern u8 D_801A2289;
+extern u8 D_801A228A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801A2288;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801A2289 != 0) {
+        D_801A2289 -= 0x10;
+    }
+    if (D_801A228A != 0) {
+        D_801A228A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801823B0[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801A22C8;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801A22C8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC01_009/ov_SC01_009_jr_8015AE2C.c b/src/ov_SC01_009/ov_SC01_009_jr_8015AE2C.c
index bf09bfd399..7bc5c1fdba 100644
--- a/src/ov_SC01_009/ov_SC01_009_jr_8015AE2C.c
+++ b/src/ov_SC01_009/ov_SC01_009_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC01_009/nonmatchings/ov_SC01_009_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801F20E8;
+extern u8 D_801F20E9;
+extern u8 D_801F20EA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801F20E8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801F20E9 != 0) {
+        D_801F20E9 -= 0x10;
+    }
+    if (D_801F20EA != 0) {
+        D_801F20EA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80185598[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801F2128;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801F2128;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC01_074/ov_SC01_074_jr_8015AE2C.c b/src/ov_SC01_074/ov_SC01_074_jr_8015AE2C.c
index f9893b6181..34af5cda0a 100644
--- a/src/ov_SC01_074/ov_SC01_074_jr_8015AE2C.c
+++ b/src/ov_SC01_074/ov_SC01_074_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC01_074/nonmatchings/ov_SC01_074_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8019AB68;
+extern u8 D_8019AB69;
+extern u8 D_8019AB6A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8019AB68;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8019AB69 != 0) {
+        D_8019AB69 -= 0x10;
+    }
+    if (D_8019AB6A != 0) {
+        D_8019AB6A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80181218[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8019ABA8;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8019ABA8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC01_080/ov_SC01_080_jr_8015AE2C.c b/src/ov_SC01_080/ov_SC01_080_jr_8015AE2C.c
index 41e672c6f7..7f77c0042e 100644
--- a/src/ov_SC01_080/ov_SC01_080_jr_8015AE2C.c
+++ b/src/ov_SC01_080/ov_SC01_080_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC01_080/nonmatchings/ov_SC01_080_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801C4998;
+extern u8 D_801C4999;
+extern u8 D_801C499A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801C4998;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801C4999 != 0) {
+        D_801C4999 -= 0x10;
+    }
+    if (D_801C499A != 0) {
+        D_801C499A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80186178[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801C49D8;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801C49D8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC01_084/ov_SC01_084_jr_8015AE2C.c b/src/ov_SC01_084/ov_SC01_084_jr_8015AE2C.c
index 900411925b..930a0a902b 100644
--- a/src/ov_SC01_084/ov_SC01_084_jr_8015AE2C.c
+++ b/src/ov_SC01_084/ov_SC01_084_jr_8015AE2C.c
@@ -4351,7 +4351,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC01_084/nonmatchings/ov_SC01_084_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801C6440;
+extern u8 D_801C6441;
+extern u8 D_801C6442;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801C6440;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801C6441 != 0) {
+        D_801C6441 -= 0x10;
+    }
+    if (D_801C6442 != 0) {
+        D_801C6442 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018946C[])(void);
@@ -4436,7 +4457,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801C6480;
 
 void func_801651B8(void * param_1)
@@ -4446,14 +4467,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801C6480;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC02_000/ov_SC02_000_jr_8015AE2C.c b/src/ov_SC02_000/ov_SC02_000_jr_8015AE2C.c
index c06cef7801..cca0a8f9f5 100644
--- a/src/ov_SC02_000/ov_SC02_000_jr_8015AE2C.c
+++ b/src/ov_SC02_000/ov_SC02_000_jr_8015AE2C.c
@@ -4350,7 +4350,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801E6F70;
+extern u8 D_801E6F71;
+extern u8 D_801E6F72;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801E6F70;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801E6F71 != 0) {
+        D_801E6F71 -= 0x10;
+    }
+    if (D_801E6F72 != 0) {
+        D_801E6F72 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018D81C[])(void);
@@ -4435,7 +4456,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801E6FB0;
 
 void func_801651B8(void * param_1)
@@ -4445,14 +4466,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801E6FB0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC02_003/ov_SC02_003_jr_8015AE2C.c b/src/ov_SC02_003/ov_SC02_003_jr_8015AE2C.c
index 73965c287a..c9ade857fd 100644
--- a/src/ov_SC02_003/ov_SC02_003_jr_8015AE2C.c
+++ b/src/ov_SC02_003/ov_SC02_003_jr_8015AE2C.c
@@ -4350,7 +4350,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC02_003/nonmatchings/ov_SC02_003_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801E6F70;
+extern u8 D_801E6F71;
+extern u8 D_801E6F72;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801E6F70;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801E6F71 != 0) {
+        D_801E6F71 -= 0x10;
+    }
+    if (D_801E6F72 != 0) {
+        D_801E6F72 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018D81C[])(void);
@@ -4435,7 +4456,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801E6FB0;
 
 void func_801651B8(void * param_1)
@@ -4445,14 +4466,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801E6FB0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC02_004/ov_SC02_004_jr_8015AE2C.c b/src/ov_SC02_004/ov_SC02_004_jr_8015AE2C.c
index 13f911b6cb..b9c68e1d33 100644
--- a/src/ov_SC02_004/ov_SC02_004_jr_8015AE2C.c
+++ b/src/ov_SC02_004/ov_SC02_004_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC02_004/nonmatchings/ov_SC02_004_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801951C0;
+extern u8 D_801951C1;
+extern u8 D_801951C2;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801951C0;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801951C1 != 0) {
+        D_801951C1 -= 0x10;
+    }
+    if (D_801951C2 != 0) {
+        D_801951C2 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801808FC[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_80195200;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_80195200;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC02_005/ov_SC02_005_jr_8015AE2C.c b/src/ov_SC02_005/ov_SC02_005_jr_8015AE2C.c
index f500e1f45b..a182df5b58 100644
--- a/src/ov_SC02_005/ov_SC02_005_jr_8015AE2C.c
+++ b/src/ov_SC02_005/ov_SC02_005_jr_8015AE2C.c
@@ -4350,7 +4350,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801E3238;
+extern u8 D_801E3239;
+extern u8 D_801E323A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801E3238;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801E3239 != 0) {
+        D_801E3239 -= 0x10;
+    }
+    if (D_801E323A != 0) {
+        D_801E323A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80193500[])(void);
@@ -4435,7 +4456,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801E3278;
 
 void func_801651B8(void * param_1)
@@ -4445,14 +4466,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801E3278;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC02_011/ov_SC02_011_jr_8015AE2C.c b/src/ov_SC02_011/ov_SC02_011_jr_8015AE2C.c
index b564d0197e..6ac75b807f 100644
--- a/src/ov_SC02_011/ov_SC02_011_jr_8015AE2C.c
+++ b/src/ov_SC02_011/ov_SC02_011_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC02_011/nonmatchings/ov_SC02_011_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801EA118;
+extern u8 D_801EA119;
+extern u8 D_801EA11A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801EA118;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801EA119 != 0) {
+        D_801EA119 -= 0x10;
+    }
+    if (D_801EA11A != 0) {
+        D_801EA11A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80193950[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801EA158;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801EA158;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC02_015/ov_SC02_015_jr_8015AE2C.c b/src/ov_SC02_015/ov_SC02_015_jr_8015AE2C.c
index 5c15879363..901e857f4b 100644
--- a/src/ov_SC02_015/ov_SC02_015_jr_8015AE2C.c
+++ b/src/ov_SC02_015/ov_SC02_015_jr_8015AE2C.c
@@ -4350,7 +4350,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC02_015/nonmatchings/ov_SC02_015_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8018F298;
+extern u8 D_8018F299;
+extern u8 D_8018F29A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8018F298;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8018F299 != 0) {
+        D_8018F299 -= 0x10;
+    }
+    if (D_8018F29A != 0) {
+        D_8018F29A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80180E64[])(void);
@@ -4435,7 +4456,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8018F2D8;
 
 void func_801651B8(void * param_1)
@@ -4445,14 +4466,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8018F2D8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC02_016/ov_SC02_016_jr_8015AE2C.c b/src/ov_SC02_016/ov_SC02_016_jr_8015AE2C.c
index 7de059e056..d6fe533bce 100644
--- a/src/ov_SC02_016/ov_SC02_016_jr_8015AE2C.c
+++ b/src/ov_SC02_016/ov_SC02_016_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC02_016/nonmatchings/ov_SC02_016_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801B2EB0;
+extern u8 D_801B2EB1;
+extern u8 D_801B2EB2;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801B2EB0;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801B2EB1 != 0) {
+        D_801B2EB1 -= 0x10;
+    }
+    if (D_801B2EB2 != 0) {
+        D_801B2EB2 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018709C[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801B2EF0;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801B2EF0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC02_017/ov_SC02_017_jr_8015AE2C.c b/src/ov_SC02_017/ov_SC02_017_jr_8015AE2C.c
index d32a292d6d..555dec7f5a 100644
--- a/src/ov_SC02_017/ov_SC02_017_jr_8015AE2C.c
+++ b/src/ov_SC02_017/ov_SC02_017_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801EE6D8;
+extern u8 D_801EE6D9;
+extern u8 D_801EE6DA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801EE6D8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801EE6D9 != 0) {
+        D_801EE6D9 -= 0x10;
+    }
+    if (D_801EE6DA != 0) {
+        D_801EE6DA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018D0F4[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801EE718;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801EE718;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC02_021/ov_SC02_021_jr_8015AE2C.c b/src/ov_SC02_021/ov_SC02_021_jr_8015AE2C.c
index 3e4df706ad..8fc49d428c 100644
--- a/src/ov_SC02_021/ov_SC02_021_jr_8015AE2C.c
+++ b/src/ov_SC02_021/ov_SC02_021_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC02_021/nonmatchings/ov_SC02_021_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_80191C48;
+extern u8 D_80191C49;
+extern u8 D_80191C4A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_80191C48;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_80191C49 != 0) {
+        D_80191C49 -= 0x10;
+    }
+    if (D_80191C4A != 0) {
+        D_80191C4A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801826E8[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_80191C88;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_80191C88;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC02_026/ov_SC02_026_jr_8015AE2C.c b/src/ov_SC02_026/ov_SC02_026_jr_8015AE2C.c
index 20be7b11aa..524d42b42b 100644
--- a/src/ov_SC02_026/ov_SC02_026_jr_8015AE2C.c
+++ b/src/ov_SC02_026/ov_SC02_026_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801CF088;
+extern u8 D_801CF089;
+extern u8 D_801CF08A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801CF088;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801CF089 != 0) {
+        D_801CF089 -= 0x10;
+    }
+    if (D_801CF08A != 0) {
+        D_801CF08A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80188D3C[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801CF0C8;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801CF0C8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC02_027/ov_SC02_027_jr_8015AE2C.c b/src/ov_SC02_027/ov_SC02_027_jr_8015AE2C.c
index e072a1e4f1..5cd4b9032e 100644
--- a/src/ov_SC02_027/ov_SC02_027_jr_8015AE2C.c
+++ b/src/ov_SC02_027/ov_SC02_027_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801D8DF8;
+extern u8 D_801D8DF9;
+extern u8 D_801D8DFA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801D8DF8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801D8DF9 != 0) {
+        D_801D8DF9 -= 0x10;
+    }
+    if (D_801D8DFA != 0) {
+        D_801D8DFA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018DE60[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801D8E38;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801D8E38;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC02_028/ov_SC02_028_jr_8015AE2C.c b/src/ov_SC02_028/ov_SC02_028_jr_8015AE2C.c
index 0bfd8fcbcc..f6a5071baa 100644
--- a/src/ov_SC02_028/ov_SC02_028_jr_8015AE2C.c
+++ b/src/ov_SC02_028/ov_SC02_028_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC02_028/nonmatchings/ov_SC02_028_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801D1D98;
+extern u8 D_801D1D99;
+extern u8 D_801D1D9A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801D1D98;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801D1D99 != 0) {
+        D_801D1D99 -= 0x10;
+    }
+    if (D_801D1D9A != 0) {
+        D_801D1D9A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018E064[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801D1DD8;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801D1DD8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC02_031/ov_SC02_031_jr_8015AE2C.c b/src/ov_SC02_031/ov_SC02_031_jr_8015AE2C.c
index 583d50c288..393dc25072 100644
--- a/src/ov_SC02_031/ov_SC02_031_jr_8015AE2C.c
+++ b/src/ov_SC02_031/ov_SC02_031_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC02_031/nonmatchings/ov_SC02_031_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801B6510;
+extern u8 D_801B6511;
+extern u8 D_801B6512;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801B6510;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801B6511 != 0) {
+        D_801B6511 -= 0x10;
+    }
+    if (D_801B6512 != 0) {
+        D_801B6512 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80187890[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801B6550;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801B6550;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC02_035/ov_SC02_035_jr_8015AE2C.c b/src/ov_SC02_035/ov_SC02_035_jr_8015AE2C.c
index 91a631f083..d43948cd4a 100644
--- a/src/ov_SC02_035/ov_SC02_035_jr_8015AE2C.c
+++ b/src/ov_SC02_035/ov_SC02_035_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC02_035/nonmatchings/ov_SC02_035_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801BD840;
+extern u8 D_801BD841;
+extern u8 D_801BD842;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801BD840;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801BD841 != 0) {
+        D_801BD841 -= 0x10;
+    }
+    if (D_801BD842 != 0) {
+        D_801BD842 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801870F0[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801BD880;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801BD880;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC02_039/ov_SC02_039_jr_8015AE2C.c b/src/ov_SC02_039/ov_SC02_039_jr_8015AE2C.c
index 0b1077eb14..f0ab3102d2 100644
--- a/src/ov_SC02_039/ov_SC02_039_jr_8015AE2C.c
+++ b/src/ov_SC02_039/ov_SC02_039_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC02_039/nonmatchings/ov_SC02_039_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8019FBF0;
+extern u8 D_8019FBF1;
+extern u8 D_8019FBF2;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8019FBF0;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8019FBF1 != 0) {
+        D_8019FBF1 -= 0x10;
+    }
+    if (D_8019FBF2 != 0) {
+        D_8019FBF2 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80181D1C[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8019FC30;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8019FC30;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC02_041/ov_SC02_041_jr_8015AE2C.c b/src/ov_SC02_041/ov_SC02_041_jr_8015AE2C.c
index c15f9520b4..1ddee9701f 100644
--- a/src/ov_SC02_041/ov_SC02_041_jr_8015AE2C.c
+++ b/src/ov_SC02_041/ov_SC02_041_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801B7F68;
+extern u8 D_801B7F69;
+extern u8 D_801B7F6A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801B7F68;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801B7F69 != 0) {
+        D_801B7F69 -= 0x10;
+    }
+    if (D_801B7F6A != 0) {
+        D_801B7F6A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801879EC[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801B7FA8;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801B7FA8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_001/ov_SC03_001_jr_8015AE2C.c b/src/ov_SC03_001/ov_SC03_001_jr_8015AE2C.c
index c4d55a12a9..ea47432517 100644
--- a/src/ov_SC03_001/ov_SC03_001_jr_8015AE2C.c
+++ b/src/ov_SC03_001/ov_SC03_001_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_001/nonmatchings/ov_SC03_001_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801ED5E8;
+extern u8 D_801ED5E9;
+extern u8 D_801ED5EA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801ED5E8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801ED5E9 != 0) {
+        D_801ED5E9 -= 0x10;
+    }
+    if (D_801ED5EA != 0) {
+        D_801ED5EA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8019012C[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801ED628;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801ED628;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_002/ov_SC03_002_jr_8015AE2C.c b/src/ov_SC03_002/ov_SC03_002_jr_8015AE2C.c
index eb2d35098f..056db19c1b 100644
--- a/src/ov_SC03_002/ov_SC03_002_jr_8015AE2C.c
+++ b/src/ov_SC03_002/ov_SC03_002_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_002/nonmatchings/ov_SC03_002_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801CA668;
+extern u8 D_801CA669;
+extern u8 D_801CA66A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801CA668;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801CA669 != 0) {
+        D_801CA669 -= 0x10;
+    }
+    if (D_801CA66A != 0) {
+        D_801CA66A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018811C[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801CA6A8;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801CA6A8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_003/ov_SC03_003_jr_8015AE2C.c b/src/ov_SC03_003/ov_SC03_003_jr_8015AE2C.c
index 12b4f79cc3..893c8b03aa 100644
--- a/src/ov_SC03_003/ov_SC03_003_jr_8015AE2C.c
+++ b/src/ov_SC03_003/ov_SC03_003_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_003/nonmatchings/ov_SC03_003_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8018E970;
+extern u8 D_8018E971;
+extern u8 D_8018E972;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8018E970;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8018E971 != 0) {
+        D_8018E971 -= 0x10;
+    }
+    if (D_8018E972 != 0) {
+        D_8018E972 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80181EE4[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8018E9B0;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8018E9B0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_006/ov_SC03_006_jr_8015AE2C.c b/src/ov_SC03_006/ov_SC03_006_jr_8015AE2C.c
index 72bb66cc20..028a59e087 100644
--- a/src/ov_SC03_006/ov_SC03_006_jr_8015AE2C.c
+++ b/src/ov_SC03_006/ov_SC03_006_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_006/nonmatchings/ov_SC03_006_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801F62E8;
+extern u8 D_801F62E9;
+extern u8 D_801F62EA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801F62E8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801F62E9 != 0) {
+        D_801F62E9 -= 0x10;
+    }
+    if (D_801F62EA != 0) {
+        D_801F62EA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018F200[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801F6328;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801F6328;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_007/ov_SC03_007_jr_8015AE2C.c b/src/ov_SC03_007/ov_SC03_007_jr_8015AE2C.c
index 64e1eec9f6..29072f98ff 100644
--- a/src/ov_SC03_007/ov_SC03_007_jr_8015AE2C.c
+++ b/src/ov_SC03_007/ov_SC03_007_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_007/nonmatchings/ov_SC03_007_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801E8C40;
+extern u8 D_801E8C41;
+extern u8 D_801E8C42;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801E8C40;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801E8C41 != 0) {
+        D_801E8C41 -= 0x10;
+    }
+    if (D_801E8C42 != 0) {
+        D_801E8C42 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80189FF8[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801E8C80;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801E8C80;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_010/ov_SC03_010_jr_8015AE2C.c b/src/ov_SC03_010/ov_SC03_010_jr_8015AE2C.c
index 6854bd32d3..09832e84c2 100644
--- a/src/ov_SC03_010/ov_SC03_010_jr_8015AE2C.c
+++ b/src/ov_SC03_010/ov_SC03_010_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_010/nonmatchings/ov_SC03_010_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8019EEA0;
+extern u8 D_8019EEA1;
+extern u8 D_8019EEA2;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8019EEA0;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8019EEA1 != 0) {
+        D_8019EEA1 -= 0x10;
+    }
+    if (D_8019EEA2 != 0) {
+        D_8019EEA2 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80182B18[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8019EEE0;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8019EEE0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_011/ov_SC03_011_jr_8015AE2C.c b/src/ov_SC03_011/ov_SC03_011_jr_8015AE2C.c
index 6a26e62f58..2a7bc67b82 100644
--- a/src/ov_SC03_011/ov_SC03_011_jr_8015AE2C.c
+++ b/src/ov_SC03_011/ov_SC03_011_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_011/nonmatchings/ov_SC03_011_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801A1138;
+extern u8 D_801A1139;
+extern u8 D_801A113A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801A1138;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801A1139 != 0) {
+        D_801A1139 -= 0x10;
+    }
+    if (D_801A113A != 0) {
+        D_801A113A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80183E88[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801A1178;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801A1178;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_012/ov_SC03_012_jr_8015AE2C.c b/src/ov_SC03_012/ov_SC03_012_jr_8015AE2C.c
index a3ab4f1add..2faf44e89e 100644
--- a/src/ov_SC03_012/ov_SC03_012_jr_8015AE2C.c
+++ b/src/ov_SC03_012/ov_SC03_012_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_012/nonmatchings/ov_SC03_012_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_80193F58;
+extern u8 D_80193F59;
+extern u8 D_80193F5A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_80193F58;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_80193F59 != 0) {
+        D_80193F59 -= 0x10;
+    }
+    if (D_80193F5A != 0) {
+        D_80193F5A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80180D68[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_80193F98;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_80193F98;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_013/ov_SC03_013_jr_8015AE2C.c b/src/ov_SC03_013/ov_SC03_013_jr_8015AE2C.c
index 071a170e68..214e41b2d2 100644
--- a/src/ov_SC03_013/ov_SC03_013_jr_8015AE2C.c
+++ b/src/ov_SC03_013/ov_SC03_013_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_013/nonmatchings/ov_SC03_013_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801AC228;
+extern u8 D_801AC229;
+extern u8 D_801AC22A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801AC228;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801AC229 != 0) {
+        D_801AC229 -= 0x10;
+    }
+    if (D_801AC22A != 0) {
+        D_801AC22A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80183B50[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801AC268;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801AC268;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.c b/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.c
index d4c5591797..d032013166 100644
--- a/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.c
+++ b/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801E97A8;
+extern u8 D_801E97A9;
+extern u8 D_801E97AA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801E97A8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801E97A9 != 0) {
+        D_801E97A9 -= 0x10;
+    }
+    if (D_801E97AA != 0) {
+        D_801E97AA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018E18C[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801E97E8;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801E97E8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.c b/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.c
index 666c0fe29c..7e2451fa79 100644
--- a/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.c
+++ b/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801E97A8;
+extern u8 D_801E97A9;
+extern u8 D_801E97AA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801E97A8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801E97A9 != 0) {
+        D_801E97A9 -= 0x10;
+    }
+    if (D_801E97AA != 0) {
+        D_801E97AA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018E18C[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801E97E8;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801E97E8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_023/ov_SC03_023_jr_8015AE2C.c b/src/ov_SC03_023/ov_SC03_023_jr_8015AE2C.c
index ee1c2e289b..6312500b5d 100644
--- a/src/ov_SC03_023/ov_SC03_023_jr_8015AE2C.c
+++ b/src/ov_SC03_023/ov_SC03_023_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_023/nonmatchings/ov_SC03_023_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_80197B80;
+extern u8 D_80197B81;
+extern u8 D_80197B82;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_80197B80;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_80197B81 != 0) {
+        D_80197B81 -= 0x10;
+    }
+    if (D_80197B82 != 0) {
+        D_80197B82 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80181B08[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_80197BC0;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_80197BC0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_024/ov_SC03_024_jr_8015AE2C.c b/src/ov_SC03_024/ov_SC03_024_jr_8015AE2C.c
index 5db1006e2f..2c1306dcd1 100644
--- a/src/ov_SC03_024/ov_SC03_024_jr_8015AE2C.c
+++ b/src/ov_SC03_024/ov_SC03_024_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_024/nonmatchings/ov_SC03_024_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801C0118;
+extern u8 D_801C0119;
+extern u8 D_801C011A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801C0118;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801C0119 != 0) {
+        D_801C0119 -= 0x10;
+    }
+    if (D_801C011A != 0) {
+        D_801C011A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80189B2C[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801C0158;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801C0158;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_028/ov_SC03_028_jr_8015AE2C.c b/src/ov_SC03_028/ov_SC03_028_jr_8015AE2C.c
index 67f7bb6542..814fe90d20 100644
--- a/src/ov_SC03_028/ov_SC03_028_jr_8015AE2C.c
+++ b/src/ov_SC03_028/ov_SC03_028_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_028/nonmatchings/ov_SC03_028_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801EA450;
+extern u8 D_801EA451;
+extern u8 D_801EA452;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801EA450;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801EA451 != 0) {
+        D_801EA451 -= 0x10;
+    }
+    if (D_801EA452 != 0) {
+        D_801EA452 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018E5F8[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801EA490;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801EA490;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_029/ov_SC03_029_jr_8015AE2C.c b/src/ov_SC03_029/ov_SC03_029_jr_8015AE2C.c
index ce6c0d1a09..38494fd1a5 100644
--- a/src/ov_SC03_029/ov_SC03_029_jr_8015AE2C.c
+++ b/src/ov_SC03_029/ov_SC03_029_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_029/nonmatchings/ov_SC03_029_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801D8428;
+extern u8 D_801D8429;
+extern u8 D_801D842A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801D8428;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801D8429 != 0) {
+        D_801D8429 -= 0x10;
+    }
+    if (D_801D842A != 0) {
+        D_801D842A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018A430[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801D8468;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801D8468;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_030/ov_SC03_030_jr_8015AE2C.c b/src/ov_SC03_030/ov_SC03_030_jr_8015AE2C.c
index 08c1a929cb..b076954d76 100644
--- a/src/ov_SC03_030/ov_SC03_030_jr_8015AE2C.c
+++ b/src/ov_SC03_030/ov_SC03_030_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_030/nonmatchings/ov_SC03_030_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801E0A20;
+extern u8 D_801E0A21;
+extern u8 D_801E0A22;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801E0A20;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801E0A21 != 0) {
+        D_801E0A21 -= 0x10;
+    }
+    if (D_801E0A22 != 0) {
+        D_801E0A22 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80184A6C[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801E0A60;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801E0A60;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_031/ov_SC03_031_jr_8015AE2C.c b/src/ov_SC03_031/ov_SC03_031_jr_8015AE2C.c
index bfbe3c7384..048380a8d5 100644
--- a/src/ov_SC03_031/ov_SC03_031_jr_8015AE2C.c
+++ b/src/ov_SC03_031/ov_SC03_031_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_031/nonmatchings/ov_SC03_031_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801C4E20;
+extern u8 D_801C4E21;
+extern u8 D_801C4E22;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801C4E20;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801C4E21 != 0) {
+        D_801C4E21 -= 0x10;
+    }
+    if (D_801C4E22 != 0) {
+        D_801C4E22 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80184F88[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801C4E60;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801C4E60;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_089/ov_SC03_089_jr_8015AE2C.c b/src/ov_SC03_089/ov_SC03_089_jr_8015AE2C.c
index 4fd452c91b..83d960e198 100644
--- a/src/ov_SC03_089/ov_SC03_089_jr_8015AE2C.c
+++ b/src/ov_SC03_089/ov_SC03_089_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_089/nonmatchings/ov_SC03_089_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801C56D8;
+extern u8 D_801C56D9;
+extern u8 D_801C56DA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801C56D8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801C56D9 != 0) {
+        D_801C56D9 -= 0x10;
+    }
+    if (D_801C56DA != 0) {
+        D_801C56DA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018C284[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801C5718;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801C5718;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_090/ov_SC03_090_jr_8015AE2C.c b/src/ov_SC03_090/ov_SC03_090_jr_8015AE2C.c
index dfcd789b51..a7bd568b76 100644
--- a/src/ov_SC03_090/ov_SC03_090_jr_8015AE2C.c
+++ b/src/ov_SC03_090/ov_SC03_090_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801CAB40;
+extern u8 D_801CAB41;
+extern u8 D_801CAB42;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801CAB40;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801CAB41 != 0) {
+        D_801CAB41 -= 0x10;
+    }
+    if (D_801CAB42 != 0) {
+        D_801CAB42 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018E6A8[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801CAB80;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801CAB80;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_091/ov_SC03_091_jr_8015AE2C.c b/src/ov_SC03_091/ov_SC03_091_jr_8015AE2C.c
index 5f57af730c..4a8ca74585 100644
--- a/src/ov_SC03_091/ov_SC03_091_jr_8015AE2C.c
+++ b/src/ov_SC03_091/ov_SC03_091_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801D1210;
+extern u8 D_801D1211;
+extern u8 D_801D1212;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801D1210;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801D1211 != 0) {
+        D_801D1211 -= 0x10;
+    }
+    if (D_801D1212 != 0) {
+        D_801D1212 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018F550[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801D1250;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801D1250;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_092/ov_SC03_092_jr_8015AE2C.c b/src/ov_SC03_092/ov_SC03_092_jr_8015AE2C.c
index 00ced03e2b..15ded500c5 100644
--- a/src/ov_SC03_092/ov_SC03_092_jr_8015AE2C.c
+++ b/src/ov_SC03_092/ov_SC03_092_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_092/nonmatchings/ov_SC03_092_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801B1DD8;
+extern u8 D_801B1DD9;
+extern u8 D_801B1DDA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801B1DD8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801B1DD9 != 0) {
+        D_801B1DD9 -= 0x10;
+    }
+    if (D_801B1DDA != 0) {
+        D_801B1DDA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80187920[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801B1E18;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801B1E18;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_093/ov_SC03_093_jr_8015AE2C.c b/src/ov_SC03_093/ov_SC03_093_jr_8015AE2C.c
index 24bed8167c..a252e940ee 100644
--- a/src/ov_SC03_093/ov_SC03_093_jr_8015AE2C.c
+++ b/src/ov_SC03_093/ov_SC03_093_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_093/nonmatchings/ov_SC03_093_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801CB248;
+extern u8 D_801CB249;
+extern u8 D_801CB24A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801CB248;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801CB249 != 0) {
+        D_801CB249 -= 0x10;
+    }
+    if (D_801CB24A != 0) {
+        D_801CB24A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80188AF8[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801CB288;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801CB288;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_094/ov_SC03_094_jr_8015AE2C.c b/src/ov_SC03_094/ov_SC03_094_jr_8015AE2C.c
index b6fa2c81e7..d022d12413 100644
--- a/src/ov_SC03_094/ov_SC03_094_jr_8015AE2C.c
+++ b/src/ov_SC03_094/ov_SC03_094_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801D2088;
+extern u8 D_801D2089;
+extern u8 D_801D208A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801D2088;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801D2089 != 0) {
+        D_801D2089 -= 0x10;
+    }
+    if (D_801D208A != 0) {
+        D_801D208A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018A4F4[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801D20C8;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801D20C8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_095/ov_SC03_095_jr_8015AE2C.c b/src/ov_SC03_095/ov_SC03_095_jr_8015AE2C.c
index f43abcb21c..e3b6736592 100644
--- a/src/ov_SC03_095/ov_SC03_095_jr_8015AE2C.c
+++ b/src/ov_SC03_095/ov_SC03_095_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_095/nonmatchings/ov_SC03_095_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8019AC80;
+extern u8 D_8019AC81;
+extern u8 D_8019AC82;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8019AC80;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8019AC81 != 0) {
+        D_8019AC81 -= 0x10;
+    }
+    if (D_8019AC82 != 0) {
+        D_8019AC82 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80183B54[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8019ACC0;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8019ACC0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_096/ov_SC03_096_jr_8015AE2C.c b/src/ov_SC03_096/ov_SC03_096_jr_8015AE2C.c
index a2d0414892..d0372fadf1 100644
--- a/src/ov_SC03_096/ov_SC03_096_jr_8015AE2C.c
+++ b/src/ov_SC03_096/ov_SC03_096_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_096/nonmatchings/ov_SC03_096_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_80199738;
+extern u8 D_80199739;
+extern u8 D_8019973A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_80199738;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_80199739 != 0) {
+        D_80199739 -= 0x10;
+    }
+    if (D_8019973A != 0) {
+        D_8019973A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801836D4[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_80199778;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_80199778;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_097/ov_SC03_097_jr_8015AE2C.c b/src/ov_SC03_097/ov_SC03_097_jr_8015AE2C.c
index 23976c53c9..baa19e1e0f 100644
--- a/src/ov_SC03_097/ov_SC03_097_jr_8015AE2C.c
+++ b/src/ov_SC03_097/ov_SC03_097_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_097/nonmatchings/ov_SC03_097_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801A97C0;
+extern u8 D_801A97C1;
+extern u8 D_801A97C2;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801A97C0;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801A97C1 != 0) {
+        D_801A97C1 -= 0x10;
+    }
+    if (D_801A97C2 != 0) {
+        D_801A97C2 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80188AB4[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801A9800;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801A9800;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_098/ov_SC03_098_jr_8015AE2C.c b/src/ov_SC03_098/ov_SC03_098_jr_8015AE2C.c
index de0528f347..aa7b981930 100644
--- a/src/ov_SC03_098/ov_SC03_098_jr_8015AE2C.c
+++ b/src/ov_SC03_098/ov_SC03_098_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801C4430;
+extern u8 D_801C4431;
+extern u8 D_801C4432;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801C4430;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801C4431 != 0) {
+        D_801C4431 -= 0x10;
+    }
+    if (D_801C4432 != 0) {
+        D_801C4432 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80187F40[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801C4470;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801C4470;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_099/ov_SC03_099_jr_8015AE2C.c b/src/ov_SC03_099/ov_SC03_099_jr_8015AE2C.c
index 5db289a58e..fc0f02a583 100644
--- a/src/ov_SC03_099/ov_SC03_099_jr_8015AE2C.c
+++ b/src/ov_SC03_099/ov_SC03_099_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_099/nonmatchings/ov_SC03_099_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801BE100;
+extern u8 D_801BE101;
+extern u8 D_801BE102;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801BE100;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801BE101 != 0) {
+        D_801BE101 -= 0x10;
+    }
+    if (D_801BE102 != 0) {
+        D_801BE102 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80186040[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801BE140;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801BE140;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_100/ov_SC03_100_jr_8015AE2C.c b/src/ov_SC03_100/ov_SC03_100_jr_8015AE2C.c
index 017981b2ed..b7fddb6554 100644
--- a/src/ov_SC03_100/ov_SC03_100_jr_8015AE2C.c
+++ b/src/ov_SC03_100/ov_SC03_100_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_100/nonmatchings/ov_SC03_100_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801C7388;
+extern u8 D_801C7389;
+extern u8 D_801C738A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801C7388;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801C7389 != 0) {
+        D_801C7389 -= 0x10;
+    }
+    if (D_801C738A != 0) {
+        D_801C738A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018750C[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801C73C8;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801C73C8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_101/ov_SC03_101_jr_8015AE2C.c b/src/ov_SC03_101/ov_SC03_101_jr_8015AE2C.c
index 086f7e102a..2bdde84821 100644
--- a/src/ov_SC03_101/ov_SC03_101_jr_8015AE2C.c
+++ b/src/ov_SC03_101/ov_SC03_101_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_101/nonmatchings/ov_SC03_101_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8019CC50;
+extern u8 D_8019CC51;
+extern u8 D_8019CC52;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8019CC50;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8019CC51 != 0) {
+        D_8019CC51 -= 0x10;
+    }
+    if (D_8019CC52 != 0) {
+        D_8019CC52 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801864E8[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8019CC90;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8019CC90;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_102/ov_SC03_102_jr_8015AE2C.c b/src/ov_SC03_102/ov_SC03_102_jr_8015AE2C.c
index 742ac955af..4f131b2f17 100644
--- a/src/ov_SC03_102/ov_SC03_102_jr_8015AE2C.c
+++ b/src/ov_SC03_102/ov_SC03_102_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_102/nonmatchings/ov_SC03_102_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801B88C8;
+extern u8 D_801B88C9;
+extern u8 D_801B88CA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801B88C8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801B88C9 != 0) {
+        D_801B88C9 -= 0x10;
+    }
+    if (D_801B88CA != 0) {
+        D_801B88CA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80188DA0[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801B8908;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801B8908;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_103/ov_SC03_103_jr_8015AE2C.c b/src/ov_SC03_103/ov_SC03_103_jr_8015AE2C.c
index 71cd31cbee..f7fa4c323c 100644
--- a/src/ov_SC03_103/ov_SC03_103_jr_8015AE2C.c
+++ b/src/ov_SC03_103/ov_SC03_103_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_103/nonmatchings/ov_SC03_103_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801C3A80;
+extern u8 D_801C3A81;
+extern u8 D_801C3A82;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801C3A80;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801C3A81 != 0) {
+        D_801C3A81 -= 0x10;
+    }
+    if (D_801C3A82 != 0) {
+        D_801C3A82 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80186D50[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801C3AC0;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801C3AC0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_104/ov_SC03_104_jr_8015AE2C.c b/src/ov_SC03_104/ov_SC03_104_jr_8015AE2C.c
index b35b38ea86..dd25dceb18 100644
--- a/src/ov_SC03_104/ov_SC03_104_jr_8015AE2C.c
+++ b/src/ov_SC03_104/ov_SC03_104_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_104/nonmatchings/ov_SC03_104_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801BF018;
+extern u8 D_801BF019;
+extern u8 D_801BF01A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801BF018;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801BF019 != 0) {
+        D_801BF019 -= 0x10;
+    }
+    if (D_801BF01A != 0) {
+        D_801BF01A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018D8E0[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801BF058;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801BF058;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_105/ov_SC03_105_jr_8015AE2C.c b/src/ov_SC03_105/ov_SC03_105_jr_8015AE2C.c
index 410c8ff08f..887e97d3e6 100644
--- a/src/ov_SC03_105/ov_SC03_105_jr_8015AE2C.c
+++ b/src/ov_SC03_105/ov_SC03_105_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_105/nonmatchings/ov_SC03_105_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801B85A8;
+extern u8 D_801B85A9;
+extern u8 D_801B85AA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801B85A8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801B85A9 != 0) {
+        D_801B85A9 -= 0x10;
+    }
+    if (D_801B85AA != 0) {
+        D_801B85AA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018CF68[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801B85E8;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801B85E8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_108/ov_SC03_108_jr_8015AE2C.c b/src/ov_SC03_108/ov_SC03_108_jr_8015AE2C.c
index 68b4ae0e8a..9947e962b0 100644
--- a/src/ov_SC03_108/ov_SC03_108_jr_8015AE2C.c
+++ b/src/ov_SC03_108/ov_SC03_108_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_108/nonmatchings/ov_SC03_108_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801A0898;
+extern u8 D_801A0899;
+extern u8 D_801A089A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801A0898;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801A0899 != 0) {
+        D_801A0899 -= 0x10;
+    }
+    if (D_801A089A != 0) {
+        D_801A089A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801838C0[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801A08D8;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801A08D8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_109/ov_SC03_109_jr_8015AE2C.c b/src/ov_SC03_109/ov_SC03_109_jr_8015AE2C.c
index e9cdef68a4..f1b16eb11c 100644
--- a/src/ov_SC03_109/ov_SC03_109_jr_8015AE2C.c
+++ b/src/ov_SC03_109/ov_SC03_109_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_109/nonmatchings/ov_SC03_109_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801992A8;
+extern u8 D_801992A9;
+extern u8 D_801992AA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801992A8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801992A9 != 0) {
+        D_801992A9 -= 0x10;
+    }
+    if (D_801992AA != 0) {
+        D_801992AA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80180F6C[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801992E8;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801992E8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_110/ov_SC03_110_jr_8015AE2C.c b/src/ov_SC03_110/ov_SC03_110_jr_8015AE2C.c
index ac55a4aed4..9066972fb8 100644
--- a/src/ov_SC03_110/ov_SC03_110_jr_8015AE2C.c
+++ b/src/ov_SC03_110/ov_SC03_110_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_110/nonmatchings/ov_SC03_110_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801A1050;
+extern u8 D_801A1051;
+extern u8 D_801A1052;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801A1050;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801A1051 != 0) {
+        D_801A1051 -= 0x10;
+    }
+    if (D_801A1052 != 0) {
+        D_801A1052 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018498C[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801A1090;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801A1090;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_111/ov_SC03_111_jr_8015AE2C.c b/src/ov_SC03_111/ov_SC03_111_jr_8015AE2C.c
index c9115ea652..daedc1f1b9 100644
--- a/src/ov_SC03_111/ov_SC03_111_jr_8015AE2C.c
+++ b/src/ov_SC03_111/ov_SC03_111_jr_8015AE2C.c
@@ -4352,7 +4352,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_111/nonmatchings/ov_SC03_111_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801B8558;
+extern u8 D_801B8559;
+extern u8 D_801B855A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801B8558;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801B8559 != 0) {
+        D_801B8559 -= 0x10;
+    }
+    if (D_801B855A != 0) {
+        D_801B855A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80187540[])(void);
@@ -4437,7 +4458,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801B8598;
 
 void func_801651B8(void * param_1)
@@ -4447,14 +4468,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801B8598;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_112/ov_SC03_112_jr_8015AE2C.c b/src/ov_SC03_112/ov_SC03_112_jr_8015AE2C.c
index 7e56e8e021..4b36cf5577 100644
--- a/src/ov_SC03_112/ov_SC03_112_jr_8015AE2C.c
+++ b/src/ov_SC03_112/ov_SC03_112_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_112/nonmatchings/ov_SC03_112_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801ABDB8;
+extern u8 D_801ABDB9;
+extern u8 D_801ABDBA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801ABDB8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801ABDB9 != 0) {
+        D_801ABDB9 -= 0x10;
+    }
+    if (D_801ABDBA != 0) {
+        D_801ABDBA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80188348[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801ABDF8;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801ABDF8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_113/ov_SC03_113_jr_8015AE2C.c b/src/ov_SC03_113/ov_SC03_113_jr_8015AE2C.c
index 46c009b45d..b96fb16840 100644
--- a/src/ov_SC03_113/ov_SC03_113_jr_8015AE2C.c
+++ b/src/ov_SC03_113/ov_SC03_113_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_113/nonmatchings/ov_SC03_113_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801A4948;
+extern u8 D_801A4949;
+extern u8 D_801A494A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801A4948;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801A4949 != 0) {
+        D_801A4949 -= 0x10;
+    }
+    if (D_801A494A != 0) {
+        D_801A494A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801859F8[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801A4988;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801A4988;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_114/ov_SC03_114_jr_8015AE2C.c b/src/ov_SC03_114/ov_SC03_114_jr_8015AE2C.c
index b5045346ad..6e821dfab5 100644
--- a/src/ov_SC03_114/ov_SC03_114_jr_8015AE2C.c
+++ b/src/ov_SC03_114/ov_SC03_114_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_114/nonmatchings/ov_SC03_114_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801A85E0;
+extern u8 D_801A85E1;
+extern u8 D_801A85E2;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801A85E0;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801A85E1 != 0) {
+        D_801A85E1 -= 0x10;
+    }
+    if (D_801A85E2 != 0) {
+        D_801A85E2 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80181660[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801A8620;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801A8620;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_115/ov_SC03_115_jr_8015AE2C.c b/src/ov_SC03_115/ov_SC03_115_jr_8015AE2C.c
index 617723d319..25ee1ccea8 100644
--- a/src/ov_SC03_115/ov_SC03_115_jr_8015AE2C.c
+++ b/src/ov_SC03_115/ov_SC03_115_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_115/nonmatchings/ov_SC03_115_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_80193F38;
+extern u8 D_80193F39;
+extern u8 D_80193F3A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_80193F38;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_80193F39 != 0) {
+        D_80193F39 -= 0x10;
+    }
+    if (D_80193F3A != 0) {
+        D_80193F3A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801830CC[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_80193F78;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_80193F78;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_116/ov_SC03_116_jr_8015AE2C.c b/src/ov_SC03_116/ov_SC03_116_jr_8015AE2C.c
index c34e30d79b..af2747e546 100644
--- a/src/ov_SC03_116/ov_SC03_116_jr_8015AE2C.c
+++ b/src/ov_SC03_116/ov_SC03_116_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_116/nonmatchings/ov_SC03_116_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_80196AC8;
+extern u8 D_80196AC9;
+extern u8 D_80196ACA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_80196AC8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_80196AC9 != 0) {
+        D_80196AC9 -= 0x10;
+    }
+    if (D_80196ACA != 0) {
+        D_80196ACA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801854D0[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_80196B08;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_80196B08;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_117/ov_SC03_117_jr_8015AE2C.c b/src/ov_SC03_117/ov_SC03_117_jr_8015AE2C.c
index 897831f42b..ed5e46e3eb 100644
--- a/src/ov_SC03_117/ov_SC03_117_jr_8015AE2C.c
+++ b/src/ov_SC03_117/ov_SC03_117_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801CD240;
+extern u8 D_801CD241;
+extern u8 D_801CD242;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801CD240;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801CD241 != 0) {
+        D_801CD241 -= 0x10;
+    }
+    if (D_801CD242 != 0) {
+        D_801CD242 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801874DC[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801CD280;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801CD280;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_118/ov_SC03_118_jr_8015AE2C.c b/src/ov_SC03_118/ov_SC03_118_jr_8015AE2C.c
index c674b25f65..4d04449ad3 100644
--- a/src/ov_SC03_118/ov_SC03_118_jr_8015AE2C.c
+++ b/src/ov_SC03_118/ov_SC03_118_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_118/nonmatchings/ov_SC03_118_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801D3190;
+extern u8 D_801D3191;
+extern u8 D_801D3192;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801D3190;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801D3191 != 0) {
+        D_801D3191 -= 0x10;
+    }
+    if (D_801D3192 != 0) {
+        D_801D3192 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018C588[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801D31D0;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801D31D0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_119/ov_SC03_119_jr_8015AE2C.c b/src/ov_SC03_119/ov_SC03_119_jr_8015AE2C.c
index f82f8e5448..8760d80bee 100644
--- a/src/ov_SC03_119/ov_SC03_119_jr_8015AE2C.c
+++ b/src/ov_SC03_119/ov_SC03_119_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801D3190;
+extern u8 D_801D3191;
+extern u8 D_801D3192;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801D3190;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801D3191 != 0) {
+        D_801D3191 -= 0x10;
+    }
+    if (D_801D3192 != 0) {
+        D_801D3192 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018C588[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801D31D0;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801D31D0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_121/ov_SC03_121_jr_8015AE2C.c b/src/ov_SC03_121/ov_SC03_121_jr_8015AE2C.c
index a868f6d4f7..6f70b0d4ae 100644
--- a/src/ov_SC03_121/ov_SC03_121_jr_8015AE2C.c
+++ b/src/ov_SC03_121/ov_SC03_121_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_121/nonmatchings/ov_SC03_121_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801ADC38;
+extern u8 D_801ADC39;
+extern u8 D_801ADC3A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801ADC38;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801ADC39 != 0) {
+        D_801ADC39 -= 0x10;
+    }
+    if (D_801ADC3A != 0) {
+        D_801ADC3A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80184DA4[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801ADC78;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801ADC78;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_124/ov_SC03_124_jr_8015AE2C.c b/src/ov_SC03_124/ov_SC03_124_jr_8015AE2C.c
index 061ffef3a6..3a0c435e5d 100644
--- a/src/ov_SC03_124/ov_SC03_124_jr_8015AE2C.c
+++ b/src/ov_SC03_124/ov_SC03_124_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_124/nonmatchings/ov_SC03_124_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801E0760;
+extern u8 D_801E0761;
+extern u8 D_801E0762;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801E0760;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801E0761 != 0) {
+        D_801E0761 -= 0x10;
+    }
+    if (D_801E0762 != 0) {
+        D_801E0762 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018D7D0[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801E07A0;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801E07A0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_125/ov_SC03_125_jr_8015AE2C.c b/src/ov_SC03_125/ov_SC03_125_jr_8015AE2C.c
index 963f9a586b..ba7e815b53 100644
--- a/src/ov_SC03_125/ov_SC03_125_jr_8015AE2C.c
+++ b/src/ov_SC03_125/ov_SC03_125_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_125/nonmatchings/ov_SC03_125_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801C3058;
+extern u8 D_801C3059;
+extern u8 D_801C305A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801C3058;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801C3059 != 0) {
+        D_801C3059 -= 0x10;
+    }
+    if (D_801C305A != 0) {
+        D_801C305A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801869A0[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801C3098;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801C3098;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC03_126/ov_SC03_126_jr_8015AE2C.c b/src/ov_SC03_126/ov_SC03_126_jr_8015AE2C.c
index 6a8396ec9d..0c7e613f86 100644
--- a/src/ov_SC03_126/ov_SC03_126_jr_8015AE2C.c
+++ b/src/ov_SC03_126/ov_SC03_126_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_126/nonmatchings/ov_SC03_126_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8018E920;
+extern u8 D_8018E921;
+extern u8 D_8018E922;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8018E920;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8018E921 != 0) {
+        D_8018E921 -= 0x10;
+    }
+    if (D_8018E922 != 0) {
+        D_8018E922 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80181E98[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8018E960;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8018E960;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_000/ov_SC04_000_jr_8015AE2C.c b/src/ov_SC04_000/ov_SC04_000_jr_8015AE2C.c
index 65d20d9de7..445d1d0663 100644
--- a/src/ov_SC04_000/ov_SC04_000_jr_8015AE2C.c
+++ b/src/ov_SC04_000/ov_SC04_000_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_000/nonmatchings/ov_SC04_000_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801A89D0;
+extern u8 D_801A89D1;
+extern u8 D_801A89D2;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801A89D0;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801A89D1 != 0) {
+        D_801A89D1 -= 0x10;
+    }
+    if (D_801A89D2 != 0) {
+        D_801A89D2 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80185EA4[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801A8A10;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801A8A10;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_002/ov_SC04_002_jr_8015AE2C.c b/src/ov_SC04_002/ov_SC04_002_jr_8015AE2C.c
index ad390d156d..972b95d173 100644
--- a/src/ov_SC04_002/ov_SC04_002_jr_8015AE2C.c
+++ b/src/ov_SC04_002/ov_SC04_002_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_002/nonmatchings/ov_SC04_002_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801BFCE0;
+extern u8 D_801BFCE1;
+extern u8 D_801BFCE2;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801BFCE0;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801BFCE1 != 0) {
+        D_801BFCE1 -= 0x10;
+    }
+    if (D_801BFCE2 != 0) {
+        D_801BFCE2 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018B010[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801BFD20;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801BFD20;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_003/ov_SC04_003_jr_8015AE2C.c b/src/ov_SC04_003/ov_SC04_003_jr_8015AE2C.c
index 1f6939859e..af8814a73a 100644
--- a/src/ov_SC04_003/ov_SC04_003_jr_8015AE2C.c
+++ b/src/ov_SC04_003/ov_SC04_003_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_003/nonmatchings/ov_SC04_003_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8019A948;
+extern u8 D_8019A949;
+extern u8 D_8019A94A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8019A948;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8019A949 != 0) {
+        D_8019A949 -= 0x10;
+    }
+    if (D_8019A94A != 0) {
+        D_8019A94A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80184DAC[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8019A988;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8019A988;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_004/ov_SC04_004_jr_8015AE2C.c b/src/ov_SC04_004/ov_SC04_004_jr_8015AE2C.c
index 12d03a1c6d..92238f1a19 100644
--- a/src/ov_SC04_004/ov_SC04_004_jr_8015AE2C.c
+++ b/src/ov_SC04_004/ov_SC04_004_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_004/nonmatchings/ov_SC04_004_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801B2748;
+extern u8 D_801B2749;
+extern u8 D_801B274A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801B2748;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801B2749 != 0) {
+        D_801B2749 -= 0x10;
+    }
+    if (D_801B274A != 0) {
+        D_801B274A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801872E0[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801B2788;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801B2788;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_005/ov_SC04_005_jr_8015AE2C.c b/src/ov_SC04_005/ov_SC04_005_jr_8015AE2C.c
index d27da05546..aba20b0219 100644
--- a/src/ov_SC04_005/ov_SC04_005_jr_8015AE2C.c
+++ b/src/ov_SC04_005/ov_SC04_005_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_005/nonmatchings/ov_SC04_005_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801C0920;
+extern u8 D_801C0921;
+extern u8 D_801C0922;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801C0920;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801C0921 != 0) {
+        D_801C0921 -= 0x10;
+    }
+    if (D_801C0922 != 0) {
+        D_801C0922 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018A714[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801C0960;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801C0960;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_006/ov_SC04_006_jr_8015AE2C.c b/src/ov_SC04_006/ov_SC04_006_jr_8015AE2C.c
index 41ae6527f5..c3f9e2fe8a 100644
--- a/src/ov_SC04_006/ov_SC04_006_jr_8015AE2C.c
+++ b/src/ov_SC04_006/ov_SC04_006_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_006/nonmatchings/ov_SC04_006_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8019CBC8;
+extern u8 D_8019CBC9;
+extern u8 D_8019CBCA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8019CBC8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8019CBC9 != 0) {
+        D_8019CBC9 -= 0x10;
+    }
+    if (D_8019CBCA != 0) {
+        D_8019CBCA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801827F4[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8019CC08;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8019CC08;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_007/ov_SC04_007_jr_8015AE2C.c b/src/ov_SC04_007/ov_SC04_007_jr_8015AE2C.c
index 41bddb790f..88ef31faff 100644
--- a/src/ov_SC04_007/ov_SC04_007_jr_8015AE2C.c
+++ b/src/ov_SC04_007/ov_SC04_007_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_007/nonmatchings/ov_SC04_007_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801B4180;
+extern u8 D_801B4181;
+extern u8 D_801B4182;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801B4180;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801B4181 != 0) {
+        D_801B4181 -= 0x10;
+    }
+    if (D_801B4182 != 0) {
+        D_801B4182 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801887AC[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801B41C0;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801B41C0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_008/ov_SC04_008_jr_8015AE2C.c b/src/ov_SC04_008/ov_SC04_008_jr_8015AE2C.c
index 7c50cbf86a..1981a2654f 100644
--- a/src/ov_SC04_008/ov_SC04_008_jr_8015AE2C.c
+++ b/src/ov_SC04_008/ov_SC04_008_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_008/nonmatchings/ov_SC04_008_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_80190E58;
+extern u8 D_80190E59;
+extern u8 D_80190E5A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_80190E58;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_80190E59 != 0) {
+        D_80190E59 -= 0x10;
+    }
+    if (D_80190E5A != 0) {
+        D_80190E5A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801816E4[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_80190E98;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_80190E98;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_009/ov_SC04_009_jr_8015AE2C.c b/src/ov_SC04_009/ov_SC04_009_jr_8015AE2C.c
index 469b9419ad..e517c716fb 100644
--- a/src/ov_SC04_009/ov_SC04_009_jr_8015AE2C.c
+++ b/src/ov_SC04_009/ov_SC04_009_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_009/nonmatchings/ov_SC04_009_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_80197068;
+extern u8 D_80197069;
+extern u8 D_8019706A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_80197068;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_80197069 != 0) {
+        D_80197069 -= 0x10;
+    }
+    if (D_8019706A != 0) {
+        D_8019706A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80181710[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801970A8;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801970A8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_010/ov_SC04_010_jr_8015AE2C.c b/src/ov_SC04_010/ov_SC04_010_jr_8015AE2C.c
index e67422bcb2..2bef7e9c7f 100644
--- a/src/ov_SC04_010/ov_SC04_010_jr_8015AE2C.c
+++ b/src/ov_SC04_010/ov_SC04_010_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_010/nonmatchings/ov_SC04_010_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8018E500;
+extern u8 D_8018E501;
+extern u8 D_8018E502;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8018E500;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8018E501 != 0) {
+        D_8018E501 -= 0x10;
+    }
+    if (D_8018E502 != 0) {
+        D_8018E502 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80180DBC[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8018E540;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8018E540;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.c b/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.c
index cf460b58af..62b48577ef 100644
--- a/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.c
+++ b/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801EDC68;
+extern u8 D_801EDC69;
+extern u8 D_801EDC6A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801EDC68;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801EDC69 != 0) {
+        D_801EDC69 -= 0x10;
+    }
+    if (D_801EDC6A != 0) {
+        D_801EDC6A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8019304C[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801EDCA8;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801EDCA8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_012/ov_SC04_012_jr_8015AE2C.c b/src/ov_SC04_012/ov_SC04_012_jr_8015AE2C.c
index c9a15805ef..9e08ee73e7 100644
--- a/src/ov_SC04_012/ov_SC04_012_jr_8015AE2C.c
+++ b/src/ov_SC04_012/ov_SC04_012_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_012/nonmatchings/ov_SC04_012_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_80190BD8;
+extern u8 D_80190BD9;
+extern u8 D_80190BDA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_80190BD8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_80190BD9 != 0) {
+        D_80190BD9 -= 0x10;
+    }
+    if (D_80190BDA != 0) {
+        D_80190BDA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80181220[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_80190C18;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_80190C18;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_015/ov_SC04_015_jr_8015AE2C.c b/src/ov_SC04_015/ov_SC04_015_jr_8015AE2C.c
index 1995379cf5..f5256dd74a 100644
--- a/src/ov_SC04_015/ov_SC04_015_jr_8015AE2C.c
+++ b/src/ov_SC04_015/ov_SC04_015_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_015/nonmatchings/ov_SC04_015_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801C78C0;
+extern u8 D_801C78C1;
+extern u8 D_801C78C2;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801C78C0;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801C78C1 != 0) {
+        D_801C78C1 -= 0x10;
+    }
+    if (D_801C78C2 != 0) {
+        D_801C78C2 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80187158[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801C7900;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801C7900;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_016/ov_SC04_016_jr_8015AE2C.c b/src/ov_SC04_016/ov_SC04_016_jr_8015AE2C.c
index de71ebcbfc..5f4e287ece 100644
--- a/src/ov_SC04_016/ov_SC04_016_jr_8015AE2C.c
+++ b/src/ov_SC04_016/ov_SC04_016_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_016/nonmatchings/ov_SC04_016_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801A5A68;
+extern u8 D_801A5A69;
+extern u8 D_801A5A6A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801A5A68;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801A5A69 != 0) {
+        D_801A5A69 -= 0x10;
+    }
+    if (D_801A5A6A != 0) {
+        D_801A5A6A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80182C1C[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801A5AA8;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801A5AA8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_018/ov_SC04_018_jr_8015AE2C.c b/src/ov_SC04_018/ov_SC04_018_jr_8015AE2C.c
index ae23f895be..0358a680cf 100644
--- a/src/ov_SC04_018/ov_SC04_018_jr_8015AE2C.c
+++ b/src/ov_SC04_018/ov_SC04_018_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801E5CB8;
+extern u8 D_801E5CB9;
+extern u8 D_801E5CBA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801E5CB8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801E5CB9 != 0) {
+        D_801E5CB9 -= 0x10;
+    }
+    if (D_801E5CBA != 0) {
+        D_801E5CBA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018FE34[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801E5CF8;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801E5CF8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_019/ov_SC04_019_jr_8015AE2C.c b/src/ov_SC04_019/ov_SC04_019_jr_8015AE2C.c
index 273d78d2fa..2d854ffed8 100644
--- a/src/ov_SC04_019/ov_SC04_019_jr_8015AE2C.c
+++ b/src/ov_SC04_019/ov_SC04_019_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_019/nonmatchings/ov_SC04_019_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801E5CB8;
+extern u8 D_801E5CB9;
+extern u8 D_801E5CBA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801E5CB8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801E5CB9 != 0) {
+        D_801E5CB9 -= 0x10;
+    }
+    if (D_801E5CBA != 0) {
+        D_801E5CBA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018FE34[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801E5CF8;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801E5CF8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_020/ov_SC04_020_jr_8015AE2C.c b/src/ov_SC04_020/ov_SC04_020_jr_8015AE2C.c
index 72a998b072..98e56b4a66 100644
--- a/src/ov_SC04_020/ov_SC04_020_jr_8015AE2C.c
+++ b/src/ov_SC04_020/ov_SC04_020_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_020/nonmatchings/ov_SC04_020_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801BB2C8;
+extern u8 D_801BB2C9;
+extern u8 D_801BB2CA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801BB2C8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801BB2C9 != 0) {
+        D_801BB2C9 -= 0x10;
+    }
+    if (D_801BB2CA != 0) {
+        D_801BB2CA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80185F6C[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801BB308;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801BB308;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC04_021/ov_SC04_021_jr_8015AE2C.c b/src/ov_SC04_021/ov_SC04_021_jr_8015AE2C.c
index 85c0899d5e..c7d02b1e2d 100644
--- a/src/ov_SC04_021/ov_SC04_021_jr_8015AE2C.c
+++ b/src/ov_SC04_021/ov_SC04_021_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC04_021/nonmatchings/ov_SC04_021_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8018E920;
+extern u8 D_8018E921;
+extern u8 D_8018E922;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8018E920;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8018E921 != 0) {
+        D_8018E921 -= 0x10;
+    }
+    if (D_8018E922 != 0) {
+        D_8018E922 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80181E98[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8018E960;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8018E960;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC05_000/ov_SC05_000_jr_8015AE2C.c b/src/ov_SC05_000/ov_SC05_000_jr_8015AE2C.c
index 418d84ad41..3c4d4b34d0 100644
--- a/src/ov_SC05_000/ov_SC05_000_jr_8015AE2C.c
+++ b/src/ov_SC05_000/ov_SC05_000_jr_8015AE2C.c
@@ -4329,7 +4329,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC05_000/nonmatchings/ov_SC05_000_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_80199A50;
+extern u8 D_80199A51;
+extern u8 D_80199A52;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_80199A50;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_80199A51 != 0) {
+        D_80199A51 -= 0x10;
+    }
+    if (D_80199A52 != 0) {
+        D_80199A52 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80180EAC[])(void);
@@ -4414,7 +4435,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_80199A90;
 
 void func_801651B8(void * param_1)
@@ -4424,14 +4445,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_80199A90;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC05_001/ov_SC05_001_jr_8015AE2C.c b/src/ov_SC05_001/ov_SC05_001_jr_8015AE2C.c
index feae67138d..d30259c90e 100644
--- a/src/ov_SC05_001/ov_SC05_001_jr_8015AE2C.c
+++ b/src/ov_SC05_001/ov_SC05_001_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC05_001/nonmatchings/ov_SC05_001_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801B4B10;
+extern u8 D_801B4B11;
+extern u8 D_801B4B12;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801B4B10;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801B4B11 != 0) {
+        D_801B4B11 -= 0x10;
+    }
+    if (D_801B4B12 != 0) {
+        D_801B4B12 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80188688[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801B4B50;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801B4B50;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC05_002/ov_SC05_002_jr_8015AE2C.c b/src/ov_SC05_002/ov_SC05_002_jr_8015AE2C.c
index 6c2b596ced..59fb12475e 100644
--- a/src/ov_SC05_002/ov_SC05_002_jr_8015AE2C.c
+++ b/src/ov_SC05_002/ov_SC05_002_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC05_002/nonmatchings/ov_SC05_002_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8019EDB0;
+extern u8 D_8019EDB1;
+extern u8 D_8019EDB2;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8019EDB0;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8019EDB1 != 0) {
+        D_8019EDB1 -= 0x10;
+    }
+    if (D_8019EDB2 != 0) {
+        D_8019EDB2 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80182E48[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8019EDF0;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8019EDF0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC05_003/ov_SC05_003_jr_8015AE2C.c b/src/ov_SC05_003/ov_SC05_003_jr_8015AE2C.c
index ce16ee9c79..0d63c175d0 100644
--- a/src/ov_SC05_003/ov_SC05_003_jr_8015AE2C.c
+++ b/src/ov_SC05_003/ov_SC05_003_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC05_003/nonmatchings/ov_SC05_003_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801AB8C0;
+extern u8 D_801AB8C1;
+extern u8 D_801AB8C2;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801AB8C0;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801AB8C1 != 0) {
+        D_801AB8C1 -= 0x10;
+    }
+    if (D_801AB8C2 != 0) {
+        D_801AB8C2 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80185180[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801AB900;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801AB900;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC05_004/ov_SC05_004_jr_8015AE2C.c b/src/ov_SC05_004/ov_SC05_004_jr_8015AE2C.c
index 77bb82cfa3..90f056fde3 100644
--- a/src/ov_SC05_004/ov_SC05_004_jr_8015AE2C.c
+++ b/src/ov_SC05_004/ov_SC05_004_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC05_004/nonmatchings/ov_SC05_004_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8019DF38;
+extern u8 D_8019DF39;
+extern u8 D_8019DF3A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8019DF38;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8019DF39 != 0) {
+        D_8019DF39 -= 0x10;
+    }
+    if (D_8019DF3A != 0) {
+        D_8019DF3A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018428C[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8019DF78;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8019DF78;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC05_005/ov_SC05_005_jr_8015AE2C.c b/src/ov_SC05_005/ov_SC05_005_jr_8015AE2C.c
index 8b3ee513f1..4c3b71faea 100644
--- a/src/ov_SC05_005/ov_SC05_005_jr_8015AE2C.c
+++ b/src/ov_SC05_005/ov_SC05_005_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC05_005/nonmatchings/ov_SC05_005_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801B0BA0;
+extern u8 D_801B0BA1;
+extern u8 D_801B0BA2;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801B0BA0;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801B0BA1 != 0) {
+        D_801B0BA1 -= 0x10;
+    }
+    if (D_801B0BA2 != 0) {
+        D_801B0BA2 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80185060[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801B0BE0;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801B0BE0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC05_006/ov_SC05_006_jr_8015AE2C.c b/src/ov_SC05_006/ov_SC05_006_jr_8015AE2C.c
index 824286cb4b..840432cb44 100644
--- a/src/ov_SC05_006/ov_SC05_006_jr_8015AE2C.c
+++ b/src/ov_SC05_006/ov_SC05_006_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC05_006/nonmatchings/ov_SC05_006_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8018ECD8;
+extern u8 D_8018ECD9;
+extern u8 D_8018ECDA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8018ECD8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8018ECD9 != 0) {
+        D_8018ECD9 -= 0x10;
+    }
+    if (D_8018ECDA != 0) {
+        D_8018ECDA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80182080[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8018ED18;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8018ED18;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC05_007/ov_SC05_007_jr_8015AE2C.c b/src/ov_SC05_007/ov_SC05_007_jr_8015AE2C.c
index 52921ef9f8..47525c575c 100644
--- a/src/ov_SC05_007/ov_SC05_007_jr_8015AE2C.c
+++ b/src/ov_SC05_007/ov_SC05_007_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC05_007/nonmatchings/ov_SC05_007_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8019BCB8;
+extern u8 D_8019BCB9;
+extern u8 D_8019BCBA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8019BCB8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8019BCB9 != 0) {
+        D_8019BCB9 -= 0x10;
+    }
+    if (D_8019BCBA != 0) {
+        D_8019BCBA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018367C[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8019BCF8;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8019BCF8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC05_008/ov_SC05_008_jr_8015AE2C.c b/src/ov_SC05_008/ov_SC05_008_jr_8015AE2C.c
index 28fb9018a3..d6f9455836 100644
--- a/src/ov_SC05_008/ov_SC05_008_jr_8015AE2C.c
+++ b/src/ov_SC05_008/ov_SC05_008_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC05_008/nonmatchings/ov_SC05_008_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8019FFE8;
+extern u8 D_8019FFE9;
+extern u8 D_8019FFEA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8019FFE8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8019FFE9 != 0) {
+        D_8019FFE9 -= 0x10;
+    }
+    if (D_8019FFEA != 0) {
+        D_8019FFEA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801855D4[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801A0028;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801A0028;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC05_009/ov_SC05_009_jr_8015AE2C.c b/src/ov_SC05_009/ov_SC05_009_jr_8015AE2C.c
index 8b190018bf..5e2c8f73e4 100644
--- a/src/ov_SC05_009/ov_SC05_009_jr_8015AE2C.c
+++ b/src/ov_SC05_009/ov_SC05_009_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC05_009/nonmatchings/ov_SC05_009_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801959F8;
+extern u8 D_801959F9;
+extern u8 D_801959FA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801959F8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801959F9 != 0) {
+        D_801959F9 -= 0x10;
+    }
+    if (D_801959FA != 0) {
+        D_801959FA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801816E4[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_80195A38;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_80195A38;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC05_010/ov_SC05_010_jr_8015AE2C.c b/src/ov_SC05_010/ov_SC05_010_jr_8015AE2C.c
index e7175defbd..5bd627dc14 100644
--- a/src/ov_SC05_010/ov_SC05_010_jr_8015AE2C.c
+++ b/src/ov_SC05_010/ov_SC05_010_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC05_010/nonmatchings/ov_SC05_010_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801C5E48;
+extern u8 D_801C5E49;
+extern u8 D_801C5E4A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801C5E48;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801C5E49 != 0) {
+        D_801C5E49 -= 0x10;
+    }
+    if (D_801C5E4A != 0) {
+        D_801C5E4A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018B5C0[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801C5E88;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801C5E88;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC05_011/ov_SC05_011_jr_8015AE2C.c b/src/ov_SC05_011/ov_SC05_011_jr_8015AE2C.c
index 5fde26d1ed..334978a55d 100644
--- a/src/ov_SC05_011/ov_SC05_011_jr_8015AE2C.c
+++ b/src/ov_SC05_011/ov_SC05_011_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC05_011/nonmatchings/ov_SC05_011_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8019BFD0;
+extern u8 D_8019BFD1;
+extern u8 D_8019BFD2;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8019BFD0;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8019BFD1 != 0) {
+        D_8019BFD1 -= 0x10;
+    }
+    if (D_8019BFD2 != 0) {
+        D_8019BFD2 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80180938[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8019C010;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8019C010;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC05_017/ov_SC05_017_jr_8015AE2C.c b/src/ov_SC05_017/ov_SC05_017_jr_8015AE2C.c
index 8ec73d24f5..8bca7b7d31 100644
--- a/src/ov_SC05_017/ov_SC05_017_jr_8015AE2C.c
+++ b/src/ov_SC05_017/ov_SC05_017_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC05_017/nonmatchings/ov_SC05_017_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801EBB10;
+extern u8 D_801EBB11;
+extern u8 D_801EBB12;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801EBB10;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801EBB11 != 0) {
+        D_801EBB11 -= 0x10;
+    }
+    if (D_801EBB12 != 0) {
+        D_801EBB12 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018FDF8[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801EBB50;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801EBB50;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC05_018/ov_SC05_018_jr_8015AE2C.c b/src/ov_SC05_018/ov_SC05_018_jr_8015AE2C.c
index 1187554555..f524dc4406 100644
--- a/src/ov_SC05_018/ov_SC05_018_jr_8015AE2C.c
+++ b/src/ov_SC05_018/ov_SC05_018_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC05_018/nonmatchings/ov_SC05_018_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801E5250;
+extern u8 D_801E5251;
+extern u8 D_801E5252;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801E5250;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801E5251 != 0) {
+        D_801E5251 -= 0x10;
+    }
+    if (D_801E5252 != 0) {
+        D_801E5252 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80189554[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801E5290;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801E5290;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC05_019/ov_SC05_019_jr_8015AE2C.c b/src/ov_SC05_019/ov_SC05_019_jr_8015AE2C.c
index 39e8658875..997a8d2a9b 100644
--- a/src/ov_SC05_019/ov_SC05_019_jr_8015AE2C.c
+++ b/src/ov_SC05_019/ov_SC05_019_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC05_019/nonmatchings/ov_SC05_019_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8018E920;
+extern u8 D_8018E921;
+extern u8 D_8018E922;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8018E920;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8018E921 != 0) {
+        D_8018E921 -= 0x10;
+    }
+    if (D_8018E922 != 0) {
+        D_8018E922 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80181E98[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8018E960;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8018E960;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_000/ov_SC06_000_jr_8015AE2C.c b/src/ov_SC06_000/ov_SC06_000_jr_8015AE2C.c
index c3106b9a23..f9c77ab8d0 100644
--- a/src/ov_SC06_000/ov_SC06_000_jr_8015AE2C.c
+++ b/src/ov_SC06_000/ov_SC06_000_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_000/nonmatchings/ov_SC06_000_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801AD590;
+extern u8 D_801AD591;
+extern u8 D_801AD592;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801AD590;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801AD591 != 0) {
+        D_801AD591 -= 0x10;
+    }
+    if (D_801AD592 != 0) {
+        D_801AD592 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018AEA8[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801AD5D0;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801AD5D0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_006/ov_SC06_006_jr_8015AE2C.c b/src/ov_SC06_006/ov_SC06_006_jr_8015AE2C.c
index fa1a2ef533..c93cb2a6bb 100644
--- a/src/ov_SC06_006/ov_SC06_006_jr_8015AE2C.c
+++ b/src/ov_SC06_006/ov_SC06_006_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_006/nonmatchings/ov_SC06_006_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801F6FD8;
+extern u8 D_801F6FD9;
+extern u8 D_801F6FDA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801F6FD8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801F6FD9 != 0) {
+        D_801F6FD9 -= 0x10;
+    }
+    if (D_801F6FDA != 0) {
+        D_801F6FDA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801849CC[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801F7018;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801F7018;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_008/ov_SC06_008_jr_8015AE2C.c b/src/ov_SC06_008/ov_SC06_008_jr_8015AE2C.c
index 9d82934830..0553e9bbee 100644
--- a/src/ov_SC06_008/ov_SC06_008_jr_8015AE2C.c
+++ b/src/ov_SC06_008/ov_SC06_008_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_008/nonmatchings/ov_SC06_008_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801A8F58;
+extern u8 D_801A8F59;
+extern u8 D_801A8F5A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801A8F58;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801A8F59 != 0) {
+        D_801A8F59 -= 0x10;
+    }
+    if (D_801A8F5A != 0) {
+        D_801A8F5A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80188434[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801A8F98;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801A8F98;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_010/ov_SC06_010_jr_8015AE2C.c b/src/ov_SC06_010/ov_SC06_010_jr_8015AE2C.c
index af0b3f40f7..f3531600aa 100644
--- a/src/ov_SC06_010/ov_SC06_010_jr_8015AE2C.c
+++ b/src/ov_SC06_010/ov_SC06_010_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_010/nonmatchings/ov_SC06_010_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801B0F90;
+extern u8 D_801B0F91;
+extern u8 D_801B0F92;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801B0F90;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801B0F91 != 0) {
+        D_801B0F91 -= 0x10;
+    }
+    if (D_801B0F92 != 0) {
+        D_801B0F92 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80189610[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801B0FD0;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801B0FD0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_011/ov_SC06_011_jr_8015AE2C.c b/src/ov_SC06_011/ov_SC06_011_jr_8015AE2C.c
index e6622de3c0..d4c99acd0a 100644
--- a/src/ov_SC06_011/ov_SC06_011_jr_8015AE2C.c
+++ b/src/ov_SC06_011/ov_SC06_011_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_011/nonmatchings/ov_SC06_011_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801AAB40;
+extern u8 D_801AAB41;
+extern u8 D_801AAB42;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801AAB40;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801AAB41 != 0) {
+        D_801AAB41 -= 0x10;
+    }
+    if (D_801AAB42 != 0) {
+        D_801AAB42 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80183070[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801AAB80;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801AAB80;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_013/ov_SC06_013_jr_8015AE2C.c b/src/ov_SC06_013/ov_SC06_013_jr_8015AE2C.c
index 5d79fda166..3209881b45 100644
--- a/src/ov_SC06_013/ov_SC06_013_jr_8015AE2C.c
+++ b/src/ov_SC06_013/ov_SC06_013_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_013/nonmatchings/ov_SC06_013_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801999F8;
+extern u8 D_801999F9;
+extern u8 D_801999FA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801999F8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801999F9 != 0) {
+        D_801999F9 -= 0x10;
+    }
+    if (D_801999FA != 0) {
+        D_801999FA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801817EC[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_80199A38;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_80199A38;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_014/ov_SC06_014_jr_8015AE2C.c b/src/ov_SC06_014/ov_SC06_014_jr_8015AE2C.c
index 47a69a5a49..7006d0eb6f 100644
--- a/src/ov_SC06_014/ov_SC06_014_jr_8015AE2C.c
+++ b/src/ov_SC06_014/ov_SC06_014_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_014/nonmatchings/ov_SC06_014_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801A03E8;
+extern u8 D_801A03E9;
+extern u8 D_801A03EA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801A03E8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801A03E9 != 0) {
+        D_801A03E9 -= 0x10;
+    }
+    if (D_801A03EA != 0) {
+        D_801A03EA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80182B50[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801A0428;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801A0428;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_015/ov_SC06_015_jr_8015AE2C.c b/src/ov_SC06_015/ov_SC06_015_jr_8015AE2C.c
index 1a276d2e7b..5518afe2b3 100644
--- a/src/ov_SC06_015/ov_SC06_015_jr_8015AE2C.c
+++ b/src/ov_SC06_015/ov_SC06_015_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_015/nonmatchings/ov_SC06_015_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801937C8;
+extern u8 D_801937C9;
+extern u8 D_801937CA;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801937C8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801937C9 != 0) {
+        D_801937C9 -= 0x10;
+    }
+    if (D_801937CA != 0) {
+        D_801937CA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801816A8[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_80193808;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_80193808;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_016/ov_SC06_016_jr_8015AE2C.c b/src/ov_SC06_016/ov_SC06_016_jr_8015AE2C.c
index a89012038b..e98f71578d 100644
--- a/src/ov_SC06_016/ov_SC06_016_jr_8015AE2C.c
+++ b/src/ov_SC06_016/ov_SC06_016_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_016/nonmatchings/ov_SC06_016_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8019E598;
+extern u8 D_8019E599;
+extern u8 D_8019E59A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8019E598;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8019E599 != 0) {
+        D_8019E599 -= 0x10;
+    }
+    if (D_8019E59A != 0) {
+        D_8019E59A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80187AB8[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8019E5D8;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8019E5D8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_018/ov_SC06_018_jr_8015AE2C.c b/src/ov_SC06_018/ov_SC06_018_jr_8015AE2C.c
index 4c536a8a10..509b217b1d 100644
--- a/src/ov_SC06_018/ov_SC06_018_jr_8015AE2C.c
+++ b/src/ov_SC06_018/ov_SC06_018_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801D3E80;
+extern u8 D_801D3E81;
+extern u8 D_801D3E82;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801D3E80;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801D3E81 != 0) {
+        D_801D3E81 -= 0x10;
+    }
+    if (D_801D3E82 != 0) {
+        D_801D3E82 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801961F4[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801D3EC0;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801D3EC0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_020/ov_SC06_020_jr_8015AE2C.c b/src/ov_SC06_020/ov_SC06_020_jr_8015AE2C.c
index 679f1b83c5..ad2035225c 100644
--- a/src/ov_SC06_020/ov_SC06_020_jr_8015AE2C.c
+++ b/src/ov_SC06_020/ov_SC06_020_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_020/nonmatchings/ov_SC06_020_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801B9698;
+extern u8 D_801B9699;
+extern u8 D_801B969A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801B9698;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801B9699 != 0) {
+        D_801B9699 -= 0x10;
+    }
+    if (D_801B969A != 0) {
+        D_801B969A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80187C7C[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801B96D8;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801B96D8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_022/ov_SC06_022_jr_8015AE2C.c b/src/ov_SC06_022/ov_SC06_022_jr_8015AE2C.c
index 9ffd98ce62..eae25dd34b 100644
--- a/src/ov_SC06_022/ov_SC06_022_jr_8015AE2C.c
+++ b/src/ov_SC06_022/ov_SC06_022_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801E0F00;
+extern u8 D_801E0F01;
+extern u8 D_801E0F02;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801E0F00;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801E0F01 != 0) {
+        D_801E0F01 -= 0x10;
+    }
+    if (D_801E0F02 != 0) {
+        D_801E0F02 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018FF38[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801E0F40;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801E0F40;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_024/ov_SC06_024_jr_8015AE2C.c b/src/ov_SC06_024/ov_SC06_024_jr_8015AE2C.c
index 970c6e053d..747de74c4c 100644
--- a/src/ov_SC06_024/ov_SC06_024_jr_8015AE2C.c
+++ b/src/ov_SC06_024/ov_SC06_024_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801E0080;
+extern u8 D_801E0081;
+extern u8 D_801E0082;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801E0080;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801E0081 != 0) {
+        D_801E0081 -= 0x10;
+    }
+    if (D_801E0082 != 0) {
+        D_801E0082 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80192410[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801E00C0;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801E00C0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_025/ov_SC06_025_jr_8015AE2C.c b/src/ov_SC06_025/ov_SC06_025_jr_8015AE2C.c
index da362c2068..8b3452bdd5 100644
--- a/src/ov_SC06_025/ov_SC06_025_jr_8015AE2C.c
+++ b/src/ov_SC06_025/ov_SC06_025_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_025/nonmatchings/ov_SC06_025_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801B0248;
+extern u8 D_801B0249;
+extern u8 D_801B024A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801B0248;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801B0249 != 0) {
+        D_801B0249 -= 0x10;
+    }
+    if (D_801B024A != 0) {
+        D_801B024A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801878B4[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801B0288;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801B0288;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_027/ov_SC06_027_jr_8015AE2C.c b/src/ov_SC06_027/ov_SC06_027_jr_8015AE2C.c
index b5281331b1..8bef76b6e7 100644
--- a/src/ov_SC06_027/ov_SC06_027_jr_8015AE2C.c
+++ b/src/ov_SC06_027/ov_SC06_027_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_027/nonmatchings/ov_SC06_027_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8019C220;
+extern u8 D_8019C221;
+extern u8 D_8019C222;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8019C220;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8019C221 != 0) {
+        D_8019C221 -= 0x10;
+    }
+    if (D_8019C222 != 0) {
+        D_8019C222 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80180BF4[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8019C260;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8019C260;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_029/ov_SC06_029_jr_8015AE2C.c b/src/ov_SC06_029/ov_SC06_029_jr_8015AE2C.c
index d7b4f11126..02d07fe8be 100644
--- a/src/ov_SC06_029/ov_SC06_029_jr_8015AE2C.c
+++ b/src/ov_SC06_029/ov_SC06_029_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_029/nonmatchings/ov_SC06_029_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801DBB40;
+extern u8 D_801DBB41;
+extern u8 D_801DBB42;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801DBB40;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801DBB41 != 0) {
+        D_801DBB41 -= 0x10;
+    }
+    if (D_801DBB42 != 0) {
+        D_801DBB42 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018F188[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801DBB80;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801DBB80;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_030/ov_SC06_030_jr_8015AE2C.c b/src/ov_SC06_030/ov_SC06_030_jr_8015AE2C.c
index 3e01fd691b..68d96473bd 100644
--- a/src/ov_SC06_030/ov_SC06_030_jr_8015AE2C.c
+++ b/src/ov_SC06_030/ov_SC06_030_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_030/nonmatchings/ov_SC06_030_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801B8DA0;
+extern u8 D_801B8DA1;
+extern u8 D_801B8DA2;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801B8DA0;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801B8DA1 != 0) {
+        D_801B8DA1 -= 0x10;
+    }
+    if (D_801B8DA2 != 0) {
+        D_801B8DA2 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80184A78[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801B8DE0;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801B8DE0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_032/ov_SC06_032_jr_8015AE2C.c b/src/ov_SC06_032/ov_SC06_032_jr_8015AE2C.c
index 0b5d252a41..55314ef21e 100644
--- a/src/ov_SC06_032/ov_SC06_032_jr_8015AE2C.c
+++ b/src/ov_SC06_032/ov_SC06_032_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_032/nonmatchings/ov_SC06_032_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801CF450;
+extern u8 D_801CF451;
+extern u8 D_801CF452;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801CF450;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801CF451 != 0) {
+        D_801CF451 -= 0x10;
+    }
+    if (D_801CF452 != 0) {
+        D_801CF452 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80195F44[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801CF490;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801CF490;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC06_033/ov_SC06_033_jr_8015AE2C.c b/src/ov_SC06_033/ov_SC06_033_jr_8015AE2C.c
index 973e061bf6..a131b96d45 100644
--- a/src/ov_SC06_033/ov_SC06_033_jr_8015AE2C.c
+++ b/src/ov_SC06_033/ov_SC06_033_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC06_033/nonmatchings/ov_SC06_033_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801CF510;
+extern u8 D_801CF511;
+extern u8 D_801CF512;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801CF510;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801CF511 != 0) {
+        D_801CF511 -= 0x10;
+    }
+    if (D_801CF512 != 0) {
+        D_801CF512 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80194454[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801CF550;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801CF550;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC07_000/ov_SC07_000_jr_8015AE2C.c b/src/ov_SC07_000/ov_SC07_000_jr_8015AE2C.c
index c92698bffb..5bb52041c5 100644
--- a/src/ov_SC07_000/ov_SC07_000_jr_8015AE2C.c
+++ b/src/ov_SC07_000/ov_SC07_000_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC07_000/nonmatchings/ov_SC07_000_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801CEA58;
+extern u8 D_801CEA59;
+extern u8 D_801CEA5A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801CEA58;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801CEA59 != 0) {
+        D_801CEA59 -= 0x10;
+    }
+    if (D_801CEA5A != 0) {
+        D_801CEA5A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018529C[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801CEA98;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801CEA98;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC07_001/ov_SC07_001_jr_8015AE2C.c b/src/ov_SC07_001/ov_SC07_001_jr_8015AE2C.c
index 2584b0916f..b711adf0ac 100644
--- a/src/ov_SC07_001/ov_SC07_001_jr_8015AE2C.c
+++ b/src/ov_SC07_001/ov_SC07_001_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC07_001/nonmatchings/ov_SC07_001_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801A9B08;
+extern u8 D_801A9B09;
+extern u8 D_801A9B0A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801A9B08;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801A9B09 != 0) {
+        D_801A9B09 -= 0x10;
+    }
+    if (D_801A9B0A != 0) {
+        D_801A9B0A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8018414C[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801A9B48;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801A9B48;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC07_002/ov_SC07_002_jr_8015AE2C.c b/src/ov_SC07_002/ov_SC07_002_jr_8015AE2C.c
index 1221140125..8ec95a25a3 100644
--- a/src/ov_SC07_002/ov_SC07_002_jr_8015AE2C.c
+++ b/src/ov_SC07_002/ov_SC07_002_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC07_002/nonmatchings/ov_SC07_002_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_8019A658;
+extern u8 D_8019A659;
+extern u8 D_8019A65A;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_8019A658;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8019A659 != 0) {
+        D_8019A659 -= 0x10;
+    }
+    if (D_8019A65A != 0) {
+        D_8019A65A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_80189408[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_8019A698;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8019A698;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC07_006/ov_SC07_006_jr_8013F350.c b/src/ov_SC07_006/ov_SC07_006_jr_8013F350.c
index fae36ba70e..158b3174bb 100644
--- a/src/ov_SC07_006/ov_SC07_006_jr_8013F350.c
+++ b/src/ov_SC07_006/ov_SC07_006_jr_8013F350.c
@@ -8691,7 +8691,29 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164db0 (src/shared) */
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164dd0 (src/shared) */
 
 
-INCLUDE_ASM("asm/ov_SC07_006/nonmatchings/ov_SC07_006_jr_8013F350", func_80164E40);
+
+
+
+
+
+s32 func_80164E40(void) {
+
+    extern u8 D_801F5000;
+    extern u8 D_801F5001;
+    extern u8 D_801F5002;
+    u8 *p = &D_801F5000;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801F5001 != 0) {
+        D_801F5001 -= 0x10;
+    }
+    if (D_801F5002 != 0) {
+        D_801F5002 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 
@@ -8784,7 +8806,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 
 void func_801651B8(void * param_1)
 {
@@ -8795,14 +8817,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801F5040;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC07_007/ov_SC07_007_jr_8013F350.c b/src/ov_SC07_007/ov_SC07_007_jr_8013F350.c
index 99b2c62ffb..0c9ac62243 100644
--- a/src/ov_SC07_007/ov_SC07_007_jr_8013F350.c
+++ b/src/ov_SC07_007/ov_SC07_007_jr_8013F350.c
@@ -8691,7 +8691,29 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164db0 (src/shared) */
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164dd0 (src/shared) */
 
 
-INCLUDE_ASM("asm/ov_SC07_007/nonmatchings/ov_SC07_007_jr_8013F350", func_80164E40);
+
+
+
+
+
+s32 func_80164E40(void) {
+
+    extern u8 D_801C6768;
+    extern u8 D_801C6769;
+    extern u8 D_801C676A;
+    u8 *p = &D_801C6768;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801C6769 != 0) {
+        D_801C6769 -= 0x10;
+    }
+    if (D_801C676A != 0) {
+        D_801C676A -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 
@@ -8784,7 +8806,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 
 void func_801651B8(void * param_1)
 {
@@ -8795,14 +8817,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801C67A8;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC07_008/ov_SC07_008_jr_8015AE2C.c b/src/ov_SC07_008/ov_SC07_008_jr_8015AE2C.c
index ab0db521ae..452cd9b7a2 100644
--- a/src/ov_SC07_008/ov_SC07_008_jr_8015AE2C.c
+++ b/src/ov_SC07_008/ov_SC07_008_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC07_008/nonmatchings/ov_SC07_008_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_80195540;
+extern u8 D_80195541;
+extern u8 D_80195542;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_80195540;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_80195541 != 0) {
+        D_80195541 -= 0x10;
+    }
+    if (D_80195542 != 0) {
+        D_80195542 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_8017FF20[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_80195580;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_80195580;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC07_009/ov_SC07_009_jr_8015AE2C.c b/src/ov_SC07_009/ov_SC07_009_jr_8015AE2C.c
index aa21d241a7..4ac75fbff0 100644
--- a/src/ov_SC07_009/ov_SC07_009_jr_8015AE2C.c
+++ b/src/ov_SC07_009/ov_SC07_009_jr_8015AE2C.c
@@ -4331,7 +4331,28 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164DB0 (src/shared) */
 
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164DD0 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC07_009/nonmatchings/ov_SC07_009_jr_8015AE2C", func_80164E40);
+
+
+
+
+extern u8 D_801A2BD0;
+extern u8 D_801A2BD1;
+extern u8 D_801A2BD2;
+
+s32 func_80164E40(void) {
+    u8 *p = &D_801A2BD0;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801A2BD1 != 0) {
+        D_801A2BD1 -= 0x10;
+    }
+    if (D_801A2BD2 != 0) {
+        D_801A2BD2 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 extern void (*D_801809C4[])(void);
@@ -4416,7 +4437,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 extern s32 D_801A2C10;
 
 void func_801651B8(void * param_1)
@@ -4426,14 +4447,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801A2C10;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC07_010/ov_SC07_010_o2b.c b/src/ov_SC07_010/ov_SC07_010_o2b.c
index 4ec54ab295..a10c606a7a 100644
--- a/src/ov_SC07_010/ov_SC07_010_o2b.c
+++ b/src/ov_SC07_010/ov_SC07_010_o2b.c
@@ -9337,7 +9337,29 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164db0 (src/shared) */
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164dd0 (src/shared) */
 
 
-INCLUDE_ASM("asm/ov_SC07_010/nonmatchings/ov_SC07_010_o2b", func_80164E40);
+
+
+
+
+
+s32 func_80164E40(void) {
+
+    extern u8 D_801A6C60;
+    extern u8 D_801A6C61;
+    extern u8 D_801A6C62;
+    u8 *p = &D_801A6C60;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_801A6C61 != 0) {
+        D_801A6C61 -= 0x10;
+    }
+    if (D_801A6C62 != 0) {
+        D_801A6C62 -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 
@@ -9430,7 +9452,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 
 void func_801651B8(void * param_1)
 {
@@ -9441,14 +9463,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_801A6CA0;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;
diff --git a/src/ov_SC07_011/ov_SC07_011_jr_8013F350.c b/src/ov_SC07_011/ov_SC07_011_jr_8013F350.c
index 2959ad8d23..b44081ceff 100644
--- a/src/ov_SC07_011/ov_SC07_011_jr_8013F350.c
+++ b/src/ov_SC07_011/ov_SC07_011_jr_8013F350.c
@@ -8687,7 +8687,29 @@ DEFINE_func_80164DB0()  /* dedup: shared engine-core @0x80164db0 (src/shared) */
 DEFINE_func_80164DD0()  /* dedup: shared engine-core @0x80164dd0 (src/shared) */
 
 
-INCLUDE_ASM("asm/ov_SC07_011/nonmatchings/ov_SC07_011_jr_8013F350", func_80164E40);
+
+
+
+
+
+s32 func_80164E40(void) {
+
+    extern u8 D_8018F2F8;
+    extern u8 D_8018F2F9;
+    extern u8 D_8018F2FA;
+    u8 *p = &D_8018F2F8;
+    if (*p != 0) {
+        *p -= 0x10;
+    }
+    if (D_8018F2F9 != 0) {
+        D_8018F2F9 -= 0x10;
+    }
+    if (D_8018F2FA != 0) {
+        D_8018F2FA -= 0x10;
+    }
+    return *(s32 *)p == 0;
+}
+
 
 
 
@@ -8780,7 +8802,7 @@ s32 func_80165140(s32 param_1) {
 // @class: schedule
 // @stuck: none — MATCH (pins $s2/$s1/$s0 + zero-code barrier hoists $a0 copy into beqz delay slot)
 
-extern s32 func_80165240(s32 a0, s32 a1, s32 a2);
+extern void func_80165240(void *param_1, void *param_2, void *param_3);
 
 void func_801651B8(void * param_1)
 {
@@ -8791,14 +8813,14 @@ void func_801651B8(void * param_1)
     register s32 p __asm__("$18");        /* $s2 */
 
     p = param_1;
-    func_80165240(p, p + 0x2c, p + 0x50);
+    ((s32 (*)(s32, s32, s32))func_80165240)(p, p + 0x2c, p + 0x50);
     iVar2 = 0;
     puVar1 = &D_8018F338;
     do {
         if (puVar1[3] != 0) {
             s32 a0v = p;
             __asm__ __volatile__("" : "=r"(a0v) : "0"(a0v));
-            func_80165240(a0v, (s32)puVar1, (s32)(puVar1 + 2));
+            ((s32 (*)(s32, s32, s32))func_80165240)(a0v, (s32)puVar1, (s32)(puVar1 + 2));
             puVar1[3] = puVar1[3] + -1;
         }
         iVar2 = iVar2 + 1;