From 332ea1133c83d898e32d39e48889fd5b0f65dd30 Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Tue, 11 Aug 2026 15:41:12 -0600 Subject: [PATCH] =?UTF-8?q?feat(phase-30=20S48-0b):=20jtbl=20family=20func?= =?UTF-8?q?=5F8013FFD8=20=E2=80=94=203/3=20blocked-binary=20siblings=20ban?= =?UTF-8?q?ked?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- config/overlays.mk | 6 +- config/splat.ov_MAIN_012.yaml | 2 +- config/splat.ov_SC02_037.yaml | 2 +- config/splat.ov_SC03_107.yaml | 2 +- src/ov_MAIN_012/ov_MAIN_012_jr_8013F350.c | 146 +++++++++++++++++++++- src/ov_SC02_037/ov_SC02_037_jr_8013F350.c | 146 +++++++++++++++++++++- src/ov_SC03_107/ov_SC03_107_jr_8013F350.c | 146 +++++++++++++++++++++- 7 files changed, 441 insertions(+), 9 deletions(-) diff --git a/config/overlays.mk b/config/overlays.mk index 06135de3e9..fd58cac442 100644 --- a/config/overlays.mk +++ b/config/overlays.mk @@ -4916,7 +4916,7 @@ ov_MAIN_012_MAPFILE := $(ov_MAIN_012_OUT).map ov_MAIN_012_LD_SCRIPT := $(ov_MAIN_012_OUT).ld ov_MAIN_012_SPLAT_YAML := config/splat.ov_MAIN_012.yaml ov_MAIN_012_JTBL_INTERLEAVE := --order tail.data.o,ov_MAIN_012_jr_80131340.o,tail2.data.o,ov_MAIN_012_jr_80135EB0.o,tail3.data.o,ov_MAIN_012_jr_801380E0.o,tail4.data.o,ov_MAIN_012_jr_8013F350.o,tail5.data.o,ov_MAIN_012_jr_80159C84.o,tail6.data.o,ov_MAIN_012_jr_8015A3C8.o,tail7.data.o,ov_MAIN_012_jr_801789AC.o,tail8.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve -build/src/ov_MAIN_012/ov_MAIN_012_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 +build/src/ov_MAIN_012/ov_MAIN_012_jr_8013F350.o: JTBL_PADS := 0,0,4,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20,+0x38,+0x58 build/src/ov_MAIN_012/ov_MAIN_012_jr_80159C84.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_MAIN_012/ov_MAIN_012_jr_801789AC.o: JTBL_PADS := 0,0,0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18,+0x190,+0x220 ov_MAIN_012_CHECK_SHA := config/check.ov_MAIN_012.sha @@ -4941,7 +4941,7 @@ ov_SC02_037_MAPFILE := $(ov_SC02_037_OUT).map ov_SC02_037_LD_SCRIPT := $(ov_SC02_037_OUT).ld ov_SC02_037_SPLAT_YAML := config/splat.ov_SC02_037.yaml ov_SC02_037_JTBL_INTERLEAVE := --order tail.data.o,ov_SC02_037_jr_80131340.o,tail2.data.o,ov_SC02_037_jr_80135EB0.o,tail3.data.o,ov_SC02_037_jr_801380E0.o,tail4.data.o,ov_SC02_037_jr_8013F350.o,tail5.data.o,ov_SC02_037_jr_80159C84.o,tail6.data.o,ov_SC02_037_jr_8015A3C8.o,tail7.data.o,ov_SC02_037_jr_801789AC.o,tail8.data.o,ov_SC02_037_jr_8017AE2C.o,tail9.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve -build/src/ov_SC02_037/ov_SC02_037_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 +build/src/ov_SC02_037/ov_SC02_037_jr_8013F350.o: JTBL_PADS := 0,0,4,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20,+0x38,+0x58 build/src/ov_SC02_037/ov_SC02_037_jr_80159C84.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_037/ov_SC02_037_jr_8015A3C8.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC02_037/ov_SC02_037_jr_8017AE2C.o: JTBL_PADS := 0,0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14,+0x34,+0x4c @@ -4967,7 +4967,7 @@ ov_SC03_107_MAPFILE := $(ov_SC03_107_OUT).map ov_SC03_107_LD_SCRIPT := $(ov_SC03_107_OUT).ld ov_SC03_107_SPLAT_YAML := config/splat.ov_SC03_107.yaml ov_SC03_107_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_107_jr_80131340.o,tail2.data.o,ov_SC03_107_jr_80135EB0.o,tail3.data.o,ov_SC03_107_jr_801380E0.o,tail4.data.o,ov_SC03_107_jr_8013F350.o,tail5.data.o,ov_SC03_107_jr_80159C84.o,tail6.data.o,ov_SC03_107_jr_8015A3C8.o,tail7.data.o,ov_SC03_107_jr_801789AC.o,tail8.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve -build/src/ov_SC03_107/ov_SC03_107_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 +build/src/ov_SC03_107/ov_SC03_107_jr_8013F350.o: JTBL_PADS := 0,0,4,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20,+0x38,+0x58 build/src/ov_SC03_107/ov_SC03_107_jr_80159C84.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_107/ov_SC03_107_jr_801789AC.o: JTBL_PADS := 0,0,0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18,+0x190,+0x220 ov_SC03_107_CHECK_SHA := config/check.ov_SC03_107.sha diff --git a/config/splat.ov_MAIN_012.yaml b/config/splat.ov_MAIN_012.yaml index 20263ad1bb..2f84aff2ee 100644 --- a/config/splat.ov_MAIN_012.yaml +++ b/config/splat.ov_MAIN_012.yaml @@ -109,7 +109,7 @@ segments: - [0x5ae24, .rodata, ov_MAIN_012_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x5ae88, data, tail4] - [0x5b494, .rodata, ov_MAIN_012_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x5b4c8, data, tail5] + - [0x5b500, data, tail5] - [0x5b730, .rodata, ov_MAIN_012_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x5b764, data, tail6] - [0x5b768, .rodata, ov_MAIN_012_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) diff --git a/config/splat.ov_SC02_037.yaml b/config/splat.ov_SC02_037.yaml index da1105b981..fd9d546401 100644 --- a/config/splat.ov_SC02_037.yaml +++ b/config/splat.ov_SC02_037.yaml @@ -110,7 +110,7 @@ segments: - [0x9f308, .rodata, ov_SC02_037_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9f36c, data, tail4] - [0x9f978, .rodata, ov_SC02_037_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9f9ac, data, tail5] + - [0x9f9e4, data, tail5] - [0x9fc14, .rodata, ov_SC02_037_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9fc48, data, tail6] - [0x9fc4c, .rodata, ov_SC02_037_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) diff --git a/config/splat.ov_SC03_107.yaml b/config/splat.ov_SC03_107.yaml index 43066f0a47..eef71ebab8 100644 --- a/config/splat.ov_SC03_107.yaml +++ b/config/splat.ov_SC03_107.yaml @@ -109,7 +109,7 @@ segments: - [0x7163c, .rodata, ov_SC03_107_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x716a0, data, tail4] - [0x71cac, .rodata, ov_SC03_107_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x71ce0, data, tail5] + - [0x71d18, data, tail5] - [0x71f48, .rodata, ov_SC03_107_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x71f7c, data, tail6] - [0x71f80, .rodata, ov_SC03_107_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) diff --git a/src/ov_MAIN_012/ov_MAIN_012_jr_8013F350.c b/src/ov_MAIN_012/ov_MAIN_012_jr_8013F350.c index 69f24933c0..599a21f08d 100644 --- a/src/ov_MAIN_012/ov_MAIN_012_jr_8013F350.c +++ b/src/ov_MAIN_012/ov_MAIN_012_jr_8013F350.c @@ -1153,7 +1153,151 @@ s32 func_8013F350(void) { INCLUDE_ASM("asm/ov_MAIN_012/nonmatchings/ov_MAIN_012_jr_8013F350", func_8013FAF8); -INCLUDE_ASM("asm/ov_MAIN_012/nonmatchings/ov_MAIN_012_jr_8013F350", func_8013FFD8); +extern u8 D_8017F434[]; + + +/* func_8013FFD8 — 213 ins, double jump-table, per-location family (134 members). */ + +extern s32 func_80029178(s32 arg); +extern s32 func_800291B4(s32 arg); + +extern short D_80115128; + +s32 func_8013FFD8(s16 arg0, s32 arg1, s32 *arg2) { + + extern u8 D_8017F41C[]; + /* block decl dropped — file-scope array decl covers (§8e) */ + extern u8 D_8017F440[]; + extern u8 D_8017F447[]; + extern u8 D_8017F448[]; + extern s32 D_8017F370; + extern s32 D_8017F388[]; + extern char *D_8017F344; + extern unsigned short D_8017F358[]; + extern u8 D_8017F3C8; + extern u8 D_8017F3CC; + extern u8 *D_8017F3D8; + extern s32 D_8010F3C4[]; + extern s32 D_8010EDE8[]; + extern u8 D_80115143; + extern void * D_801841FC; + extern void * D_801841F8; + s32 ret; + + *arg2 = 0x808080; + ret = 0; + + switch (arg0) { /* jtbl_801D8898 */ + case 0: { + s16 s0 = (s16) arg1; + if (s0 < 6) { + if ((((s32 (*)(u8))func_80029178)(D_8017F41C[s0]) & 0xFF) == 0) { + return 1; + } + ret = ((s32 *)&D_8017F370)[s0]; + } + break; + } + case 1: { + s16 v1 = (s16) arg1; + if (v1 < 4) { + ret = D_8017F388[v1]; + } + break; + } + case 2: + switch ((*(s16 *)&D_80115128)) { /* jtbl_801D88B8 */ + case 0: { + s16 v1 = (s16) arg1; + if (v1 < 5) { + ret = ((s32 *)&D_8017F344)[v1]; + } + break; + } + case 1: { + s16 v1 = (s16) arg1; + if (v1 < 0xC) { + s32 v3 = ((s32 (*)(u8, s32))func_800291B4)(((u8 *)&D_8017F434)[v1], arg1) & 0xFF; + if (v3 == 0) { + return 1; + } + ret = D_8010EDE8[v3 * 3]; + } + break; + } + case 2: { + s16 s0 = (s16) arg1; + if (s0 < 6) { + if ((((s32 (*)(u8))func_80029178)((*(u8 * *)&D_801841FC)[s0]) & 0xFF) == 0) { + return 1; + } + ret = (*(s32 * *)&D_801841F8)[s0]; + } + break; + } + case 3: { + s16 s0 = (s16) arg1; + if (s0 < 6) { + if ((((s32 (*)(u8))func_80029178)(D_8017F440[s0]) & 0xFF) == 0) { + return 1; + } + ret = ((s32 *)D_8017F358)[s0]; + } + break; + } + case 4: { + s16 v1 = (s16) arg1; + if (v1 < 5) { + ret = ((s32 *)&D_8017F3D8)[v1]; + } + break; + } + } + break; + case 3: { + s16 t = (s16) arg1; + if (t <= 0) { + s16 s0 = t + D_80115143; + if (s0 != 0) { + if ((((s32 (*)(u8, s32))func_800291B4)(D_8017F447[s0], arg1) & 0xFF) == 0) { + *arg2 = 0x804040; + } + ret = D_8010F3C4[s0]; + } else { + ret = (*(s32 *)&D_8017F3C8); + } + } + break; + } + case 5: { + s16 v1 = (s16) arg1; + if (v1 < 3) { + ret = ((s32 *)&D_8017F3CC)[v1]; + } + break; + } + case 6: { + s16 s0 = (s16) arg1; + if (s0 < 0x28) { + s32 idx; + if ((((s32 (*)(u8, s32))func_800291B4)(D_8017F448[s0], arg1) & 0xFF) == 0) { + *arg2 = 0x804040; + } + idx = s0 + 1; + ret = D_8010F3C4[idx]; + } + break; + } + case 7: { + s16 v1 = (s16) arg1; + if (v1 < 5) { + ret = ((s32 *)&D_8017F3D8)[v1]; + } + break; + } + } + return ret; +} INCLUDE_ASM("asm/ov_MAIN_012/nonmatchings/ov_MAIN_012_jr_8013F350", func_8014032C); diff --git a/src/ov_SC02_037/ov_SC02_037_jr_8013F350.c b/src/ov_SC02_037/ov_SC02_037_jr_8013F350.c index 814251da04..94c9e1793b 100644 --- a/src/ov_SC02_037/ov_SC02_037_jr_8013F350.c +++ b/src/ov_SC02_037/ov_SC02_037_jr_8013F350.c @@ -1153,7 +1153,151 @@ s32 func_8013F350(void) { INCLUDE_ASM("asm/ov_SC02_037/nonmatchings/ov_SC02_037_jr_8013F350", func_8013FAF8); -INCLUDE_ASM("asm/ov_SC02_037/nonmatchings/ov_SC02_037_jr_8013F350", func_8013FFD8); +extern u8 D_80184CC0[]; + + +/* func_8013FFD8 — 213 ins, double jump-table, per-location family (134 members). */ + +extern s32 func_80029178(s32 arg); +extern s32 func_800291B4(s32 arg); + +extern short D_80115128; + +s32 func_8013FFD8(s16 arg0, s32 arg1, s32 *arg2) { + + extern u8 D_80184CA8[]; + /* block decl dropped — file-scope array decl covers (§8e) */ + extern u8 D_80184CCC[]; + extern u8 D_80184CD3[]; + extern u8 D_80184CD4[]; + extern s32 D_80184BFC; + extern s32 D_80184C14[]; + extern char *D_80184BD0; + extern unsigned short D_80184BE4[]; + extern u8 D_80184C54; + extern u8 D_80184C58; + extern u8 *D_80184C64; + extern s32 D_8010F3C4[]; + extern s32 D_8010EDE8[]; + extern u8 D_80115143; + extern void * D_801C84F4; + extern void * D_801C84F0; + s32 ret; + + *arg2 = 0x808080; + ret = 0; + + switch (arg0) { /* jtbl_801D8898 */ + case 0: { + s16 s0 = (s16) arg1; + if (s0 < 6) { + if ((((s32 (*)(u8))func_80029178)(D_80184CA8[s0]) & 0xFF) == 0) { + return 1; + } + ret = ((s32 *)&D_80184BFC)[s0]; + } + break; + } + case 1: { + s16 v1 = (s16) arg1; + if (v1 < 4) { + ret = D_80184C14[v1]; + } + break; + } + case 2: + switch ((*(s16 *)&D_80115128)) { /* jtbl_801D88B8 */ + case 0: { + s16 v1 = (s16) arg1; + if (v1 < 5) { + ret = ((s32 *)&D_80184BD0)[v1]; + } + break; + } + case 1: { + s16 v1 = (s16) arg1; + if (v1 < 0xC) { + s32 v3 = ((s32 (*)(u8, s32))func_800291B4)(((u8 *)&D_80184CC0)[v1], arg1) & 0xFF; + if (v3 == 0) { + return 1; + } + ret = D_8010EDE8[v3 * 3]; + } + break; + } + case 2: { + s16 s0 = (s16) arg1; + if (s0 < 6) { + if ((((s32 (*)(u8))func_80029178)((*(u8 * *)&D_801C84F4)[s0]) & 0xFF) == 0) { + return 1; + } + ret = (*(s32 * *)&D_801C84F0)[s0]; + } + break; + } + case 3: { + s16 s0 = (s16) arg1; + if (s0 < 6) { + if ((((s32 (*)(u8))func_80029178)(D_80184CCC[s0]) & 0xFF) == 0) { + return 1; + } + ret = ((s32 *)D_80184BE4)[s0]; + } + break; + } + case 4: { + s16 v1 = (s16) arg1; + if (v1 < 5) { + ret = ((s32 *)&D_80184C64)[v1]; + } + break; + } + } + break; + case 3: { + s16 t = (s16) arg1; + if (t <= 0) { + s16 s0 = t + D_80115143; + if (s0 != 0) { + if ((((s32 (*)(u8, s32))func_800291B4)(D_80184CD3[s0], arg1) & 0xFF) == 0) { + *arg2 = 0x804040; + } + ret = D_8010F3C4[s0]; + } else { + ret = (*(s32 *)&D_80184C54); + } + } + break; + } + case 5: { + s16 v1 = (s16) arg1; + if (v1 < 3) { + ret = ((s32 *)&D_80184C58)[v1]; + } + break; + } + case 6: { + s16 s0 = (s16) arg1; + if (s0 < 0x28) { + s32 idx; + if ((((s32 (*)(u8, s32))func_800291B4)(D_80184CD4[s0], arg1) & 0xFF) == 0) { + *arg2 = 0x804040; + } + idx = s0 + 1; + ret = D_8010F3C4[idx]; + } + break; + } + case 7: { + s16 v1 = (s16) arg1; + if (v1 < 5) { + ret = ((s32 *)&D_80184C64)[v1]; + } + break; + } + } + return ret; +} INCLUDE_ASM("asm/ov_SC02_037/nonmatchings/ov_SC02_037_jr_8013F350", func_8014032C); diff --git a/src/ov_SC03_107/ov_SC03_107_jr_8013F350.c b/src/ov_SC03_107/ov_SC03_107_jr_8013F350.c index ed6c20b82f..88d6ee2885 100644 --- a/src/ov_SC03_107/ov_SC03_107_jr_8013F350.c +++ b/src/ov_SC03_107/ov_SC03_107_jr_8013F350.c @@ -1154,7 +1154,151 @@ s32 func_8013F350(void) { INCLUDE_ASM("asm/ov_SC03_107/nonmatchings/ov_SC03_107_jr_8013F350", func_8013FAF8); -INCLUDE_ASM("asm/ov_SC03_107/nonmatchings/ov_SC03_107_jr_8013F350", func_8013FFD8); +extern u8 D_8018355C[]; + + +/* func_8013FFD8 — 213 ins, double jump-table, per-location family (134 members). */ + +extern s32 func_80029178(s32 arg); +extern s32 func_800291B4(s32 arg); + +extern short D_80115128; + +s32 func_8013FFD8(s16 arg0, s32 arg1, s32 *arg2) { + + extern u8 D_80183544[]; + /* block decl dropped — file-scope array decl covers (§8e) */ + extern u8 D_80183568[]; + extern u8 D_8018356F[]; + extern u8 D_80183570[]; + extern s32 D_80183498; + extern s32 D_801834B0[]; + extern char *D_8018346C; + extern unsigned short D_80183480[]; + extern u8 D_801834F0; + extern u8 D_801834F4; + extern u8 *D_80183500; + extern s32 D_8010F3C4[]; + extern s32 D_8010EDE8[]; + extern u8 D_80115143; + extern void * D_8019A854; + extern void * D_8019A850; + s32 ret; + + *arg2 = 0x808080; + ret = 0; + + switch (arg0) { /* jtbl_801D8898 */ + case 0: { + s16 s0 = (s16) arg1; + if (s0 < 6) { + if ((((s32 (*)(u8))func_80029178)(D_80183544[s0]) & 0xFF) == 0) { + return 1; + } + ret = ((s32 *)&D_80183498)[s0]; + } + break; + } + case 1: { + s16 v1 = (s16) arg1; + if (v1 < 4) { + ret = D_801834B0[v1]; + } + break; + } + case 2: + switch ((*(s16 *)&D_80115128)) { /* jtbl_801D88B8 */ + case 0: { + s16 v1 = (s16) arg1; + if (v1 < 5) { + ret = ((s32 *)&D_8018346C)[v1]; + } + break; + } + case 1: { + s16 v1 = (s16) arg1; + if (v1 < 0xC) { + s32 v3 = ((s32 (*)(u8, s32))func_800291B4)(((u8 *)&D_8018355C)[v1], arg1) & 0xFF; + if (v3 == 0) { + return 1; + } + ret = D_8010EDE8[v3 * 3]; + } + break; + } + case 2: { + s16 s0 = (s16) arg1; + if (s0 < 6) { + if ((((s32 (*)(u8))func_80029178)((*(u8 * *)&D_8019A854)[s0]) & 0xFF) == 0) { + return 1; + } + ret = (*(s32 * *)&D_8019A850)[s0]; + } + break; + } + case 3: { + s16 s0 = (s16) arg1; + if (s0 < 6) { + if ((((s32 (*)(u8))func_80029178)(D_80183568[s0]) & 0xFF) == 0) { + return 1; + } + ret = ((s32 *)D_80183480)[s0]; + } + break; + } + case 4: { + s16 v1 = (s16) arg1; + if (v1 < 5) { + ret = ((s32 *)&D_80183500)[v1]; + } + break; + } + } + break; + case 3: { + s16 t = (s16) arg1; + if (t <= 0) { + s16 s0 = t + D_80115143; + if (s0 != 0) { + if ((((s32 (*)(u8, s32))func_800291B4)(D_8018356F[s0], arg1) & 0xFF) == 0) { + *arg2 = 0x804040; + } + ret = D_8010F3C4[s0]; + } else { + ret = (*(s32 *)&D_801834F0); + } + } + break; + } + case 5: { + s16 v1 = (s16) arg1; + if (v1 < 3) { + ret = ((s32 *)&D_801834F4)[v1]; + } + break; + } + case 6: { + s16 s0 = (s16) arg1; + if (s0 < 0x28) { + s32 idx; + if ((((s32 (*)(u8, s32))func_800291B4)(D_80183570[s0], arg1) & 0xFF) == 0) { + *arg2 = 0x804040; + } + idx = s0 + 1; + ret = D_8010F3C4[idx]; + } + break; + } + case 7: { + s16 v1 = (s16) arg1; + if (v1 < 5) { + ret = ((s32 *)&D_80183500)[v1]; + } + break; + } + } + return ret; +} INCLUDE_ASM("asm/ov_SC03_107/nonmatchings/ov_SC03_107_jr_8013F350", func_8014032C);