From 34f03003df2c33b2958a95a144a6125b1fbb84fa Mon Sep 17 00:00:00 2001
From: Drew T <50529377+Druthulu@users.noreply.github.com>
Date: Wed, 9 Sep 2026 04:02:44 -0600
Subject: [PATCH] =?UTF-8?q?src(phase-36):=20T4=20batch=20tus7=20=E2=80=94?=
 =?UTF-8?q?=20delever:=20batch=20tus7=20=E2=80=94=20300=20files=20(TUs;=20?=
 =?UTF-8?q?983=20drawable)=20=C2=B7=201407=20bodies:=20432=20lever-free,?=
 =?UTF-8?q?=20973=20residue,=202=20refused=20=C2=B7=20sites=20removed=2018?=
 =?UTF-8?q?55=20/=20needed=202032=20/=20refused=206=20/=20deferred=200=20?=
 =?UTF-8?q?=C2=B7=20replays=20589=20(0=20disagreed)=20=C2=B7=20compiles=20?=
 =?UTF-8?q?3211=20in=20101=20s=20wall=20=C2=B7=20final=20300/300=20identic?=
 =?UTF-8?q?al=20=C2=B7=20written=20300=20files=20|=20R22=20check-all:=2021?=
 =?UTF-8?q?8=20passed,=200=20failed=20of=20218=20|=20census:=20THE=20PHASE?=
 =?UTF-8?q?'S=20NUMBER=20(pins=20+=20asm=20statements,=20GTE=20excluded):?=
 =?UTF-8?q?=2036,764=20sites=20in=2013,224=20bodies=20(2,199=20distinct)?=
 =?UTF-8?q?=20=C2=B7=20marked=20!FAKE=2029,045=20=C2=B7=20UNMARKED=207,719?=
 =?UTF-8?q?=20(delever=5Fcycle)?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

---
 .run/P36/baseline/r22_tus7.log            |  476 ++++
 .run/P36/census/lever_census.json         |  208 +-
 .run/P36/census/lever_census.txt          |   28 +-
 .run/P36/delever/apply_tus7.log           |  750 +++++
 .run/P36/delever/batch_tus7.json          | 3031 +++++++++++++++++++++
 .run/P36/delever/calibrate_tus7.log       |    5 +
 .run/P36/delever/calibration.json         |  374 +--
 .run/P36/delever/cycle_t4_tus_c.log       |    6 +
 .run/P36/delever/ledger.jsonl             | 1407 ++++++++++
 .run/P36/delever/run_tus7.log             |  753 +++++
 phase-ends/CURRENT_PHASE.md               |    4 +-
 src/ov_SC01_000/ov_SC01_000.c             |   21 +-
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 src/ov_SC06_013/ov_SC06_013_jr_8017AE2C.c |   18 +-
 src/ov_SC06_014/ov_SC06_014.c             |   21 +-
 src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c |   34 +-
 src/ov_SC06_014/ov_SC06_014_jr_8017AE2C.c |   18 +-
 src/ov_SC06_015/ov_SC06_015.c             |   21 +-
 src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c |   34 +-
 src/ov_SC06_015/ov_SC06_015_jr_8017AE2C.c |   18 +-
 src/ov_SC06_016/ov_SC06_016.c             |   21 +-
 src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c |   34 +-
 src/ov_SC06_016/ov_SC06_016_jr_8017AE2C.c |   27 +-
 src/ov_SC06_018/ov_SC06_018.c             |   21 +-
 src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c |   34 +-
 src/ov_SC06_018/ov_SC06_018_jr_8017AE2C.c |   18 +-
 src/ov_SC06_020/ov_SC06_020.c             |   21 +-
 src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c |   34 +-
 src/ov_SC06_020/ov_SC06_020_jr_8017AE2C.c |   18 +-
 src/ov_SC06_022/ov_SC06_022.c             |   21 +-
 src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c |   34 +-
 src/ov_SC06_022/ov_SC06_022_jr_8017AE2C.c |   18 +-
 src/ov_SC06_024/ov_SC06_024.c             |   21 +-
 src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c |   34 +-
 src/ov_SC06_024/ov_SC06_024_jr_8017AE2C.c |   18 +-
 src/ov_SC06_025/ov_SC06_025.c             |   21 +-
 src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c |   34 +-
 src/ov_SC06_025/ov_SC06_025_jr_8017AE2C.c |   18 +-
 src/ov_SC06_027/ov_SC06_027.c             |   21 +-
 src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c |   34 +-
 src/ov_SC06_027/ov_SC06_027_jr_8017AE2C.c |   18 +-
 src/ov_SC06_029/ov_SC06_029.c             |   21 +-
 src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c |   34 +-
 src/ov_SC06_029/ov_SC06_029_jr_8017AE2C.c |   27 +-
 src/ov_SC06_030/ov_SC06_030.c             |   21 +-
 src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c |   34 +-
 src/ov_SC06_030/ov_SC06_030_jr_8017AE2C.c |   27 +-
 src/ov_SC06_032/ov_SC06_032.c             |   21 +-
 src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c |   34 +-
 src/ov_SC06_032/ov_SC06_032_jr_8017AE2C.c |   19 +-
 src/ov_SC06_033/ov_SC06_033.c             |   21 +-
 src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c |   34 +-
 src/ov_SC06_033/ov_SC06_033_jr_8017AE2C.c |   18 +-
 src/ov_SC07_000/ov_SC07_000.c             |   21 +-
 src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c |   34 +-
 src/ov_SC07_000/ov_SC07_000_jr_8017AE2C.c |   18 +-
 src/ov_SC07_001/ov_SC07_001.c             |   21 +-
 src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c |   34 +-
 src/ov_SC07_001/ov_SC07_001_jr_8017AE2C.c |   18 +-
 src/ov_SC07_002/ov_SC07_002.c             |   21 +-
 src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c |   34 +-
 src/ov_SC07_002/ov_SC07_002_jr_8017AE2C.c |   27 +-
 src/ov_SC07_008/ov_SC07_008.c             |   21 +-
 src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c |   34 +-
 src/ov_SC07_008/ov_SC07_008_jr_8017AE2C.c |   18 +-
 src/ov_SC07_009/ov_SC07_009.c             |   21 +-
 src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c |   34 +-
 src/ov_SC07_009/ov_SC07_009_jr_8017AE2C.c |   18 +-
 311 files changed, 10377 insertions(+), 4180 deletions(-)
 create mode 100644 .run/P36/baseline/r22_tus7.log
 create mode 100644 .run/P36/delever/apply_tus7.log
 create mode 100644 .run/P36/delever/batch_tus7.json
 create mode 100644 .run/P36/delever/calibrate_tus7.log
 create mode 100644 .run/P36/delever/run_tus7.log

diff --git a/.run/P36/baseline/r22_tus7.log b/.run/P36/baseline/r22_tus7.log
new file mode 100644
index 000000000..cdf7000ed
--- /dev/null
+++ b/.run/P36/baseline/r22_tus7.log
@@ -0,0 +1,476 @@
+clean: removed build/, expected/, and the regenerated splat tree (asm/, assets/, undefined_*_auto.txt).
+disc-extract: up to date — extracted/retail/ matches the committed manifest (sha1 e5c6019249dec3c71bb2cf40658a78439dddb037)
+splat 0.41.0 (powered by spimdisasm 1.41.0)
+
  0%|          | 0/1096 [00:00<?, ?it/s]
Loading symbols (symbols.us):   0%|          | 0/1096 [00:00<?, ?it/s]
Loading symbols (symbols.us): 100%|██████████| 1096/1096 [00:00<00:00, 152890.45it/s]
+
  0%|          | 0/47 [00:00<?, ?it/s]
Loading symbols (symbols.us.ram):   0%|          | 0/47 [00:00<?, ?it/s]
Loading symbols (symbols.us.ram): 100%|██████████| 47/47 [00:00<00:00, 426693.26it/s]
+
  0%|          | 0/2 [00:00<?, ?it/s]
Scanning header:   0%|          | 0/2 [00:00<?, ?it/s]
Scanning main:   0%|          | 0/2 [00:00<?, ?it/s]  
+Rodata segment '800' may belong to the text segment '800'
+    Based on the usage from the function LzssDecodeSector to the symbol jtbl_80072A38
+
+The rodata segment '800' has jumptables that are not aligned properly file-wise, indicating one or more likely file split.
+File split suggestions for this segment will follow in config yaml format:
+      - [0x6324C, .rodata]
+      - [0x63388, .rodata]
+      - [0x633FC, .rodata]
+
+
+Rodata segment '800_b' may belong to the text segment '800_b'
+    Based on the usage from the function func_8002B0B4 to the symbol jtbl_80072E44
+
+Rodata segment '800_b_2' may belong to the text segment '800_b_2'
+    Based on the usage from the function func_8002DC68 to the symbol jtbl_80072F3C
+
+The rodata segment '800_b_2' has jumptables that are not aligned properly file-wise, indicating one or more likely file split.
+File split suggestions for this segment will follow in config yaml format:
+      - [0x63920, .rodata]
+
+
+Rodata segment '800_c' may belong to the text segment '800_c'
+    Based on the usage from the function func_80035270 to the symbol jtbl_800732A0
+
Scanning main: 100%|██████████| 2/2 [00:01<00:00,  1.24it/s]
Scanning main: 100%|██████████| 2/2 [00:01<00:00,  1.24it/s]
+
  0%|          | 0/2 [00:00<?, ?it/s]
Splitting header:   0%|          | 0/2 [00:00<?, ?it/s]
Splitting main:   0%|          | 0/2 [00:00<?, ?it/s]  
Splitting main: 100%|██████████| 2/2 [00:01<00:00,  1.93it/s]
Splitting main: 100%|██████████| 2/2 [00:01<00:00,  1.93it/s]
+
  0%|          | 0/2 [00:00<?, ?it/s]
Linker script header:   0%|          | 0/2 [00:00<?, ?it/s]
Linker script main:   0%|          | 0/2 [00:00<?, ?it/s]  
Linker script main: 100%|██████████| 2/2 [00:00<00:00, 77.65it/s]
+Split 340 KB (82.28%) in defined segments
+              header:     2 KB (0.50%) 1 split, 0 cached
+                   c:   338 KB (81.78%) 85 split, 0 cached
+             unknown:      0 B (0.00%) from unknown bin files
+ld_interleave --order: .main island = 8 pieces [53198.data.o, 800.o, 63470.data.o, 800_b.o, 800_b_2.o, 63940.data.o, 800_c.o, 63C4C.data.o]; pre=0 text=85 empties=166 bss=85
+[ OK ] ov_SC05_000
+[ OK ] ov_SC01_000
+[ OK ] resident
+[ OK ] ov_SC04_000
+[ OK ] ov_SC06_000
+[ OK ] ov_SC01_006
+[ OK ] ov_SC03_002
+[ OK ] ov_SC02_003
+[ OK ] ov_SC04_019
+[ OK ] ov_SC02_000
+[ OK ] ov_SC01_005
+[ OK ] ov_SC01_077
+[ OK ] ov_SC01_001
+[ OK ] ov_SC04_018
+[ OK ] ov_SC03_001
+[ OK ] ov_SC03_006
+[ OK ] ov_SC01_004
+[ OK ] ov_SC01_074
+[ OK ] ov_SC01_008
+[ OK ] ov_SC07_000
+[ OK ] ov_SC02_004
+[ OK ] ov_SC02_015
+[ OK ] ov_SC01_080
+[ OK ] ov_SC01_084
+[ OK ] ov_SC02_021
+[ OK ] ov_SC01_009
+[ OK ] ov_SC02_016
+[ OK ] ov_SC02_005
+[ OK ] ov_SC02_031
+[ OK ] ov_SC02_026
+[ OK ] ov_SC02_027
+[ OK ] ov_SC02_039
+[ OK ] ov_SC02_028
+[ OK ] ov_SC02_011
+[ OK ] ov_SC03_003
+[ OK ] ov_SC03_012
+[ OK ] ov_SC02_035
+[ OK ] ov_SC02_017
+[ OK ] ov_SC02_041
+[ OK ] ov_SC03_010
+[ OK ] ov_SC03_011
+[ OK ] ov_SC03_013
+[ OK ] ov_SC03_023
+[ OK ] ov_SC03_007
+[ OK ] ov_SC03_024
+[ OK ] ov_SC03_014
+[ OK ] ov_SC03_092
+[ OK ] ov_SC03_029
+[ OK ] ov_SC03_015
+[ OK ] ov_SC03_089
+[ OK ] ov_SC03_028
+[ OK ] ov_SC03_031
+[ OK ] ov_SC03_094
+[ OK ] ov_SC03_093
+[ OK ] ov_SC03_090
+[ OK ] ov_SC03_096
+[ OK ] ov_SC03_091
+[ OK ] ov_SC03_095
+[ OK ] ov_SC03_030
+[ OK ] ov_SC03_097
+[ OK ] ov_SC03_098
+[ OK ] ov_SC03_101
+[ OK ] ov_SC03_099
+[ OK ] ov_SC03_109
+[ OK ] ov_SC03_108
+[ OK ] ov_SC03_100
+[ OK ] ov_SC03_102
+[ OK ] ov_SC03_103
+[ OK ] ov_SC03_110
+[ OK ] ov_SC03_105
+[ OK ] ov_SC03_113
+[ OK ] ov_SC03_111
+[ OK ] ov_SC03_115
+[ OK ] ov_SC03_114
+[ OK ] ov_SC03_112
+[ OK ] ov_SC03_104
+[ OK ] ov_SC03_116
+[ OK ] ov_SC03_126
+[ OK ] ov_SC03_121
+[ OK ] ov_SC03_117
+[ OK ] ov_SC04_003
+[ OK ] ov_SC04_006
+[ OK ] ov_SC04_008
+[ OK ] ov_SC03_118
+[ OK ] ov_SC04_004
+[ OK ] ov_SC04_009
+[ OK ] ov_SC03_119
+[ OK ] ov_SC03_125
+[ OK ] ov_SC04_002
+[ OK ] ov_SC04_005
+[ OK ] ov_SC04_007
+[ OK ] ov_SC04_010
+[ OK ] ov_SC03_124
+[ OK ] ov_SC04_012
+[ OK ] ov_SC04_021
+[ OK ] ov_SC05_006
+[ OK ] ov_SC05_002
+[ OK ] ov_SC04_016
+[ OK ] ov_SC05_004
+[ OK ] ov_SC04_015
+[ OK ] ov_SC04_020
+[ OK ] ov_SC05_007
+[ OK ] ov_SC05_001
+[ OK ] ov_SC05_003
+[ OK ] ov_SC05_005
+[ OK ] ov_SC05_009
+[ OK ] ov_SC05_008
+[ OK ] ov_SC04_011
+[ OK ] ov_SC05_011
+[ OK ] ov_SC05_010
+[ OK ] ov_SC05_019
+[ OK ] ov_SC06_015
+[ OK ] ov_SC06_010
+[ OK ] ov_SC06_014
+[ OK ] ov_SC06_013
+[ OK ] ov_SC06_008
+[ OK ] ov_SC06_011
+[ OK ] ov_SC06_016
+[ OK ] ov_SC06_020
+[ OK ] ov_SC05_018
+[ OK ] ov_SC05_017
+[ OK ] ov_SC06_018
+[ OK ] ov_SC06_027
+[ OK ] ov_SC06_022
+[ OK ] ov_SC06_006
+[ OK ] ov_SC06_025
+[ OK ] ov_SC06_024
+[ OK ] md_MAIN_013
+[ OK ] md_MAIN_014
+[ OK ] ov_SC07_008
+[ OK ] ov_SC07_002
+[ OK ] md_MAIN_016
+[ OK ] md_MAIN_015
+[ OK ] md_MAIN_017
+[ OK ] md_MAIN_018
+[ OK ] md_MAIN_020
+[ OK ] md_MAIN_019
+[ OK ] md_MAIN_021
+[ OK ] ov_SC06_030
+[ OK ] ov_SC07_001
+[ OK ] md_MAIN_022
+[ OK ] md_MAIN_023
+[ OK ] md_MAIN_024
+[ OK ] md_MAIN_025
+[ OK ] md_MAIN_027
+[ OK ] md_MAIN_026
+[ OK ] md_MAIN_028
+[ OK ] ov_SC07_009
+[ OK ] md_MAIN_030
+[ OK ] md_MAIN_031
+[ OK ] md_MAIN_032
+[ OK ] md_MAIN_033
+[ OK ] md_MAIN_029
+[ OK ] md_MAIN_034
+[ OK ] md_MAIN_035
+[ OK ] md_MAIN_037
+[ OK ] md_MAIN_036
+[ OK ] md_MAIN_039
+[ OK ] ov_SC06_032
+[ OK ] ov_MAIN_012
+[ OK ] ov_SC06_029
+[ OK ] md_MAIN_038
+[ OK ] md_MAIN_040
+[ OK ] ov_SC07_011
+[ OK ] md_MAIN_041
+[ OK ] md_MAIN_042
+[ OK ] md_MAIN_043
+[ OK ] md_MAIN_044
+[ OK ] ov_SC07_010
+[ OK ] ov_SC06_033
+[ OK ] md_MAIN_047
+[ OK ] md_MAIN_046
+[ OK ] md_MAIN_045
+[ OK ] md_MAIN_008
+[ OK ] md_MAIN_001
+[ OK ] md_MAIN_011
+[ OK ] md_SC03_073
+[ OK ] md_SC03_074
+[ OK ] md_SC03_078
+[ OK ] md_SC03_075
+[ OK ] md_SC03_077
+[ OK ] md_SC03_076
+[ OK ] md_SC03_132
+[ OK ] md_SC03_079
+[ OK ] md_SC03_133
+[ OK ] ov_SC07_007
+[ OK ] md_SC03_137
+[ OK ] md_SC03_135
+[ OK ] md_SC03_136
+[ OK ] md_SC03_134
+[ OK ] ov_SC03_107
+[ OK ] md_SC03_138
+[ OK ] md_SC04_024
+[ OK ] md_MAIN_003
+[ OK ] md_SC04_025
+[ OK ] md_SC04_029
+[ OK ] md_SC04_026
+[ OK ] md_SC04_028
+[ OK ] md_SC04_027
+[ OK ] md_SC05_023
+[ OK ] md_SC05_028
+[ OK ] md_SC05_025
+[ OK ] md_MAIN_007
+[ OK ] md_SC04_030
+[ OK ] md_SC05_027
+[ OK ] md_SC05_024
+[ OK ] md_MAIN_009
+[ OK ] md_SC05_029
+[ OK ] md_SC05_026
+[ OK ] md_SC03_054
+[ OK ] md_SC03_056
+[ OK ] md_SC03_053
+[ OK ] md_SC02_009
+[ OK ] ov_SC07_006
+[ OK ] ov_SC02_037
+[ OK ] md_SC07_003
+[ OK ] md_SC07_004
+extract-all: 217 extracted, 0 failed of 217 (+ main, serial)
+[ OK ] resident
+[ OK ] ov_SC05_000
+[ OK ] ov_SC01_006
+[ OK ] ov_SC01_000
+[ OK ] ov_SC04_000
+[ OK ] ov_SC03_006
+[ OK ] ov_SC01_005
+[ OK ] ov_SC01_001
+[ OK ] ov_SC01_077
+[ OK ] ov_SC03_002
+[ OK ] ov_SC06_000
+[ OK ] ov_SC04_019
+[ OK ] ov_SC02_000
+[ OK ] ov_SC04_018
+[ OK ] ov_SC02_003
+[ OK ] ov_SC03_001
+[ OK ] ov_SC07_000
+[ OK ] ov_SC01_004
+[ OK ] ov_SC01_008
+[ OK ] ov_SC01_080
+[ OK ] ov_SC02_004
+[ OK ] ov_SC01_009
+[ OK ] ov_SC02_015
+[ OK ] ov_SC01_074
+[ OK ] ov_SC01_084
+[ OK ] ov_SC02_016
+[ OK ] ov_SC02_017
+[ OK ] ov_SC02_021
+[ OK ] ov_SC02_026
+[ OK ] ov_SC02_011
+[ OK ] ov_SC02_005
+[ OK ] ov_SC02_027
+[ OK ] ov_SC02_031
+[ OK ] ov_SC02_028
+[ OK ] ov_SC02_035
+[ OK ] ov_SC02_039
+[ OK ] ov_SC03_003
+[ OK ] ov_SC03_010
+[ OK ] ov_SC02_041
+[ OK ] ov_SC03_011
+[ OK ] ov_SC03_012
+[ OK ] ov_SC03_007
+[ OK ] ov_SC03_013
+[ OK ] ov_SC03_023
+[ OK ] ov_SC03_014
+[ OK ] ov_SC03_015
+[ OK ] ov_SC03_024
+[ OK ] ov_SC03_030
+[ OK ] ov_SC03_031
+[ OK ] ov_SC03_089
+[ OK ] ov_SC03_029
+[ OK ] ov_SC03_028
+[ OK ] ov_SC03_095
+[ OK ] ov_SC03_092
+[ OK ] ov_SC03_094
+[ OK ] ov_SC03_093
+[ OK ] ov_SC03_090
+[ OK ] ov_SC03_091
+[ OK ] ov_SC03_096
+[ OK ] ov_SC03_097
+[ OK ] main
+[ OK ] ov_SC03_098
+[ OK ] ov_SC03_101
+[ OK ] ov_SC03_099
+[ OK ] ov_SC03_100
+[ OK ] ov_SC03_102
+[ OK ] ov_SC03_103
+[ OK ] ov_SC03_109
+[ OK ] ov_SC03_104
+[ OK ] ov_SC03_108
+[ OK ] ov_SC03_111
+[ OK ] ov_SC03_110
+[ OK ] ov_SC03_113
+[ OK ] ov_SC03_105
+[ OK ] ov_SC03_114
+[ OK ] ov_SC03_112
+[ OK ] ov_SC03_115
+[ OK ] ov_SC03_116
+[ OK ] ov_SC03_117
+[ OK ] ov_SC03_118
+[ OK ] ov_SC03_119
+[ OK ] ov_SC03_121
+[ OK ] ov_SC03_125
+[ OK ] ov_SC04_002
+[ OK ] ov_SC04_004
+[ OK ] ov_SC03_124
+[ OK ] ov_SC03_126
+[ OK ] ov_SC04_006
+[ OK ] ov_SC04_003
+[ OK ] ov_SC04_007
+[ OK ] ov_SC04_008
+[ OK ] ov_SC04_009
+[ OK ] ov_SC04_005
+[ OK ] ov_SC04_010
+[ OK ] ov_SC04_012
+[ OK ] ov_SC04_016
+[ OK ] ov_SC04_015
+[ OK ] ov_SC04_011
+[ OK ] ov_SC04_021
+[ OK ] ov_SC05_001
+[ OK ] ov_SC05_003
+[ OK ] ov_SC05_002
+[ OK ] ov_SC05_005
+[ OK ] ov_SC04_020
+[ OK ] ov_SC05_008
+[ OK ] ov_SC05_009
+[ OK ] ov_SC05_004
+[ OK ] ov_SC05_006
+[ OK ] ov_SC05_007
+[ OK ] ov_SC05_010
+[ OK ] ov_SC05_011
+[ OK ] ov_SC05_019
+[ OK ] ov_SC05_018
+[ OK ] ov_SC06_006
+[ OK ] ov_SC06_010
+[ OK ] ov_SC05_017
+[ OK ] ov_SC06_013
+[ OK ] ov_SC06_008
+[ OK ] ov_SC06_011
+[ OK ] ov_SC06_015
+[ OK ] ov_SC06_014
+[ OK ] ov_SC06_016
+[ OK ] ov_SC06_020
+[ OK ] ov_SC06_022
+[ OK ] ov_SC06_018
+[ OK ] ov_SC06_024
+[ OK ] ov_SC06_027
+[ OK ] ov_SC06_025
+[ OK ] md_MAIN_013
+[ OK ] md_MAIN_014
+[ OK ] md_MAIN_015
+[ OK ] md_MAIN_016
+[ OK ] md_MAIN_017
+[ OK ] ov_SC06_030
+[ OK ] md_MAIN_018
+[ OK ] md_MAIN_019
+[ OK ] ov_SC06_029
+[ OK ] ov_SC07_001
+[ OK ] ov_SC07_008
+[ OK ] ov_SC07_002
+[ OK ] md_MAIN_021
+[ OK ] md_MAIN_020
+[ OK ] md_MAIN_022
+[ OK ] ov_SC07_009
+[ OK ] md_MAIN_023
+[ OK ] md_MAIN_024
+[ OK ] md_MAIN_025
+[ OK ] ov_SC07_007
+[ OK ] md_MAIN_026
+[ OK ] md_MAIN_027
+[ OK ] md_MAIN_029
+[ OK ] md_MAIN_030
+[ OK ] md_MAIN_028
+[ OK ] md_MAIN_032
+[ OK ] md_MAIN_031
+[ OK ] md_MAIN_033
+[ OK ] md_MAIN_034
+[ OK ] md_MAIN_037
+[ OK ] md_MAIN_039
+[ OK ] md_MAIN_038
+[ OK ] md_MAIN_036
+[ OK ] md_MAIN_041
+[ OK ] md_MAIN_035
+[ OK ] md_MAIN_042
+[ OK ] md_MAIN_040
+[ OK ] md_MAIN_043
+[ OK ] ov_SC07_006
+[ OK ] md_MAIN_044
+[ OK ] md_MAIN_047
+[ OK ] md_MAIN_008
+[ OK ] md_MAIN_045
+[ OK ] md_MAIN_046
+[ OK ] md_MAIN_001
+[ OK ] ov_SC07_011
+[ OK ] md_MAIN_011
+[ OK ] ov_SC06_033
+[ OK ] md_SC03_074
+[ OK ] md_SC03_073
+[ OK ] md_SC03_075
+[ OK ] md_SC03_078
+[ OK ] md_SC03_079
+[ OK ] ov_SC07_010
+[ OK ] md_SC03_077
+[ OK ] md_SC03_076
+[ OK ] md_SC03_132
+[ OK ] md_SC03_134
+[ OK ] md_SC03_133
+[ OK ] md_SC07_003
+[ OK ] md_SC03_137
+[ OK ] ov_MAIN_012
+[ OK ] md_SC04_024
+[ OK ] md_SC03_136
+[ OK ] md_SC04_025
+[ OK ] md_SC04_026
+[ OK ] md_SC03_138
+[ OK ] md_SC03_135
+[ OK ] md_SC04_030
+[ OK ] md_MAIN_003
+[ OK ] md_SC04_029
+[ OK ] md_SC04_028
+[ OK ] md_SC05_024
+[ OK ] md_SC05_025
+[ OK ] md_SC05_028
+[ OK ] md_SC07_004
+[ OK ] md_SC04_027
+[ OK ] ov_SC06_032
+[ OK ] md_SC05_023
+[ OK ] md_MAIN_009
+[ OK ] md_MAIN_007
+[ OK ] md_SC03_053
+[ OK ] md_SC05_027
+[ OK ] md_SC05_029
+[ OK ] md_SC03_054
+[ OK ] md_SC05_026
+[ OK ] md_SC03_056
+[ OK ] md_SC02_009
+[ OK ] ov_SC02_037
+[ OK ] ov_SC03_107
+check-all: 218 passed, 0 failed of 218
+wall=116.04 s user=1838.31 s sys=291.23 s
+exit=0
diff --git a/.run/P36/census/lever_census.json b/.run/P36/census/lever_census.json
index b2e470634..1d9042f60 100644
--- a/.run/P36/census/lever_census.json
+++ b/.run/P36/census/lever_census.json
@@ -41,7 +41,7 @@
    "addu": 968,
    "and": 2,
    "andi": 1,
-   "la": 145,
+   "la": 144,
    "lh": 134,
    "li": 1,
    "lui": 5,
@@ -55,14 +55,14 @@
   },
   "kinds": {
    "asm-body/direct": 13,
-   "barrier/direct": 4941,
+   "barrier/direct": 4879,
    "barrier/via-macro": 2,
    "gte/direct": 1140,
    "gte/via-macro": 5751,
-   "instruction/direct": 1700,
+   "instruction/direct": 1699,
    "instruction/via-macro": 22,
-   "keepalive/direct": 2089,
-   "launder/direct": 4532,
+   "keepalive/direct": 2050,
+   "launder/direct": 4397,
    "launder/via-macro": 440,
    "verbatim-body/direct": 2682
   }
@@ -70,65 +70,65 @@
  "binaries": 218,
  "classes": {
   "A": {
-   "bodies": 11348,
-   "distinct_bodies": 1831,
+   "bodies": 10964,
+   "distinct_bodies": 1804,
    "file_scope": 0,
-   "in_bodies": 24841,
+   "in_bodies": 23262,
    "kinds": {
-    "pin": 24841
+    "pin": 23262
    },
-   "marked": 16440,
-   "sites": 24841,
+   "marked": 17729,
+   "sites": 23262,
    "tus": 2676,
-   "unmarked": 8401
+   "unmarked": 5533
   },
   "B": {
-   "bodies": 10122,
-   "distinct_bodies": 1200,
+   "bodies": 10052,
+   "distinct_bodies": 1196,
    "file_scope": 13,
-   "in_bodies": 23299,
+   "in_bodies": 23062,
    "kinds": {
     "asm-body": 13,
-    "barrier": 4943,
+    "barrier": 4881,
     "gte": 6891,
-    "instruction": 1722,
-    "keepalive": 2089,
-    "launder": 4972,
+    "instruction": 1721,
+    "keepalive": 2050,
+    "launder": 4837,
     "verbatim-body": 2682
    },
-   "marked": 10712,
-   "sites": 23312,
-   "tus": 2450,
-   "unmarked": 12600
+   "marked": 11453,
+   "sites": 23075,
+   "tus": 2432,
+   "unmarked": 11622
   },
   "C": {
-   "bodies": 710,
-   "distinct_bodies": 146,
-   "file_scope": 424,
-   "in_bodies": 1748,
+   "bodies": 678,
+   "distinct_bodies": 143,
+   "file_scope": 423,
+   "in_bodies": 1714,
    "kinds": {
-    "cast": 1615,
-    "decl-body": 131,
-    "decl-file": 424,
+    "cast": 1612,
+    "decl-body": 100,
+    "decl-file": 423,
     "param": 2
    },
-   "marked": 1,
-   "sites": 2172,
-   "tus": 757,
-   "unmarked": 2171
+   "marked": 2,
+   "sites": 2137,
+   "tus": 726,
+   "unmarked": 2135
   },
   "D": {
-   "bodies": 69,
-   "distinct_bodies": 69,
+   "bodies": 67,
+   "distinct_bodies": 67,
    "file_scope": 0,
-   "in_bodies": 86,
+   "in_bodies": 83,
    "kinds": {
-    "register": 86
+    "register": 83
    },
    "marked": 0,
-   "sites": 86,
-   "tus": 19,
-   "unmarked": 86
+   "sites": 83,
+   "tus": 17,
+   "unmarked": 83
   },
   "E": {
    "bodies": 737,
@@ -175,33 +175,37 @@
    "expected": 45,
    "got": 45,
    "name": "src/800.c func_800226C0 pins",
-   "ok": true
+   "ok": true,
+   "status": "OK"
   },
   {
    "expected": 26,
    "got": 26,
    "name": "src/shared/ov/func_80178004.h pins",
-   "ok": true
+   "ok": true,
+   "status": "OK"
   },
   {
    "expected": 3,
-   "got": 3,
+   "got": 0,
    "name": "ov_SC03_006 func_80184034 bare-name pins",
-   "ok": true
+   "ok": true,
+   "status": "N-A"
   },
   {
    "expected": 0,
    "got": 0,
    "name": "engine_prelude.h asm sites (a macro definition only)",
-   "ok": true
+   "ok": true,
+   "status": "OK"
   }
  ],
  "coverage": {
   "asm": {
    "comment_dead": 6792,
-   "live": 51761,
+   "live": 49945,
    "macro_block": 7189,
-   "raw": 65742
+   "raw": 63926
   },
   "attribute": {
    "comment_dead": 0,
@@ -217,30 +221,30 @@
   },
   "register": {
    "comment_dead": 8584,
-   "live": 24927,
+   "live": 23345,
    "macro_block": 18,
-   "raw": 33529
+   "raw": 31947
   },
   "volatile": {
    "comment_dead": 2607,
-   "live": 3914,
+   "live": 3877,
    "macro_block": 6510,
-   "raw": 13031
+   "raw": 12994
   }
  },
  "coverage_ok": true,
- "elapsed_s": 35.7,
+ "elapsed_s": 50.8,
  "generated": "2026-09-09",
- "head": "ca761c4f6",
+ "head": "3e60fdf41",
  "headers": 3181,
  "levers_AB": {
-  "asm": 13739,
-  "bodies": 13622,
-  "distinct_bodies": 2225,
-  "marked": 27018,
-  "pins": 24841,
-  "sites": 38580,
-  "unmarked": 11562,
+  "asm": 13502,
+  "bodies": 13224,
+  "distinct_bodies": 2199,
+  "marked": 29045,
+  "pins": 23262,
+  "sites": 36764,
+  "unmarked": 7719,
   "what": "register pins + asm statements excluding GTE ops: the classes the phase drives to 0"
  },
  "macro_definitions": {
@@ -386,74 +390,74 @@
   "sample": []
  },
  "pins": {
-  "bare_name": 74,
-  "init": 3421,
+  "bare_name": 65,
+  "init": 3142,
   "registers": {
-   "$0": 1337,
+   "$0": 1335,
    "$1": 2,
    "$10": 166,
-   "$11": 30,
+   "$11": 29,
    "$12": 420,
-   "$13": 25,
-   "$14": 153,
+   "$13": 24,
+   "$14": 152,
    "$15": 8,
-   "$16": 2478,
-   "$17": 2116,
-   "$18": 731,
-   "$19": 685,
-   "$2": 4400,
-   "$20": 381,
-   "$21": 572,
-   "$22": 155,
-   "$23": 287,
+   "$16": 2115,
+   "$17": 1785,
+   "$18": 653,
+   "$19": 671,
+   "$2": 4243,
+   "$20": 376,
+   "$21": 445,
+   "$22": 30,
+   "$23": 162,
    "$24": 4,
-   "$25": 7,
+   "$25": 6,
    "$29": 13,
-   "$3": 2736,
-   "$4": 3125,
-   "$5": 2587,
-   "$6": 625,
-   "$7": 788,
-   "$8": 611,
-   "$9": 325,
+   "$3": 2707,
+   "$4": 3074,
+   "$5": 2580,
+   "$6": 609,
+   "$7": 782,
+   "$8": 482,
+   "$9": 324,
    "3": 1,
    "4": 1,
    "5": 2,
-   "6": 6,
+   "6": 5,
    "7": 5,
    "9": 4,
-   "a0": 17,
+   "a0": 14,
    "a1": 3,
    "s0": 2,
    "s1": 1,
    "s2": 1,
-   "v0": 16,
-   "v1": 15
+   "v0": 13,
+   "v1": 13
   },
-  "sites": 24841,
+  "sites": 23262,
   "sp": 13,
   "spelling": {
-   "__asm__": 24635,
-   "asm": 206
+   "__asm__": 23101,
+   "asm": 161
   },
-  "volatile_qualified": 136,
-  "zero": 1337
+  "volatile_qualified": 135,
+  "zero": 1335
  },
- "src_stamp": "22522952c40f4327",
+ "src_stamp": "585eacba5f94123d",
  "tus": 4121,
  "unclassified": 0,
  "union_AD": {
-  "bodies": 17120,
+  "bodies": 16689,
   "by_kind": {
    "main": 204,
    "md": 213,
-   "ov": 16294,
+   "ov": 15863,
    "resident": 16,
    "shared": 393
   },
-  "copies_in_multi": 15086,
-  "distinct_bodies": 2537,
-  "multi_copy_classes": 503
+  "copies_in_multi": 14675,
+  "distinct_bodies": 2507,
+  "multi_copy_classes": 493
  },
  "verbatim_excluded": {
   "functions": 13,
@@ -489,9 +493,9 @@
  },
  "volatile": {
   "kinds": {
-   "cast": 1615,
-   "decl-body": 131,
-   "decl-file": 424,
+   "cast": 1612,
+   "decl-body": 100,
+   "decl-file": 423,
    "param": 2
   }
  }
diff --git a/.run/P36/census/lever_census.txt b/.run/P36/census/lever_census.txt
index 4db8128e1..cd170cb83 100644
--- a/.run/P36/census/lever_census.txt
+++ b/.run/P36/census/lever_census.txt
@@ -1,29 +1,29 @@
 lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclassified 0 · verbatim excluded 13 fn / 14 sites (manifest 13)
-  coverage asm       raw  65742 = live  51761 + macro-block  7189 + comment/dead  6792
-  coverage register  raw  33529 = live  24927 + macro-block    18 + comment/dead  8584
-  coverage volatile  raw  13031 = live   3914 + macro-block  6510 + comment/dead  2607
+  coverage asm       raw  63926 = live  49945 + macro-block  7189 + comment/dead  6792
+  coverage register  raw  31947 = live  23345 + macro-block    18 + comment/dead  8584
+  coverage volatile  raw  12994 = live   3877 + macro-block  6510 + comment/dead  2607
   coverage builtin   raw    599 = live    445 + macro-block     0 + comment/dead   154
   coverage attribute raw     76 = live     76 + macro-block     0 + comment/dead     0
   class  sites  in-bodies  file-scope  bodies  distinct  TUs  marked  unmarked   kinds
-  A pins        24841     24841          0   11348      1831  2676   16440      8401   {'pin': 24841}
-  B asm         23312     23299         13   10122      1200  2450   10712     12600   {'barrier': 4943, 'launder': 4972, 'keepalive': 2089, 'instruction': 1722, 'gte': 6891, 'asm-body': 13, 'verbatim-body': 2682}
-  C volatile     2172      1748        424     710       146   757       1      2171   {'cast': 1615, 'decl-body': 131, 'decl-file': 424, 'param': 2}
-  D register       86        86          0      69        69    19       0        86   {'register': 86}
+  A pins        23262     23262          0   10964      1804  2676   17729      5533   {'pin': 23262}
+  B asm         23075     23062         13   10052      1196  2432   11453     11622   {'gte': 6891, 'barrier': 4881, 'instruction': 1721, 'launder': 4837, 'keepalive': 2050, 'asm-body': 13, 'verbatim-body': 2682}
+  C volatile     2137      1714        423     678       143   726       2      2135   {'decl-body': 100, 'decl-file': 423, 'cast': 1612, 'param': 2}
+  D register       83        83          0      67        67    17       0        83   {'register': 83}
   E asm-label    7428      1005       6423     737       117  2080       0      7428   {'asm-label': 7428}
   F builtin       445       445          0     428        29   302       0       445   {'builtin': 445}
   G attribute      76         1         75       1         1    40       0        76   {'attribute': 76}
-  UNION A–D: 17,120 bodies · 2,537 distinct (addresses normalized) · 503 multi-copy classes holding 15,086 bodies · by kind {'ov': 16294, 'shared': 393, 'md': 213, 'resident': 16, 'main': 204}
-  THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 38,580 sites in 13,622 bodies (2,225 distinct) · marked !FAKE 27,018 · UNMARKED 11,562
+  UNION A–D: 16,689 bodies · 2,507 distinct (addresses normalized) · 493 multi-copy classes holding 14,675 bodies · by kind {'ov': 15863, 'shared': 393, 'main': 204, 'md': 213, 'resident': 16}
+  THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 36,764 sites in 13,224 bodies (2,199 distinct) · marked !FAKE 29,045 · UNMARKED 7,719
   orphan !FAKE markers (no pin/asm site on the line nor below): 0
-  pins: 24,841 · $0 1,337 · $sp 13 · with initializer 3,421 · volatile-qualified 136 · bare-name 74 · spellings {'__asm__': 24635, 'asm': 206}
+  pins: 23,262 · $0 1,335 · $sp 13 · with initializer 3,142 · volatile-qualified 135 · bare-name 65 · spellings {'__asm__': 23101, 'asm': 161}
   whole-body asm routines in C shells, manifest PERMANENT (hand asm, NOT levers): 22 routines · 2,682 sites (2,660 private copies + 22 shared headers); asm-bodies NOT permanent (levers): 13 site(s) ['func_8001E378:DECOMPILE-NOW', 'func_80020F34:DECOMPILE-NOW', 'func_800249F0:DECOMPILE-NOW', 'func_80025CBC:DECOMPILE-NOW', 'func_80026514:UNCERTAIN', 'func_800268D0:UNCERTAIN', 'func_80027058:DECOMPILE-NOW', 'func_80027200:DECOMPILE-NOW', 'func_800CBA44:DECOMPILE-NOW', 'func_8017D810:DECOMPILE-NOW', 'func_8017E26C:UNCERTAIN', 'func_80184440:DECOMPILE-NOW', 'func_801A3BCC:DECOMPILE-NOW']
-  asm kinds: {'asm-body/direct': 13, 'barrier/direct': 4941, 'barrier/via-macro': 2, 'gte/direct': 1140, 'gte/via-macro': 5751, 'instruction/direct': 1700, 'instruction/via-macro': 22, 'keepalive/direct': 2089, 'launder/direct': 4532, 'launder/via-macro': 440, 'verbatim-body/direct': 2682}
-  instruction mnemonics: {'addu': 968, 'move': 407, 'la': 145, 'lh': 134, 'addiu': 24, 'RTP_SND': 22, '.section': 7, 'lui': 5, 'and': 2, 'andi': 1, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1}
+  asm kinds: {'asm-body/direct': 13, 'barrier/direct': 4879, 'barrier/via-macro': 2, 'gte/direct': 1140, 'gte/via-macro': 5751, 'instruction/direct': 1699, 'instruction/via-macro': 22, 'keepalive/direct': 2050, 'launder/direct': 4397, 'launder/via-macro': 440, 'verbatim-body/direct': 2682}
+  instruction mnemonics: {'addu': 968, 'move': 407, 'la': 144, 'lh': 134, 'addiu': 24, 'RTP_SND': 22, '.section': 7, 'lui': 5, 'and': 2, 'andi': 1, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1}
   gte mnemonics: {'gte_ldv0': 653, 'swc2': 449, 'lwc2': 435, 'gte_stsxy': 361, 'gte_rtps': 356, 'gte_stflg': 319, 'gte_rtpt': 289, 'gte_stsxy3': 191, 'gte_ldrgb': 162, 'gte_ldv3c': 159, 'gte_rt': 155, 'gte_SetRotMatrix': 150, 'gte_SetTransMatrix': 145, 'gte_stsv': 145, 'gte_stlvnl': 143, 'gte_ldv3': 140, 'gte_ldIR0z': 133, 'gte_ldIRGB': 133, 'gte_dpcl': 133, 'gte_stORGB': 133, 'gte_mvmva0': 131, 'gte_stsz4': 126, 'gte_stsz3': 123, 'gte_stszotz': 113, 'gte_nclip': 96, 'gte_stopz': 96, 'gte_stsxy3c': 94, 'lw': 80, 'lhu': 70, 'mfc2': 61}
   asm-bearing macro definitions: 9,540 (338 names, 32 with >1 text) kinds {'gte': 9102, 'launder': 428, 'instruction': 9, 'barrier': 1}
   controls (R39):
     src/800.c func_800226C0 pins                         got 45     expected 45  OK
     src/shared/ov/func_80178004.h pins                   got 26     expected 26  OK
-    ov_SC03_006 func_80184034 bare-name pins             got 3      expected 3  OK
+    ov_SC03_006 func_80184034 bare-name pins             got 0      expected 3  N-A
     engine_prelude.h asm sites (a macro definition only) got 0      expected 0  OK
-  elapsed 35.7 s
+  elapsed 50.8 s
diff --git a/.run/P36/delever/apply_tus7.log b/.run/P36/delever/apply_tus7.log
new file mode 100644
index 000000000..3a0ef7811
--- /dev/null
+++ b/.run/P36/delever/apply_tus7.log
@@ -0,0 +1,750 @@
+03:55:20 apply tus7: 300 files, control src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c IDENTICAL (0.25 s), calibration 3e60fdf41, census 22522952c40f4327
+03:55:20 apply tus7: phase 1 (exemplar files) 36, phase 2 (copies replay) 264
+03:55:21   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:21   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:21   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:21   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:22   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:22   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:22   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:22   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:22   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:22   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:22   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:22   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:22   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:23   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:23   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:23   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:23   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:23   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:23   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:23   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:23   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017E8A4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:23   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:24   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017D214 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:24   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:24   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:24   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017BF50 A=DIFFERS B: removed 3 needed 1 compiles 5
+03:55:24   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017ECA8 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:24   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017BEBC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:24   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017EB2C A=DIFFERS B: removed 2 needed 1 compiles 4
+03:55:24   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017D72C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:25   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017BF70 A=DIFFERS B: removed 3 needed 1 compiles 5
+03:55:25   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017EDD4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:25   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017D7B4 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:25   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:25   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017E5C4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:25   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017C6CC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:25   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017DCF8 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:25   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017BEBC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:26   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:26   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017BF50 A=DIFFERS B: removed 3 needed 1 compiles 5
+03:55:26   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017EF50 A=DIFFERS B: removed 1 needed 3 compiles 5
+03:55:26   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017EDE8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:26   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017E1D4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:26   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017C730 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:26   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017F07C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:26   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017D1E0 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:26   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017CAD4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:27   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017F63C A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:27   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017E724 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:27   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017DBAC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:27   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017E73C A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:27   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8018009C A=COMPILE-ERROR B: removed 0 needed 1 compiles 2
+03:55:27   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017F53C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:27   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017D900 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:28   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017F5D8 A=DIFFERS B: removed 5 needed 3 compiles 9
+03:55:28   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017ECEC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:28   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017DA20 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:28   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017FBFC A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:28   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017E2CC A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:28   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_80180D48 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:28   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017F114 A=DIFFERS B: removed 4 needed 4 compiles 9
+03:55:28   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017DC50 A=DIFFERS B: removed 2 needed 3 compiles 6
+03:55:28   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017E010 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:28   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017EE3C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:28   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017E2F8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:29   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017E830 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:29   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017E464 A=DIFFERS B: removed 5 needed 6 compiles 12
+03:55:29   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017DCE4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:29   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_80180E40 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:29   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017F5B4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:29   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017EB78 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:29   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017DBE4 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:29   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017FCFC A=DIFFERS B: removed 3 needed 1 compiles 5
+03:55:29   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017F5BC A=DIFFERS B: removed 2 needed 1 compiles 4
+03:55:29   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017E5C0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:29   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80180C74 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:29   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017E35C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:29   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017E6A4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:30   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8018107C A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:30   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_801818A4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:30   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017EDB8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:30   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80180F74 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:30   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017F554 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:30   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017FD14 A=DIFFERS B: removed 2 needed 1 compiles 4
+03:55:31   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8018130C A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:31   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017E764 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:31   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017E710 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:31   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017FFB4 A=DIFFERS B: removed 1 needed 2 compiles 4
+03:55:31   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80181AB4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:31   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017F724 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:31   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017FB04 A=DIFFERS B: removed 6 needed 4 compiles 11
+03:55:31   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_80181EF0 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:31   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017F1F0 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:31   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8018047C A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:32   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017ED28 A=DIFFERS B: removed 3 needed 4 compiles 8
+03:55:32   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017F8F4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:32   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80181744 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:32   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_801816C8 A=DIFFERS B: removed 1 needed 2 compiles 4
+03:55:32   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017F2D0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:32   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_80180590 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:32   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F024 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:32   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8018045C A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:32   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017F368 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:32   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017FAC4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:33   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_80182AB4 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:33   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017FC94 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:33   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F10C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:33   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:<file-scope> A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:33   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801823BC A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:33   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80180598 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:33   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017EE80 A=DIFFERS B: removed 4 needed 1 compiles 6
+03:55:34   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017FE64 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:34   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:34   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_801831B4 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:34   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017FA18 A=DIFFERS B: removed 1 needed 2 compiles 4
+03:55:34   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017F510 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:34   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017F0EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:34   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8018000C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:35   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_80183BB0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:35   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_80180EDC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:35   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80181D1C A=DIFFERS B: removed 0 needed 5 compiles 6
+03:55:35   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80182464 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:35   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180164 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:35   src/ov_SC01_077/ov_SC01_077_after.c:func_80145934 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:35   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_80180054 A=DIFFERS B: removed 2 needed 9 compiles 12
+03:55:35   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:35   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801803B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:35   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_80184B94 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:36   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80180728 A=DIFFERS B: removed 0 needed 5 compiles 6
+03:55:36   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80182560 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:36   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_801802BC A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:36   src/ov_SC01_077/ov_SC01_077_after.c:func_80145A2C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:36   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80181DAC A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:36   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80182080 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:36   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_80180224 A=DIFFERS B: removed 3 needed 1 compiles 5
+03:55:36   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180510 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:36   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_801809E4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:37   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:37   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180764 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:37   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017E83C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:37   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801808BC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:38   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80182014 A=DIFFERS B: removed 1 needed 2 compiles 4
+03:55:38   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F278 A=DIFFERS B: removed 3 needed 5 compiles 9
+03:55:38   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_801804F4 A=DIFFERS B: removed 3 needed 1 compiles 5
+03:55:38   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80180D54 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:38   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:38   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80182614 A=DIFFERS B: removed 1 needed 2 compiles 4
+03:55:38   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:38   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180A14 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:38   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017EC90 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:38   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_80182058 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:39   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180CDC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:39   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8018270C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:39   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_801810E4 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:39   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017F37C A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:39   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80182B9C A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:39   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180F84 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:39   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_80180960 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:39   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017C360 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:40   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:40   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8018122C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:40   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80182F4C A=DIFFERS B: removed 3 needed 1 compiles 5
+03:55:40   src/ov_SC01_077/ov_SC01_077_after.c:func_80148AFC A=DIFFERS B: removed 1 needed 6 compiles 8
+03:55:40   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_801815D4 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:40   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F438 A=DIFFERS B: removed 0 needed 4 compiles 5
+03:55:40   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017F794 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:40   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_80182F3C A=DIFFERS B: removed 0 needed 4 compiles 5
+03:55:40   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017D710 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:41   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801814D4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:41   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80182ED4 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:41   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80181854 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:41   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8018177C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:41   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_80181A60 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:41   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_801834C0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:41   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017DCC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:42   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80181918 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:42   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017D1E0 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:42   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80182FA8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:42   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801819D8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:42   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017FD6C A=DIFFERS B: removed 1 needed 3 compiles 5
+03:55:42   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017DE10 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:42   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_801843DC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:42   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80183A70 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:43   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80181C38 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:43   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_80180598 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:43   src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:43   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80181D98 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:43   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F600 A=DIFFERS B: removed 0 needed 4 compiles 5
+03:55:43   src/ov_SC01_077/ov_SC01_077_after.c:func_80148D44 A=DIFFERS B: removed 2 needed 2 compiles 5
+03:55:43   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017D900 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:43   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017F67C A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:43   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80181DBC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:43   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801835B0 A=DIFFERS B: removed 0 needed 7 compiles 8
+03:55:44   src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:44   src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:44   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80181F40 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:44   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_801806B8 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:44   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_801820AC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:44   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017FD9C A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:44   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80183DAC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:44   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801820C0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:44   src/ov_SC01_077/ov_SC01_077_after.c:func_80148E54 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:45   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80183D18 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:45   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017E324 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:45   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8018230C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:45   src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:45   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8018178C A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:45   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_80180FE4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:46   src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017E230 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:46   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017FC80 A=DIFFERS B: removed 0 needed 4 compiles 5
+03:55:46   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017E8D4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:46   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80183130 A=DIFFERS B: removed 6 needed 2 compiles 9
+03:55:46   src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017E614 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:46   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80182334 A=DIFFERS B: removed 1 needed 3 compiles 5
+03:55:46   src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:47   src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:47   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017FE3C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:47   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017EA24 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:47   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_801832A8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:47   src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017E834 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:47   src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:47   src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:48   src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:<file-scope> A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:48   src/ov_SC01_077/ov_SC01_077_after.c:func_8014D820 A=DIFFERS B: removed 1 needed 2 compiles 4
+03:55:48   src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017CE58 A=DIFFERS B: removed 0 needed 11 compiles 12
+03:55:48   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017F2E0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:48   src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017C25C A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:49   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801842CC A=DIFFERS B: removed 1 needed 3 compiles 5
+03:55:49   src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017CC70 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:49   src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017E044 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:49   src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017C80C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:49   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017F9BC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:49   src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017D220 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:49   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801846D0 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:49   src/ov_SC04_012/ov_SC04_012_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:49   src/ov_SC04_008/ov_SC04_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:49   src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017C95C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:49   src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017E780 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:49   src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:49   src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017D370 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:49   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80182560 A=DIFFERS B: removed 5 needed 1 compiles 7
+03:55:50   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_801805D0 A=DIFFERS B: removed 0 needed 4 compiles 5
+03:55:50   src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017D218 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:50   src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017EE8C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:50   src/ov_SC04_012/ov_SC04_012_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:50   src/ov_SC04_008/ov_SC04_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:50   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80184398 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:50   src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017DD34 A=DIFFERS B: removed 0 needed 4 compiles 5
+03:55:50   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801849A0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:51   src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:51   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80180A88 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:51   src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:51   src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:51   src/ov_SC04_012/ov_SC04_012_jr_8017AE2C.c:func_8017E060 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:52   src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:52   src/ov_SC04_008/ov_SC04_008_jr_8017AE2C.c:func_8017DE40 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:52   src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:52   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801848A4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:52   src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:52   src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:53   src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80175AB8 A=DIFFERS B: removed 0 needed 5 compiles 6
+03:55:53   src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:53   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80184CE8 A=DIFFERS B: removed 1 needed 2 compiles 4
+03:55:53   src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:53   src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:53   src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80175DA8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:54   src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:54   src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017D9E4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:54   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80184A68 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:54   src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c:func_8017EE10 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:54   src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c:func_8017D1E0 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:55   src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c:func_8017FB10 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:55   src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017C234 A=DIFFERS B: removed 3 needed 1 compiles 5
+03:55:55   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181234 A=DIFFERS B: removed 0 needed 4 compiles 5
+03:55:55   src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017DB60 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:55   src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c:func_8017D900 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:55   src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:55   src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:55   src/ov_SC02_000/ov_SC02_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:55   src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017DF44 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:55   src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017C9BC A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:56   src/ov_SC02_026/ov_SC02_026_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:56   src/ov_SC02_004/ov_SC02_004_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:56   src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_8017E230 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:56   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80185354 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:56   src/ov_SC02_026/ov_SC02_026_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:56   src/ov_SC03_003/ov_SC03_003_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:56   src/ov_SC03_012/ov_SC03_012_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:57   src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017D1E0 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:57   src/ov_SC02_004/ov_SC02_004_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:57   src/ov_SC02_026/ov_SC02_026_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:57   src/ov_SC02_000/ov_SC02_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:57   src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:57   src/ov_SC03_003/ov_SC03_003_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:57   src/ov_SC03_012/ov_SC03_012_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:57   src/ov_SC06_032/ov_SC06_032_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:58   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80185520 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:58   src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017D900 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:58   src/ov_SC06_032/ov_SC06_032_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:58   src/ov_SC03_003/ov_SC03_003_jr_8017AE2C.c:func_8017BEF8 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:58   src/ov_SC02_004/ov_SC02_004_jr_8017AE2C.c:func_8017DA30 A=DIFFERS B: removed 2 needed 2 compiles 5
+03:55:58   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181408 A=DIFFERS B: removed 3 needed 2 compiles 6
+03:55:58   src/ov_SC03_012/ov_SC03_012_jr_8017AE2C.c:func_8017DCB4 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:58   src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_801821D4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:59   src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017DF84 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:59   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801856A0 A=DIFFERS B: removed 4 needed 1 compiles 6
+03:56:00   src/ov_SC02_000/ov_SC02_000_jr_8017AE2C.c:func_8017D2D4 A=DIFFERS B: removed 0 needed 4 compiles 5
+03:56:00   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8018179C A=DIFFERS B: removed 1 needed 2 compiles 4
+03:56:00   src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c:func_8017BF14 A=DIFFERS B: removed 0 needed 4 compiles 5
+03:56:00   src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80177B5C A=DIFFERS B: removed 8 needed 15 compiles 24
+03:56:00   src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_801825BC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:00   src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80178840 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:56:01   src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80178970 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:01   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80186B70 A=DIFFERS B: removed 1 needed 4 compiles 6
+03:56:02   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181AD8 A=DIFFERS B: removed 2 needed 1 compiles 4
+03:56:02   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8018594C A=DIFFERS B: removed 1 needed 3 compiles 5
+03:56:02   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181D80 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:03   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80187314 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:03   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181FC4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:04   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80187AB8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:05   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80182A2C A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:05   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80187B34 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:06   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80182C70 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:56:06   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80185BD4 A=DIFFERS B: removed 3 needed 2 compiles 6
+03:56:08   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8018315C A=DIFFERS B: removed 2 needed 1 compiles 4
+03:56:09   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80183884 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:09   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801869CC A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:10   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80183FD4 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:56:10   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801877D8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:11   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801879C4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:11   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_801841A4 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:56:13   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801890C4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:13   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80184394 A=DIFFERS B: removed 2 needed 1 compiles 4
+03:56:15   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_801848A4 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:56:16   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801896EC A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:16   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80184EFC A=DIFFERS B: removed 2 needed 1 compiles 4
+03:56:17   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_801858F4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:18   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80189A84 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:18   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80185994 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:20   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80185C04 A=DIFFERS B: removed 1 needed 2 compiles 4
+03:56:21   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8018A6F4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:21   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80185CD8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:22   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80185FC8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:22   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8018AF88 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC05_017/ov_SC05_017_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC06_008/ov_SC06_008_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC05_011/ov_SC05_011_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC06_000/ov_SC06_000_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC06_013/ov_SC06_013_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC06_010/ov_SC06_010_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC06_006/ov_SC06_006_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC05_018/ov_SC05_018_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC05_017/ov_SC05_017_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC06_011/ov_SC06_011_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC06_008/ov_SC06_008_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC06_000/ov_SC06_000_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC05_011/ov_SC05_011_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC06_010/ov_SC06_010_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC06_006/ov_SC06_006_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC06_013/ov_SC06_013_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC05_018/ov_SC05_018_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC06_011/ov_SC06_011_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC06_008/ov_SC06_008_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC05_017/ov_SC05_017_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC06_000/ov_SC06_000_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC05_011/ov_SC05_011_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC06_010/ov_SC06_010_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:29   src/ov_SC06_006/ov_SC06_006_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:29   src/ov_SC05_018/ov_SC05_018_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:29   src/ov_SC06_013/ov_SC06_013_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:29   src/ov_SC06_011/ov_SC06_011_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:31   src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:31   src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:31   src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:31   src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:31   src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:31   src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:31   src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:31   src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:34   src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:34   src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:34   src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:34   src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:35   src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:35   src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:35   src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:35   src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:35   src/ov_SC03_109/ov_SC03_109_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:35   src/ov_SC03_105/ov_SC03_105_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:35   src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:35   src/ov_SC03_031/ov_SC03_031_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:36   src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC03_109/ov_SC03_109_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC03_105/ov_SC03_105_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:36   src/ov_SC03_031/ov_SC03_031_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:36   src/ov_SC03_109/ov_SC03_109_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:36   src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:37   src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c:func_8017CD2C A=DIFFERS B: removed 0 needed 4 compiles 5
+03:56:37   src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:37   src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:37   src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c:func_8017C9BC A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:37   src/ov_SC05_010/ov_SC05_010_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:37   src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c:func_8017C9BC A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:37   src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c:func_8017DD3C A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:37   src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c:func_8017C9BC A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:37   src/ov_SC06_016/ov_SC06_016_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:37   src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:37   src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:38   src/ov_SC03_031/ov_SC03_031_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:38   src/ov_SC05_010/ov_SC05_010_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:38   src/ov_SC06_016/ov_SC06_016_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:38   src/ov_SC06_029/ov_SC06_029_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:38   src/ov_SC06_030/ov_SC06_030_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:38   src/ov_SC01_001/ov_SC01_001_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:38   src/ov_SC07_002/ov_SC07_002_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:38   src/ov_SC01_000/ov_SC01_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:38   src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:38   src/ov_SC01_004/ov_SC01_004_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:38   src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:38   src/ov_SC06_029/ov_SC06_029_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:39   src/ov_SC06_030/ov_SC06_030_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:39   src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:39   src/ov_SC01_000/ov_SC01_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:39   src/ov_SC01_001/ov_SC01_001_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:39   src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:39   src/ov_SC07_002/ov_SC07_002_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:39   src/ov_SC01_008/ov_SC01_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:39   src/ov_SC01_004/ov_SC01_004_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:40   src/ov_SC01_009/ov_SC01_009_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC01_005/ov_SC01_005_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC01_074/ov_SC01_074_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC01_084/ov_SC01_084_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC01_008/ov_SC01_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:40   src/ov_SC02_021/ov_SC02_021_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC02_035/ov_SC02_035_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC01_009/ov_SC01_009_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:40   src/ov_SC02_016/ov_SC02_016_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC02_027/ov_SC02_027_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC02_028/ov_SC02_028_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC02_039/ov_SC02_039_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC02_041/ov_SC02_041_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC01_074/ov_SC01_074_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:40   src/ov_SC01_084/ov_SC01_084_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC02_021/ov_SC02_021_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC02_035/ov_SC02_035_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC02_028/ov_SC02_028_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC02_027/ov_SC02_027_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC01_005/ov_SC01_005_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC02_039/ov_SC02_039_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC02_016/ov_SC02_016_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC02_041/ov_SC02_041_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC03_010/ov_SC03_010_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:41   src/ov_SC03_011/ov_SC03_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_013/ov_SC03_013_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_089/ov_SC03_089_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_029/ov_SC03_029_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_010/ov_SC03_010_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:42   src/ov_SC03_011/ov_SC03_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:42   src/ov_SC03_090/ov_SC03_090_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_094/ov_SC03_094_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_096/ov_SC03_096_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_095/ov_SC03_095_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_091/ov_SC03_091_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_013/ov_SC03_013_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:42   src/ov_SC03_097/ov_SC03_097_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:43   src/ov_SC03_089/ov_SC03_089_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:43   src/ov_SC03_093/ov_SC03_093_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:43   src/ov_SC03_090/ov_SC03_090_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:43   src/ov_SC03_095/ov_SC03_095_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:43   src/ov_SC03_029/ov_SC03_029_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:43   src/ov_SC03_099/ov_SC03_099_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:43   src/ov_SC03_094/ov_SC03_094_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:43   src/ov_SC03_096/ov_SC03_096_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:43   src/ov_SC03_091/ov_SC03_091_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:43   src/ov_SC03_098/ov_SC03_098_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:44   src/ov_SC03_097/ov_SC03_097_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:44   src/ov_SC03_093/ov_SC03_093_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:44   src/ov_SC03_099/ov_SC03_099_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:44   src/ov_SC03_102/ov_SC03_102_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:44   src/ov_SC03_100/ov_SC03_100_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:44   src/ov_SC03_101/ov_SC03_101_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:44   src/ov_SC03_108/ov_SC03_108_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:44   src/ov_SC03_104/ov_SC03_104_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:44   src/ov_SC03_103/ov_SC03_103_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:44   src/ov_SC03_112/ov_SC03_112_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:45   src/ov_SC03_102/ov_SC03_102_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:45   src/ov_SC03_098/ov_SC03_098_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:45   src/ov_SC03_101/ov_SC03_101_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:45   src/ov_SC03_110/ov_SC03_110_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:45   src/ov_SC03_100/ov_SC03_100_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:45   src/ov_SC03_113/ov_SC03_113_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:45   src/ov_SC03_108/ov_SC03_108_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:45   src/ov_SC03_103/ov_SC03_103_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:45   src/ov_SC03_104/ov_SC03_104_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:45   src/ov_SC03_115/ov_SC03_115_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:45   src/ov_SC03_114/ov_SC03_114_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:45   src/ov_SC03_112/ov_SC03_112_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:46   src/ov_SC03_113/ov_SC03_113_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:46   src/ov_SC03_121/ov_SC03_121_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:46   src/ov_SC03_110/ov_SC03_110_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:46   src/ov_SC04_000/ov_SC04_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:46   src/ov_SC03_115/ov_SC03_115_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:46   src/ov_SC03_117/ov_SC03_117_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:46   src/ov_SC03_114/ov_SC03_114_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:46   src/ov_SC04_002/ov_SC04_002_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:46   src/ov_SC04_006/ov_SC04_006_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:46   src/ov_SC04_003/ov_SC04_003_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:46   src/ov_SC04_005/ov_SC04_005_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:46   src/ov_SC04_007/ov_SC04_007_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:46   src/ov_SC03_121/ov_SC03_121_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:46   src/ov_SC04_000/ov_SC04_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:46   src/ov_SC03_117/ov_SC03_117_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:47   src/ov_SC04_009/ov_SC04_009_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:47   src/ov_SC04_002/ov_SC04_002_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:47   src/ov_SC04_005/ov_SC04_005_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:47   src/ov_SC04_010/ov_SC04_010_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:47   src/ov_SC04_016/ov_SC04_016_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:47   src/ov_SC04_006/ov_SC04_006_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:47   src/ov_SC04_007/ov_SC04_007_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:47   src/ov_SC05_000/ov_SC05_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:47   src/ov_SC04_003/ov_SC04_003_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:47   src/ov_SC05_002/ov_SC05_002_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:47   src/ov_SC04_010/ov_SC04_010_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:47   src/ov_SC05_001/ov_SC05_001_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:47   src/ov_SC04_009/ov_SC04_009_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:48   src/ov_SC04_016/ov_SC04_016_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:48   src/ov_SC05_003/ov_SC05_003_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:48   src/ov_SC05_002/ov_SC05_002_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:48   src/ov_SC05_004/ov_SC05_004_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:48   src/ov_SC05_000/ov_SC05_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:48   src/ov_SC05_006/ov_SC05_006_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:48   src/ov_SC05_007/ov_SC05_007_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:48   src/ov_SC05_001/ov_SC05_001_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:48   src/ov_SC05_009/ov_SC05_009_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:48   src/ov_SC05_003/ov_SC05_003_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:48   src/ov_SC05_005/ov_SC05_005_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:48   src/ov_SC05_011/ov_SC05_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:48   src/ov_SC06_006/ov_SC06_006_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:49   src/ov_SC05_004/ov_SC05_004_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:49   src/ov_SC05_007/ov_SC05_007_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:49   src/ov_SC05_006/ov_SC05_006_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:49   src/ov_SC06_008/ov_SC06_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:49   src/ov_SC05_009/ov_SC05_009_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:49   src/ov_SC06_013/ov_SC06_013_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:49   src/ov_SC05_011/ov_SC05_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:49   src/ov_SC06_011/ov_SC06_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:49   src/ov_SC05_005/ov_SC05_005_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:49   src/ov_SC06_006/ov_SC06_006_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:49   src/ov_SC06_015/ov_SC06_015_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:49   src/ov_SC06_014/ov_SC06_014_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:49   src/ov_SC06_008/ov_SC06_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:50   src/ov_SC06_013/ov_SC06_013_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:50   src/ov_SC06_018/ov_SC06_018_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:50   src/ov_SC06_011/ov_SC06_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:50   src/ov_SC06_022/ov_SC06_022_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:50   src/ov_SC06_020/ov_SC06_020_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:50   src/ov_SC06_024/ov_SC06_024_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:50   src/ov_SC06_025/ov_SC06_025_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:50   src/ov_SC06_015/ov_SC06_015_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:50   src/ov_SC06_014/ov_SC06_014_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:50   src/ov_SC06_027/ov_SC06_027_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:50   src/ov_SC06_022/ov_SC06_022_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:50   src/ov_SC07_000/ov_SC07_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:50   src/ov_SC06_018/ov_SC06_018_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:51   src/ov_SC06_033/ov_SC06_033_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:51   src/ov_SC07_001/ov_SC07_001_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:51   src/ov_SC06_024/ov_SC06_024_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:51   src/ov_SC06_025/ov_SC06_025_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:51   src/ov_SC06_020/ov_SC06_020_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:51   src/ov_SC06_027/ov_SC06_027_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:51   src/ov_SC07_008/ov_SC07_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:51   src/ov_SC01_000/ov_SC01_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:51   src/ov_SC07_000/ov_SC07_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:51   src/ov_SC06_033/ov_SC06_033_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:51   src/ov_SC07_009/ov_SC07_009_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:51   src/ov_SC01_001/ov_SC01_001.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:51   src/ov_SC01_004/ov_SC01_004.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC07_001/ov_SC07_001_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:52   src/ov_SC01_008/ov_SC01_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC01_009/ov_SC01_009.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC01_074/ov_SC01_074.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC07_008/ov_SC07_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:52   src/ov_SC01_077/ov_SC01_077_a.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC01_005/ov_SC01_005.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC01_080/ov_SC01_080.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC01_084/ov_SC01_084.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC07_009/ov_SC07_009_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:52   src/ov_SC02_005/ov_SC02_005.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC02_004/ov_SC02_004.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_015/ov_SC02_015.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_011/ov_SC02_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_021/ov_SC02_021.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_016/ov_SC02_016.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_000/ov_SC02_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_026/ov_SC02_026.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_017/ov_SC02_017.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_027/ov_SC02_027.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_031/ov_SC02_031.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_028/ov_SC02_028.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_035/ov_SC02_035.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_039/ov_SC02_039.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_041/ov_SC02_041.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC03_002/ov_SC03_002.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC03_001/ov_SC03_001.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC03_003/ov_SC03_003.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_006/ov_SC03_006.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_007/ov_SC03_007.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_010/ov_SC03_010.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_011/ov_SC03_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_012/ov_SC03_012.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_023/ov_SC03_023.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_013/ov_SC03_013.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_024/ov_SC03_024.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_028/ov_SC03_028.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_029/ov_SC03_029.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_030/ov_SC03_030.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_089/ov_SC03_089.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_031/ov_SC03_031.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_014/ov_SC03_014.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_090/ov_SC03_090.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_091/ov_SC03_091.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_094/ov_SC03_094.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_092/ov_SC03_092.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_093/ov_SC03_093.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_096/ov_SC03_096.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_097/ov_SC03_097.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_095/ov_SC03_095.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_098/ov_SC03_098.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_099/ov_SC03_099.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_100/ov_SC03_100.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_101/ov_SC03_101.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_102/ov_SC03_102.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_103/ov_SC03_103.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_104/ov_SC03_104.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_105/ov_SC03_105.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_108/ov_SC03_108.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_109/ov_SC03_109.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_110/ov_SC03_110.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_112/ov_SC03_112.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_111/ov_SC03_111.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_113/ov_SC03_113.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_114/ov_SC03_114.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_116/ov_SC03_116.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_115/ov_SC03_115.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_117/ov_SC03_117.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_121/ov_SC03_121.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_124/ov_SC03_124.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_125/ov_SC03_125.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC04_000/ov_SC04_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC04_002/ov_SC04_002.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC04_005/ov_SC04_005.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC04_003/ov_SC04_003.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC04_004/ov_SC04_004.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_118/ov_SC03_118.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_006/ov_SC04_006.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_008/ov_SC04_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_007/ov_SC04_007.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_009/ov_SC04_009.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_012/ov_SC04_012.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_010/ov_SC04_010.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_016/ov_SC04_016.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_015/ov_SC04_015.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC05_000/ov_SC05_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_020/ov_SC04_020.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC05_001/ov_SC05_001.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_018/ov_SC04_018.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC05_002/ov_SC05_002.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC05_003/ov_SC05_003.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC05_004/ov_SC05_004.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC05_005/ov_SC05_005.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC05_006/ov_SC05_006.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC05_009/ov_SC05_009.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC05_007/ov_SC05_007.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC05_008/ov_SC05_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC05_010/ov_SC05_010.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC05_011/ov_SC05_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC05_017/ov_SC05_017.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC06_000/ov_SC06_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC05_018/ov_SC05_018.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC06_006/ov_SC06_006.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC06_008/ov_SC06_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC06_011/ov_SC06_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC06_010/ov_SC06_010.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC06_014/ov_SC06_014.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC06_013/ov_SC06_013.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_018/ov_SC06_018.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_015/ov_SC06_015.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_016/ov_SC06_016.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_020/ov_SC06_020.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_022/ov_SC06_022.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_024/ov_SC06_024.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_025/ov_SC06_025.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_027/ov_SC06_027.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_029/ov_SC06_029.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_030/ov_SC06_030.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_032/ov_SC06_032.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_033/ov_SC06_033.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC07_000/ov_SC07_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC07_001/ov_SC07_001.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC07_008/ov_SC07_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC07_002/ov_SC07_002.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:57:00   src/ov_SC07_009/ov_SC07_009.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:57:00   src/ov_SC04_008/ov_SC04_008_jr_801734BC.c:func_80178970 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:57:00   src/ov_SC05_009/ov_SC05_009_jr_801734BC.c:func_80178970 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:57:01 delever: batch tus7 — 300 files (TUs; 983 drawable) · 1407 bodies: 432 lever-free, 973 residue, 2 refused · sites removed 1855 / needed 2032 / refused 6 / deferred 0 · replays 589 (0 disagreed) · compiles 3211 in 101 s wall · final 300/300 identical · written 300 files
diff --git a/.run/P36/delever/batch_tus7.json b/.run/P36/delever/batch_tus7.json
new file mode 100644
index 000000000..be668ac90
--- /dev/null
+++ b/.run/P36/delever/batch_tus7.json
@@ -0,0 +1,3031 @@
+{
+ "label": "tus7",
+ "generated": "2026-09-09 03:57",
+ "headers": false,
+ "batch": 300,
+ "only": null,
+ "files": 300,
+ "drawable_files": 983,
+ "wall_s": 100.6,
+ "calib": {
+  "head": "3e60fdf41",
+  "stamp": "b44c5a8a3423"
+ },
+ "bodies": 1407,
+ "compiles": 3211,
+ "sites_removed": 1855,
+ "sites_needed": 2032,
+ "sites_refused": 6,
+ "sites_deferred": 0,
+ "lever_free": 432,
+ "residue": 973,
+ "refused_bodies": 2,
+ "replays": 589,
+ "disagreed": 0,
+ "written": 300,
+ "seconds": 804.9903404712677,
+ "final_ok": 300,
+ "final_bad": 0,
+ "per_file": [
+  {
+   "tu": "src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c",
+   "bodies": 45,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 51,
+   "needed": 39,
+   "refused": 0,
+   "compiles": 98
+  },
+  {
+   "tu": "src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c",
+   "bodies": 40,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 26,
+   "needed": 65,
+   "refused": 4,
+   "compiles": 126
+  },
+  {
+   "tu": "src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c",
+   "bodies": 37,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 27,
+   "needed": 46,
+   "refused": 1,
+   "compiles": 89
+  },
+  {
+   "tu": "src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c",
+   "bodies": 36,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 23,
+   "needed": 43,
+   "refused": 0,
+   "compiles": 91
+  },
+  {
+   "tu": "src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c",
+   "bodies": 26,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 22,
+   "needed": 34,
+   "refused": 0,
+   "compiles": 67
+  },
+  {
+   "tu": "src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c",
+   "bodies": 24,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 12,
+   "needed": 35,
+   "refused": 0,
+   "compiles": 66
+  },
+  {
+   "tu": "src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c",
+   "bodies": 21,
+   "final": "IDENTICAL",
+   "written": true,
+   "removed": 18,
+   "needed": 25,
+   "refused": 0,
+   "compiles": 56
+  },
+  {
+   "tu": "src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c",
+   "bodies": 18,
+   "final": "IDENTICAL",
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+  },
+  {
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+  },
+  {
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+  {
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+  },
+  {
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+  {
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+  },
+  {
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+   "bodies": 1,
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+  },
+  {
+   "tu": "src/ov_SC02_021/ov_SC02_021_jr_801588CC.c",
+   "bodies": 1,
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+  }
+ ]
+}
diff --git a/.run/P36/delever/calibrate_tus7.log b/.run/P36/delever/calibrate_tus7.log
new file mode 100644
index 000000000..00bbfacc6
--- /dev/null
+++ b/.run/P36/delever/calibrate_tus7.log
@@ -0,0 +1,5 @@
+delever_oracle --calibrate main ov_SC03_014 ov_SC03_015 ov_SC04_011: 177/177 objects byte-identical untouched; twin checks 32 (0 mismatch); positive control DIFFERS on build/src/800.o; 3.3 s — OK
+   main           85/85 identical, mean 0.113 s per object
+   ov_SC03_014    32/32 identical, mean 0.196 s per object
+   ov_SC03_015    32/32 identical, mean 0.191 s per object
+   ov_SC04_011    28/28 identical, mean 0.202 s per object
diff --git a/.run/P36/delever/calibration.json b/.run/P36/delever/calibration.json
index a83eba006..de8336c62 100644
--- a/.run/P36/delever/calibration.json
+++ b/.run/P36/delever/calibration.json
@@ -1,7 +1,7 @@
 {
- "head": "ca761c4f6",
+ "head": "3e60fdf41",
  "stamp": "b44c5a8a3423",
- "generated": "2026-09-09 03:51",
+ "generated": "2026-09-09 03:55",
  "aliases": [
   "main",
   "ov_SC03_014",
@@ -21,207 +21,207 @@
   "main": {
    "objects": 85,
    "identical": 85,
-   "seconds": 9.647999999999998,
-   "mean_s": 0.114
+   "seconds": 9.612,
+   "mean_s": 0.113
   },
   "ov_SC03_014": {
    "objects": 32,
    "identical": 32,
-   "seconds": 6.121000000000001,
-   "mean_s": 0.191
+   "seconds": 6.269,
+   "mean_s": 0.196
   },
   "ov_SC03_015": {
    "objects": 32,
    "identical": 32,
-   "seconds": 6.161000000000002,
-   "mean_s": 0.193
+   "seconds": 6.098000000000001,
+   "mean_s": 0.191
   },
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  "ok": true,
- "seconds": 3.2
+ "seconds": 3.3
 }
diff --git a/.run/P36/delever/cycle_t4_tus_c.log b/.run/P36/delever/cycle_t4_tus_c.log
index 599740027..5ada7c26b 100644
--- a/.run/P36/delever/cycle_t4_tus_c.log
+++ b/.run/P36/delever/cycle_t4_tus_c.log
@@ -5,3 +5,9 @@ cycle: batch tus4 committed 5e10b19e8 — delever: batch tus4 — 300 files (TUs
 log: tus5 THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 39,918 sites in 13,820 bodies (2,224 distinct) · marked !FAKE 25,081 · UNMARKED 14,837
 cycle: batch tus5 committed ca761c4f6 — delever: batch tus5 — 300 files (TUs; 1583 drawable) · 1225 bodies: 63 lever-free, 1162 residue, 0 refused · sites removed 1821 / needed 5783 / refused 0 / deferred 0 · replays 624 (0 disagreed) · compiles 3110 in 73 s wall · final 300/300 identical · written 300 files | check-all: 218 passed, 0 failed of 218
 log: tus6 THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 38,580 sites in 13,622 bodies (2,225 distinct) · marked !FAKE 27,018 · UNMARKED 11,562
+cycle: batch tus6 committed 3e60fdf41 — delever: batch tus6 — 300 files (TUs; 1283 drawable) · 1409 bodies: 301 lever-free, 1108 residue, 0 refused · sites removed 1667 / needed 2377 / refused 0 / deferred 0 · replays 897 (0 disagreed) · compiles 2505 in 63 s wall · final 300/300 identical · written 300 files | check-all: 218 passed, 0 failed of 218
+cycle: the census FAILED after batch tus7
+    engine_prelude.h asm sites (a macro definition only) got 0      expected 0  OK
+  elapsed 35.9 s
+lever_census: a known-true control MISMATCHED (R39) — the instrument is wrong, not the tree
+cycle exit=1
diff --git a/.run/P36/delever/ledger.jsonl b/.run/P36/delever/ledger.jsonl
index 5f3cd31d2..61712f538 100644
--- a/.run/P36/delever/ledger.jsonl
+++ b/.run/P36/delever/ledger.jsonl
@@ -11692,3 +11692,1410 @@
 {"ts": "2026-09-09 03:52:40", "label": "tus6", "rung": "B", "calib": {"head": "ca761c4f6", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC05_008/ov_SC05_008_jr_80135D20.c", "fn": "func_80135EB0", "addr": 2148753072, "aliases": ["ov_SC05_008"], "header": false, "includers": 0, "o0": false, "nhash_before": "5f8e13a68bc001998897ccdddc52a0ac93204168", "nhash_after": "5f8e13a68bc001998897ccdddc52a0ac93204168", "exemplar": null, "verdict": "RESIDUE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "pin", "cls": "A", "detail": "$19", "via": "", "line": 773, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 1, "kind": "pin", "cls": "A", "detail": "$5", "via": "", "line": 786, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 2, "kind": "barrier", "cls": "B", "detail": "", "via": "", "line": 823, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 3, "kind": "barrier", "cls": "B", "detail": "", "via": "", "line": 829, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 4, "kind": "barrier", "cls": "B", "detail": "", "via": "", "line": 876, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 5, "kind": "barrier", "cls": "B", "detail": "", "via": "", "line": 880, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}], "compiles": 7, "seconds": 1.04}
 {"ts": "2026-09-09 03:52:40", "label": "tus6", "rung": "B", "calib": {"head": "ca761c4f6", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC05_006/ov_SC05_006_jr_80135D20.c", "fn": "func_80135EB0", "addr": 2148753072, "aliases": ["ov_SC05_006"], "header": false, "includers": 0, "o0": false, "nhash_before": "5f8e13a68bc001998897ccdddc52a0ac93204168", "nhash_after": "5f8e13a68bc001998897ccdddc52a0ac93204168", "exemplar": null, "verdict": "RESIDUE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "pin", "cls": "A", "detail": "$19", "via": "", "line": 773, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 1, "kind": "pin", "cls": "A", "detail": "$5", "via": "", "line": 786, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 2, "kind": "barrier", "cls": "B", "detail": "", "via": "", "line": 823, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 3, "kind": "barrier", "cls": "B", "detail": "", "via": "", "line": 829, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 4, "kind": "barrier", "cls": "B", "detail": "", "via": "", "line": 876, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 5, "kind": "barrier", "cls": "B", "detail": "", "via": "", "line": 880, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}], "compiles": 7, "seconds": 1.005}
 {"ts": "2026-09-09 03:52:41", "label": "tus6", "rung": "B", "calib": {"head": "ca761c4f6", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC04_018/ov_SC04_018_jr_80135D20.c", "fn": "func_80135EB0", "addr": 2148753072, "aliases": ["ov_SC04_018", "ov_SC04_019"], "header": false, "includers": 0, "o0": false, "nhash_before": "5f8e13a68bc001998897ccdddc52a0ac93204168", "nhash_after": "5f8e13a68bc001998897ccdddc52a0ac93204168", "exemplar": null, "verdict": "RESIDUE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "pin", "cls": "A", "detail": "$19", "via": "", "line": 775, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 1, "kind": "pin", "cls": "A", "detail": "$5", "via": "", "line": 788, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 2, "kind": "barrier", "cls": "B", "detail": "", "via": "", "line": 825, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 3, "kind": "barrier", "cls": "B", "detail": "", "via": "", "line": 831, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 4, "kind": "barrier", "cls": "B", "detail": "", "via": "", "line": 878, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 5, "kind": "barrier", "cls": "B", "detail": "", "via": "", "line": 882, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}], "compiles": 7, "seconds": 2.014}
+{"ts": "2026-09-09 03:55:20", "label": "tus7", "rung": "replay", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c", "fn": "func_8017AE2C", "addr": 2149035564, "aliases": ["ov_SC03_124"], "header": false, "includers": 0, "o0": false, "nhash_before": "58e783875a204bb41266cb496fcb37b06db8fb63", "nhash_after": "341f62d7d199ef2d8d6e9709c45f8ddb553e71d1", "exemplar": {"tu": "src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.c", "fn": "func_8017AE2C"}, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "pin", "cls": "A", "detail": "$16", "via": "", "line": 2604, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}, {"ord": 1, "kind": "pin", "cls": "A", "detail": "$17", "via": "", "line": 2605, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.264}
+{"ts": "2026-09-09 03:55:21", "label": "tus7", "rung": "B", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c", "fn": "func_8017B238", "addr": 2149036600, "aliases": ["ov_SC03_124"], "header": false, "includers": 0, "o0": false, "nhash_before": "2cb06d9996365ab0bcebe8121296701de74c9376", "nhash_after": "2cb06d9996365ab0bcebe8121296701de74c9376", "exemplar": null, "verdict": "RESIDUE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "pin", "cls": "A", "detail": "$16", "via": "", "line": 2756, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 1, "kind": "launder", "cls": "B", "detail": "", "via": "", "line": 2757, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}], "compiles": 3, "seconds": 0.831}
+{"ts": "2026-09-09 03:55:22", "label": "tus7", "rung": "B", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c", "fn": "func_8017B614", "addr": 2149037588, "aliases": ["ov_SC03_124"], "header": false, "includers": 0, "o0": false, "nhash_before": "7b87f6c6418b4d7b4e4068dbf1d389dceffa65c4", "nhash_after": "7b87f6c6418b4d7b4e4068dbf1d389dceffa65c4", "exemplar": null, "verdict": "RESIDUE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "pin", "cls": "A", "detail": "$16", "via": "", "line": 2902, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 1, "kind": "launder", "cls": "B", "detail": "", "via": "", "line": 2903, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 2, "kind": "barrier", "cls": "B", "detail": "", "via": "", "line": 2927, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}], "compiles": 4, "seconds": 1.099}
+{"ts": "2026-09-09 03:55:23", "label": "tus7", "rung": "replay", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c", "fn": "func_8017BC38", "addr": 2149039160, "aliases": ["ov_SC03_124"], "header": false, "includers": 0, "o0": false, "nhash_before": "68c86468bb372355a743ed24e6794d909150d90f", "nhash_after": "9e7ee99f26a704253d446eb067a9d5c473cfc595", "exemplar": {"tu": "src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.c", "fn": "func_8017BC38"}, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "pin", "cls": "A", "detail": "$17", "via": "", "line": 3196, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}, {"ord": 1, "kind": "pin", "cls": "A", "detail": "$16", "via": "", "line": 3197, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.275}
+{"ts": "2026-09-09 03:55:24", "label": "tus7", "rung": "B", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c", "fn": "func_8017BF50", "addr": 2149039952, "aliases": ["ov_SC03_124"], "header": false, "includers": 0, "o0": false, "nhash_before": "501648524d0104d95720ee736c16b3608edbc3eb", "nhash_after": "764ce7e482f60732d3695d5503668990c9e519ad", "exemplar": null, "verdict": "RESIDUE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "pin", "cls": "A", "detail": "$19", "via": "", "line": 3354, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}, {"ord": 1, "kind": "pin", "cls": "A", "detail": "$16", "via": "", "line": 3355, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}, {"ord": 2, "kind": "pin", "cls": "A", "detail": "$17", "via": "", "line": 3356, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}, {"ord": 3, "kind": "pin", "cls": "A", "detail": "$18", "via": "", "line": 3357, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 5, "seconds": 1.347}
+{"ts": "2026-09-09 03:55:24", "label": "tus7", "rung": "A", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c", "fn": "func_8017DD04", "addr": 2149047556, "aliases": ["ov_SC03_124"], "header": false, "includers": 0, "o0": false, "nhash_before": "ee3048dfce93629e3c9a00d2ea90d10ffb45dd7f", "nhash_after": "77dadc9354d121448d482d637dfc9286702d50cf", "exemplar": null, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "pin", "cls": "A", "detail": "$16", "via": "", "line": 4087, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.271}
+{"ts": "2026-09-09 03:55:25", "label": "tus7", "rung": "A", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c", "fn": "func_8017E228", "addr": 2149048872, "aliases": ["ov_SC03_124"], "header": false, "includers": 0, "o0": false, "nhash_before": "81922315e8bf1005dbb448fe7d12df1168854fdb", "nhash_after": "92cc8e877b89f6ead8792572fdcd5dc81e119f67", "exemplar": null, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "pin", "cls": "A", "detail": "$2", "via": "", "line": 4340, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}, {"ord": 1, "kind": "pin", "cls": "A", "detail": "$3", "via": "", "line": 4341, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.266}
+{"ts": "2026-09-09 03:55:25", "label": "tus7", "rung": "B", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c", "fn": "func_8017E5C4", "addr": 2149049796, "aliases": ["ov_SC03_124"], "header": false, "includers": 0, "o0": false, "nhash_before": "4de898846e23b4c2de738d38201bf3b3eaa5be0d", "nhash_after": "4de898846e23b4c2de738d38201bf3b3eaa5be0d", "exemplar": null, "verdict": "RESIDUE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "pin", "cls": "A", "detail": "$16", "via": "", "line": 4469, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}], "compiles": 2, "seconds": 0.517}
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+{"ts": "2026-09-09 03:57:00", "label": "tus7", "rung": "replay", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC01_005/ov_SC01_005_jr_801588CC.c", "fn": "func_801596F0", "addr": 2148898544, "aliases": ["ov_SC01_005", "ov_SC01_006"], "header": false, "includers": 0, "o0": false, "nhash_before": "503167e237f2ede2ec52bf78ffa6ca75cbc256d8", "nhash_after": "e4a8eda15597710d8e18c0c552e2c5d772f45ea3", "exemplar": {"tu": "src/ov_SC01_000/ov_SC01_000_jr_801588CC.c", "fn": "func_801596F0"}, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "barrier", "cls": "B", "detail": "memory", "via": "", "line": 1405, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.189}
+{"ts": "2026-09-09 03:57:00", "label": "tus7", "rung": "B", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC05_009/ov_SC05_009_jr_801734BC.c", "fn": "func_80178970", "addr": 2149026160, "aliases": ["ov_SC05_009"], "header": false, "includers": 0, "o0": false, "nhash_before": "6871f73f03cc6a2bd63d17a4cad815b2cc325333", "nhash_after": "6871f73f03cc6a2bd63d17a4cad815b2cc325333", "exemplar": null, "verdict": "RESIDUE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "pin", "cls": "A", "detail": "$2", "via": "", "line": 2972, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}], "compiles": 2, "seconds": 0.484}
+{"ts": "2026-09-09 03:57:00", "label": "tus7", "rung": "replay", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC01_074/ov_SC01_074_jr_801588CC.c", "fn": "func_801596F0", "addr": 2148898544, "aliases": ["ov_SC01_074"], "header": false, "includers": 0, "o0": false, "nhash_before": "503167e237f2ede2ec52bf78ffa6ca75cbc256d8", "nhash_after": "e4a8eda15597710d8e18c0c552e2c5d772f45ea3", "exemplar": {"tu": "src/ov_SC01_000/ov_SC01_000_jr_801588CC.c", "fn": "func_801596F0"}, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "barrier", "cls": "B", "detail": "memory", "via": "", "line": 1405, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.168}
+{"ts": "2026-09-09 03:57:00", "label": "tus7", "rung": "replay", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC01_084/ov_SC01_084_jr_801588CC.c", "fn": "func_801596F0", "addr": 2148898544, "aliases": ["ov_SC01_084"], "header": false, "includers": 0, "o0": false, "nhash_before": "503167e237f2ede2ec52bf78ffa6ca75cbc256d8", "nhash_after": "e4a8eda15597710d8e18c0c552e2c5d772f45ea3", "exemplar": {"tu": "src/ov_SC01_000/ov_SC01_000_jr_801588CC.c", "fn": "func_801596F0"}, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "barrier", "cls": "B", "detail": "memory", "via": "", "line": 1405, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.157}
+{"ts": "2026-09-09 03:57:00", "label": "tus7", "rung": "B", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC04_008/ov_SC04_008_jr_801734BC.c", "fn": "func_80178970", "addr": 2149026160, "aliases": ["ov_SC04_008"], "header": false, "includers": 0, "o0": false, "nhash_before": "6871f73f03cc6a2bd63d17a4cad815b2cc325333", "nhash_after": "6871f73f03cc6a2bd63d17a4cad815b2cc325333", "exemplar": null, "verdict": "RESIDUE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "pin", "cls": "A", "detail": "$2", "via": "", "line": 2972, "verdict": "NEEDED", "why": "", "oracle": "DIFFERS"}], "compiles": 2, "seconds": 0.481}
+{"ts": "2026-09-09 03:57:00", "label": "tus7", "rung": "replay", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC01_077/ov_SC01_077_jr_801588CC.c", "fn": "func_801596F0", "addr": 2148898544, "aliases": ["ov_SC01_077"], "header": false, "includers": 0, "o0": false, "nhash_before": "503167e237f2ede2ec52bf78ffa6ca75cbc256d8", "nhash_after": "e4a8eda15597710d8e18c0c552e2c5d772f45ea3", "exemplar": {"tu": "src/ov_SC01_000/ov_SC01_000_jr_801588CC.c", "fn": "func_801596F0"}, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "barrier", "cls": "B", "detail": "memory", "via": "", "line": 1453, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.169}
+{"ts": "2026-09-09 03:57:00", "label": "tus7", "rung": "replay", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC01_080/ov_SC01_080_jr_801588CC.c", "fn": "func_801596F0", "addr": 2148898544, "aliases": ["ov_SC01_080"], "header": false, "includers": 0, "o0": false, "nhash_before": "503167e237f2ede2ec52bf78ffa6ca75cbc256d8", "nhash_after": "e4a8eda15597710d8e18c0c552e2c5d772f45ea3", "exemplar": {"tu": "src/ov_SC01_000/ov_SC01_000_jr_801588CC.c", "fn": "func_801596F0"}, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "barrier", "cls": "B", "detail": "memory", "via": "", "line": 1405, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.177}
+{"ts": "2026-09-09 03:57:00", "label": "tus7", "rung": "replay", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC02_004/ov_SC02_004_jr_801588CC.c", "fn": "func_801596F0", "addr": 2148898544, "aliases": ["ov_SC02_004"], "header": false, "includers": 0, "o0": false, "nhash_before": "503167e237f2ede2ec52bf78ffa6ca75cbc256d8", "nhash_after": "e4a8eda15597710d8e18c0c552e2c5d772f45ea3", "exemplar": {"tu": "src/ov_SC01_000/ov_SC01_000_jr_801588CC.c", "fn": "func_801596F0"}, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "barrier", "cls": "B", "detail": "memory", "via": "", "line": 1405, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.111}
+{"ts": "2026-09-09 03:57:00", "label": "tus7", "rung": "replay", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC02_005/ov_SC02_005_jr_801588CC.c", "fn": "func_801596F0", "addr": 2148898544, "aliases": ["ov_SC02_005"], "header": false, "includers": 0, "o0": false, "nhash_before": "503167e237f2ede2ec52bf78ffa6ca75cbc256d8", "nhash_after": "e4a8eda15597710d8e18c0c552e2c5d772f45ea3", "exemplar": {"tu": "src/ov_SC01_000/ov_SC01_000_jr_801588CC.c", "fn": "func_801596F0"}, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "barrier", "cls": "B", "detail": "memory", "via": "", "line": 1405, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.103}
+{"ts": "2026-09-09 03:57:00", "label": "tus7", "rung": "replay", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC02_011/ov_SC02_011_jr_801588CC.c", "fn": "func_801596F0", "addr": 2148898544, "aliases": ["ov_SC02_011"], "header": false, "includers": 0, "o0": false, "nhash_before": "503167e237f2ede2ec52bf78ffa6ca75cbc256d8", "nhash_after": "e4a8eda15597710d8e18c0c552e2c5d772f45ea3", "exemplar": {"tu": "src/ov_SC01_000/ov_SC01_000_jr_801588CC.c", "fn": "func_801596F0"}, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "barrier", "cls": "B", "detail": "memory", "via": "", "line": 1405, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.143}
+{"ts": "2026-09-09 03:57:00", "label": "tus7", "rung": "replay", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC02_015/ov_SC02_015_jr_801588CC.c", "fn": "func_801596F0", "addr": 2148898544, "aliases": ["ov_SC02_015"], "header": false, "includers": 0, "o0": false, "nhash_before": "503167e237f2ede2ec52bf78ffa6ca75cbc256d8", "nhash_after": "e4a8eda15597710d8e18c0c552e2c5d772f45ea3", "exemplar": {"tu": "src/ov_SC01_000/ov_SC01_000_jr_801588CC.c", "fn": "func_801596F0"}, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "barrier", "cls": "B", "detail": "memory", "via": "", "line": 1403, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.103}
+{"ts": "2026-09-09 03:57:00", "label": "tus7", "rung": "replay", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC02_000/ov_SC02_000_jr_801588CC.c", "fn": "func_801596F0", "addr": 2148898544, "aliases": ["ov_SC02_000", "ov_SC02_003"], "header": false, "includers": 0, "o0": false, "nhash_before": "503167e237f2ede2ec52bf78ffa6ca75cbc256d8", "nhash_after": "e4a8eda15597710d8e18c0c552e2c5d772f45ea3", "exemplar": {"tu": "src/ov_SC01_000/ov_SC01_000_jr_801588CC.c", "fn": "func_801596F0"}, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "barrier", "cls": "B", "detail": "memory", "via": "", "line": 1405, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.217}
+{"ts": "2026-09-09 03:57:00", "label": "tus7", "rung": "replay", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC02_016/ov_SC02_016_jr_801588CC.c", "fn": "func_801596F0", "addr": 2148898544, "aliases": ["ov_SC02_016"], "header": false, "includers": 0, "o0": false, "nhash_before": "503167e237f2ede2ec52bf78ffa6ca75cbc256d8", "nhash_after": "e4a8eda15597710d8e18c0c552e2c5d772f45ea3", "exemplar": {"tu": "src/ov_SC01_000/ov_SC01_000_jr_801588CC.c", "fn": "func_801596F0"}, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "barrier", "cls": "B", "detail": "memory", "via": "", "line": 1405, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.106}
+{"ts": "2026-09-09 03:57:00", "label": "tus7", "rung": "replay", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC02_017/ov_SC02_017_jr_801588CC.c", "fn": "func_801596F0", "addr": 2148898544, "aliases": ["ov_SC02_017"], "header": false, "includers": 0, "o0": false, "nhash_before": "503167e237f2ede2ec52bf78ffa6ca75cbc256d8", "nhash_after": "e4a8eda15597710d8e18c0c552e2c5d772f45ea3", "exemplar": {"tu": "src/ov_SC01_000/ov_SC01_000_jr_801588CC.c", "fn": "func_801596F0"}, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "barrier", "cls": "B", "detail": "memory", "via": "", "line": 1405, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.163}
+{"ts": "2026-09-09 03:57:01", "label": "tus7", "rung": "replay", "calib": {"head": "3e60fdf41", "stamp": "b44c5a8a3423"}, "tu": "src/ov_SC02_021/ov_SC02_021_jr_801588CC.c", "fn": "func_801596F0", "addr": 2148898544, "aliases": ["ov_SC02_021"], "header": false, "includers": 0, "o0": false, "nhash_before": "503167e237f2ede2ec52bf78ffa6ca75cbc256d8", "nhash_after": "e4a8eda15597710d8e18c0c552e2c5d772f45ea3", "exemplar": {"tu": "src/ov_SC01_000/ov_SC01_000_jr_801588CC.c", "fn": "func_801596F0"}, "verdict": "LEVER-FREE", "replay_disagreed": false, "sites": [{"ord": 0, "kind": "barrier", "cls": "B", "detail": "memory", "via": "", "line": 1405, "verdict": "REMOVED", "why": "", "oracle": "IDENTICAL"}], "compiles": 1, "seconds": 0.125}
diff --git a/.run/P36/delever/run_tus7.log b/.run/P36/delever/run_tus7.log
new file mode 100644
index 000000000..abaf1cc13
--- /dev/null
+++ b/.run/P36/delever/run_tus7.log
@@ -0,0 +1,753 @@
+delever --plan: 300 of 983 drawable files · 1407 bodies (1197 in multi-copy classes) · 3893 removable sites · 0 deferred asm-bodies
+03:55:20 apply tus7: 300 files, control src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c IDENTICAL (0.25 s), calibration 3e60fdf41, census 22522952c40f4327
+03:55:20 apply tus7: phase 1 (exemplar files) 36, phase 2 (copies replay) 264
+03:55:21   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:21   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:21   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:21   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:22   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:22   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:22   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:22   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:22   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:22   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:22   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:22   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:22   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:23   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:23   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:23   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:23   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:23   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:23   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:23   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:23   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017E8A4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:23   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:24   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017D214 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:24   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:24   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:24   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017BF50 A=DIFFERS B: removed 3 needed 1 compiles 5
+03:55:24   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017ECA8 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:24   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017BEBC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:24   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017EB2C A=DIFFERS B: removed 2 needed 1 compiles 4
+03:55:24   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017D72C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:25   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017BF70 A=DIFFERS B: removed 3 needed 1 compiles 5
+03:55:25   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017EDD4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:25   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017D7B4 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:25   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:25   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017E5C4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:25   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017C6CC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:25   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017DCF8 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:25   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017BEBC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:26   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:26   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017BF50 A=DIFFERS B: removed 3 needed 1 compiles 5
+03:55:26   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017EF50 A=DIFFERS B: removed 1 needed 3 compiles 5
+03:55:26   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017EDE8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:26   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017E1D4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:26   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017C730 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:26   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017F07C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:26   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017D1E0 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:26   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017CAD4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:27   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8017F63C A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:27   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017E724 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:27   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017DBAC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:27   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017E73C A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:27   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8018009C A=COMPILE-ERROR B: removed 0 needed 1 compiles 2
+03:55:27   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017F53C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:27   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017D900 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:28   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017F5D8 A=DIFFERS B: removed 5 needed 3 compiles 9
+03:55:28   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017ECEC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:28   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017DA20 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:28   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_8017FBFC A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:28   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017E2CC A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:28   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_80180D48 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:28   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017F114 A=DIFFERS B: removed 4 needed 4 compiles 9
+03:55:28   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017DC50 A=DIFFERS B: removed 2 needed 3 compiles 6
+03:55:28   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017E010 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:28   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017EE3C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:28   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017E2F8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:29   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017E830 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:29   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017E464 A=DIFFERS B: removed 5 needed 6 compiles 12
+03:55:29   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017DCE4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:29   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_80180E40 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:29   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_8017F5B4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:29   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017EB78 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:29   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017DBE4 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:29   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017FCFC A=DIFFERS B: removed 3 needed 1 compiles 5
+03:55:29   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017F5BC A=DIFFERS B: removed 2 needed 1 compiles 4
+03:55:29   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017E5C0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:29   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80180C74 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:29   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8017E35C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:29   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017E6A4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:30   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8018107C A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:30   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_801818A4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:30   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017EDB8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:30   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80180F74 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:30   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017F554 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:30   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8017FD14 A=DIFFERS B: removed 2 needed 1 compiles 4
+03:55:31   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_8018130C A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:31   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017E764 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:31   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017E710 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:31   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8017FFB4 A=DIFFERS B: removed 1 needed 2 compiles 4
+03:55:31   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80181AB4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:31   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017F724 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:31   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_8017FB04 A=DIFFERS B: removed 6 needed 4 compiles 11
+03:55:31   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_80181EF0 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:31   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017F1F0 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:31   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_8018047C A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:32   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017ED28 A=DIFFERS B: removed 3 needed 4 compiles 8
+03:55:32   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017F8F4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:32   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80181744 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:32   src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:func_801816C8 A=DIFFERS B: removed 1 needed 2 compiles 4
+03:55:32   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017F2D0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:32   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:func_80180590 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:32   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F024 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:32   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8018045C A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:32   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017F368 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:32   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017FAC4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:33   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_80182AB4 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:33   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017FC94 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:33   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F10C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:33   src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c:<file-scope> A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:33   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801823BC A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:33   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80180598 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:33   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017EE80 A=DIFFERS B: removed 4 needed 1 compiles 6
+03:55:34   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8017FE64 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:34   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:34   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_801831B4 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:34   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_8017FA18 A=DIFFERS B: removed 1 needed 2 compiles 4
+03:55:34   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8017F510 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:34   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_8017F0EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:34   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8018000C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:35   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_80183BB0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:35   src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c:func_80180EDC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:35   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80181D1C A=DIFFERS B: removed 0 needed 5 compiles 6
+03:55:35   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80182464 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:35   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180164 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:35   src/ov_SC01_077/ov_SC01_077_after.c:func_80145934 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:35   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_80180054 A=DIFFERS B: removed 2 needed 9 compiles 12
+03:55:35   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:35   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801803B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:35   src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c:func_80184B94 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:36   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80180728 A=DIFFERS B: removed 0 needed 5 compiles 6
+03:55:36   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80182560 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:36   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_801802BC A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:36   src/ov_SC01_077/ov_SC01_077_after.c:func_80145A2C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:36   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80181DAC A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:36   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80182080 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:36   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_80180224 A=DIFFERS B: removed 3 needed 1 compiles 5
+03:55:36   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180510 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:36   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_801809E4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:37   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:37   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180764 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:37   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017E83C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:37   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801808BC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:38   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80182014 A=DIFFERS B: removed 1 needed 2 compiles 4
+03:55:38   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F278 A=DIFFERS B: removed 3 needed 5 compiles 9
+03:55:38   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_801804F4 A=DIFFERS B: removed 3 needed 1 compiles 5
+03:55:38   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80180D54 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:38   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:38   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80182614 A=DIFFERS B: removed 1 needed 2 compiles 4
+03:55:38   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:38   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180A14 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:38   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017EC90 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:38   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_80182058 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:39   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180CDC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:39   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_8018270C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:39   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_801810E4 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:39   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017F37C A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:39   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80182B9C A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:39   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80180F84 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:39   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_80180960 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:39   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017C360 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:40   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:40   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8018122C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:40   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80182F4C A=DIFFERS B: removed 3 needed 1 compiles 5
+03:55:40   src/ov_SC01_077/ov_SC01_077_after.c:func_80148AFC A=DIFFERS B: removed 1 needed 6 compiles 8
+03:55:40   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_801815D4 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:40   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F438 A=DIFFERS B: removed 0 needed 4 compiles 5
+03:55:40   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017F794 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:40   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_80182F3C A=DIFFERS B: removed 0 needed 4 compiles 5
+03:55:40   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017D710 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:41   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801814D4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:41   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80182ED4 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:41   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80181854 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:41   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_8018177C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:41   src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c:func_80181A60 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:41   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_801834C0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:41   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017DCC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:42   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80181918 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:42   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017D1E0 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:42   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80182FA8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:42   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801819D8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:42   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8017FD6C A=DIFFERS B: removed 1 needed 3 compiles 5
+03:55:42   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017DE10 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:42   src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c:func_801843DC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:42   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80183A70 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:43   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80181C38 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:43   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_80180598 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:43   src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:43   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_80181D98 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:43   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017F600 A=DIFFERS B: removed 0 needed 4 compiles 5
+03:55:43   src/ov_SC01_077/ov_SC01_077_after.c:func_80148D44 A=DIFFERS B: removed 2 needed 2 compiles 5
+03:55:43   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017D900 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:43   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017F67C A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:43   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80181DBC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:43   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801835B0 A=DIFFERS B: removed 0 needed 7 compiles 8
+03:55:44   src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:44   src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:44   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80181F40 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:44   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_801806B8 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:44   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_801820AC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:44   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_8017FD9C A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:44   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80183DAC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:44   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_801820C0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:44   src/ov_SC01_077/ov_SC01_077_after.c:func_80148E54 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:45   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80183D18 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:45   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017E324 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:45   src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c:func_8018230C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:45   src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:45   src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c:func_8018178C A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:45   src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c:func_80180FE4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:46   src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017E230 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:46   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017FC80 A=DIFFERS B: removed 0 needed 4 compiles 5
+03:55:46   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017E8D4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:46   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80183130 A=DIFFERS B: removed 6 needed 2 compiles 9
+03:55:46   src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017E614 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:46   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80182334 A=DIFFERS B: removed 1 needed 3 compiles 5
+03:55:46   src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:47   src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:47   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8017FE3C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:47   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017EA24 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:47   src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_801832A8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:47   src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:func_8017E834 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:47   src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:47   src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:48   src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c:<file-scope> A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:48   src/ov_SC01_077/ov_SC01_077_after.c:func_8014D820 A=DIFFERS B: removed 1 needed 2 compiles 4
+03:55:48   src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017CE58 A=DIFFERS B: removed 0 needed 11 compiles 12
+03:55:48   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017F2E0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:48   src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017C25C A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:49   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801842CC A=DIFFERS B: removed 1 needed 3 compiles 5
+03:55:49   src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017CC70 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:49   src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017E044 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:49   src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017C80C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:49   src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c:func_8017F9BC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:49   src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017D220 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:49   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801846D0 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:49   src/ov_SC04_012/ov_SC04_012_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:49   src/ov_SC04_008/ov_SC04_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:49   src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017C95C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:49   src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017E780 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:49   src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:49   src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017D370 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:49   src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c:func_80182560 A=DIFFERS B: removed 5 needed 1 compiles 7
+03:55:50   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_801805D0 A=DIFFERS B: removed 0 needed 4 compiles 5
+03:55:50   src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c:func_8017D218 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:50   src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c:func_8017EE8C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:50   src/ov_SC04_012/ov_SC04_012_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:50   src/ov_SC04_008/ov_SC04_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:50   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80184398 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:50   src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c:func_8017DD34 A=DIFFERS B: removed 0 needed 4 compiles 5
+03:55:50   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801849A0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:51   src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:51   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80180A88 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:51   src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:51   src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:51   src/ov_SC04_012/ov_SC04_012_jr_8017AE2C.c:func_8017E060 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:52   src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:52   src/ov_SC04_008/ov_SC04_008_jr_8017AE2C.c:func_8017DE40 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:52   src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:52   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_801848A4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:52   src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:52   src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:53   src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80175AB8 A=DIFFERS B: removed 0 needed 5 compiles 6
+03:55:53   src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:53   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80184CE8 A=DIFFERS B: removed 1 needed 2 compiles 4
+03:55:53   src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:53   src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:53   src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80175DA8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:54   src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:54   src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017D9E4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:54   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80184A68 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:55:54   src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c:func_8017EE10 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:54   src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c:func_8017D1E0 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:55   src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c:func_8017FB10 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:55   src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017C234 A=DIFFERS B: removed 3 needed 1 compiles 5
+03:55:55   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181234 A=DIFFERS B: removed 0 needed 4 compiles 5
+03:55:55   src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017DB60 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:55   src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c:func_8017D900 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:55   src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:55   src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:55   src/ov_SC02_000/ov_SC02_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:55   src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c:func_8017DF44 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:55   src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c:func_8017C9BC A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:56   src/ov_SC02_026/ov_SC02_026_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:56   src/ov_SC02_004/ov_SC02_004_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:56   src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_8017E230 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:56   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80185354 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:56   src/ov_SC02_026/ov_SC02_026_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:56   src/ov_SC03_003/ov_SC03_003_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:56   src/ov_SC03_012/ov_SC03_012_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:57   src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017D1E0 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:57   src/ov_SC02_004/ov_SC02_004_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:57   src/ov_SC02_026/ov_SC02_026_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:57   src/ov_SC02_000/ov_SC02_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:57   src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:57   src/ov_SC03_003/ov_SC03_003_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:57   src/ov_SC03_012/ov_SC03_012_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:57   src/ov_SC06_032/ov_SC06_032_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:58   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80185520 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:58   src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017D900 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:58   src/ov_SC06_032/ov_SC06_032_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:55:58   src/ov_SC03_003/ov_SC03_003_jr_8017AE2C.c:func_8017BEF8 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:58   src/ov_SC02_004/ov_SC02_004_jr_8017AE2C.c:func_8017DA30 A=DIFFERS B: removed 2 needed 2 compiles 5
+03:55:58   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181408 A=DIFFERS B: removed 3 needed 2 compiles 6
+03:55:58   src/ov_SC03_012/ov_SC03_012_jr_8017AE2C.c:func_8017DCB4 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:55:58   src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_801821D4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:59   src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c:func_8017DF84 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:55:59   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801856A0 A=DIFFERS B: removed 4 needed 1 compiles 6
+03:56:00   src/ov_SC02_000/ov_SC02_000_jr_8017AE2C.c:func_8017D2D4 A=DIFFERS B: removed 0 needed 4 compiles 5
+03:56:00   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8018179C A=DIFFERS B: removed 1 needed 2 compiles 4
+03:56:00   src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c:func_8017BF14 A=DIFFERS B: removed 0 needed 4 compiles 5
+03:56:00   src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80177B5C A=DIFFERS B: removed 8 needed 15 compiles 24
+03:56:00   src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:func_801825BC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:00   src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80178840 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:56:01   src/ov_SC01_077/ov_SC01_077_jr_801734BC.c:func_80178970 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:01   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80186B70 A=DIFFERS B: removed 1 needed 4 compiles 6
+03:56:02   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181AD8 A=DIFFERS B: removed 2 needed 1 compiles 4
+03:56:02   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8018594C A=DIFFERS B: removed 1 needed 3 compiles 5
+03:56:02   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181D80 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:03   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80187314 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:03   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80181FC4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:04   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80187AB8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:05   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80182A2C A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:05   src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c:func_80187B34 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:06   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80182C70 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:56:06   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80185BD4 A=DIFFERS B: removed 3 needed 2 compiles 6
+03:56:08   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_8018315C A=DIFFERS B: removed 2 needed 1 compiles 4
+03:56:09   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80183884 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:09   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801869CC A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:10   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80183FD4 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:56:10   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801877D8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:11   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801879C4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:11   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_801841A4 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:56:13   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801890C4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:13   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80184394 A=DIFFERS B: removed 2 needed 1 compiles 4
+03:56:15   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_801848A4 A=DIFFERS B: removed 1 needed 1 compiles 3
+03:56:16   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_801896EC A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:16   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80184EFC A=DIFFERS B: removed 2 needed 1 compiles 4
+03:56:17   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_801858F4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:18   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_80189A84 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:18   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80185994 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:20   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80185C04 A=DIFFERS B: removed 1 needed 2 compiles 4
+03:56:21   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8018A6F4 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:21   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80185CD8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:22   src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c:func_80185FC8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:22   src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c:func_8018AF88 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC05_017/ov_SC05_017_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC06_008/ov_SC06_008_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC05_011/ov_SC05_011_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC06_000/ov_SC06_000_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC06_013/ov_SC06_013_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC06_010/ov_SC06_010_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC06_006/ov_SC06_006_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:26   src/ov_SC05_018/ov_SC05_018_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC05_017/ov_SC05_017_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC06_011/ov_SC06_011_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC06_008/ov_SC06_008_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC06_000/ov_SC06_000_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC05_011/ov_SC05_011_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC06_010/ov_SC06_010_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC06_006/ov_SC06_006_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC06_013/ov_SC06_013_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:27   src/ov_SC05_018/ov_SC05_018_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC06_011/ov_SC06_011_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC06_008/ov_SC06_008_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC05_017/ov_SC05_017_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC06_000/ov_SC06_000_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC05_011/ov_SC05_011_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC06_010/ov_SC06_010_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:28   src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:29   src/ov_SC06_006/ov_SC06_006_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:29   src/ov_SC05_018/ov_SC05_018_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:29   src/ov_SC06_013/ov_SC06_013_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:29   src/ov_SC06_011/ov_SC06_011_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:31   src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:31   src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:31   src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:31   src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:31   src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:31   src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:31   src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:31   src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:32   src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:33   src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:34   src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:34   src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:34   src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:34   src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:35   src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:35   src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:35   src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:35   src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:35   src/ov_SC03_109/ov_SC03_109_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:35   src/ov_SC03_105/ov_SC03_105_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:35   src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:35   src/ov_SC03_031/ov_SC03_031_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:36   src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC03_109/ov_SC03_109_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC03_105/ov_SC03_105_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:36   src/ov_SC03_031/ov_SC03_031_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:36   src/ov_SC03_109/ov_SC03_109_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:36   src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:36   src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c:func_8016C49C A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:37   src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c:func_8017CD2C A=DIFFERS B: removed 0 needed 4 compiles 5
+03:56:37   src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:37   src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:37   src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c:func_8017C9BC A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:37   src/ov_SC05_010/ov_SC05_010_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:37   src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c:func_8017C9BC A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:37   src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c:func_8017DD3C A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:37   src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c:func_8017C9BC A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:37   src/ov_SC06_016/ov_SC06_016_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:37   src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:37   src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c:func_8016CBC0 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:38   src/ov_SC03_031/ov_SC03_031_jr_8017AE2C.c:func_8017BF88 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:38   src/ov_SC05_010/ov_SC05_010_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:38   src/ov_SC06_016/ov_SC06_016_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:38   src/ov_SC06_029/ov_SC06_029_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:38   src/ov_SC06_030/ov_SC06_030_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:38   src/ov_SC01_001/ov_SC01_001_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:38   src/ov_SC07_002/ov_SC07_002_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:38   src/ov_SC01_000/ov_SC01_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:38   src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:38   src/ov_SC01_004/ov_SC01_004_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:38   src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:38   src/ov_SC06_029/ov_SC06_029_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:39   src/ov_SC06_030/ov_SC06_030_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:39   src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:39   src/ov_SC01_000/ov_SC01_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:39   src/ov_SC01_001/ov_SC01_001_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:39   src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c:func_8016E9EC A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:39   src/ov_SC07_002/ov_SC07_002_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:39   src/ov_SC01_008/ov_SC01_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:39   src/ov_SC01_004/ov_SC01_004_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:40   src/ov_SC01_009/ov_SC01_009_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC01_005/ov_SC01_005_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC01_074/ov_SC01_074_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC01_084/ov_SC01_084_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC01_008/ov_SC01_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:40   src/ov_SC02_021/ov_SC02_021_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC02_035/ov_SC02_035_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC01_009/ov_SC01_009_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:40   src/ov_SC02_016/ov_SC02_016_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC02_027/ov_SC02_027_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC02_028/ov_SC02_028_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC02_039/ov_SC02_039_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC02_041/ov_SC02_041_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:40   src/ov_SC01_074/ov_SC01_074_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:40   src/ov_SC01_084/ov_SC01_084_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC02_021/ov_SC02_021_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC02_035/ov_SC02_035_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC02_028/ov_SC02_028_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC02_027/ov_SC02_027_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC01_005/ov_SC01_005_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC02_039/ov_SC02_039_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC02_016/ov_SC02_016_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC02_041/ov_SC02_041_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:41   src/ov_SC03_010/ov_SC03_010_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:41   src/ov_SC03_011/ov_SC03_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_013/ov_SC03_013_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_089/ov_SC03_089_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_029/ov_SC03_029_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_010/ov_SC03_010_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:42   src/ov_SC03_011/ov_SC03_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:42   src/ov_SC03_090/ov_SC03_090_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_094/ov_SC03_094_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_096/ov_SC03_096_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_095/ov_SC03_095_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_091/ov_SC03_091_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:42   src/ov_SC03_013/ov_SC03_013_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:42   src/ov_SC03_097/ov_SC03_097_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:43   src/ov_SC03_089/ov_SC03_089_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:43   src/ov_SC03_093/ov_SC03_093_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:43   src/ov_SC03_090/ov_SC03_090_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:43   src/ov_SC03_095/ov_SC03_095_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:43   src/ov_SC03_029/ov_SC03_029_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:43   src/ov_SC03_099/ov_SC03_099_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:43   src/ov_SC03_094/ov_SC03_094_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:43   src/ov_SC03_096/ov_SC03_096_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:43   src/ov_SC03_091/ov_SC03_091_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:43   src/ov_SC03_098/ov_SC03_098_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:44   src/ov_SC03_097/ov_SC03_097_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:44   src/ov_SC03_093/ov_SC03_093_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:44   src/ov_SC03_099/ov_SC03_099_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:44   src/ov_SC03_102/ov_SC03_102_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:44   src/ov_SC03_100/ov_SC03_100_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:44   src/ov_SC03_101/ov_SC03_101_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:44   src/ov_SC03_108/ov_SC03_108_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:44   src/ov_SC03_104/ov_SC03_104_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:44   src/ov_SC03_103/ov_SC03_103_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:44   src/ov_SC03_112/ov_SC03_112_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:45   src/ov_SC03_102/ov_SC03_102_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:45   src/ov_SC03_098/ov_SC03_098_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:45   src/ov_SC03_101/ov_SC03_101_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:45   src/ov_SC03_110/ov_SC03_110_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:45   src/ov_SC03_100/ov_SC03_100_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:45   src/ov_SC03_113/ov_SC03_113_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:45   src/ov_SC03_108/ov_SC03_108_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:45   src/ov_SC03_103/ov_SC03_103_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:45   src/ov_SC03_104/ov_SC03_104_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:45   src/ov_SC03_115/ov_SC03_115_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:45   src/ov_SC03_114/ov_SC03_114_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:45   src/ov_SC03_112/ov_SC03_112_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:46   src/ov_SC03_113/ov_SC03_113_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:46   src/ov_SC03_121/ov_SC03_121_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:46   src/ov_SC03_110/ov_SC03_110_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:46   src/ov_SC04_000/ov_SC04_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:46   src/ov_SC03_115/ov_SC03_115_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:46   src/ov_SC03_117/ov_SC03_117_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:46   src/ov_SC03_114/ov_SC03_114_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:46   src/ov_SC04_002/ov_SC04_002_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:46   src/ov_SC04_006/ov_SC04_006_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:46   src/ov_SC04_003/ov_SC04_003_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:46   src/ov_SC04_005/ov_SC04_005_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:46   src/ov_SC04_007/ov_SC04_007_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:46   src/ov_SC03_121/ov_SC03_121_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:46   src/ov_SC04_000/ov_SC04_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:46   src/ov_SC03_117/ov_SC03_117_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:47   src/ov_SC04_009/ov_SC04_009_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:47   src/ov_SC04_002/ov_SC04_002_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:47   src/ov_SC04_005/ov_SC04_005_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:47   src/ov_SC04_010/ov_SC04_010_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:47   src/ov_SC04_016/ov_SC04_016_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:47   src/ov_SC04_006/ov_SC04_006_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:47   src/ov_SC04_007/ov_SC04_007_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:47   src/ov_SC05_000/ov_SC05_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:47   src/ov_SC04_003/ov_SC04_003_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:47   src/ov_SC05_002/ov_SC05_002_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:47   src/ov_SC04_010/ov_SC04_010_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:47   src/ov_SC05_001/ov_SC05_001_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:47   src/ov_SC04_009/ov_SC04_009_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:48   src/ov_SC04_016/ov_SC04_016_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:48   src/ov_SC05_003/ov_SC05_003_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:48   src/ov_SC05_002/ov_SC05_002_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:48   src/ov_SC05_004/ov_SC05_004_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:48   src/ov_SC05_000/ov_SC05_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:48   src/ov_SC05_006/ov_SC05_006_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:48   src/ov_SC05_007/ov_SC05_007_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:48   src/ov_SC05_001/ov_SC05_001_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:48   src/ov_SC05_009/ov_SC05_009_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:48   src/ov_SC05_003/ov_SC05_003_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:48   src/ov_SC05_005/ov_SC05_005_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:48   src/ov_SC05_011/ov_SC05_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:48   src/ov_SC06_006/ov_SC06_006_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:49   src/ov_SC05_004/ov_SC05_004_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:49   src/ov_SC05_007/ov_SC05_007_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:49   src/ov_SC05_006/ov_SC05_006_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:49   src/ov_SC06_008/ov_SC06_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:49   src/ov_SC05_009/ov_SC05_009_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:49   src/ov_SC06_013/ov_SC06_013_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:49   src/ov_SC05_011/ov_SC05_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:49   src/ov_SC06_011/ov_SC06_011_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:49   src/ov_SC05_005/ov_SC05_005_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:49   src/ov_SC06_006/ov_SC06_006_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:49   src/ov_SC06_015/ov_SC06_015_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:49   src/ov_SC06_014/ov_SC06_014_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:49   src/ov_SC06_008/ov_SC06_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:50   src/ov_SC06_013/ov_SC06_013_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:50   src/ov_SC06_018/ov_SC06_018_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:50   src/ov_SC06_011/ov_SC06_011_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:50   src/ov_SC06_022/ov_SC06_022_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:50   src/ov_SC06_020/ov_SC06_020_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:50   src/ov_SC06_024/ov_SC06_024_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:50   src/ov_SC06_025/ov_SC06_025_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:50   src/ov_SC06_015/ov_SC06_015_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:50   src/ov_SC06_014/ov_SC06_014_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:50   src/ov_SC06_027/ov_SC06_027_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:50   src/ov_SC06_022/ov_SC06_022_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:50   src/ov_SC07_000/ov_SC07_000_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:50   src/ov_SC06_018/ov_SC06_018_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:51   src/ov_SC06_033/ov_SC06_033_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:51   src/ov_SC07_001/ov_SC07_001_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:51   src/ov_SC06_024/ov_SC06_024_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:51   src/ov_SC06_025/ov_SC06_025_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:51   src/ov_SC06_020/ov_SC06_020_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:51   src/ov_SC06_027/ov_SC06_027_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:51   src/ov_SC07_008/ov_SC07_008_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:51   src/ov_SC01_000/ov_SC01_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:51   src/ov_SC07_000/ov_SC07_000_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:51   src/ov_SC06_033/ov_SC06_033_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:51   src/ov_SC07_009/ov_SC07_009_jr_8017AE2C.c:func_8017B238 A=DIFFERS B: removed 0 needed 2 compiles 3
+03:56:51   src/ov_SC01_001/ov_SC01_001.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:51   src/ov_SC01_004/ov_SC01_004.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC07_001/ov_SC07_001_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:52   src/ov_SC01_008/ov_SC01_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC01_009/ov_SC01_009.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC01_074/ov_SC01_074.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC07_008/ov_SC07_008_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:52   src/ov_SC01_077/ov_SC01_077_a.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC01_005/ov_SC01_005.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC01_080/ov_SC01_080.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC01_084/ov_SC01_084.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC07_009/ov_SC07_009_jr_8017AE2C.c:func_8017B614 A=DIFFERS B: removed 0 needed 3 compiles 4
+03:56:52   src/ov_SC02_005/ov_SC02_005.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:52   src/ov_SC02_004/ov_SC02_004.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_015/ov_SC02_015.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_011/ov_SC02_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_021/ov_SC02_021.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_016/ov_SC02_016.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_000/ov_SC02_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_026/ov_SC02_026.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_017/ov_SC02_017.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_027/ov_SC02_027.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_031/ov_SC02_031.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_028/ov_SC02_028.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_035/ov_SC02_035.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_039/ov_SC02_039.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC02_041/ov_SC02_041.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC03_002/ov_SC03_002.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC03_001/ov_SC03_001.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:53   src/ov_SC03_003/ov_SC03_003.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_006/ov_SC03_006.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_007/ov_SC03_007.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_010/ov_SC03_010.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_011/ov_SC03_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_012/ov_SC03_012.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_023/ov_SC03_023.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_013/ov_SC03_013.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_024/ov_SC03_024.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_028/ov_SC03_028.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_029/ov_SC03_029.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_030/ov_SC03_030.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_089/ov_SC03_089.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_031/ov_SC03_031.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_014/ov_SC03_014.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:54   src/ov_SC03_090/ov_SC03_090.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_091/ov_SC03_091.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_094/ov_SC03_094.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_092/ov_SC03_092.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_093/ov_SC03_093.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_096/ov_SC03_096.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_097/ov_SC03_097.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_095/ov_SC03_095.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_098/ov_SC03_098.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_099/ov_SC03_099.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_100/ov_SC03_100.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_101/ov_SC03_101.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_102/ov_SC03_102.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_103/ov_SC03_103.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_104/ov_SC03_104.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_105/ov_SC03_105.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_108/ov_SC03_108.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:55   src/ov_SC03_109/ov_SC03_109.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_110/ov_SC03_110.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_112/ov_SC03_112.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_111/ov_SC03_111.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_113/ov_SC03_113.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_114/ov_SC03_114.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_116/ov_SC03_116.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_115/ov_SC03_115.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_117/ov_SC03_117.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_121/ov_SC03_121.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_124/ov_SC03_124.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_125/ov_SC03_125.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC04_000/ov_SC04_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC04_002/ov_SC04_002.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC04_005/ov_SC04_005.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC04_003/ov_SC04_003.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC04_004/ov_SC04_004.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:56   src/ov_SC03_118/ov_SC03_118.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_006/ov_SC04_006.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_008/ov_SC04_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_007/ov_SC04_007.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_009/ov_SC04_009.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_012/ov_SC04_012.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_010/ov_SC04_010.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_016/ov_SC04_016.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_015/ov_SC04_015.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC05_000/ov_SC05_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_020/ov_SC04_020.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC05_001/ov_SC05_001.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC04_018/ov_SC04_018.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC05_002/ov_SC05_002.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC05_003/ov_SC05_003.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC05_004/ov_SC05_004.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:57   src/ov_SC05_005/ov_SC05_005.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC05_006/ov_SC05_006.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC05_009/ov_SC05_009.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC05_007/ov_SC05_007.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC05_008/ov_SC05_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC05_010/ov_SC05_010.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC05_011/ov_SC05_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC05_017/ov_SC05_017.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC06_000/ov_SC06_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC05_018/ov_SC05_018.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC06_006/ov_SC06_006.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC06_008/ov_SC06_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC06_011/ov_SC06_011.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC06_010/ov_SC06_010.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC06_014/ov_SC06_014.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:58   src/ov_SC06_013/ov_SC06_013.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_018/ov_SC06_018.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_015/ov_SC06_015.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_016/ov_SC06_016.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_020/ov_SC06_020.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_022/ov_SC06_022.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_024/ov_SC06_024.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_025/ov_SC06_025.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_027/ov_SC06_027.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_029/ov_SC06_029.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_030/ov_SC06_030.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_032/ov_SC06_032.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC06_033/ov_SC06_033.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC07_000/ov_SC07_000.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC07_001/ov_SC07_001.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC07_008/ov_SC07_008.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:56:59   src/ov_SC07_002/ov_SC07_002.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:57:00   src/ov_SC07_009/ov_SC07_009.c:func_801287B8 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:57:00   src/ov_SC04_008/ov_SC04_008_jr_801734BC.c:func_80178970 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:57:00   src/ov_SC05_009/ov_SC05_009_jr_801734BC.c:func_80178970 A=DIFFERS B: removed 0 needed 1 compiles 2
+03:57:01 delever: batch tus7 — 300 files (TUs; 983 drawable) · 1407 bodies: 432 lever-free, 973 residue, 2 refused · sites removed 1855 / needed 2032 / refused 6 / deferred 0 · replays 589 (0 disagreed) · compiles 3211 in 101 s wall · final 300/300 identical · written 300 files
+tus7 wall=104.41 s
+exit=0
diff --git a/phase-ends/CURRENT_PHASE.md b/phase-ends/CURRENT_PHASE.md
index 76d8638ce..a7c8a1bcb 100644
--- a/phase-ends/CURRENT_PHASE.md
+++ b/phase-ends/CURRENT_PHASE.md
@@ -360,7 +360,9 @@ accumulate here as the phase produces them.**
 
 - **2026-09-09 — T4 batch `tus6`** (`.run/P36/delever/run_tus6.log`, `batch_tus6.json`): `delever: batch tus6 — 300 files (TUs; 1283 drawable) · 1409 bodies: 301 lever-free, 1108 residue, 0 refused · sites removed 1667 / needed 2377 / refused 0 / deferred 0 · replays 897 (0 disagreed) · compiles 2505 in 63 s wall · final 300/300 identical · written 300 files` → R22 (`.run/P36/baseline/r22_tus6.log`) **`check-all: 218 passed, 0 failed of 218`** (`wall=114.08 s`) → census `THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 38,580 sites in 13,622 bodies (2,225 distinct) · marked !FAKE 27,018 · UNMARKED 11,562`.
 
-## 🛑 SESSION CHECKPOINT — S98 (2026-09-09): T0 ☑ T1 ☑ T1b ☑ T2 ☑ T3 ☑ — all committed (T3 = `39e3e1851` tools, `cd24727dd` + `7ee458dd7` the ov_SC04_011 batches, this close); NEXT = T4 the mechanical campaign: `tools/delever_cycle.sh` over the whole population (TUs then headers), unattended, one commit per batch, R22 every batch | the number: 53,033 sites in 15,638 bodies (2,246 distinct), 310 marked, 0 orphans | last batch `tus6` on ca761c4f6: THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 38,580 sites in 13,622 bodies (2,225 distinct) · marked !FAKE 27,018 · UNMARKED 11,562
+- **2026-09-09 — T4 batch `tus7`** (`.run/P36/delever/run_tus7.log`, `batch_tus7.json`): `delever: batch tus7 — 300 files (TUs; 983 drawable) · 1407 bodies: 432 lever-free, 973 residue, 2 refused · sites removed 1855 / needed 2032 / refused 6 / deferred 0 · replays 589 (0 disagreed) · compiles 3211 in 101 s wall · final 300/300 identical · written 300 files` → R22 (`.run/P36/baseline/r22_tus7.log`) **`check-all: 218 passed, 0 failed of 218`** (`wall=116.04 s`) → census `THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 36,764 sites in 13,224 bodies (2,199 distinct) · marked !FAKE 29,045 · UNMARKED 7,719`.
+
+## 🛑 SESSION CHECKPOINT — S98 (2026-09-09): T0 ☑ T1 ☑ T1b ☑ T2 ☑ T3 ☑ — all committed (T3 = `39e3e1851` tools, `cd24727dd` + `7ee458dd7` the ov_SC04_011 batches, this close); NEXT = T4 the mechanical campaign: `tools/delever_cycle.sh` over the whole population (TUs then headers), unattended, one commit per batch, R22 every batch | the number: 53,033 sites in 15,638 bodies (2,246 distinct), 310 marked, 0 orphans | last batch `tus7` on 3e60fdf41: THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 36,764 sites in 13,224 bodies (2,199 distinct) · marked !FAKE 29,045 · UNMARKED 7,719
 
 ### 0. How to use this block
 A fresh session reads CLAUDE.md's load order, replays this block verbatim, confirms the effort (T4/T5/T6/T8/T9 are xHigh per the plan, Max is
diff --git a/src/ov_SC01_000/ov_SC01_000.c b/src/ov_SC01_000/ov_SC01_000.c
index 74ae4eb2a..8e354c4d3 100644
--- a/src/ov_SC01_000/ov_SC01_000.c
+++ b/src/ov_SC01_000/ov_SC01_000.c
@@ -217,7 +217,7 @@ void func_801287B8(void) {
     {
         /* D_801A5878 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801A5878;
+        register volatile s32 *p __asm__("$4") = &D_801A5878;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -491,17 +491,17 @@ void func_8012956C(void) {
     extern u8 D_801A5858;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -511,7 +511,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -552,7 +551,7 @@ void func_8012956C(void) {
                       D_801A43E0[idx], D_801A43E1[idx], D_801A43E2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801A5858;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC01_000/ov_SC01_000_jr_801588CC.c b/src/ov_SC01_000/ov_SC01_000_jr_801588CC.c
index b79fd7289..7fcfd3944 100644
--- a/src/ov_SC01_000/ov_SC01_000_jr_801588CC.c
+++ b/src/ov_SC01_000/ov_SC01_000_jr_801588CC.c
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC01_000/ov_SC01_000_jr_8017AE2C.c b/src/ov_SC01_000/ov_SC01_000_jr_8017AE2C.c
index 73875cf2e..524fb5791 100644
--- a/src/ov_SC01_000/ov_SC01_000_jr_8017AE2C.c
+++ b/src/ov_SC01_000/ov_SC01_000_jr_8017AE2C.c
@@ -2631,8 +2631,8 @@ extern s16 D_801A5842;
 extern s16 D_801A584C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801A5840;
+    s32 pv = param_1;
+    s16 *g = &D_801A5840;
 
     switch (g[0]) {
     case 0:
@@ -2777,8 +2777,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2923,8 +2923,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2948,7 +2948,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801A56E6;
             v790 = D_801A56E8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801A5870 = 1;
             D_801A5674 = 0x1E;
             D_80126990 = v794;
@@ -3208,8 +3208,8 @@ extern void (*D_801A56BC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801A56BC;
diff --git a/src/ov_SC01_001/ov_SC01_001.c b/src/ov_SC01_001/ov_SC01_001.c
index ef342407b..8cb4cf86f 100644
--- a/src/ov_SC01_001/ov_SC01_001.c
+++ b/src/ov_SC01_001/ov_SC01_001.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801F3158 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801F3158;
+        register volatile s32 *p __asm__("$4") = &D_801F3158;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801F3138;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801EC670[idx], D_801EC671[idx], D_801EC672[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801F3138;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC01_001/ov_SC01_001_jr_801588CC.c b/src/ov_SC01_001/ov_SC01_001_jr_801588CC.c
index 3d2cde569..11509f5b8 100644
--- a/src/ov_SC01_001/ov_SC01_001_jr_801588CC.c
+++ b/src/ov_SC01_001/ov_SC01_001_jr_801588CC.c
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC01_001/ov_SC01_001_jr_8017AE2C.c b/src/ov_SC01_001/ov_SC01_001_jr_8017AE2C.c
index 5d4200743..9d726fc28 100644
--- a/src/ov_SC01_001/ov_SC01_001_jr_8017AE2C.c
+++ b/src/ov_SC01_001/ov_SC01_001_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801F3122;
 extern s16 D_801F312C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801F3120;
+    s32 pv = param_1;
+    s16 *g = &D_801F3120;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801ED976;
             v790 = D_801ED978;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801F3150 = 1;
             D_801ED904 = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801ED94C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801ED94C;
diff --git a/src/ov_SC01_004/ov_SC01_004.c b/src/ov_SC01_004/ov_SC01_004.c
index 93ed05b28..21b70cc7f 100644
--- a/src/ov_SC01_004/ov_SC01_004.c
+++ b/src/ov_SC01_004/ov_SC01_004.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_80190360 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_80190360;
+        register volatile s32 *p __asm__("$4") = &D_80190360;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_80190340;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_8018EDD8[idx], D_8018EDD9[idx], D_8018EDDA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_80190340;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC01_004/ov_SC01_004_jr_801588CC.c b/src/ov_SC01_004/ov_SC01_004_jr_801588CC.c
index 1045ae583..a10820c44 100644
--- a/src/ov_SC01_004/ov_SC01_004_jr_801588CC.c
+++ b/src/ov_SC01_004/ov_SC01_004_jr_801588CC.c
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC01_004/ov_SC01_004_jr_8017AE2C.c b/src/ov_SC01_004/ov_SC01_004_jr_8017AE2C.c
index d81470a3f..5b7af180b 100644
--- a/src/ov_SC01_004/ov_SC01_004_jr_8017AE2C.c
+++ b/src/ov_SC01_004/ov_SC01_004_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_8019032A;
 extern s16 D_80190334;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_80190328;
+    s32 pv = param_1;
+    s16 *g = &D_80190328;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801900DE;
             v790 = D_801900E0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_80190358 = 1;
             D_8019006C = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801900B4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801900B4;
diff --git a/src/ov_SC01_005/ov_SC01_005.c b/src/ov_SC01_005/ov_SC01_005.c
index e775c2b45..77996a988 100644
--- a/src/ov_SC01_005/ov_SC01_005.c
+++ b/src/ov_SC01_005/ov_SC01_005.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801CDFC0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801CDFC0;
+        register volatile s32 *p __asm__("$4") = &D_801CDFC0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801CDFA0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801CC538[idx], D_801CC539[idx], D_801CC53A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801CDFA0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC01_005/ov_SC01_005_jr_801588CC.c b/src/ov_SC01_005/ov_SC01_005_jr_801588CC.c
index 9fa5fc23a..df6b27270 100644
--- a/src/ov_SC01_005/ov_SC01_005_jr_801588CC.c
+++ b/src/ov_SC01_005/ov_SC01_005_jr_801588CC.c
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC01_005/ov_SC01_005_jr_8017AE2C.c b/src/ov_SC01_005/ov_SC01_005_jr_8017AE2C.c
index fb30a18dd..9fd5e9715 100644
--- a/src/ov_SC01_005/ov_SC01_005_jr_8017AE2C.c
+++ b/src/ov_SC01_005/ov_SC01_005_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801CDF8A;
 extern s16 D_801CDF94;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801CDF88;
+    s32 pv = param_1;
+    s16 *g = &D_801CDF88;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801CD83E;
             v790 = D_801CD840;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801CDFB8 = 1;
             D_801CD7CC = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801CD814[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801CD814;
diff --git a/src/ov_SC01_008/ov_SC01_008.c b/src/ov_SC01_008/ov_SC01_008.c
index 6364d0b68..c4a0364b4 100644
--- a/src/ov_SC01_008/ov_SC01_008.c
+++ b/src/ov_SC01_008/ov_SC01_008.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801A3570 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801A3570;
+        register volatile s32 *p __asm__("$4") = &D_801A3570;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_801A3550;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_801A1FE8[idx], D_801A1FE9[idx], D_801A1FEA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801A3550;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC01_008/ov_SC01_008_jr_801588CC.c b/src/ov_SC01_008/ov_SC01_008_jr_801588CC.c
index d94be5dde..85c75d446 100644
--- a/src/ov_SC01_008/ov_SC01_008_jr_801588CC.c
+++ b/src/ov_SC01_008/ov_SC01_008_jr_801588CC.c
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC01_008/ov_SC01_008_jr_8017AE2C.c b/src/ov_SC01_008/ov_SC01_008_jr_8017AE2C.c
index 56b2d07e1..93c11e2eb 100644
--- a/src/ov_SC01_008/ov_SC01_008_jr_8017AE2C.c
+++ b/src/ov_SC01_008/ov_SC01_008_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801A353A;
 extern s16 D_801A3544;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801A3538;
+    s32 pv = param_1;
+    s16 *g = &D_801A3538;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801A32EE;
             v790 = D_801A32F0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801A3568 = 1;
             D_801A327C = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801A32C4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801A32C4;
diff --git a/src/ov_SC01_009/ov_SC01_009.c b/src/ov_SC01_009/ov_SC01_009.c
index 1f3279d7d..b0bdd538a 100644
--- a/src/ov_SC01_009/ov_SC01_009.c
+++ b/src/ov_SC01_009/ov_SC01_009.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801F33F0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801F33F0;
+        register volatile s32 *p __asm__("$4") = &D_801F33F0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_801F33D0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_801F1E48[idx], D_801F1E49[idx], D_801F1E4A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801F33D0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC01_009/ov_SC01_009_jr_801588CC.c b/src/ov_SC01_009/ov_SC01_009_jr_801588CC.c
index 02d9d9ff0..2e6706b0e 100644
--- a/src/ov_SC01_009/ov_SC01_009_jr_801588CC.c
+++ b/src/ov_SC01_009/ov_SC01_009_jr_801588CC.c
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC01_009/ov_SC01_009_jr_8017AE2C.c b/src/ov_SC01_009/ov_SC01_009_jr_8017AE2C.c
index e44de735b..a9a3642a9 100644
--- a/src/ov_SC01_009/ov_SC01_009_jr_8017AE2C.c
+++ b/src/ov_SC01_009/ov_SC01_009_jr_8017AE2C.c
@@ -2623,8 +2623,8 @@ extern s16 D_801F33BA;
 extern s16 D_801F33C4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801F33B8;
+    s32 pv = param_1;
+    s16 *g = &D_801F33B8;
 
     switch (g[0]) {
     case 0:
@@ -2769,8 +2769,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2915,8 +2915,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2940,7 +2940,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801F314E;
             v790 = D_801F3150;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801F33E8 = 1;
             D_801F30DC = 0x1E;
             D_80126990 = v794;
@@ -3200,8 +3200,8 @@ extern void (*D_801F3124[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801F3124;
diff --git a/src/ov_SC01_074/ov_SC01_074.c b/src/ov_SC01_074/ov_SC01_074.c
index 8dbb68e6c..fcaa5665a 100644
--- a/src/ov_SC01_074/ov_SC01_074.c
+++ b/src/ov_SC01_074/ov_SC01_074.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_8019BD00 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_8019BD00;
+        register volatile s32 *p __asm__("$4") = &D_8019BD00;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_8019BCE0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_8019A8C8[idx], D_8019A8C9[idx], D_8019A8CA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_8019BCE0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC01_074/ov_SC01_074_jr_801588CC.c b/src/ov_SC01_074/ov_SC01_074_jr_801588CC.c
index e101c8192..27b828cc1 100644
--- a/src/ov_SC01_074/ov_SC01_074_jr_801588CC.c
+++ b/src/ov_SC01_074/ov_SC01_074_jr_801588CC.c
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC01_074/ov_SC01_074_jr_8017AE2C.c b/src/ov_SC01_074/ov_SC01_074_jr_8017AE2C.c
index 16a72327c..a12d784fd 100644
--- a/src/ov_SC01_074/ov_SC01_074_jr_8017AE2C.c
+++ b/src/ov_SC01_074/ov_SC01_074_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_8019BCCA;
 extern s16 D_8019BCD4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_8019BCC8;
+    s32 pv = param_1;
+    s16 *g = &D_8019BCC8;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019BBCE;
             v790 = D_8019BBD0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_8019BCF8 = 1;
             D_8019BB5C = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_8019BBA4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019BBA4;
diff --git a/src/ov_SC01_077/ov_SC01_077_a.c b/src/ov_SC01_077/ov_SC01_077_a.c
index 421a804ca..457d6d84f 100644
--- a/src/ov_SC01_077/ov_SC01_077_a.c
+++ b/src/ov_SC01_077/ov_SC01_077_a.c
@@ -260,7 +260,7 @@ void func_801287B8(void) {
     {
         /* D_801DAAC0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801DAAC0;
+        register volatile s32 *p __asm__("$4") = &D_801DAAC0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -566,17 +566,17 @@ void func_8012956C(void) {
     extern u8 D_801DAAA0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -586,7 +586,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -627,7 +626,7 @@ void func_8012956C(void) {
                       D_801D9488[idx], D_801D9489[idx], D_801D948A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801DAAA0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC01_077/ov_SC01_077_after.c b/src/ov_SC01_077/ov_SC01_077_after.c
index a162c524b..d6f4dd7d6 100644
--- a/src/ov_SC01_077/ov_SC01_077_after.c
+++ b/src/ov_SC01_077/ov_SC01_077_after.c
@@ -63,7 +63,7 @@ void func_80145934(void) {
         p = &D_80189054;
         /* §5a cross-jump barrier — LOAD-BEARING: keeps this D_80189054 load from being
          * tail-merged with the v>=0x384 D_80189054 load below (emits zero machine code). */
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
     } else if (v >= 0x5DC) {
         p = &D_80188FC4;
     } else if (v >= 0x578) {
@@ -110,7 +110,7 @@ void func_80145A2C(void) {
         p = &D_801890E4;
         /* §5a cross-jump barrier — LOAD-BEARING: keeps this D_801890E4 load from being
          * tail-merged with the v>=0x384 D_801890E4 load below (emits zero machine code). */
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
     } else if (v >= 0x5DC) {
         p = &D_80188FC4;
     } else if (v >= 0x578) {
@@ -755,11 +755,11 @@ extern ActorFn D_80188614[];
 int func_80148AFC(void *a0) {
     s32 p = (s32)a0;
     s32 iVar5 = *(s32 *)(p + 0x20);
-    register s32 tmp __asm__("$5") = (ratan2(*(s32 *)(D_801151D4 + 0x44) - *(s32 *)(D_801151D4 + 0x50),
+    register s32 tmp __asm__("$5") = (ratan2(*(s32 *)(D_801151D4 + 0x44) - *(s32 *)(D_801151D4 + 0x50),  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
                         *(s32 *)(D_801151D4 + 0x48) - *(s32 *)(D_801151D4 + 0x3C)) - 0x400) & 0xFFF;
     s32 sVar3;
     u8 bVar1;
-    __asm__("" : "=r"(tmp) : "0"(tmp));
+    __asm__("" : "=r"(tmp) : "0"(tmp));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     sVar3 = tmp;
     bVar1 = *(u8 *)(p + 0xA9);
 
@@ -769,15 +769,15 @@ int func_80148AFC(void *a0) {
     case 0x53:
     case 0x73:
         {
-            register u32 bb __asm__("$3");
-            register s32 c80 __asm__("$2") = 0x80;
-            register s32 lo __asm__("$4");
-            register s32 hi __asm__("$2");
+            register u32 bb __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+            register s32 c80 __asm__("$2") = 0x80;  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
+            s32 lo;
+            register s32 hi __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
             bb = *(u16 *)(p + 0xAE);
             lo = bb & 0xFF;
             if (lo != c80 || (hi = bb >> 8) != 0x80) {
                 s32 sVar4;
-                __asm__ __volatile__("" : : : "memory");
+                __asm__ __volatile__("" : : : "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
                 sVar4 = ratan2((*(u16 *)(p + 0xAE) & 0xFF) - 0x80, 0x80 - (*(u16 *)(p + 0xAE) >> 8));
                 *(u16 *)(iVar5 + 0x12) = (sVar3 + sVar4) & 0xFFF;
                 return 1;
@@ -834,8 +834,8 @@ extern u16 D_80126C06;
 extern s32 D_80188654[];
 
 s32 func_80148D44(void) {
-    register s32 ang __asm__("$16");
-    register s32 a __asm__("$4");
+    s32 ang;
+    register s32 a __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
     s32 p;
     s32 res;
     s32 d;
@@ -844,7 +844,7 @@ s32 func_80148D44(void) {
     a = (ratan2(*(s32 *)(p + 0x44) - *(s32 *)(p + 0x50),
                   *(s32 *)(p + 0x48) - *(s32 *)(p + 0x3c)) - 0x400) & 0xFFF;
     d = (s32)D_80126C01;
-    __asm__ __volatile__("" : : "r"(a));
+    __asm__ __volatile__("" : : "r"(a));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
     ang = a;
     if (d == 0x53) {
         goto final;
@@ -867,7 +867,6 @@ final:
         if (((e & 0xff) == 0x80) && ((e >> 8) == (e & 0xff))) {
             return -1;
         }
-        __asm__ __volatile__("" : : : "memory");
         res = (ang + ratan2((D_80126C06 & 0xff) - 0x80, 0x80 - (D_80126C06 >> 8))) & 0xFFF;
     }
     return res;
@@ -880,10 +879,10 @@ extern s32 D_801151D4;
 extern s16 (*D_80188694[])();
 
 s32 func_80148E54(s32 arg0) {
-    register s32 tmp __asm__("$4") = (ratan2(*(s32 *)(D_801151D4 + 0x44) - *(s32 *)(D_801151D4 + 0x50),
+    register s32 tmp __asm__("$4") = (ratan2(*(s32 *)(D_801151D4 + 0x44) - *(s32 *)(D_801151D4 + 0x50),  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
                                              *(s32 *)(D_801151D4 + 0x48) - *(s32 *)(D_801151D4 + 0x3C)) - 0x400) & 0xFFF;
     s32 ang;
-    __asm__("" : "=r"(tmp) : "0"(tmp));
+    __asm__("" : "=r"(tmp) : "0"(tmp));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     ang = tmp;
 
     switch (*(u8 *)(arg0 + 0xA9)) {
@@ -1097,7 +1096,7 @@ extern s16 currentLocationId;
 
 s32 func_80149FB0(s32 a0) {
     s32 *p = &D_801886D4[0];
-    register s32 v __asm__("$3") = *p;
+    s32 v = *p;
     u8 *q = &D_80078E78[0];
     s32 loc;
 
@@ -1931,7 +1930,7 @@ s32 func_8014D820(s32 a0, u16 *a1, u16 *a2x)
   } Ent;
   int new_var2;
   s16 new_var3;
-register u16 *a2 __asm__("$7");
+register u16 *a2 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
   V4 out[3];
   V4 pos;
   Desc desc;
@@ -1955,11 +1954,11 @@ register u16 *a2 __asm__("$7");
   s32 t;
   s32 u;
   s32 a0v;
-__asm__ __volatile__("" : "=r"(a2) : "0"(a2x));
+__asm__ __volatile__("" : "=r"(a2) : "0"(a2x));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
   t = a2[0];
   u = a1[0];
   dx = t - u;
-__asm__ __volatile__("" : "=r"(a0v) : "0"(a0));
+a0v = a0;
   new_var3 = (s16) dx;
   t = a2[2];
   u = a1[2];
@@ -2915,7 +2914,7 @@ s32 func_8015094C(s32 param_1) {
     struct { s32 x, mid, y; s32 _pad[9]; } arg;   /* 0x30 @ 0x10 */
     S16 local;                                     /* 0x10 @ 0x40 */
     s32 pad1[4];                                    /* 0x10 @ 0x50 */
-    register u8 *cam __asm__("$17") = D_80126948;
+    u8 *cam = D_80126948;
     s32 ret;
 
     local = D_801D8924;
@@ -3033,7 +3032,7 @@ extern void (*D_80188798[])(void);
 
 void func_80150B28(int param_1) {
     u32 idx;
-    register u32 sub __asm__("$2");
+    u32 sub;
 
     if ((D_800AE6B0 & 0x80FFFFFF) == 0) {
         idx = *(u16 *)(param_1 + 0x16C);
@@ -3322,8 +3321,8 @@ void func_801523F4(s32 arg0)
 {
     s32 pad[4];
     s32 buf[4];
-    register s32 s0a __asm__("$16");                    /* $s0 = buf */
-    register s32 s2a __asm__("$18") = (s32)&D_80188880; /* $s2 = &D_80188880 */
+    s32 s0a;                    /* $s0 = buf */
+    s32 s2a = (s32)&D_80188880; /* $s2 = &D_80188880 */
 
     ((void (*)(s32, s32))func_80146E90)(arg0, 0);
     func_80019064(&D_80062C04);
@@ -3605,7 +3604,6 @@ void func_80153D7C(s32 param_1)
     if (currentLocationId == 0x3075) *(u8 *)(param_1 + 0xde) = 0x14;
     else *(u8 *)(param_1 + 0xde) = 10;
     *(u8 *)(param_1 + 0xdf) = 0;
-    __asm__ __volatile__("" ::: "memory");
     func_80146CA0((void *)param_1);
 }
 
diff --git a/src/ov_SC01_077/ov_SC01_077_jr_801588CC.c b/src/ov_SC01_077/ov_SC01_077_jr_801588CC.c
index 56905fa7b..8dd301a16 100644
--- a/src/ov_SC01_077/ov_SC01_077_jr_801588CC.c
+++ b/src/ov_SC01_077/ov_SC01_077_jr_801588CC.c
@@ -1450,7 +1450,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC01_077/ov_SC01_077_jr_801734BC.c b/src/ov_SC01_077/ov_SC01_077_jr_801734BC.c
index ad8f678df..79288a7d9 100644
--- a/src/ov_SC01_077/ov_SC01_077_jr_801734BC.c
+++ b/src/ov_SC01_077/ov_SC01_077_jr_801734BC.c
@@ -2754,8 +2754,8 @@ extern void func_8012F14C(s32 a0, s32 a1, s32 a2);
 s32 func_801749C8(s32 param_1)
 {
     Buf_c1 buf;
-    register s32 iVar5 __asm__("$18");
-    register u32 iVar4 __asm__("$17");
+    s32 iVar5;
+    u32 iVar4;
 
     *(s32 *)(param_1 + 8) = (s16)((s16 (*)(s32, s32, s32))func_80012C6C)((s32)*(s16 *)(param_1 + 8), (s32)*(s16 *)(param_1 + 0xc), 4);
     *(s32 *)(param_1 + 0x10) = (s16)((s16 (*)(s32, s32, s32))func_80012C6C)((s32)*(s16 *)(param_1 + 0x10), (s32)*(s16 *)(param_1 + 0x14), 4);
@@ -3120,19 +3120,19 @@ void func_80175AB8(param_1)
     u8 *arr;
     u32 *slot;
     u32 *p;
-    register u32 *a0v __asm__("$4");
+    register u32 *a0v __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
     u32 uv;
     s32 k;
     s16 q;
     s32 r1;
     s32 a2v;
-    register s32 sum __asm__("$5");
+    register s32 sum __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
     s32 r2;
     s32 idx;
     s16 sv;
 
     p = (u32 *)(D_800AF638[param_1].g0 + D_800AF634[param_1].g0 * 4);
-    __asm__("" : "=r"(base) : "0"(&D_8011F7F0));               /* L1 */
+    __asm__("" : "=r"(base) : "0"(&D_8011F7F0));               /* L1 */  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     arr = base - 0x48;
     slot = (u32 *)(param_1 * 4 + (s32)arr);
     *(volatile u32 *)&slot[6] = (u32)p;                        /* L2 */
@@ -3161,7 +3161,7 @@ void func_80175AB8(param_1)
             (s16)(*(u16 *)(base - 0x32) + 0x65));
     idx = D_8011F83A & 0x7F;
     D_8011F83A = idx;
-    __asm__ __volatile__("" ::: "memory");
+    __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
     ((void (*)(s32, u8 *))func_80024054)(((s32 *)D_8018A23C)[idx], local);
     p = func_80178298(p, local,
                       (s16)(*(u16 *)(base - 0x34) + 0x39),
@@ -3300,7 +3300,7 @@ void func_80175DA8(param_1)
     fl = *(s16 *)(base + 0x1E) & 0x8000;
     /* §5a zero-byte sched fence: without it sched1 hoists the `la D_800D43D4`
        into the lh's load-delay slot, dropping the target's nop (-1 ins). */
-    __asm__("");
+    __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     arg = (s32)&D_800D43D4;
     if (fl != 0) {
         arg = (s32)&D_800D4414;
@@ -3700,10 +3700,10 @@ void func_80176734(s32 param_1)
     extern void func_801775E0(s32 param_1, s32 param_2);
 
     s32 st, cach, flag, cur;
-    register s32 chg  __asm__("$21");        /* L7 */
-    register s32 chg2 __asm__("$16");        /* L7 */
+    s32 chg;        /* L7 */
+    register s32 chg2 __asm__("$16");        /* L7 */  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s32 amp;                                 /* $s0, disjoint from chg2 */
-    register u16 tgt __asm__("$5");          /* L7 */
+    register u16 tgt __asm__("$5");          /* L7 */  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
     s32 pv;                                  /* L6: the param copy that owns $s6 */
     s32 ix;                                  /* L6: block A's index, hoisted out of the block */
     u8  dum[8];                              /* L5: dead frame slot (target .frame vars=8) */
@@ -3717,7 +3717,7 @@ void func_80176734(s32 param_1)
 
     /* ---- block A: pulse byte ---- */
     {
-        register s32 p __asm__("$5");        /* L7 */
+        register s32 p __asm__("$5");        /* L7 */  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
         u8 *q;
         p = *(s32 *)(ix + 0x28);
         q = (u8 *)(p + 0x3C);                /* L2: must live in the entry BB */
@@ -3737,7 +3737,7 @@ void func_80176734(s32 param_1)
 
     /* ---- block B: 0x48 animation already running ---- */
     if (*(u8 *)(flag + 0x48) != 0) {
-        register s32 pp __asm__("$5");       /* L7 */
+        register s32 pp __asm__("$5");       /* L7 */  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
         pp = *(s32 *)(((pv << 16) >> 14) + st + 0x28);
         *(u8 *)(pp + 0xD) = D_8018A2D8[*(u8 *)(flag + 0x48)];
         if (*(u8 *)(flag + 0x48) < 4) {
@@ -3768,7 +3768,7 @@ void func_80176734(s32 param_1)
         }
     /* ---- block C: 0x48 changed -> start the animation ---- */
     } else if (*(u8 *)(cach + 0x48) != *(u8 *)(cur + 0x48)) {
-        register s32 pp __asm__("$5");       /* L7 */
+        register s32 pp __asm__("$5");       /* L7 */  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
         u8 k;                                /* L1: gives the `andi $v1,$v1,0xFF` index mask */
         if (*(u8 *)(cach + 0x48) == 0 && *(u8 *)(cur + 0x48) != 0)
             *(u8 *)(flag + 0x48) = 5;
@@ -3818,7 +3818,7 @@ L9C0:
     {
         u8 m = D_800B9A13;                   /* L1 */
         if (m != 3) {                        /* inverted: `chg = 0` belongs out of line */
-            register s32 t __asm__("$2");    /* L3a: pin + 2 uses keeps `chg = t` alive */
+            register s32 t __asm__("$2");    /* L3a: pin + 2 uses keeps `chg = t` alive */  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
             t = (*(u8 *)(st + 7) != m);
             chg = t;
             if (t != 0) *(u8 *)(st + 7) = m;
@@ -3848,7 +3848,7 @@ L9C0:
     {
         s32 av;
         av = amp;
-        __asm__("" : "=r"(av) : "0"(av));    /* L3b: keeps the `move $v0,$s0` at the merge */
+        __asm__("" : "=r"(av) : "0"(av));    /* L3b: keeps the `move $v0,$s0` at the merge */  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         if (av != 0) {
             *(u8 *)(flag + 0x47) = 1;
             *(u8 *)(cach + 0x4B) = *(u8 *)(cur + 0x48) | 0xF0;
@@ -3864,11 +3864,11 @@ L9C0:
     tgt = *(u16 *)&D_80126CE0;
     if (D_80126CE0 != 0) {
         u16 v;                               /* dies at the mask -> destructive `andi $v1,$v1` */
-        register s32 t __asm__("$2");
+        register s32 t __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
         v = tgt;
         *(u8 *)(cach + 0x4B) = v;
         t = (*(u8 *)(cach + 0x47) != (v & 0xFF));
-        __asm__("" : "=r"(t) : "0"(t));      /* L3b */
+        __asm__("" : "=r"(t) : "0"(t));      /* L3b */  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         chg2 = t;
     } else {
         u32 cv = *(u8 *)(cach + 0x47);       /* L8: one load, two compares, no re-mask */
@@ -3884,12 +3884,12 @@ L9C0:
     /* ---- block J: nothing-changed fast path.  The target re-tests chg after the flag load;
        the fence below is what stops cse from folding that second test away. ---- */
     {
-    register s32 c __asm__("$3");
+    register s32 c __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
     c = chg;
     if (chg2 != 0) goto Lbig;
     if (c != 0) goto Lbig;
     if (*(u8 *)(flag + 0x47) == 0) goto Ltail;
-    __asm__("" : "=r"(c) : "0"(c));          /* L3b */
+    __asm__("" : "=r"(c) : "0"(c));          /* L3b */  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     if (c == 0) goto Lzero;
     }
 Lbig:
@@ -4130,19 +4130,19 @@ s32 tbli;
 s32 x;
 s32 y;
 {
-register u32 bb __asm__("$14");
+u32 bb;
   u32 *q;
-register u32 v __asm__("$25");
-register u32 cl __asm__("$3");
-register u32 cs __asm__("$5");
-register u32 ca __asm__("$8");
+u32 v;
+register u32 cl __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+register u32 cs __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
+u32 ca;
   s16 i;
   u32 mk1;
   u32 cc1;
   u32 flag;
-register u32 nn __asm__("$2");
+register u32 nn __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
   u32 n;
-register u32 t __asm__("$13");
+u32 t;
   u32 col;
   u32 uv;
   u32 tt;
@@ -4153,18 +4153,18 @@ register u32 t __asm__("$13");
   u32 g;
   u32 gg;
   u32 w3;
-register u32 yr __asm__("$16");
-register u32 yt __asm__("$4");
-register u32 tr __asm__("$21");
-register u32 xr __asm__("$17");
-register u32 c3 __asm__("$18");
-register s32 ff __asm__("$19");
-register s32 two __asm__("$20");
+register u32 yr __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+register u32 yt __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+register u32 tr __asm__("$21");  // !FAKE: pin $21 — NEEDED DIFFERS (P36 rung B tus7)
+register u32 xr __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+u32 c3;
+s32 ff;
+s32 two;
   yt = y;
   tr = tbli;
-__asm__("" : "=r"(tr) : "0"(tr));
+__asm__("" : "=r"(tr) : "0"(tr));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
   xr = x;
-__asm__("" : "=r"(xr) : "0"(xr));
+__asm__("" : "=r"(xr) : "0"(xr));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
   mk1 = 0xFFFFFF;
   cc1 = 0x74808080;
   bb = bits;
@@ -4182,11 +4182,11 @@ __asm__("" : "=r"(xr) : "0"(xr));
   x2 = (x + 5) & 0xFFFF;
   p[1] = cc1;
   yr = yt;
-__asm__("" : "=r"(yr) : "0"(yr));
+__asm__("" : "=r"(yr) : "0"(yr));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
   yt = (s16) yt;
   cs = (yt + 1) << 16;
   w = cs | x1;
-__asm__("" : "=r"(w) : "0"(w));
+__asm__("" : "=r"(w) : "0"(w));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
   cl = ((v << 6) | 0x4016) << 16;
   p[2] = w;
   p[3] = cl | 0x1800;
@@ -4220,13 +4220,12 @@ __asm__("" : "=r"(w) : "0"(w));
 
   }
   p = q;
-__asm__("" : "=r"(v) : "0"(v));
   g = (((u32) (p - 5)) & 0xFFFFFF) | 0x3000000;
-__asm__ __volatile__("");
+__asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
   cs = yr << 16;
   p[0] = g;
   w3 = cs | ((xr + 0x2A) & 0xFFFF);
-__asm__ __volatile__("");
+__asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
   cl = ((v << 6) | 0x4016) << 16;
   uv = ((s16) tr) << 4;
   p[2] = w3;
@@ -4235,7 +4234,7 @@ __asm__ __volatile__("");
   p[3] = cl | tt;
   p += 5;
   p[0] = (((u32) (p - 5)) & 0xFFFFFF) | 0x3000000;
-__asm__ __volatile__("");
+__asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
   cs = cs | ((xr + 0x32) & 0xFFFF);
   uv = uv | 0x1008;
   cl = cl | uv;
@@ -4243,7 +4242,7 @@ __asm__ __volatile__("");
   p[2] = cs;
   p[3] = cl;
   p += 5;
-__asm__("" :: "r"(tr), "r"(xr));
+__asm__("" :: "r"(tr), "r"(xr));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
   return p;
 }
 
@@ -4391,8 +4390,8 @@ extern int D_8018A360;
 extern int D_8018A36C[];
 
 void func_80178840(int param_1) {
-    register int p __asm__("$16");
-    register int s1byte __asm__("$17");
+    register int p __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    int s1byte;
     p = param_1;
     if ((*(unsigned short *)(p + 0x5c) & 1) != 0) {
         s1byte = *(unsigned char *)(p + 0x5e);
@@ -4415,7 +4414,7 @@ extern s16 D_801DAAB8;
 
 int func_80178970(void)
 {
-    register int r __asm__("$2");
+    register int r __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     int v;
 
     v = ((s32 (*)(void))func_801789AC)();
diff --git a/src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c b/src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c
index 65791f11d..db8605c18 100644
--- a/src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c
+++ b/src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c
@@ -2773,8 +2773,8 @@ extern s16 D_801DAA8A;
 extern s16 D_801DAA94;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801DAA88;
+    s32 pv = param_1;
+    s16 *g = &D_801DAA88;
 
     switch (g[0]) {
     case 0:
@@ -2918,8 +2918,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238 *)&buf[0] = *(Blk8_8017B238 *)src;
         *(Blk8_8017B238 *)&buf[8] = *(Blk8_8017B238 *)(src + 8);
     } else {
@@ -3058,8 +3058,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -3083,7 +3083,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801DA78E;
             v790 = D_801DA790;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801DAAB8 = 1;
             D_801DA71C = 0x1E;
             D_80126990 = v794;
@@ -3329,8 +3329,8 @@ extern void (*D_801DA764[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801DA764;
@@ -4276,7 +4276,7 @@ extern u16 D_80126B66;
 
 s32 func_8017DAEC(s32 param_1)
 {
-    register St_8017DAEC *s __asm__("$16") = (St_8017DAEC *)param_1;
+    St_8017DAEC *s = (St_8017DAEC *)param_1;
     Loc_8017DAEC loc;
     s16 b5e;
     u16 b66;
@@ -4815,7 +4815,7 @@ void func_8017E8A4(u16 *param_1)
 
     if (1 < (u16)(*param_1 - 0x19)) {
         if (D_801270D4 < 0x1e) {
-            __asm__ __volatile__("" ::: "$4");
+            __asm__ __volatile__("" ::: "$4");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             if (((s32 (*)(u16 *))func_80172658)(param_1) == 0) {
                 return;
             }
@@ -4939,13 +4939,12 @@ void func_8017EB2C(int param_1, int param_2)
     }
     if (p != 0) {
         int t;
-        register s32 d __asm__("$5");
-        register s32 r __asm__("$2");
+        s32 d;
+        register s32 r __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
         t = rand();
         s1 = t - (t / 256) * 256;
         r = rand() % 640;
         d = (s32)*(u16 *)(base + 0xe) - 0x140;
-        __asm__("" : "=r"(d) : "0"(d));
         d += r;
         *(s16 *)(p + 0xe) = d;
         if ((param_2 & 1) != 0) {
@@ -5074,16 +5073,16 @@ s32 func_8017EF50(s32 param_1)
     extern void func_8012931C(struct vec *a0);
     extern void func_801292C8(u8 *a0);
 
-    register unsigned short c __asm__("$5");
-    register int d __asm__("$4");
-    register int g __asm__("$6");
+    register unsigned short c __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
+    int d;
+    register int g __asm__("$6");  // !FAKE: pin $6 — NEEDED DIFFERS (P36 rung B tus7)
     int a;
     int e;
     ((void (*)(int))func_8012931C)(((int)param_1));
     a = *(int *)(((int)param_1) + 0x10);
     c = *(unsigned short *)(((int)param_1) + 0x34);
     e = *(int *)(((int)param_1) + 0x2c);
-    __asm__ __volatile__("" : : "r"(a));
+    __asm__ __volatile__("" : : "r"(a));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
     d = *(int *)(((int)param_1) + 0x30);
     {
         unsigned short cp1 = c + 1;
@@ -5151,15 +5150,15 @@ extern void func_8002D4C8(int, int);
 
 void func_8017F114(void)
 {
-    register int iVar1 __asm__("$3");
-    register int iVar5 __asm__("$6");
-    register int iVar7 __asm__("$8");
-    register int iVar8 __asm__("$9");
-    register short *psVar6 __asm__("$7");
-    register short *psVar2 __asm__("$4");
-    register int uVar4 __asm__("$5");
+    int iVar1;
+    int iVar5;
+    int iVar7;
+    int iVar8;
+    register short *psVar6 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register short *psVar2 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    register int uVar4 __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
     int uVar3;
-    register int num __asm__("$2");
+    register int num __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
 
     uVar4 = 0;
     if ((D_800B99DA & 4) == 0) {
@@ -5214,7 +5213,7 @@ extern s32 func_8012C51C(void *a0, s32 a1);
 
 M2C_UNK func_8017F240(void)
 {
-    register s32 *p __asm__("$16");
+    s32 *p;
     p = &D_801270D0;
     if (*p == 0) {
         ((void (*)(u8 *, s32))func_8012C51C)(&D_8018A868, 0);
@@ -5352,8 +5351,8 @@ void func_8017F5BC(int param_1)
 {
     int iVar1;
     int c70;
-    register short vf4 __asm__("$3");
-    register unsigned short v5c __asm__("$2");
+    short vf4;
+    register unsigned short v5c __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     struct buf_8017F5BC sp;
 
     *(short *)(param_1 + 2) = 2;
@@ -5366,7 +5365,6 @@ void func_8017F5BC(int param_1)
     *(int *)(param_1 + 0xdc) = 0;
     v5c = *(unsigned short *)(param_1 + 0x5c) & 0x73ff;
     *(unsigned short *)(param_1 + 0x5c) = v5c;
-    __asm__ __volatile__("");
     if (c70 != 4) {
         sp.f0 = *(short *)(param_1 + 6) + 0xf0;
         sp.f2 = *(short *)(param_1 + 10);
@@ -5610,9 +5608,9 @@ void func_8017FD14(void *a0)
     u32 *pal;
     u8 *base;
     u8 *pp;
-    register u8 *prim __asm__("$20");
-    register u8 *fp __asm__("$16");
-    register void *av __asm__("$17");
+    u8 *prim;
+    register u8 *fp __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    void *av;
 
     av = a0;
     func_8004914C(&D_800AF648);
@@ -5840,14 +5838,14 @@ extern s32 func_8012BEE8(s32 a0);
 extern int func_8012D714(int, int);
 extern void func_8017F694(void *arg0);
 extern void func_8002D4C8(s32 a0, s32 a1);
-extern volatile unsigned short D_80126B96;
+extern unsigned short D_80126B96;
 
 void func_8018047C(int param_1)
 {
     int iVar1;
 
     if ((*(char *)(param_1 + 0x70) == 4) || (iVar1 = ((int (*)(void))func_8012BEE8)(), iVar1 != 0)) {
-        register int sum __asm__("$3");
+        int sum;
         sum = *(int *)(param_1 + 0xe0);
         sum += *(int *)(param_1 + 0xe4);
         *(int *)(param_1 + 0xdc) += sum;
@@ -5861,7 +5859,7 @@ void func_8018047C(int param_1)
             if (2 <= *(unsigned short *)(param_1 + 0x34)) {
                 ((void (*)(int))func_8017F694)(param_1);
             } else {
-                register int cnt __asm__("$4");
+                register int cnt __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
                 if (*(unsigned short *)(param_1 + 0x34) == 0) {
                     func_8002D4C8(0x487, 0);
                 }
@@ -5898,7 +5896,7 @@ extern M2C_UNK D_80186E48;
 void func_80180590(int param_1)
 {
     int iVar2;
-    register unsigned int uVar3 __asm__("$2");
+    register unsigned int uVar3 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     int uVar5;
     int uVar6;
     unsigned short uVar1;
@@ -5935,7 +5933,7 @@ void func_80180590(int param_1)
             uVar1 = 0xc800;
         }
         *(unsigned short *)(param_1 + 0x5c) = uVar1;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         *(short *)(*(int *)(param_1 + 0x20) + 0x10) = 0;
         func_8012B2CC(param_1);
     }
@@ -6098,8 +6096,8 @@ extern void func_8012ADE4(u8 *a0);
 
 s32 func_801809BC(s32 param_1, s32 param_2)
 {
-    register s32 p1 __asm__("$16") = param_1;
-    register s32 p2 __asm__("$17") = param_2;
+    s32 p1 = param_1;
+    s32 p2 = param_2;
     SVEC in;
     SVEC out;
     SVEC buf;
@@ -6109,7 +6107,6 @@ s32 func_801809BC(s32 param_1, s32 param_2)
     s32 a0v;
 
     a0v = p1 + 4;
-    __asm__ __volatile__("" : : "r"(p2), "r"(a0v));
     if (((s32 (*)(s32, s32))func_8012BC60)(a0v, p2 + 4) >= 0x1000) {
         return 0;
     }
diff --git a/src/ov_SC01_080/ov_SC01_080.c b/src/ov_SC01_080/ov_SC01_080.c
index da6919d55..2486a8a20 100644
--- a/src/ov_SC01_080/ov_SC01_080.c
+++ b/src/ov_SC01_080/ov_SC01_080.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801C7EE0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801C7EE0;
+        register volatile s32 *p __asm__("$4") = &D_801C7EE0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_801C7EC4;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_801C46F8[idx], D_801C46F9[idx], D_801C46FA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801C7EC4;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC01_080/ov_SC01_080_jr_801588CC.c b/src/ov_SC01_080/ov_SC01_080_jr_801588CC.c
index 2f1450342..ab0818bde 100644
--- a/src/ov_SC01_080/ov_SC01_080_jr_801588CC.c
+++ b/src/ov_SC01_080/ov_SC01_080_jr_801588CC.c
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c b/src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c
index da20a4e20..5bb8f95e8 100644
--- a/src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c
+++ b/src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801C7EAA;
 extern s16 D_801C7EB4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801C7EA8;
+    s32 pv = param_1;
+    s16 *g = &D_801C7EA8;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801C59FE;
             v790 = D_801C5A00;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801C7EDC = 1;
             D_801C598C = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801C59D4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801C59D4;
@@ -3949,7 +3949,7 @@ void func_8017D72C(s32 arg0) {
      * func_8012A828, so the target's `addu $s0,$v0,$zero` copy survives.
      * Without the pin gcc coalesces the two pseudos (`lbu $s0` / `sh $s0`)
      * and the copy disappears -- one instruction short. */
-    register s32 t __asm__("$2");
+    register s32 t __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 v;
     u16 t5c;
     s32 t5e;
@@ -4205,8 +4205,8 @@ void func_8017DCF8(s32 arg0) {
     extern s32 D_80186FB0[];
     extern u8 D_80186F6C;
     extern u8 D_80186F5C;
-    register s32 param_1 __asm__("$16") = arg0;
-    register s32 iVar1 __asm__("$17");
+    s32 param_1 = arg0;
+    register s32 iVar1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     s32 ret;
     s32 iVar2;
 
@@ -4667,8 +4667,8 @@ void func_8017E724(s32 param_1)
 {
     s16 arr[3];
     s32 a;
-    register s32 cur __asm__("$16");
-    register s32 ang __asm__("$17");
+    register s32 cur __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 ang __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     s32 d;
     s32 d2;
     s32 t;
@@ -5258,7 +5258,7 @@ typedef struct {
 
 void func_8017F53C(s32 arg0)
 {
-    register s32 param_1 __asm__("$16") = arg0;
+    register s32 param_1 __asm__("$16") = arg0;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s32 ret;
     s32 handle;
     s32 cnt;
@@ -5299,7 +5299,7 @@ void func_8017F53C(s32 arg0)
 
 
 void func_8017F638(s32 arg0) {
-    volatile u8 sp18[8];
+    u8 sp18[8];
     s32 v1;
     extern s32 D_801270C8;
     extern void func_8017F458(void);
@@ -5565,10 +5565,10 @@ void func_8017FCC0(void) {
 extern u16 D_801C7600[];
 
 void func_8017FCFC(u16 *a0) {
-    register u16 *p __asm__("$5");
-    register s32 i __asm__("$6");
-    register s32 c __asm__("$7");
-    register u16 *q __asm__("$3");
+    u16 *p;
+    s32 i;
+    s32 c;
+    register u16 *q __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     p = D_801C7600;
     i = 0;
@@ -5740,9 +5740,9 @@ void func_8017FFB4(s32 arg0)
     extern u8 D_80189974;
     extern s32 D_801C7EC0;
 
-    register s32 s0 __asm__("$16");
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18") = arg0;
+    register s32 s0 __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s1;
+    register s32 s2 __asm__("$18") = arg0;  // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B tus7)
     s32 v0;
 
     v0 = ((s32 (*)(void))func_8012C1B8)();
@@ -5907,8 +5907,8 @@ void func_8018045C(s32 arg0)
     extern u8 D_801AE850;
     extern u8 D_8018A044;
 
-    register s32 s0 __asm__("$16");
-    register s32 s1 __asm__("$17");
+    register s32 s0 __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     s32 v0;
 
     s0 = arg0;
@@ -5956,8 +5956,8 @@ extern s32 D_80127190;
 
 void func_80180598(s32 arg0)
 {
-    register s32 param_1 __asm__("$16") = arg0;
-    register s32 iVar1 __asm__("$17");
+    register s32 param_1 __asm__("$16") = arg0;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 iVar1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     s32 ret;
     s32 v0;
 
@@ -6109,14 +6109,14 @@ void func_80180728(s32 a0) {
                `s32 j = i;` keeps the sign-extend alive (it is never dead under
                an `sb`, measured) and cse then commons it with the index's own
                extend, costing the copy and the folded `sra 10` (§241). */
-            __asm__("" : "=r"(j) : "0"(i));
+            __asm__("" : "=r"(j) : "0"(i));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
             v1b = j * 4 + 4;
             /* offset-first spelling: the target is `addu $a0,$v0,$s2`, not
                `addu $a0,$s2,$v0` that `&base[i]` produces. */
             elem = (Str_801C5B00 *)(i * 0x40 + (s32)base);
             /* §34 zero-byte fence: without it sched sinks the address below
                `j * 8 + 8` (target order is v1b, address, v0b). */
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             v0b = j * 8 + 8;
 
             ((u8 *)elem)[1] = v1b;
@@ -6149,15 +6149,15 @@ void func_80180728(s32 a0) {
     sp20[2] = 0;
     sp20[1] = 0;
     sp20[0] = 0;
-    __asm__("" : "=r"(p0) : "0"(p0));
-    __asm__("" : "=r"(p1) : "0"(p1));
+    __asm__("" : "=r"(p0) : "0"(p0));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
+    __asm__("" : "=r"(p1) : "0"(p1));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     func_800D20C0(p0, p1, 1);
     func_800D23D0(sp28);
 
     t = sp28[1];
     /* §34 fence: sched2 otherwise emits the `0x2($s1)` load first, which flips
        both loads' registers ($a0/$v1) as well as their order. */
-    __asm__ __volatile__("");
+    __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     v1 = *(u16 *)(a0 + 2);
     *(u16 *)(a0 + 0xDC) = 0;
     *(u16 *)(a0 + 0x84) = 8;
@@ -6224,7 +6224,7 @@ void func_801809E4(s32 param_1) {
        allocates it $s2 and gives the 0x19 hoist $s3 -- the exact inverse of the
        target (21-ins residual, register-only). Pinning $s3 = $19 restores the
        target allocation. */
-   register s16 mask __asm__("$19");
+   register s16 mask __asm__("$19");  // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B tus7)
     u8 *p;
 
     if (*(s32 *)(param_1 + 0x1C) != 0) {
@@ -6386,7 +6386,7 @@ void func_80180D54(s32 param_1) {
     u16 sp10[6];
     u16 *p0;
     u16 *p1;
-    register s16 mask __asm__("$19");
+    register s16 mask __asm__("$19");  // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B tus7)
     s16 i;
     u8 *p;
     u8 *q;
@@ -6397,8 +6397,8 @@ void func_80180D54(s32 param_1) {
     sp10[0] = 0;
     p0 = sp10;
     p1 = sp10 + 4;
-    __asm__("" : "=r"(p0) : "0"(p0));
-    __asm__("" : "=r"(p1) : "0"(p1));
+    __asm__("" : "=r"(p0) : "0"(p0));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
+    __asm__("" : "=r"(p1) : "0"(p1));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     func_800D20C0(p0, p1, 1);
     func_800D23D0(sp10 + 4);
     cnt = *(s32 *)(param_1 + 0x1C);
@@ -6552,7 +6552,7 @@ void func_801810E4(void *a0) {
     s16 c;
     /* §136d-1 / RC-12: the `$0`-add opaque copy — keeps `y` a distinct pseudo
        from the temp cse would otherwise canonicalise it onto. */
-    register s32 zr __asm__("$0");
+    register s32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
 
     t = D_80127190 - 0x128;
     y = t + zr;
@@ -6600,7 +6600,7 @@ void func_801810E4(void *a0) {
     *(s32 *)((u8 *)a0 + 0x1C) = m;
     /* §5a barrier: without it both sched1 and sched2 sink this store below the
        three &v/&v2 address insns (byte-attributed with -fno-schedule-insns*). */
-    __asm__ __volatile__("" ::: "memory");
+    __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
 
     *(s32 *)((u8 *)a0 + 0x18) = v.vz << 9;
     func_800D20C0(&v, &v2, 1);
@@ -6735,8 +6735,8 @@ void func_801815D4(s32 param_1) {
     sp10[2] = 0;
     sp10[1] = 0;
     sp10[0] = 0;
-    __asm__("" : "=r"(p0) : "0"(p0));
-    __asm__("" : "=r"(p1) : "0"(p1));
+    __asm__("" : "=r"(p0) : "0"(p0));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
+    __asm__("" : "=r"(p1) : "0"(p1));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     func_800D20C0(p0, p1, 1);
     func_800D23D0(sp10 + 4);
     D_801C7540 = sp10[5] - 0x400;
@@ -6888,7 +6888,7 @@ void func_80181854(void *a0) {
        the "memory" clobber): without it both schedulers sink this store past the
        two argument insns below and it steals the jal's delay slot. Same lever as
        the §5a barrier in func_801810E4. */
-    __asm__ __volatile__("");
+    __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     func_801696D8((s32)a0, (s32)&mtx);
 
     if (--*(s32 *)((u8 *)a0 + 0x1C) == -1) {
@@ -6907,7 +6907,7 @@ extern u16 D_80126B66;
 void func_80181918(s32 arg0) {
     s32 pad[12];
     u16 t;
-    register u16 cnt __asm__("$6");
+    register u16 cnt __asm__("$6");  // !FAKE: pin $6 — NEEDED DIFFERS (P36 rung B tus7)
 
     t = rand();
     *(u16 *)(arg0 + 6) = D_80126B5E + D_80126B6A * 32 + (t & 0x1FF) - 0xFF;
@@ -7104,8 +7104,8 @@ extern s32 func_8012C658(s32 a0, s32 a1, s32 a2);
  * the target has them the other way round. `s` holds D_80126D50 so the
  * unconditional `*p = 1` lands in the bnez delay slot. */
 void func_80181D98(void *a0) {
-    register s32 *p __asm__("$17");
-    register SpotDef_8018A278 *t __asm__("$16");
+    s32 *p;
+    register SpotDef_8018A278 *t __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s32 e;
     s32 s;
     u16 v;
@@ -7176,7 +7176,7 @@ extern s32 D_801270D0;
 extern void func_8002D59C(s32, s32, s32);
 
 void func_80181FAC(s32 arg0) {
-    register s32 id __asm__("$5");
+    s32 id;
     s32 dist;
     s32 vol;
 
@@ -7233,7 +7233,7 @@ void func_801820AC(s32 arg0) {
     u16 buf[3];
     s32 t, yaw, sn, cs, base, len, rot, sum, ang, d, q;
     s16 mode;
-    register s32 am __asm__("$4");
+    register s32 am __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
 
     d = D_8018A2AC;
     sum = *(u16 *)(arg0 + 0xFC) + d;
@@ -7373,7 +7373,7 @@ void func_8018230C(s32 arg0) {
         w = D_8018A304 + D_8018A306 * c;
         bp = base;
         {
-            register u16 z __asm__("$3");
+            register u16 z __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             base[0] = *(u16 *)(arg0 + 6);
             base[1] = *(u16 *)(arg0 + 0xA);
             z = *(u16 *)(arg0 + 0xE);
diff --git a/src/ov_SC01_084/ov_SC01_084.c b/src/ov_SC01_084/ov_SC01_084.c
index a12d3b8ca..633076be8 100644
--- a/src/ov_SC01_084/ov_SC01_084.c
+++ b/src/ov_SC01_084/ov_SC01_084.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801C7B88 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801C7B88;
+        register volatile s32 *p __asm__("$4") = &D_801C7B88;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_801C7820;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_801C61A0[idx], D_801C61A1[idx], D_801C61A2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801C7820;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC01_084/ov_SC01_084_jr_801588CC.c b/src/ov_SC01_084/ov_SC01_084_jr_801588CC.c
index 44c3ec701..aab886466 100644
--- a/src/ov_SC01_084/ov_SC01_084_jr_801588CC.c
+++ b/src/ov_SC01_084/ov_SC01_084_jr_801588CC.c
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC01_084/ov_SC01_084_jr_8017AE2C.c b/src/ov_SC01_084/ov_SC01_084_jr_8017AE2C.c
index 53e91e068..f4daa15b8 100644
--- a/src/ov_SC01_084/ov_SC01_084_jr_8017AE2C.c
+++ b/src/ov_SC01_084/ov_SC01_084_jr_8017AE2C.c
@@ -2630,8 +2630,8 @@ extern s16 D_801C780A;
 extern s16 D_801C7814;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801C7808;
+    s32 pv = param_1;
+    s16 *g = &D_801C7808;
 
     switch (g[0]) {
     case 0:
@@ -2776,8 +2776,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2922,8 +2922,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2947,7 +2947,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801C74A6;
             v790 = D_801C74A8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801C7AB8 = 1;
             D_801C7434 = 0x1E;
             D_80126990 = v794;
@@ -3214,8 +3214,8 @@ extern void (*D_801C747C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801C747C;
diff --git a/src/ov_SC02_000/ov_SC02_000.c b/src/ov_SC02_000/ov_SC02_000.c
index 4fa4b82f7..c125834f5 100644
--- a/src/ov_SC02_000/ov_SC02_000.c
+++ b/src/ov_SC02_000/ov_SC02_000.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801E87C0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801E87C0;
+        register volatile s32 *p __asm__("$4") = &D_801E87C0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801E8774;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801E6CD0[idx], D_801E6CD1[idx], D_801E6CD2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801E8774;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC02_000/ov_SC02_000_jr_801588CC.c b/src/ov_SC02_000/ov_SC02_000_jr_801588CC.c
index 4d0cd62f2..887b605c9 100644
--- a/src/ov_SC02_000/ov_SC02_000_jr_801588CC.c
+++ b/src/ov_SC02_000/ov_SC02_000_jr_801588CC.c
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC02_000/ov_SC02_000_jr_8017AE2C.c b/src/ov_SC02_000/ov_SC02_000_jr_8017AE2C.c
index 068966754..6af081b25 100644
--- a/src/ov_SC02_000/ov_SC02_000_jr_8017AE2C.c
+++ b/src/ov_SC02_000/ov_SC02_000_jr_8017AE2C.c
@@ -2626,8 +2626,8 @@ extern s16 D_801E875A;
 extern s16 D_801E8764;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801E8758;
+    s32 pv = param_1;
+    s16 *g = &D_801E8758;
 
     switch (g[0]) {
     case 0:
@@ -2772,8 +2772,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2918,8 +2918,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2943,7 +2943,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801E7FD6;
             v790 = D_801E7FD8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801E87BC = 1;
             D_801E7F64 = 0x1E;
             D_80126990 = v794;
@@ -3203,8 +3203,8 @@ extern void (*D_801E7FAC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801E7FAC;
@@ -3794,17 +3794,17 @@ void func_8017D230(u16 *a0, void *a1) {
 
 
 int func_8017D2D4(short *param_1, short *param_2, short *param_3, int param_4) {
-    register int i2o __asm__("$5");
-    register int i4o __asm__("$9");
+    register int i2o __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
+    register int i4o __asm__("$9");  // !FAKE: pin $9 — NEEDED DIFFERS (P36 rung B tus7)
     short sVar1; int rx, rz, uVar5;
     i4o = param_2[1];
-    __asm__ __volatile__("" : : "r"(i4o));
+    __asm__ __volatile__("" : : "r"(i4o));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
     i2o = param_1[1]; uVar5 = 0;
     if (i2o >= i4o) {
         rx = param_1[0] - i2o * (param_2[0] - param_1[0]);
         rz = param_1[2] - i2o * (param_2[2] - param_1[2]);
     } else {
-        register int den __asm__("$3");
+        register int den __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
         int p2x = param_2[0], p2z = param_2[2];
         den = i2o - i4o;
         rx = p2x + i4o * (p2x - param_1[0]) / den;
diff --git a/src/ov_SC02_004/ov_SC02_004.c b/src/ov_SC02_004/ov_SC02_004.c
index b2f5c6df3..3e0c74d46 100644
--- a/src/ov_SC02_004/ov_SC02_004.c
+++ b/src/ov_SC02_004/ov_SC02_004.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_80196358 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_80196358;
+        register volatile s32 *p __asm__("$4") = &D_80196358;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_80196338;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_80194F20[idx], D_80194F21[idx], D_80194F22[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_80196338;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC02_004/ov_SC02_004_jr_801588CC.c b/src/ov_SC02_004/ov_SC02_004_jr_801588CC.c
index 5f2ff2c86..4ac5a7fe1 100644
--- a/src/ov_SC02_004/ov_SC02_004_jr_801588CC.c
+++ b/src/ov_SC02_004/ov_SC02_004_jr_801588CC.c
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC02_004/ov_SC02_004_jr_8017AE2C.c b/src/ov_SC02_004/ov_SC02_004_jr_8017AE2C.c
index 5b4abd4de..308ac81e3 100644
--- a/src/ov_SC02_004/ov_SC02_004_jr_8017AE2C.c
+++ b/src/ov_SC02_004/ov_SC02_004_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_80196322;
 extern s16 D_8019632C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_80196320;
+    s32 pv = param_1;
+    s16 *g = &D_80196320;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_80196226;
             v790 = D_80196228;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_80196350 = 1;
             D_801961B4 = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801961FC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801961FC;
@@ -4098,7 +4098,7 @@ extern u8 D_801817A4[];
 extern u8 D_801817B0[];
 
 void func_8017DA30(s32 a0) {
-    register s32 ent __asm__("$16");
+    register s32 ent __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s32 sub;
     s32 hw;
     u32 r;
@@ -4114,14 +4114,14 @@ void func_8017DA30(s32 a0) {
         func_80128EA8(sub, (s32)((u8 *)ent + 0x24), (s32)D_800D3888);
         hw = 0x2C;
     } else {
-        register s32 q __asm__("$4");
-        register s32 p __asm__("$5");
-        register s32 e __asm__("$6");
+        register s32 q __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+        s32 p;
+        s32 e;
         func_8001CC3C(sub, (s32)D_801817A4, 0, 0);
         q = sub;
         p = (s32)((u8 *)ent + 0x24);
         e = (s32)D_801817B0;
-        __asm__ __volatile__("" : "=r"(q), "=r"(p), "=r"(e) : "0"(q), "1"(p), "2"(e));
+        __asm__ __volatile__("" : "=r"(q), "=r"(p), "=r"(e) : "0"(q), "1"(p), "2"(e));  // !FAKE: launder — REFUSED launder with 3 outputs (P36 rung B tus7)
         *(u8 *)((u8 *)q + 0x27) = 0x33;
         func_80128EA8(q, p, e);
         hw = 0x1C;
diff --git a/src/ov_SC02_005/ov_SC02_005.c b/src/ov_SC02_005/ov_SC02_005.c
index 910b218d2..3709ae4b1 100644
--- a/src/ov_SC02_005/ov_SC02_005.c
+++ b/src/ov_SC02_005/ov_SC02_005.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801E4BE0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801E4BE0;
+        register volatile s32 *p __asm__("$4") = &D_801E4BE0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_801E4BC0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_801E2F98[idx], D_801E2F99[idx], D_801E2F9A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801E4BC0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC02_005/ov_SC02_005_jr_801588CC.c b/src/ov_SC02_005/ov_SC02_005_jr_801588CC.c
index 78482935e..004134946 100644
--- a/src/ov_SC02_005/ov_SC02_005_jr_801588CC.c
+++ b/src/ov_SC02_005/ov_SC02_005_jr_801588CC.c
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c b/src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c
index a6335795d..6e8e44b81 100644
--- a/src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c
+++ b/src/ov_SC02_005/ov_SC02_005_jr_8017AE2C.c
@@ -2621,8 +2621,8 @@ extern s16 D_801E4BAA;
 extern s16 D_801E4BB4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801E4BA8;
+    s32 pv = param_1;
+    s16 *g = &D_801E4BA8;
 
     switch (g[0]) {
     case 0:
@@ -2767,8 +2767,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2913,8 +2913,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2938,7 +2938,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801E429E;
             v790 = D_801E42A0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801E4BD8 = 1;
             D_801E422C = 0x1E;
             D_80126990 = v794;
@@ -3198,8 +3198,8 @@ extern void (*D_801E4274[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801E4274;
@@ -3736,7 +3736,7 @@ void func_8017C41C(void *a0) {
     if (*(s16 *)((s32)a0 + 0xFC) == 0xB) {
         s32 f = *(s32 *)((s32)a0 + 0x1C);
         s32 v = -(f & 1) & 0xC0;
-        __asm__("" : "=r"(v) : "0"(v));
+        __asm__("" : "=r"(v) : "0"(v));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         f = f + 1;
         *(s32 *)((s32)a0 + 0x1C) = f;
         D_801E4321 = v;
@@ -3760,16 +3760,15 @@ void func_8017C41C(void *a0) {
         D_801E4325 = c * 255 / h;
         D_801E431D = c * 255 / h;
     } else {
-        register u8 *q __asm__("$6");
+        u8 *q;
         u16 bs;
         s32 x;
         s16 y;
         t = (c - h) * 255 / h;
         q = &D_801E431D;
-        __asm__("" : "=r"(q) : "0"(q));
+        __asm__("" : "=r"(q) : "0"(q));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         bs = (u16)D_801E42F8;
         x = bs + hw;
-        __asm__("" :: "r"(hw));
         y = x - 4;
         D_801E4325 = 0xFF;
         *q = 0xFF;
@@ -3785,7 +3784,7 @@ void func_8017C41C(void *a0) {
     }
 
     p = &D_801E4378;
-    __asm__("" : "=r"(p) : "0"(p));
+    __asm__("" : "=r"(p) : "0"(p));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     D_801E4368 = *(u16 *)((s32)p - 0x18) + (u16)D_801942E0;
     *p = D_801E4368 - 4;
     w = (void *)((s32)p - 0x80);
@@ -3907,17 +3906,17 @@ void func_8017CC88(u16 *a0, void *a1) {
 
 
 int func_8017CD2C(short *param_1, short *param_2, short *param_3, int param_4) {
-    register int i2o __asm__("$5");
-    register int i4o __asm__("$9");
+    register int i2o __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
+    register int i4o __asm__("$9");  // !FAKE: pin $9 — NEEDED DIFFERS (P36 rung B tus7)
     short sVar1; int rx, rz, uVar5;
     i4o = param_2[1];
-    __asm__ __volatile__("" : : "r"(i4o));
+    __asm__ __volatile__("" : : "r"(i4o));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
     i2o = param_1[1]; uVar5 = 0;
     if (i2o >= i4o) {
         rx = param_1[0] - i2o * (param_2[0] - param_1[0]);
         rz = param_1[2] - i2o * (param_2[2] - param_1[2]);
     } else {
-        register int den __asm__("$3");
+        register int den __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
         int p2x = param_2[0], p2z = param_2[2];
         den = i2o - i4o;
         rx = p2x + i4o * (p2x - param_1[0]) / den;
diff --git a/src/ov_SC02_011/ov_SC02_011.c b/src/ov_SC02_011/ov_SC02_011.c
index 07cfbfa9d..8df17344e 100644
--- a/src/ov_SC02_011/ov_SC02_011.c
+++ b/src/ov_SC02_011/ov_SC02_011.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801EBA10 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801EBA10;
+        register volatile s32 *p __asm__("$4") = &D_801EBA10;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_801EB9F0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_801E9E78[idx], D_801E9E79[idx], D_801E9E7A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801EB9F0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC02_011/ov_SC02_011_jr_801588CC.c b/src/ov_SC02_011/ov_SC02_011_jr_801588CC.c
index 30c539b83..1c5fdc654 100644
--- a/src/ov_SC02_011/ov_SC02_011_jr_801588CC.c
+++ b/src/ov_SC02_011/ov_SC02_011_jr_801588CC.c
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c b/src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c
index 9c1cffd28..7ea62945a 100644
--- a/src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c
+++ b/src/ov_SC02_011/ov_SC02_011_jr_8017AE2C.c
@@ -2615,8 +2615,8 @@ extern s16 D_801EB9DA;
 extern s16 D_801EB9E4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801EB9D8;
+    s32 pv = param_1;
+    s16 *g = &D_801EB9D8;
 
     switch (g[0]) {
     case 0:
@@ -2764,8 +2764,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2910,8 +2910,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2935,7 +2935,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801EB17E;
             v790 = D_801EB180;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801EBA08 = 1;
             D_801EB10C = 0x1E;
             D_80126990 = v794;
@@ -3201,8 +3201,8 @@ extern void (*D_801EB154[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801EB154;
@@ -3476,8 +3476,8 @@ void func_8017C360(s32 a0) {
     s32 s0;
     s32 s2;
     s32 s3;
-    register s32 v1 __asm__("$3");
-    register s32 v0 __asm__("$2");
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 rnd;
     s32 scale;
 
@@ -3514,7 +3514,7 @@ void func_8017C360(s32 a0) {
     sp10[2] = scale;
     ApplyMatrixSV(sp18, sp10, sp10);
     {
-        register s32 c __asm__("$4");
+        register s32 c __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         s32 z;
         c = *(u16 *)(a0 + 0x2);
         *(s32 *)(a0 + 0x10) = sp10[0] << 8;
@@ -4485,7 +4485,7 @@ void func_8017D710(s32 a0) {
        permutation. */
     raw = ((s32 (*)(s32))func_8012CBA4)(a0);
     flags = raw;
-    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));
+    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
 
     /* `m` blocks fold_truthop from merging the two bitfield tests below into a single
        `andi $v1,$s1,0xe000` -- the target keeps `& 0x8000` and `& 0x6000` separate. */
@@ -4632,7 +4632,7 @@ void func_8017D710(s32 a0) {
        copies vanish and everything from .L8017CD18 on drifts by 2 instructions. */
     {
         s32 fire = ret;
-        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));
+        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         if (fire != 0) {
             func_80146A6C(2, (void *)s0, 0, 0, 0, 2, 0);
         }
@@ -4761,7 +4761,7 @@ extern void func_8012B0B4(unsigned int *param_1, int param_2, int param_3);
 
 void func_8017DCC0(s32 a0, s16 a1, s16 a2) {
     u32 buf[4];
-    register s32 hi __asm__("$2");
+    register s32 hi __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 lo;
 
     func_8012B0B4(buf, *(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), a1 << 4);
@@ -4846,7 +4846,7 @@ void func_8017DE10(s32 a0) {
     u8 out[8];
     Mtx8_8017DE10 m;
     s32 base;
-    register s32 ang __asm__("$2");
+    register s32 ang __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s16 arg;
 
     *(s16 *)(in + 0) = *(u16 *)(a0 + 0x6) + *(u16 *)(a0 + 0x12);
@@ -5937,8 +5937,8 @@ void func_8017F67C(void *a0)
 
     extern u16 D_80194C30[][2];
     s16 n;
-    register s32 tmp __asm__("$4");
-    register s32 t __asm__("$17");
+    register s32 tmp __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 t __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     s16 v;
     SVECTOR_8017C290 vec1;
     SVECTOR_8017C290 vec2;
@@ -6348,11 +6348,11 @@ void func_8017FD9C(s32 arg0) {
     u8 *p = &D_801EB488;
 
     D_801EB489 = D_801EB48A = *p = func_80012F74(*p, 0, 10, 1);
-    __asm__("");
+    __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     *(Quad_801EA880_8017FD9C *)&D_801EB48C = *(Quad_801EA880_8017FD9C *)p;
     *(Quad_801EA880_8017FD9C *)&D_801EB490 = *(Quad_801EA880_8017FD9C *)p;
     *(Quad_801EA880_8017FD9C *)&D_801EB494 = *(Quad_801EA880_8017FD9C *)p;
-    __asm__("");
+    __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     if (*p == 0) {
         ((void (*)(s32))func_80146C3C)(arg0);
     }
@@ -7359,7 +7359,7 @@ void func_80180FE4(s32 arg0)
         mx = wx >> 16;
         wy = part->yy;
         mny = wy;
-        __asm__ volatile ("" :: "r"(mny));
+        __asm__ volatile ("" :: "r"(mny));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
         my = wy >> 16;
         wz = part->zz;
         box[0].vx = mn; box[0].vy = mny;
diff --git a/src/ov_SC02_015/ov_SC02_015.c b/src/ov_SC02_015/ov_SC02_015.c
index 4ca016a13..f324beb14 100644
--- a/src/ov_SC02_015/ov_SC02_015.c
+++ b/src/ov_SC02_015/ov_SC02_015.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_80190630 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_80190630;
+        register volatile s32 *p __asm__("$4") = &D_80190630;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_80190610;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_8018EFF8[idx], D_8018EFF9[idx], D_8018EFFA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_80190610;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC02_015/ov_SC02_015_jr_801588CC.c b/src/ov_SC02_015/ov_SC02_015_jr_801588CC.c
index 839a5add3..2b9c92e67 100644
--- a/src/ov_SC02_015/ov_SC02_015_jr_801588CC.c
+++ b/src/ov_SC02_015/ov_SC02_015_jr_801588CC.c
@@ -1400,7 +1400,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c b/src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c
index 964e4e075..709d7d5ac 100644
--- a/src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c
+++ b/src/ov_SC02_015/ov_SC02_015_jr_8017AE2C.c
@@ -2627,8 +2627,8 @@ extern s16 D_801905FA;
 extern s16 D_80190604;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801905F8;
+    s32 pv = param_1;
+    s16 *g = &D_801905F8;
 
     switch (g[0]) {
     case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801902FE;
             v790 = D_80190300;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_80190628 = 1;
             D_8019028C = 0x1E;
             D_80126990 = v794;
@@ -3204,8 +3204,8 @@ extern void (*D_801902D4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801902D4;
@@ -3816,7 +3816,7 @@ extern s32 rand(void);
 
 void func_8017D9E4(s32 param_1) {
     u16 delta[4];
-    register s32 t __asm__("$3");
+    register s32 t __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
     s32 t2;
     s16 d;
     s32 obj;
@@ -3870,7 +3870,7 @@ extern u8 *func_801290DC(s32 a0, u8 *a1);
 extern s32 D_80181D90;
 
 void func_8017DB60(void *a0) {
-    register s8 *s0 __asm__("$16");
+    register s8 *s0 __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s32 t;
     u8 *p;
     s32 x;
@@ -4138,7 +4138,7 @@ void func_8017DF44(void *a0) {
      * swaps $v0/$v1 across the sll/lui pair (REGALLOC-PERM). The re-tie keeps the
      * in-place `v1 <<= 6` form (so the shift stays in $v1) AND anchors it after the
      * two loads. Emits no code. */
-    __asm__ __volatile__("" : "=r"(v1) : "0"(v1));
+    __asm__ __volatile__("" : "=r"(v1) : "0"(v1));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     v1 = v1 << 6;
     a2 = (s32)D_80190330 + v1;
     v1ptr = *(u8 **)((s32)a0 + 0x20);
diff --git a/src/ov_SC02_016/ov_SC02_016.c b/src/ov_SC02_016/ov_SC02_016.c
index daddf2902..61b604c53 100644
--- a/src/ov_SC02_016/ov_SC02_016.c
+++ b/src/ov_SC02_016/ov_SC02_016.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801B4A68 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801B4A68;
+        register volatile s32 *p __asm__("$4") = &D_801B4A68;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_801B4A48;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_801B2C10[idx], D_801B2C11[idx], D_801B2C12[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801B4A48;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC02_016/ov_SC02_016_jr_801588CC.c b/src/ov_SC02_016/ov_SC02_016_jr_801588CC.c
index c8561511a..c05b3dabf 100644
--- a/src/ov_SC02_016/ov_SC02_016_jr_801588CC.c
+++ b/src/ov_SC02_016/ov_SC02_016_jr_801588CC.c
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC02_016/ov_SC02_016_jr_8017AE2C.c b/src/ov_SC02_016/ov_SC02_016_jr_8017AE2C.c
index 8ac09e730..977acfe63 100644
--- a/src/ov_SC02_016/ov_SC02_016_jr_8017AE2C.c
+++ b/src/ov_SC02_016/ov_SC02_016_jr_8017AE2C.c
@@ -2624,8 +2624,8 @@ extern s16 D_801B4A32;
 extern s16 D_801B4A3C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801B4A30;
+    s32 pv = param_1;
+    s16 *g = &D_801B4A30;
 
     switch (g[0]) {
     case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801B3F16;
             v790 = D_801B3F18;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801B4A60 = 1;
             D_801B3EA4 = 0x1E;
             D_80126990 = v794;
@@ -3207,8 +3207,8 @@ extern void (*D_801B3EEC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801B3EEC;
diff --git a/src/ov_SC02_017/ov_SC02_017.c b/src/ov_SC02_017/ov_SC02_017.c
index f7cf103b0..de1dc30fc 100644
--- a/src/ov_SC02_017/ov_SC02_017.c
+++ b/src/ov_SC02_017/ov_SC02_017.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801EFCC8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801EFCC8;
+        register volatile s32 *p __asm__("$4") = &D_801EFCC8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_801EFCA8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_801EE438[idx], D_801EE439[idx], D_801EE43A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801EFCA8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC02_017/ov_SC02_017_jr_801588CC.c b/src/ov_SC02_017/ov_SC02_017_jr_801588CC.c
index 17a46732e..7b2fe59f8 100644
--- a/src/ov_SC02_017/ov_SC02_017_jr_801588CC.c
+++ b/src/ov_SC02_017/ov_SC02_017_jr_801588CC.c
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c b/src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c
index 09abdc9bc..6ab4d936b 100644
--- a/src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c
+++ b/src/ov_SC02_017/ov_SC02_017_jr_8017AE2C.c
@@ -2618,8 +2618,8 @@ extern s16 D_801EFC92;
 extern s16 D_801EFC9C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801EFC90;
+    s32 pv = param_1;
+    s16 *g = &D_801EFC90;
 
     switch (g[0]) {
     case 0:
@@ -2767,8 +2767,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2913,8 +2913,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2938,7 +2938,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801EF73E;
             v790 = D_801EF740;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801EFCC0 = 1;
             D_801EF6CC = 0x1E;
             D_80126990 = v794;
@@ -3201,8 +3201,8 @@ extern void (*D_801EF714[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801EF714;
@@ -4394,8 +4394,8 @@ void func_8017DD3C(s32 a0) {
     s32 s0;
     s32 s2;
     s32 s3;
-    register s32 v1 __asm__("$3");
-    register s32 v0 __asm__("$2");
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 rnd;
     s32 scale;
 
@@ -4432,7 +4432,7 @@ void func_8017DD3C(s32 a0) {
     sp10[2] = scale;
     ApplyMatrixSV(sp18, sp10, sp10);
     {
-        register s32 c __asm__("$4");
+        register s32 c __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         s32 z;
         c = *(u16 *)(a0 + 0x2);
         *(s32 *)(a0 + 0x10) = sp10[0] << 8;
diff --git a/src/ov_SC02_021/ov_SC02_021.c b/src/ov_SC02_021/ov_SC02_021.c
index 45eab278e..d20c400b2 100644
--- a/src/ov_SC02_021/ov_SC02_021.c
+++ b/src/ov_SC02_021/ov_SC02_021.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_80193830 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_80193830;
+        register volatile s32 *p __asm__("$4") = &D_80193830;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_80193810;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_801919A8[idx], D_801919A9[idx], D_801919AA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_80193810;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC02_021/ov_SC02_021_jr_801588CC.c b/src/ov_SC02_021/ov_SC02_021_jr_801588CC.c
index fc34f2622..307b6b0d8 100644
--- a/src/ov_SC02_021/ov_SC02_021_jr_801588CC.c
+++ b/src/ov_SC02_021/ov_SC02_021_jr_801588CC.c
@@ -1402,7 +1402,6 @@ s32 func_801596F0(s32 param_1) {
         (*(s16 *)&D_800B9AAC) = 0x7fff;
         D_800B9B00 = 0x7fff;
 
-        __asm__ __volatile__("" ::: "memory");
 
         for (p = (u32 *)(base + 0x65A8); p < (u32 *)(base + 0x9DA8); p += 0xe) {
             p[1] |= 0x80000000;
diff --git a/src/ov_SC02_021/ov_SC02_021_jr_8017AE2C.c b/src/ov_SC02_021/ov_SC02_021_jr_8017AE2C.c
index c8b7e0803..1ec3e35d7 100644
--- a/src/ov_SC02_021/ov_SC02_021_jr_8017AE2C.c
+++ b/src/ov_SC02_021/ov_SC02_021_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801937FA;
 extern s16 D_80193804;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801937F8;
+    s32 pv = param_1;
+    s16 *g = &D_801937F8;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_80192CAE;
             v790 = D_80192CB0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_80193828 = 1;
             D_80192C3C = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_80192C84[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_80192C84;
diff --git a/src/ov_SC02_026/ov_SC02_026.c b/src/ov_SC02_026/ov_SC02_026.c
index ea8027720..b0737973b 100644
--- a/src/ov_SC02_026/ov_SC02_026.c
+++ b/src/ov_SC02_026/ov_SC02_026.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801D0250 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801D0250;
+        register volatile s32 *p __asm__("$4") = &D_801D0250;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_801D0230;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_801CEDE8[idx], D_801CEDE9[idx], D_801CEDEA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801D0230;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC02_026/ov_SC02_026_jr_8017AE2C.c b/src/ov_SC02_026/ov_SC02_026_jr_8017AE2C.c
index e78f3afa5..2be689d95 100644
--- a/src/ov_SC02_026/ov_SC02_026_jr_8017AE2C.c
+++ b/src/ov_SC02_026/ov_SC02_026_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801D021A;
 extern s16 D_801D0224;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801D0218;
+    s32 pv = param_1;
+    s16 *g = &D_801D0218;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801D00EE;
             v790 = D_801D00F0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801D0248 = 1;
             D_801D007C = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801D00C4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801D00C4;
@@ -3340,8 +3340,8 @@ void func_8017BF88(s32 a0) {
     s32 s0;
     s32 s2;
     s32 s3;
-    register s32 v1 __asm__("$3");
-    register s32 v0 __asm__("$2");
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 rnd;
     s32 scale;
 
@@ -3378,7 +3378,7 @@ void func_8017BF88(s32 a0) {
     sp10[2] = scale;
     ApplyMatrixSV(sp18, sp10, sp10);
     {
-        register s32 c __asm__("$4");
+        register s32 c __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         s32 z;
         c = *(u16 *)(a0 + 0x2);
         *(s32 *)(a0 + 0x10) = sp10[0] << 8;
diff --git a/src/ov_SC02_027/ov_SC02_027.c b/src/ov_SC02_027/ov_SC02_027.c
index 75f1d24b1..f5dee7521 100644
--- a/src/ov_SC02_027/ov_SC02_027.c
+++ b/src/ov_SC02_027/ov_SC02_027.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801DA9D0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801DA9D0;
+        register volatile s32 *p __asm__("$4") = &D_801DA9D0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_801DA9B0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_801D8B58[idx], D_801D8B59[idx], D_801D8B5A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801DA9B0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC02_027/ov_SC02_027_jr_8017AE2C.c b/src/ov_SC02_027/ov_SC02_027_jr_8017AE2C.c
index dfc48b327..a9d1800ed 100644
--- a/src/ov_SC02_027/ov_SC02_027_jr_8017AE2C.c
+++ b/src/ov_SC02_027/ov_SC02_027_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801DA99A;
 extern s16 D_801DA9A4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801DA998;
+    s32 pv = param_1;
+    s16 *g = &D_801DA998;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801D9E5E;
             v790 = D_801D9E60;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801DA9C8 = 1;
             D_801D9DEC = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801D9E34[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801D9E34;
diff --git a/src/ov_SC02_028/ov_SC02_028.c b/src/ov_SC02_028/ov_SC02_028.c
index 6576e64aa..b9d7c5cc9 100644
--- a/src/ov_SC02_028/ov_SC02_028.c
+++ b/src/ov_SC02_028/ov_SC02_028.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801D35D0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801D35D0;
+        register volatile s32 *p __asm__("$4") = &D_801D35D0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_801D35B0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_801D1AF8[idx], D_801D1AF9[idx], D_801D1AFA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801D35B0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC02_028/ov_SC02_028_jr_8017AE2C.c b/src/ov_SC02_028/ov_SC02_028_jr_8017AE2C.c
index 1d40ad2e2..955240d77 100644
--- a/src/ov_SC02_028/ov_SC02_028_jr_8017AE2C.c
+++ b/src/ov_SC02_028/ov_SC02_028_jr_8017AE2C.c
@@ -2624,8 +2624,8 @@ extern s16 D_801D359A;
 extern s16 D_801D35A4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801D3598;
+    s32 pv = param_1;
+    s16 *g = &D_801D3598;
 
     switch (g[0]) {
     case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801D2DFE;
             v790 = D_801D2E00;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801D35C8 = 1;
             D_801D2D8C = 0x1E;
             D_80126990 = v794;
@@ -3207,8 +3207,8 @@ extern void (*D_801D2DD4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801D2DD4;
diff --git a/src/ov_SC02_031/ov_SC02_031.c b/src/ov_SC02_031/ov_SC02_031.c
index 045c68b52..07c38dd90 100644
--- a/src/ov_SC02_031/ov_SC02_031.c
+++ b/src/ov_SC02_031/ov_SC02_031.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801B7AA0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801B7AA0;
+        register volatile s32 *p __asm__("$4") = &D_801B7AA0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_801B7A80;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_801B6270[idx], D_801B6271[idx], D_801B6272[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801B7A80;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c b/src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c
index 0a40e0702..ad803dab0 100644
--- a/src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c
+++ b/src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c
@@ -2620,8 +2620,8 @@ extern s16 D_801B7A6A;
 extern s16 D_801B7A74;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801B7A68;
+    s32 pv = param_1;
+    s16 *g = &D_801B7A68;
 
     switch (g[0]) {
     case 0:
@@ -2769,8 +2769,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2915,8 +2915,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2940,7 +2940,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801B7576;
             v790 = D_801B7578;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801B7A98 = 1;
             D_801B7504 = 0x1E;
             D_80126990 = v794;
@@ -3203,8 +3203,8 @@ extern void (*D_801B754C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801B754C;
@@ -3340,8 +3340,8 @@ void func_8017BF88(s32 a0) {
     s32 s0;
     s32 s2;
     s32 s3;
-    register s32 v1 __asm__("$3");
-    register s32 v0 __asm__("$2");
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 rnd;
     s32 scale;
 
@@ -3378,7 +3378,7 @@ void func_8017BF88(s32 a0) {
     sp10[2] = scale;
     ApplyMatrixSV(sp18, sp10, sp10);
     {
-        register s32 c __asm__("$4");
+        register s32 c __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         s32 z;
         c = *(u16 *)(a0 + 0x2);
         *(s32 *)(a0 + 0x10) = sp10[0] << 8;
@@ -4661,7 +4661,7 @@ void func_8017E1D4(s32 p) {
     *(s16 *)(o + 0x18) = t1;
     lim1 = **(s16 **)(p + 0x58);
     lv1 = lim1;
-    __asm__("" : "=r"(lv1) : "0"(lv1));
+    __asm__("" : "=r"(lv1) : "0"(lv1));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     if (lim1 < t1) {
         *(s16 *)(o + 0x1C) = lv1;
         *(s16 *)(o + 0x18) = lv1;
@@ -4934,7 +4934,7 @@ void func_8017E73C(s32 a0) {
        permutation. */
     raw = ((s32 (*)(s32))func_8012CBA4)(a0);
     flags = raw;
-    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));
+    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
 
     /* `m` blocks fold_truthop from merging the two bitfield tests below into a single
        `andi $v1,$s1,0xe000` -- the target keeps `& 0x8000` and `& 0x6000` separate. */
@@ -5081,7 +5081,7 @@ void func_8017E73C(s32 a0) {
        copies vanish and everything from .L8017CD18 on drifts by 2 instructions. */
     {
         s32 fire = ret;
-        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));
+        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         if (fire != 0) {
             func_80146A6C(2, (void *)s0, 0, 0, 0, 2, 0);
         }
@@ -5210,7 +5210,7 @@ extern void func_8012B0B4(unsigned int *param_1, int param_2, int param_3);
 
 void func_8017ECEC(s32 a0, s16 a1, s16 a2) {
     u32 buf[4];
-    register s32 hi __asm__("$2");
+    register s32 hi __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 lo;
 
     func_8012B0B4(buf, *(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), a1 << 4);
@@ -5297,7 +5297,7 @@ void func_8017EE3C(s32 a0) {
     u8 out[8];
     Mtx8_8017DE10_8017EE3C m;
     s32 base;
-    register s32 ang __asm__("$2");
+    register s32 ang __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s16 arg;
 
     *(s16 *)(in + 0) = *(u16 *)(a0 + 0x6) + *(u16 *)(a0 + 0x12);
@@ -5962,7 +5962,7 @@ void func_8017F5B4(s32 arg0, s32 arg1, s32 arg2)
                                         if (tmpxy[2].vy > my) my = tmpxy[2].vy;
                                         else if (tmpxy[2].vy < mny) mny = tmpxy[2].vy;
                                         if (my >= -0x6E && mny < 0x6F) {
-                                            __asm__ __volatile__ ("" :: "r" (mny));
+                                            __asm__ __volatile__ ("" :: "r" (mny));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
                                             if (g.sz0 > g.sz1) { za = g.sz0; if (za < g.sz2) za = g.sz2; }
                                             else { za = g.sz1; if (za < g.sz2) za = g.sz2; }
                                             g.opz = za;
@@ -6573,7 +6573,7 @@ void func_80181868(void *a0) {
 
 s32 func_801818A4(void *a0, void *a1) {
     s16 stack_buf[8];
-    register s16 *s0 __asm__("$16") = (s16 *)a1;
+    register s16 *s0 __asm__("$16") = (s16 *)a1;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s16 v0;
     s32 result;
     s32 ret;
@@ -6860,8 +6860,8 @@ extern u8 D_80078EBA;
 extern u8 D_80078EB1;
 
 s32 func_80181EF0(void) {
-    register s32 m __asm__("$4");
-    register s32 c __asm__("$3");
+    register s32 m __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 c __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
     m = D_80078EBA;
     c = 4;
     if (m == c) {
@@ -6909,7 +6909,7 @@ extern s32 D_80188E40[];
 extern void func_8012C1B8(void);
 
 void func_80181FA4(void *a0) {
-    register s32 t __asm__("$2");
+    s32 t;
     s32 s1;
     s32 v0;
 
@@ -6922,7 +6922,6 @@ void func_80181FA4(void *a0) {
     }
     func_8001C214(v0, 0);
     *(s32 *)((s32)a0 + 0x58) = (s32)D_80188E40;
-    __asm__ volatile("");
     t = *(u16 *)((s32)a0 + 0x2);
     *(s16 *)((s32)a0 + 0x5C) = 0x80;
     *(u16 *)((s32)a0 + 0x2) = t + 1;
@@ -7316,7 +7315,7 @@ extern void func_80128EA8(s32 a0, s32 a1, s32 a2);
 extern u8 *func_801290DC(s32 a0, u8 *a1);
 
 s32 func_80182AB4(s32 a0, s16 a1, s32 a2) {
-    register s32 ret __asm__("$2");
+    s32 ret;
     u8 *p;
     s32 s0;
     s32 t;
@@ -7333,7 +7332,7 @@ s32 func_80182AB4(s32 a0, s16 a1, s32 a2) {
     *(u16 *)(p + 0x1A) = a1;
     *(u16 *)(p + 0x18) = a1;
     *(u32 *)(p + 4) = *(u32 *)(p + 4) | 0x50000000;
-    __asm__("" ::: "memory");
+    __asm__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
     *(u32 *)(p + 4) = *(u32 *)(p + 4) | 0x80000000;
     func_80128EA8((s32)p, t, (s32)&D_800D3888);
     ret = s0;
@@ -7606,13 +7605,13 @@ void func_801831B4(void) {
     case 0:
         {
             s32 *p;
-            register s32 val __asm__("$2");
+            register s32 val __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
 
             func_8013C0F8((s32)&D_801A64C8);
             p = &D_801B7930;
             func_8017F53C((s32)p);
             val = D_801B7A84;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801B7948 = 0;
             D_801B794C = 0;
             D_801B7950 = 0;
@@ -8028,7 +8027,7 @@ void func_80183BB0(s32 a0) {
     s32 t;
     s32 m;
     s32 q;
-    register s32 n __asm__("$16");
+    register s32 n __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     unsigned int sp10;
 
     p = *(s32 *)(a0 + 0x20);                       /* owner's actor */
@@ -8787,7 +8786,7 @@ extern s32 func_800132BC(s32 a0, s32 a1);
 s32 func_80184B94(s32 param_1)
 {
     s32 iVar1;
-    register s32 uVar2 __asm__("$2");
+    register s32 uVar2 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
 
     if (*(u16 *) (param_1 + 6) == 0x31 || *(u16 *) (param_1 + 6) == 0x32) {
         return 1;
diff --git a/src/ov_SC02_035/ov_SC02_035.c b/src/ov_SC02_035/ov_SC02_035.c
index a994c59b7..3c6c2c278 100644
--- a/src/ov_SC02_035/ov_SC02_035.c
+++ b/src/ov_SC02_035/ov_SC02_035.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801BE9D8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801BE9D8;
+        register volatile s32 *p __asm__("$4") = &D_801BE9D8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -494,17 +494,17 @@ void func_8012956C(void) {
     extern u8 D_801BE9B8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -514,7 +514,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -555,7 +554,7 @@ void func_8012956C(void) {
                       D_801BD5A0[idx], D_801BD5A1[idx], D_801BD5A2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801BE9B8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC02_035/ov_SC02_035_jr_8017AE2C.c b/src/ov_SC02_035/ov_SC02_035_jr_8017AE2C.c
index 58af57f11..02cbfe8a8 100644
--- a/src/ov_SC02_035/ov_SC02_035_jr_8017AE2C.c
+++ b/src/ov_SC02_035/ov_SC02_035_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801BE9A2;
 extern s16 D_801BE9AC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801BE9A0;
+    s32 pv = param_1;
+    s16 *g = &D_801BE9A0;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801BE8A6;
             v790 = D_801BE8A8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801BE9D0 = 1;
             D_801BE834 = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801BE87C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801BE87C;
diff --git a/src/ov_SC02_039/ov_SC02_039.c b/src/ov_SC02_039/ov_SC02_039.c
index f0b4fd711..1eea7d654 100644
--- a/src/ov_SC02_039/ov_SC02_039.c
+++ b/src/ov_SC02_039/ov_SC02_039.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801A0D90 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801A0D90;
+        register volatile s32 *p __asm__("$4") = &D_801A0D90;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801A0D70;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8019F950[idx], D_8019F951[idx], D_8019F952[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801A0D70;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC02_039/ov_SC02_039_jr_8017AE2C.c b/src/ov_SC02_039/ov_SC02_039_jr_8017AE2C.c
index 5178b230f..4ae00fdab 100644
--- a/src/ov_SC02_039/ov_SC02_039_jr_8017AE2C.c
+++ b/src/ov_SC02_039/ov_SC02_039_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801A0D5A;
 extern s16 D_801A0D64;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801A0D58;
+    s32 pv = param_1;
+    s16 *g = &D_801A0D58;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801A0C56;
             v790 = D_801A0C58;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801A0D88 = 1;
             D_801A0BE4 = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801A0C2C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801A0C2C;
diff --git a/src/ov_SC02_041/ov_SC02_041.c b/src/ov_SC02_041/ov_SC02_041.c
index 7e445bb66..29a89b60f 100644
--- a/src/ov_SC02_041/ov_SC02_041.c
+++ b/src/ov_SC02_041/ov_SC02_041.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801B9668 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801B9668;
+        register volatile s32 *p __asm__("$4") = &D_801B9668;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801B9648;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801B7CC8[idx], D_801B7CC9[idx], D_801B7CCA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801B9648;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC02_041/ov_SC02_041_jr_8017AE2C.c b/src/ov_SC02_041/ov_SC02_041_jr_8017AE2C.c
index 145055a4c..c79551425 100644
--- a/src/ov_SC02_041/ov_SC02_041_jr_8017AE2C.c
+++ b/src/ov_SC02_041/ov_SC02_041_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801B9632;
 extern s16 D_801B963C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801B9630;
+    s32 pv = param_1;
+    s16 *g = &D_801B9630;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801B8FCE;
             v790 = D_801B8FD0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801B9660 = 1;
             D_801B8F5C = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801B8FA4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801B8FA4;
diff --git a/src/ov_SC03_001/ov_SC03_001.c b/src/ov_SC03_001/ov_SC03_001.c
index ee385f7da..91fd79b42 100644
--- a/src/ov_SC03_001/ov_SC03_001.c
+++ b/src/ov_SC03_001/ov_SC03_001.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801EF3F8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801EF3F8;
+        register volatile s32 *p __asm__("$4") = &D_801EF3F8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801EF3C0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801ED348[idx], D_801ED349[idx], D_801ED34A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801EF3C0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c b/src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c
index 3ec5a008f..47036c453 100644
--- a/src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c
+++ b/src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c
@@ -2604,8 +2604,8 @@ extern s16 D_801EF3AA;
 extern s16 D_801EF3B4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801EF3A8;
+    s32 pv = param_1;
+    s16 *g = &D_801EF3A8;
 
     switch (g[0]) {
     case 0:
@@ -2753,8 +2753,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2899,8 +2899,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2924,7 +2924,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801EE64E;
             v790 = D_801EE650;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801EF3F0 = 1;
             D_801EE5DC = 0x1E;
             D_80126990 = v794;
@@ -3187,8 +3187,8 @@ extern void (*D_801EE624[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801EE624;
@@ -3342,10 +3342,10 @@ extern s32 func_8012C750(s32 a0);
  */
 void func_8017BF50(s32 a0)
 {
-    register s32 s3 asm("$19");
-    register s16 *s0 asm("$16");
-    register s32 *s1 asm("$17");
-    register u8 *s2 asm("$18");
+    s32 s3;
+    s16 *s0;
+    register s32 *s1 asm("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    u8 *s2;
     s16 s4;
     Buf8017BF50 buf;
 
@@ -4058,11 +4058,11 @@ extern void func_8012C218(void *a0);
 void func_8017DC50(arg0)
 s32 arg0;
 {
-    register s32 s0 __asm__("$16");
-    register s32 v0 __asm__("$2");
-    register s32 v1 __asm__("$3");
-    register s32 a0 __asm__("$4");
-    register s32 a1 __asm__("$5");
+    register s32 s0 __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 v0;
+    s32 v1;
+    register s32 a0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 a1 __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
 
     s0 = arg0;
     v1 = func_8012CBCC(s0);
@@ -4107,7 +4107,7 @@ typedef struct { s16 vx, vy, vz, pad; } TmpVec_8017DCE4;
 
 void func_8017DCE4(s32 a0)
 {
-    register s32 pv __asm__("$16") = a0;
+    register s32 pv __asm__("$16") = a0;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s32 s1;
     s32 flags;
     TmpVec_8017DCE4 tmp;
@@ -4819,7 +4819,7 @@ void func_8017EB98(s32 param_1)
     MATRIX m1;
     SVECTOR svec_in;
     SVECTOR svec_out;
-    register s32 lim __asm__("$16");
+    s32 lim;
 
     lim = *(u16 *)(param_1 + 0x9C);
 
@@ -4936,7 +4936,7 @@ void func_8017EDB8(void *a0) {
     }
 
     *(s16 *)((u8 *)s0 + 0x2) = (s16)v0;
-    __asm__ __volatile__("");
+    __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     func_80187778((s32 *)s0, (s32)&D_801913D4);
 
     v1p = *(void **)((u8 *)s0 + 0x68);
@@ -5127,7 +5127,7 @@ void func_8017F13C(void) {
 void func_8017F1F0(s32 a0, s32 a1)
 {
     extern s32 D_801EEAEC[];
-    register s32 rv __asm__("$2");
+    register s32 rv __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 x = D_801EEAEC[0];
     s32 y = a1;
     s32 d;
@@ -5158,7 +5158,7 @@ void func_8017F1F0(s32 a0, s32 a1)
     }
     rv = 31;
 done:
-    __asm__("" :: "r"(rv));
+    __asm__("" :: "r"(rv));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
 }
 
 
@@ -5266,7 +5266,7 @@ void func_8017F368(u16 *a0, s32 a1)
     extern u16 D_801915DE[][4];
     extern u16 D_801915E0[][4];
     extern u16 D_801915E2[][4];
-    register s32 zr __asm__("$0");
+    register s32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
 
     u16 pad0[16];   /* dead: locals begin at sp+0x30, va must land at sp+0x50 */
     u16 va[16];     /* sp+0x50 — outer quad, 4 x SVECTOR */
@@ -5282,7 +5282,7 @@ void func_8017F368(u16 *a0, s32 a1)
     s32 type2;
     u16 *p1;
     u16 *p2;
-    register u16 *dst __asm__("$4");
+    register u16 *dst __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
     s32 i;
     u8 *pk;
     s32 j;
@@ -5483,8 +5483,8 @@ extern s32 rand(void);
 void func_8017FA18(s32 param_1) {
     s32 uVar1;
     s32 iVar2;
-    register s32 iVar3 __asm__("$3");
-    register s32 iVar4 __asm__("$16");
+    register s32 iVar3 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 iVar4 __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     u32 uVar3;
 
     uVar1 = *(u16 *)(param_1 + 0x34);
@@ -5551,7 +5551,6 @@ case2:
     return;
 
 case3:
-    __asm__ __volatile__("" ::: "memory");
     iVar3 = *(s32 *)(param_1 + 0xe4);
     iVar3 = iVar3 + *(s32 *)(param_1 + 0xe0);
     *(s32 *)(param_1 + 0xdc) = *(s32 *)(param_1 + 0xdc) + iVar3;
@@ -5902,13 +5901,13 @@ void func_80180224(u8 *arg0)
 
     extern u8 D_800D387C[];
     extern u8 D_800D3888[];
-    register u8 *param_1 __asm__("$16");   /* $s0 */
+    register u8 *param_1 __asm__("$16");   /* $s0 */  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s32 raw;
     u32 buf[6];
 
     param_1 = arg0;
     {
-        register s32 s0 __asm__("$17");   /* $s1 -- scoped: dead after func_80128EA8 */
+        s32 s0;   /* $s1 -- scoped: dead after func_80128EA8 */
         s0 = ((s32 (*)(void))func_8012C194)();
         if (s0 == 0) {
             func_8012CAE4(param_1);
@@ -5937,8 +5936,8 @@ void func_80180224(u8 *arg0)
     *(s32 *)(param_1 + 0x18) = 0;
     func_8012B0B4((unsigned int *)buf, (raw & 0xFF00) >> 4, (raw & 0xFF) << 6);
     {
-        register s32 full __asm__("$2");
-        register s32 low  __asm__("$3");
+        s32 full;
+        s32 low;
         full = *(s32 *)buf;
         low = *(s16 *)buf;
         *(s32 *)(param_1 + 0x48) = 0;
@@ -6386,7 +6385,6 @@ void func_80180BCC(void *arg0) {
     s0 = (s32)arg0;
     *(short *)((char *)arg0 + 0x2) = 3;
     func_8012E88C((s32)arg0);
-    __asm__("" ::: "memory");
     ((void (*)(s32 *, s32))func_8012A828)((s32 *)s0, (s32)&D_801C3B38);
     func_80187750((s32)s0);
     func_80188A78((s32)s0, 0xC, 1);
@@ -6798,7 +6796,7 @@ void func_801813F0(void *arg0) {
 extern s32 func_8018766C(s32 arg0, s32 arg1);
 
 void func_80181458(s32 *arg0) {
-    register s32 *s0 asm("$16") = arg0;
+    s32 *s0 = arg0;
     s32 v1;
     *(s32 *)((u8 *)(*(s32 **)((u8 *)s0 + 0xCC)) + 0xB0) = 1;
     if (func_8018766C(6, 0x12) != 0) {
@@ -6817,7 +6815,7 @@ extern short D_80191B3C;
 extern void func_80187778(s32 *a0, s32 a1);
 
     void func_801814C4(s32 *arg0) {
-        register s32 *s0 asm("$16") = arg0;
+        s32 *s0 = arg0;
         s32 v0, v1;
         *(s32 *)((u8 *)(*(s32 **)((u8 *)s0 + 0xCC)) + 0xB0) = 2;
         v0 = func_8018766C(6, 0x12);
@@ -7440,7 +7438,7 @@ s32 func_80182058(void *a0)
          * Without it gcc's find_cross_jump merges this `move v0,0; j epi`
          * tail with the identical case-2 failure tail -> 58 ins instead of
          * 60, and the case-2 `beq` then loses its delay-slot fill. */
-        __asm__ __volatile__("");
+        __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         return 0;
     }
 
@@ -7668,7 +7666,6 @@ extern void func_80187994(s32 a0, s32 a1, s32 a2, s32 a3);
         s0 = (s32)arg0;
         *(s16*)((char *)arg0 + 0x2) = 2;
         func_8012E88C((s32)arg0);
-        __asm__("" ::: "memory");
         ((void (*)(s32 *, s32))func_8012A828)((s32*)s0, (s32)&D_801C36E8);
         func_80187750((s32)s0);
         *(s16*)((char *)arg0 + 0x34) = 0;
@@ -8242,7 +8239,7 @@ s32 func_80182F3C(s32 a0) {
      * global_alloc and lands in $a0 (costing a `move $v0,$a0` in each of the two
      * delay slots the target leaves as `nop`).  The pin restores the target's
      * $v0 = pointer / $v1 = 0xA2 / $a0 = halfword assignment at zero byte cost. */
-    register s32 v __asm__("$2");
+    register s32 v __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 c;
 
     /* +0x0 is a u16 object id; 0xA2 selects the 0xA4 partner lookup. */
@@ -8280,7 +8277,7 @@ s32 func_80182F3C(s32 a0) {
         /* zero-byte re-tie (cookbook §189-C): without it cse folds
          * `(raw & 0xFF) & 1` back onto the raw call result and emits
          * `andi $v0,$v0,1`; the target reads the masked copy, `andi $v0,$a1,1`. */
-        __asm__("" : "=r"(c) : "0"(c));
+        __asm__("" : "=r"(c) : "0"(c));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         if (c != 0) {
             result = (s32)&D_80191F80;
             if ((c & 1) != 0) {
@@ -8315,7 +8312,7 @@ s32 func_80182F3C(s32 a0) {
         break;
     case 2:
         c = func_800291B4(0xD9) & 0xFF;
-        __asm__("" : "=r"(c) : "0"(c));
+        __asm__("" : "=r"(c) : "0"(c));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         result = (s32)&D_80192190;
         if ((c & 1) != 0) {
             result = (s32)&D_801921E8;
@@ -8327,7 +8324,7 @@ s32 func_80182F3C(s32 a0) {
         break;
     default:
         c = func_800291B4(0xD8) & 0xFF;
-        __asm__("" : "=r"(c) : "0"(c));
+        __asm__("" : "=r"(c) : "0"(c));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         result = (s32)&D_801920C8;
         if ((c & 1) != 0) {
             result = (s32)&D_80192120;
@@ -8540,7 +8537,7 @@ s32 func_801834C0(void *a0)
          * Without it gcc's find_cross_jump merges this `move v0,0; j epi`
          * tail with the identical case-2 failure tail -> 58 ins instead of
          * 60, and the case-2 `beq` then loses its delay-slot fill. */
-        __asm__ __volatile__("");
+        __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         return 0;
     }
 
@@ -9291,7 +9288,7 @@ extern void func_80172710(void);
     s32 func_801843DC(param_1)
 s32 param_1;
 {
-        register s32 obj __asm__("$16") = param_1;
+        register s32 obj __asm__("$16") = param_1;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
         s32 ptr;
         s32 ptr2;
         s32 result;
diff --git a/src/ov_SC03_002/ov_SC03_002.c b/src/ov_SC03_002/ov_SC03_002.c
index d4a031350..f83b61755 100644
--- a/src/ov_SC03_002/ov_SC03_002.c
+++ b/src/ov_SC03_002/ov_SC03_002.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801CBAE0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801CBAE0;
+        register volatile s32 *p __asm__("$4") = &D_801CBAE0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801CBAA8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801CA3C8[idx], D_801CA3C9[idx], D_801CA3CA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801CBAA8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c b/src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c
index 71e6c69d6..11acfc843 100644
--- a/src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c
+++ b/src/ov_SC03_002/ov_SC03_002_jr_8017AE2C.c
@@ -2627,8 +2627,8 @@ extern s16 D_801CBA92;
 extern s16 D_801CBA9C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801CBA90;
+    s32 pv = param_1;
+    s16 *g = &D_801CBA90;
 
     switch (g[0]) {
     case 0:
@@ -2776,8 +2776,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2922,8 +2922,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2947,7 +2947,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801CB6CE;
             v790 = D_801CB6D0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801CBAD8 = 1;
             D_801CB65C = 0x1E;
             D_80126990 = v794;
@@ -3213,8 +3213,8 @@ extern void (*D_801CB6A4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801CB6A4;
@@ -3350,8 +3350,8 @@ void func_8017BF88(s32 a0) {
     s32 s0;
     s32 s2;
     s32 s3;
-    register s32 v1 __asm__("$3");
-    register s32 v0 __asm__("$2");
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 rnd;
     s32 scale;
 
@@ -3388,7 +3388,7 @@ void func_8017BF88(s32 a0) {
     sp10[2] = scale;
     ApplyMatrixSV(sp18, sp10, sp10);
     {
-        register s32 c __asm__("$4");
+        register s32 c __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         s32 z;
         c = *(u16 *)(a0 + 0x2);
         *(s32 *)(a0 + 0x10) = sp10[0] << 8;
@@ -3483,10 +3483,10 @@ void func_8017C234(s32 a0)
 {
 
     extern u8 D_801CB700[];
-    register s32 s3 asm("$19");
-    register s16 *s0 asm("$16");
-    register s32 *s1 asm("$17");
-    register u8 *s2 asm("$18");
+    s32 s3;
+    s16 *s0;
+    register s32 *s1 asm("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    u8 *s2;
     s16 s4;
     Buf8017BF50_8017C234 buf;
 
@@ -3900,7 +3900,7 @@ void func_8017C9BC(s32 a0) {
        permutation. */
     raw = ((s32 (*)(s32))func_8012CBA4)(a0);
     flags = raw;
-    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));
+    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
 
     /* `m` blocks fold_truthop from merging the two bitfield tests below into a single
        `andi $v1,$s1,0xe000` -- the target keeps `& 0x8000` and `& 0x6000` separate. */
@@ -4047,7 +4047,7 @@ void func_8017C9BC(s32 a0) {
        copies vanish and everything from .L8017CD18 on drifts by 2 instructions. */
     {
         s32 fire = ret;
-        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));
+        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         if (fire != 0) {
             func_80146A6C(2, (void *)s0, 0, 0, 0, 2, 0);
         }
diff --git a/src/ov_SC03_003/ov_SC03_003.c b/src/ov_SC03_003/ov_SC03_003.c
index 7f145f9c5..3e089631d 100644
--- a/src/ov_SC03_003/ov_SC03_003.c
+++ b/src/ov_SC03_003/ov_SC03_003.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_8018FB08 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_8018FB08;
+        register volatile s32 *p __asm__("$4") = &D_8018FB08;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_8018FAE8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8018E6D0[idx], D_8018E6D1[idx], D_8018E6D2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_8018FAE8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_003/ov_SC03_003_jr_8017AE2C.c b/src/ov_SC03_003/ov_SC03_003_jr_8017AE2C.c
index 237e9b072..107fa2acc 100644
--- a/src/ov_SC03_003/ov_SC03_003_jr_8017AE2C.c
+++ b/src/ov_SC03_003/ov_SC03_003_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_8018FAD2;
 extern s16 D_8018FADC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_8018FAD0;
+    s32 pv = param_1;
+    s16 *g = &D_8018FAD0;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8018F9D6;
             v790 = D_8018F9D8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_8018FB00 = 1;
             D_8018F964 = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_8018F9AC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8018F9AC;
@@ -3337,8 +3337,8 @@ extern void func_80146E90(s32 *a0, s32 a1);
 
 void func_8017BEF8(s32 param_1)
 {
-    register s32 s0 __asm__("$16");
-    register s32 s1 __asm__("$17");
+    register s32 s0 __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     extern u8 D_80182CB0[];
     s32 v0;
 
diff --git a/src/ov_SC03_006/ov_SC03_006.c b/src/ov_SC03_006/ov_SC03_006.c
index 038921a9f..e866805fd 100644
--- a/src/ov_SC03_006/ov_SC03_006.c
+++ b/src/ov_SC03_006/ov_SC03_006.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801F7848 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801F7848;
+        register volatile s32 *p __asm__("$4") = &D_801F7848;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801F7828;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801F6048[idx], D_801F6049[idx], D_801F604A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801F7828;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c b/src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c
index c08ea28de..91db4f622 100644
--- a/src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c
+++ b/src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c
@@ -2612,8 +2612,8 @@ void func_8017AE2C(s32 param_1) {
     extern s16 D_801F7810;
     extern s16 D_801F7812;
     extern s16 D_801F781C;
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801F7810;
+    s32 pv = param_1;
+    s16 *g = &D_801F7810;
 
     switch (g[0]) {
     case 0:
@@ -2761,8 +2761,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2907,8 +2907,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2932,7 +2932,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801F734E;
             v790 = D_801F7350;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801F7840 = 1;
             D_801F72DC = 0x1E;
             D_80126990 = v794;
@@ -3195,8 +3195,8 @@ extern void (*D_801F7324[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801F7324;
@@ -4551,7 +4551,7 @@ void func_8017E010(s32 a0) {
        permutation. */
     raw = ((s32 (*)(s32))func_8012CBA4)(a0);
     flags = raw;
-    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));
+    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
 
     /* `m` blocks fold_truthop from merging the two bitfield tests below into a single
        `andi $v1,$s1,0xe000` -- the target keeps `& 0x8000` and `& 0x6000` separate. */
@@ -4698,7 +4698,7 @@ void func_8017E010(s32 a0) {
        copies vanish and everything from .L8017CD18 on drifts by 2 instructions. */
     {
         s32 fire = ret;
-        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));
+        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         if (fire != 0) {
             func_80146A6C(2, (void *)s0, 0, 0, 0, 2, 0);
         }
@@ -4826,7 +4826,7 @@ extern void func_8012B0B4(unsigned int *param_1, int param_2, int param_3);
 
 void func_8017E5C0(s32 a0, s16 a1, s16 a2) {
     u32 buf[4];
-    register s32 hi __asm__("$2");
+    register s32 hi __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 lo;
 
     func_8012B0B4(buf, *(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), a1 << 4);
@@ -4913,7 +4913,7 @@ void func_8017E710(s32 a0) {
     u8 out[8];
     Mtx8_8017DE10_8017E710 m;
     s32 base;
-    register s32 ang __asm__("$2");
+    register s32 ang __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s16 arg;
 
     *(s16 *)(in + 0) = *(u16 *)(a0 + 0x6) + *(u16 *)(a0 + 0x12);
@@ -5466,7 +5466,7 @@ void func_8017F2D0(s32 p) {
     *(s16 *)(o + 0x18) = t1;
     lim1 = **(s16 **)(p + 0x58);
     lv1 = lim1;
-    __asm__("" : "=r"(lv1) : "0"(lv1));
+    __asm__("" : "=r"(lv1) : "0"(lv1));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     if (lim1 < t1) {
         *(s16 *)(o + 0x1C) = lv1;
         *(s16 *)(o + 0x18) = lv1;
@@ -5488,9 +5488,9 @@ void func_8017F394(void *a0) {
     extern s32 func_80146E98(s32 a0);
     extern void func_80162CCC(void);
 
-    register s32 s1 __asm__("$17") = (s32)a0;
-    register u16 *s2 __asm__("$18");
-    register u16 *s0 __asm__("$16");
+    s32 s1 = (s32)a0;
+    u16 *s2;
+    u16 *s0;
 
     s2 = *(u16 **)(s1 + 0x4C);
     s0 = *(u16 **)(s1 + 0x20);
@@ -6045,7 +6045,7 @@ void func_8017F510(s32 arg0, s32 arg1, s32 arg2)
                                         if (tmpxy[2].vy > my) my = tmpxy[2].vy;
                                         else if (tmpxy[2].vy < mny) mny = tmpxy[2].vy;
                                         if (my >= -0x6E && mny < 0x6F) {
-                                            __asm__ __volatile__ ("" :: "r" (mny));
+                                            __asm__ __volatile__ ("" :: "r" (mny));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
                                             if (g.sz0 > g.sz1) { za = g.sz0; if (za < g.sz2) za = g.sz2; }
                                             else { za = g.sz1; if (za < g.sz2) za = g.sz2; }
                                             g.opz = za;
@@ -6763,7 +6763,7 @@ extern s32 D_80190834;
 
 void func_80181A14(void *a0)
 {
-    register void *s0 __asm__("$16") = a0;
+    void *s0 = a0;
     s32 v0;
     s32 sp10[3];
 
@@ -7118,7 +7118,7 @@ void func_80182080(void *arg0)
 
     q = &prim;
     vz = 3;
-    __asm__ __volatile__("");
+    __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     p = *(u16 **)a0;
     dx = *(u16 *)(a0 + 0x12);
     dy = *(u16 *)(a0 + 0x14);
@@ -7391,7 +7391,7 @@ extern s32 rand(void);
 void func_801828B0(s32 a0) {
     s32 obj;
     s16 *tbl;
-    register s32 q __asm__("$16");
+    s32 q;
     u32 buf[2];
     s32 v;
 
@@ -7731,10 +7731,10 @@ extern u8 D_801AD31C[];
 
 s32 func_80182F4C(s32 a0, s16 a1)
 {
-    register u8 *base __asm__("$8");
+    u8 *base;
     s16 val;
-    register u16 c0 __asm__("$11");
-    register u16 c1 __asm__("$7");
+    u16 c0;
+    u16 c1;
     u16 outerIdx;
     u16 innerIdx;
     u16 diff;
@@ -7742,7 +7742,7 @@ s32 func_80182F4C(s32 a0, s16 a1)
     u16 temp2;
     u16 idx2;
     u16 *tbl;
-    register s32 p1 __asm__("$4");
+    register s32 p1 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
     s32 p2;
     s32 p3;
     u16 dx;
@@ -7851,7 +7851,7 @@ extern u8 D_80190F78[];
 extern s32 D_80190D94;
 
 void func_801831A8(s32 param_1) {
-    register s32 pv __asm__("$17") = param_1;
+    s32 pv = param_1;
 
     switch (*(u16 *)(pv + 0x34)) {
     case 0:
@@ -8215,7 +8215,7 @@ extern s32 func_80143970(s32 a0);
 extern s32 D_801BFE40;
 
 void func_80183A70(s32 a0) {
-    register s32 mask __asm__("$4");
+    register s32 mask __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
     s32 p;
 
     if (((s32 (*)(s32))func_8012BD14)(a0) <= 0x18FFF) {
@@ -8349,8 +8349,8 @@ extern s32 func_80184300(s32 a0);
 void func_80183D18(void *a0) {
     s32 s0 = (s32)a0;
     s32 s1;
-    register s32 v1_addr asm("$3");
-    register u16 v0_val asm("$2");
+    s32 v1_addr;
+    register u16 v0_val asm("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
 
     // Load pointer from offset 0x20 and modify value at offset 0x12
     v1_addr = *(s32 *)(s0 + 0x20);
@@ -8533,9 +8533,9 @@ extern void func_801846D0(void *a0);
 
 void func_80184034(s32 a0) {
     if (*(s32 *)(a0 + 0x1C) < 0xC) {
-        register s32 mask __asm__("a0");
-        register s32 ptr __asm__("v0");
-        register s32 val __asm__("v1");
+        s32 mask;
+        s32 ptr;
+        s32 val;
 
         mask = 0x80000000;
         ptr = *(s32 *)(a0 + 0x20);
@@ -8779,9 +8779,9 @@ extern void func_800484EC(s32 a0, s32 a1, s32 a2);
 void func_8018450C(s32 a0, s32 a1) {
     typedef struct { s32 m[8]; } Mtx8_8017DE10_8017E710;
     extern Mtx8_8017DE10_8017E710 D_800AE620;
-    register s32 obj __asm__("$18");
-    register s32 cur __asm__("$17");
-    register s32 r2  __asm__("$2");
+    s32 obj;
+    s32 cur;
+    s32 r2;
     s32 flag;
     u8 *base;
     s32 vec[3];
@@ -8875,8 +8875,8 @@ void func_801846D0(void *a0) {
         }
 
         {
-            register u16 t88 __asm__("$2") = *(u16 *)(s0 + 0x88);
-            register u16 t8A __asm__("$3") = *(u16 *)(s0 + 0x8A);
+            register u16 t88 __asm__("$2") = *(u16 *)(s0 + 0x88);  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
+            register u16 t8A __asm__("$3") = *(u16 *)(s0 + 0x8A);  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             *(s16 *)(s0 + 0xDE) = 0;
             *(s16 *)(s0 + 0xAA) = 0;
             *(u16 *)(s0 + 0xE) = *(u16 *)(s0 + 0x8C);
@@ -9001,7 +9001,7 @@ void func_801849A0(s32 a0)
 {
     s32 t;
     s32 u;
-    register s32 p __asm__("$3");
+    register s32 p __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     if (*(s16 *)(a0 + 0x102) == 0) {
         if (func_8012E778(a0, 0x64008C) == 0) {
@@ -9160,13 +9160,13 @@ extern void func_8012B178(s32 a0, s32 a1);
 
 void func_80184CE8(s32 a0)
 {
-    register s32 s0 __asm__("$16");
-    register s32 v1 __asm__("$3");
+    s32 s0;
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
     s32 v0;
     u16 *p;
 
     s0 = a0;
-    __asm__ __volatile__("");
+    __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     v0 = func_8012B8E4(s0, 8);
     p = *(u16 **)(s0 + 0x20);
     p[9] = p[9] + (u16)v0;
@@ -9338,7 +9338,7 @@ extern u8 D_800D3918[];
 extern void func_8012B178(s32 a0, s32 a1);
 
 void func_80185030(s32 s0) {
-    register s32 v0 __asm__("$2");
+    s32 v0;
     s32 v1;
 
     v0 = func_8012B8E4(s0, 8);
@@ -9473,7 +9473,6 @@ void func_801852C8(void *a0)
 
     a1 = *(s32 *)((s32)a0 + 0x20);
     v1 = *(u16 *)(a1 + 0x2C);
-    __asm__ __volatile__("" : : "r"(v1));
     if (v1 & 0x10) {
         *(u16 *)(a1 + 0x2C) = v1 & 0xFFEF;
         b = *(s32 *)((s32)a0 + 0x20);
@@ -9720,11 +9719,11 @@ extern s32 func_8012C658(s32 arg0, s32 arg1, s32 arg2);
 extern s32 rand(void);
 
 void func_801856A0(s32 a0) {
-    register s32 obj __asm__("$19");
+    s32 obj;
     s32 i;
-    register s32 t4 __asm__("$20");
-    register s32 tmp __asm__("$16");
-    register s32 q1 __asm__("$7");
+    s32 t4;
+    register s32 tmp __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 q1;
     unsigned int *pbuf;
     s32 r1, r2, r4;
     s32 ang1, dist;
@@ -9770,7 +9769,7 @@ void func_801856A0(s32 a0) {
             pos[1] = t1;
 
             {
-                register s32 hi4 __asm__("$3");
+                s32 hi4;
                 hi4 = t4 >> 16;
                 pos[2] = *(u16 *)(obj + 0xE) + hi4;
             }
@@ -9856,11 +9855,11 @@ extern u8 *func_801290DC(s32 a0, u8 *a1);
 extern void func_8001CD50(s32 a0, s32 a1);
 
 u8 * func_8018594C(s32 a0, s32 a1, s32 a2) {
-    register s32 s0 __asm__("$16") = a2;
-    register s32 s2 __asm__("$18") = a0;
+    s32 s0 = a2;
+    register s32 s2 __asm__("$18") = a0;  // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B tus7)
     u8 *s1;
     u8 *ret;
-    register s32 v1 __asm__("$3");
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     s1 = func_801290DC(0x17, (u8 *)a1);
 
@@ -9872,7 +9871,7 @@ u8 * func_8018594C(s32 a0, s32 a1, s32 a2) {
     func_8001CD50(s0, (s32)(&((u8 *)D_801C5988)[a2 << 6]));
 
     
-    __asm__ volatile("move %0, %1" : "=r"(ret) : "r"(s1));
+    __asm__ volatile("move %0, %1" : "=r"(ret) : "r"(s1));  // !FAKE: instruction move — NEEDED DIFFERS (P36 rung B tus7)
 
     v1 = 0xC00;
     *(u16 *)((char *)s0 + 0x1E) = v1;
@@ -10068,11 +10067,11 @@ s32 func_80185BD4(s32 a0, s32 a1) {
                 func_8012B0B4((unsigned int *)buf, ang, 0x41);
 
                 {
-                    register s32 t1 __asm__("$2") = *(s32 *)(p + 4);
-                    register s32 v1 __asm__("$3") = buf[0];
-                    register s32 t2 __asm__("$2");
-                    register s32 t3 __asm__("$4");
-                    register s32 t4 __asm__("$2");
+                    s32 t1 = *(s32 *)(p + 4);
+                    s32 v1 = buf[0];
+                    register s32 t2 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
+                    s32 t3;
+                    register s32 t4 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
 
                     *(s32 *)(a0 + 4) = t1;
 
@@ -10563,10 +10562,9 @@ void func_80186624(void *a0)
 {
     s32 buf[8];
     u16 out[4];
-    register s32 zr __asm__("$0");
-    register s32 v0 __asm__("$4");
+    s32 v0;
 
-    v0 = ((s32 (*)(void))func_8012C1B8)() + zr;
+    v0 = ((s32 (*)(void))func_8012C1B8)() + 0;
     *(s32 *)((s32)a0 + 0x20) = v0;
     if (v0 == 0) {
         func_8012CAE4(a0);
@@ -10754,7 +10752,7 @@ void func_801869CC(void *a0)
     s32            *zb;
     SVec8_8018E8A0_801869CC *src;
     SVec8_8018E8A0_801869CC *dst;
-    register s32 d __asm__("$4");
+    register s32 d __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
     s32 i, j, k, base, ang, t;
     u32 col;
 
@@ -10773,7 +10771,7 @@ void func_801869CC(void *a0)
     p = (s32 *)((s32)a0 + 0xCC);
     for (i = 0, k = 0; i < ((Cnt_8018E8A0_801869CC *)a0)->f[0x84]; i++, k++, p += 3) {
         zb = (s32 *)((s32)a0 + 0xD4);
-        { register s32 c1 __asm__("$2"); register s32 c2 __asm__("$3");
+        { register s32 c1 __asm__("$2"); register s32 c2 __asm__("$3");  // !FAKE: pin $2 — NEEDED DIFFERS; pin $3 — NEEDED DIFFERS (P36 rung B tus7)
           c1 = *(s32 *)((s32)a0 + 0x1C); c2 = i * 4; d = c1 - c2; }
         if (d > 0x40) {
             if (i == 4) {
@@ -11429,7 +11427,7 @@ void func_801877D8(void *a0) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_801C9F04[];
-    register u8 *s0 __asm__("$16") = (u8 *)a0;
+    register u8 *s0 __asm__("$16") = (u8 *)a0;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s32 v1;
 
     *(s16 *)(s0 + 0x2) = 4;
@@ -11489,7 +11487,7 @@ void func_801879C4(void *a0) {
     extern s32 D_801F7730;
     extern s32 D_801C9F04[];
     extern s32 D_801CAE68;
-    register u8 *s0 __asm__("$16") = (u8 *)a0;
+    register u8 *s0 __asm__("$16") = (u8 *)a0;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s32 v0;
     s32 *ptr;
 
@@ -12248,12 +12246,11 @@ extern void func_8012B23C(s32 a0);
 extern void func_80132288(s32 *param_1, s32 *param_2, s32 param_3);
 
 void func_80188978(s32 a0, s32 a1, s32 a2) {
-    register s32 s1 __asm__("$17") = a0;
-    register s32 s0 __asm__("$16");
-    register s32 s2 __asm__("$18") = a2;
+    s32 s1 = a0;
+    s32 s0;
+    s32 s2 = a2;
     s32 p;
 
-    __asm__("" :: "r"(s1));
     s0 = a1;
 
     func_8012B23C(s1);
@@ -12329,10 +12326,10 @@ void func_80188AF4(s32 a0, s32 a1) {
     pos[2] = *(s32 *)(a0 + 0xC) + out.vz;
 
     {
-        register u16 rix __asm__("$2");
-        register u16 roy __asm__("$3");
-        register u16 roz __asm__("$7");
-        register u16 riz __asm__("$8");
+        u16 rix;
+        u16 roy;
+        u16 roz;
+        u16 riz;
 
         rix = *(u16 *)(a0 + 0x3A);
         roy = *((u16 *)&pos[1] + 1);
@@ -12577,7 +12574,7 @@ extern void func_8012B178(s32 a0, s32 a1);
 extern s32 func_80189E88(s32 a0);
 
 void func_801890C4(s32 s0) {
-    register s32 v0 __asm__("$2");
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 v1;
 
     v0 = func_8012BDBC(s0, 0x400);
@@ -12854,8 +12851,8 @@ void func_8018960C(s32 a0) {
 
 
 void func_801896EC(s32 param_1) {
-    register s32 self __asm__("a1");
-    register s32 mask __asm__("a0");
+    register s32 self __asm__("a1");  // !FAKE: pin a1 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 mask __asm__("a0");  // !FAKE: pin a0 — NEEDED DIFFERS (P36 rung B tus7)
     s32 t;
     s32 q;
 
@@ -12879,7 +12876,7 @@ void func_801896EC(s32 param_1) {
         p = *(s32 *)(self + 0x20);
         g = *(s32 *)(self + 0xDC);
         p = *(u16 *)(p + 0x18);
-        __asm__ __volatile__("" : : "r"(p), "r"(p), "r"(p));
+        __asm__ __volatile__("" : : "r"(p), "r"(p), "r"(p));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
         g |= 0x80;
         *(s32 *)(self + 0xDC) = g;
         *(u16 *)(self + 0x104) = p;
@@ -13039,9 +13036,9 @@ extern void func_8018A05C(s32 a0);
 
 void func_8018993C(s32 a0) {
     if (*(s32 *)(a0 + 0x1C) < 0x11) {
-        register s32 mask __asm__("a0");
-        register s32 ptr __asm__("v0");
-        register s32 val __asm__("v1");
+        s32 mask;
+        s32 ptr;
+        s32 val;
 
         mask = 0x80000000;
         ptr = *(s32 *)(a0 + 0x20);
@@ -13110,8 +13107,8 @@ extern void func_8018A05C(s32 a0);
 
 void func_80189A84(s32 a0)
 {
-    register s32 v0 __asm__("$2");
-    register s32 v1 __asm__("$3");
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     v0 = *(s32 *)(a0 + 0xDC);
     if ((v0 & 0x2) != 0) {
@@ -13148,7 +13145,7 @@ extern void func_8002D4C8(s32 a0, s32 a1);
 
 void func_80189B3C(s32 a0) {
     s32 i;
-    register s32 q __asm__("$16");
+    s32 q;
     s32 r3;
     u32 buf[2];
     s32 v;
@@ -13509,7 +13506,7 @@ void func_8018A3D4(s32 param_1) {
         *(s16 *)(param_1 + 0xFC) =
             func_8012B744((void *)(param_1 + 0x4), (void *)(param_1 + 0x88));
     } else {
-        register s32 t __asm__("$2") = rand() & 0x3FF;
+        s32 t = rand() & 0x3FF;
         s32 v1 = t - 0x200;
 
         if (v1 < 0) {
@@ -13615,7 +13612,7 @@ extern void func_8002AC00(s32 arg0);
 extern void func_8012C098(void);
 
 void func_8018A624(s32 arg0) {
-    register u8 val __asm__("$3");
+    u8 val;
 
     /* Check field at +0x100 */
     if (((s16 *)arg0)[0x80] == 0) {
@@ -13730,7 +13727,7 @@ s32 func_80188250_body(s32 a0) {
                 *(u16 *)(a0 + 6) = v18[0];
                 *(u16 *)(a0 + 0xA) = v18[1];
                 *(u16 *)(a0 + 0xE) = v18[2];
-                __asm__ __volatile__("" ::: "memory");   /* zero-byte cross-jump barrier (§5a) */
+                __asm__ __volatile__("" ::: "memory");   /* zero-byte cross-jump barrier (§5a) */  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
                 return 1;
             }
         }
@@ -13751,7 +13748,7 @@ extern s32 D_801D7F38[];
 
 void func_8018A86C(s32 arg0) {
     void (*handler)(s32);
-    register u8 val __asm__("$3");
+    u8 val;
 
     /* Load dispatch function from table indexed by field at +0x2 */
     handler = (void (*)(s32))D_801D7F38[((u16 *)arg0)[1]];
@@ -14100,7 +14097,7 @@ extern s32 func_8012BEE8(s32 a0);
 extern void func_80131E00();
 
 void func_8018AF88(s32 param_1) {
-    register s32 a __asm__("$4");
+    register s32 a __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
     s32 p;
     s32 q;
     s32 x;
@@ -14393,8 +14390,8 @@ void func_8018B4A4(s32 arg0) {
 extern s32 func_8012BCCC(s32 a0);
 
 void func_8018B5E0(s32 a0) {
-    register s32 result __asm__("$2");
-    register s32 threshold __asm__("$3");
+    s32 result;
+    s32 threshold;
 
     if (*(s16 *)(a0 + 0x70) & 0x8000) {
         result = func_8012BCCC(a0);
@@ -14465,7 +14462,7 @@ extern void func_8012A828(s32 a0, void *a1);
 extern void func_8012CAE4(void *a0);
 
 void func_8018B740(s32 s0) {
-    register s32 v1 __asm__("$3");
+    s32 v1;
     s32 v0;
     s32 a1v;
 
diff --git a/src/ov_SC03_007/ov_SC03_007.c b/src/ov_SC03_007/ov_SC03_007.c
index acb06fe90..515cc71f7 100644
--- a/src/ov_SC03_007/ov_SC03_007.c
+++ b/src/ov_SC03_007/ov_SC03_007.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801EB258 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801EB258;
+        register volatile s32 *p __asm__("$4") = &D_801EB258;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801EB238;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801E89A0[idx], D_801E89A1[idx], D_801E89A2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801EB238;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c b/src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c
index 15be3ae28..582f61435 100644
--- a/src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c
+++ b/src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c
@@ -2626,8 +2626,8 @@ extern s16 D_801EB222;
 extern s16 D_801EB22C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801EB220;
+    s32 pv = param_1;
+    s16 *g = &D_801EB220;
 
     switch (g[0]) {
     case 0:
@@ -2772,8 +2772,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2918,8 +2918,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2943,7 +2943,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801E9CA6;
             v790 = D_801E9CA8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801EB250 = 1;
             D_801E9C34 = 0x1E;
             D_80126990 = v794;
@@ -3203,8 +3203,8 @@ extern void (*D_801E9C7C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801E9C7C;
@@ -4322,8 +4322,8 @@ extern s16 D_801274EC;
 
 void func_8017DE40(s32 param_1)
 {
-    register s32 p1 __asm__("$17");
-    register s16 *p0 __asm__("$16");
+    s32 p1;
+    s16 *p0;
     MTX_8017DE40 m1;
     SV4_8017DE40 svec_in;
     s16 vec[3];
@@ -4533,8 +4533,8 @@ extern s32 func_8017EA04(s32);
 
 void func_8017E3C0(void *a0) {
     s32 s0 = (s32)a0;
-    register s32 v1_addr asm("$3");
-    register u16 v0_val asm("$2");
+    s32 v1_addr;
+    u16 v0_val;
 
     v1_addr = *(s32 *)(s0 + 0x20);
     v0_val = *(u16 *)(v1_addr + 0x12);
@@ -4807,7 +4807,7 @@ typedef struct { s16 vx, vy, vz, pad; } SVEC_E83C;
 
 s32 func_8017E83C(s32 arg0) {
     extern u8 D_801202A0[];
-    register s32 ret __asm__("$23");
+    register s32 ret __asm__("$23");  // !FAKE: pin $23 — NEEDED DIFFERS (P36 rung B tus7)
     s32 v;
     u8 *p;
     s32 i;
@@ -5006,9 +5006,9 @@ void func_8017EC90(a0, a1)
 s32 a0;
 s32 a1;
 {
-    register s32 a0v __asm__("$4");
-    register s32 a1v __asm__("$5");
-    register s32 p __asm__("$18");
+    register s32 a0v __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 a1v __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 p __asm__("$18");  // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B tus7)
     s32 vec[3];
     MTX_8017EA48 m;
     s32 d;
@@ -5324,12 +5324,12 @@ extern void func_80180388(s32);
 extern u8 D_800D3918[];
 
 void func_8017F37C(s32 a0) {
-    register s32 s0 __asm__("$16");
+    register s32 s0 __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s32 v0;
     s32 v1;
 
     s0 = a0;
-    __asm__ __volatile__("");
+    __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     v0 = func_8018033C(s0, 8);
     v1 = *(s32 *)(s0 + 0x20);
     *(u16 *)(v1 + 0x12) = *(u16 *)(v1 + 0x12) + v0;
@@ -5476,7 +5476,7 @@ extern void func_80180388(s32);
 extern u8 D_800D3918[];
 
 void func_8017F6A8(s32 param_1) {
-    register s32 v0 __asm__("$2");
+    s32 v0;
     s32 v1;
 
     v0 = func_8018033C(param_1, 8);
@@ -5526,12 +5526,11 @@ extern void func_8017FC6C(s32 a0);
 extern s32 func_8012BEE8(s32 a0);
 
 void func_8017F794(s32 a0) {
-    register s32 s0 __asm__("$16");
+    register s32 s0 __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s32 v0;
     s32 v1;
 
     s0 = a0;
-    __asm__ __volatile__("");
     if (*(s32 *)(s0 + 0x1C) > 0x15) {
         v0 = func_8018033C(s0, 8);
         v1 = *(s32 *)(s0 + 0x20);
@@ -5800,11 +5799,11 @@ extern u8 *func_801290DC(s32 a0, u8 *a1);
 extern void func_8001CD50(s32 a0, s32 a1);
 
 u8 * func_8017FD6C(s32 a0, s32 a1, s32 a2) {
-    register s32 s0 __asm__("$16") = a2;
-    register s32 s2 __asm__("$18") = a0;
+    s32 s0 = a2;
+    register s32 s2 __asm__("$18") = a0;  // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B tus7)
     u8 *s1;
     u8 *ret;
-    register s32 v1 __asm__("$3");
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     s1 = func_801290DC(0x1d, (u8 *)a1);
 
@@ -5816,7 +5815,7 @@ u8 * func_8017FD6C(s32 a0, s32 a1, s32 a2) {
     func_8001CD50(s0, (s32)(&((u8 *)D_8018BD88)[a2 << 6]));
 
     
-    __asm__ volatile("move %0, %1" : "=r"(ret) : "r"(s1));
+    __asm__ volatile("move %0, %1" : "=r"(ret) : "r"(s1));  // !FAKE: instruction move — NEEDED DIFFERS (P36 rung B tus7)
 
     v1 = 0xC00;
     *(u16 *)((char *)s0 + 0x1E) = v1;
@@ -6206,7 +6205,7 @@ extern u8 D_8018BF60[];
 
 void func_80180598(void *a0)
 {
-    register s32 s0 __asm__("$16") = (s32)a0;
+    register s32 s0 __asm__("$16") = (s32)a0;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s16 v1;
     u16 v0;
     s16 vec[3];
@@ -6306,7 +6305,7 @@ s32 func_801806B8(s32 a0, s32 a1, s32 a2, s32 a3)
             func_8012F568(1, 0x5001, 0, 0, (s32)pointA, (s32)diff);
 
             {
-                register s32 node __asm__("$2");
+                register s32 node __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
                 node = *(s32 *)(s0 + 0x20);
                 node = *(u16 *)(node + 0x12);
                 D_80126B9A = node;
@@ -6322,7 +6321,7 @@ s32 func_801806B8(s32 a0, s32 a1, s32 a2, s32 a3)
             *(u16 *)(D_801270C8[0] + 0x5C) |= 1;
             *(s16 *)(D_801270C8[0] + 0x5E) = 0x1E;
             {
-                register s32 node __asm__("$2");
+                register s32 node __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
                 node = *(s32 *)(s0 + 0x20);
                 node = *(u16 *)(node + 0x12);
                 *(u16 *)(D_801270C8[0] + 0x62) = node;
@@ -7071,9 +7070,8 @@ void func_8018178C(s32 a0)
     case 2:
         if (func_8012CBCC(a0) != 0) {
             *(s16 *)(a0 + 0x98) = 1;
-            __asm__ __volatile__("" ::: "memory");
             {
-                register s32 t __asm__("$2");
+                register s32 t __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
                 t = *(u16 *)(a0 + 0x76) - 0xA;
                 *(u16 *)(a0 + 0x5C) = 0x8810;
                 *(s16 *)(a0 + 0x76) = t;
diff --git a/src/ov_SC03_010/ov_SC03_010.c b/src/ov_SC03_010/ov_SC03_010.c
index 7ae9c5051..b18f20c58 100644
--- a/src/ov_SC03_010/ov_SC03_010.c
+++ b/src/ov_SC03_010/ov_SC03_010.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801A0160 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801A0160;
+        register volatile s32 *p __asm__("$4") = &D_801A0160;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801A0140;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8019EC00[idx], D_8019EC01[idx], D_8019EC02[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801A0140;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_010/ov_SC03_010_jr_8017AE2C.c b/src/ov_SC03_010/ov_SC03_010_jr_8017AE2C.c
index 8bb63938e..d6cf17938 100644
--- a/src/ov_SC03_010/ov_SC03_010_jr_8017AE2C.c
+++ b/src/ov_SC03_010/ov_SC03_010_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801A012A;
 extern s16 D_801A0134;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801A0128;
+    s32 pv = param_1;
+    s16 *g = &D_801A0128;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019FF06;
             v790 = D_8019FF08;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801A0158 = 1;
             D_8019FE94 = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_8019FEDC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019FEDC;
diff --git a/src/ov_SC03_011/ov_SC03_011.c b/src/ov_SC03_011/ov_SC03_011.c
index 2c07a967f..1159ed3fb 100644
--- a/src/ov_SC03_011/ov_SC03_011.c
+++ b/src/ov_SC03_011/ov_SC03_011.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801A2390 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801A2390;
+        register volatile s32 *p __asm__("$4") = &D_801A2390;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801A2370;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801A0E98[idx], D_801A0E99[idx], D_801A0E9A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801A2370;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_011/ov_SC03_011_jr_8017AE2C.c b/src/ov_SC03_011/ov_SC03_011_jr_8017AE2C.c
index 66ccde45c..d0476ab25 100644
--- a/src/ov_SC03_011/ov_SC03_011_jr_8017AE2C.c
+++ b/src/ov_SC03_011/ov_SC03_011_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801A235A;
 extern s16 D_801A2364;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801A2358;
+    s32 pv = param_1;
+    s16 *g = &D_801A2358;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801A219E;
             v790 = D_801A21A0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801A2388 = 1;
             D_801A212C = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801A2174[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801A2174;
diff --git a/src/ov_SC03_012/ov_SC03_012.c b/src/ov_SC03_012/ov_SC03_012.c
index bbd82283e..fc6edb400 100644
--- a/src/ov_SC03_012/ov_SC03_012.c
+++ b/src/ov_SC03_012/ov_SC03_012.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801950F0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801950F0;
+        register volatile s32 *p __asm__("$4") = &D_801950F0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801950D0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_80193CB8[idx], D_80193CB9[idx], D_80193CBA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801950D0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_012/ov_SC03_012_jr_8017AE2C.c b/src/ov_SC03_012/ov_SC03_012_jr_8017AE2C.c
index 083f2086f..b76a69023 100644
--- a/src/ov_SC03_012/ov_SC03_012_jr_8017AE2C.c
+++ b/src/ov_SC03_012/ov_SC03_012_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801950BA;
 extern s16 D_801950C4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801950B8;
+    s32 pv = param_1;
+    s16 *g = &D_801950B8;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_80194FBE;
             v790 = D_80194FC0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801950E8 = 1;
             D_80194F4C = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_80194F94[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_80194F94;
diff --git a/src/ov_SC03_013/ov_SC03_013.c b/src/ov_SC03_013/ov_SC03_013.c
index 61473911d..e1172b2f4 100644
--- a/src/ov_SC03_013/ov_SC03_013.c
+++ b/src/ov_SC03_013/ov_SC03_013.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801AD4E8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801AD4E8;
+        register volatile s32 *p __asm__("$4") = &D_801AD4E8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801AD4C8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801ABF88[idx], D_801ABF89[idx], D_801ABF8A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801AD4C8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_013/ov_SC03_013_jr_8017AE2C.c b/src/ov_SC03_013/ov_SC03_013_jr_8017AE2C.c
index b729845dc..3ddbe8ee9 100644
--- a/src/ov_SC03_013/ov_SC03_013_jr_8017AE2C.c
+++ b/src/ov_SC03_013/ov_SC03_013_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801AD4B2;
 extern s16 D_801AD4BC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801AD4B0;
+    s32 pv = param_1;
+    s16 *g = &D_801AD4B0;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801AD28E;
             v790 = D_801AD290;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801AD4E0 = 1;
             D_801AD21C = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801AD264[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801AD264;
diff --git a/src/ov_SC03_014/ov_SC03_014.c b/src/ov_SC03_014/ov_SC03_014.c
index 25fa007de..90e10f55b 100644
--- a/src/ov_SC03_014/ov_SC03_014.c
+++ b/src/ov_SC03_014/ov_SC03_014.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801EAFD0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801EAFD0;
+        register volatile s32 *p __asm__("$4") = &D_801EAFD0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801EAFB0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801E9508[idx], D_801E9509[idx], D_801E950A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801EAFB0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c b/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c
index 487be84a5..8e5a579bf 100644
--- a/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c
+++ b/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c
@@ -2622,8 +2622,8 @@ extern s16 D_801EAF9A;
 extern s16 D_801EAFA4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801EAF98;
+    s32 pv = param_1;
+    s16 *g = &D_801EAF98;
 
     switch (g[0]) {
     case 0:
@@ -2768,8 +2768,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2914,8 +2914,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2939,7 +2939,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801EA80E;
             v790 = D_801EA810;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801EAFC8 = 1;
             D_801EA79C = 0x1E;
             D_80126990 = v794;
@@ -3202,8 +3202,8 @@ extern void (*D_801EA7E4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801EA7E4;
@@ -4081,8 +4081,8 @@ extern u16 D_8018EFFC[][2];
 void func_8017D1E0(void *a0)
 {
     s16 n;
-    register s32 tmp __asm__("$4");
-    register s32 t __asm__("$17");
+    register s32 tmp __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 t __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     s16 v;
     SVECTOR_8017C290 vec1;
     SVECTOR_8017C290 vec2;
@@ -4457,11 +4457,11 @@ void func_8017D900(s32 arg0) {
     u8 *p = &D_801EA880;
 
     D_801EA881 = D_801EA882 = *p = func_80012F74(*p, 0, 10, 1);
-    __asm__("");
+    __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     *(Quad_801EA880 *)&D_801EA884 = *(Quad_801EA880 *)p;
     *(Quad_801EA880 *)&D_801EA888 = *(Quad_801EA880 *)p;
     *(Quad_801EA880 *)&D_801EA88C = *(Quad_801EA880 *)p;
-    __asm__("");
+    __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     if (*p == 0) {
         ((void (*)(s32))func_80146C3C)(arg0);
     }
@@ -4824,7 +4824,7 @@ void func_8017DF84(s32 arg0, s32 arg1, s32 arg2, s32 arg3)
 
             gte_stsxy(&sxy[3]);
             gte_ldv3c(&box[4]);
-            __asm__ volatile ("");   /* §47 live-length slider (carried from the twin) */
+            __asm__ volatile ("");   /* §47 live-length slider (carried from the twin) */  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             gte_rtpt();
             gte_stsxy3(&sxy[4], &sxy[5], &sxy[6]);
             gte_ldv0(&box[7]);
diff --git a/src/ov_SC03_023/ov_SC03_023.c b/src/ov_SC03_023/ov_SC03_023.c
index a347a06a1..870734eb2 100644
--- a/src/ov_SC03_023/ov_SC03_023.c
+++ b/src/ov_SC03_023/ov_SC03_023.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_80198D18 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_80198D18;
+        register volatile s32 *p __asm__("$4") = &D_80198D18;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_80198CF8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801978E0[idx], D_801978E1[idx], D_801978E2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_80198CF8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c b/src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c
index d00246826..65589df9d 100644
--- a/src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c
+++ b/src/ov_SC03_023/ov_SC03_023_jr_8017AE2C.c
@@ -2620,8 +2620,8 @@ extern s16 D_80198CE2;
 extern s16 D_80198CEC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_80198CE0;
+    s32 pv = param_1;
+    s16 *g = &D_80198CE0;
 
     switch (g[0]) {
     case 0:
@@ -2766,8 +2766,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2912,8 +2912,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2937,7 +2937,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_80198BE6;
             v790 = D_80198BE8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_80198D10 = 1;
             D_80198B74 = 0x1E;
             D_80126990 = v794;
@@ -3197,8 +3197,8 @@ extern void (*D_80198BBC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_80198BBC;
@@ -4413,7 +4413,7 @@ extern u8 D_80182C24;
 
 void func_8017E230(void *a0)
 {
-    register void *s0 __asm__("$16");
+    register void *s0 __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
 
     s0 = a0;
     if (--*(s16 *)((s32)s0 + 0x70) == 0) {
@@ -4549,7 +4549,7 @@ extern s32 D_80126B64;
 extern s32 D_801270C8;
 
 void func_8017E614(s32 a0) {
-    register s32 ok __asm__("$2");
+    register s32 ok __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
 
     if (func_8012C354(a0, (s32)&D_80182A84) == 0) {
         return;
@@ -4642,8 +4642,8 @@ extern u8 D_80193390[];
 extern u8 D_801933C0[];
 
 void func_8017E834(s32 a0) {
-    register s32 s0 __asm__("$16");
-    register s32 v1 __asm__("$3");
+    s32 s0;
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
     s32 ret;
     u8 flag;
 
@@ -4862,7 +4862,7 @@ extern s32 rand(void);
 
 void func_8017EDAC(void *a0)
 {
-    register void *s0 __asm__("$16");
+    void *s0;
     s32 v0;
 
     s0 = a0;
diff --git a/src/ov_SC03_024/ov_SC03_024.c b/src/ov_SC03_024/ov_SC03_024.c
index 7362dc916..3b96f1ccc 100644
--- a/src/ov_SC03_024/ov_SC03_024.c
+++ b/src/ov_SC03_024/ov_SC03_024.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801C17E0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801C17E0;
+        register volatile s32 *p __asm__("$4") = &D_801C17E0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801C17C0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801BFE78[idx], D_801BFE79[idx], D_801BFE7A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801C17C0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c b/src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c
index 2540b3e25..dabba37d8 100644
--- a/src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c
+++ b/src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c
@@ -2627,8 +2627,8 @@ extern s16 D_801C17AA;
 extern s16 D_801C17B4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801C17A8;
+    s32 pv = param_1;
+    s16 *g = &D_801C17A8;
 
     switch (g[0]) {
     case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801C117E;
             v790 = D_801C1180;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801C17D8 = 1;
             D_801C110C = 0x1E;
             D_80126990 = v794;
@@ -3207,8 +3207,8 @@ extern void (*D_801C1154[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801C1154;
@@ -4054,8 +4054,8 @@ void func_8017D1E0(void *a0)
 
     extern u16 D_8018A99C[][2];
     s16 n;
-    register s32 tmp __asm__("$4");
-    register s32 t __asm__("$17");
+    register s32 tmp __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 t __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     s16 v;
     SVECTOR_8017C290 vec1;
     SVECTOR_8017C290 vec2;
@@ -4425,11 +4425,11 @@ void func_8017D900(s32 arg0) {
     u8 *p = &D_801C11F0;
 
     D_801C11F1 = D_801C11F2 = *p = func_80012F74(*p, 0, 10, 1);
-    __asm__("");
+    __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     *(Quad_801EA880_8017D900 *)&D_801C11F4 = *(Quad_801EA880_8017D900 *)p;
     *(Quad_801EA880_8017D900 *)&D_801C11F8 = *(Quad_801EA880_8017D900 *)p;
     *(Quad_801EA880_8017D900 *)&D_801C11FC = *(Quad_801EA880_8017D900 *)p;
-    __asm__("");
+    __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     if (*p == 0) {
         ((void (*)(s32))func_80146C3C)(arg0);
     }
diff --git a/src/ov_SC03_028/ov_SC03_028.c b/src/ov_SC03_028/ov_SC03_028.c
index 6cb12e856..df294a71e 100644
--- a/src/ov_SC03_028/ov_SC03_028.c
+++ b/src/ov_SC03_028/ov_SC03_028.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801EC598 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801EC598;
+        register volatile s32 *p __asm__("$4") = &D_801EC598;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801EC578;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801EA1B0[idx], D_801EA1B1[idx], D_801EA1B2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801EC578;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c b/src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c
index 8580e8eca..c74010e4a 100644
--- a/src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c
+++ b/src/ov_SC03_028/ov_SC03_028_jr_8017AE2C.c
@@ -2622,8 +2622,8 @@ extern s16 D_801EC562;
 extern s16 D_801EC56C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801EC560;
+    s32 pv = param_1;
+    s16 *g = &D_801EC560;
 
     switch (g[0]) {
     case 0:
@@ -2768,8 +2768,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2914,8 +2914,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2939,7 +2939,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801EB4B6;
             v790 = D_801EB4B8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801EC590 = 1;
             D_801EB444 = 0x1E;
             D_80126990 = v794;
@@ -3199,8 +3199,8 @@ extern void (*D_801EB48C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801EB48C;
@@ -3679,7 +3679,7 @@ void func_8017C43C(void *a0) {
     if (*(s16 *)((s32)a0 + 0xFC) == 0xB) {
         s32 f = *(s32 *)((s32)a0 + 0x1C);
         s32 v = -(f & 1) & 0xC0;
-        __asm__("" : "=r"(v) : "0"(v));
+        __asm__("" : "=r"(v) : "0"(v));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         f = f + 1;
         *(s32 *)((s32)a0 + 0x1C) = f;
         D_801EB539 = v;
@@ -3703,16 +3703,15 @@ void func_8017C43C(void *a0) {
         D_801EB53D = c * 255 / h;
         D_801EB535 = c * 255 / h;
     } else {
-        register u8 *q __asm__("$6");
+        u8 *q;
         u16 bs;
         s32 x;
         s16 y;
         t = (c - h) * 255 / h;
         q = &D_801EB535;
-        __asm__("" : "=r"(q) : "0"(q));
+        __asm__("" : "=r"(q) : "0"(q));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         bs = (u16)D_801EB510;
         x = bs + hw;
-        __asm__("" :: "r"(hw));
         y = x - 4;
         D_801EB53D = 0xFF;
         *q = 0xFF;
@@ -3728,7 +3727,7 @@ void func_8017C43C(void *a0) {
     }
 
     p = &D_801EB590;
-    __asm__("" : "=r"(p) : "0"(p));
+    __asm__("" : "=r"(p) : "0"(p));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     D_801EB580 = *(u16 *)((s32)p - 0x18) + (u16)D_8018F3D8;
     *p = D_801EB580 - 4;
     w = (void *)((s32)p - 0x80);
@@ -3947,7 +3946,7 @@ void func_8017CC70(s32 a0) {
        permutation. */
     raw = ((s32 (*)(s32))func_8012CBA4)(a0);
     flags = raw;
-    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));
+    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
 
     /* `m` blocks fold_truthop from merging the two bitfield tests below into a single
        `andi $v1,$s1,0xe000` -- the target keeps `& 0x8000` and `& 0x6000` separate. */
@@ -4094,7 +4093,7 @@ void func_8017CC70(s32 a0) {
        copies vanish and everything from .L8017CD18 on drifts by 2 instructions. */
     {
         s32 fire = ret;
-        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));
+        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         if (fire != 0) {
             func_80146A6C(2, (void *)s0, 0, 0, 0, 2, 0);
         }
@@ -4223,7 +4222,7 @@ extern void func_8012B0B4(unsigned int *param_1, int param_2, int param_3);
 
 void func_8017D220(s32 a0, s16 a1, s16 a2) {
     u32 buf[4];
-    register s32 hi __asm__("$2");
+    register s32 hi __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 lo;
 
     func_8012B0B4(buf, *(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), a1 << 4);
@@ -4310,7 +4309,7 @@ void func_8017D370(s32 a0) {
     u8 out[8];
     Mtx8_8017DE10_8017D370 m;
     s32 base;
-    register s32 ang __asm__("$2");
+    register s32 ang __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s16 arg;
 
     *(s16 *)(in + 0) = *(u16 *)(a0 + 0x6) + *(u16 *)(a0 + 0x12);
@@ -4651,17 +4650,17 @@ void func_8017DC90(u16 *a0, void *a1) {
 
 
 int func_8017DD34(short *param_1, short *param_2, short *param_3, int param_4) {
-    register int i2o __asm__("$5");
-    register int i4o __asm__("$9");
+    register int i2o __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
+    register int i4o __asm__("$9");  // !FAKE: pin $9 — NEEDED DIFFERS (P36 rung B tus7)
     short sVar1; int rx, rz, uVar5;
     i4o = param_2[1];
-    __asm__ __volatile__("" : : "r"(i4o));
+    __asm__ __volatile__("" : : "r"(i4o));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
     i2o = param_1[1]; uVar5 = 0;
     if (i2o >= i4o) {
         rx = param_1[0] - i2o * (param_2[0] - param_1[0]);
         rz = param_1[2] - i2o * (param_2[2] - param_1[2]);
     } else {
-        register int den __asm__("$3");
+        register int den __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
         int p2x = param_2[0], p2z = param_2[2];
         den = i2o - i4o;
         rx = p2x + i4o * (p2x - param_1[0]) / den;
diff --git a/src/ov_SC03_029/ov_SC03_029.c b/src/ov_SC03_029/ov_SC03_029.c
index e8650703d..9c2c0f6e1 100644
--- a/src/ov_SC03_029/ov_SC03_029.c
+++ b/src/ov_SC03_029/ov_SC03_029.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801D99D8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801D99D8;
+        register volatile s32 *p __asm__("$4") = &D_801D99D8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801D99B8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801D8188[idx], D_801D8189[idx], D_801D818A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801D99B8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_029/ov_SC03_029_jr_8017AE2C.c b/src/ov_SC03_029/ov_SC03_029_jr_8017AE2C.c
index 6f274937c..e3cdfdca1 100644
--- a/src/ov_SC03_029/ov_SC03_029_jr_8017AE2C.c
+++ b/src/ov_SC03_029/ov_SC03_029_jr_8017AE2C.c
@@ -2618,8 +2618,8 @@ extern s16 D_801D99A2;
 extern s16 D_801D99AC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801D99A0;
+    s32 pv = param_1;
+    s16 *g = &D_801D99A0;
 
     switch (g[0]) {
     case 0:
@@ -2767,8 +2767,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2913,8 +2913,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2938,7 +2938,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801D948E;
             v790 = D_801D9490;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801D99D0 = 1;
             D_801D941C = 0x1E;
             D_80126990 = v794;
@@ -3201,8 +3201,8 @@ extern void (*D_801D9464[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801D9464;
diff --git a/src/ov_SC03_030/ov_SC03_030.c b/src/ov_SC03_030/ov_SC03_030.c
index adc920ceb..0817542bd 100644
--- a/src/ov_SC03_030/ov_SC03_030.c
+++ b/src/ov_SC03_030/ov_SC03_030.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801E1BD0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801E1BD0;
+        register volatile s32 *p __asm__("$4") = &D_801E1BD0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801E1BB0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801E0780[idx], D_801E0781[idx], D_801E0782[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801E1BB0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c b/src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c
index 75cb7722f..8823db514 100644
--- a/src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c
+++ b/src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801E1B9A;
 extern s16 D_801E1BA4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801E1B98;
+    s32 pv = param_1;
+    s16 *g = &D_801E1B98;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801E1A86;
             v790 = D_801E1A88;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801E1BC8 = 1;
             D_801E1A14 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801E1A5C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801E1A5C;
@@ -4704,7 +4704,7 @@ void func_8017E7D4(void) {
 
 void func_8017EB98(void *a0, s32 a1)
 {
-    register s32 offset __asm__("$2");
+    s32 offset;
     s16 buf[4];
     u16 t0, t1, t2, t3;
     u16 *ptr;
@@ -4756,8 +4756,8 @@ extern u8 func_8014BF6C(void);
 
 void func_8017ECA8(void) {
     extern s32 D_80126B58;
-    register s32 s0 __asm__("$16");
-    register s32 s1 __asm__("$17");
+    s32 s0;
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     s32 r;
     s32 v0;
     s32 v1;
@@ -4872,7 +4872,7 @@ void func_8017EDD4(s32 a0) {
        turn frees the branch slot for `addu $a0,$s0,$zero` and lets the prologue
        keep its descending `sw $ra` / `sw $s1` order. A plain C reassignment does
        not work here — cse/flow deletes it. */
-    __asm__ volatile("" : "=r"(p));
+    __asm__ volatile("" : "=r"(p));  // !FAKE: launder out-only — NEEDED DIFFERS (P36 rung B tus7)
 }
 
 
@@ -5095,14 +5095,13 @@ extern void func_801292C8();
 
 void func_8017F5D8(s32 arg0)
 {
-    register s32 s1 __asm__("$17") = arg0;
-    register s32 s0 __asm__("$16");
-    register s32 v0 __asm__("$2");
-    register s32 v1 __asm__("$3");
-    register s32 a0 __asm__("$4");
-    register s32 a1 __asm__("$5");
-    register s32 a2 __asm__("$6");
-    register s32 zr __asm__("$0");
+    register s32 s1 __asm__("$17") = arg0;  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s0;
+    s32 v0;
+    s32 v1;
+    s32 a0;
+    register s32 a1 __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 a2 __asm__("$6");  // !FAKE: pin $6 — NEEDED DIFFERS (P36 rung B tus7)
 
     /* Load velocity components */
     v0 = *(s32 *)(s1 + 0x10);
@@ -5129,7 +5128,7 @@ void func_8017F5D8(s32 arg0)
     ((void (*)(void))func_8012931C)();
 
     /* Opaque copy s0 -> a0 */
-    a0 = s0 + zr;
+    a0 = s0 + 0;
 
     /* Call func_80128ED8 and branch on result */
     if (func_80128ED8(a0, (s32 *)(s1 + 0x24)) != 0) {
@@ -5357,16 +5356,16 @@ void func_8017FB04(s32 s1)
 
     extern s16 D_80126CB0;
     extern Blk8 D_80126CAC;
-    register s32 s3 asm("$19");
-    register s32 s2 asm("$18");
-    volatile s32 stack[6];
-    register s32 t4 asm("$12");
-    register s32 t5 asm("$13");
-    register s32 t6 asm("$14");
-    register s32 v0 asm("$2");
-    register s32 v1 asm("$3");
-    register s32 a0 asm("$4");
-    register s32 s0 asm("$16");
+    s32 s3;
+    register s32 s2 asm("$18");  // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 stack[6];
+    register s32 t4 asm("$12");  // !FAKE: pin $12 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 t5 asm("$13");  // !FAKE: pin $13 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 t6 asm("$14");  // !FAKE: pin $14 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 v0;
+    s32 v1;
+    s32 a0;
+    s32 s0;
 
     s3 = (s32)D_800AF630;
     s0 = *(s32 *)(s1 + 0x20);
@@ -5645,10 +5644,10 @@ s32 func_80180054(SVec_80180054 *p, s32 dist)
     SVec_80180054 sxy[7];
     u16 best;
     u16 d1, d2;
-    register s32 a __asm__("$2");
-    register s32 b __asm__("$3");
-    register s32 xa __asm__("$6");
-    register s32 xb __asm__("$5");
+    s32 a;
+    register s32 b __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 xa;
+    register s32 xb __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
 
     best = 0xFFFF;
     gte_SetRotMatrix(D_800AF648);
@@ -5669,27 +5668,27 @@ s32 func_80180054(SVec_80180054 *p, s32 dist)
             a = sxy[1].vy;
             b = sxy[0].vy;
             xa = a;
-            __asm__("" : "=r"(xa) : "0"(xa));
+            __asm__("" : "=r"(xa) : "0"(xa));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
             if (a - b >= 0) {
                 xb = b;
-                __asm__(" " : "=r"(xb) : "0"(xb));
+                __asm__(" " : "=r"(xb) : "0"(xb));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
                 d1 = xa - xb;
             } else {
                 xb = b;
-                __asm__("  " : "=r"(xb) : "0"(xb));
+                __asm__("  " : "=r"(xb) : "0"(xb));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
                 d1 = xb - xa;
             }
             a = sxy[2].vy;
             b = sxy[0].vy;
             xa = a;
-            __asm__("   " : "=r"(xa) : "0"(xa));
+            __asm__("   " : "=r"(xa) : "0"(xa));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
             if (a - b >= 0) {
                 xb = b;
-                __asm__("    " : "=r"(xb) : "0"(xb));
+                __asm__("    " : "=r"(xb) : "0"(xb));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
                 d2 = xa - xb;
             } else {
                 xb = b;
-                __asm__("     " : "=r"(xb) : "0"(xb));
+                __asm__("     " : "=r"(xb) : "0"(xb));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
                 d2 = xb - xa;
             }
             if (d1 > d2) {
@@ -5700,7 +5699,7 @@ s32 func_80180054(SVec_80180054 *p, s32 dist)
             }
         }
         p += 2;
-        __asm__("" : "=r"(p) : "0"(p));
+        __asm__("" : "=r"(p) : "0"(p));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     }
     return best;
 }
@@ -5756,8 +5755,8 @@ extern u8 D_80182178;
 
 void func_801802BC(s32 a0)
 {
-    register s32 s0 __asm__("$16");
-    register s32 s1 __asm__("$17");
+    s32 s0;
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     s1 = a0;
     s0 = ((s32 (*)(void))func_8012C1B8)();
@@ -5789,8 +5788,8 @@ extern s32 func_8004787C(s32 a0);
 extern void func_8012C218(void *a0);
 
 void func_80180398(void *a0) {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     s16 v0;
     s16 pad[4];
     (void)pad;
@@ -5837,10 +5836,10 @@ extern u16 D_80126B66;
 extern s32 func_8014C860(s32 a0, s32 a1);
 
 void func_801804F4(void *param_1) {
-    register void *arg0 __asm__("$4");
-    register s16 *lim __asm__("$7");
-    register void *out __asm__("$5");
-    register s16 cnt __asm__("$2");
+    void *arg0;
+    s16 *lim;
+    register void *out __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 cnt;
 
     arg0 = param_1;
     lim = (s16 *)&D_80126B66;
@@ -6020,7 +6019,7 @@ void func_801808E8(void) {
 extern void func_80143994(s32 a0, s32 a1);
 
 void func_801808F0(s32 arg0) {
-    register s32 s0 __asm__("$16") = arg0;
+    s32 s0 = arg0;
 
     if (*(u16 *)(s0 + 0x70) & 1) {
         *(u16 *)(s0 + 2) = 5;
@@ -6045,8 +6044,8 @@ extern s32 func_80180B44();
 
 void func_80180960(u8 *param_1) {
     s32 iVar2;
-    register u8 *work __asm__("$5");
-    register s32 snd __asm__("$4");
+    register u8 *work __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 snd __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
 
     if (*(s32 *)(param_1 + 0xCC) != 0) {
         iVar2 = *(s32 *)(*(s32 *)(param_1 + 0xCC) + 0xCC);
@@ -6062,7 +6061,7 @@ void func_80180960(u8 *param_1) {
     if (func_8012CC40((s32)param_1, (s32)D_80186950) & 0x2000) {
         func_8002D4C8(0x581, 0);
         snd = 0xF0;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         work = param_1;
         *(u32 *)(work + 0x1C) = 0xF;
         *(u32 *)(work + 0x18) = 0;
@@ -6242,8 +6241,8 @@ extern Bc8_80180E0C D_801869BC;
 extern u16 D_801869C0;
 
 void func_80180F14(void *a0) {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     s16 v0;
     u16 temp[3];
 
@@ -6294,7 +6293,7 @@ extern u8 D_801DCCE8[];
 extern s32 D_801DD860;
 
 void func_8018107C(s32 a0) {
-    register s32 v0 __asm__("$2");
+    s32 v0;
 
     v0 = ((s32 (*)(void))func_8012C1B8)();
     *(s32 *)((s32)a0 + 0x20) = v0;
@@ -6818,11 +6817,11 @@ void func_80181A60(SVec_80181A60 *v)
     LineF2_80181A60 *p;
     u8 *mx;
     u32 m24;
-    register u32 mFF __asm__("$6");
+    register u32 mFF __asm__("$6");  // !FAKE: pin $6 — NEEDED DIFFERS (P36 rung B tus7)
     s32 flag;
     s32 otz;
     s32 sh;
-    register u32 tag0 __asm__("$5");
+    register u32 tag0 __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
     u32 ix;
 
     p = (LineF2_80181A60 *)func_80010A08(0x10);
@@ -6851,7 +6850,7 @@ void func_80181A60(SVec_80181A60 *v)
             tag0 = tag0 & mFF;
             sh = otz * 4;
             *(u32 *)p = tag0 | (*(u32 *)(sh + D_800A651C[ix].a) & m24);
-            __asm__ volatile("" : "=r"(ix) : "0"(ix));
+            __asm__ volatile("" : "=r"(ix) : "0"(ix));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
             sh = sh + D_800A651C[*(u16 *)&D_800B9A02].a;
             *(u32 *)sh = (*(u32 *)sh & mFF) | ((u32)p & m24);
         }
diff --git a/src/ov_SC03_031/ov_SC03_031.c b/src/ov_SC03_031/ov_SC03_031.c
index 2a8c8058a..42bf25c65 100644
--- a/src/ov_SC03_031/ov_SC03_031.c
+++ b/src/ov_SC03_031/ov_SC03_031.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801C6238 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801C6238;
+        register volatile s32 *p __asm__("$4") = &D_801C6238;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801C6218;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801C4B80[idx], D_801C4B81[idx], D_801C4B82[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801C6218;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_031/ov_SC03_031_jr_8017AE2C.c b/src/ov_SC03_031/ov_SC03_031_jr_8017AE2C.c
index 1d5ed7742..949431d86 100644
--- a/src/ov_SC03_031/ov_SC03_031_jr_8017AE2C.c
+++ b/src/ov_SC03_031/ov_SC03_031_jr_8017AE2C.c
@@ -2624,8 +2624,8 @@ extern s16 D_801C6202;
 extern s16 D_801C620C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801C6200;
+    s32 pv = param_1;
+    s16 *g = &D_801C6200;
 
     switch (g[0]) {
     case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801C5E86;
             v790 = D_801C5E88;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801C6230 = 1;
             D_801C5E14 = 0x1E;
             D_80126990 = v794;
@@ -3207,8 +3207,8 @@ extern void (*D_801C5E5C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801C5E5C;
@@ -3344,8 +3344,8 @@ void func_8017BF88(s32 a0) {
     s32 s0;
     s32 s2;
     s32 s3;
-    register s32 v1 __asm__("$3");
-    register s32 v0 __asm__("$2");
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 rnd;
     s32 scale;
 
@@ -3382,7 +3382,7 @@ void func_8017BF88(s32 a0) {
     sp10[2] = scale;
     ApplyMatrixSV(sp18, sp10, sp10);
     {
-        register s32 c __asm__("$4");
+        register s32 c __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         s32 z;
         c = *(u16 *)(a0 + 0x2);
         *(s32 *)(a0 + 0x10) = sp10[0] << 8;
diff --git a/src/ov_SC03_089/ov_SC03_089.c b/src/ov_SC03_089/ov_SC03_089.c
index c286992b1..3d890cb49 100644
--- a/src/ov_SC03_089/ov_SC03_089.c
+++ b/src/ov_SC03_089/ov_SC03_089.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801C68B0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801C68B0;
+        register volatile s32 *p __asm__("$4") = &D_801C68B0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801C6890;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801C5438[idx], D_801C5439[idx], D_801C543A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801C6890;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_089/ov_SC03_089_jr_8017AE2C.c b/src/ov_SC03_089/ov_SC03_089_jr_8017AE2C.c
index 7ce76db0d..9c050575d 100644
--- a/src/ov_SC03_089/ov_SC03_089_jr_8017AE2C.c
+++ b/src/ov_SC03_089/ov_SC03_089_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801C687A;
 extern s16 D_801C6884;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801C6878;
+    s32 pv = param_1;
+    s16 *g = &D_801C6878;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801C673E;
             v790 = D_801C6740;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801C68A8 = 1;
             D_801C66CC = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801C6714[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801C6714;
diff --git a/src/ov_SC03_090/ov_SC03_090.c b/src/ov_SC03_090/ov_SC03_090.c
index 58dd12617..7f18e98f9 100644
--- a/src/ov_SC03_090/ov_SC03_090.c
+++ b/src/ov_SC03_090/ov_SC03_090.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801CBD20 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801CBD20;
+        register volatile s32 *p __asm__("$4") = &D_801CBD20;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801CBD00;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801CA8A0[idx], D_801CA8A1[idx], D_801CA8A2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801CBD00;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_090/ov_SC03_090_jr_8017AE2C.c b/src/ov_SC03_090/ov_SC03_090_jr_8017AE2C.c
index 55d043d48..52aefaad9 100644
--- a/src/ov_SC03_090/ov_SC03_090_jr_8017AE2C.c
+++ b/src/ov_SC03_090/ov_SC03_090_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801CBCEA;
 extern s16 D_801CBCF4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801CBCE8;
+    s32 pv = param_1;
+    s16 *g = &D_801CBCE8;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801CBBA6;
             v790 = D_801CBBA8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801CBD18 = 1;
             D_801CBB34 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801CBB7C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801CBB7C;
diff --git a/src/ov_SC03_091/ov_SC03_091.c b/src/ov_SC03_091/ov_SC03_091.c
index 587ffc5e6..7d5408344 100644
--- a/src/ov_SC03_091/ov_SC03_091.c
+++ b/src/ov_SC03_091/ov_SC03_091.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801D2670 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801D2670;
+        register volatile s32 *p __asm__("$4") = &D_801D2670;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801D2650;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801D0F70[idx], D_801D0F71[idx], D_801D0F72[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801D2650;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_091/ov_SC03_091_jr_8017AE2C.c b/src/ov_SC03_091/ov_SC03_091_jr_8017AE2C.c
index fb79f96a7..4f9e08079 100644
--- a/src/ov_SC03_091/ov_SC03_091_jr_8017AE2C.c
+++ b/src/ov_SC03_091/ov_SC03_091_jr_8017AE2C.c
@@ -2624,8 +2624,8 @@ extern s16 D_801D263A;
 extern s16 D_801D2644;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801D2638;
+    s32 pv = param_1;
+    s16 *g = &D_801D2638;
 
     switch (g[0]) {
     case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801D2276;
             v790 = D_801D2278;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801D2668 = 1;
             D_801D2204 = 0x1E;
             D_80126990 = v794;
@@ -3207,8 +3207,8 @@ extern void (*D_801D224C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801D224C;
diff --git a/src/ov_SC03_092/ov_SC03_092.c b/src/ov_SC03_092/ov_SC03_092.c
index 93bd345f0..068bb8287 100644
--- a/src/ov_SC03_092/ov_SC03_092.c
+++ b/src/ov_SC03_092/ov_SC03_092.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801B3018 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801B3018;
+        register volatile s32 *p __asm__("$4") = &D_801B3018;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801B2FF8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801B1B38[idx], D_801B1B39[idx], D_801B1B3A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801B2FF8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c b/src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c
index 65f1eee39..24b8dfa55 100644
--- a/src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c
+++ b/src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c
@@ -2898,8 +2898,8 @@ extern s16 D_801B2FE2;
 extern s16 D_801B2FEC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801B2FE0;
+    s32 pv = param_1;
+    s16 *g = &D_801B2FE0;
 
     switch (g[0]) {
     case 0:
@@ -3047,8 +3047,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -3193,8 +3193,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -3218,7 +3218,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801B2E3E;
             v790 = D_801B2E40;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801B3010 = 1;
             D_801B2DCC = 0x1E;
             D_80126990 = v794;
@@ -3481,8 +3481,8 @@ extern void (*D_801B2E14[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801B2E14;
@@ -3992,7 +3992,7 @@ void func_8017CE58(s32 arg0)
     u32 w, extra, mask;
     u32 wx, wy, wz;
     u32 wlo;
-    register u32 wzh __asm__("$3");
+    register u32 wzh __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
     s32 xa32, xb32, t32;
     s32 xmn1, xmx1, xmn2, xmx2;
     s32 mnc, mxc;
@@ -4160,14 +4160,14 @@ void func_8017CE58(s32 arg0)
                                              * a floor-priority tie (562/561 -> 249==249) so their allocno
                                              * order keeps $s5/$s6 (the first asm alone flips them). Both sit
                                              * between two volatile asms, so no schedule freedom is lost. */
-                                            __asm__ __volatile__("" : : "r"(my));
-                                            __asm__ __volatile__("");
+                                            __asm__ __volatile__("" : : "r"(my));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
+                                            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
                                             {
                                             s32 za;
                                             u32 *otp;
-                                            register u32 *tp __asm__("$6");
-                                            register u32 cc __asm__("$3");
-                                            register s32 fade __asm__("$2");
+                                            register u32 *tp __asm__("$6");  // !FAKE: pin $6 — NEEDED DIFFERS (P36 rung B tus7)
+                                            register u32 cc __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+                                            register s32 fade __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
                                             if (gsz0 > gsz1) {
                                                 za = gsz0;
                                                 if (za < gsz2) za = gsz2;
@@ -4182,7 +4182,7 @@ void func_8017CE58(s32 arg0)
                                             cc = fade << 8;
                                             cc = fade | cc;
                                             cc = cc | (fade << 16);
-                                            __asm__ __volatile__("" : : "r"(fade));
+                                            __asm__ __volatile__("" : : "r"(fade));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
                                             ((PolyFT3 *)pkt)->rgbc = (tp[0] & 0xFF000000) | cc;
                                             ((PolyFT3 *)pkt)->uvc0 = tp[1];
                                             ((PolyFT3 *)pkt)->uvp1 = tp[2];
@@ -4231,10 +4231,10 @@ void func_8017CE58(s32 arg0)
                                             if (my >= -0x6E && mny < 0x6F) {
                                                 s32 za, zb;
                                                 u32 *otp;
-                                                register u32 *tp __asm__("$6");
-                                                register u32 cc __asm__("$3");
+                                                register u32 *tp __asm__("$6");  // !FAKE: pin $6 — NEEDED DIFFERS (P36 rung B tus7)
+                                                register u32 cc __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
                                                 u32 uvw;
-                                                register s32 fade __asm__("$2");
+                                                register s32 fade __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
                                                 zb = gsz2;
                                                 if (zb < gsz3) zb = gsz3;
                                                 za = gsz0;
@@ -4250,7 +4250,7 @@ void func_8017CE58(s32 arg0)
                                                 cc = fade << 8;
                                                 cc = fade | cc;
                                                 cc = cc | (fade << 16);
-                                                __asm__ __volatile__("" : : "r"(fade));
+                                                __asm__ __volatile__("" : : "r"(fade));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
                                                 ((PolyFT4 *)pkt)->rgbc = (tp[0] & 0xFF000000) | cc;
                                                 ((PolyFT4 *)pkt)->uvc0 = tp[1];
                                                 ((PolyFT4 *)pkt)->uvp1 = tp[2];
@@ -4496,7 +4496,7 @@ extern s16 D_80126978;
 extern s16 D_8012697A;
 
 void func_8017DE74(void) {
-    register s32 *s0;
+    s32 *s0;
 
     D_80126954 = 0x190;
     D_8012695C = 0x258;
@@ -4628,7 +4628,7 @@ void func_8017E044(s32 param_1) {
            copy of the shared `sh` (+1 ins). A volatile asm at the join blocks the steal,
            the `j` becomes a jump-to-next and is deleted, leaving the load-delay nop the
            target has at .L8017E248 (byte-gate). */
-        __asm__ __volatile__("");
+        __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         *(s16 *)(param_1 + 0xA0) = x;
     L250:
         v = func_80012ABC((s32)*(s16 *)(param_1 + 0x1A), (s32)*(s16 *)(param_1 + 0xA0), 0x14);
@@ -4848,7 +4848,7 @@ void func_8017E780(void *arg0) {
         {
             s32 t;
             t = *(s32 *)(p + 0x20);
-            __asm__ __volatile__("" : "=r"(t) : "0"(t));
+            __asm__ __volatile__("" : "=r"(t) : "0"(t));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
             func_8001D0E8(t, 0x140, 0xF0);
         }
         *(u8 *)(p + 0x75) = 0;
@@ -5021,7 +5021,7 @@ extern s32 func_801788B8(s32 a0, s32 a1);
 
 void func_8017EE8C(s32 arg0) {
     s32 a1;
-    __asm__ __volatile__("" : "=r"(a1) : "0"(arg0));
+    __asm__ __volatile__("" : "=r"(a1) : "0"(arg0));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
 
     if (*(s16 *)(a1 + 0xFC) != 0) {
         s32 idx;
@@ -5683,8 +5683,8 @@ void func_8017FC44(void *a0)
     extern s32 func_80180150();
     extern s32 D_801B2E70;
 
-    register s32 v1 __asm__("$3");
-    register s32 idx __asm__("$16");
+    s32 v1;
+    s32 idx;
     s32 s3;
     Tbl8_8017FC44 *p;
     s32 t;
@@ -5697,7 +5697,7 @@ void func_8017FC44(void *a0)
     } else if (v1 < 0x172) {
         s3 = 2;
     } else {
-        register s32 c __asm__("$2") = (v1 < 0x17C);
+        s32 c = (v1 < 0x17C);
         if (c) {
             s3 = 3;
         } else {
@@ -5725,7 +5725,7 @@ void func_8017FC44(void *a0)
     } else if (v1 < 0x172) {
         idx = 2;
     } else {
-        register s32 c __asm__("$2") = (v1 < 0x17C);
+        s32 c = (v1 < 0x17C);
         if (c) {
             idx = 3;
         } else {
diff --git a/src/ov_SC03_093/ov_SC03_093.c b/src/ov_SC03_093/ov_SC03_093.c
index d9bfcc6fc..4fab7abda 100644
--- a/src/ov_SC03_093/ov_SC03_093.c
+++ b/src/ov_SC03_093/ov_SC03_093.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801CC670 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801CC670;
+        register volatile s32 *p __asm__("$4") = &D_801CC670;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801CC650;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801CAFA8[idx], D_801CAFA9[idx], D_801CAFAA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801CC650;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_093/ov_SC03_093_jr_8017AE2C.c b/src/ov_SC03_093/ov_SC03_093_jr_8017AE2C.c
index 9403d604d..dd11ddc8d 100644
--- a/src/ov_SC03_093/ov_SC03_093_jr_8017AE2C.c
+++ b/src/ov_SC03_093/ov_SC03_093_jr_8017AE2C.c
@@ -2624,8 +2624,8 @@ extern s16 D_801CC63A;
 extern s16 D_801CC644;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801CC638;
+    s32 pv = param_1;
+    s16 *g = &D_801CC638;
 
     switch (g[0]) {
     case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801CC2AE;
             v790 = D_801CC2B0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801CC668 = 1;
             D_801CC23C = 0x1E;
             D_80126990 = v794;
@@ -3207,8 +3207,8 @@ extern void (*D_801CC284[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801CC284;
diff --git a/src/ov_SC03_094/ov_SC03_094.c b/src/ov_SC03_094/ov_SC03_094.c
index da81b937d..5ad90f172 100644
--- a/src/ov_SC03_094/ov_SC03_094.c
+++ b/src/ov_SC03_094/ov_SC03_094.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801D3228 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801D3228;
+        register volatile s32 *p __asm__("$4") = &D_801D3228;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801D3208;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801D1DE8[idx], D_801D1DE9[idx], D_801D1DEA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801D3208;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_094/ov_SC03_094_jr_8017AE2C.c b/src/ov_SC03_094/ov_SC03_094_jr_8017AE2C.c
index 83a1d2a33..35305571b 100644
--- a/src/ov_SC03_094/ov_SC03_094_jr_8017AE2C.c
+++ b/src/ov_SC03_094/ov_SC03_094_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801D31F2;
 extern s16 D_801D31FC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801D31F0;
+    s32 pv = param_1;
+    s16 *g = &D_801D31F0;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801D30EE;
             v790 = D_801D30F0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801D3220 = 1;
             D_801D307C = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801D30C4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801D30C4;
diff --git a/src/ov_SC03_095/ov_SC03_095.c b/src/ov_SC03_095/ov_SC03_095.c
index b940181f6..691836c2f 100644
--- a/src/ov_SC03_095/ov_SC03_095.c
+++ b/src/ov_SC03_095/ov_SC03_095.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_8019BE28 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_8019BE28;
+        register volatile s32 *p __asm__("$4") = &D_8019BE28;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_8019BE08;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8019A9E0[idx], D_8019A9E1[idx], D_8019A9E2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_8019BE08;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_095/ov_SC03_095_jr_8017AE2C.c b/src/ov_SC03_095/ov_SC03_095_jr_8017AE2C.c
index 6435df705..6138e8ee0 100644
--- a/src/ov_SC03_095/ov_SC03_095_jr_8017AE2C.c
+++ b/src/ov_SC03_095/ov_SC03_095_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_8019BDF2;
 extern s16 D_8019BDFC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_8019BDF0;
+    s32 pv = param_1;
+    s16 *g = &D_8019BDF0;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019BCE6;
             v790 = D_8019BCE8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_8019BE20 = 1;
             D_8019BC74 = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_8019BCBC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019BCBC;
diff --git a/src/ov_SC03_096/ov_SC03_096.c b/src/ov_SC03_096/ov_SC03_096.c
index ce5db6245..b8666d89f 100644
--- a/src/ov_SC03_096/ov_SC03_096.c
+++ b/src/ov_SC03_096/ov_SC03_096.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_8019A8E0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_8019A8E0;
+        register volatile s32 *p __asm__("$4") = &D_8019A8E0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_8019A8C0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_80199498[idx], D_80199499[idx], D_8019949A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_8019A8C0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_096/ov_SC03_096_jr_8017AE2C.c b/src/ov_SC03_096/ov_SC03_096_jr_8017AE2C.c
index 34449c19d..f75345830 100644
--- a/src/ov_SC03_096/ov_SC03_096_jr_8017AE2C.c
+++ b/src/ov_SC03_096/ov_SC03_096_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_8019A8AA;
 extern s16 D_8019A8B4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_8019A8A8;
+    s32 pv = param_1;
+    s16 *g = &D_8019A8A8;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019A79E;
             v790 = D_8019A7A0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_8019A8D8 = 1;
             D_8019A72C = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_8019A774[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019A774;
diff --git a/src/ov_SC03_097/ov_SC03_097.c b/src/ov_SC03_097/ov_SC03_097.c
index c27a381d6..229fd39d4 100644
--- a/src/ov_SC03_097/ov_SC03_097.c
+++ b/src/ov_SC03_097/ov_SC03_097.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801AAE60 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801AAE60;
+        register volatile s32 *p __asm__("$4") = &D_801AAE60;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801AAE40;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801A9520[idx], D_801A9521[idx], D_801A9522[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801AAE40;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_097/ov_SC03_097_jr_8017AE2C.c b/src/ov_SC03_097/ov_SC03_097_jr_8017AE2C.c
index 6c6b0426f..f209b84c8 100644
--- a/src/ov_SC03_097/ov_SC03_097_jr_8017AE2C.c
+++ b/src/ov_SC03_097/ov_SC03_097_jr_8017AE2C.c
@@ -2624,8 +2624,8 @@ extern s16 D_801AAE2A;
 extern s16 D_801AAE34;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801AAE28;
+    s32 pv = param_1;
+    s16 *g = &D_801AAE28;
 
     switch (g[0]) {
     case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801AA826;
             v790 = D_801AA828;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801AAE58 = 1;
             D_801AA7B4 = 0x1E;
             D_80126990 = v794;
@@ -3207,8 +3207,8 @@ extern void (*D_801AA7FC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801AA7FC;
diff --git a/src/ov_SC03_098/ov_SC03_098.c b/src/ov_SC03_098/ov_SC03_098.c
index 623aac536..fb029cacd 100644
--- a/src/ov_SC03_098/ov_SC03_098.c
+++ b/src/ov_SC03_098/ov_SC03_098.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801C5848 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801C5848;
+        register volatile s32 *p __asm__("$4") = &D_801C5848;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801C5828;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801C4190[idx], D_801C4191[idx], D_801C4192[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801C5828;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_098/ov_SC03_098_jr_8017AE2C.c b/src/ov_SC03_098/ov_SC03_098_jr_8017AE2C.c
index 27fbc5073..2fe19574c 100644
--- a/src/ov_SC03_098/ov_SC03_098_jr_8017AE2C.c
+++ b/src/ov_SC03_098/ov_SC03_098_jr_8017AE2C.c
@@ -2624,8 +2624,8 @@ extern s16 D_801C5812;
 extern s16 D_801C581C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801C5810;
+    s32 pv = param_1;
+    s16 *g = &D_801C5810;
 
     switch (g[0]) {
     case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801C5496;
             v790 = D_801C5498;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801C5840 = 1;
             D_801C5424 = 0x1E;
             D_80126990 = v794;
@@ -3207,8 +3207,8 @@ extern void (*D_801C546C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801C546C;
diff --git a/src/ov_SC03_099/ov_SC03_099.c b/src/ov_SC03_099/ov_SC03_099.c
index 630aa6132..10a44bd5d 100644
--- a/src/ov_SC03_099/ov_SC03_099.c
+++ b/src/ov_SC03_099/ov_SC03_099.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801BF3F0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801BF3F0;
+        register volatile s32 *p __asm__("$4") = &D_801BF3F0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801BF3D0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801BDE60[idx], D_801BDE61[idx], D_801BDE62[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801BF3D0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_099/ov_SC03_099_jr_8017AE2C.c b/src/ov_SC03_099/ov_SC03_099_jr_8017AE2C.c
index 935e5e488..38e0e05f0 100644
--- a/src/ov_SC03_099/ov_SC03_099_jr_8017AE2C.c
+++ b/src/ov_SC03_099/ov_SC03_099_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801BF3BA;
 extern s16 D_801BF3C4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801BF3B8;
+    s32 pv = param_1;
+    s16 *g = &D_801BF3B8;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801BF166;
             v790 = D_801BF168;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801BF3E8 = 1;
             D_801BF0F4 = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801BF13C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801BF13C;
diff --git a/src/ov_SC03_100/ov_SC03_100.c b/src/ov_SC03_100/ov_SC03_100.c
index 17cc7e1f7..6b47c5eee 100644
--- a/src/ov_SC03_100/ov_SC03_100.c
+++ b/src/ov_SC03_100/ov_SC03_100.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801C88F8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801C88F8;
+        register volatile s32 *p __asm__("$4") = &D_801C88F8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801C88D8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801C70E8[idx], D_801C70E9[idx], D_801C70EA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801C88D8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_100/ov_SC03_100_jr_8017AE2C.c b/src/ov_SC03_100/ov_SC03_100_jr_8017AE2C.c
index 38b9c0e5f..6a345d3a0 100644
--- a/src/ov_SC03_100/ov_SC03_100_jr_8017AE2C.c
+++ b/src/ov_SC03_100/ov_SC03_100_jr_8017AE2C.c
@@ -2624,8 +2624,8 @@ extern s16 D_801C88C2;
 extern s16 D_801C88CC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801C88C0;
+    s32 pv = param_1;
+    s16 *g = &D_801C88C0;
 
     switch (g[0]) {
     case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801C83EE;
             v790 = D_801C83F0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801C88F0 = 1;
             D_801C837C = 0x1E;
             D_80126990 = v794;
@@ -3207,8 +3207,8 @@ extern void (*D_801C83C4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801C83C4;
diff --git a/src/ov_SC03_101/ov_SC03_101.c b/src/ov_SC03_101/ov_SC03_101.c
index 4f6d23cb7..09c651763 100644
--- a/src/ov_SC03_101/ov_SC03_101.c
+++ b/src/ov_SC03_101/ov_SC03_101.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_8019E1B8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_8019E1B8;
+        register volatile s32 *p __asm__("$4") = &D_8019E1B8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_8019E198;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8019C9B0[idx], D_8019C9B1[idx], D_8019C9B2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_8019E198;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_101/ov_SC03_101_jr_8017AE2C.c b/src/ov_SC03_101/ov_SC03_101_jr_8017AE2C.c
index caf581b89..426d5d886 100644
--- a/src/ov_SC03_101/ov_SC03_101_jr_8017AE2C.c
+++ b/src/ov_SC03_101/ov_SC03_101_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_8019E182;
 extern s16 D_8019E18C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_8019E180;
+    s32 pv = param_1;
+    s16 *g = &D_8019E180;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019DCB6;
             v790 = D_8019DCB8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_8019E1B0 = 1;
             D_8019DC44 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_8019DC8C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019DC8C;
diff --git a/src/ov_SC03_102/ov_SC03_102.c b/src/ov_SC03_102/ov_SC03_102.c
index 2aef3d0db..b95534d31 100644
--- a/src/ov_SC03_102/ov_SC03_102.c
+++ b/src/ov_SC03_102/ov_SC03_102.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801B9BB8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801B9BB8;
+        register volatile s32 *p __asm__("$4") = &D_801B9BB8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801B9B98;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801B8628[idx], D_801B8629[idx], D_801B862A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801B9B98;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_102/ov_SC03_102_jr_8017AE2C.c b/src/ov_SC03_102/ov_SC03_102_jr_8017AE2C.c
index d986c239f..4fd3bc453 100644
--- a/src/ov_SC03_102/ov_SC03_102_jr_8017AE2C.c
+++ b/src/ov_SC03_102/ov_SC03_102_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801B9B82;
 extern s16 D_801B9B8C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801B9B80;
+    s32 pv = param_1;
+    s16 *g = &D_801B9B80;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801B992E;
             v790 = D_801B9930;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801B9BB0 = 1;
             D_801B98BC = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801B9904[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801B9904;
diff --git a/src/ov_SC03_103/ov_SC03_103.c b/src/ov_SC03_103/ov_SC03_103.c
index 4ff7b3c63..3f710adbc 100644
--- a/src/ov_SC03_103/ov_SC03_103.c
+++ b/src/ov_SC03_103/ov_SC03_103.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801C4D68 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801C4D68;
+        register volatile s32 *p __asm__("$4") = &D_801C4D68;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801C4D48;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801C37E0[idx], D_801C37E1[idx], D_801C37E2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801C4D48;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_103/ov_SC03_103_jr_8017AE2C.c b/src/ov_SC03_103/ov_SC03_103_jr_8017AE2C.c
index 713f0bbae..7073a2e27 100644
--- a/src/ov_SC03_103/ov_SC03_103_jr_8017AE2C.c
+++ b/src/ov_SC03_103/ov_SC03_103_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801C4D32;
 extern s16 D_801C4D3C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801C4D30;
+    s32 pv = param_1;
+    s16 *g = &D_801C4D30;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801C4AE6;
             v790 = D_801C4AE8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801C4D60 = 1;
             D_801C4A74 = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801C4ABC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801C4ABC;
diff --git a/src/ov_SC03_104/ov_SC03_104.c b/src/ov_SC03_104/ov_SC03_104.c
index 6f3d907d6..26f7ddd58 100644
--- a/src/ov_SC03_104/ov_SC03_104.c
+++ b/src/ov_SC03_104/ov_SC03_104.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801C0428 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801C0428;
+        register volatile s32 *p __asm__("$4") = &D_801C0428;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801C0408;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801BED78[idx], D_801BED79[idx], D_801BED7A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801C0408;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_104/ov_SC03_104_jr_8017AE2C.c b/src/ov_SC03_104/ov_SC03_104_jr_8017AE2C.c
index 68d41ae49..443325abf 100644
--- a/src/ov_SC03_104/ov_SC03_104_jr_8017AE2C.c
+++ b/src/ov_SC03_104/ov_SC03_104_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801C03F2;
 extern s16 D_801C03FC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801C03F0;
+    s32 pv = param_1;
+    s16 *g = &D_801C03F0;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801C007E;
             v790 = D_801C0080;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801C0420 = 1;
             D_801C000C = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801C0054[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801C0054;
diff --git a/src/ov_SC03_105/ov_SC03_105.c b/src/ov_SC03_105/ov_SC03_105.c
index 81643a0b3..d9a098f1f 100644
--- a/src/ov_SC03_105/ov_SC03_105.c
+++ b/src/ov_SC03_105/ov_SC03_105.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801BCCB0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801BCCB0;
+        register volatile s32 *p __asm__("$4") = &D_801BCCB0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801BCC90;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801B8308[idx], D_801B8309[idx], D_801B830A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801BCC90;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_105/ov_SC03_105_jr_8017AE2C.c b/src/ov_SC03_105/ov_SC03_105_jr_8017AE2C.c
index e213da77e..2618e71d4 100644
--- a/src/ov_SC03_105/ov_SC03_105_jr_8017AE2C.c
+++ b/src/ov_SC03_105/ov_SC03_105_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801BCC7A;
 extern s16 D_801BCC84;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801BCC78;
+    s32 pv = param_1;
+    s16 *g = &D_801BCC78;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801B960E;
             v790 = D_801B9610;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801BCCA8 = 1;
             D_801B959C = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801B95E4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801B95E4;
@@ -3692,7 +3692,7 @@ void func_8017C43C(void *a0) {
     if (*(s16 *)((s32)a0 + 0xFC) == 0xB) {
         s32 f = *(s32 *)((s32)a0 + 0x1C);
         s32 v = -(f & 1) & 0xC0;
-        __asm__("" : "=r"(v) : "0"(v));
+        __asm__("" : "=r"(v) : "0"(v));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         f = f + 1;
         *(s32 *)((s32)a0 + 0x1C) = f;
         D_801B9691 = v;
@@ -3716,16 +3716,15 @@ void func_8017C43C(void *a0) {
         D_801B9695 = c * 255 / h;
         D_801B968D = c * 255 / h;
     } else {
-        register u8 *q __asm__("$6");
+        u8 *q;
         u16 bs;
         s32 x;
         s16 y;
         t = (c - h) * 255 / h;
         q = &D_801B968D;
-        __asm__("" : "=r"(q) : "0"(q));
+        __asm__("" : "=r"(q) : "0"(q));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         bs = (u16)D_801B9668;
         x = bs + hw;
-        __asm__("" :: "r"(hw));
         y = x - 4;
         D_801B9695 = 0xFF;
         *q = 0xFF;
@@ -3741,7 +3740,7 @@ void func_8017C43C(void *a0) {
     }
 
     p = &D_801B96E8;
-    __asm__("" : "=r"(p) : "0"(p));
+    __asm__("" : "=r"(p) : "0"(p));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     D_801B96D8 = *(u16 *)((s32)p - 0x18) + (u16)D_8018DD48;
     *p = D_801B96D8 - 4;
     w = (void *)((s32)p - 0x80);
diff --git a/src/ov_SC03_108/ov_SC03_108.c b/src/ov_SC03_108/ov_SC03_108.c
index 8a88be22e..54d698647 100644
--- a/src/ov_SC03_108/ov_SC03_108.c
+++ b/src/ov_SC03_108/ov_SC03_108.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801A1A38 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801A1A38;
+        register volatile s32 *p __asm__("$4") = &D_801A1A38;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801A1A18;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801A05F8[idx], D_801A05F9[idx], D_801A05FA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801A1A18;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_108/ov_SC03_108_jr_8017AE2C.c b/src/ov_SC03_108/ov_SC03_108_jr_8017AE2C.c
index cbeca58a3..903f44586 100644
--- a/src/ov_SC03_108/ov_SC03_108_jr_8017AE2C.c
+++ b/src/ov_SC03_108/ov_SC03_108_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_801A1A02;
 extern s16 D_801A1A0C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801A1A00;
+    s32 pv = param_1;
+    s16 *g = &D_801A1A00;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801A18FE;
             v790 = D_801A1900;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801A1A30 = 1;
             D_801A188C = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801A18D4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801A18D4;
diff --git a/src/ov_SC03_109/ov_SC03_109.c b/src/ov_SC03_109/ov_SC03_109.c
index 25df4243a..7b2cdfaf6 100644
--- a/src/ov_SC03_109/ov_SC03_109.c
+++ b/src/ov_SC03_109/ov_SC03_109.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_8019A440 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_8019A440;
+        register volatile s32 *p __asm__("$4") = &D_8019A440;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_8019A420;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_80199008[idx], D_80199009[idx], D_8019900A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_8019A420;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_109/ov_SC03_109_jr_8017AE2C.c b/src/ov_SC03_109/ov_SC03_109_jr_8017AE2C.c
index d6d3e1e55..6ef2ccda0 100644
--- a/src/ov_SC03_109/ov_SC03_109_jr_8017AE2C.c
+++ b/src/ov_SC03_109/ov_SC03_109_jr_8017AE2C.c
@@ -2629,8 +2629,8 @@ extern s16 D_8019A40A;
 extern s16 D_8019A414;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_8019A408;
+    s32 pv = param_1;
+    s16 *g = &D_8019A408;
 
     switch (g[0]) {
     case 0:
@@ -2775,8 +2775,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2921,8 +2921,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2946,7 +2946,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019A30E;
             v790 = D_8019A310;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_8019A438 = 1;
             D_8019A29C = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_8019A2E4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019A2E4;
@@ -3343,8 +3343,8 @@ void func_8017BF88(s32 a0) {
     s32 s0;
     s32 s2;
     s32 s3;
-    register s32 v1 __asm__("$3");
-    register s32 v0 __asm__("$2");
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 rnd;
     s32 scale;
 
@@ -3381,7 +3381,7 @@ void func_8017BF88(s32 a0) {
     sp10[2] = scale;
     ApplyMatrixSV(sp18, sp10, sp10);
     {
-        register s32 c __asm__("$4");
+        register s32 c __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         s32 z;
         c = *(u16 *)(a0 + 0x2);
         *(s32 *)(a0 + 0x10) = sp10[0] << 8;
diff --git a/src/ov_SC03_110/ov_SC03_110.c b/src/ov_SC03_110/ov_SC03_110.c
index 4d70d507a..aaa2046f1 100644
--- a/src/ov_SC03_110/ov_SC03_110.c
+++ b/src/ov_SC03_110/ov_SC03_110.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801A2470 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801A2470;
+        register volatile s32 *p __asm__("$4") = &D_801A2470;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801A2450;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801A0DB0[idx], D_801A0DB1[idx], D_801A0DB2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801A2450;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_110/ov_SC03_110_jr_8017AE2C.c b/src/ov_SC03_110/ov_SC03_110_jr_8017AE2C.c
index c4948bc99..b70165bb7 100644
--- a/src/ov_SC03_110/ov_SC03_110_jr_8017AE2C.c
+++ b/src/ov_SC03_110/ov_SC03_110_jr_8017AE2C.c
@@ -2624,8 +2624,8 @@ extern s16 D_801A243A;
 extern s16 D_801A2444;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801A2438;
+    s32 pv = param_1;
+    s16 *g = &D_801A2438;
 
     switch (g[0]) {
     case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801A20B6;
             v790 = D_801A20B8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801A2468 = 1;
             D_801A2044 = 0x1E;
             D_80126990 = v794;
@@ -3207,8 +3207,8 @@ extern void (*D_801A208C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801A208C;
diff --git a/src/ov_SC03_111/ov_SC03_111.c b/src/ov_SC03_111/ov_SC03_111.c
index e43585e23..844299ae2 100644
--- a/src/ov_SC03_111/ov_SC03_111.c
+++ b/src/ov_SC03_111/ov_SC03_111.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801B9B18 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801B9B18;
+        register volatile s32 *p __asm__("$4") = &D_801B9B18;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801B9AF8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801B82B8[idx], D_801B82B9[idx], D_801B82BA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801B9AF8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c b/src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c
index 689612f94..9c09000e0 100644
--- a/src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c
+++ b/src/ov_SC03_111/ov_SC03_111_jr_8017AE2C.c
@@ -2621,8 +2621,8 @@ extern s16 D_801B9AE2;
 extern s16 D_801B9AEC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801B9AE0;
+    s32 pv = param_1;
+    s16 *g = &D_801B9AE0;
 
     switch (g[0]) {
     case 0:
@@ -2770,8 +2770,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2916,8 +2916,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2941,7 +2941,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801B95BE;
             v790 = D_801B95C0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801B9B10 = 1;
             D_801B954C = 0x1E;
             D_80126990 = v794;
@@ -3204,8 +3204,8 @@ extern void (*D_801B9594[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801B9594;
@@ -3529,7 +3529,7 @@ void func_8017C25C(s32 a0) {
        permutation. */
     raw = ((s32 (*)(s32))func_8012CBA4)(a0);
     flags = raw;
-    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));
+    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
 
     /* `m` blocks fold_truthop from merging the two bitfield tests below into a single
        `andi $v1,$s1,0xe000` -- the target keeps `& 0x8000` and `& 0x6000` separate. */
@@ -3676,7 +3676,7 @@ void func_8017C25C(s32 a0) {
        copies vanish and everything from .L8017CD18 on drifts by 2 instructions. */
     {
         s32 fire = ret;
-        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));
+        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         if (fire != 0) {
             func_80146A6C(2, (void *)s0, 0, 0, 0, 2, 0);
         }
@@ -3805,7 +3805,7 @@ extern void func_8012B0B4(unsigned int *param_1, int param_2, int param_3);
 
 void func_8017C80C(s32 a0, s16 a1, s16 a2) {
     u32 buf[4];
-    register s32 hi __asm__("$2");
+    register s32 hi __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 lo;
 
     func_8012B0B4(buf, *(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), a1 << 4);
@@ -3892,7 +3892,7 @@ void func_8017C95C(s32 a0) {
     u8 out[8];
     Mtx8_8017DE10_8017C95C m;
     s32 base;
-    register s32 ang __asm__("$2");
+    register s32 ang __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s16 arg;
 
     *(s16 *)(in + 0) = *(u16 *)(a0 + 0x6) + *(u16 *)(a0 + 0x12);
@@ -4260,7 +4260,7 @@ void func_8017D174(s32 a0) {
 extern void func_80146C3C(void);
 void func_8017D218(int a0) {
     int v0 = *(int *)(a0 + 0x1C);
-    register unsigned char *p __asm__("$5") = *(unsigned char **)(a0 + 0x20);
+    register unsigned char *p __asm__("$5") = *(unsigned char **)(a0 + 0x20);  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
     *(int *)(a0 + 0x1C) = v0 + 1;
     if (v0 >= 0x1F) {
         func_80146C3C();
diff --git a/src/ov_SC03_112/ov_SC03_112.c b/src/ov_SC03_112/ov_SC03_112.c
index 6136a09d4..a3e2d8bb9 100644
--- a/src/ov_SC03_112/ov_SC03_112.c
+++ b/src/ov_SC03_112/ov_SC03_112.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801AD0E0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801AD0E0;
+        register volatile s32 *p __asm__("$4") = &D_801AD0E0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801AD0C0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801ABB18[idx], D_801ABB19[idx], D_801ABB1A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801AD0C0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_112/ov_SC03_112_jr_8017AE2C.c b/src/ov_SC03_112/ov_SC03_112_jr_8017AE2C.c
index 5e6c5f0ca..ea8a5d9dd 100644
--- a/src/ov_SC03_112/ov_SC03_112_jr_8017AE2C.c
+++ b/src/ov_SC03_112/ov_SC03_112_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801AD0AA;
 extern s16 D_801AD0B4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801AD0A8;
+    s32 pv = param_1;
+    s16 *g = &D_801AD0A8;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801ACE1E;
             v790 = D_801ACE20;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801AD0D8 = 1;
             D_801ACDAC = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801ACDF4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801ACDF4;
diff --git a/src/ov_SC03_113/ov_SC03_113.c b/src/ov_SC03_113/ov_SC03_113.c
index 1bcd0060b..86b47bfd7 100644
--- a/src/ov_SC03_113/ov_SC03_113.c
+++ b/src/ov_SC03_113/ov_SC03_113.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801A5C80 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801A5C80;
+        register volatile s32 *p __asm__("$4") = &D_801A5C80;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801A5C60;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801A46A8[idx], D_801A46A9[idx], D_801A46AA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801A5C60;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_113/ov_SC03_113_jr_8017AE2C.c b/src/ov_SC03_113/ov_SC03_113_jr_8017AE2C.c
index e3c5ffcc5..707cd1b2b 100644
--- a/src/ov_SC03_113/ov_SC03_113_jr_8017AE2C.c
+++ b/src/ov_SC03_113/ov_SC03_113_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801A5C4A;
 extern s16 D_801A5C54;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801A5C48;
+    s32 pv = param_1;
+    s16 *g = &D_801A5C48;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801A59AE;
             v790 = D_801A59B0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801A5C78 = 1;
             D_801A593C = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801A5984[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801A5984;
diff --git a/src/ov_SC03_114/ov_SC03_114.c b/src/ov_SC03_114/ov_SC03_114.c
index 61a31a91b..727879552 100644
--- a/src/ov_SC03_114/ov_SC03_114.c
+++ b/src/ov_SC03_114/ov_SC03_114.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801A97F8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801A97F8;
+        register volatile s32 *p __asm__("$4") = &D_801A97F8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801A97D8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801A8340[idx], D_801A8341[idx], D_801A8342[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801A97D8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_114/ov_SC03_114_jr_8017AE2C.c b/src/ov_SC03_114/ov_SC03_114_jr_8017AE2C.c
index cbfe712e2..da5304a5b 100644
--- a/src/ov_SC03_114/ov_SC03_114_jr_8017AE2C.c
+++ b/src/ov_SC03_114/ov_SC03_114_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801A97C2;
 extern s16 D_801A97CC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801A97C0;
+    s32 pv = param_1;
+    s16 *g = &D_801A97C0;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801A9646;
             v790 = D_801A9648;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801A97F0 = 1;
             D_801A95D4 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801A961C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801A961C;
diff --git a/src/ov_SC03_115/ov_SC03_115.c b/src/ov_SC03_115/ov_SC03_115.c
index 51667d193..2e0a2e150 100644
--- a/src/ov_SC03_115/ov_SC03_115.c
+++ b/src/ov_SC03_115/ov_SC03_115.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801950D0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801950D0;
+        register volatile s32 *p __asm__("$4") = &D_801950D0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801950B0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_80193C98[idx], D_80193C99[idx], D_80193C9A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801950B0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_115/ov_SC03_115_jr_8017AE2C.c b/src/ov_SC03_115/ov_SC03_115_jr_8017AE2C.c
index 5ba81fa7b..c06fc2a09 100644
--- a/src/ov_SC03_115/ov_SC03_115_jr_8017AE2C.c
+++ b/src/ov_SC03_115/ov_SC03_115_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_8019509A;
 extern s16 D_801950A4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_80195098;
+    s32 pv = param_1;
+    s16 *g = &D_80195098;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_80194F9E;
             v790 = D_80194FA0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801950C8 = 1;
             D_80194F2C = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_80194F74[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_80194F74;
diff --git a/src/ov_SC03_116/ov_SC03_116.c b/src/ov_SC03_116/ov_SC03_116.c
index 50ecf6062..ec752e401 100644
--- a/src/ov_SC03_116/ov_SC03_116.c
+++ b/src/ov_SC03_116/ov_SC03_116.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_80197CE0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_80197CE0;
+        register volatile s32 *p __asm__("$4") = &D_80197CE0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_80197CC0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_80196828[idx], D_80196829[idx], D_8019682A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_80197CC0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c b/src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c
index f0f70a1fc..1c39ff74a 100644
--- a/src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c
+++ b/src/ov_SC03_116/ov_SC03_116_jr_8017AE2C.c
@@ -2618,8 +2618,8 @@ extern s16 D_80197CAA;
 extern s16 D_80197CB4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_80197CA8;
+    s32 pv = param_1;
+    s16 *g = &D_80197CA8;
 
     switch (g[0]) {
     case 0:
@@ -2764,8 +2764,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2910,8 +2910,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2935,7 +2935,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_80197B2E;
             v790 = D_80197B30;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_80197CD8 = 1;
             D_80197ABC = 0x1E;
             D_80126990 = v794;
@@ -3195,8 +3195,8 @@ extern void (*D_80197B04[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_80197B04;
@@ -3701,7 +3701,7 @@ void func_8017BF14(s32 arg0, s32 lim)
     u8 *vd;
     u32 ot;
     u8 *pkt;
-    register s32 f0 __asm__("$19");
+    register s32 f0 __asm__("$19");  // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B tus7)
     s32 f1, f2, f3;
     s16 x3, z3, y3;
     Prim *prim;
@@ -3734,7 +3734,7 @@ void func_8017BF14(s32 arg0, s32 lim)
     u8 *base;
     s16 x0, y0, z0, x1, y1, z1, x2, y2, z2;
     s32 a0v, a1v, a2v, a3v;
-    register s32 c1 __asm__("$4"); s32 c0, c2, c3;
+    register s32 c1 __asm__("$4"); s32 c0, c2, c3;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
     s32 d;
     u32 *tp;
     u32 uvw;
@@ -3928,7 +3928,7 @@ void func_8017BF14(s32 arg0, s32 lim)
                                         else if (tmpxy[2].vy < mny) mny = tmpxy[2].vy;
                                         if (my >= -0x6E && mny < 0x6F) {
                                             s32 za, zb;
-                                            __asm__ __volatile__ ("" :: "r" (mny));
+                                            __asm__ __volatile__ ("" :: "r" (mny));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
                                             if (g.sz0 > g.sz1) { za = g.sz0; if (za < g.sz2) za = g.sz2; }
                                             else { za = g.sz1; if (za < g.sz2) za = g.sz2; }
                                             g.opz = za;
@@ -3985,7 +3985,7 @@ void func_8017BF14(s32 arg0, s32 lim)
                                                 ((PolyGT3 *)pkt)->rgb0 = rgbw;
                                                 rgbw = (c1 | cb) | (c1 << 8) | (c1 << 16);
                                                 ((PolyGT3 *)pkt)->rgb1 = rgbw;
-                                                __asm__ __volatile__ ("" :: "r" (c1));
+                                                __asm__ __volatile__ ("" :: "r" (c1));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
                                                 rgbw = (c2 | cb) | (c2 << 8) | (c2 << 16);
                                                 ((PolyGT3 *)pkt)->rgb2 = rgbw;
                                                 ((PolyGT3 *)pkt)->uv0 = tp[1];
@@ -4816,8 +4816,8 @@ extern u16 D_800B99DA;
 
 void func_80181864(void)
 {
-    register void *a0 __asm__("$4");
-    register void *a1 __asm__("$5");
+    void *a0;
+    void *a1;
     s32 v1;
 
     v1 = *(s16 *)((s32)a0 + 0xFC);
diff --git a/src/ov_SC03_117/ov_SC03_117.c b/src/ov_SC03_117/ov_SC03_117.c
index 9768806e1..606c2b822 100644
--- a/src/ov_SC03_117/ov_SC03_117.c
+++ b/src/ov_SC03_117/ov_SC03_117.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801CE8D8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801CE8D8;
+        register volatile s32 *p __asm__("$4") = &D_801CE8D8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801CE8B8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801CCFA0[idx], D_801CCFA1[idx], D_801CCFA2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801CE8B8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_117/ov_SC03_117_jr_8017AE2C.c b/src/ov_SC03_117/ov_SC03_117_jr_8017AE2C.c
index 6bcd1e61c..bad6258bb 100644
--- a/src/ov_SC03_117/ov_SC03_117_jr_8017AE2C.c
+++ b/src/ov_SC03_117/ov_SC03_117_jr_8017AE2C.c
@@ -2622,8 +2622,8 @@ extern s16 D_801CE8A2;
 extern s16 D_801CE8AC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801CE8A0;
+    s32 pv = param_1;
+    s16 *g = &D_801CE8A0;
 
     switch (g[0]) {
     case 0:
@@ -2768,8 +2768,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2914,8 +2914,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2939,7 +2939,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801CE2A6;
             v790 = D_801CE2A8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801CE8D0 = 1;
             D_801CE234 = 0x1E;
             D_80126990 = v794;
@@ -3199,8 +3199,8 @@ extern void (*D_801CE27C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801CE27C;
diff --git a/src/ov_SC03_118/ov_SC03_118.c b/src/ov_SC03_118/ov_SC03_118.c
index cc2451e22..a67258fe5 100644
--- a/src/ov_SC03_118/ov_SC03_118.c
+++ b/src/ov_SC03_118/ov_SC03_118.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801D47E0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801D47E0;
+        register volatile s32 *p __asm__("$4") = &D_801D47E0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801D47C0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801D2EF0[idx], D_801D2EF1[idx], D_801D2EF2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801D47C0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c b/src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c
index b2f6f5b08..15b090283 100644
--- a/src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c
+++ b/src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c
@@ -2619,8 +2619,8 @@ extern s16 D_801D47AA;
 extern s16 D_801D47B4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801D47A8;
+    s32 pv = param_1;
+    s16 *g = &D_801D47A8;
 
     switch (g[0]) {
     case 0:
@@ -2765,8 +2765,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2911,8 +2911,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2936,7 +2936,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801D41F6;
             v790 = D_801D41F8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801D47D8 = 1;
             D_801D4184 = 0x1E;
             D_80126990 = v794;
@@ -3199,8 +3199,8 @@ extern void (*D_801D41CC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801D41CC;
@@ -4015,8 +4015,8 @@ void func_8017D1E0(void *a0)
 
     extern u16 D_8018D3F8[][2];
     s16 n;
-    register s32 tmp __asm__("$4");
-    register s32 t __asm__("$17");
+    register s32 tmp __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 t __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     s16 v;
     SVECTOR_8017C290 vec1;
     SVECTOR_8017C290 vec2;
@@ -4386,11 +4386,11 @@ void func_8017D900(s32 arg0) {
     u8 *p = &D_801D4268;
 
     D_801D4269 = D_801D426A = *p = func_80012F74(*p, 0, 10, 1);
-    __asm__("");
+    __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     *(Quad_801EA880_8017D900 *)&D_801D426C = *(Quad_801EA880_8017D900 *)p;
     *(Quad_801EA880_8017D900 *)&D_801D4270 = *(Quad_801EA880_8017D900 *)p;
     *(Quad_801EA880_8017D900 *)&D_801D4274 = *(Quad_801EA880_8017D900 *)p;
-    __asm__("");
+    __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     if (*p == 0) {
         ((void (*)(s32))func_80146C3C)(arg0);
     }
@@ -4774,7 +4774,7 @@ void func_8017E324(s32 a0) {
        permutation. */
     raw = ((s32 (*)(s32))func_8012CBA4)(a0);
     flags = raw;
-    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));
+    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
 
     /* `m` blocks fold_truthop from merging the two bitfield tests below into a single
        `andi $v1,$s1,0xe000` -- the target keeps `& 0x8000` and `& 0x6000` separate. */
@@ -4921,7 +4921,7 @@ void func_8017E324(s32 a0) {
        copies vanish and everything from .L8017CD18 on drifts by 2 instructions. */
     {
         s32 fire = ret;
-        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));
+        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         if (fire != 0) {
             func_80146A6C(2, (void *)s0, 0, 0, 0, 2, 0);
         }
@@ -5050,7 +5050,7 @@ extern void func_8012B0B4(unsigned int *param_1, int param_2, int param_3);
 
 void func_8017E8D4(s32 a0, s16 a1, s16 a2) {
     u32 buf[4];
-    register s32 hi __asm__("$2");
+    register s32 hi __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 lo;
 
     func_8012B0B4(buf, *(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), a1 << 4);
@@ -5137,7 +5137,7 @@ void func_8017EA24(s32 a0) {
     u8 out[8];
     Mtx8_8017DE10_8017EA24 m;
     s32 base;
-    register s32 ang __asm__("$2");
+    register s32 ang __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s16 arg;
 
     *(s16 *)(in + 0) = *(u16 *)(a0 + 0x6) + *(u16 *)(a0 + 0x12);
@@ -5505,7 +5505,7 @@ void func_8017F23C(s32 a0) {
 extern void func_80146C3C(void);
 void func_8017F2E0(int a0) {
     int v0 = *(int *)(a0 + 0x1C);
-    register unsigned char *p __asm__("$5") = *(unsigned char **)(a0 + 0x20);
+    register unsigned char *p __asm__("$5") = *(unsigned char **)(a0 + 0x20);  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
     *(int *)(a0 + 0x1C) = v0 + 1;
     if (v0 >= 0x1F) {
         func_80146C3C();
@@ -5834,7 +5834,7 @@ void func_8017F9BC(s32 p) {
     *(s16 *)(o + 0x18) = t1;
     lim1 = **(s16 **)(p + 0x58);
     lv1 = lim1;
-    __asm__("" : "=r"(lv1) : "0"(lv1));
+    __asm__("" : "=r"(lv1) : "0"(lv1));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     if (lim1 < t1) {
         *(s16 *)(o + 0x1C) = lv1;
         *(s16 *)(o + 0x18) = lv1;
diff --git a/src/ov_SC03_121/ov_SC03_121.c b/src/ov_SC03_121/ov_SC03_121.c
index dc031fb59..e9dd9bc52 100644
--- a/src/ov_SC03_121/ov_SC03_121.c
+++ b/src/ov_SC03_121/ov_SC03_121.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801AEF40 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801AEF40;
+        register volatile s32 *p __asm__("$4") = &D_801AEF40;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801AEF20;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801AD998[idx], D_801AD999[idx], D_801AD99A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801AEF20;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_121/ov_SC03_121_jr_8017AE2C.c b/src/ov_SC03_121/ov_SC03_121_jr_8017AE2C.c
index 0a01aeafd..cf96767b2 100644
--- a/src/ov_SC03_121/ov_SC03_121_jr_8017AE2C.c
+++ b/src/ov_SC03_121/ov_SC03_121_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801AEF0A;
 extern s16 D_801AEF14;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801AEF08;
+    s32 pv = param_1;
+    s16 *g = &D_801AEF08;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801AEC9E;
             v790 = D_801AECA0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801AEF38 = 1;
             D_801AEC2C = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801AEC74[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801AEC74;
diff --git a/src/ov_SC03_124/ov_SC03_124.c b/src/ov_SC03_124/ov_SC03_124.c
index 06c23e06d..366c76589 100644
--- a/src/ov_SC03_124/ov_SC03_124.c
+++ b/src/ov_SC03_124/ov_SC03_124.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801E2578 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801E2578;
+        register volatile s32 *p __asm__("$4") = &D_801E2578;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801E2540;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801E04C0[idx], D_801E04C1[idx], D_801E04C2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801E2540;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c b/src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c
index 6b06c7030..f44349fd5 100644
--- a/src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c
+++ b/src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c
@@ -2601,8 +2601,8 @@ extern s16 D_801E252A;
 extern s16 D_801E2534;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801E2528;
+    s32 pv = param_1;
+    s16 *g = &D_801E2528;
 
     switch (g[0]) {
     case 0:
@@ -2753,8 +2753,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2899,8 +2899,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2924,7 +2924,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801E17C6;
             v790 = D_801E17C8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801E2570 = 1;
             D_801E1754 = 0x1E;
             D_80126990 = v794;
@@ -3193,8 +3193,8 @@ extern void (*D_801E179C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801E179C;
@@ -3351,10 +3351,10 @@ void func_8017BF50(s32 a0)
 {
 
     extern u8 D_801E17F8[];
-    register s32 s3 asm("$19");
-    register s16 *s0 asm("$16");
-    register s32 *s1 asm("$17");
-    register u8 *s2 asm("$18");
+    s32 s3;
+    s16 *s0;
+    register s32 *s1 asm("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    u8 *s2;
     s16 s4;
     Buf8017BF50_8017BF50 buf;
 
@@ -4084,7 +4084,7 @@ void func_8017DD04(s32 param_1)
     MATRIX m1;
     SVECTOR svec_in;
     SVECTOR svec_out;
-    register s32 lim __asm__("$16");
+    s32 lim;
 
     lim = *(u16 *)(param_1 + 0x9C);
 
@@ -4337,8 +4337,8 @@ void func_8017E228(void *a0) {
         func_801843E0(s0, (s32)&D_8018E958);
     }
     {
-        register void *pv0 __asm__("$2");
-        register s32 pv1 __asm__("$3");
+        void *pv0;
+        s32 pv1;
         pv0 = *(void **)((char *)s0 + 0x68);
         pv1 = 0x7FFF;
         *(s16 *)((char *)pv0 + 0xC) = (s16)pv1;
@@ -4466,7 +4466,7 @@ s32 aF8017E5C4(s32 param_1) __asm__("func_8017E5C4");
 
 s32 aF8017E5C4(s32 param_1)
 {
-    register s32 obj __asm__("$16") = param_1;
+    register s32 obj __asm__("$16") = param_1;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
 
     if (*(u16 *)(*(s32 *)((char *)obj + 0x64) + 0x2) != 3) {
         return 0;
@@ -4890,7 +4890,7 @@ void func_8017EDE8(void *a0)
                  * lever is not in the source order, so the pointer is pinned.
                  * The range is lw..sw inside this block and crosses no call, so
                  * the §74 caller-saved hazard does not apply. */
-                register s32 *p __asm__("$2");
+                register s32 *p __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
                 p = *(s32 **)((s32)a0 + 0xCC);
                 *(s32 *)((s32)p + 0xB0) = 2;
             }
@@ -5297,9 +5297,9 @@ void func_8017F63C(void *s1) {
         *(u16 *)(y + 0x18) = 0;
         func_80128EA8(*(s32 *)((s32)s1 + 0x20), base, (s32)&D_8018FBB8);
         node = *(s32 *)((s32)s1 + 0x20);
-        __asm__("" : "=r"(node) : "0"(node));
+        __asm__("" : "=r"(node) : "0"(node));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         delta = D_8018FBC4;
-        __asm__("" : "=r"(delta) : "0"(delta));
+        __asm__("" : "=r"(delta) : "0"(delta));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         h = *(u16 *)((s32)s1 + 2);
         *(s32 *)((s32)s1 + 0x2C) = 0x8000000;
         f = *(s32 *)((s32)s1 + 0x14);
@@ -5340,7 +5340,7 @@ void func_8017F768(void) {
      * it with no args, so the definition MUST keep the (void) signature; the real incoming
      * argument is read off $a0 with a register pin (§42/§73 PARAMS axis) and copied into an
      * ordinary local so it lands in $s1 across the two calls. */
-    register s32 a0v __asm__("$4");
+    s32 a0v;
     s32 param_1 = a0v;
     struct { s16 a, b, c, d; } buf;
     s16 *p;
@@ -5771,7 +5771,7 @@ void func_8018009C(s32 param_1)
             func_8012A828(param_1, (s32)&D_801D3BC4);
         }
         v0 = *(s32 *)(param_1 + 0x20);
-        __asm__ __volatile__(""); /* §5a cross-jump barrier, placed between the two tail
+        __asm__ __volatile__(""); /* §5a cross-jump barrier, placed between the two tail  // !FAKE: barrier — NEEDED COMPILE-ERROR (P36 rung B tus7)
                                       stores (not immediately before the jump) so reorg can
                                       still fill the branch delay slot with `a1 = 0xC00`;
                                       keeps this arm's tail distinct from case 0's identical
@@ -6409,7 +6409,7 @@ void func_80180D48(void)
     b = out[0];
     /* §194-A: zero-byte sched1 fence AFTER the defining statement so `b = out[0]`
        emits FIRST in its block, ahead of the D_801E256C lui/lw pair. */
-    __asm__ __volatile__("");
+    __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
 
     p = *(s32 *)&D_801E256C;
     t = a & 0xFFFF;
@@ -6444,7 +6444,7 @@ void func_80180E40(void *param_1) {
     extern s32 func_801789AC(s32 arg0);
     extern void func_80178D18(void);
 
-    register void *arg0 __asm__("$19") = param_1;
+    register void *arg0 __asm__("$19") = param_1;  // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B tus7)
     u8 *var_s5;
     s32 var_s2;
     s32 var_s0;
@@ -6484,7 +6484,7 @@ void func_80180E40(void *param_1) {
     if (var_s2 == 0) {
         func_80185238(0xE);
     }
-    __asm__ __volatile__("" : "=r"(var_s4) : "0"(var_s4));
+    __asm__ __volatile__("" : "=r"(var_s4) : "0"(var_s4));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     if ((D_801E1A20 < (s32)*(u16 *)(var_s5 + 0x34)) &&
         (((var_s4 - 0x1000) & 0xFFFF) < 0x11)) {
         D_801E1A20 = *(u16 *)(var_s5 + 0x34);
@@ -6537,8 +6537,8 @@ s32 func_8018107C()
     extern s16 D_801B95F0;
     extern u8 D_80190020;
 
-    register s32 t __asm__("$4");
-    register s32 s0 __asm__("$16");
+    register s32 t __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s0;
     s32 a1v;
     s32 zv;
     u8 a3v;
@@ -6658,8 +6658,8 @@ void func_8018130C(void *a0p)
     extern s32 rand(void);
     extern s32 func_80047948(s32 a0);
     extern s32 func_8004787C(s32 a0);
-    register void *arg0 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    register void *arg0 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s0;
     s32 v0;
     s32 s2;
     s32 s3;
@@ -6858,13 +6858,13 @@ s32 aF801816C8(void *a0) __asm__("func_801816C8");
 s32 aF801816C8(void *a0) {
     u8 *p = D_801202A0;
     u8 *end = D_801202A0 + 0x6480;
-    register s32 idA __asm__("$21");
+    s32 idA;
 
     if (p != end) {
         idA = 0x1D2;
         do {
-            __asm__ ("");
-            __asm__ ("");
+            __asm__ ("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
+            __asm__ ("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             if (*(u16 *)p == idA) {
                 if (*(u16 *)(p + 2) == 2) {
                     if (*(u16 *)(p + 0x34) < 2) {
diff --git a/src/ov_SC03_125/ov_SC03_125.c b/src/ov_SC03_125/ov_SC03_125.c
index a8c61bc25..fc764c948 100644
--- a/src/ov_SC03_125/ov_SC03_125.c
+++ b/src/ov_SC03_125/ov_SC03_125.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801C44D0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801C44D0;
+        register volatile s32 *p __asm__("$4") = &D_801C44D0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801C4498;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801C2DB8[idx], D_801C2DB9[idx], D_801C2DBA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801C4498;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c b/src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c
index a498f5df2..e005031b6 100644
--- a/src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c
+++ b/src/ov_SC03_125/ov_SC03_125_jr_8017AE2C.c
@@ -2622,8 +2622,8 @@ extern s16 D_801C4482;
 extern s16 D_801C448C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801C4480;
+    s32 pv = param_1;
+    s16 *g = &D_801C4480;
 
     switch (g[0]) {
     case 0:
@@ -2771,8 +2771,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2917,8 +2917,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2942,7 +2942,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801C40BE;
             v790 = D_801C40C0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801C44C8 = 1;
             D_801C404C = 0x1E;
             D_80126990 = v794;
@@ -3208,8 +3208,8 @@ extern void (*D_801C4094[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801C4094;
@@ -3345,8 +3345,8 @@ void func_8017BF88(s32 a0) {
     s32 s0;
     s32 s2;
     s32 s3;
-    register s32 v1 __asm__("$3");
-    register s32 v0 __asm__("$2");
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 rnd;
     s32 scale;
 
@@ -3383,7 +3383,7 @@ void func_8017BF88(s32 a0) {
     sp10[2] = scale;
     ApplyMatrixSV(sp18, sp10, sp10);
     {
-        register s32 c __asm__("$4");
+        register s32 c __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         s32 z;
         c = *(u16 *)(a0 + 0x2);
         *(s32 *)(a0 + 0x10) = sp10[0] << 8;
@@ -3478,10 +3478,10 @@ void func_8017C234(s32 a0)
 {
 
     extern u8 D_801C40F0[];
-    register s32 s3 asm("$19");
-    register s16 *s0 asm("$16");
-    register s32 *s1 asm("$17");
-    register u8 *s2 asm("$18");
+    s32 s3;
+    s16 *s0;
+    register s32 *s1 asm("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    u8 *s2;
     s16 s4;
     Buf8017BF50_8017C234 buf;
 
@@ -3869,7 +3869,7 @@ void func_8017C9BC(s32 a0) {
        permutation. */
     raw = ((s32 (*)(s32))func_8012CBA4)(a0);
     flags = raw;
-    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));
+    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
 
     /* `m` blocks fold_truthop from merging the two bitfield tests below into a single
        `andi $v1,$s1,0xe000` -- the target keeps `& 0x8000` and `& 0x6000` separate. */
@@ -4016,7 +4016,7 @@ void func_8017C9BC(s32 a0) {
        copies vanish and everything from .L8017CD18 on drifts by 2 instructions. */
     {
         s32 fire = ret;
-        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));
+        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         if (fire != 0) {
             func_80146A6C(2, (void *)s0, 0, 0, 0, 2, 0);
         }
diff --git a/src/ov_SC04_000/ov_SC04_000.c b/src/ov_SC04_000/ov_SC04_000.c
index 3045e635c..2ed60df63 100644
--- a/src/ov_SC04_000/ov_SC04_000.c
+++ b/src/ov_SC04_000/ov_SC04_000.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801AAFE8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801AAFE8;
+        register volatile s32 *p __asm__("$4") = &D_801AAFE8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801AAFC8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801A8730[idx], D_801A8731[idx], D_801A8732[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801AAFC8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC04_000/ov_SC04_000_jr_8017AE2C.c b/src/ov_SC04_000/ov_SC04_000_jr_8017AE2C.c
index b8599d407..4c87fbdf5 100644
--- a/src/ov_SC04_000/ov_SC04_000_jr_8017AE2C.c
+++ b/src/ov_SC04_000/ov_SC04_000_jr_8017AE2C.c
@@ -2626,8 +2626,8 @@ extern s16 D_801AAFB2;
 extern s16 D_801AAFBC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801AAFB0;
+    s32 pv = param_1;
+    s16 *g = &D_801AAFB0;
 
     switch (g[0]) {
     case 0:
@@ -2772,8 +2772,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2918,8 +2918,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2943,7 +2943,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801A9A36;
             v790 = D_801A9A38;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801AAFE0 = 1;
             D_801A99C4 = 0x1E;
             D_80126990 = v794;
@@ -3203,8 +3203,8 @@ extern void (*D_801A9A0C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801A9A0C;
diff --git a/src/ov_SC04_002/ov_SC04_002.c b/src/ov_SC04_002/ov_SC04_002.c
index 358a1e0d4..dcbc6c507 100644
--- a/src/ov_SC04_002/ov_SC04_002.c
+++ b/src/ov_SC04_002/ov_SC04_002.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801C16C8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801C16C8;
+        register volatile s32 *p __asm__("$4") = &D_801C16C8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801C16A0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801BFA40[idx], D_801BFA41[idx], D_801BFA42[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801C16A0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC04_002/ov_SC04_002_jr_8017AE2C.c b/src/ov_SC04_002/ov_SC04_002_jr_8017AE2C.c
index 9faf299b7..0b221a5b0 100644
--- a/src/ov_SC04_002/ov_SC04_002_jr_8017AE2C.c
+++ b/src/ov_SC04_002/ov_SC04_002_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801C168A;
 extern s16 D_801C1694;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801C1688;
+    s32 pv = param_1;
+    s16 *g = &D_801C1688;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801C0D46;
             v790 = D_801C0D48;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801C16B8 = 1;
             D_801C0CD4 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801C0D1C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801C0D1C;
diff --git a/src/ov_SC04_003/ov_SC04_003.c b/src/ov_SC04_003/ov_SC04_003.c
index 4e8528ef2..b922b9eda 100644
--- a/src/ov_SC04_003/ov_SC04_003.c
+++ b/src/ov_SC04_003/ov_SC04_003.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_8019BB80 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_8019BB80;
+        register volatile s32 *p __asm__("$4") = &D_8019BB80;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_8019BB60;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8019A6A8[idx], D_8019A6A9[idx], D_8019A6AA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_8019BB60;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC04_003/ov_SC04_003_jr_8017AE2C.c b/src/ov_SC04_003/ov_SC04_003_jr_8017AE2C.c
index 649875658..07b4d02b2 100644
--- a/src/ov_SC04_003/ov_SC04_003_jr_8017AE2C.c
+++ b/src/ov_SC04_003/ov_SC04_003_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_8019BB4A;
 extern s16 D_8019BB54;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_8019BB48;
+    s32 pv = param_1;
+    s16 *g = &D_8019BB48;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019B9AE;
             v790 = D_8019B9B0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_8019BB78 = 1;
             D_8019B93C = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_8019B984[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019B984;
diff --git a/src/ov_SC04_004/ov_SC04_004.c b/src/ov_SC04_004/ov_SC04_004.c
index 517d4abe4..5f575cbca 100644
--- a/src/ov_SC04_004/ov_SC04_004.c
+++ b/src/ov_SC04_004/ov_SC04_004.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801B3BE8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801B3BE8;
+        register volatile s32 *p __asm__("$4") = &D_801B3BE8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801B3BC0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801B24A8[idx], D_801B24A9[idx], D_801B24AA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801B3BC0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c b/src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c
index f4d823b9d..181fa51ad 100644
--- a/src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c
+++ b/src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c
@@ -2612,8 +2612,8 @@ extern s16 D_801B3BAA;
 extern s16 D_801B3BB4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801B3BA8;
+    s32 pv = param_1;
+    s16 *g = &D_801B3BA8;
 
     switch (g[0]) {
     case 0:
@@ -2761,8 +2761,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2907,8 +2907,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2932,7 +2932,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801B37AE;
             v790 = D_801B37B0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801B3BD8 = 1;
             D_801B373C = 0x1E;
             D_80126990 = v794;
@@ -3195,8 +3195,8 @@ extern void (*D_801B3784[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801B3784;
@@ -3491,7 +3491,7 @@ void func_8017BEBC(s32 arg0)
         gte_rtps();
         gte_stsxy(&sxy[3]);
         gte_ldv3c(&box[4]);
-        __asm__ volatile ("");   /* §45-B live-length slider: +1 static insn splits the 228/230 allocno-priority tie (498/498 -> 497/498) */
+        __asm__ volatile ("");   /* §45-B live-length slider: +1 static insn splits the 228/230 allocno-priority tie (498/498 -> 497/498) */  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         gte_rtpt();
         gte_stsxy3(&sxy[4], &sxy[5], &sxy[6]);
         gte_ldv0(&box[7]);
@@ -5030,9 +5030,8 @@ int func_8017EF1C(int param_1)
 {
 
     extern unsigned char D_8018834C[];
-    register int iVar1 __asm__("$4");
+    int iVar1;
     iVar1 = *(int *)(D_8018834C + param_1 * 4);
-    __asm__ __volatile__("" ::: "memory");
     func_8013B7F4((void *)iVar1, 0);
 }
 
@@ -5080,7 +5079,7 @@ extern void func_80154274(s32 *a0, s32 a1);
 
 void func_8017EFF4(s32 a0)
 {
-    register s32 s0 asm("$16") = a0;
+    s32 s0 = a0;
     s32 a2, a3;
 
     func_80149020((s32 *)s0);
@@ -5100,7 +5099,7 @@ void func_8017EFF4(s32 a0)
 
 void func_8017F07C(s32 a0)
 {
-    register s32 s0 asm("$16") = a0;
+    register s32 s0 asm("$16") = a0;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     u8 v1;
 
     func_80149020((s32 *)s0);
@@ -5146,7 +5145,7 @@ extern void func_80146C3C();
 
 void func_8017F16C(s32 a0) {
     s32 a1;
-    volatile s32 pad[12];
+    s32 pad[12];
 
     a1 = func_800D21C4(a0, (s32)&D_80188384, 0x2B);
     *(s32 *)(a0 + 0x20) = a1;
@@ -5254,9 +5253,9 @@ void func_8017F5C4(s32 *a0) {
 
 void func_8017F5E0(s32 *a0)
 {
-    register s32 t1 asm("$6");
-    register s32 t2 asm("$2");
-    register s32 t3 asm("$3");
+    s32 t1;
+    s32 t2;
+    s32 t3;
     s32 x;
 
     t1 = a0[4];
@@ -5505,7 +5504,7 @@ s32 func_8017FBFC(void *a0) {
     u16 global;
     s32 result;
     s32 cmp;
-    register s32 zr __asm__("$0");
+    register s32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
 
     val = *(u8 *)((s32)a0 + 3) - 2;
     *(u8 *)((s32)a0 + 3) = val;
@@ -5514,7 +5513,7 @@ s32 func_8017FBFC(void *a0) {
         goto ret1;
     }
 
-    __asm__ __volatile__("" : "=r"(val) : "0"(val));
+    __asm__ __volatile__("" : "=r"(val) : "0"(val));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
 
     global = D_800B99DA;
 
@@ -5737,8 +5736,8 @@ extern s32 func_80146E98(s32 a0);
 
 void func_80180054(s32 *a0) {
     s32 *s1 = *(s32 **)((s32)a0 + 0x20);
-    register s32 v0 asm("$2");
-    register s32 v1 asm("$3");
+    s32 v0;
+    register s32 v1 asm("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     if (func_80146E98((s32)a0) != 0) {
         v1 = 0x7FFFFFFF;
@@ -6181,7 +6180,7 @@ void func_80180A30(s32 a0) {
     extern void func_801319E0(s32 a0);
     extern void func_80131E00();
     extern void func_80131C78(s32 a0);
-    register s32 s0 __asm__("$16") = a0;
+    s32 s0 = a0;
     s32 s1;
     s32 v0;
 
@@ -6275,7 +6274,7 @@ extern s32 func_8012BE98(s32, u16*);
 
 s32 func_80180C74(s32 arg0) {
     extern u8 D_801202A0[];
-    register s32 zr __asm__("$0");
+    register s32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     u8 *pe; 
     s32 i;
     u16 buf[3];
@@ -6430,7 +6429,7 @@ void func_80180F74(s32 target, u16 *cur, s32 step)
     if ((s16)diff < 0) {
         mag = -diff;
     }
-    __asm__ __volatile__("" : "=r"(diff) : "0"(diff) : "memory");
+    __asm__ __volatile__("" : "=r"(diff) : "0"(diff) : "memory");  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     if ((s16)mag > (u16)step) {
         if ((s16)diff < 0) {
             *cur = *cur - step;
@@ -6798,7 +6797,7 @@ extern void func_80180FF8(void *a0);
 
 void func_80181744(s32 a0) {
     s32 local[4]; 
-    register s32 v0 __asm__("$2");
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 sum;
 
     v0 = func_80180AF0(a0, 0xFFFB0000, local);
@@ -6812,9 +6811,9 @@ void func_80181744(s32 a0) {
         v0 = *(s16 *)(a0 + 0x102);
         if (v0 != 0) {
             
-            register s32 tmp __asm__("$3");
+            register s32 tmp __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             tmp = v0;
-            __asm__ __volatile__("" : "=r"(tmp) : "0"(tmp) : "memory");
+            __asm__ __volatile__("" : "=r"(tmp) : "0"(tmp) : "memory");  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
             v0 = tmp - 1;
         } else {
             s16 cnt;
@@ -6974,7 +6973,6 @@ void func_80181AD4(s32 param_1) {
     s0 = param_1;
     func_8012AD80(s0);
     ta = *(s16 *)(s0 + 0xA);
-    __asm__ __volatile__("" : "=r"(ta) : "0"(ta));
     if (*(s16 *)(s0 + 0xFE) < ta || ta > 0) {
         func_8012C218((void *)s0);
     } else {
@@ -7055,22 +7053,22 @@ s32 func_80181D1C(s32 arg0) {
     s32 *base = &D_80126B58;
     s32 t;
     s32 r;
-    register s32 rr asm("$3");
-    register s32 z asm("$2");
+    register s32 rr asm("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 z asm("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
 
     if (*(u8 *)(arg0 + 0x74) != 0) {
-        asm volatile("");
+        asm volatile("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         return 0;
     }
     t = D_80126B62 - 0x20;
     r = func_80181E90((s16 *)arg0, (s16 *)(base + 1), 0x48);
     rr = r;
-    asm("" :: "r"(rr));
+    asm("" :: "r"(rr));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
     if (rr == 0) {
         return 0;
     }
     z = 0;
-    asm("" :: "r"(z));
+    asm("" :: "r"(z));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
     if (*(s16 *)(arg0 + 0xA) < (s16)t) {
         return z;
     }
@@ -7082,7 +7080,7 @@ extern s32 func_80181E90();
 
 s32 func_80181DAC(s32 arg0) {
     extern u8 D_801202A0[];
-    register s32 zr __asm__("$0");
+    register s32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     u8 *pe;
     u8 *ps;
     s16 *ca;
@@ -7121,7 +7119,7 @@ s32 func_80181DAC(s32 arg0) {
         if (func_80181E90(ca, cb, t) == 0) {
             goto next;
         }
-        __asm__ __volatile__("" :: "r"(pe));
+        __asm__ __volatile__("" :: "r"(pe));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
         return (s32)pe;
 
     next:
@@ -7200,9 +7198,9 @@ void func_80182014(s32 arg0, s32 arg1) {
     s32 wide;
     s16 t1n;
     s16 a3n;
-    register s32 d __asm__("6");
-    register s32 t1 __asm__("9");
-    register s32 a3 __asm__("7");
+    s32 d;
+    register s32 t1 __asm__("9");  // !FAKE: pin 9 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 a3 __asm__("7");  // !FAKE: pin 7 — NEEDED DIFFERS (P36 rung B tus7)
 
     if (*(u16 *)&D_80126B58 == 0x1A) {
         return;
@@ -7736,9 +7734,9 @@ void func_80182B9C(s32 a0) {
 
     ret = func_8004787C(*(s16 *)(a0 + 0xFC));
     {
-        register s32 arg0 __asm__("$4") = a0;
-        register s32 arg1 __asm__("$5") = 0x30;
-        __asm__ __volatile__("" :: "r"(arg0), "r"(arg1) : "memory");
+        register s32 arg0 __asm__("$4") = a0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+        register s32 arg1 __asm__("$5") = 0x30;  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" :: "r"(arg0), "r"(arg1) : "memory");  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
         v0 = -(ret >> 7);
         *(s16 *)(a0 + 0x52) = v0;
         func_801829BC(arg0, arg1);
@@ -7854,9 +7852,9 @@ void func_80182E9C(s32 a0) {
 
 
 void func_80182ED4(s32 arg0) {
-    register s32 t __asm__("$2");
-    register s32 u __asm__("$3");
-    register u32 zr __asm__("$0");
+    register s32 t __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 u __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     u16 sp10[10];
     u16 x;
     u16 y;
@@ -7904,7 +7902,7 @@ extern void func_8002A04C(s32 a0);
 extern void func_8012C218(void *a0);
 
 void func_80182FA8(s32 arg0) {
-    register s32 s0 __asm__("$16") = arg0;
+    register s32 s0 __asm__("$16") = arg0;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     ((void (*)(s32))func_80165988)(arg0);
     if (*(s32 *)(s0 + 0x78) != 0) {
         func_8002A04C(s0);
@@ -7976,13 +7974,13 @@ extern void func_8012B1B4(s32 a0, void *a1);
 void func_80183130(arg0)
 s32 arg0;
 {
-    register s32 s0 __asm__("$16");
-    register s32 v0 __asm__("$2");
-    register s32 v1 __asm__("$3");
-    register s32 a0 __asm__("$4");
-    register s32 a1 __asm__("$5");
-    register s32 a2 __asm__("$6");
-    register s32 a3 __asm__("$7");
+    s32 s0;
+    s32 v0;
+    s32 v1;
+    register s32 a0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 a1;
+    s32 a2;
+    s32 a3;
 
     s0 = arg0;
 
@@ -7995,7 +7993,7 @@ s32 arg0;
         func_8012B1B4(s0, (void *)&D_8019DC18);
         a0 = s0;
         a1 = (s32)&D_8019DC34;
-        __asm__ __volatile__("" :: "r"(a1));
+        __asm__ __volatile__("" :: "r"(a1));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
         v0 = 0xFFF60000;
         s0 = 4;
         *(s32 *)(a0 + 0x14) = v0;
@@ -8045,7 +8043,7 @@ extern void func_8012C098(void);
 extern void func_8012E8A8(u8 *a0);
 
 void func_801832A8(s32 arg0) {
-    register s32 s0 __asm__("$16") = arg0;
+    register s32 s0 __asm__("$16") = arg0;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     *(s16 *)(s0 + 0x76) = 0;
     if (*(s16 *)(s0 + 0x100) == 0) {
         func_8002A04C(s0);
@@ -8324,7 +8322,6 @@ void func_80183798(void *a0) {
 
     if (func_8012C044((s32)s0)) {
         *(s16 *)((u8 *)s0 + 0x100) = 1;
-        __asm__ __volatile__("" ::: "memory");
         *(s16 *)((u8 *)s0 + 0x76) = 0;
         if (*(s16 *)((u8 *)s0 + 0x100) == 0) {
             func_8002A04C((s32)s0);
diff --git a/src/ov_SC04_005/ov_SC04_005.c b/src/ov_SC04_005/ov_SC04_005.c
index 390c35ae6..87ed23d14 100644
--- a/src/ov_SC04_005/ov_SC04_005.c
+++ b/src/ov_SC04_005/ov_SC04_005.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801C22C0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801C22C0;
+        register volatile s32 *p __asm__("$4") = &D_801C22C0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801C22A0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801C0680[idx], D_801C0681[idx], D_801C0682[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801C22A0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC04_005/ov_SC04_005_jr_8017AE2C.c b/src/ov_SC04_005/ov_SC04_005_jr_8017AE2C.c
index ae5a61b67..15b819d53 100644
--- a/src/ov_SC04_005/ov_SC04_005_jr_8017AE2C.c
+++ b/src/ov_SC04_005/ov_SC04_005_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801C228A;
 extern s16 D_801C2294;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801C2288;
+    s32 pv = param_1;
+    s16 *g = &D_801C2288;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801C1986;
             v790 = D_801C1988;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801C22B8 = 1;
             D_801C1914 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801C195C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801C195C;
diff --git a/src/ov_SC04_006/ov_SC04_006.c b/src/ov_SC04_006/ov_SC04_006.c
index 355404073..22ef3644b 100644
--- a/src/ov_SC04_006/ov_SC04_006.c
+++ b/src/ov_SC04_006/ov_SC04_006.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_8019DD60 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_8019DD60;
+        register volatile s32 *p __asm__("$4") = &D_8019DD60;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_8019DD40;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8019C928[idx], D_8019C929[idx], D_8019C92A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_8019DD40;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC04_006/ov_SC04_006_jr_8017AE2C.c b/src/ov_SC04_006/ov_SC04_006_jr_8017AE2C.c
index e08081259..fc25654d3 100644
--- a/src/ov_SC04_006/ov_SC04_006_jr_8017AE2C.c
+++ b/src/ov_SC04_006/ov_SC04_006_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_8019DD2A;
 extern s16 D_8019DD34;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_8019DD28;
+    s32 pv = param_1;
+    s16 *g = &D_8019DD28;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019DC2E;
             v790 = D_8019DC30;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_8019DD58 = 1;
             D_8019DBBC = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_8019DC04[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019DC04;
diff --git a/src/ov_SC04_007/ov_SC04_007.c b/src/ov_SC04_007/ov_SC04_007.c
index 34da5c04e..6a3cf2302 100644
--- a/src/ov_SC04_007/ov_SC04_007.c
+++ b/src/ov_SC04_007/ov_SC04_007.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801B5B20 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801B5B20;
+        register volatile s32 *p __asm__("$4") = &D_801B5B20;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801B5B00;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801B3EE0[idx], D_801B3EE1[idx], D_801B3EE2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801B5B00;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC04_007/ov_SC04_007_jr_8017AE2C.c b/src/ov_SC04_007/ov_SC04_007_jr_8017AE2C.c
index 0ac952b2e..d539db7d0 100644
--- a/src/ov_SC04_007/ov_SC04_007_jr_8017AE2C.c
+++ b/src/ov_SC04_007/ov_SC04_007_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801B5AEA;
 extern s16 D_801B5AF4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801B5AE8;
+    s32 pv = param_1;
+    s16 *g = &D_801B5AE8;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801B51E6;
             v790 = D_801B51E8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801B5B18 = 1;
             D_801B5174 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801B51BC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801B51BC;
diff --git a/src/ov_SC04_008/ov_SC04_008.c b/src/ov_SC04_008/ov_SC04_008.c
index fc7f6bd4b..f32bc539e 100644
--- a/src/ov_SC04_008/ov_SC04_008.c
+++ b/src/ov_SC04_008/ov_SC04_008.c
@@ -213,7 +213,7 @@ void func_801287B8(void) {
     {
         /* D_80193450 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_80193450;
+        register volatile s32 *p __asm__("$4") = &D_80193450;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -463,17 +463,17 @@ void func_8012956C(void) {
     extern u8 D_80193430;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -483,7 +483,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -524,7 +523,7 @@ void func_8012956C(void) {
                       D_80190BB8[idx], D_80190BB9[idx], D_80190BBA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_80193430;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC04_008/ov_SC04_008_jr_801734BC.c b/src/ov_SC04_008/ov_SC04_008_jr_801734BC.c
index ecead3e12..5be90ac25 100644
--- a/src/ov_SC04_008/ov_SC04_008_jr_801734BC.c
+++ b/src/ov_SC04_008/ov_SC04_008_jr_801734BC.c
@@ -2969,7 +2969,7 @@ extern s16 D_80193448;
 
 int func_80178970(void)
 {
-    register int r __asm__("$2");
+    register int r __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     int v;
 
     v = ((s32 (*)(void))func_801789AC)();
diff --git a/src/ov_SC04_008/ov_SC04_008_jr_8017AE2C.c b/src/ov_SC04_008/ov_SC04_008_jr_8017AE2C.c
index 76527e6d0..bf2cfc703 100644
--- a/src/ov_SC04_008/ov_SC04_008_jr_8017AE2C.c
+++ b/src/ov_SC04_008/ov_SC04_008_jr_8017AE2C.c
@@ -2622,8 +2622,8 @@ extern s16 D_8019341A;
 extern s16 D_80193424;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_80193418;
+    s32 pv = param_1;
+    s16 *g = &D_80193418;
 
     switch (g[0]) {
     case 0:
@@ -2771,8 +2771,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2917,8 +2917,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2942,7 +2942,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_80191EBE;
             v790 = D_80191EC0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_80193448 = 1;
             D_80191E4C = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_80191E94[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_80191E94;
@@ -3671,9 +3671,8 @@ int func_8017D3A8(int param_1)
 {
 
     extern unsigned char D_80182538[];
-    register int iVar1 __asm__("$4");
+    int iVar1;
     iVar1 = *(int *)(D_80182538 + param_1 * 4);
-    __asm__ __volatile__("" ::: "memory");
     func_8013B7F4((void *)iVar1, 0);
 }
 
@@ -3990,7 +3989,6 @@ void func_8017D9CC(int param_1)
     *(s16 *)(p + 0x18) = v;
 
     *(s16 *)(param_1 + 0x12) = *(u16 *)(param_1 + 6) + *(u16 *)(ptr + 2);
-    __asm__ __volatile__("");
     v1a = *(u16 *)(param_1 + 0xE) + *(u16 *)(ptr + 6);
     *(s16 *)(param_1 + 0x10) = 0;
     *(s16 *)(param_1 + 0x18) = 0;
@@ -4144,8 +4142,8 @@ void func_8017DE40(s32 *param_1)
 
     extern s8 D_80191EF0;
   int new_var;
-register s32 p __asm__("$4");
-register s32 r __asm__("$3");
+register s32 p __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+s32 r;
   p = (s32) (&D_80191EF0);
   r = param_1[0x34 / 4];
   new_var = r;
@@ -4342,8 +4340,8 @@ extern s32 func_80146E98(s32 a0);
 
 void func_8017E23C(s32 *a0) {
     s32 *s1 = *(s32 **)((s32)a0 + 0x20);
-    register s32 v0 asm("$2");
-    register s32 v1 asm("$3");
+    s32 v0;
+    register s32 v1 asm("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     if (func_80146E98((s32)a0) != 0) {
         v1 = 0x7FFFFFFF;
diff --git a/src/ov_SC04_009/ov_SC04_009.c b/src/ov_SC04_009/ov_SC04_009.c
index f5c2b7d12..8f89f4e30 100644
--- a/src/ov_SC04_009/ov_SC04_009.c
+++ b/src/ov_SC04_009/ov_SC04_009.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_80198200 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_80198200;
+        register volatile s32 *p __asm__("$4") = &D_80198200;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801981E0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_80196DC8[idx], D_80196DC9[idx], D_80196DCA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801981E0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC04_009/ov_SC04_009_jr_8017AE2C.c b/src/ov_SC04_009/ov_SC04_009_jr_8017AE2C.c
index a30998700..c22dc29fa 100644
--- a/src/ov_SC04_009/ov_SC04_009_jr_8017AE2C.c
+++ b/src/ov_SC04_009/ov_SC04_009_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801981CA;
 extern s16 D_801981D4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801981C8;
+    s32 pv = param_1;
+    s16 *g = &D_801981C8;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801980CE;
             v790 = D_801980D0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801981F8 = 1;
             D_8019805C = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801980A4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801980A4;
diff --git a/src/ov_SC04_010/ov_SC04_010.c b/src/ov_SC04_010/ov_SC04_010.c
index e30d64bdf..fc083b187 100644
--- a/src/ov_SC04_010/ov_SC04_010.c
+++ b/src/ov_SC04_010/ov_SC04_010.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_8018F6D8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_8018F6D8;
+        register volatile s32 *p __asm__("$4") = &D_8018F6D8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_8018F6B8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8018E260[idx], D_8018E261[idx], D_8018E262[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_8018F6B8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC04_010/ov_SC04_010_jr_8017AE2C.c b/src/ov_SC04_010/ov_SC04_010_jr_8017AE2C.c
index e38ccb3e3..4c50e2f9c 100644
--- a/src/ov_SC04_010/ov_SC04_010_jr_8017AE2C.c
+++ b/src/ov_SC04_010/ov_SC04_010_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_8018F6A2;
 extern s16 D_8018F6AC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_8018F6A0;
+    s32 pv = param_1;
+    s16 *g = &D_8018F6A0;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8018F566;
             v790 = D_8018F568;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_8018F6D0 = 1;
             D_8018F4F4 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_8018F53C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8018F53C;
diff --git a/src/ov_SC04_012/ov_SC04_012.c b/src/ov_SC04_012/ov_SC04_012.c
index 8a5a350cb..6d2f4a2d6 100644
--- a/src/ov_SC04_012/ov_SC04_012.c
+++ b/src/ov_SC04_012/ov_SC04_012.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801931D0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801931D0;
+        register volatile s32 *p __asm__("$4") = &D_801931D0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801931B0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_80190938[idx], D_80190939[idx], D_8019093A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801931B0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC04_012/ov_SC04_012_jr_8017AE2C.c b/src/ov_SC04_012/ov_SC04_012_jr_8017AE2C.c
index fb2898b99..e7abe2a8d 100644
--- a/src/ov_SC04_012/ov_SC04_012_jr_8017AE2C.c
+++ b/src/ov_SC04_012/ov_SC04_012_jr_8017AE2C.c
@@ -2624,8 +2624,8 @@ extern s16 D_8019319A;
 extern s16 D_801931A4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_80193198;
+    s32 pv = param_1;
+    s16 *g = &D_80193198;
 
     switch (g[0]) {
     case 0:
@@ -2770,8 +2770,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2916,8 +2916,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2941,7 +2941,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_80191C3E;
             v790 = D_80191C40;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801931C8 = 1;
             D_80191BCC = 0x1E;
             D_80126990 = v794;
@@ -3201,8 +3201,8 @@ extern void (*D_80191C14[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_80191C14;
@@ -4111,7 +4111,6 @@ void func_8017DBEC(int param_1)
     *(s16 *)(p + 0x18) = v;
 
     *(s16 *)(param_1 + 0x12) = *(u16 *)(param_1 + 6) + *(u16 *)(ptr + 2);
-    __asm__ __volatile__("");
     v1a = *(u16 *)(param_1 + 0xE) + *(u16 *)(ptr + 6);
     *(s16 *)(param_1 + 0x10) = 0;
     *(s16 *)(param_1 + 0x18) = 0;
@@ -4178,8 +4177,8 @@ void func_8017DD84(int param_1)
 void func_8017DE74(s32 arg0) {
     extern u8 D_80191CC0[];
     extern void func_8017E060(s32 *a0);
-    register s32 val;
-    register s32 *ptr;
+    s32 val;
+    s32 *ptr;
 
     ptr = (s32 *)(D_80191CC0 + (*(s32 *)(arg0 + 0x34) << 6));
     val = *(u8 *)ptr;
@@ -4259,8 +4258,8 @@ void func_8017E060(s32 *param_1)
 
     extern s8 D_80191C70;
   int new_var;
-register s32 p __asm__("$4");
-register s32 r __asm__("$3");
+register s32 p __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+s32 r;
   p = (s32) (&D_80191C70);
   r = param_1[0x34 / 4];
   new_var = r;
@@ -4457,8 +4456,8 @@ extern s32 func_80146E98(s32 a0);
 
 void func_8017E45C(s32 *a0) {
     s32 *s1 = *(s32 **)((s32)a0 + 0x20);
-    register s32 v0 asm("$2");
-    register s32 v1 asm("$3");
+    s32 v0;
+    register s32 v1 asm("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     if (func_80146E98((s32)a0) != 0) {
         v1 = 0x7FFFFFFF;
diff --git a/src/ov_SC04_015/ov_SC04_015.c b/src/ov_SC04_015/ov_SC04_015.c
index a825719a5..9c213d37e 100644
--- a/src/ov_SC04_015/ov_SC04_015.c
+++ b/src/ov_SC04_015/ov_SC04_015.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801C9370 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801C9370;
+        register volatile s32 *p __asm__("$4") = &D_801C9370;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801C9338;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801C7620[idx], D_801C7621[idx], D_801C7622[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801C9338;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c b/src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
index abf3889b5..e454c9f07 100644
--- a/src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
+++ b/src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c
@@ -2616,8 +2616,8 @@ extern s16 D_801C9322;
 extern s16 D_801C932C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801C9320;
+    s32 pv = param_1;
+    s16 *g = &D_801C9320;
 
     switch (g[0]) {
     case 0:
@@ -2768,8 +2768,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2914,8 +2914,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2939,7 +2939,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801C8926;
             v790 = D_801C8928;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801C9368 = 1;
             D_801C88B4 = 0x1E;
             D_80126990 = v794;
@@ -3208,8 +3208,8 @@ extern void (*D_801C88FC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801C88FC;
@@ -3374,10 +3374,10 @@ void func_8017BF70(s32 a0)
 {
 
     extern u8 D_801C8958[];
-    register s32 s3 asm("$19");
-    register s16 *s0 asm("$16");
-    register s32 *s1 asm("$17");
-    register u8 *s2 asm("$18");
+    s32 s3;
+    s16 *s0;
+    register s32 *s1 asm("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    u8 *s2;
     s16 s4;
     Buf8017BF50_8017BF70 buf;
 
@@ -3695,7 +3695,7 @@ void func_8017C628(s32 a0) {
 extern void func_80146C3C(void);
 void func_8017C6CC(int a0) {
     int v0 = *(int *)(a0 + 0x1C);
-    register unsigned char *p __asm__("$5") = *(unsigned char **)(a0 + 0x20);
+    register unsigned char *p __asm__("$5") = *(unsigned char **)(a0 + 0x20);  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
     *(int *)(a0 + 0x1C) = v0 + 1;
     if (v0 >= 0x1F) {
         func_80146C3C();
@@ -3891,7 +3891,7 @@ void func_8017C730(s32 arg0)
         gte_rtps();
         gte_stsxy(&sxy[3]);
         gte_ldv3c(&box[4]);
-        __asm__ volatile ("");   /* §45-B live-length slider: +1 static insn splits the 228/230 allocno-priority tie (498/498 -> 497/498) */
+        __asm__ volatile ("");   /* §45-B live-length slider: +1 static insn splits the 228/230 allocno-priority tie (498/498 -> 497/498) */  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         gte_rtpt();
         gte_stsxy3(&sxy[4], &sxy[5], &sxy[6]);
         gte_ldv0(&box[7]);
@@ -4371,7 +4371,7 @@ extern u8 D_800AE6BD;
 
 s32 func_8017DA5C(void) {
     extern s32 func_8016F4C4();
-    register s32 a0 __asm__("$4");
+    s32 a0;
 
     D_800AE6BD += 1;
     return func_8016F4C4(a0);
@@ -4541,7 +4541,7 @@ void aF8017DD2C(s32 param_1)
     MATRIX m1;
     SVECTOR svec_in;
     SVECTOR svec_out;
-    register s32 lim __asm__("$16");
+    s32 lim;
 
     lim = *(u16 *)(param_1 + 0x9C);
 
@@ -4821,8 +4821,8 @@ extern s32 func_801789AC(s32 arg0);
 void func_8017E2CC(s32 param_1) {
     s32 *s2 = &D_80126B58;
     s32 *s1 = &D_800AE6A8;
-    register s32 v1 asm("$3");
-    register s32 v0 asm("$2");
+    register s32 v1 asm("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 v0 asm("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
 
     if (D_801C8B74 != 0) {
         v1 = D_801C8B78;
@@ -5029,7 +5029,7 @@ void func_8017E830(s32 a0)
         p[3] = 9;
         *(u32 *)(p + 4) = 0x808080;
         p[7] = 0x2C;
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
 
         u_hi = (s4 & 0x3F) << 2;
         u_lo = u_hi;
@@ -5171,7 +5171,7 @@ void func_8017EB78(void *arg0)
 
     s = (u8 *)arg0;
     X = *(s16 *)(s + 0x10);
-    __asm__("");
+    __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     Y = *(s16 *)(s + 0x12);
 
     p = (u8 *)func_80010A08(0x28);
@@ -5229,13 +5229,13 @@ extern s32 func_80128ED8(s32 param_1, s32 *param_2);
 extern s32 D_801C8C64;
 
 void func_8017ED28(void) {
-    register s16 *p __asm__("$18");
-    register s16 *q __asm__("$16");
-    register s32 i __asm__("$19");
-    register s32 c2 __asm__("$20");
-    register s16 *s1 __asm__("$17");
-    register s32 v1 __asm__("$3");
-    register s32 v0 __asm__("$2");
+    s16 *p;
+    register s16 *q __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 i __asm__("$19");  // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 c2;
+    s16 *s1;
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     Blk8 buf;
 
     p = (s16 *)&D_801C8C64;
@@ -5307,11 +5307,11 @@ extern s32 D_801C8C64;
 
 void func_8017EE80(s32 a0)
 {
-    register s32 s4 __asm__("$20");
-    register s32 s3 __asm__("$19");
-    register s32 s2 __asm__("$18");
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s4;
+    s32 s3;
+    register s32 s2 __asm__("$18");  // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s1;
+    s32 s0;
     s32 v0;
     s32 v1;
     u16 buf[10];
@@ -5452,7 +5452,7 @@ void func_8017F0EC(s32 a0) {
         if (func_800132BC(sp20, q) < 0x401) {
             {
                 s32 _m = (s32)&D_801C8B64;
-                __asm__ __volatile__("" : "=r"(_m) : "0"(_m));
+                __asm__ __volatile__("" : "=r"(_m) : "0"(_m));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
                 D_801C8B64 = sp20[0] - q[0];
                 D_801C8B66 = sp20[1] - q[1];
                 D_801C8B68 = sp20[2] - q[2];
@@ -6950,7 +6950,7 @@ void func_80180EDC(void *a0, s32 a1, s32 a2)
 
     extern u8 D_80078EB1;
     s32 v0;
-    register s32 v1 __asm__("$3");
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     v0 = D_80078EB1;
     if (!(v0 < a1)) {
diff --git a/src/ov_SC04_016/ov_SC04_016.c b/src/ov_SC04_016/ov_SC04_016.c
index a5a4c243d..ea4868a92 100644
--- a/src/ov_SC04_016/ov_SC04_016.c
+++ b/src/ov_SC04_016/ov_SC04_016.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801AC270 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801AC270;
+        register volatile s32 *p __asm__("$4") = &D_801AC270;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801AC250;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801A57C8[idx], D_801A57C9[idx], D_801A57CA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801AC250;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC04_016/ov_SC04_016_jr_8017AE2C.c b/src/ov_SC04_016/ov_SC04_016_jr_8017AE2C.c
index f3a79d742..ab92a4849 100644
--- a/src/ov_SC04_016/ov_SC04_016_jr_8017AE2C.c
+++ b/src/ov_SC04_016/ov_SC04_016_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801AC23A;
 extern s16 D_801AC244;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801AC238;
+    s32 pv = param_1;
+    s16 *g = &D_801AC238;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801A6ACE;
             v790 = D_801A6AD0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801AC268 = 1;
             D_801A6A5C = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801A6AA4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801A6AA4;
diff --git a/src/ov_SC04_018/ov_SC04_018.c b/src/ov_SC04_018/ov_SC04_018.c
index ef62fb357..1ccf095b3 100644
--- a/src/ov_SC04_018/ov_SC04_018.c
+++ b/src/ov_SC04_018/ov_SC04_018.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801E7AB8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801E7AB8;
+        register volatile s32 *p __asm__("$4") = &D_801E7AB8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801E7A80;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801E5A18[idx], D_801E5A19[idx], D_801E5A1A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801E7A80;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c b/src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c
index a499a622e..a42c70e45 100644
--- a/src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c
+++ b/src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c
@@ -2623,8 +2623,8 @@ extern s16 D_801E7A6A;
 extern s16 D_801E7A74;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801E7A68;
+    s32 pv = param_1;
+    s16 *g = &D_801E7A68;
 
     switch (g[0]) {
     case 0:
@@ -2772,8 +2772,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2918,8 +2918,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2943,7 +2943,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801E6D1E;
             v790 = D_801E6D20;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801E7AB0 = 1;
             D_801E6CAC = 0x1E;
             D_80126990 = v794;
@@ -3209,8 +3209,8 @@ extern void (*D_801E6CF4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801E6CF4;
@@ -3367,10 +3367,10 @@ void func_8017BF50(s32 a0)
 {
 
     extern u8 D_801E6D50[];
-    register s32 s3 asm("$19");
-    register s16 *s0 asm("$16");
-    register s32 *s1 asm("$17");
-    register u8 *s2 asm("$18");
+    s32 s3;
+    s16 *s0;
+    register s32 *s1 asm("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    u8 *s2;
     s16 s4;
     Buf8017BF50_8017BF50 buf;
 
@@ -4349,7 +4349,7 @@ void func_8017E3AC(s32 param_1)
     MATRIX m1;
     SVECTOR svec_in;
     SVECTOR svec_out;
-    register s32 lim __asm__("$16");
+    s32 lim;
 
     lim = *(u16 *)(param_1 + 0x9C);
 
@@ -7254,7 +7254,7 @@ void func_801821D4(void *a0)
     s32 hp;
     s32 v0;
     s32 v1;
-    register s32 arg0 __asm__("$4");
+    register s32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
     void *ptr;
 
     if (func_801847BC(a0, (void *)&D_80191C18) != 0) {
@@ -7479,7 +7479,7 @@ s32 func_801825BC(void *a0)
          * Without it gcc's find_cross_jump merges this `move v0,0; j epi`
          * tail with the identical case-2 failure tail -> 58 ins instead of
          * 60, and the case-2 `beq` then loses its delay-slot fill. */
-        __asm__ __volatile__("");
+        __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         return 0;
     }
 
diff --git a/src/ov_SC04_020/ov_SC04_020.c b/src/ov_SC04_020/ov_SC04_020.c
index 05c46f823..559c3ba31 100644
--- a/src/ov_SC04_020/ov_SC04_020.c
+++ b/src/ov_SC04_020/ov_SC04_020.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801BC740 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801BC740;
+        register volatile s32 *p __asm__("$4") = &D_801BC740;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801BC708;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801BB028[idx], D_801BB029[idx], D_801BB02A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801BC708;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c b/src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c
index eeff900d6..615bb1de6 100644
--- a/src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c
+++ b/src/ov_SC04_020/ov_SC04_020_jr_8017AE2C.c
@@ -2622,8 +2622,8 @@ extern s16 D_801BC6F2;
 extern s16 D_801BC6FC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801BC6F0;
+    s32 pv = param_1;
+    s16 *g = &D_801BC6F0;
 
     switch (g[0]) {
     case 0:
@@ -2771,8 +2771,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2917,8 +2917,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2942,7 +2942,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801BC32E;
             v790 = D_801BC330;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801BC738 = 1;
             D_801BC2BC = 0x1E;
             D_80126990 = v794;
@@ -3208,8 +3208,8 @@ extern void (*D_801BC304[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801BC304;
@@ -3345,8 +3345,8 @@ void func_8017BF88(s32 a0) {
     s32 s0;
     s32 s2;
     s32 s3;
-    register s32 v1 __asm__("$3");
-    register s32 v0 __asm__("$2");
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 rnd;
     s32 scale;
 
@@ -3383,7 +3383,7 @@ void func_8017BF88(s32 a0) {
     sp10[2] = scale;
     ApplyMatrixSV(sp18, sp10, sp10);
     {
-        register s32 c __asm__("$4");
+        register s32 c __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         s32 z;
         c = *(u16 *)(a0 + 0x2);
         *(s32 *)(a0 + 0x10) = sp10[0] << 8;
@@ -3478,10 +3478,10 @@ void func_8017C234(s32 a0)
 {
 
     extern u8 D_801BC360[];
-    register s32 s3 asm("$19");
-    register s16 *s0 asm("$16");
-    register s32 *s1 asm("$17");
-    register u8 *s2 asm("$18");
+    s32 s3;
+    s16 *s0;
+    register s32 *s1 asm("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    u8 *s2;
     s16 s4;
     Buf8017BF50_8017C234 buf;
 
@@ -3869,7 +3869,7 @@ void func_8017C9BC(s32 a0) {
        permutation. */
     raw = ((s32 (*)(s32))func_8012CBA4)(a0);
     flags = raw;
-    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));
+    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
 
     /* `m` blocks fold_truthop from merging the two bitfield tests below into a single
        `andi $v1,$s1,0xe000` -- the target keeps `& 0x8000` and `& 0x6000` separate. */
@@ -4016,7 +4016,7 @@ void func_8017C9BC(s32 a0) {
        copies vanish and everything from .L8017CD18 on drifts by 2 instructions. */
     {
         s32 fire = ret;
-        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));
+        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         if (fire != 0) {
             func_80146A6C(2, (void *)s0, 0, 0, 0, 2, 0);
         }
diff --git a/src/ov_SC05_000/ov_SC05_000.c b/src/ov_SC05_000/ov_SC05_000.c
index 1b0ea3977..64516a21f 100644
--- a/src/ov_SC05_000/ov_SC05_000.c
+++ b/src/ov_SC05_000/ov_SC05_000.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_8019ABE8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_8019ABE8;
+        register volatile s32 *p __asm__("$4") = &D_8019ABE8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_8019ABC8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801997B0[idx], D_801997B1[idx], D_801997B2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_8019ABC8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC05_000/ov_SC05_000_jr_8017AE2C.c b/src/ov_SC05_000/ov_SC05_000_jr_8017AE2C.c
index 114bc65da..57c0bd889 100644
--- a/src/ov_SC05_000/ov_SC05_000_jr_8017AE2C.c
+++ b/src/ov_SC05_000/ov_SC05_000_jr_8017AE2C.c
@@ -2626,8 +2626,8 @@ extern s16 D_8019ABB2;
 extern s16 D_8019ABBC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_8019ABB0;
+    s32 pv = param_1;
+    s16 *g = &D_8019ABB0;
 
     switch (g[0]) {
     case 0:
@@ -2772,8 +2772,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2918,8 +2918,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2943,7 +2943,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019AAB6;
             v790 = D_8019AAB8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_8019ABE0 = 1;
             D_8019AA44 = 0x1E;
             D_80126990 = v794;
@@ -3203,8 +3203,8 @@ extern void (*D_8019AA8C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019AA8C;
diff --git a/src/ov_SC05_001/ov_SC05_001.c b/src/ov_SC05_001/ov_SC05_001.c
index 99d424752..65375cbf6 100644
--- a/src/ov_SC05_001/ov_SC05_001.c
+++ b/src/ov_SC05_001/ov_SC05_001.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801B5F98 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801B5F98;
+        register volatile s32 *p __asm__("$4") = &D_801B5F98;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801B5F78;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801B4870[idx], D_801B4871[idx], D_801B4872[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801B5F78;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC05_001/ov_SC05_001_jr_8017AE2C.c b/src/ov_SC05_001/ov_SC05_001_jr_8017AE2C.c
index 2b794139a..df6eaeaf0 100644
--- a/src/ov_SC05_001/ov_SC05_001_jr_8017AE2C.c
+++ b/src/ov_SC05_001/ov_SC05_001_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801B5F62;
 extern s16 D_801B5F6C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801B5F60;
+    s32 pv = param_1;
+    s16 *g = &D_801B5F60;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801B5B76;
             v790 = D_801B5B78;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801B5F90 = 1;
             D_801B5B04 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801B5B4C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801B5B4C;
diff --git a/src/ov_SC05_002/ov_SC05_002.c b/src/ov_SC05_002/ov_SC05_002.c
index 82d612d38..62e09a7d2 100644
--- a/src/ov_SC05_002/ov_SC05_002.c
+++ b/src/ov_SC05_002/ov_SC05_002.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_8019FF50 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_8019FF50;
+        register volatile s32 *p __asm__("$4") = &D_8019FF50;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_8019FF30;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8019EB10[idx], D_8019EB11[idx], D_8019EB12[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_8019FF30;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC05_002/ov_SC05_002_jr_8017AE2C.c b/src/ov_SC05_002/ov_SC05_002_jr_8017AE2C.c
index 668aeb3ec..d82bfd6dc 100644
--- a/src/ov_SC05_002/ov_SC05_002_jr_8017AE2C.c
+++ b/src/ov_SC05_002/ov_SC05_002_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_8019FF1A;
 extern s16 D_8019FF24;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_8019FF18;
+    s32 pv = param_1;
+    s16 *g = &D_8019FF18;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019FE16;
             v790 = D_8019FE18;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_8019FF48 = 1;
             D_8019FDA4 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_8019FDEC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019FDEC;
diff --git a/src/ov_SC05_003/ov_SC05_003.c b/src/ov_SC05_003/ov_SC05_003.c
index 7ef3da679..dea2916b1 100644
--- a/src/ov_SC05_003/ov_SC05_003.c
+++ b/src/ov_SC05_003/ov_SC05_003.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801ACA60 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801ACA60;
+        register volatile s32 *p __asm__("$4") = &D_801ACA60;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801ACA40;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801AB620[idx], D_801AB621[idx], D_801AB622[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801ACA40;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC05_003/ov_SC05_003_jr_8017AE2C.c b/src/ov_SC05_003/ov_SC05_003_jr_8017AE2C.c
index b0e633fef..c203e9ae8 100644
--- a/src/ov_SC05_003/ov_SC05_003_jr_8017AE2C.c
+++ b/src/ov_SC05_003/ov_SC05_003_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801ACA2A;
 extern s16 D_801ACA34;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801ACA28;
+    s32 pv = param_1;
+    s16 *g = &D_801ACA28;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801AC926;
             v790 = D_801AC928;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801ACA58 = 1;
             D_801AC8B4 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801AC8FC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801AC8FC;
diff --git a/src/ov_SC05_004/ov_SC05_004.c b/src/ov_SC05_004/ov_SC05_004.c
index c1ccdbf23..ed8fa9f95 100644
--- a/src/ov_SC05_004/ov_SC05_004.c
+++ b/src/ov_SC05_004/ov_SC05_004.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_8019F2B8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_8019F2B8;
+        register volatile s32 *p __asm__("$4") = &D_8019F2B8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_8019F298;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8019DC98[idx], D_8019DC99[idx], D_8019DC9A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_8019F298;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC05_004/ov_SC05_004_jr_8017AE2C.c b/src/ov_SC05_004/ov_SC05_004_jr_8017AE2C.c
index a14355258..a433425f3 100644
--- a/src/ov_SC05_004/ov_SC05_004_jr_8017AE2C.c
+++ b/src/ov_SC05_004/ov_SC05_004_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_8019F282;
 extern s16 D_8019F28C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_8019F280;
+    s32 pv = param_1;
+    s16 *g = &D_8019F280;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019EF9E;
             v790 = D_8019EFA0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_8019F2B0 = 1;
             D_8019EF2C = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_8019EF74[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019EF74;
diff --git a/src/ov_SC05_005/ov_SC05_005.c b/src/ov_SC05_005/ov_SC05_005.c
index bb652337e..a8703b2c4 100644
--- a/src/ov_SC05_005/ov_SC05_005.c
+++ b/src/ov_SC05_005/ov_SC05_005.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801B1FC0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801B1FC0;
+        register volatile s32 *p __asm__("$4") = &D_801B1FC0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801B1FA0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801B0900[idx], D_801B0901[idx], D_801B0902[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801B1FA0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC05_005/ov_SC05_005_jr_8017AE2C.c b/src/ov_SC05_005/ov_SC05_005_jr_8017AE2C.c
index 1a897934e..baa09f348 100644
--- a/src/ov_SC05_005/ov_SC05_005_jr_8017AE2C.c
+++ b/src/ov_SC05_005/ov_SC05_005_jr_8017AE2C.c
@@ -2623,8 +2623,8 @@ extern s16 D_801B1F8A;
 extern s16 D_801B1F94;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801B1F88;
+    s32 pv = param_1;
+    s16 *g = &D_801B1F88;
 
     switch (g[0]) {
     case 0:
@@ -2772,8 +2772,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2918,8 +2918,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2943,7 +2943,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801B1C06;
             v790 = D_801B1C08;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801B1FB8 = 1;
             D_801B1B94 = 0x1E;
             D_80126990 = v794;
@@ -3206,8 +3206,8 @@ extern void (*D_801B1BDC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801B1BDC;
diff --git a/src/ov_SC05_006/ov_SC05_006.c b/src/ov_SC05_006/ov_SC05_006.c
index f588f1107..fe847e43d 100644
--- a/src/ov_SC05_006/ov_SC05_006.c
+++ b/src/ov_SC05_006/ov_SC05_006.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801900F0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801900F0;
+        register volatile s32 *p __asm__("$4") = &D_801900F0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801900D0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8018EA38[idx], D_8018EA39[idx], D_8018EA3A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801900D0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC05_006/ov_SC05_006_jr_8017AE2C.c b/src/ov_SC05_006/ov_SC05_006_jr_8017AE2C.c
index 64766ab02..e57229219 100644
--- a/src/ov_SC05_006/ov_SC05_006_jr_8017AE2C.c
+++ b/src/ov_SC05_006/ov_SC05_006_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801900BA;
 extern s16 D_801900C4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801900B8;
+    s32 pv = param_1;
+    s16 *g = &D_801900B8;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8018FD3E;
             v790 = D_8018FD40;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801900E8 = 1;
             D_8018FCCC = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_8018FD14[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8018FD14;
diff --git a/src/ov_SC05_007/ov_SC05_007.c b/src/ov_SC05_007/ov_SC05_007.c
index 10b27741c..2ce5ee2d4 100644
--- a/src/ov_SC05_007/ov_SC05_007.c
+++ b/src/ov_SC05_007/ov_SC05_007.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_8019CE90 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_8019CE90;
+        register volatile s32 *p __asm__("$4") = &D_8019CE90;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_8019CE70;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8019BA18[idx], D_8019BA19[idx], D_8019BA1A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_8019CE70;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC05_007/ov_SC05_007_jr_8017AE2C.c b/src/ov_SC05_007/ov_SC05_007_jr_8017AE2C.c
index e4ae07471..6e226b01f 100644
--- a/src/ov_SC05_007/ov_SC05_007_jr_8017AE2C.c
+++ b/src/ov_SC05_007/ov_SC05_007_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_8019CE5A;
 extern s16 D_8019CE64;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_8019CE58;
+    s32 pv = param_1;
+    s16 *g = &D_8019CE58;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019CD1E;
             v790 = D_8019CD20;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_8019CE88 = 1;
             D_8019CCAC = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_8019CCF4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019CCF4;
diff --git a/src/ov_SC05_008/ov_SC05_008.c b/src/ov_SC05_008/ov_SC05_008.c
index 1a639253e..6ca76b3b6 100644
--- a/src/ov_SC05_008/ov_SC05_008.c
+++ b/src/ov_SC05_008/ov_SC05_008.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801A1278 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801A1278;
+        register volatile s32 *p __asm__("$4") = &D_801A1278;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801A1258;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8019FD48[idx], D_8019FD49[idx], D_8019FD4A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801A1258;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c b/src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c
index cda855d9a..3b967358e 100644
--- a/src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c
+++ b/src/ov_SC05_008/ov_SC05_008_jr_8017AE2C.c
@@ -2627,8 +2627,8 @@ extern s16 D_801A1242;
 extern s16 D_801A124C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801A1240;
+    s32 pv = param_1;
+    s16 *g = &D_801A1240;
 
     switch (g[0]) {
     case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801A104E;
             v790 = D_801A1050;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801A1270 = 1;
             D_801A0FDC = 0x1E;
             D_80126990 = v794;
@@ -3204,8 +3204,8 @@ extern void (*D_801A1024[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801A1024;
@@ -3623,7 +3623,7 @@ extern s32 func_80171990(u8 *a0);
  */
 void func_8017D214(void *a0)
 {
-    register u8 *arg __asm__("$4");
+    register u8 *arg __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
     s32 wp = D_801151D4;
     u16 t;
 
@@ -3892,13 +3892,13 @@ void func_8017D7B4(void) {
     func_8012A018((s32)func_8017D8C4, 0);
     func_8012A094((s32)D_80126948);
     D_8012697C = D_801864AC[idx];
-    __asm__ __volatile__("" ::: "memory");
+    __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
     (*(s16 *)&D_80126980) = D_801864B8[idx];
-    __asm__ __volatile__("" ::: "memory");
+    __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
     t = D_801864C4[idx];
     D_801269EA = 0;
     D_801269E8 = t;
-    __asm__ __volatile__("" ::: "memory");
+    __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
     D_801A1274 = D_801864D0[idx];
     func_8017D8C4(D_80126948);
     D_801151D4 = (s32)D_80126948;
@@ -4295,12 +4295,12 @@ void func_8017E464(s32 param_1) {
     extern void func_80182694(s32 a0, s32 a1);
     extern s32 rand(void);
 
-    register s32 p __asm__("$17");
-    register s32 *q __asm__("$19");
-    register s32 *flag __asm__("$2");
-    register s32 aa __asm__("$4");
-    register s32 nn __asm__("$5");
-    register s32 pp __asm__("$6");
+    s32 p;
+    s32 *q;
+    register s32 *flag __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 aa __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 nn __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 pp;
     s32 s0;
     s32 t;
     s32 i;
@@ -4310,10 +4310,10 @@ void func_8017E464(s32 param_1) {
        $a0/$a1 (REGALLOC-PERM/$a0>$a1>$a2); two pins alone give the registers
        but float the $a1 load to the block head.  Pinning the WHOLE group --
        both halves reusing $2/$3 -- fixes schedule and allocation together. */
-    register u16 b0 __asm__("$2");
-    register u16 e0 __asm__("$3");
-    register u16 c1 __asm__("$5");
-    register u16 c2 __asm__("$6");
+    u16 b0;
+    u16 e0;
+    register u16 c1 __asm__("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
+    register u16 c2 __asm__("$6");  // !FAKE: pin $6 — NEEDED DIFFERS (P36 rung B tus7)
     u16 buf[4];
     u16 d[4];
 
@@ -4389,7 +4389,7 @@ void func_8017E464(s32 param_1) {
             t = rand();
             aa = (s32)(q + 1);
             nn = (s32)buf;
-            __asm__ __volatile__("" ::: "memory");
+            __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
             s0 &= 0x1F;
             s0 <<= 2;
             t = (t & 0x1F) - 0x50;
@@ -4463,7 +4463,7 @@ void func_8017E6A4(s32 param_1)
     func_8012F214(param_1, (s32)D_80186544, (s32)&buf[0]);
     func_80015954((s32)&buf[0], (s32)&D_80126B5C);
     *(Blk8_8017E6A4 *)D_80126BE0 = *(Blk8_8017E6A4 *)&buf[0];
-    __asm__ __volatile__("");
+    __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
 
     *(s16 *)((s32)b78 + 8) = D_80126B5E;
     *(s32 *)((s32)b78 + 0x48) = (s32)(s16)D_80126B5E;
@@ -4632,9 +4632,9 @@ extern void func_8012BF4C(s32 *a0, s32 a1);
 extern s32 func_8012AD50(void *a0);
 
 void func_8017EBB8(void *a0) {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register s32 idx __asm__("$4");
+    s32 s1;
+    s32 s2;
+    s32 idx;
     s32 tbl;
     s32 sum;
     s32 ent;
@@ -4642,7 +4642,6 @@ void func_8017EBB8(void *a0) {
     s32 v;
 
     s1 = (s32)a0;
-    __asm__ __volatile__("" : : : "memory");
     idx = *(s16 *)(s1 + 0x70);
     tbl = D_801151D4;
     s2 = D_80186558[idx];
@@ -4948,7 +4947,7 @@ extern void func_8002D4C8(s32 a0, s32 a1);
 
 void func_8017F554(s32 *p) {
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_8018661C[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -5011,7 +5010,7 @@ extern void func_8002D4C8(s32 a0, s32 a1);
 
 void func_8017F724(s32 *p) {
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_80186628[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -5074,7 +5073,7 @@ extern void func_8002D4C8(s32 a0, s32 a1);
 
 void func_8017F8F4(s32 *p) {
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_80186634[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -5137,7 +5136,7 @@ extern void func_8002D4C8(s32 a0, s32 a1);
 
 void func_8017FAC4(s32 *p) {
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_80186640[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -5197,7 +5196,7 @@ extern void func_8002D4C8(s32 a0, s32 a1);
 
 void func_8017FC94(s32 *p) {
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_8018664C[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -5264,7 +5263,7 @@ void func_8017FE64(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_80186658[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -5335,7 +5334,7 @@ void func_8018000C(s32 *p) {
 
     extern void (*D_80186664[])(void);
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_80186664[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -5397,7 +5396,7 @@ void func_80180164(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_80186670[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -5507,7 +5506,7 @@ void func_801803B8(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_8018667C[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -5566,7 +5565,7 @@ void func_80180510(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_80186688[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -5676,7 +5675,7 @@ void func_80180764(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_80186694[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -5737,7 +5736,7 @@ void func_801808BC(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_801866A0[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -5801,7 +5800,7 @@ void func_80180A14(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_801866AC[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -5911,7 +5910,7 @@ void func_80180CDC(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_80186778[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -6025,7 +6024,7 @@ void func_80180F84(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_80186788[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -6136,7 +6135,7 @@ void func_8018122C(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_80186798[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -6247,7 +6246,7 @@ void func_801814D4(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_801867A8[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -6355,7 +6354,7 @@ void func_8018177C(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_801867B8[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -6451,7 +6450,7 @@ void func_801819D8(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_801867C8[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -6547,7 +6546,7 @@ void func_80181C38(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_801867D8[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -6614,7 +6613,7 @@ void func_80181DBC(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_801867E4[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -6677,7 +6676,7 @@ void func_80181F40(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_801867F0[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -6744,7 +6743,7 @@ void func_801820C0(s32 *p) {
        LATER function in this TU, which blocks a byte-true decl of a different type.
        Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
     extern s32 D_80126B58;
-    register s32 *q __asm__("$17");
+    register s32 *q __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     D_801867FC[*(u16 *)((s32)p + 0x2)]();
     q = &D_80126B58;
@@ -6848,9 +6847,9 @@ extern u8 D_80126948[];
  */
 s32 func_80182334(void)
 {
-    register s32 a0v __asm__("$4");
-    register s32 a1 __asm__("$5");
-    register s32 zr __asm__("$0");
+    register s32 a0v __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 a1;
+    register s32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     u8 *a2 = D_80126948;
     s16 v0;
     s16 v1;
@@ -6864,7 +6863,7 @@ s32 func_80182334(void)
     if (*(s16 *)(a1 + 0xD0) < 0x28) {
         v0 = *(s16 *)(a1 + 0xD0) + 8;
     } else {
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         v1 = *(s16 *)(a1 + 0xCE) + 2;
         d0 = *(s16 *)(a1 + 0xD0);
         cpy = d0 + zr;
@@ -6935,7 +6934,7 @@ void func_80182490(s32 *p) {
     extern void (*D_80186820[])(void);
     extern s32 D_80126B58;
     extern void func_801292C8(void *a0);
-    register s32 *q __asm__("$18");
+    s32 *q;
 
     q = &D_80126B58;
     D_80186820[*(u16 *)((s32)p + 0x2)]();
@@ -6965,9 +6964,9 @@ void func_80182560(s32 param_1)
     extern void func_800233CC(void *a0, u16 a1);
     extern void func_80182654(s32 a0);
 
-    register s32 *s0 __asm__("$16");
-    register u32 *s1 __asm__("$17");
-    register s32 *s2 __asm__("$18");
+    s32 *s0;
+    u32 *s1;
+    s32 *s2;
 
     s32 t;
 
@@ -6991,7 +6990,7 @@ void func_80182560(s32 param_1)
         diff -= *(s16 *)((s32)s0 + 0x2E);
         t = diff << 9;
     }
-    __asm__("" ::: "memory");
+    __asm__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
     {
         s32 x2 = *(s16 *)((s32)s0 + 0x2E);
         *(u16 *)((s32)s0 + 0xE) += (x2 << 6);
@@ -6999,9 +6998,9 @@ void func_80182560(s32 param_1)
     *(u16 *)((s32)s2 + 0x1A) = t;
     *(u16 *)((s32)s2 + 0x18) = t;
     {
-        register u16 w __asm__("$2") = *(volatile u16 *)((s32)s0 + 2);
+        u16 w = *(volatile u16 *)((s32)s0 + 2);
         w++;
-        *(volatile u16 *)((s32)s0 + 2) = w;
+        *(u16 *)((s32)s0 + 2) = w;
         return;
     }
 }
@@ -7031,9 +7030,9 @@ extern void func_80015954(s32 a0, s32 a1);
 extern void func_801292C8(void *a0);
 
 void func_80182694(s32 a0, s32 a1) {
-    register s32 s0 __asm__("$16");
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
+    s32 s0;
+    s32 s1;
+    s32 s2;
     s32 v0;
     s2 = a0;
     s1 = a1;
diff --git a/src/ov_SC05_009/ov_SC05_009.c b/src/ov_SC05_009/ov_SC05_009.c
index ee706beb5..933c428fa 100644
--- a/src/ov_SC05_009/ov_SC05_009.c
+++ b/src/ov_SC05_009/ov_SC05_009.c
@@ -213,7 +213,7 @@ void func_801287B8(void) {
     {
         /* D_80196BD8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_80196BD8;
+        register volatile s32 *p __asm__("$4") = &D_80196BD8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -463,17 +463,17 @@ void func_8012956C(void) {
     extern u8 D_80196BB8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -483,7 +483,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -524,7 +523,7 @@ void func_8012956C(void) {
                       D_80195758[idx], D_80195759[idx], D_8019575A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_80196BB8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC05_009/ov_SC05_009_jr_801734BC.c b/src/ov_SC05_009/ov_SC05_009_jr_801734BC.c
index 529e3295b..7516f0f43 100644
--- a/src/ov_SC05_009/ov_SC05_009_jr_801734BC.c
+++ b/src/ov_SC05_009/ov_SC05_009_jr_801734BC.c
@@ -2969,7 +2969,7 @@ extern s16 D_80196BD0;
 
 int func_80178970(void)
 {
-    register int r __asm__("$2");
+    register int r __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     int v;
 
     v = ((s32 (*)(void))func_801789AC)();
diff --git a/src/ov_SC05_009/ov_SC05_009_jr_8017AE2C.c b/src/ov_SC05_009/ov_SC05_009_jr_8017AE2C.c
index 8f2598f9c..c7cfc46f2 100644
--- a/src/ov_SC05_009/ov_SC05_009_jr_8017AE2C.c
+++ b/src/ov_SC05_009/ov_SC05_009_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_80196BA2;
 extern s16 D_80196BAC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_80196BA0;
+    s32 pv = param_1;
+    s16 *g = &D_80196BA0;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_80196A5E;
             v790 = D_80196A60;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_80196BD0 = 1;
             D_801969EC = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_80196A34[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_80196A34;
diff --git a/src/ov_SC05_010/ov_SC05_010.c b/src/ov_SC05_010/ov_SC05_010.c
index 69bc6d1a2..8b7521656 100644
--- a/src/ov_SC05_010/ov_SC05_010.c
+++ b/src/ov_SC05_010/ov_SC05_010.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801C7FC0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801C7FC0;
+        register volatile s32 *p __asm__("$4") = &D_801C7FC0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801C7FA0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801C5BA8[idx], D_801C5BA9[idx], D_801C5BAA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801C7FA0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c b/src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c
index 94d4444b2..a4b9a8542 100644
--- a/src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c
+++ b/src/ov_SC05_010/ov_SC05_010_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_8018BB04)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801C61A8);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801C62A4[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801C6300[];
     extern u8 D_801C63C0;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_8018BD3C[];
     extern u8 D_8018BD54[];
     extern u16 D_8018BD58[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC05_010/ov_SC05_010_jr_8017AE2C.c b/src/ov_SC05_010/ov_SC05_010_jr_8017AE2C.c
index 643adcb71..c792032b8 100644
--- a/src/ov_SC05_010/ov_SC05_010_jr_8017AE2C.c
+++ b/src/ov_SC05_010/ov_SC05_010_jr_8017AE2C.c
@@ -2627,8 +2627,8 @@ extern s16 D_801C7F8A;
 extern s16 D_801C7F94;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801C7F88;
+    s32 pv = param_1;
+    s16 *g = &D_801C7F88;
 
     switch (g[0]) {
     case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801C6EAE;
             v790 = D_801C6EB0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801C7FB8 = 1;
             D_801C6E3C = 0x1E;
             D_80126990 = v794;
@@ -3204,8 +3204,8 @@ extern void (*D_801C6E84[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801C6E84;
@@ -3691,7 +3691,7 @@ void func_8017C43C(void *a0) {
     if (*(s16 *)((s32)a0 + 0xFC) == 0xB) {
         s32 f = *(s32 *)((s32)a0 + 0x1C);
         s32 v = -(f & 1) & 0xC0;
-        __asm__("" : "=r"(v) : "0"(v));
+        __asm__("" : "=r"(v) : "0"(v));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         f = f + 1;
         *(s32 *)((s32)a0 + 0x1C) = f;
         D_801C6F31 = v;
@@ -3715,16 +3715,15 @@ void func_8017C43C(void *a0) {
         D_801C6F35 = c * 255 / h;
         D_801C6F2D = c * 255 / h;
     } else {
-        register u8 *q __asm__("$6");
+        u8 *q;
         u16 bs;
         s32 x;
         s16 y;
         t = (c - h) * 255 / h;
         q = &D_801C6F2D;
-        __asm__("" : "=r"(q) : "0"(q));
+        __asm__("" : "=r"(q) : "0"(q));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         bs = (u16)D_801C6F08;
         x = bs + hw;
-        __asm__("" :: "r"(hw));
         y = x - 4;
         D_801C6F35 = 0xFF;
         *q = 0xFF;
@@ -3740,7 +3739,7 @@ void func_8017C43C(void *a0) {
     }
 
     p = &D_801C6F88;
-    __asm__("" : "=r"(p) : "0"(p));
+    __asm__("" : "=r"(p) : "0"(p));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     D_801C6F78 = *(u16 *)((s32)p - 0x18) + (u16)D_8018C3A0;
     *p = D_801C6F78 - 4;
     w = (void *)((s32)p - 0x80);
diff --git a/src/ov_SC05_011/ov_SC05_011.c b/src/ov_SC05_011/ov_SC05_011.c
index a4f1f818e..b94e9fdd7 100644
--- a/src/ov_SC05_011/ov_SC05_011.c
+++ b/src/ov_SC05_011/ov_SC05_011.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_8019D170 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_8019D170;
+        register volatile s32 *p __asm__("$4") = &D_8019D170;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_8019D150;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8019BD30[idx], D_8019BD31[idx], D_8019BD32[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_8019D150;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC05_011/ov_SC05_011_jr_8016AB6C.c b/src/ov_SC05_011/ov_SC05_011_jr_8016AB6C.c
index f32ef3f56..6d115aafe 100644
--- a/src/ov_SC05_011/ov_SC05_011_jr_8016AB6C.c
+++ b/src/ov_SC05_011/ov_SC05_011_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80180E7C)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_8019C330);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_8019C42C[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_8019C488[];
     extern u8 D_8019C548;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_801810B4[];
     extern u8 D_801810CC[];
     extern u16 D_801810D0[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC05_011/ov_SC05_011_jr_8017AE2C.c b/src/ov_SC05_011/ov_SC05_011_jr_8017AE2C.c
index 2dbd41332..19eac1d4e 100644
--- a/src/ov_SC05_011/ov_SC05_011_jr_8017AE2C.c
+++ b/src/ov_SC05_011/ov_SC05_011_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_8019D13A;
 extern s16 D_8019D144;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_8019D138;
+    s32 pv = param_1;
+    s16 *g = &D_8019D138;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019D036;
             v790 = D_8019D038;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_8019D168 = 1;
             D_8019CFC4 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_8019D00C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019D00C;
diff --git a/src/ov_SC05_017/ov_SC05_017.c b/src/ov_SC05_017/ov_SC05_017.c
index a15e5c83b..6a3c4260b 100644
--- a/src/ov_SC05_017/ov_SC05_017.c
+++ b/src/ov_SC05_017/ov_SC05_017.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801ED918 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801ED918;
+        register volatile s32 *p __asm__("$4") = &D_801ED918;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801ED8E0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801EB870[idx], D_801EB871[idx], D_801EB872[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801ED8E0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC05_017/ov_SC05_017_jr_8016AB6C.c b/src/ov_SC05_017/ov_SC05_017_jr_8016AB6C.c
index a866b6a7b..0f2f4bd98 100644
--- a/src/ov_SC05_017/ov_SC05_017_jr_8016AB6C.c
+++ b/src/ov_SC05_017/ov_SC05_017_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_8019033C)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801EBE70);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801EBF6C[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801EBFC8[];
     extern u8 D_801EC088;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_80190574[];
     extern u8 D_8019058C[];
     extern u16 D_80190590[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c b/src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c
index ecfc9795d..0eadebdc1 100644
--- a/src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c
+++ b/src/ov_SC05_017/ov_SC05_017_jr_8017AE2C.c
@@ -2606,8 +2606,8 @@ extern s16 D_801ED8CA;
 extern s16 D_801ED8D4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801ED8C8;
+    s32 pv = param_1;
+    s16 *g = &D_801ED8C8;
 
     switch (g[0]) {
     case 0:
@@ -2758,8 +2758,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2904,8 +2904,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2929,7 +2929,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801ECB76;
             v790 = D_801ECB78;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801ED910 = 1;
             D_801ECB04 = 0x1E;
             D_80126990 = v794;
@@ -3198,8 +3198,8 @@ extern void (*D_801ECB4C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801ECB4C;
@@ -3356,10 +3356,10 @@ void func_8017BF50(s32 a0)
 {
 
     extern u8 D_801ECBA8[];
-    register s32 s3 asm("$19");
-    register s16 *s0 asm("$16");
-    register s32 *s1 asm("$17");
-    register u8 *s2 asm("$18");
+    s32 s3;
+    s16 *s0;
+    register s32 *s1 asm("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    u8 *s2;
     s16 s4;
     Buf8017BF50_8017BF50 buf;
 
@@ -4382,7 +4382,7 @@ void func_8017E3C4(s32 param_1)
     MATRIX m1;
     SVECTOR svec_in;
     SVECTOR svec_out;
-    register s32 lim __asm__("$16");
+    s32 lim;
 
     lim = *(u16 *)(param_1 + 0x9C);
 
@@ -4849,7 +4849,7 @@ extern void func_80172710(void);
 s32 func_8017EE10(void *a0)
 {
     s32 p;
-    register s32 p2 __asm__("$3");
+    register s32 p2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
     u16 st;
 
     p = *(s32 *)((s32)a0 + 0x64);
@@ -5520,7 +5520,7 @@ s32 func_8017FB10(void *a0)
          * Without it gcc's find_cross_jump merges this `move v0,0; j epi`
          * tail with the identical case-2 failure tail -> 58 ins instead of
          * 60, and the case-2 `beq` then loses its delay-slot fill. */
-        __asm__ __volatile__("");
+        __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         return 0;
     }
 
diff --git a/src/ov_SC05_018/ov_SC05_018.c b/src/ov_SC05_018/ov_SC05_018.c
index 005ef5dd0..6082b728b 100644
--- a/src/ov_SC05_018/ov_SC05_018.c
+++ b/src/ov_SC05_018/ov_SC05_018.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801E6820 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801E6820;
+        register volatile s32 *p __asm__("$4") = &D_801E6820;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801E67E8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801E4FB0[idx], D_801E4FB1[idx], D_801E4FB2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801E67E8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC05_018/ov_SC05_018_jr_8016AB6C.c b/src/ov_SC05_018/ov_SC05_018_jr_8016AB6C.c
index 6f59c50da..22f11cfe4 100644
--- a/src/ov_SC05_018/ov_SC05_018_jr_8016AB6C.c
+++ b/src/ov_SC05_018/ov_SC05_018_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80189A98)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801E55B0);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801E56AC[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801E5708[];
     extern u8 D_801E57C8;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_80189CD0[];
     extern u8 D_80189CE8[];
     extern u16 D_80189CEC[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c b/src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c
index 9c277adf7..157967856 100644
--- a/src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c
+++ b/src/ov_SC05_018/ov_SC05_018_jr_8017AE2C.c
@@ -2622,8 +2622,8 @@ extern s16 D_801E67D2;
 extern s16 D_801E67DC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801E67D0;
+    s32 pv = param_1;
+    s16 *g = &D_801E67D0;
 
     switch (g[0]) {
     case 0:
@@ -2771,8 +2771,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2917,8 +2917,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2942,7 +2942,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801E62B6;
             v790 = D_801E62B8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801E6818 = 1;
             D_801E6244 = 0x1E;
             D_80126990 = v794;
@@ -3208,8 +3208,8 @@ extern void (*D_801E628C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801E628C;
@@ -3345,8 +3345,8 @@ void func_8017BF88(s32 a0) {
     s32 s0;
     s32 s2;
     s32 s3;
-    register s32 v1 __asm__("$3");
-    register s32 v0 __asm__("$2");
+    register s32 v1 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 v0 __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 rnd;
     s32 scale;
 
@@ -3383,7 +3383,7 @@ void func_8017BF88(s32 a0) {
     sp10[2] = scale;
     ApplyMatrixSV(sp18, sp10, sp10);
     {
-        register s32 c __asm__("$4");
+        register s32 c __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         s32 z;
         c = *(u16 *)(a0 + 0x2);
         *(s32 *)(a0 + 0x10) = sp10[0] << 8;
@@ -3478,10 +3478,10 @@ void func_8017C234(s32 a0)
 {
 
     extern u8 D_801E62E8[];
-    register s32 s3 asm("$19");
-    register s16 *s0 asm("$16");
-    register s32 *s1 asm("$17");
-    register u8 *s2 asm("$18");
+    s32 s3;
+    s16 *s0;
+    register s32 *s1 asm("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    u8 *s2;
     s16 s4;
     Buf8017BF50_8017C234 buf;
 
@@ -3869,7 +3869,7 @@ void func_8017C9BC(s32 a0) {
        permutation. */
     raw = ((s32 (*)(s32))func_8012CBA4)(a0);
     flags = raw;
-    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));
+    __asm__ __volatile__("" : "=r"(flags) : "0"(flags));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
 
     /* `m` blocks fold_truthop from merging the two bitfield tests below into a single
        `andi $v1,$s1,0xe000` -- the target keeps `& 0x8000` and `& 0x6000` separate. */
@@ -4016,7 +4016,7 @@ void func_8017C9BC(s32 a0) {
        copies vanish and everything from .L8017CD18 on drifts by 2 instructions. */
     {
         s32 fire = ret;
-        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));
+        __asm__ __volatile__("" : "=r"(ret) : "0"(ret));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         if (fire != 0) {
             func_80146A6C(2, (void *)s0, 0, 0, 0, 2, 0);
         }
diff --git a/src/ov_SC06_000/ov_SC06_000.c b/src/ov_SC06_000/ov_SC06_000.c
index 6384e643e..397053574 100644
--- a/src/ov_SC06_000/ov_SC06_000.c
+++ b/src/ov_SC06_000/ov_SC06_000.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801B20E0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801B20E0;
+        register volatile s32 *p __asm__("$4") = &D_801B20E0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801B20C0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801AD2F0[idx], D_801AD2F1[idx], D_801AD2F2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801B20C0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_000/ov_SC06_000_jr_8016AB6C.c b/src/ov_SC06_000/ov_SC06_000_jr_8016AB6C.c
index f28393bca..49fa61621 100644
--- a/src/ov_SC06_000/ov_SC06_000_jr_8016AB6C.c
+++ b/src/ov_SC06_000/ov_SC06_000_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_8018B3EC)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801AD8F0);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801AD9EC[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801ADA48[];
     extern u8 D_801ADB08;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_8018B624[];
     extern u8 D_8018B63C[];
     extern u16 D_8018B640[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c b/src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c
index a40a46ca7..2dad1ec3a 100644
--- a/src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c
+++ b/src/ov_SC06_000/ov_SC06_000_jr_8017AE2C.c
@@ -2625,8 +2625,8 @@ extern s16 D_801B20AA;
 extern s16 D_801B20B4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801B20A8;
+    s32 pv = param_1;
+    s16 *g = &D_801B20A8;
 
     switch (g[0]) {
     case 0:
@@ -2771,8 +2771,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2917,8 +2917,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2942,7 +2942,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801AE5F6;
             v790 = D_801AE5F8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801B20D8 = 1;
             D_801AE584 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801AE5CC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801AE5CC;
@@ -4012,8 +4012,8 @@ void func_8017D1E0(void *a0)
 
     extern u16 D_8018BD18[][2];
     s16 n;
-    register s32 tmp __asm__("$4");
-    register s32 t __asm__("$17");
+    register s32 tmp __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 t __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     s16 v;
     SVECTOR_8017C290 vec1;
     SVECTOR_8017C290 vec2;
@@ -4380,11 +4380,11 @@ void func_8017D900(s32 arg0) {
     u8 *p = &D_801AE668;
 
     D_801AE669 = D_801AE66A = *p = func_80012F74(*p, 0, 10, 1);
-    __asm__("");
+    __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     *(Quad_801EA880_8017D900 *)&D_801AE66C = *(Quad_801EA880_8017D900 *)p;
     *(Quad_801EA880_8017D900 *)&D_801AE670 = *(Quad_801EA880_8017D900 *)p;
     *(Quad_801EA880_8017D900 *)&D_801AE674 = *(Quad_801EA880_8017D900 *)p;
-    __asm__("");
+    __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     if (*p == 0) {
         ((void (*)(s32))func_80146C3C)(arg0);
     }
@@ -4680,7 +4680,7 @@ void func_8017E254(s32 a0) {
 extern void func_80146C3C(void);
 void func_8017E2F8(int a0) {
     int v0 = *(int *)(a0 + 0x1C);
-    register unsigned char *p __asm__("$5") = *(unsigned char **)(a0 + 0x20);
+    register unsigned char *p __asm__("$5") = *(unsigned char **)(a0 + 0x20);  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
     *(int *)(a0 + 0x1C) = v0 + 1;
     if (v0 >= 0x1F) {
         func_80146C3C();
@@ -5041,7 +5041,7 @@ void func_8017E35C(s32 arg0)
                 mxc = xmx1;
                 if (mxc < xmx2) mxc = xmx2;
                 if ((s16)mxc >= -0x6E && (s16)mnc < 0x6F) {
-                    __asm__ __volatile__ ("" :: "r" (nparts));
+                    __asm__ __volatile__ ("" :: "r" (nparts));  // !FAKE: keepalive — NEEDED DIFFERS (P36 rung B tus7)
                     prim = (Prim *)part->prim;
                     nprim = part->nprim;
                     for (i = 0; i < nprim; i++, prim++) {
@@ -5549,8 +5549,7 @@ void func_8017EF68(s32 arg0, s32 arg1, s32 arg2)
         my = wy >> 16;
         wz = part->zz;
         wq = wz >> 16;
-        __asm__("" : "=r"(wq) : "0"(wq), "r"(wz));
-        __asm__("" : "=r"(pkt) : "0"(pkt));
+        __asm__("" : "=r"(wq) : "0"(wq), "r"(wz));  // !FAKE: launder — REFUSED launder with 2 inputs (P36 rung B tus7)
         box[0].vx = mn; box[0].vy = mny; box[0].vz = wz;
         box[1].vx = mx; box[1].vy = mny; box[1].vz = wz;
         box[2].vx = mn; box[2].vy = mny; box[2].vz = wq;
@@ -5767,7 +5766,6 @@ void func_8017EF68(s32 arg0, s32 arg1, s32 arg2)
                                     }
                                     if (tmpxy[2].vx > mx) mx = tmpxy[2].vx;
                                     else if (tmpxy[2].vx < mn) mn = tmpxy[2].vx;
-                                    __asm__ __volatile__ ("" ::: "$6");
                                     if (tmpxy[0].vy > tmpxy[1].vy) {
                                         my = tmpxy[0].vy;
                                         mny = tmpxy[1].vy;
@@ -7140,7 +7138,7 @@ void func_80181AB4(s32 a0) {
     extern void func_80181CCC();
     extern void func_80181EA0();
     Blk16_80126940 sp10;
-    register s32 ang __asm__("$16");
+    register s32 ang __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s32 t;
 
     if (func_80148800(&D_80126B58) & 3) {
@@ -7169,7 +7167,7 @@ void func_80181BA4(s32 param_1)
     extern void func_80181CCC();
     extern void func_80181F14();
     Sp10_80181BA4 sp10;
-    register s32 ang __asm__("$16");
+    s32 ang;
 
     sp10 = *(Sp10_80181BA4 *)D_801274E8.b;
     ang = ratan2(sp10.m0, sp10.m2) & 0xFFF;
@@ -7186,7 +7184,7 @@ void func_80181C38(s32 param_1)
     extern void func_80181CCC();
     extern void func_80181EA0();
     Sp10_80181C38 sp10;
-    register s32 ang __asm__("$16");
+    s32 ang;
 
     sp10 = *(Sp10_80181C38 *)D_801274E8.b;
     ang = ratan2(sp10.m0, sp10.m2) & 0xFFF;
@@ -7378,12 +7376,12 @@ s32 a1;
     extern s32 D_801B20E0;
     extern s32 D_801A158C;
     extern s32 D_801AEB1C;
-    register s16 *q asm("$17");
+    register s16 *q asm("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     q = D_801AEB52;
     *q = a0;
     func_80049CAC((s32)q - 2, (s32)q - 78);
-    __asm__("" : "=r"(q) : "0"(q));
+    __asm__("" : "=r"(q) : "0"(q));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     D_801AEB1C = (s16)a1;
     *(s32 *)((s32)q - 82) = 0;
     func_8017EF68((s32)&D_801B20E0, (s32)&D_801A158C, (s32)q - 82);
@@ -7408,12 +7406,12 @@ void func_80182464(s32 a0, s32 a1)
     extern s32 D_801B20E0;
     extern s32 D_801A3A0C;
     extern s32 D_801AEB74;
-    register s16 *q asm("$17");
+    register s16 *q asm("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
 
     q = D_801AEBAA;
     *q = a0;
     func_80049CAC((s32)q - 2, (s32)q - 78);
-    __asm__("" : "=r"(q) : "0"(q));
+    __asm__("" : "=r"(q) : "0"(q));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     D_801AEB74 = (s16)a1;
     *(s32 *)((s32)q - 82) = 0;
     func_8017EF68((s32)&D_801B20E0, (s32)&D_801A3A0C, (s32)q - 82);
@@ -7452,7 +7450,7 @@ void func_80182560(void *arg0)
     extern void func_8017EF68(s32 a0, s32 a1, s32 a2);
 
     s32 *p;
-    __asm__("la %0, D_801AEBCC" : "=r"(p));
+    __asm__("la %0, D_801AEBCC" : "=r"(p));  // !FAKE: instruction la — NEEDED DIFFERS (P36 rung B tus7)
 
     p[-7] = 0;
     p[0] = D_801AEAFE;
@@ -7499,7 +7497,7 @@ void func_80182614(void *a0) {
     s32 *q;
     u16 val;
 
-    __asm__("la %0, D_801AEAFC" : "=r"(p));
+    __asm__("la %0, D_801AEAFC" : "=r"(p));  // !FAKE: instruction la — NEEDED DIFFERS (P36 rung B tus7)
     *p += 0xFFFEE000;
     if (D_801AEAFE < 0) {
         *p = 0;
@@ -7512,8 +7510,8 @@ void func_80182614(void *a0) {
         func_8013C9C4(&D_801889E4);
         *(u16 *)((s32)a0 + 0xE0) = (D_800B99DC & 7) + 3;
     }
-    __asm__("la %0, D_801B20E0" : "=r"(base));
-    __asm__("la %0, D_801AEBCC" : "=r"(q));
+    base = (s32)&D_801B20E0;
+    __asm__("la %0, D_801AEBCC" : "=r"(q));  // !FAKE: instruction la — NEEDED DIFFERS (P36 rung B tus7)
     q[-7] = 0;
     q[0] = D_801AEAFE;
     func_8017EF68((s32)base, (s32)&D_8019FD8C, (s32)q - 0x1C);
@@ -7533,7 +7531,7 @@ void func_8018270C(void) {
     extern void func_8017EF68(s32 a0, s32 a1, s32 a2);
 
     s32 *p;
-    __asm__("la %0, D_801AEBCC" : "=r"(p));
+    __asm__("la %0, D_801AEBCC" : "=r"(p));  // !FAKE: instruction la — NEEDED DIFFERS (P36 rung B tus7)
 
     p[-7] = 0;
     p[0] = D_801AEAFE;
@@ -7580,7 +7578,7 @@ void func_801827F4(void) {
 
 void func_80182828(void *a0, s32 a1)
 {
-    register s32 offset __asm__("$2");
+    s32 offset;
     s16 buf[4];
     u16 t0, t1, t2, t3;
     u16 *ptr;
@@ -8156,7 +8154,7 @@ void func_801835B0(void *a0, s32 a1)
 
     end = a1 + 8;
     do {
-        __asm__("");__asm__("");__asm__("");__asm__("");__asm__("");__asm__("");__asm__("");
+        __asm__("");__asm__("");__asm__("");__asm__("");__asm__("");__asm__("");__asm__("");  // !FAKE: barrier — NEEDED DIFFERS; barrier — NEEDED DIFFERS; barrier — NEEDED DIFFERS; barrier — NEEDED DIFFERS; barrier — NEEDED DIFFERS; barrier — NEEDED DIFFERS; barrier — NEEDED DIFFERS (P36 rung B tus7)
         *(u16 *)((s32)a0 + 0xFC) = *(u16 *)(a1 + 2);
         ret = func_8012C658(0x268, *(s16 *)(a1 + 0), (s32)a0);
         v1 = *(s16 *)((s32)a0 + 0x70);
@@ -8486,7 +8484,7 @@ extern s32 D_8018C8C4;
 
 void func_80183DAC(void *arg0)
 {
-    register void *self __asm__("$16") = arg0;
+    register void *self __asm__("$16") = arg0;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s32 h;
 
     h = ((s32 (*)(void))func_8012C1B8)();
@@ -8525,7 +8523,7 @@ void func_80183E48(void *a0)
                mp,
                (void *)(*(s32 *)((s32)a0 + 0x20) + 0x34));
 
-    *(volatile u16 *)(*(volatile s32 *)((s32)a0 + 0x20) + 0x2C) |= 1;
+    *(u16 *)(*(s32 *)((s32)a0 + 0x20) + 0x2C) |= 1;
 }
 
 
@@ -8559,8 +8557,8 @@ extern void (*D_8018CAA8[])(void *);
 
 void func_80183F38(void *a0)
 {
-    register void *self __asm__("$16") = a0;
-    register void *obj  __asm__("$17");
+    void *self = a0;
+    void *obj;
     s32 h;
     s32 pad[8];
 
@@ -8691,14 +8689,14 @@ void func_801842CC(s32 arg0)
         if (a1 == 0)
             continue;
         {
-            register s32 v0 __asm__("v0");
-            register s32 v1 __asm__("v1");
-            register s32 a0 __asm__("a0");
+            s32 v0;
+            register s32 v1 __asm__("v1");  // !FAKE: pin v1 — NEEDED DIFFERS (P36 rung B tus7)
+            register s32 a0 __asm__("a0");  // !FAKE: pin a0 — NEEDED DIFFERS (P36 rung B tus7)
             v0 = *(u16 *)(arg0 + 0x84);
             a0 = *(u16 *)(a1 + 0xE);
             v0 &= 0x4;
             v1 = v0 * 2;
-            __asm__("":"=r"(v1):"0"(v1));
+            __asm__("":"=r"(v1):"0"(v1));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
             v1 = v1 + v0;
             v1 = s0 + v1;
             v1 = v1 - 0x2A;
@@ -8730,8 +8728,8 @@ void func_801842CC(s32 arg0)
 void func_80184398(s32 a0) {
 
     extern u8 D_8018C9DC[];
-    register s32 obj  __asm__("$16");            /* $s0 */
-    register s32 self __asm__("$17") = a0;       /* $s1 */
+    s32 obj;            /* $s0 */
+    register s32 self __asm__("$17") = a0;       /* $s1 */  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     s32 t0;
     s32 t1;
     s32 t2;
@@ -8841,7 +8839,7 @@ extern u16 D_80126B66;
 
 void func_801845CC(int a0)
 {
-    register s32 s0 __asm__("$16") = a0;
+    s32 s0 = a0;
     u8 *ptr;
     s32 val1;
     s32 val2;
@@ -8899,10 +8897,10 @@ extern void (*D_8018CB50[])(void);
 
 void func_801846F8(s32 a0) {
     u32 i;
-    register s32 ptr __asm__("$3");
-    register s32 obj __asm__("$4");
+    s32 ptr;
+    s32 obj;
     s16 val;
-    register s32 val2 __asm__("$3");
+    s32 val2;
 
     for (i = 0; i < 8; i++) {
         if (*(u16 *)(a0 + 0x5E) == D_8018CC30[i]) {
@@ -8975,7 +8973,7 @@ void func_80184870(s32 arg0) {
 int func_801848A4(int a0, void* a1)
 {
     s16 stack_buf[8];
-    register s16 *s0 __asm__("$16") = (s16 *)a1;
+    register s16 *s0 __asm__("$16") = (s16 *)a1;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s16 v0;
     s32 result;
     s32 ret;
@@ -9066,9 +9064,9 @@ void func_80184A5C(void *a0) {
 extern u8 D_801AECC5;
 
 void func_80184A68(void) {
-    register u8 *a0 __asm__("a0");
+    u8 *a0;
     a0 = &D_801AECC5;
-    __asm__("" : "=r"(a0) : "0"(a0));
+    __asm__("" : "=r"(a0) : "0"(a0));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     if (a0[0] < 0xF8U) {
         a0[0] += 4;
         a0[-1] += 6;
@@ -9364,8 +9362,8 @@ extern void func_800233CC(void *, unsigned short);
 void func_80185028(a0)
 s32 a0;
 {
-    register u8 *s0 __asm__("$16");
-    register s32 *s1 __asm__("$17");
+    u8 *s0;
+    s32 *s1;
     s32 *v1;
     s32 *a0_ptr;
     s8 pad[32];  
@@ -9431,7 +9429,7 @@ void func_8018514C(void) {
 extern void func_80184A68(void);
 
 void func_8018516C(int param_1) {
-    register int p __asm__("$4");
+    int p;
     p = *(int *)(param_1 + 0x20);
     if (*(short *)(p + 0x18) < 0x5000) {
         *(short *)(p + 0x18) = *(short *)(p + 0x18) + 0x800;
@@ -9515,7 +9513,7 @@ extern s32 rand(void);
 void func_80185354(void *param_1)
 {
     s32 i;
-    register u8 *e __asm__("$16");
+    register u8 *e __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     u32 vA, vB;
 
     i = 0;
@@ -9544,8 +9542,8 @@ extern s32 rand(void);
 
 void func_801853F0(s32 arg0)
 {
-    register s32 i __asm__("$17");
-    register s32 off __asm__("$18");
+    s32 i;
+    s32 off;
     u8 *e;
 
     i = 0;
@@ -9595,7 +9593,7 @@ void func_80185520(void *a0) {
     s1 = rand();
     t = rand();
     idx = ((s0 & 3) << 10) + (s1 & 3) * 341 + (t & 0xF) * 11;
-    __asm__ __volatile__("");
+    __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     *(u16 *)((s32)a0 + 0x14) = 0x2E0;
     *(u16 *)((s32)a0 + 0x0C) = 0x2E0;
     *(u16 *)((s32)a0 + 0x02) = idx;
@@ -10846,10 +10844,10 @@ void func_80186B70(s32 arg0)
     s32 ot;
     u16 bx;
     u16 by;
-    register s32 ang __asm__("$4");      /* §17 pin — see residual (a) */
+    register s32 ang __asm__("$4");      /* §17 pin — see residual (a) */  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
     volatile u16 *bidx;
     s32 t;
-    register u32 pv __asm__("$3");       /* §17 pin — see residual (b) */
+    register u32 pv __asm__("$3");       /* §17 pin — see residual (b) */  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     m = D_800AE620;
     mp = &m;
@@ -10900,7 +10898,7 @@ void func_80186B70(s32 arg0)
     *(s16 *)(p + 0x1A) = by;
 
     /* addPrim(otp, p) == setaddr(p, getaddr(otp)), setaddr(otp, p) */
-    bidx = (volatile u16 *)&D_800B9A02;
+    bidx = (u16 *)&D_800B9A02;
     pv = *(u32 *)p;
     *(u32 *)p = (pv & 0xFF000000) |
                 (*(u32 *)(*(s32 *)((u8 *)&D_800A651C +
@@ -10908,7 +10906,7 @@ void func_80186B70(s32 arg0)
     ot = *(s32 *)((u8 *)&D_800A651C + (*bidx * 20));
     *(u32 *)(ot + 0x40) = (*(u32 *)(ot + 0x40) & 0xFF000000) | ((u32)p & 0xFFFFFF);
     func_80016638(&D_800A6518[*bidx * 20], 0x10, 1);
-    __asm__ __volatile__("" : "=r"(pv));   /* zero-byte 2nd SET: kills the sched1 birthing boost */
+    __asm__ __volatile__("" : "=r"(pv));   /* zero-byte 2nd SET: kills the sched1 birthing boost */  // !FAKE: launder out-only — NEEDED DIFFERS (P36 rung B tus7)
 }
 
 
@@ -11328,8 +11326,8 @@ void func_80187314(s32 a0) {
         void *svp = sv;
         void *outp = out;
         ApplyMatrixSV(m, svp, outp);
-        __asm__ __volatile__("" : "=r"(svp));
-        __asm__ __volatile__("" : "=r"(outp));
+        __asm__ __volatile__("" : "=r"(svp));  // !FAKE: launder out-only — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(outp));  // !FAKE: launder out-only — NEEDED DIFFERS (P36 rung B tus7)
     }
 
     *(s16 *)(q + 0x8) = x + ((s16)out[0] >> 1) * 3;
@@ -11350,7 +11348,7 @@ void func_80187314(s32 a0) {
     *(s16 *)(sv + 0) = 2;
     {
         /* lever C: sp+0x10 IS &m, but spelled so cse cannot fold it to $s4 */
-        register u8 *spr __asm__("$29");
+        register u8 *spr __asm__("$29");  // !FAKE: pin $29 — NEEDED DIFFERS (P36 rung B tus7)
         ApplyMatrixSV(spr + 0x10, sv, out);
     }
 
@@ -11605,7 +11603,7 @@ void func_80187AB8(void *a0) {
 
     s1 = (s32 *)a0;
     v0_const = 0x0B;
-    __asm__("");
+    __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
     s0 = *(s32 **)((u8 *)s1 + 0x20);
 
     
@@ -11734,8 +11732,8 @@ void func_80187B34(void *a0)
     u8 *pkb;
     s32 d;
     u32 *otp;
-    register u32 tv __asm__("$3");       /* §137 pin — see header */
-    register u32 tv2 __asm__("$4");      /* §137 pin — see header */
+    register u32 tv __asm__("$3");       /* §137 pin — see header */  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 tv2 __asm__("$4");      /* §137 pin — see header */  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
 
     u8 *rotm;
 
diff --git a/src/ov_SC06_006/ov_SC06_006.c b/src/ov_SC06_006/ov_SC06_006.c
index 5cd1a2012..edec488b3 100644
--- a/src/ov_SC06_006/ov_SC06_006.c
+++ b/src/ov_SC06_006/ov_SC06_006.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801F8AF8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801F8AF8;
+        register volatile s32 *p __asm__("$4") = &D_801F8AF8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801F8AD8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801F6D38[idx], D_801F6D39[idx], D_801F6D3A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801F8AD8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_006/ov_SC06_006_jr_8016AB6C.c b/src/ov_SC06_006/ov_SC06_006_jr_8016AB6C.c
index b72ea56ad..4eec4d9ea 100644
--- a/src/ov_SC06_006/ov_SC06_006_jr_8016AB6C.c
+++ b/src/ov_SC06_006/ov_SC06_006_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80184F10)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801F7338);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801F7434[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801F7490[];
     extern u8 D_801F7550;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_80185148[];
     extern u8 D_80185160[];
     extern u16 D_80185164[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_006/ov_SC06_006_jr_8017AE2C.c b/src/ov_SC06_006/ov_SC06_006_jr_8017AE2C.c
index 1a5bb233f..8b0ef4f54 100644
--- a/src/ov_SC06_006/ov_SC06_006_jr_8017AE2C.c
+++ b/src/ov_SC06_006/ov_SC06_006_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801F8AC2;
 extern s16 D_801F8ACC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801F8AC0;
+    s32 pv = param_1;
+    s16 *g = &D_801F8AC0;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801F803E;
             v790 = D_801F8040;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801F8AF4 = 1;
             D_801F7FCC = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801F8014[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801F8014;
diff --git a/src/ov_SC06_008/ov_SC06_008.c b/src/ov_SC06_008/ov_SC06_008.c
index 2b49da37f..1f0abb5ae 100644
--- a/src/ov_SC06_008/ov_SC06_008.c
+++ b/src/ov_SC06_008/ov_SC06_008.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801AA7C8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801AA7C8;
+        register volatile s32 *p __asm__("$4") = &D_801AA7C8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801AA7A8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801A8CB8[idx], D_801A8CB9[idx], D_801A8CBA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801AA7A8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_008/ov_SC06_008_jr_8016AB6C.c b/src/ov_SC06_008/ov_SC06_008_jr_8016AB6C.c
index 167cce0fe..90448c630 100644
--- a/src/ov_SC06_008/ov_SC06_008_jr_8016AB6C.c
+++ b/src/ov_SC06_008/ov_SC06_008_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80188978)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801A92B8);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801A93B4[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801A9410[];
     extern u8 D_801A94D0;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_80188BB0[];
     extern u8 D_80188BC8[];
     extern u16 D_80188BCC[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_008/ov_SC06_008_jr_8017AE2C.c b/src/ov_SC06_008/ov_SC06_008_jr_8017AE2C.c
index 34086268f..ec3116742 100644
--- a/src/ov_SC06_008/ov_SC06_008_jr_8017AE2C.c
+++ b/src/ov_SC06_008/ov_SC06_008_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801AA792;
 extern s16 D_801AA79C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801AA790;
+    s32 pv = param_1;
+    s16 *g = &D_801AA790;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801A9FBE;
             v790 = D_801A9FC0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801AA7C0 = 1;
             D_801A9F4C = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801A9F94[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801A9F94;
diff --git a/src/ov_SC06_010/ov_SC06_010.c b/src/ov_SC06_010/ov_SC06_010.c
index ec103fcf1..435325527 100644
--- a/src/ov_SC06_010/ov_SC06_010.c
+++ b/src/ov_SC06_010/ov_SC06_010.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801B2C10 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801B2C10;
+        register volatile s32 *p __asm__("$4") = &D_801B2C10;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801B2BF0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801B0CF0[idx], D_801B0CF1[idx], D_801B0CF2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801B2BF0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_010/ov_SC06_010_jr_8016AB6C.c b/src/ov_SC06_010/ov_SC06_010_jr_8016AB6C.c
index 69c2e5d05..610d3a248 100644
--- a/src/ov_SC06_010/ov_SC06_010_jr_8016AB6C.c
+++ b/src/ov_SC06_010/ov_SC06_010_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80189B54)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801B12F0);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801B13EC[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801B1448[];
     extern u8 D_801B1508;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_80189D8C[];
     extern u8 D_80189DA4[];
     extern u16 D_80189DA8[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c b/src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c
index 2cc911102..ab3c2176c 100644
--- a/src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c
+++ b/src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c
@@ -2789,8 +2789,8 @@ void func_8017AE2C(s32 param_1) {
     extern s16 D_801B2BD8;
     extern s16 D_801B2BDA;
     extern s16 D_801B2BE4;
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801B2BD8;
+    s32 pv = param_1;
+    s16 *g = &D_801B2BD8;
 
     switch (g[0]) {
     case 0:
@@ -2938,8 +2938,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -3084,8 +3084,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -3109,7 +3109,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801B1FF6;
             v790 = D_801B1FF8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801B2C08 = 1;
             D_801B1F84 = 0x1E;
             D_80126990 = v794;
@@ -3375,8 +3375,8 @@ extern void (*D_801B1FCC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801B1FCC;
@@ -3898,7 +3898,7 @@ void func_8017BEBC(s32 arg0)
                         i++;
                         prim++;
                     } while (i < nprim);
-                    __asm__ __volatile__("" : "=r"(m24) : "0"(m24));
+                    __asm__ __volatile__("" : "=r"(m24) : "0"(m24));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
                   noprim: ;
                 }
             }
@@ -4397,7 +4397,7 @@ void func_8017CAD4(s32 *ctx, s32 *model, s32 mtxsrc)
                         i++;
                         prim++;
                     } while (i < nprim);
-                    __asm__ __volatile__("" : "=r"(m24) : "0"(m24));
+                    __asm__ __volatile__("" : "=r"(m24) : "0"(m24));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
                   noprim: ;
                 }
             }
@@ -4661,8 +4661,8 @@ void func_8017DA20(int param_1)
 {
 
     extern unsigned char D_801B203C[];
-    register int iVar3 __asm__("$16");
-    register int iVar3b __asm__("$19");
+    register int iVar3 __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    register int iVar3b __asm__("$19");  // !FAKE: pin $19 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     short sVar2;
 
@@ -4749,8 +4749,8 @@ void func_8017DBE4(s32 *param_1)
 
     extern s8 D_801B2028;
   int new_var;
-register s32 p __asm__("$4");
-register s32 r __asm__("$3");
+register s32 p __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+s32 r;
   p = (s32) (&D_801B2028);
   r = param_1[0x2c / 4];
   new_var = r;
@@ -5303,7 +5303,7 @@ void func_8017E764(s32 param_1)
     ent = D_801202A0;
     pos[0] = *(u16 *)(param_1 + 6);
     {
-        register u16 *vp __asm__("$3");
+        register u16 *vp __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
         u16 t;
         vp = (u16 *)&D_80126B66;
         t = *(volatile u16 *)vp;
@@ -5502,12 +5502,12 @@ extern void (*D_8018AFBC[])(void);
 extern void func_8012B2CC(s32 a0);
 
 void func_8017F024(s32 a0) {
-    register s32 *p __asm__("$2");
+    register s32 *p __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
     s32 self;
 
     D_8018AFBC[*(u16 *)(a0 + 2)]();
     if (*(u16 *)a0 != 0) {
-        __asm__ __volatile__("" : "=r"(self) : "0"(a0));
+        __asm__ __volatile__("" : "=r"(self) : "0"(a0));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         p = *(s32 **)(a0 + 0x20);
         p[1] |= 0x80000000;
         func_8012B2CC(self);
@@ -5579,7 +5579,7 @@ void func_8017F10C(s32 a0, s32 a1)
         s32 flag;    /* sp+0x20 */
     } L;
 
-    register s32 sid __asm__("$18");
+    register s32 sid __asm__("$18");  // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B tus7)
     void *snd = &D_800AF648;
 
     L.v[0] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x48);
@@ -5615,9 +5615,9 @@ void func_8017F10C(s32 a0, s32 a1)
 void func_8017F278(void *arg0) {
     extern void func_8017F10C(s32 a0, s32 a1);
     s32 pad_[5];
-    register u8 *s0 __asm__("$16");
-    register s32 v1 __asm__("$3");
-    register s32 cool __asm__("$2");
+    u8 *s0;
+    s32 v1;
+    s32 cool;
     s32 old;
     s32 iVar2;
     u32 uVar1;
@@ -5641,7 +5641,7 @@ L_dec:
 
 L_join:
     *(s16 *)(s0 + 0x84) = cool;
-    __asm__ __volatile__("" ::: "memory");
+    __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
 
     *(u16 *)(s0 + 0xFC) = *(u16 *)(s0 + 0xFC) + 0x280;
     *(u16 *)(s0 + 0xFE) = *(u16 *)(s0 + 0xFE) - 0x280;
@@ -5658,11 +5658,11 @@ L_join:
     *(u16 *)(iVar2 + 0x12) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x12) + *(u16 *)(s0 + 0xFC);
     *(u16 *)(iVar2 + 0x14) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x14);
     if (*(s32 *)(*(s32 *)(s0 + 0x20) + 0x4) < 0) {
-        register u32 val __asm__("$2");
+        register u32 val __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
         val = *(u32 *)(iVar2 + 0x4);
         uVar1 = val | 0x80000000;
     } else {
-        __asm__ __volatile__("");
+        __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         uVar1 = *(u32 *)(iVar2 + 0x4) & 0x7FFFFFFF;
     }
     *(u32 *)(iVar2 + 0x4) = uVar1;
@@ -5675,11 +5675,11 @@ L_join:
     *(u16 *)(iVar2 + 0x12) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x12) + *(u16 *)(s0 + 0xFE);
     *(u16 *)(iVar2 + 0x14) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x14);
     if (*(s32 *)(*(s32 *)(s0 + 0x20) + 0x4) < 0) {
-        register u32 val __asm__("$2");
+        register u32 val __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
         val = *(u32 *)(iVar2 + 0x4);
         uVar1 = val | 0x80000000;
     } else {
-        __asm__ __volatile__("");
+        __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         uVar1 = *(u32 *)(iVar2 + 0x4) & 0x7FFFFFFF;
     }
     *(u32 *)(iVar2 + 0x4) = uVar1;
@@ -5717,11 +5717,11 @@ void func_8017F438(s32 param_1) {
         *(u16 *)(p + 0x14) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x14);
         q = *(s32 *)(s0 + 0x20);
         if (*(s32 *)(q + 4) < 0) {
-            register u32 val __asm__("$2");
+            register u32 val __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
             val = *(u32 *)(p + 4);
             uVar1 = val | 0x80000000;
         } else {
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             uVar1 = *(u32 *)(p + 4) & 0x7FFFFFFF;
         }
         *(u32 *)(p + 4) = uVar1;
@@ -5735,11 +5735,11 @@ void func_8017F438(s32 param_1) {
         *(u16 *)(p + 0x14) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x14);
         q = *(s32 *)(s0 + 0x20);
         if (*(s32 *)(q + 4) < 0) {
-            register u32 val __asm__("$2");
+            register u32 val __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
             val = *(u32 *)(p + 4);
             uVar1 = val | 0x80000000;
         } else {
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             uVar1 = *(u32 *)(p + 4) & 0x7FFFFFFF;
         }
         *(u32 *)(p + 4) = uVar1;
@@ -5833,11 +5833,11 @@ void func_8017F600(s32 param_1) {
         *(u16 *)(p + 0x14) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x14);
         q = *(s32 *)(s0 + 0x20);
         if (*(s32 *)(q + 4) < 0) {
-            register u32 val __asm__("$2");
+            register u32 val __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
             val = *(u32 *)(p + 4);
             uVar1 = val | 0x80000000;
         } else {
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             uVar1 = *(u32 *)(p + 4) & 0x7FFFFFFF;
         }
         *(u32 *)(p + 4) = uVar1;
@@ -5851,11 +5851,11 @@ void func_8017F600(s32 param_1) {
         *(u16 *)(p + 0x14) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x14);
         q = *(s32 *)(s0 + 0x20);
         if (*(s32 *)(q + 4) < 0) {
-            register u32 val __asm__("$2");
+            register u32 val __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
             val = *(u32 *)(p + 4);
             uVar1 = val | 0x80000000;
         } else {
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             uVar1 = *(u32 *)(p + 4) & 0x7FFFFFFF;
         }
         *(u32 *)(p + 4) = uVar1;
@@ -5964,8 +5964,8 @@ void func_8017FAAC(EntFAAC *s0) {
     }
 
     if (s0->f0 != 0) {
-        COPY_TO_FAAC(s0->fCC, s0->fFC);
-        COPY_TO_FAAC(s0->fD0, s0->fFE);
+        COPY_TO_FAAC(s0->fCC, s0->fFC);  // !FAKE: barrier via COPY_TO_FAAC — REFUSED macro-carried barrier: the lever is inside `#define COPY_TO_FAAC` with real code around it (T5) (P36 rung B tus7)
+        COPY_TO_FAAC(s0->fD0, s0->fFE);  // !FAKE: barrier via COPY_TO_FAAC — REFUSED macro-carried barrier: the lever is inside `#define COPY_TO_FAAC` with real code around it (T5) (P36 rung B tus7)
     }
 }
 
@@ -5998,11 +5998,11 @@ void func_8017FC80(s32 param_1) {
         *(u16 *)(p + 0x14) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x14);
         q = *(s32 *)(s0 + 0x20);
         if (*(s32 *)(q + 4) < 0) {
-            register u32 val __asm__("$2");
+            register u32 val __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
             val = *(u32 *)(p + 4);
             uVar1 = val | 0x80000000;
         } else {
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             uVar1 = *(u32 *)(p + 4) & 0x7FFFFFFF;
         }
         *(u32 *)(p + 4) = uVar1;
@@ -6016,11 +6016,11 @@ void func_8017FC80(s32 param_1) {
         *(u16 *)(p + 0x14) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x14);
         q = *(s32 *)(s0 + 0x20);
         if (*(s32 *)(q + 4) < 0) {
-            register u32 val __asm__("$2");
+            register u32 val __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
             val = *(u32 *)(p + 4);
             uVar1 = val | 0x80000000;
         } else {
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             uVar1 = *(u32 *)(p + 4) & 0x7FFFFFFF;
         }
         *(u32 *)(p + 4) = uVar1;
@@ -6075,7 +6075,7 @@ void func_8017FE3C(s32 a0)
     state = *(u16 *)(a0 + 0x34);
     switch (state) {
     case 0: {
-        register s32 p20 __asm__("$4");
+        register s32 p20 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         s32 ret;
         s32 p744;
         s32 v1p;
@@ -6371,11 +6371,11 @@ void func_801805D0(u8 *s0)
         *(u16 *)(p + 0x14) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x14);
         q = *(s32 *)(s0 + 0x20);
         if (*(s32 *)(q + 4) < 0) {
-            register u32 val __asm__("$2");
+            register u32 val __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
             val = *(u32 *)(p + 4);
             uVar1 = val | 0x80000000;
         } else {
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             uVar1 = *(u32 *)(p + 4) & 0x7FFFFFFF;
         }
         *(u32 *)(p + 4) = uVar1;
@@ -6389,11 +6389,11 @@ void func_801805D0(u8 *s0)
         *(u16 *)(p + 0x14) = *(u16 *)(*(s32 *)(s0 + 0x20) + 0x14);
         q = *(s32 *)(s0 + 0x20);
         if (*(s32 *)(q + 4) < 0) {
-            register u32 val __asm__("$2");
+            register u32 val __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
             val = *(u32 *)(p + 4);
             uVar1 = val | 0x80000000;
         } else {
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             uVar1 = *(u32 *)(p + 4) & 0x7FFFFFFF;
         }
         *(u32 *)(p + 4) = uVar1;
@@ -6623,8 +6623,8 @@ extern void func_8017CAD4(s32*, s32*, s32);
 
 s32 func_80180A88(void)
 {
-    register s16 *p __asm__("$16");
-    register s16 *q __asm__("$6");
+    register s16 *p __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 *q;
 
     switch (D_801B2BF4) {
     case 0:
@@ -6807,11 +6807,11 @@ void aF8017ED80(void *param_1) {
         *(u16 *)(iVar2 + 0x1A) = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A);
         *(u16 *)(iVar2 + 0x1C) = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C);
         if (*(s32 *)(*(s32 *)(a0 + 0x20) + 0x4) < 0) {
-            register u32 val __asm__("$2");
+            register u32 val __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
             val = *(u32 *)(iVar2 + 0x4);
             uVar1 = val | 0x80000000;
         } else {
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             uVar1 = *(u32 *)(iVar2 + 0x4) & 0x7FFFFFFF;
         }
         *(u32 *)(iVar2 + 0x4) = uVar1;
@@ -6827,11 +6827,11 @@ void aF8017ED80(void *param_1) {
         *(u16 *)(iVar2 + 0x1A) = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A);
         *(u16 *)(iVar2 + 0x1C) = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C);
         if (*(s32 *)(*(s32 *)(a0 + 0x20) + 0x4) < 0) {
-            register u32 val __asm__("$2");
+            register u32 val __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
             val = *(u32 *)(iVar2 + 0x4);
             uVar1 = val | 0x80000000;
         } else {
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             uVar1 = *(u32 *)(iVar2 + 0x4) & 0x7FFFFFFF;
         }
         *(u32 *)(iVar2 + 0x4) = uVar1;
@@ -6916,8 +6916,8 @@ void aF8017EF54(s32 a0)
         s32 pad2[2]; /* sp+0x24 -- dead, sizes the frame */
     } L;
 
-    register s32 v1 __asm__("$3");
-    register s32 cool __asm__("$2");
+    s32 v1;
+    s32 cool;
     s32 old;
 
     if (*(u16 *)(a0 + 0x0) == 0) {
@@ -6933,8 +6933,8 @@ void aF8017EF54(s32 a0)
     L.v[0] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x48);
     L.v[1] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x4C);
     L.v[2] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x50);
-    { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); }
-    { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_800491AC(r4); }
+    { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); }  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    { void *r4; r4 = &D_800AF648; func_800491AC(r4); }
     RotTransPers((s32)L.v, (s32)L.sxy, &L.z, &L.flag);
 
     if (L.flag < 0) {
@@ -6975,7 +6975,7 @@ L_dec:
 
 L_join:
     *(s16 *)(a0 + 0x84) = cool;
-    __asm__ __volatile__("" ::: "memory");
+    __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
 
     {
         s32 p = a0;
@@ -7094,13 +7094,13 @@ void func_8018179C(s32 a0)
     state = *(u16 *)(a0 + 0x34);
     switch (state) {
     case 0: {
-        register s32 s0v __asm__("$16");
+        register s32 s0v __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
         s32 ret;
         s32 p744;
         s32 v1p;
         s16 snd;
         s32 b608;
-        register s32 p20 __asm__("$4");
+        register s32 p20 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
 
         s0v = a0 + 0x88;
         ret = ((s32 (*)(s32, u16 *))func_8012BE98)(a0, (u16 *)s0v);
@@ -7158,7 +7158,7 @@ void func_8018179C(s32 a0)
         break;
     }
     case 3: {
-        register s32 s2v __asm__("$18");
+        s32 s2v;
         s32 ret;
         s32 p744;
         s32 v1p;
@@ -7281,8 +7281,8 @@ void func_80181AD8(s32 param_1)
             L.rv[0] = *(s32 *)(*(s32 *)(param_1 + 0x20) + 0x48);
             L.rv[1] = *(s32 *)(*(s32 *)(param_1 + 0x20) + 0x4C);
             L.rv[2] = *(s32 *)(*(s32 *)(param_1 + 0x20) + 0x50);
-            { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); }
-            { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_800491AC(r4); }
+            { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); }  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+            { void *r4; r4 = &D_800AF648; func_800491AC(r4); }
             RotTransPers((s32)L.rv, (s32)L.sxy, &L.z, &L.flag);
             if (L.flag >= 0 && (u32)((L.sxy[0] + 0xEF) & 0xFFFF) < 0x1DF
                           && (u32)((L.sxy[1] + 0xB3) & 0xFFFF) < 0x167) {
@@ -7294,7 +7294,6 @@ void func_80181AD8(s32 param_1)
                     ax = -x;
                 }
                 ax = ((0xF0 - ax) * 0x7F) / 0xF0;
-                __asm__("" : "=r"(ax) : "0"(ax));
                 x = (x + 0xF0) / 0x1E;
                 if (x == 0x10) {
                     x = 0xF;
@@ -7372,7 +7371,7 @@ void func_80181D80(s32 a0)
 
             t = *(u16 *)(a0 + 0x34);
             {
-                register s16 z __asm__("$3");
+                register s16 z __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
                 t = t + 1;
                 z = D_80126B66;
                 *(u16 *)(a0 + 0x34) = t;
@@ -7512,7 +7511,7 @@ void func_80181FC4(s32 a0)
 
     *(s32 *)(a0 + 0xdc) = *(s32 *)(a0 + 0x14);
     if ((((s32 (*)(s32))func_8012CBCC)(a0)) & 0x6000) {
-        register s32 negdc __asm__("$2");
+        register s32 negdc __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
         negdc = -*(s32 *)(a0 + 0xdc);
         v1 = *(u16 *)(a0 + 0xac);
         v1 -= 1;
@@ -8003,7 +8002,7 @@ s32 func_80182A2C(s32 param_1) {
     /* pool-alloc: gcc routes the loaded pointer through a caller-saved reg ($v0)
        before the callee-saved home ($s1) — pin it to reproduce the extra move. */
     {
-        register char *tmp __asm__("$2");
+        register char *tmp __asm__("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
         tmp = D_801A6A2C;
         puVar2 = tmp;
     }
@@ -8023,7 +8022,7 @@ s32 func_80182A2C(s32 param_1) {
         (s32)(s16)uVar3 - (s32)*(s16 *)((char *)&s50 + 2) < 0x80) {
         *(s16 *)((char *)&s50 + 2) = *(s16 *)((char *)&s50 + 2) - 4;
         {
-            register char *tmp __asm__("$3");
+            register char *tmp __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             tmp = D_801A6A2C;
             puVar2 = tmp;
         }
@@ -8057,7 +8056,7 @@ extern void func_8012C218(void *a0);
 s32 func_80182C70(s32 param_1) {
 
     extern signed char D_801A69E4[];
-    register int self __asm__("$17") = ((int)param_1);
+    int self = ((int)param_1);
     int iVar6;
     int iVar1;
     unsigned char buf[0x34];
@@ -8144,7 +8143,7 @@ s32 func_80182C70(s32 param_1) {
         *(short *)(self + 0x70) = *(short *)(self + 0x70) >> 1;
         *(unsigned short *)(iVar6 + 0x2c) |= 1;
     } else {
-        __asm__ __volatile__("" : "=r"(self) : "0"(self));
+        __asm__ __volatile__("" : "=r"(self) : "0"(self));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         func_8012C218((void *)self);
     }
 }
@@ -8317,8 +8316,8 @@ void func_8018315C(s32 a0)
         L.rv[0] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x48);
         L.rv[1] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x4C);
         L.rv[2] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x50);
-        { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); }
-        { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_800491AC(r4); }
+        { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); }  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+        { void *r4; r4 = &D_800AF648; func_800491AC(r4); }
         RotTransPers((s32)L.rv, (s32)L.sxy, &L.z, &L.flag);
         if (L.flag >= 0 && (u32)((L.sxy[0] + 0xEF) & 0xFFFF) < 0x1DF
                       && (u32)((L.sxy[1] + 0xB3) & 0xFFFF) < 0x167) {
@@ -8330,7 +8329,6 @@ void func_8018315C(s32 a0)
                 ax = -x;
             }
             ax = ((0xF0 - ax) * 0x7F) / 0xF0;
-            __asm__("" : "=r"(ax) : "0"(ax));
             x = (x + 0xF0) / 0x1E;
             if (x == 0x10) {
                 x = 0xF;
@@ -8584,7 +8582,7 @@ void func_80183884(s32 a0) {
      * $16 makes $s0 "already dirty" in find_reg pass 0: the a0 copy conflicts
      * with it and opens $s1, and case 3's `d` (which does NOT conflict with
      * `tbl`) grabs $s0 in pass 0 — exactly the target's assignment. */
-    register s32 tbl __asm__("$16");
+    register s32 tbl __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     s32 ns;
 
     tbl = (s32)D_801A71A4;
@@ -8752,9 +8750,9 @@ void func_80183B10(s32 a0) {
         idx = ang / 0x100;
         m = (s16)(idx % 0x10);
         if (ang == 0x100) {
-            RTP_SND(0x95F)
+            RTP_SND(0x95F)  // !FAKE: instruction via RTP_SND — REFUSED macro-carried instruction: the lever is inside `#define RTP_SND` with real code around it (T5) (P36 rung B tus7)
         } else if (m == 0) {
-            RTP_SND(0x960)
+            RTP_SND(0x960)  // !FAKE: instruction via RTP_SND — REFUSED macro-carried instruction: the lever is inside `#define RTP_SND` with real code around it (T5) (P36 rung B tus7)
         }
         *(s32 *)(*(s32 *)(a0 + 0x20) + 0x20) = D_801A7008[m];
         c = *(u16 *)(a0 + 0x100) - 1;
@@ -8833,8 +8831,8 @@ void func_80183FD4(s32 a0) {
         L.v[0] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x48);
         L.v[1] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x4C);
         L.v[2] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x50);
-        { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); }
-        { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_800491AC(r4); }
+        { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); }  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+        { void *r4; r4 = &D_800AF648; func_800491AC(r4); }
         RotTransPers((s32)L.v, (s32)L.sxy, &L.z, &L.flag);
         if (L.flag >= 0 && (u32)((L.sxy[0] + 0xEF) & 0xFFFF) < 0x1DF
                         && (u32)((L.sxy[1] + 0xB3) & 0xFFFF) < 0x167) {
@@ -8955,8 +8953,8 @@ L_B:
     L.v[0] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x48);
     L.v[1] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x4C);
     L.v[2] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x50);
-    { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); }
-    { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_800491AC(r4); }
+    { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); }  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    { void *r4; r4 = &D_800AF648; func_800491AC(r4); }
     RotTransPers((s32)L.v, (s32)L.sxy, &L.z, &L.flag);
     if (L.flag >= 0 && (u32)((L.sxy[0] + 0xEF) & 0xFFFF) < 0x1DF
                     && (u32)((L.sxy[1] + 0xB3) & 0xFFFF) < 0x167) {
@@ -9058,8 +9056,8 @@ void func_80184394(s32 a0)
                     L.v[0] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x48);
                     L.v[1] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x4C);
                     L.v[2] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x50);
-                    { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); }
-                    { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_800491AC(r4); }
+                    { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); }  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+                    { void *r4; r4 = &D_800AF648; func_800491AC(r4); }
                     RotTransPers((s32)L.v, (s32)L.sxy, &L.z, &L.flag);
                     if (L.flag >= 0 && (u32)((L.sxy[0] + 0xEF) & 0xFFFF) < 0x1DF
                                     && (u32)((L.sxy[1] + 0xB3) & 0xFFFF) < 0x167) {
@@ -9070,7 +9068,6 @@ void func_80184394(s32 a0)
                             ax = -x;
                         }
                         ax = ((0xF0 - ax) * 0x7F) / 0xF0;
-                        __asm__("" : "=r"(ax) : "0"(ax));
                         x = (x + 0xF0) / 0x1E;
                         if (x == 0x10) {
                             x = 0xF;
@@ -9249,8 +9246,8 @@ void func_801848A4(s32 a0) {
         v18[0] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x48);
         v18[1] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x4C);
         v18[2] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x50);
-        { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); }
-        { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_800491AC(r4); }
+        { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); }  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+        { void *r4; r4 = &D_800AF648; func_800491AC(r4); }
         RotTransPers((s32)v18, (s32)&sxy, &z, &flag);
         if (flag >= 0 && (u32)((*(u16 *)&sxy + 0xEF) & 0xFFFF) < 0x1DF
                       && (u32)((*((u16 *)&sxy + 1) + 0xB3) & 0xFFFF) < 0x167) {
@@ -9450,8 +9447,8 @@ void func_80184EFC(s32 a0) {
         L.v[0] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x48);
         L.v[1] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x4C);
         L.v[2] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x50);
-        { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); }
-        { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_800491AC(r4); }
+        { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); }  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+        { void *r4; r4 = &D_800AF648; func_800491AC(r4); }
         RotTransPers((s32)L.v, (s32)L.sxy, &L.z, &L.flag);
         if (L.flag >= 0 && (u32)((L.sxy[0] + 0xEF) & 0xFFFF) < 0x1DF
                         && (u32)((L.sxy[1] + 0xB3) & 0xFFFF) < 0x167) {
@@ -9462,7 +9459,6 @@ void func_80184EFC(s32 a0) {
                 ax = -x;
             }
             ax = ((0xF0 - ax) * 0x7F) / 0xF0;
-            __asm__("" : "=r"(ax) : "0"(ax));
             x = (x + 0xF0) / 0x1E;
             if (x == 0x10) {
                 x = 0xF;
@@ -9710,7 +9706,7 @@ void func_801857F4(s32 a0) {
 extern void func_8012A828(s32 a0, void *a1);
 
 void func_801858F4(s32 a0) {
-    register s32 s0 asm("$16") = a0;
+    register s32 s0 asm("$16") = a0;  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
     extern u8 D_801AE660[];
     extern u8 D_801AE760[];
     extern u8 D_801AE860[];
@@ -9742,7 +9738,7 @@ extern s32 rand(void);
 void func_80185994(s32 a0)
 {
     s32 t;
-    register s32 *a1 asm("$5");
+    register s32 *a1 asm("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
     u32 v0;
 
     t = *(s32 *)(a0 + 0x1C) - 1;
@@ -9868,9 +9864,9 @@ extern void func_8012B370(int a0);
 
 void func_80185C04(s32 a0)
 {
-    register s32 s0 asm("$16") = a0;
-    register s32 v0 asm("$2");
-    register s32 v1 asm("$3");
+    s32 s0 = a0;
+    register s32 v0 asm("$2");  // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus7)
+    register s32 v1 asm("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
     s32 temp;
 
     v0 = *(s16 *)(*(s32 *)(s0 + 0x20) + 0x14);
@@ -9917,7 +9913,7 @@ extern s32 rand(void);
 void func_80185CD8(s32 a0)
 {
     s32 t;
-    register s32 *a1 asm("$5");
+    register s32 *a1 asm("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
     u32 v0;
 
     t = *(s32 *)(a0 + 0x1C) - 1;
@@ -10078,7 +10074,7 @@ extern s32 rand(void);
 void func_80185FC8(s32 a0)
 {
     s32 t;
-    register s32 *a1 asm("$5");
+    register s32 *a1 asm("$5");  // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus7)
     u32 v0;
 
     t = *(s32 *)(a0 + 0x1C) - 1;
diff --git a/src/ov_SC06_011/ov_SC06_011.c b/src/ov_SC06_011/ov_SC06_011.c
index d62b25dc3..55a4e84ef 100644
--- a/src/ov_SC06_011/ov_SC06_011.c
+++ b/src/ov_SC06_011/ov_SC06_011.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801ABCE8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801ABCE8;
+        register volatile s32 *p __asm__("$4") = &D_801ABCE8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801ABCC8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801AA8A0[idx], D_801AA8A1[idx], D_801AA8A2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801ABCC8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_011/ov_SC06_011_jr_8016AB6C.c b/src/ov_SC06_011/ov_SC06_011_jr_8016AB6C.c
index 96622251c..a7e4ca3df 100644
--- a/src/ov_SC06_011/ov_SC06_011_jr_8016AB6C.c
+++ b/src/ov_SC06_011/ov_SC06_011_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_801835B4)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801AAEA0);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801AAF9C[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801AAFF8[];
     extern u8 D_801AB0B8;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_801837EC[];
     extern u8 D_80183804[];
     extern u16 D_80183808[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_011/ov_SC06_011_jr_8017AE2C.c b/src/ov_SC06_011/ov_SC06_011_jr_8017AE2C.c
index 701d56b9a..d34724203 100644
--- a/src/ov_SC06_011/ov_SC06_011_jr_8017AE2C.c
+++ b/src/ov_SC06_011/ov_SC06_011_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801ABCB2;
 extern s16 D_801ABCBC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801ABCB0;
+    s32 pv = param_1;
+    s16 *g = &D_801ABCB0;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801ABBA6;
             v790 = D_801ABBA8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801ABCE0 = 1;
             D_801ABB34 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801ABB7C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801ABB7C;
diff --git a/src/ov_SC06_013/ov_SC06_013.c b/src/ov_SC06_013/ov_SC06_013.c
index ed8c0a2dd..373e4fa05 100644
--- a/src/ov_SC06_013/ov_SC06_013.c
+++ b/src/ov_SC06_013/ov_SC06_013.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_8019AB98 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_8019AB98;
+        register volatile s32 *p __asm__("$4") = &D_8019AB98;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_8019AB78;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_80199758[idx], D_80199759[idx], D_8019975A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_8019AB78;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_013/ov_SC06_013_jr_8016AB6C.c b/src/ov_SC06_013/ov_SC06_013_jr_8016AB6C.c
index 3635484fa..a622b7a2e 100644
--- a/src/ov_SC06_013/ov_SC06_013_jr_8016AB6C.c
+++ b/src/ov_SC06_013/ov_SC06_013_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80181D30)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_80199D58);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_80199E54[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_80199EB0[];
     extern u8 D_80199F70;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_80181F68[];
     extern u8 D_80181F80[];
     extern u16 D_80181F84[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_013/ov_SC06_013_jr_8017AE2C.c b/src/ov_SC06_013/ov_SC06_013_jr_8017AE2C.c
index 1d238b307..f68b3cb5e 100644
--- a/src/ov_SC06_013/ov_SC06_013_jr_8017AE2C.c
+++ b/src/ov_SC06_013/ov_SC06_013_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_8019AB62;
 extern s16 D_8019AB6C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_8019AB60;
+    s32 pv = param_1;
+    s16 *g = &D_8019AB60;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019AA5E;
             v790 = D_8019AA60;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_8019AB90 = 1;
             D_8019A9EC = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_8019AA34[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019AA34;
diff --git a/src/ov_SC06_014/ov_SC06_014.c b/src/ov_SC06_014/ov_SC06_014.c
index 002a055ee..ecd59578b 100644
--- a/src/ov_SC06_014/ov_SC06_014.c
+++ b/src/ov_SC06_014/ov_SC06_014.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801A15B0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801A15B0;
+        register volatile s32 *p __asm__("$4") = &D_801A15B0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801A1590;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801A0148[idx], D_801A0149[idx], D_801A014A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801A1590;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c b/src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c
index dfe24be5d..60db083cc 100644
--- a/src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c
+++ b/src/ov_SC06_014/ov_SC06_014_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80183094)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801A0748);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801A0844[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801A08A0[];
     extern u8 D_801A0960;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_801832CC[];
     extern u8 D_801832E4[];
     extern u16 D_801832E8[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_014/ov_SC06_014_jr_8017AE2C.c b/src/ov_SC06_014/ov_SC06_014_jr_8017AE2C.c
index 7241245cb..7a868f5cb 100644
--- a/src/ov_SC06_014/ov_SC06_014_jr_8017AE2C.c
+++ b/src/ov_SC06_014/ov_SC06_014_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801A157A;
 extern s16 D_801A1584;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801A1578;
+    s32 pv = param_1;
+    s16 *g = &D_801A1578;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801A144E;
             v790 = D_801A1450;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801A15A8 = 1;
             D_801A13DC = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801A1424[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801A1424;
diff --git a/src/ov_SC06_015/ov_SC06_015.c b/src/ov_SC06_015/ov_SC06_015.c
index 11f729644..e493689a4 100644
--- a/src/ov_SC06_015/ov_SC06_015.c
+++ b/src/ov_SC06_015/ov_SC06_015.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_80194990 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_80194990;
+        register volatile s32 *p __asm__("$4") = &D_80194990;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_80194970;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_80193528[idx], D_80193529[idx], D_8019352A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_80194970;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c b/src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c
index a5d852ed6..99ae476d3 100644
--- a/src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c
+++ b/src/ov_SC06_015/ov_SC06_015_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80181BEC)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_80193B28);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_80193C24[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_80193C80[];
     extern u8 D_80193D40;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_80181E24[];
     extern u8 D_80181E3C[];
     extern u16 D_80181E40[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_015/ov_SC06_015_jr_8017AE2C.c b/src/ov_SC06_015/ov_SC06_015_jr_8017AE2C.c
index 50be48e36..e6d731b89 100644
--- a/src/ov_SC06_015/ov_SC06_015_jr_8017AE2C.c
+++ b/src/ov_SC06_015/ov_SC06_015_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_8019495A;
 extern s16 D_80194964;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_80194958;
+    s32 pv = param_1;
+    s16 *g = &D_80194958;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019482E;
             v790 = D_80194830;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_80194988 = 1;
             D_801947BC = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_80194804[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_80194804;
diff --git a/src/ov_SC06_016/ov_SC06_016.c b/src/ov_SC06_016/ov_SC06_016.c
index 742aa52ab..9eff5f9cc 100644
--- a/src/ov_SC06_016/ov_SC06_016.c
+++ b/src/ov_SC06_016/ov_SC06_016.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801A0200 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801A0200;
+        register volatile s32 *p __asm__("$4") = &D_801A0200;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801A01E0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8019E2F8[idx], D_8019E2F9[idx], D_8019E2FA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801A01E0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c b/src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c
index b9e5469a5..6e4ae5597 100644
--- a/src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c
+++ b/src/ov_SC06_016/ov_SC06_016_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80187FFC)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_8019E8F8);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_8019E9F4[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_8019EA50[];
     extern u8 D_8019EB10;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_80188234[];
     extern u8 D_8018824C[];
     extern u16 D_80188250[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_016/ov_SC06_016_jr_8017AE2C.c b/src/ov_SC06_016/ov_SC06_016_jr_8017AE2C.c
index 851945141..b389805c6 100644
--- a/src/ov_SC06_016/ov_SC06_016_jr_8017AE2C.c
+++ b/src/ov_SC06_016/ov_SC06_016_jr_8017AE2C.c
@@ -2627,8 +2627,8 @@ extern s16 D_801A01CA;
 extern s16 D_801A01D4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801A01C8;
+    s32 pv = param_1;
+    s16 *g = &D_801A01C8;
 
     switch (g[0]) {
     case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019F5FE;
             v790 = D_8019F600;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801A01F8 = 1;
             D_8019F58C = 0x1E;
             D_80126990 = v794;
@@ -3204,8 +3204,8 @@ extern void (*D_8019F5D4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019F5D4;
@@ -3691,7 +3691,7 @@ void func_8017C43C(void *a0) {
     if (*(s16 *)((s32)a0 + 0xFC) == 0xB) {
         s32 f = *(s32 *)((s32)a0 + 0x1C);
         s32 v = -(f & 1) & 0xC0;
-        __asm__("" : "=r"(v) : "0"(v));
+        __asm__("" : "=r"(v) : "0"(v));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         f = f + 1;
         *(s32 *)((s32)a0 + 0x1C) = f;
         D_8019F681 = v;
@@ -3715,16 +3715,15 @@ void func_8017C43C(void *a0) {
         D_8019F685 = c * 255 / h;
         D_8019F67D = c * 255 / h;
     } else {
-        register u8 *q __asm__("$6");
+        u8 *q;
         u16 bs;
         s32 x;
         s16 y;
         t = (c - h) * 255 / h;
         q = &D_8019F67D;
-        __asm__("" : "=r"(q) : "0"(q));
+        __asm__("" : "=r"(q) : "0"(q));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         bs = (u16)D_8019F658;
         x = bs + hw;
-        __asm__("" :: "r"(hw));
         y = x - 4;
         D_8019F685 = 0xFF;
         *q = 0xFF;
@@ -3740,7 +3739,7 @@ void func_8017C43C(void *a0) {
     }
 
     p = &D_8019F6D8;
-    __asm__("" : "=r"(p) : "0"(p));
+    __asm__("" : "=r"(p) : "0"(p));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     D_8019F6C8 = *(u16 *)((s32)p - 0x18) + (u16)D_80188898;
     *p = D_8019F6C8 - 4;
     w = (void *)((s32)p - 0x80);
diff --git a/src/ov_SC06_018/ov_SC06_018.c b/src/ov_SC06_018/ov_SC06_018.c
index e33e899ec..503d3d61c 100644
--- a/src/ov_SC06_018/ov_SC06_018.c
+++ b/src/ov_SC06_018/ov_SC06_018.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801D5B30 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801D5B30;
+        register volatile s32 *p __asm__("$4") = &D_801D5B30;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801D5B10;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801D3BE0[idx], D_801D3BE1[idx], D_801D3BE2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801D5B10;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c b/src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c
index cd28eb2fa..c6fd2491d 100644
--- a/src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c
+++ b/src/ov_SC06_018/ov_SC06_018_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80196738)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801D41E0);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801D42DC[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801D4338[];
     extern u8 D_801D43F8;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_80196970[];
     extern u8 D_80196988[];
     extern u16 D_8019698C[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_018/ov_SC06_018_jr_8017AE2C.c b/src/ov_SC06_018/ov_SC06_018_jr_8017AE2C.c
index 4ab9341bb..ca4bffdac 100644
--- a/src/ov_SC06_018/ov_SC06_018_jr_8017AE2C.c
+++ b/src/ov_SC06_018/ov_SC06_018_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801D5AFA;
 extern s16 D_801D5B04;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801D5AF8;
+    s32 pv = param_1;
+    s16 *g = &D_801D5AF8;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801D4EE6;
             v790 = D_801D4EE8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801D5B28 = 1;
             D_801D4E74 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801D4EBC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801D4EBC;
diff --git a/src/ov_SC06_020/ov_SC06_020.c b/src/ov_SC06_020/ov_SC06_020.c
index 99b9ecaa3..38b718c1d 100644
--- a/src/ov_SC06_020/ov_SC06_020.c
+++ b/src/ov_SC06_020/ov_SC06_020.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801BA980 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801BA980;
+        register volatile s32 *p __asm__("$4") = &D_801BA980;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801BA960;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801B93F8[idx], D_801B93F9[idx], D_801B93FA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801BA960;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c b/src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c
index aaadaa85b..20ce6230c 100644
--- a/src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c
+++ b/src/ov_SC06_020/ov_SC06_020_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_801881C0)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801B99F8);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801B9AF4[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801B9B50[];
     extern u8 D_801B9C10;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_801883F8[];
     extern u8 D_80188410[];
     extern u16 D_80188414[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_020/ov_SC06_020_jr_8017AE2C.c b/src/ov_SC06_020/ov_SC06_020_jr_8017AE2C.c
index fe849088c..1a0c584e3 100644
--- a/src/ov_SC06_020/ov_SC06_020_jr_8017AE2C.c
+++ b/src/ov_SC06_020/ov_SC06_020_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801BA94A;
 extern s16 D_801BA954;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801BA948;
+    s32 pv = param_1;
+    s16 *g = &D_801BA948;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801BA6FE;
             v790 = D_801BA700;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801BA978 = 1;
             D_801BA68C = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801BA6D4[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801BA6D4;
diff --git a/src/ov_SC06_022/ov_SC06_022.c b/src/ov_SC06_022/ov_SC06_022.c
index d6f383d69..ebe0c2055 100644
--- a/src/ov_SC06_022/ov_SC06_022.c
+++ b/src/ov_SC06_022/ov_SC06_022.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801E2200 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801E2200;
+        register volatile s32 *p __asm__("$4") = &D_801E2200;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801E21E0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801E0C60[idx], D_801E0C61[idx], D_801E0C62[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801E21E0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c b/src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c
index 81b6e8135..c19438270 100644
--- a/src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c
+++ b/src/ov_SC06_022/ov_SC06_022_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_8019047C)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801E1260);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801E135C[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801E13B8[];
     extern u8 D_801E1478;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_801906B4[];
     extern u8 D_801906CC[];
     extern u16 D_801906D0[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_022/ov_SC06_022_jr_8017AE2C.c b/src/ov_SC06_022/ov_SC06_022_jr_8017AE2C.c
index 55f560db5..ff4d0e82b 100644
--- a/src/ov_SC06_022/ov_SC06_022_jr_8017AE2C.c
+++ b/src/ov_SC06_022/ov_SC06_022_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801E21CA;
 extern s16 D_801E21D4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801E21C8;
+    s32 pv = param_1;
+    s16 *g = &D_801E21C8;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801E1F66;
             v790 = D_801E1F68;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801E21F8 = 1;
             D_801E1EF4 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801E1F3C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801E1F3C;
diff --git a/src/ov_SC06_024/ov_SC06_024.c b/src/ov_SC06_024/ov_SC06_024.c
index 1d8b3cb33..9c289a317 100644
--- a/src/ov_SC06_024/ov_SC06_024.c
+++ b/src/ov_SC06_024/ov_SC06_024.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801E18F8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801E18F8;
+        register volatile s32 *p __asm__("$4") = &D_801E18F8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801E18D8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801DFDE0[idx], D_801DFDE1[idx], D_801DFDE2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801E18D8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c b/src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c
index b6be8d70a..7113dd19a 100644
--- a/src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c
+++ b/src/ov_SC06_024/ov_SC06_024_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80192954)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801E03E0);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801E04DC[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801E0538[];
     extern u8 D_801E05F8;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_80192B8C[];
     extern u8 D_80192BA4[];
     extern u16 D_80192BA8[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_024/ov_SC06_024_jr_8017AE2C.c b/src/ov_SC06_024/ov_SC06_024_jr_8017AE2C.c
index 4be709332..28bb5c18b 100644
--- a/src/ov_SC06_024/ov_SC06_024_jr_8017AE2C.c
+++ b/src/ov_SC06_024/ov_SC06_024_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801E18C2;
 extern s16 D_801E18CC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801E18C0;
+    s32 pv = param_1;
+    s16 *g = &D_801E18C0;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801E10E6;
             v790 = D_801E10E8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801E18F0 = 1;
             D_801E1074 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801E10BC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801E10BC;
diff --git a/src/ov_SC06_025/ov_SC06_025.c b/src/ov_SC06_025/ov_SC06_025.c
index 16e4f9423..a6bab886d 100644
--- a/src/ov_SC06_025/ov_SC06_025.c
+++ b/src/ov_SC06_025/ov_SC06_025.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801B2218 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801B2218;
+        register volatile s32 *p __asm__("$4") = &D_801B2218;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801B21F8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801AFFA8[idx], D_801AFFA9[idx], D_801AFFAA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801B21F8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c b/src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c
index 029add424..477bcc4a9 100644
--- a/src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c
+++ b/src/ov_SC06_025/ov_SC06_025_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80187DF8)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801B05A8);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801B06A4[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801B0700[];
     extern u8 D_801B07C0;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_80188030[];
     extern u8 D_80188048[];
     extern u16 D_8018804C[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_025/ov_SC06_025_jr_8017AE2C.c b/src/ov_SC06_025/ov_SC06_025_jr_8017AE2C.c
index f55db94dc..ce1ae7cbd 100644
--- a/src/ov_SC06_025/ov_SC06_025_jr_8017AE2C.c
+++ b/src/ov_SC06_025/ov_SC06_025_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801B21E2;
 extern s16 D_801B21EC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801B21E0;
+    s32 pv = param_1;
+    s16 *g = &D_801B21E0;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801B12AE;
             v790 = D_801B12B0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801B2210 = 1;
             D_801B123C = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801B1284[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801B1284;
diff --git a/src/ov_SC06_027/ov_SC06_027.c b/src/ov_SC06_027/ov_SC06_027.c
index 0e8c1786d..4d775e36b 100644
--- a/src/ov_SC06_027/ov_SC06_027.c
+++ b/src/ov_SC06_027/ov_SC06_027.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_8019D3C0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_8019D3C0;
+        register volatile s32 *p __asm__("$4") = &D_8019D3C0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_8019D3A0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8019BF80[idx], D_8019BF81[idx], D_8019BF82[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_8019D3A0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c b/src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c
index e40bd502e..ac859c2f2 100644
--- a/src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c
+++ b/src/ov_SC06_027/ov_SC06_027_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80181138)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_8019C580);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_8019C67C[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_8019C6D8[];
     extern u8 D_8019C798;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_80181370[];
     extern u8 D_80181388[];
     extern u16 D_8018138C[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_027/ov_SC06_027_jr_8017AE2C.c b/src/ov_SC06_027/ov_SC06_027_jr_8017AE2C.c
index a90164896..cd4236b4e 100644
--- a/src/ov_SC06_027/ov_SC06_027_jr_8017AE2C.c
+++ b/src/ov_SC06_027/ov_SC06_027_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_8019D38A;
 extern s16 D_8019D394;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_8019D388;
+    s32 pv = param_1;
+    s16 *g = &D_8019D388;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019D286;
             v790 = D_8019D288;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_8019D3B8 = 1;
             D_8019D214 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_8019D25C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019D25C;
diff --git a/src/ov_SC06_029/ov_SC06_029.c b/src/ov_SC06_029/ov_SC06_029.c
index 881ceaa8d..a5843dd13 100644
--- a/src/ov_SC06_029/ov_SC06_029.c
+++ b/src/ov_SC06_029/ov_SC06_029.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801E2120 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801E2120;
+        register volatile s32 *p __asm__("$4") = &D_801E2120;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801E2100;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801DB8A0[idx], D_801DB8A1[idx], D_801DB8A2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801E2100;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c b/src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c
index 3eefeb844..19ab1ffa1 100644
--- a/src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c
+++ b/src/ov_SC06_029/ov_SC06_029_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_8018F6CC)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801DBEA0);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801DBF9C[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801DBFF8[];
     extern u8 D_801DC0B8;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_8018F904[];
     extern u8 D_8018F91C[];
     extern u16 D_8018F920[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_029/ov_SC06_029_jr_8017AE2C.c b/src/ov_SC06_029/ov_SC06_029_jr_8017AE2C.c
index 4b66fd36b..489767b9e 100644
--- a/src/ov_SC06_029/ov_SC06_029_jr_8017AE2C.c
+++ b/src/ov_SC06_029/ov_SC06_029_jr_8017AE2C.c
@@ -2621,8 +2621,8 @@ extern s16 D_801E20EA;
 extern s16 D_801E20F4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801E20E8;
+    s32 pv = param_1;
+    s16 *g = &D_801E20E8;
 
     switch (g[0]) {
     case 0:
@@ -2767,8 +2767,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2913,8 +2913,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2938,7 +2938,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801DCBA6;
             v790 = D_801DCBA8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801E2118 = 1;
             D_801DCB34 = 0x1E;
             D_80126990 = v794;
@@ -3198,8 +3198,8 @@ extern void (*D_801DCB7C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801DCB7C;
@@ -3685,7 +3685,7 @@ void func_8017C43C(void *a0) {
     if (*(s16 *)((s32)a0 + 0xFC) == 0xB) {
         s32 f = *(s32 *)((s32)a0 + 0x1C);
         s32 v = -(f & 1) & 0xC0;
-        __asm__("" : "=r"(v) : "0"(v));
+        __asm__("" : "=r"(v) : "0"(v));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         f = f + 1;
         *(s32 *)((s32)a0 + 0x1C) = f;
         D_801DCC29 = v;
@@ -3709,16 +3709,15 @@ void func_8017C43C(void *a0) {
         D_801DCC2D = c * 255 / h;
         D_801DCC25 = c * 255 / h;
     } else {
-        register u8 *q __asm__("$6");
+        u8 *q;
         u16 bs;
         s32 x;
         s16 y;
         t = (c - h) * 255 / h;
         q = &D_801DCC25;
-        __asm__("" : "=r"(q) : "0"(q));
+        __asm__("" : "=r"(q) : "0"(q));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         bs = (u16)D_801DCC00;
         x = bs + hw;
-        __asm__("" :: "r"(hw));
         y = x - 4;
         D_801DCC2D = 0xFF;
         *q = 0xFF;
@@ -3734,7 +3733,7 @@ void func_8017C43C(void *a0) {
     }
 
     p = &D_801DCC80;
-    __asm__("" : "=r"(p) : "0"(p));
+    __asm__("" : "=r"(p) : "0"(p));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     D_801DCC70 = *(u16 *)((s32)p - 0x18) + (u16)D_8018FF68;
     *p = D_801DCC70 - 4;
     w = (void *)((s32)p - 0x80);
diff --git a/src/ov_SC06_030/ov_SC06_030.c b/src/ov_SC06_030/ov_SC06_030.c
index 82219355b..580d18dcd 100644
--- a/src/ov_SC06_030/ov_SC06_030.c
+++ b/src/ov_SC06_030/ov_SC06_030.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801BA018 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801BA018;
+        register volatile s32 *p __asm__("$4") = &D_801BA018;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -490,17 +490,17 @@ void func_8012956C(void) {
     extern u8 D_801B9FF8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -510,7 +510,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -551,7 +550,7 @@ void func_8012956C(void) {
                       D_801B8B00[idx], D_801B8B01[idx], D_801B8B02[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801B9FF8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c b/src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c
index 0ee2ed1ae..f508eebac 100644
--- a/src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c
+++ b/src/ov_SC06_030/ov_SC06_030_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80184FBC)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801B9100);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801B91FC[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801B9258[];
     extern u8 D_801B9318;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_801851F4[];
     extern u8 D_8018520C[];
     extern u16 D_80185210[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_030/ov_SC06_030_jr_8017AE2C.c b/src/ov_SC06_030/ov_SC06_030_jr_8017AE2C.c
index f156db842..124402603 100644
--- a/src/ov_SC06_030/ov_SC06_030_jr_8017AE2C.c
+++ b/src/ov_SC06_030/ov_SC06_030_jr_8017AE2C.c
@@ -2621,8 +2621,8 @@ extern s16 D_801B9FE2;
 extern s16 D_801B9FEC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801B9FE0;
+    s32 pv = param_1;
+    s16 *g = &D_801B9FE0;
 
     switch (g[0]) {
     case 0:
@@ -2767,8 +2767,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2913,8 +2913,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2938,7 +2938,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801B9E06;
             v790 = D_801B9E08;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801BA010 = 1;
             D_801B9D94 = 0x1E;
             D_80126990 = v794;
@@ -3198,8 +3198,8 @@ extern void (*D_801B9DDC[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801B9DDC;
@@ -3686,7 +3686,7 @@ void func_8017C43C(void *a0) {
     if (*(s16 *)((s32)a0 + 0xFC) == 0xB) {
         s32 f = *(s32 *)((s32)a0 + 0x1C);
         s32 v = -(f & 1) & 0xC0;
-        __asm__("" : "=r"(v) : "0"(v));
+        __asm__("" : "=r"(v) : "0"(v));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         f = f + 1;
         *(s32 *)((s32)a0 + 0x1C) = f;
         D_801B9E89 = v;
@@ -3710,16 +3710,15 @@ void func_8017C43C(void *a0) {
         D_801B9E8D = c * 255 / h;
         D_801B9E85 = c * 255 / h;
     } else {
-        register u8 *q __asm__("$6");
+        u8 *q;
         u16 bs;
         s32 x;
         s16 y;
         t = (c - h) * 255 / h;
         q = &D_801B9E85;
-        __asm__("" : "=r"(q) : "0"(q));
+        __asm__("" : "=r"(q) : "0"(q));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         bs = (u16)D_801B9E60;
         x = bs + hw;
-        __asm__("" :: "r"(hw));
         y = x - 4;
         D_801B9E8D = 0xFF;
         *q = 0xFF;
@@ -3735,7 +3734,7 @@ void func_8017C43C(void *a0) {
     }
 
     p = &D_801B9EE0;
-    __asm__("" : "=r"(p) : "0"(p));
+    __asm__("" : "=r"(p) : "0"(p));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     D_801B9ED0 = *(u16 *)((s32)p - 0x18) + (u16)D_80185858;
     *p = D_801B9ED0 - 4;
     w = (void *)((s32)p - 0x80);
diff --git a/src/ov_SC06_032/ov_SC06_032.c b/src/ov_SC06_032/ov_SC06_032.c
index 54abebcc0..c2caa287a 100644
--- a/src/ov_SC06_032/ov_SC06_032.c
+++ b/src/ov_SC06_032/ov_SC06_032.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801D1100 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801D1100;
+        register volatile s32 *p __asm__("$4") = &D_801D1100;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -490,17 +490,17 @@ void func_8012956C(void) {
     extern u8 D_801D10E0;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -510,7 +510,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -551,7 +550,7 @@ void func_8012956C(void) {
                       D_801CF1B0[idx], D_801CF1B1[idx], D_801CF1B2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801D10E0;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c b/src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c
index 246db9b0d..324da62bf 100644
--- a/src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c
+++ b/src/ov_SC06_032/ov_SC06_032_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80196488)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801CF7B0);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801CF8AC[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801CF908[];
     extern u8 D_801CF9C8;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_801966C0[];
     extern u8 D_801966D8[];
     extern u16 D_801966DC[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_032/ov_SC06_032_jr_8017AE2C.c b/src/ov_SC06_032/ov_SC06_032_jr_8017AE2C.c
index 05d3a4301..4310da99c 100644
--- a/src/ov_SC06_032/ov_SC06_032_jr_8017AE2C.c
+++ b/src/ov_SC06_032/ov_SC06_032_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801D10CA;
 extern s16 D_801D10D4;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801D10C8;
+    s32 pv = param_1;
+    s16 *g = &D_801D10C8;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801D04B6;
             v790 = D_801D04B8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801D10F8 = 1;
             D_801D0444 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801D048C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801D048C;
@@ -3432,7 +3432,6 @@ s32 param_1;
     *(s32 *)(param_1 + 0x2C) = *(s32 *)(param_1 + 0x2C) + 0xE3;
     v0 = func_8004787C(*(s32 *)(param_1 + 0x2C));
     pa = &D_80196D44;
-    __asm__ __volatile__("" : "=r"(pa) : "0"(pa));
     if (v0 < 0) {
         v0 += 0xFF;
     }
diff --git a/src/ov_SC06_033/ov_SC06_033.c b/src/ov_SC06_033/ov_SC06_033.c
index 8dff855bc..72462f13f 100644
--- a/src/ov_SC06_033/ov_SC06_033.c
+++ b/src/ov_SC06_033/ov_SC06_033.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801D0F80 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801D0F80;
+        register volatile s32 *p __asm__("$4") = &D_801D0F80;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801D0F60;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801CF270[idx], D_801CF271[idx], D_801CF272[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801D0F60;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c b/src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c
index 0563baf6e..cc96c95c8 100644
--- a/src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c
+++ b/src/ov_SC06_033/ov_SC06_033_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80194998)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801CF870);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801CF96C[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801CF9C8[];
     extern u8 D_801CFA88;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_80194BD0[];
     extern u8 D_80194BE8[];
     extern u16 D_80194BEC[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC06_033/ov_SC06_033_jr_8017AE2C.c b/src/ov_SC06_033/ov_SC06_033_jr_8017AE2C.c
index 16142de52..2ce9a32c1 100644
--- a/src/ov_SC06_033/ov_SC06_033_jr_8017AE2C.c
+++ b/src/ov_SC06_033/ov_SC06_033_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801D0F4A;
 extern s16 D_801D0F54;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801D0F48;
+    s32 pv = param_1;
+    s16 *g = &D_801D0F48;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801D0576;
             v790 = D_801D0578;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801D0F78 = 1;
             D_801D0504 = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801D054C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801D054C;
diff --git a/src/ov_SC07_000/ov_SC07_000.c b/src/ov_SC07_000/ov_SC07_000.c
index 0d298f2ee..8a23e9a78 100644
--- a/src/ov_SC07_000/ov_SC07_000.c
+++ b/src/ov_SC07_000/ov_SC07_000.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801D0C78 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801D0C78;
+        register volatile s32 *p __asm__("$4") = &D_801D0C78;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801D0C58;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801CE7B8[idx], D_801CE7B9[idx], D_801CE7BA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801D0C58;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c b/src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c
index 7e2d95223..da241c1f1 100644
--- a/src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c
+++ b/src/ov_SC07_000/ov_SC07_000_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_801857E0)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801CEDB8);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801CEEB4[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801CEF10[];
     extern u8 D_801CEFD0;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_80185A18[];
     extern u8 D_80185A30[];
     extern u16 D_80185A34[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC07_000/ov_SC07_000_jr_8017AE2C.c b/src/ov_SC07_000/ov_SC07_000_jr_8017AE2C.c
index 14792ffbf..c2f8c49a2 100644
--- a/src/ov_SC07_000/ov_SC07_000_jr_8017AE2C.c
+++ b/src/ov_SC07_000/ov_SC07_000_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801D0C42;
 extern s16 D_801D0C4C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801D0C40;
+    s32 pv = param_1;
+    s16 *g = &D_801D0C40;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801CFABE;
             v790 = D_801CFAC0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801D0C70 = 1;
             D_801CFA4C = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801CFA94[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801CFA94;
diff --git a/src/ov_SC07_001/ov_SC07_001.c b/src/ov_SC07_001/ov_SC07_001.c
index 43ad655ed..3ab640c72 100644
--- a/src/ov_SC07_001/ov_SC07_001.c
+++ b/src/ov_SC07_001/ov_SC07_001.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801AAEA0 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801AAEA0;
+        register volatile s32 *p __asm__("$4") = &D_801AAEA0;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801AAE80;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801A9868[idx], D_801A9869[idx], D_801A986A[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801AAE80;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c b/src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c
index 1b59ebc6b..565ebbf1d 100644
--- a/src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c
+++ b/src/ov_SC07_001/ov_SC07_001_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80184690)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801A9E68);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801A9F64[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801A9FC0[];
     extern u8 D_801AA080;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_801848C8[];
     extern u8 D_801848E0[];
     extern u16 D_801848E4[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC07_001/ov_SC07_001_jr_8017AE2C.c b/src/ov_SC07_001/ov_SC07_001_jr_8017AE2C.c
index bbf295c83..f5313a1bc 100644
--- a/src/ov_SC07_001/ov_SC07_001_jr_8017AE2C.c
+++ b/src/ov_SC07_001/ov_SC07_001_jr_8017AE2C.c
@@ -2628,8 +2628,8 @@ extern s16 D_801AAE6A;
 extern s16 D_801AAE74;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801AAE68;
+    s32 pv = param_1;
+    s16 *g = &D_801AAE68;
 
     switch (g[0]) {
     case 0:
@@ -2774,8 +2774,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2920,8 +2920,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2945,7 +2945,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801AAB6E;
             v790 = D_801AAB70;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801AAE98 = 1;
             D_801AAAFC = 0x1E;
             D_80126990 = v794;
@@ -3205,8 +3205,8 @@ extern void (*D_801AAB44[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801AAB44;
diff --git a/src/ov_SC07_002/ov_SC07_002.c b/src/ov_SC07_002/ov_SC07_002.c
index eb10b651e..ff5777c81 100644
--- a/src/ov_SC07_002/ov_SC07_002.c
+++ b/src/ov_SC07_002/ov_SC07_002.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801A0068 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801A0068;
+        register volatile s32 *p __asm__("$4") = &D_801A0068;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801A0048;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_8019A3B8[idx], D_8019A3B9[idx], D_8019A3BA[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801A0048;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c b/src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c
index ad7323294..1f3deda17 100644
--- a/src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c
+++ b/src/ov_SC07_002/ov_SC07_002_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_8018994C)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_8019A9B8);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_8019AAB4[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_8019AB10[];
     extern u8 D_8019ABD0;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_80189B84[];
     extern u8 D_80189B9C[];
     extern u16 D_80189BA0[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC07_002/ov_SC07_002_jr_8017AE2C.c b/src/ov_SC07_002/ov_SC07_002_jr_8017AE2C.c
index 3ec6eb6fb..1b5c83f7b 100644
--- a/src/ov_SC07_002/ov_SC07_002_jr_8017AE2C.c
+++ b/src/ov_SC07_002/ov_SC07_002_jr_8017AE2C.c
@@ -2627,8 +2627,8 @@ extern s16 D_801A0032;
 extern s16 D_801A003C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801A0030;
+    s32 pv = param_1;
+    s16 *g = &D_801A0030;
 
     switch (g[0]) {
     case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_8019B6BE;
             v790 = D_8019B6C0;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801A0060 = 1;
             D_8019B64C = 0x1E;
             D_80126990 = v794;
@@ -3204,8 +3204,8 @@ extern void (*D_8019B694[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019B694;
@@ -3691,7 +3691,7 @@ void func_8017C43C(void *a0) {
     if (*(s16 *)((s32)a0 + 0xFC) == 0xB) {
         s32 f = *(s32 *)((s32)a0 + 0x1C);
         s32 v = -(f & 1) & 0xC0;
-        __asm__("" : "=r"(v) : "0"(v));
+        __asm__("" : "=r"(v) : "0"(v));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         f = f + 1;
         *(s32 *)((s32)a0 + 0x1C) = f;
         D_8019B741 = v;
@@ -3715,16 +3715,15 @@ void func_8017C43C(void *a0) {
         D_8019B745 = c * 255 / h;
         D_8019B73D = c * 255 / h;
     } else {
-        register u8 *q __asm__("$6");
+        u8 *q;
         u16 bs;
         s32 x;
         s16 y;
         t = (c - h) * 255 / h;
         q = &D_8019B73D;
-        __asm__("" : "=r"(q) : "0"(q));
+        __asm__("" : "=r"(q) : "0"(q));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         bs = (u16)D_8019B718;
         x = bs + hw;
-        __asm__("" :: "r"(hw));
         y = x - 4;
         D_8019B745 = 0xFF;
         *q = 0xFF;
@@ -3740,7 +3739,7 @@ void func_8017C43C(void *a0) {
     }
 
     p = &D_8019B798;
-    __asm__("" : "=r"(p) : "0"(p));
+    __asm__("" : "=r"(p) : "0"(p));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
     D_8019B788 = *(u16 *)((s32)p - 0x18) + (u16)D_8018A1E8;
     *p = D_8019B788 - 4;
     w = (void *)((s32)p - 0x80);
diff --git a/src/ov_SC07_008/ov_SC07_008.c b/src/ov_SC07_008/ov_SC07_008.c
index 189ee71ac..8671d23a8 100644
--- a/src/ov_SC07_008/ov_SC07_008.c
+++ b/src/ov_SC07_008/ov_SC07_008.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801966D8 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801966D8;
+        register volatile s32 *p __asm__("$4") = &D_801966D8;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801966B8;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801952A0[idx], D_801952A1[idx], D_801952A2[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801966B8;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c b/src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c
index 86421313a..d85d7a731 100644
--- a/src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c
+++ b/src/ov_SC07_008/ov_SC07_008_jr_8016AB6C.c
@@ -2036,9 +2036,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2061,7 +2061,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80180464)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2079,7 +2078,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2118,7 +2116,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801958A0);
     if (func_8016B9F8(param_1) == 0) {
@@ -2588,9 +2586,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2662,8 +2660,8 @@ extern u8 D_8019599C[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2703,7 +2701,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801959F8[];
     extern u8 D_80195AB8;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2870,7 +2868,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3405,7 +3403,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3433,7 +3431,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3458,7 +3456,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3524,7 +3522,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3622,7 +3620,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_8018069C[];
     extern u8 D_801806B4[];
     extern u16 D_801806B8[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC07_008/ov_SC07_008_jr_8017AE2C.c b/src/ov_SC07_008/ov_SC07_008_jr_8017AE2C.c
index 0a27bac05..c4df507ec 100644
--- a/src/ov_SC07_008/ov_SC07_008_jr_8017AE2C.c
+++ b/src/ov_SC07_008/ov_SC07_008_jr_8017AE2C.c
@@ -2627,8 +2627,8 @@ extern s16 D_801966A2;
 extern s16 D_801966AC;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801966A0;
+    s32 pv = param_1;
+    s16 *g = &D_801966A0;
 
     switch (g[0]) {
     case 0:
@@ -2773,8 +2773,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2919,8 +2919,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2944,7 +2944,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801965A6;
             v790 = D_801965A8;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801966D0 = 1;
             D_80196534 = 0x1E;
             D_80126990 = v794;
@@ -3204,8 +3204,8 @@ extern void (*D_8019657C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_8019657C;
diff --git a/src/ov_SC07_009/ov_SC07_009.c b/src/ov_SC07_009/ov_SC07_009.c
index 20fdda6b9..afe598f1b 100644
--- a/src/ov_SC07_009/ov_SC07_009.c
+++ b/src/ov_SC07_009/ov_SC07_009.c
@@ -219,7 +219,7 @@ void func_801287B8(void) {
     {
         /* D_801A3D68 read: the target materializes &sym into $a0 then lw 0($a0) (not the folded
          * lui;lw %lo). volatile forces the rematerialize; the $4 pin forces the a0 allocation. */
-        register volatile s32 *p __asm__("$4") = &D_801A3D68;
+        register volatile s32 *p __asm__("$4") = &D_801A3D68;  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
         if (*p == 0) {
             func_8013BC7C();
         }
@@ -493,17 +493,17 @@ void func_8012956C(void) {
     extern u8 D_801A3D48;
     extern u8 D_800AF630[];
     extern u8 D_800A6518[];
-    register s32 *sp10 __asm__("$21");
-    register u8 *afbase __asm__("$22");
-    register s32 *sp0 __asm__("$23");
+    s32 *sp10;
+    u8 *afbase;
+    s32 *sp0;
     Ent_956C *base;
     s32 i;
     s16 a1;
-    register u32 temp_a3 __asm__("$7");
-    register u32 arg0 __asm__("$4");
-    register u32 s __asm__("$2");
-    register u32 s2 __asm__("$3");
-    register u32 t6 __asm__("$8");
+    register u32 temp_a3 __asm__("$7");  // !FAKE: pin $7 — NEEDED DIFFERS (P36 rung B tus7)
+    register u32 arg0 __asm__("$4");  // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 s;
+    register u32 s2 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
+    u32 t6;
     s32 code;
 
     sp10 = (s32 *)0x1F800010;
@@ -513,7 +513,6 @@ void func_8012956C(void) {
         return;
     }
     base = (Ent_956C *)&D_800B9A78;
-    __asm__("" : "=r"(base) : "0"(base));
     i = 0;
     do {
         s32 idx = i * 8 + 4;
@@ -554,7 +553,7 @@ void func_8012956C(void) {
                       D_801A2930[idx], D_801A2931[idx], D_801A2932[idx]);
         goto next;
     do_default:
-        __asm__("");
+        __asm__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
         arg0 = D_801A3D48;
         s = base->f40;
         temp_a3 = base->f38;
diff --git a/src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c b/src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c
index 8941c5c43..5317993b0 100644
--- a/src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c
+++ b/src/ov_SC07_009/ov_SC07_009_jr_8016AB6C.c
@@ -2037,9 +2037,9 @@ void func_8016B234(s32 param_1) {
     u32 uVar1;
     s16 iVar2;
     s32 X, Y0, Y1, base, ni;
-    register s32 sy __asm__("$16");
-    register s16 xtmp __asm__("$4");
-    register s32 sxy __asm__("$3");
+    register s32 sy __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+    s16 xtmp;
+    register s32 sxy __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
 
     dp = &D_800AF648;
     func_8004914C(dp);
@@ -2062,7 +2062,6 @@ void func_8016B234(s32 param_1) {
         prim.v2 = prim.v3 = 0x1d8;
         sxy = sy + sxy;
         prim.cy = prim.dy = sxy;
-        __asm__ __volatile__("" : : "r"(sy));
         prim.r = prim.g = prim.b = *(u8 *)(param_1 + 0x24);
         prim.code = (&D_80180F08)[*(s32 *)(param_1 + 0x2c)];
         if (*(s16 *)(param_1 + 0x26) < 5) {
@@ -2080,7 +2079,6 @@ void func_8016B234(s32 param_1) {
                 func_80016ED4(&prim);
                 uVar1 = (s32)(uVar1 << 0x10) >> 0x14;
                 iVar2 = iVar2 + 1;
-                __asm__ __volatile__("");
                 xtmp = prim.ax;
                 prim.cx = prim.ax = xtmp - 8;
                 prim.bx = prim.dx = xtmp;
@@ -2119,7 +2117,7 @@ void func_8016B4F8(int param_1)
 {
     int iVar1;
     int uVar2;
-    volatile int buf[2];
+    int buf[2];
 
     ((void (*)(int, void *))func_80015978)(param_1 + 4, &D_801A2F30);
     if (func_8016B9F8(param_1) == 0) {
@@ -2589,9 +2587,9 @@ extern void func_80149350(s32 arg0);
 
 void func_8016C188(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s2 __asm__("$18");
-    register u8 *s0 __asm__("$16");
+    register s32 s1 __asm__("$17");  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
+    s32 s2;
+    u8 *s0;
     u16 buf[3];
     s16 *pBCC;
     s16 *pBD4;
@@ -2663,8 +2661,8 @@ extern u8 D_801A302C[];
 
 void func_8016C2C4(s32 param)
 {
-    register s32 s1 __asm__("$17");
-    register s32 s0 __asm__("$16");
+    s32 s1;
+    s32 s0;
     u16 buf[3];
     s16 v;
     s32 r;
@@ -2704,7 +2702,7 @@ s32 func_8016C49C(s32 param_1_arg) {
     extern u8 D_801A3088[];
     extern u8 D_801A3148;
 
-    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);
+    register u16 *param_1 __asm__("$17") = ((u16 *)param_1_arg);  // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus7)
     int iVar5;
     int iVar6;
     u16 sv[4];
@@ -2871,7 +2869,7 @@ short func_8016CBC0(void)
   unsigned int w3b;
   short count;
   short i;
-register unsigned int zr __asm__("$0");
+register unsigned int zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
   mtx = (*(Mtx8_8016CBC0 *)&D_800AE620);
   count = 0;
   p1.tag = 0x50000000;
@@ -3406,7 +3404,7 @@ void func_8016DF5C(s32 param_1)
     if ((*(u32 *)((u8 *)((void *)param_1) + 0x2c) & 0x8000) == 0) {
         unsigned short uVar7 = 0;
         u16 *psVar6 = (u16 *)&D_8011D030;
-        register s32 iNew __asm__("$17");
+        s32 iNew;
         s32 base;
         do {
             if (psVar6 != (u16 *)((void *)param_1) && (*psVar6 == 0x41 || *psVar6 == 0x48)) {
@@ -3434,7 +3432,7 @@ void func_8016DF5C(s32 param_1)
         *(u32 *)(iNew + 4) = *(u32 *)(iNew + 4) | 0x50000000;
         func_8016E3CC(((void *)param_1));
         {
-            register s32 t10 __asm__("$3");
+            register s32 t10 __asm__("$3");  // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus7)
             t10 = 0x10;
             *(s32 *)((u8 *)((void *)param_1) + 0x20) = iNew;
             *(s32 *)((u8 *)((void *)param_1) + 0x1c) = t10;
@@ -3459,7 +3457,7 @@ void func_8016DF5C(s32 param_1)
         *(s32 *)((u8 *)((void *)param_1) + 0x2c) = 0x1000;
         *(s32 *)((u8 *)((void *)param_1) + 0x30) = 0xff;
         *(s32 *)((u8 *)((void *)param_1) + 0x1c) = 0x10;
-        __asm__ __volatile__("" ::: "memory");
+        __asm__ __volatile__("" ::: "memory");  // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus7)
         sVar1 = 4;
     }
     *(s16 *)((u8 *)((void *)param_1) + 2) = sVar1;
@@ -3525,7 +3523,7 @@ void func_8016E7C8(int param_1, short *param_2, unsigned int *param_3)
     Prim_8016E7C8 prim;
     MATRIX_8016E7C8 m;
     SVECTOR_8016E7C8 tmp;
-    register Prim_8016E7C8 *pp __asm__("$18");   /* $s2 — force &prim into a saved reg */
+    Prim_8016E7C8 *pp;   /* $s2 — force &prim into a saved reg */
 
     ((void (*)(void *, void *))func_80017DC4)(param_2, &m);
     m.t[0] = *(short *)(param_1 + 6);
@@ -3623,7 +3621,7 @@ void func_8016E9EC(u8 *p)
     extern u8 *D_80181140[];
     extern u8 D_80181158[];
     extern u16 D_8018115C[];
-    register u32 zr __asm__("$0");
+    register u32 zr __asm__("$0");  // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus7)
     int i;
     int c;
     u8 *buf;
diff --git a/src/ov_SC07_009/ov_SC07_009_jr_8017AE2C.c b/src/ov_SC07_009/ov_SC07_009_jr_8017AE2C.c
index 0bd39e605..1205ff04e 100644
--- a/src/ov_SC07_009/ov_SC07_009_jr_8017AE2C.c
+++ b/src/ov_SC07_009/ov_SC07_009_jr_8017AE2C.c
@@ -2619,8 +2619,8 @@ extern s16 D_801A3D32;
 extern s16 D_801A3D3C;
 
 void func_8017AE2C(s32 param_1) {
-    register s32 pv __asm__("$16") = param_1;
-    register s16 *g __asm__("$17") = &D_801A3D30;
+    s32 pv = param_1;
+    s16 *g = &D_801A3D30;
 
     switch (g[0]) {
     case 0:
@@ -2765,8 +2765,8 @@ s32 func_8017B238(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B238_8017B238 *)&buf[0] = *(Blk8_8017B238_8017B238 *)src;
         *(Blk8_8017B238_8017B238 *)&buf[8] = *(Blk8_8017B238_8017B238 *)(src + 8);
     } else {
@@ -2911,8 +2911,8 @@ s32 func_8017B614(s32 param_1, s32 param_2)
     u8 buf[16];
 
     if (((u32)param_2) >= 0xB) {
-        register u8 *src __asm__("$16");
-        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));
+        register u8 *src __asm__("$16");  // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7)
+        __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2)));  // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7)
         *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;
         *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);
     } else {
@@ -2936,7 +2936,7 @@ s32 func_8017B614(s32 param_1, s32 param_2)
             v78C = *p78C;
             v78E = D_801A3C36;
             v790 = D_801A3C38;
-            __asm__ __volatile__("");
+            __asm__ __volatile__("");  // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7)
             D_801A3D60 = 1;
             D_801A3BC4 = 0x1E;
             D_80126990 = v794;
@@ -3196,8 +3196,8 @@ extern void (*D_801A3C0C[10])(int);
 
 void func_8017BC38(int param_1)
 {
-    register int i __asm__("$17");
-    register void (**p)(int) __asm__("$16");
+    int i;
+    void (**p)(int);
 
     i = 0;
     p = D_801A3C0C;