From 547571fd183e4eae8837d75f23bd862d1090247e Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Thu, 10 Sep 2026 21:08:34 -0600 Subject: [PATCH] =?UTF-8?q?phase-36:=20S104=20d1=20=E2=80=94=20func=5F8018?= =?UTF-8?q?5960=20at=200=20levers=20(was=201=20launder):=20the=20one-armed?= =?UTF-8?q?=20abs=20as=20an=20if/else=20with=20the=20non-simple=20value=20?= =?UTF-8?q?in=20the=20ELSE=20arm=20(jump1=20keeps=20it,=20jump.c:739-741;?= =?UTF-8?q?=20cse's=20skip-block=20path=20stops=20at=20the=20join,=20cse.c?= =?UTF-8?q?:8116);=2010=20bodies,=20gate=20IDENTICAL=20each?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../agents/ov_SC04_011__func_80185960/body.c | 27 ++ .../ov_SC04_011__func_80185960/mechanism.md | 75 ++++ .run/P36/delever/calibration.json | 372 +++++++++--------- .run/P36/delever/ledger.jsonl | 10 + src/md_SC07_004/md_SC07_004.c | 6 +- src/ov_SC02_005/ov_SC02_005_jr_80185060.c | 6 +- src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c | 6 +- src/ov_SC04_003/ov_SC04_003_jr_8017BEBC.c | 6 +- src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c | 6 +- src/ov_SC04_011/ov_SC04_011_jr_8017D494.c | 6 +- src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c | 6 +- src/ov_SC06_022/ov_SC06_022_jr_80180CD0.c | 6 +- src/ov_SC06_024/ov_SC06_024_jr_80181D34.c | 6 +- src/ov_SC06_032/ov_SC06_032_jr_80182890.c | 6 +- 14 files changed, 328 insertions(+), 216 deletions(-) create mode 100644 .run/P36/agents/ov_SC04_011__func_80185960/body.c create mode 100644 .run/P36/agents/ov_SC04_011__func_80185960/mechanism.md diff --git a/.run/P36/agents/ov_SC04_011__func_80185960/body.c b/.run/P36/agents/ov_SC04_011__func_80185960/body.c new file mode 100644 index 000000000..34eab1f8f --- /dev/null +++ b/.run/P36/agents/ov_SC04_011__func_80185960/body.c @@ -0,0 +1,27 @@ +void func_80185960(s32 target, u16 *cur, s32 step) +{ + s32 t; + s32 diff; + s32 mag; + + t = (target - *cur) & 0xFFF; + if (t < 0x800) { + diff = t; + } else { + diff = t | 0xF000; + } + if ((s16)diff >= 0) { + mag = diff; + } else { + mag = -diff; + } + if ((s16)mag > (u16)step) { + if ((s16)diff < 0) { + *cur = *cur - step; + } else { + *cur = *cur + step; + } + } else { + *cur = target; + } +} diff --git a/.run/P36/agents/ov_SC04_011__func_80185960/mechanism.md b/.run/P36/agents/ov_SC04_011__func_80185960/mechanism.md new file mode 100644 index 000000000..5bd2ccc75 --- /dev/null +++ b/.run/P36/agents/ov_SC04_011__func_80185960/mechanism.md @@ -0,0 +1,75 @@ +# func_80185960 (ov_SC04_011_jr_8017D494.c): mechanism (P36 T7 S104, agent d1) + +**Result: score 0 in plain C.** No pin, no asm, no added volatile. Levers go from 1 to 0 (the `launder` at the old line 8802). +The class has 10 copies. They share the text, so the same edit should apply to all 10 (for example `func_80185DAC` in +`src/ov_SC06_032/ov_SC06_032_jr_80182890.c:5139`). The coordinator's gate decides that. + +## (a) The residual in one sentence +Target: the sign test `(s16)diff < 0` appears twice, each time as `sll v0,a3,16; bgez v0`. Mine: cse computes the +sign-extension `sll/sra a3` once and the later `if ((s16)diff < 0)` reuses it. The count is 35 vs 33, and 12 of the +edit distance is the kept `sra` plus the `move` and `nop` that follow from it. + +## (b) The pass and the decision (read, then proven on dumps and bytes) +- **cse, the skip-blocks path extension.** The lever-free text is `mag = diff; if ((s16)diff < 0) mag = -diff;`. That is + a one-armed block: the branch jumps around one insn to a label with `LABEL_NUSES == 1` and no BARRIER before it. + `cse_end_of_basic_block` (`cse.c:8101-8106` condition, `:8149` "Detect a branch around a block of code") keeps the + path going PAST the join label. `invalidate_skipped_block` kills only `mag`, so the entry + `(sign_extend (subreg:HI diff))` in reg 82 survives into the second test. The `.cse` dump of the free body shows it: + `Processing block from 39 to 98`, and insn 62 tests reg 82. Because reg 82 now has 2 uses, combine can no longer + fold `ashiftrt(ashift x 16) 16 >= 0` into `ashift >= 0`, and the `sra` is kept. `-fcse-skip-blocks` is an -O2 flag + (`toplev.c:3390`). +- **jump1 undoes the obvious fix.** Writing `if ((s16)diff < 0) mag = -diff; else mag = diff;` does not help (score + 12). `jump.c:699-750` ("Simplify if (...) x = a; else x = b; → x = b; if (...) x = a;") rewrites the diamond back + into the skip shape before cse. Its guard is `jump.c:739-741`: the ELSE value `b` must be a REG, SUBREG or constant, + and here `b` is `diff`. +- **The ternary is dead too.** `mag = (s16)diff < 0 ? -diff : diff;` and `mag = (s16)diff >= 0 ? diff : -diff;` both + score 12. When one arm is a NEGATE of the other, expand_expr's COND_EXPR singleton path (`expr.c:5808-5814`, emitted + at `:5866-5890`) generates `mag = diff; if (!c) mag = -mag;` already in the `.rtl` (3 barriers, no diamond). + +## (c) The move that closed it +```c + if ((s16)diff >= 0) { + mag = diff; + } else { + mag = -diff; + } +``` +This is an if/else with the NON-simple value (`-diff`, a NEG) in the ELSE arm. The jump.c:739 guard fails, so the +diamond survives to cse. Now the taken branch reaches a barrier-preceded else label (the follow_jumps case, +`cse.c:8116`), and the scan stops at the join CODE_LABEL (`cse.c:8039`). The `.cse` dump confirms it: +`Processing block from 38 to 54` ends at the join, and `56 to 103` starts with a fresh table. The second test then +recomputes its own `sll`, and combine folds each one into `sll; bgez`. The diamond lasts to `.sched2` (4 barriers) and +reorg removes it in `.dbr` (3 barriers): `move v1,a3` lands in the `bgez` delay slot, the same as the target. Proven +on bytes: `--try` gives score 0, 33/33 instructions. + +## (d) Generator proposal +When the target recomputes a test (or any expression) after a one-armed `x = a; if (c) x = f(a);` block, and mine reuses +it from a kept register, rewrite the block as `if (!c) x = a; else x = f(a);`: an if/else whose ELSE arm holds the +non-REG/SUBREG/constant value. That keeps the jump.c:739 guard from collapsing the diamond, so cse's path ends at the +join. Never use a `?:` for this, because expr.c's singleton path collapses it at expansion. The row-3 move in +`residual_moves.md` ("put a real CODE_LABEL join between the copy and its use") was missing this precondition: which +arm must hold the non-simple value. + +## (e) What did NOT work (byte evidence) +- The free body gives 12. `free_020` (diff as `s16`) gives 9: the reuse is still there, only one `move` fewer. +- `if (c) mag=-diff; else mag=diff;` gives 12 (jump1 collapses it, see above). +- `s16 mag` with the test on `mag` or on `(s16)diff` (v1/v2) gives 16. cse still matches the canonicalised + sign-extension across the subreg. +- `(s16)mag < 0` on the copy (v3) gives 12, and both `diff`/`mag` as `s16` (v4) gives 12. +- Both ternary spellings (c3/c4) give 12 (collapsed at `.rtl`). + +## (f) Where the method fell short / what helped +- `neighbours.txt` had no relevant note. The crack came from METHOD step 3's grep across the corpus for the same shape + (`| 0xF000`). `src/ov_SC03_010/ov_SC03_010_jr_8017C730.c:3400-3405` records "a one-armed form leaves a barrier-free + skippable block, -fcse-skip-blocks rides the equivalence past the join … MUST be a real if/ELSE". It does not say that + the arm order matters. That is the jump.c:739 precondition added here. +- The free sweep (R2-R26) has no "if/else with the arms swapped" move or "one-armed → if/else" move, which is why it + stopped at 9. A generator for (d) would have found this mechanically. +- Reading the `.cse` "Processing block from S to E" lines was the deciding measurement. It took one dump and was + cheaper than an allocation table (this residual was not a register residual). + +## (g) Structs question +No. The lever was a cse EBB-path effect on a pure register value (`diff`), and cse decides it from control-flow shape +(label use counts, barriers), not from memory. The only memory is `*cur` (a plain `u16 *`), and nothing in the defect +touches it. A struct type would not change the `expr.c:4568-4577` aggregate-vs-scalar channel here, because no store +has to be kept ordered against a load. Not tested: there was nothing to test. diff --git a/.run/P36/delever/calibration.json b/.run/P36/delever/calibration.json index 9c6f0b313..fd9f04c98 100644 --- a/.run/P36/delever/calibration.json +++ b/.run/P36/delever/calibration.json @@ -1,7 +1,7 @@ { - "head": "7db8372ae", + "head": "55ef71b95", "stamp": "15956e4a96c4", - "generated": "2026-09-10 21:05", + "generated": "2026-09-10 21:07", "aliases": [ "main", "ov_SC03_014", @@ -21,207 +21,207 @@ "main": { "objects": 85, "identical": 85, - "seconds": 10.652000000000003, - "mean_s": 0.125 + "seconds": 11.27, + "mean_s": 0.133 }, "ov_SC03_014": { "objects": 32, "identical": 32, - "seconds": 6.837999999999999, - "mean_s": 0.214 + "seconds": 7.015, + "mean_s": 0.219 }, "ov_SC03_015": { "objects": 32, "identical": 32, - "seconds": 6.721, - "mean_s": 0.21 + "seconds": 6.8740000000000006, + "mean_s": 0.215 }, "ov_SC04_011": { "objects": 28, "identical": 28, - "seconds": 6.3050000000000015, - "mean_s": 0.225 + "seconds": 6.5649999999999995, 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"header": false, "includers": 0, "nhash_before": "657f8158c460c66661fb30c81fd4ac31df15d05d", "nhash_after": "b65050511788dfc5a92aafbb5656ae915f2cd697", "source": "propagate:src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.c:func_80166F58", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.523, "objects": ["build/src/ov_SC07_011/ov_SC07_011_jr_8015C32C.o"], "before_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n\n extern s32 D_8011D030;\n extern unsigned char D_8018F3B8[];\n\n register int p2 __asm__(\"$20\"); /* $s4 */ // !FAKE: pin $20 \u2014 NEEDED DIFFERS (P36 rung B tus4)\n int p3; /* $s1 */\n register int t2 __asm__(\"$5\"); /* a1 */ // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus4)\n int t3; /* a2 */\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB \u2014 NEEDED DIFFERS; launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus4)\n t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus4)\n eq = (p2 == p3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_8018F3B8[((short)param_4) * 0xc4], 0xc4);\n}\n", "after_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n extern s32 D_8011D030;\n extern unsigned char D_8018F3B8[];\n\n int t2;\n int t3;\n int p2;\n int p3;\n\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = (short)param_2;\n p2 = (short)t2;\n t3 = (short)param_3;\n p3 = (short)t3;\n eq = (t2 == t3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_8018F3B8[((short)param_4) * 0xc4], 0xc4);\n}\n"} {"ts": "2026-09-10 21:06:56", "label": "s104_d2", "rung": "E", "calib": {"head": "7db8372ae", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC01_077/ov_SC01_077_jr_8015C32C.c", "fn": "func_80166F58", "addr": 2148953944, "aliases": null, "header": false, "includers": 0, "nhash_before": "a5f96d7298b7249241533d514c54995f2a44d535", "nhash_after": "b65050511788dfc5a92aafbb5656ae915f2cd697", "source": "propagate:src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.c:func_80166F58", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.518, "objects": ["build/src/ov_SC01_077/ov_SC01_077_jr_8015C32C.o"], "before_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n extern unsigned char D_801D97E8[];\n\n register int p2 __asm__(\"$20\"); /* $s4 */ // !FAKE: pin $20 \u2014 NEEDED DIFFERS (P36 rung B tus2)\n int p3; /* $s1 */\n register int t2 __asm__(\"$5\"); /* a1 */ // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus2)\n int t3; /* a2 */\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB \u2014 NEEDED DIFFERS; launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus2)\n t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus2)\n eq = (p2 == p3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_801D97E8[((short)param_4) * 0xc4], 0xc4);\n}\n", "after_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n extern s32 D_8011D030;\n extern unsigned char D_801D97E8[];\n\n int t2;\n int t3;\n int p2;\n int p3;\n\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = (short)param_2;\n p2 = (short)t2;\n t3 = (short)param_3;\n p3 = (short)t3;\n eq = (t2 == t3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_801D97E8[((short)param_4) * 0xc4], 0xc4);\n}\n"} {"ts": "2026-09-10 21:06:57", "label": "s104_d2", "rung": "E", "calib": {"head": "7db8372ae", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC07_006/ov_SC07_006_jr_8015C32C.c", "fn": "func_80166F58", "addr": 2148953944, "aliases": null, "header": false, "includers": 0, "nhash_before": "a5f96d7298b7249241533d514c54995f2a44d535", "nhash_after": "b65050511788dfc5a92aafbb5656ae915f2cd697", "source": "propagate:src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.c:func_80166F58", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.656, "objects": ["build/src/ov_SC07_006/ov_SC07_006_jr_8015C32C.o"], "before_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n extern unsigned char D_801F50C0[];\n\n register int p2 __asm__(\"$20\"); /* $s4 */ // !FAKE: pin $20 \u2014 NEEDED DIFFERS (P36 rung B tus4)\n int p3; /* $s1 */\n register int t2 __asm__(\"$5\"); /* a1 */ // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus4)\n int t3; /* a2 */\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB \u2014 NEEDED DIFFERS; launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus4)\n t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus4)\n eq = (p2 == p3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_801F50C0[((short)param_4) * 0xc4], 0xc4);\n}\n", "after_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n extern s32 D_8011D030;\n extern unsigned char D_801F50C0[];\n\n int t2;\n int t3;\n int p2;\n int p3;\n\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = (short)param_2;\n p2 = (short)t2;\n t3 = (short)param_3;\n p3 = (short)t3;\n eq = (t2 == t3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_801F50C0[((short)param_4) * 0xc4], 0xc4);\n}\n"} +{"ts": "2026-09-10 21:07:45", "label": "s104_d1", "rung": "E", "calib": {"head": "55ef71b95", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC04_011/ov_SC04_011_jr_8017D494.c", "fn": "func_80185960", "addr": 2149079392, "aliases": null, "header": false, "includers": 0, "nhash_before": "6f9b635381cfed4e65260e98d4a16f64f97515c2", "nhash_after": "c935c2c51102d9037d3fbb3a711bf772b71f2efc", "source": ".run/P36/agents/ov_SC04_011__func_80185960/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.709, "objects": ["build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o"], "before_text": "void func_80185960(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n mag = diff;\n if ((s16)diff < 0) {\n mag = -diff;\n }\n __asm__ __volatile__(\"\" : \"=r\"(diff) : \"0\"(diff) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B t3_tus1)\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n", "after_text": "void func_80185960(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n if ((s16)diff >= 0) {\n mag = diff;\n } else {\n mag = -diff;\n }\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n"} +{"ts": "2026-09-10 21:08:15", "label": "s104_d1", "rung": "E", "calib": {"head": "55ef71b95", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c", "fn": "func_80180F74", "addr": 2149060468, "aliases": null, "header": false, "includers": 0, "nhash_before": "6f9b635381cfed4e65260e98d4a16f64f97515c2", "nhash_after": "c935c2c51102d9037d3fbb3a711bf772b71f2efc", "source": "propagate:src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80185960", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.469, "objects": ["build/src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.o"], "before_text": "void func_80180F74(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n mag = diff;\n if ((s16)diff < 0) {\n mag = -diff;\n }\n __asm__ __volatile__(\"\" : \"=r\"(diff) : \"0\"(diff) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus7)\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n", "after_text": "void func_80180F74(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n if ((s16)diff >= 0) {\n mag = diff;\n } else {\n mag = -diff;\n }\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n"} +{"ts": "2026-09-10 21:08:17", "label": "s104_d1", "rung": "E", "calib": {"head": "55ef71b95", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c", "fn": "func_801829E8", "addr": 2149067240, "aliases": null, "header": false, "includers": 0, "nhash_before": "6f9b635381cfed4e65260e98d4a16f64f97515c2", "nhash_after": "c935c2c51102d9037d3fbb3a711bf772b71f2efc", "source": "propagate:src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80185960", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.564, "objects": ["build/src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.o"], "before_text": "void func_801829E8(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n mag = diff;\n if ((s16)diff < 0) {\n mag = -diff;\n }\n __asm__ __volatile__(\"\" : \"=r\"(diff) : \"0\"(diff) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus8)\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n", "after_text": "void func_801829E8(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n if ((s16)diff >= 0) {\n mag = diff;\n } else {\n mag = -diff;\n }\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n"} +{"ts": "2026-09-10 21:08:18", "label": "s104_d1", "rung": "E", "calib": {"head": "55ef71b95", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c", "fn": "func_8018ABD4", "addr": 2149100500, "aliases": null, "header": false, "includers": 0, "nhash_before": "6f9b635381cfed4e65260e98d4a16f64f97515c2", "nhash_after": "c935c2c51102d9037d3fbb3a711bf772b71f2efc", "source": "propagate:src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80185960", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.388, "objects": ["build/src/ov_SC06_018/ov_SC06_018_jr_80187AEC.o"], "before_text": "void func_8018ABD4(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n mag = diff;\n if ((s16)diff < 0) {\n mag = -diff;\n }\n __asm__ __volatile__(\"\" : \"=r\"(diff) : \"0\"(diff) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n", "after_text": "void func_8018ABD4(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n if ((s16)diff >= 0) {\n mag = diff;\n } else {\n mag = -diff;\n }\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n"} +{"ts": "2026-09-10 21:08:19", "label": "s104_d1", "rung": "E", "calib": {"head": "55ef71b95", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_032/ov_SC06_032_jr_80182890.c", "fn": "func_80185DAC", "addr": 2149080492, "aliases": null, "header": false, "includers": 0, "nhash_before": "6f9b635381cfed4e65260e98d4a16f64f97515c2", "nhash_after": "c935c2c51102d9037d3fbb3a711bf772b71f2efc", "source": "propagate:src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80185960", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.623, "objects": ["build/src/ov_SC06_032/ov_SC06_032_jr_80182890.o"], "before_text": "void func_80185DAC(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n mag = diff;\n if ((s16)diff < 0) {\n mag = -diff;\n }\n __asm__ __volatile__(\"\" : \"=r\"(diff) : \"0\"(diff) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n", "after_text": "void func_80185DAC(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n if ((s16)diff >= 0) {\n mag = diff;\n } else {\n mag = -diff;\n }\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n"} +{"ts": "2026-09-10 21:08:20", "label": "s104_d1", "rung": "E", "calib": {"head": "55ef71b95", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC04_003/ov_SC04_003_jr_8017BEBC.c", "fn": "func_8017FF18", "addr": 2149056280, "aliases": null, "header": false, "includers": 0, "nhash_before": "6f9b635381cfed4e65260e98d4a16f64f97515c2", "nhash_after": "c935c2c51102d9037d3fbb3a711bf772b71f2efc", "source": "propagate:src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80185960", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.376, "objects": ["build/src/ov_SC04_003/ov_SC04_003_jr_8017BEBC.o"], "before_text": "void func_8017FF18(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n mag = diff;\n if ((s16)diff < 0) {\n mag = -diff;\n }\n __asm__ __volatile__(\"\" : \"=r\"(diff) : \"0\"(diff) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n", "after_text": "void func_8017FF18(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n if ((s16)diff >= 0) {\n mag = diff;\n } else {\n mag = -diff;\n }\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n"} +{"ts": "2026-09-10 21:08:21", "label": "s104_d1", "rung": "E", "calib": {"head": "55ef71b95", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_022/ov_SC06_022_jr_80180CD0.c", "fn": "func_80180F30", "addr": 2149060400, "aliases": null, "header": false, "includers": 0, "nhash_before": "6f9b635381cfed4e65260e98d4a16f64f97515c2", "nhash_after": "c935c2c51102d9037d3fbb3a711bf772b71f2efc", "source": "propagate:src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80185960", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.198, "objects": ["build/src/ov_SC06_022/ov_SC06_022_jr_80180CD0.o"], "before_text": "void func_80180F30(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n mag = diff;\n if ((s16)diff < 0) {\n mag = -diff;\n }\n __asm__ __volatile__(\"\" : \"=r\"(diff) : \"0\"(diff) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n", "after_text": "void func_80180F30(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n if ((s16)diff >= 0) {\n mag = diff;\n } else {\n mag = -diff;\n }\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n"} +{"ts": "2026-09-10 21:08:21", "label": "s104_d1", "rung": "E", "calib": {"head": "55ef71b95", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_024/ov_SC06_024_jr_80181D34.c", "fn": "func_80183408", "addr": 2149069832, "aliases": null, "header": false, "includers": 0, "nhash_before": "6f9b635381cfed4e65260e98d4a16f64f97515c2", "nhash_after": "c935c2c51102d9037d3fbb3a711bf772b71f2efc", "source": "propagate:src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80185960", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.14, "objects": ["build/src/ov_SC06_024/ov_SC06_024_jr_80181D34.o"], "before_text": "void func_80183408(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n mag = diff;\n if ((s16)diff < 0) {\n mag = -diff;\n }\n __asm__ __volatile__(\"\" : \"=r\"(diff) : \"0\"(diff) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n", "after_text": "void func_80183408(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n if ((s16)diff >= 0) {\n mag = diff;\n } else {\n mag = -diff;\n }\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n"} +{"ts": "2026-09-10 21:08:21", "label": "s104_d1", "rung": "E", "calib": {"head": "55ef71b95", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_005/ov_SC02_005_jr_80185060.c", "fn": "func_80185DD0", "addr": 2149080528, "aliases": null, "header": false, "includers": 0, "nhash_before": "6f9b635381cfed4e65260e98d4a16f64f97515c2", "nhash_after": "c935c2c51102d9037d3fbb3a711bf772b71f2efc", "source": "propagate:src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80185960", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.072, "objects": ["build/src/ov_SC02_005/ov_SC02_005_jr_80185060.o"], "before_text": "void func_80185DD0(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n mag = diff;\n if ((s16)diff < 0) {\n mag = -diff;\n }\n __asm__ __volatile__(\"\" : \"=r\"(diff) : \"0\"(diff) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n", "after_text": "void func_80185DD0(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n if ((s16)diff >= 0) {\n mag = diff;\n } else {\n mag = -diff;\n }\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n"} +{"ts": "2026-09-10 21:08:23", "label": "s104_d1", "rung": "E", "calib": {"head": "55ef71b95", "stamp": "15956e4a96c4"}, "tu": "src/md_SC07_004/md_SC07_004.c", "fn": "func_801A3624", "addr": 2149201444, "aliases": null, "header": false, "includers": 0, "nhash_before": "6f9b635381cfed4e65260e98d4a16f64f97515c2", "nhash_after": "c935c2c51102d9037d3fbb3a711bf772b71f2efc", "source": "propagate:src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:func_80185960", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.557, "objects": ["build/src/md_SC07_004/md_SC07_004.o"], "before_text": "void func_801A3624(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n mag = diff;\n if ((s16)diff < 0) {\n mag = -diff;\n }\n __asm__ __volatile__(\"\" : \"=r\"(diff) : \"0\"(diff) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n", "after_text": "void func_801A3624(s32 target, u16 *cur, s32 step)\n{\n s32 t;\n s32 diff;\n s32 mag;\n\n t = (target - *cur) & 0xFFF;\n if (t < 0x800) {\n diff = t;\n } else {\n diff = t | 0xF000;\n }\n if ((s16)diff >= 0) {\n mag = diff;\n } else {\n mag = -diff;\n }\n if ((s16)mag > (u16)step) {\n if ((s16)diff < 0) {\n *cur = *cur - step;\n } else {\n *cur = *cur + step;\n }\n } else {\n *cur = target;\n }\n}\n"} diff --git a/src/md_SC07_004/md_SC07_004.c b/src/md_SC07_004/md_SC07_004.c index ed623c7d9..efeff495a 100644 --- a/src/md_SC07_004/md_SC07_004.c +++ b/src/md_SC07_004/md_SC07_004.c @@ -2219,11 +2219,11 @@ void func_801A3624(s32 target, u16 *cur, s32 step) } else { diff = t | 0xF000; } - mag = diff; - if ((s16)diff < 0) { + if ((s16)diff >= 0) { + mag = diff; + } else { mag = -diff; } - __asm__ __volatile__("" : "=r"(diff) : "0"(diff) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) if ((s16)mag > (u16)step) { if ((s16)diff < 0) { *cur = *cur - step; diff --git a/src/ov_SC02_005/ov_SC02_005_jr_80185060.c b/src/ov_SC02_005/ov_SC02_005_jr_80185060.c index 5c1727898..e55ed8ac5 100644 --- a/src/ov_SC02_005/ov_SC02_005_jr_80185060.c +++ b/src/ov_SC02_005/ov_SC02_005_jr_80185060.c @@ -593,11 +593,11 @@ void func_80185DD0(s32 target, u16 *cur, s32 step) } else { diff = t | 0xF000; } - mag = diff; - if ((s16)diff < 0) { + if ((s16)diff >= 0) { + mag = diff; + } else { mag = -diff; } - __asm__ __volatile__("" : "=r"(diff) : "0"(diff) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) if ((s16)mag > (u16)step) { if ((s16)diff < 0) { *cur = *cur - step; diff --git a/src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c b/src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c index b6276af50..2063f1823 100644 --- a/src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c +++ b/src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c @@ -7103,11 +7103,11 @@ void func_801829E8(s32 target, u16 *cur, s32 step) } else { diff = t | 0xF000; } - mag = diff; - if ((s16)diff < 0) { + if ((s16)diff >= 0) { + mag = diff; + } else { mag = -diff; } - __asm__ __volatile__("" : "=r"(diff) : "0"(diff) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus8) if ((s16)mag > (u16)step) { if ((s16)diff < 0) { *cur = *cur - step; diff --git a/src/ov_SC04_003/ov_SC04_003_jr_8017BEBC.c b/src/ov_SC04_003/ov_SC04_003_jr_8017BEBC.c index 1b77b38dc..5f9a38896 100644 --- a/src/ov_SC04_003/ov_SC04_003_jr_8017BEBC.c +++ b/src/ov_SC04_003/ov_SC04_003_jr_8017BEBC.c @@ -4741,11 +4741,11 @@ void func_8017FF18(s32 target, u16 *cur, s32 step) } else { diff = t | 0xF000; } - mag = diff; - if ((s16)diff < 0) { + if ((s16)diff >= 0) { + mag = diff; + } else { mag = -diff; } - __asm__ __volatile__("" : "=r"(diff) : "0"(diff) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) if ((s16)mag > (u16)step) { if ((s16)diff < 0) { *cur = *cur - step; diff --git a/src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c b/src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c index 9343b47ea..ea597d305 100644 --- a/src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c +++ b/src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c @@ -6313,11 +6313,11 @@ void func_80180F74(s32 target, u16 *cur, s32 step) } else { diff = t | 0xF000; } - mag = diff; - if ((s16)diff < 0) { + if ((s16)diff >= 0) { + mag = diff; + } else { mag = -diff; } - __asm__ __volatile__("" : "=r"(diff) : "0"(diff) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7) if ((s16)mag > (u16)step) { if ((s16)diff < 0) { *cur = *cur - step; diff --git a/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c b/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c index 9010a8be8..36508ad8a 100644 --- a/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c +++ b/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c @@ -8604,11 +8604,11 @@ void func_80185960(s32 target, u16 *cur, s32 step) } else { diff = t | 0xF000; } - mag = diff; - if ((s16)diff < 0) { + if ((s16)diff >= 0) { + mag = diff; + } else { mag = -diff; } - __asm__ __volatile__("" : "=r"(diff) : "0"(diff) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B t3_tus1) if ((s16)mag > (u16)step) { if ((s16)diff < 0) { *cur = *cur - step; diff --git a/src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c b/src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c index 0488ec72e..3e8b11427 100644 --- a/src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c +++ b/src/ov_SC06_018/ov_SC06_018_jr_80187AEC.c @@ -5286,11 +5286,11 @@ void func_8018ABD4(s32 target, u16 *cur, s32 step) } else { diff = t | 0xF000; } - mag = diff; - if ((s16)diff < 0) { + if ((s16)diff >= 0) { + mag = diff; + } else { mag = -diff; } - __asm__ __volatile__("" : "=r"(diff) : "0"(diff) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) if ((s16)mag > (u16)step) { if ((s16)diff < 0) { *cur = *cur - step; diff --git a/src/ov_SC06_022/ov_SC06_022_jr_80180CD0.c b/src/ov_SC06_022/ov_SC06_022_jr_80180CD0.c index 67ef21af5..8cd8b819b 100644 --- a/src/ov_SC06_022/ov_SC06_022_jr_80180CD0.c +++ b/src/ov_SC06_022/ov_SC06_022_jr_80180CD0.c @@ -2964,11 +2964,11 @@ void func_80180F30(s32 target, u16 *cur, s32 step) } else { diff = t | 0xF000; } - mag = diff; - if ((s16)diff < 0) { + if ((s16)diff >= 0) { + mag = diff; + } else { mag = -diff; } - __asm__ __volatile__("" : "=r"(diff) : "0"(diff) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) if ((s16)mag > (u16)step) { if ((s16)diff < 0) { *cur = *cur - step; diff --git a/src/ov_SC06_024/ov_SC06_024_jr_80181D34.c b/src/ov_SC06_024/ov_SC06_024_jr_80181D34.c index 9685cb0d8..e5a9bb5ce 100644 --- a/src/ov_SC06_024/ov_SC06_024_jr_80181D34.c +++ b/src/ov_SC06_024/ov_SC06_024_jr_80181D34.c @@ -3723,11 +3723,11 @@ void func_80183408(s32 target, u16 *cur, s32 step) } else { diff = t | 0xF000; } - mag = diff; - if ((s16)diff < 0) { + if ((s16)diff >= 0) { + mag = diff; + } else { mag = -diff; } - __asm__ __volatile__("" : "=r"(diff) : "0"(diff) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) if ((s16)mag > (u16)step) { if ((s16)diff < 0) { *cur = *cur - step; diff --git a/src/ov_SC06_032/ov_SC06_032_jr_80182890.c b/src/ov_SC06_032/ov_SC06_032_jr_80182890.c index 9dda1f941..fde4fedc3 100644 --- a/src/ov_SC06_032/ov_SC06_032_jr_80182890.c +++ b/src/ov_SC06_032/ov_SC06_032_jr_80182890.c @@ -5148,11 +5148,11 @@ void func_80185DAC(s32 target, u16 *cur, s32 step) } else { diff = t | 0xF000; } - mag = diff; - if ((s16)diff < 0) { + if ((s16)diff >= 0) { + mag = diff; + } else { mag = -diff; } - __asm__ __volatile__("" : "=r"(diff) : "0"(diff) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) if ((s16)mag > (u16)step) { if ((s16)diff < 0) { *cur = *cur - step;