From 55ef71b95f12b4c94bfed635d99fc7f9ade788cd Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Thu, 10 Sep 2026 21:07:10 -0600 Subject: [PATCH] =?UTF-8?q?phase-36:=20S104=20d2=20=E2=80=94=20func=5F8016?= =?UTF-8?q?6F58=20(ov=5FMAIN=5F012=20class)=20at=200=20levers=20(was=205):?= =?UTF-8?q?=20the=20banked=20SC04=5F011=20header=20ported=20(return=20type?= =?UTF-8?q?=20from=20the=20TU's=20extern,=20table=20symbol=20renamed)=20+?= =?UTF-8?q?=20a=20re-extended=20short=20copy=20with=20a=20second=20use=20(?= =?UTF-8?q?combine.c:7926-7942,=20local-alloc.c:700);=208=20bodies,=20gate?= =?UTF-8?q?=20IDENTICAL=20each?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../ov_MAIN_012__func_80166F58/mechanism.md | 71 ++++ .run/P36/delever/calibration.json | 366 +++++++++--------- .run/P36/delever/ledger.jsonl | 8 + src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.c | 18 +- src/ov_SC01_077/ov_SC01_077_jr_8015C32C.c | 18 +- src/ov_SC02_037/ov_SC02_037_jr_8015A3C8.c | 18 +- src/ov_SC03_107/ov_SC03_107_jr_8015A3C8.c | 18 +- src/ov_SC07_006/ov_SC07_006_jr_8015C32C.c | 18 +- src/ov_SC07_007/ov_SC07_007_jr_8015C32C.c | 18 +- src/ov_SC07_010/ov_SC07_010_jr_8015C32C.c | 18 +- src/ov_SC07_011/ov_SC07_011_jr_8015C32C.c | 18 +- 11 files changed, 344 insertions(+), 245 deletions(-) create mode 100644 .run/P36/agents/ov_MAIN_012__func_80166F58/mechanism.md diff --git a/.run/P36/agents/ov_MAIN_012__func_80166F58/mechanism.md b/.run/P36/agents/ov_MAIN_012__func_80166F58/mechanism.md new file mode 100644 index 000000000..62e72951c --- /dev/null +++ b/.run/P36/agents/ov_MAIN_012__func_80166F58/mechanism.md @@ -0,0 +1,71 @@ +# func_80166F58 (ov_MAIN_012_jr_8015A3C8.c) — P36 S104 agent d2 + +**Result: score 0 in plain C on the first `--try`** (69/69 ins; no pin, no asm, no volatile, no do-while). Levers 5 → 0. +The same text (only the `D_801xxxxx` table symbol substituted) also scores 0 in all 7 other TUs that carry the lever +spelling: ov_SC07_007, ov_SC02_037, ov_SC03_107, ov_SC07_010, ov_SC07_006, ov_SC01_077, ov_SC07_011 +(`scratch/port_.c`, each `--try` printed `score 0 … MATCH`). + +## (a) The residual in one sentence +The target sign-extends each parameter in place (`sll/sra a1,a1,16`) and then copies it into its callee-saved home +(`move s4,a1`, the same for `a2`/`s1`); the lever-free body writes the `sra` straight into `s4`/`s1`, so it is 2 instructions +short per parameter (COUNT, 67 vs 69). Instructions are missing; the registers are not wrong. + +## (b) The passes and decisions (all read in the dumps `scratch/dumps_match/`, `scratch/dumps_free/`) +- **expand / cse.** `p2 = (short)t2`, where `t2` already holds `(short)param_2`, expands to a SECOND `ashift/ashiftrt 16` + pair into `p2` (insns 25/26 in `.rtl`). That is a shift, not a `(set REG0 REG1)`, so cse's register-copy folding + (`cse.c:7440-7474`) never sees a copy, and nothing merges `t2` and `p2` (the pair is still there in `.cse`, `.cse2`). + In the free body `p2 = t2` IS a REG copy and cse folds it: one pseudo, written directly by the `sra`, lives in `$s4`. +- **combine.** `simplify_shift_const`, `combine.c:7926-7942` ("(ashiftrt (ashift foo C1) C2) and FOO has more than C1 + high-order bits equal to the sign bit"): `t2` has 17 sign-bit copies (recorded by `set_nonzero_bits_and_sign_copies`, + `combine.c:779`), so the pair collapses to `count = 0`, i.e. the plain copy `(set (reg 78 p2) (reg 76 t2))` (`.combine` + insn 26). combine does it AFTER cse, so no pass folds that copy any more. `t2` has a second use (`eq = (t2 == t3)`, + the `xor` insn 35) so combine cannot instead fold the `sra` into `p2`. +- **local-alloc.** `update_equiv_regs` → `optimize_reg_copy_1` (`local-alloc.c:700`, called at `:1007`): the copy's source + `t2` dies later in the same block, so the later reader (the `xor`) is rewritten to read `p2`/`p3` and `t2` dies at the + copy (`.lreg` insn 35 reads `(reg 78)`,`(reg 79)`; insn 26 carries `REG_DEAD 76`). `t2` is now a two-insn local + quantity and gets the dying `$a1` of its own `sll`; `p2` crosses the calls and goes global to `$s4`. Hence + `sll a1; sra a1; move s4,a1` — exactly the target (and the `xor s4,s1` the target shows). + +The tree's levers faked exactly this: the pins put `t2` in `$5` and `p2` in `$20`, and the SHB launders stopped cse from +seeing `p2 = t2` as a copy. + +## (c) The move that closed it (R71 port of the banked ov_SC04_011 header `src/shared/ov/func_80166F58__3728db8a.h`) +1. `p2 = t2;` → `p2 = (short)t2;` and `p3 = t3;` → `p3 = (short)t3;` (re-extend the already-short value into the home). +2. `eq = (p2 == p3);` → `eq = (t2 == t3);` (compare the pre-copy temps: the second use of `t2` is what keeps combine + from merging the `sra` into `p2`). +Both are load-bearing, proved on bytes: only the `p3` copy plain → score 2 (`scratch/v_p3plain.c`); `eq = (p2 == p3)` with +both re-extensions → score 4 (`scratch/v_eqp.c`); `short t2, t3` locals with plain copies → 4 (`scratch/v_shortlocals.c`). +Declaration order was reordered to the header's (`t2,t3,p2,p3`) but it is not what closed it (the extension statements are). + +**Why the naive splice was a COMPILE-ERROR:** the header defines `s32 func_80166F58(...)` and the table `D_8018E9E0`; +ov_MAIN_012 declares `extern void func_80166F58(s32, s32, s32, s32);` later in the same TU (lines 7932, 7980 — +"conflicting types"), and its record table is `D_80184418`. The function has no `return` statement, so `void` vs `s32` +is byte-neutral. Those two renames are the ENTIRE port. + +## (d) Generator proposal +When a lever class has a lever-free banked twin of the same function name and size in another overlay (`related.txt` +already finds them), port the twin's body mechanically: substitute every extern symbol that differs by position in the +disassembly (here only the `%hi/%lo` table `D_8018E9E0`→`D_80184418`, found by pairing relocations of the two target +objects) and take the return type from the target TU's own later `extern` prototype — then `--try`. For the residual +class itself: **"when the target shows `sra aN,aN,16; move sK,aN` and mine shows `sra sK,aN,16`, spell the home as a +re-extension of a named short temp (`t = (short)arg; home = (short)t;`) and give the temp one more later use"**. + +## (e) What did not work (byte evidence) +The mechanical search (`history.txt`, 2,292 compiles across R2/R4/R7/R9/R10/R18) and the free sweep's `free_016.c` +("swap-stmts") all stayed at 4: none of those generators writes a redundant `(short)` re-extension, and none moves a +use from the home back to the temp. Single variants above: 2, 4, 4. + +## (f) Where the method fell short +Nothing needed beyond the brief's R71 lead: the port closed on the first `--try`. The one gap is tooling: the splice that +produced the COMPILE-ERROR should have been retried with the TU's own return type and its own table symbol — both are +readable from the target TU (a later `extern` prototype; the pack's own `body_tree.c` names `D_80184418`). A generator that +does that substitution would have closed this class (8 TUs) with zero agent time. + +## (g) Structs question +**No — structs are not the missing piece here.** The residual is scalar: two parameter sign-extensions and the copies +into their call-crossing homes (expand → combine `combine.c:7926-7942` → local-alloc `local-alloc.c:700`). No memory +access is involved, so the aggregate-vs-scalar channel (`expr.c:4568-4577`, `sched.c`/`cse.c` alias decisions) cannot +touch it. Tested on bytes with a body-local `typedef struct { u16 kind; u8 pad[0x2A]; s32 owner; u8 pad2[0x28]; } Ent;` +for the 0x58-byte records at `D_8011D030` (`e->kind`, `e->owner`, `e + 1`): with the port → score 0 +(`scratch/v_struct.c`); with the free body's plain copies → score 4 (`scratch/v_struct_free.c`). The struct is +byte-neutral and a readability option for the structs phase (fields: `+0x00 u16 kind`, `+0x2C s32 owner`, stride 0x58). diff --git a/.run/P36/delever/calibration.json b/.run/P36/delever/calibration.json index 714f4f600..9c6f0b313 100644 --- a/.run/P36/delever/calibration.json +++ b/.run/P36/delever/calibration.json @@ -1,7 +1,7 @@ { - "head": "16411105e", + "head": "7db8372ae", "stamp": "15956e4a96c4", - "generated": "2026-09-10 21:00", + "generated": "2026-09-10 21:05", "aliases": [ "main", "ov_SC03_014", @@ -21,207 +21,207 @@ "main": { "objects": 85, "identical": 85, - "seconds": 11.418, - "mean_s": 0.134 + "seconds": 10.652000000000003, + "mean_s": 0.125 }, "ov_SC03_014": { "objects": 32, "identical": 32, - "seconds": 7.175, - "mean_s": 0.224 + "seconds": 6.837999999999999, + "mean_s": 0.214 }, "ov_SC03_015": { "objects": 32, "identical": 32, - "seconds": 7.3950000000000005, - "mean_s": 0.231 + "seconds": 6.721, + "mean_s": 0.21 }, "ov_SC04_011": { "objects": 28, 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"nhash_after": "aee8e9a3f683903af9df42c8f292d8ad61aea70c", "source": "delever_regen R19 argrestore func_8012B370 +a0 @15", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.44, "objects": ["build/src/ov_SC06_024/ov_SC06_024_jr_80186F00.o"], "before_text": "void func_8018D674(s32 a0)\n{\n s32 t;\n register s32 *a1 asm(\"$5\"); // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n u32 v0;\n\n t = *(s32 *)(a0 + 0x1C) - 1;\n *(s32 *)(a0 + 0x1C) = t;\n\n if (t != 0) {\n a1 = *(s32 **)(a0 + 0x20);\n v0 = *(u32 *)(a1 + 0x1);\n v0 ^= 0x80000000;\n *(u32 *)(a1 + 0x1) = v0;\n ((void (*)(void))func_8012B370)();\n\n t = *(s32 *)(a0 + 0x1C);\n if ((t & 0x3) != 0) {\n s32 s0 = func_8012C588(0x281, a0);\n if (s0 != 0) {\n *(s32 *)(s0 + 0x1C) = 2;\n *(s16 *)(s0 + 0x12) = (rand() & 0x1F) - 0x10;\n *(s16 *)(s0 + 0x16) = -((rand() & 0xF) + 0x10);\n *(s16 *)(s0 + 0x1A) = (rand() & 0x1F) - 0x10;\n }\n }\n return;\n }\n\n ((void (*)(void *))func_8012C218)((void *)a0);\n}\n", "after_text": "void func_8018D674(s32 a0)\n{\n s32 t;\n s32 *a1;\n u32 v0;\n\n t = *(s32 *)(a0 + 0x1C) - 1;\n *(s32 *)(a0 + 0x1C) = t;\n\n if (t != 0) {\n a1 = *(s32 **)(a0 + 0x20);\n v0 = *(u32 *)(a1 + 0x1);\n v0 ^= 0x80000000;\n *(u32 *)(a1 + 0x1) = v0;\n ((void (*)(int a0))func_8012B370)(a0);\n\n t = *(s32 *)(a0 + 0x1C);\n if ((t & 0x3) != 0) {\n s32 s0 = func_8012C588(0x281, a0);\n if (s0 != 0) {\n *(s32 *)(s0 + 0x1C) = 2;\n *(s16 *)(s0 + 0x12) = (rand() & 0x1F) - 0x10;\n *(s16 *)(s0 + 0x16) = -((rand() & 0xF) + 0x10);\n *(s16 *)(s0 + 0x1A) = (rand() & 0x1F) - 0x10;\n }\n }\n return;\n }\n\n ((void (*)(void *))func_8012C218)((void *)a0);\n}\n"} {"ts": "2026-09-10 21:04:10", "label": "s104_all_part1p", "rung": "E", "calib": {"head": "16411105e", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_024/ov_SC06_024_jr_80186F00.c", "fn": "func_8018D9B8", "addr": 2149112248, "aliases": null, "header": false, "includers": 0, "nhash_before": "c99c649701624a044920722762a5f401f3e4b405", "nhash_after": "aee8e9a3f683903af9df42c8f292d8ad61aea70c", "source": "propagate:src/ov_SC06_024/ov_SC06_024_jr_80186F00.c:func_8018D674", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.404, "objects": ["build/src/ov_SC06_024/ov_SC06_024_jr_80186F00.o"], "before_text": "void func_8018D9B8(s32 a0)\n{\n s32 t;\n register s32 *a1 asm(\"$5\"); // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n u32 v0;\n\n t = *(s32 *)(a0 + 0x1C) - 1;\n *(s32 *)(a0 + 0x1C) = t;\n\n if (t != 0) {\n a1 = *(s32 **)(a0 + 0x20);\n v0 = *(u32 *)(a1 + 0x1);\n v0 ^= 0x80000000;\n *(u32 *)(a1 + 0x1) = v0;\n ((void (*)(void))func_8012B370)();\n\n t = *(s32 *)(a0 + 0x1C);\n if ((t & 0x3) != 0) {\n s32 s0 = func_8012C588(0x281, a0);\n if (s0 != 0) {\n *(s32 *)(s0 + 0x1C) = 2;\n *(s16 *)(s0 + 0x12) = (rand() & 0x1F) - 0x10;\n *(s16 *)(s0 + 0x16) = -((rand() & 0xF) + 0x10);\n *(s16 *)(s0 + 0x1A) = (rand() & 0x1F) - 0x10;\n }\n }\n return;\n }\n\n ((void (*)(void *))func_8012C218)((void *)a0);\n}\n", "after_text": "void func_8018D9B8(s32 a0)\n{\n s32 t;\n s32 *a1;\n u32 v0;\n\n t = *(s32 *)(a0 + 0x1C) - 1;\n *(s32 *)(a0 + 0x1C) = t;\n\n if (t != 0) {\n a1 = *(s32 **)(a0 + 0x20);\n v0 = *(u32 *)(a1 + 0x1);\n v0 ^= 0x80000000;\n *(u32 *)(a1 + 0x1) = v0;\n ((void (*)(int a0))func_8012B370)(a0);\n\n t = *(s32 *)(a0 + 0x1C);\n if ((t & 0x3) != 0) {\n s32 s0 = func_8012C588(0x281, a0);\n if (s0 != 0) {\n *(s32 *)(s0 + 0x1C) = 2;\n *(s16 *)(s0 + 0x12) = (rand() & 0x1F) - 0x10;\n *(s16 *)(s0 + 0x16) = -((rand() & 0xF) + 0x10);\n *(s16 *)(s0 + 0x1A) = (rand() & 0x1F) - 0x10;\n }\n }\n return;\n }\n\n ((void (*)(void *))func_8012C218)((void *)a0);\n}\n"} {"ts": "2026-09-10 21:04:11", "label": "s104_all_part1p", "rung": "E", "calib": {"head": "16411105e", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_024/ov_SC06_024_jr_80186F00.c", "fn": "func_8018DCA8", "addr": 2149113000, "aliases": null, "header": false, "includers": 0, "nhash_before": "c99c649701624a044920722762a5f401f3e4b405", "nhash_after": "aee8e9a3f683903af9df42c8f292d8ad61aea70c", "source": "propagate:src/ov_SC06_024/ov_SC06_024_jr_80186F00.c:func_8018D674", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.378, "objects": ["build/src/ov_SC06_024/ov_SC06_024_jr_80186F00.o"], "before_text": "void func_8018DCA8(s32 a0)\n{\n s32 t;\n register s32 *a1 asm(\"$5\"); // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n u32 v0;\n\n t = *(s32 *)(a0 + 0x1C) - 1;\n *(s32 *)(a0 + 0x1C) = t;\n\n if (t != 0) {\n a1 = *(s32 **)(a0 + 0x20);\n v0 = *(u32 *)(a1 + 0x1);\n v0 ^= 0x80000000;\n *(u32 *)(a1 + 0x1) = v0;\n ((void (*)(void))func_8012B370)();\n\n t = *(s32 *)(a0 + 0x1C);\n if ((t & 0x3) != 0) {\n s32 s0 = func_8012C588(0x281, a0);\n if (s0 != 0) {\n *(s32 *)(s0 + 0x1C) = 2;\n *(s16 *)(s0 + 0x12) = (rand() & 0x1F) - 0x10;\n *(s16 *)(s0 + 0x16) = -((rand() & 0xF) + 0x10);\n *(s16 *)(s0 + 0x1A) = (rand() & 0x1F) - 0x10;\n }\n }\n return;\n }\n\n ((void (*)(void *))func_8012C218)((void *)a0);\n}\n", "after_text": "void func_8018DCA8(s32 a0)\n{\n s32 t;\n s32 *a1;\n u32 v0;\n\n t = *(s32 *)(a0 + 0x1C) - 1;\n *(s32 *)(a0 + 0x1C) = t;\n\n if (t != 0) {\n a1 = *(s32 **)(a0 + 0x20);\n v0 = *(u32 *)(a1 + 0x1);\n v0 ^= 0x80000000;\n *(u32 *)(a1 + 0x1) = v0;\n ((void (*)(int a0))func_8012B370)(a0);\n\n t = *(s32 *)(a0 + 0x1C);\n if ((t & 0x3) != 0) {\n s32 s0 = func_8012C588(0x281, a0);\n if (s0 != 0) {\n *(s32 *)(s0 + 0x1C) = 2;\n *(s16 *)(s0 + 0x12) = (rand() & 0x1F) - 0x10;\n *(s16 *)(s0 + 0x16) = -((rand() & 0xF) + 0x10);\n *(s16 *)(s0 + 0x1A) = (rand() & 0x1F) - 0x10;\n }\n }\n return;\n }\n\n ((void (*)(void *))func_8012C218)((void *)a0);\n}\n"} +{"ts": "2026-09-10 21:06:06", "label": "s104_d2", "rung": "E", "calib": {"head": "7db8372ae", "stamp": "15956e4a96c4"}, "tu": "src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.c", "fn": "func_80166F58", "addr": 2148953944, "aliases": null, "header": false, "includers": 0, "nhash_before": "657f8158c460c66661fb30c81fd4ac31df15d05d", "nhash_after": "b65050511788dfc5a92aafbb5656ae915f2cd697", "source": ".run/P36/agents/ov_MAIN_012__func_80166F58/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.596, "objects": ["build/src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.o"], "before_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n\n extern s32 D_8011D030;\n extern unsigned char D_80184418[];\n\n register int p2 __asm__(\"$20\"); /* $s4 */ // !FAKE: pin $20 \u2014 NEEDED DIFFERS (P36 rung B tus2)\n int p3; /* $s1 */\n register int t2 __asm__(\"$5\"); /* a1 */ // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus2)\n int t3; /* a2 */\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB \u2014 NEEDED DIFFERS; launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus2)\n t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus2)\n eq = (p2 == p3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_80184418[((short)param_4) * 0xc4], 0xc4);\n}\n", "after_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n extern s32 D_8011D030;\n extern unsigned char D_80184418[];\n\n int t2;\n int t3;\n int p2;\n int p3;\n\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = (short)param_2;\n p2 = (short)t2;\n t3 = (short)param_3;\n p3 = (short)t3;\n eq = (t2 == t3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_80184418[((short)param_4) * 0xc4], 0xc4);\n}\n"} +{"ts": "2026-09-10 21:06:39", "label": "s104_d2", "rung": "E", "calib": {"head": "7db8372ae", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_037/ov_SC02_037_jr_8015A3C8.c", "fn": "func_80166F58", "addr": 2148953944, "aliases": null, "header": false, "includers": 0, "nhash_before": "657f8158c460c66661fb30c81fd4ac31df15d05d", "nhash_after": "b65050511788dfc5a92aafbb5656ae915f2cd697", "source": "propagate:src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.c:func_80166F58", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.408, "objects": ["build/src/ov_SC02_037/ov_SC02_037_jr_8015A3C8.o"], "before_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n\n extern s32 D_8011D030;\n extern unsigned char D_801C8710[];\n\n register int p2 __asm__(\"$20\"); /* $s4 */ // !FAKE: pin $20 \u2014 NEEDED DIFFERS (P36 rung B tus2)\n int p3; /* $s1 */\n register int t2 __asm__(\"$5\"); /* a1 */ // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus2)\n int t3; /* a2 */\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB \u2014 NEEDED DIFFERS; launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus2)\n t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus2)\n eq = (p2 == p3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_801C8710[((short)param_4) * 0xc4], 0xc4);\n}\n", "after_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n extern s32 D_8011D030;\n extern unsigned char D_801C8710[];\n\n int t2;\n int t3;\n int p2;\n int p3;\n\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = (short)param_2;\n p2 = (short)t2;\n t3 = (short)param_3;\n p3 = (short)t3;\n eq = (t2 == t3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_801C8710[((short)param_4) * 0xc4], 0xc4);\n}\n"} +{"ts": "2026-09-10 21:06:49", "label": "s104_d2", "rung": "E", "calib": {"head": "7db8372ae", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_107/ov_SC03_107_jr_8015A3C8.c", "fn": "func_80166F58", "addr": 2148953944, "aliases": null, "header": false, "includers": 0, "nhash_before": "657f8158c460c66661fb30c81fd4ac31df15d05d", "nhash_after": "b65050511788dfc5a92aafbb5656ae915f2cd697", "source": "propagate:src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.c:func_80166F58", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 1.627, "objects": ["build/src/ov_SC03_107/ov_SC03_107_jr_8015A3C8.o"], "before_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n\n extern s32 D_8011D030;\n extern unsigned char D_8019AA70[];\n\n register int p2 __asm__(\"$20\"); /* $s4 */ // !FAKE: pin $20 \u2014 NEEDED DIFFERS (P36 rung B tus3)\n int p3; /* $s1 */\n register int t2 __asm__(\"$5\"); /* a1 */ // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus3)\n int t3; /* a2 */\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB \u2014 NEEDED DIFFERS; launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus3)\n t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus3)\n eq = (p2 == p3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_8019AA70[((short)param_4) * 0xc4], 0xc4);\n}\n", "after_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n extern s32 D_8011D030;\n extern unsigned char D_8019AA70[];\n\n int t2;\n int t3;\n int p2;\n int p3;\n\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = (short)param_2;\n p2 = (short)t2;\n t3 = (short)param_3;\n p3 = (short)t3;\n eq = (t2 == t3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_8019AA70[((short)param_4) * 0xc4], 0xc4);\n}\n"} +{"ts": "2026-09-10 21:06:53", "label": "s104_d2", "rung": "E", "calib": {"head": "7db8372ae", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC07_010/ov_SC07_010_jr_8015C32C.c", "fn": "func_80166F58", "addr": 2148953944, "aliases": null, "header": false, "includers": 0, "nhash_before": "657f8158c460c66661fb30c81fd4ac31df15d05d", "nhash_after": "b65050511788dfc5a92aafbb5656ae915f2cd697", "source": "propagate:src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.c:func_80166F58", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.53, "objects": ["build/src/ov_SC07_010/ov_SC07_010_jr_8015C32C.o"], "before_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n\n extern s32 D_8011D030;\n extern unsigned char D_801A6D20[];\n\n register int p2 __asm__(\"$20\"); /* $s4 */ // !FAKE: pin $20 \u2014 NEEDED DIFFERS (P36 rung B tus4)\n int p3; /* $s1 */\n register int t2 __asm__(\"$5\"); /* a1 */ // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus4)\n int t3; /* a2 */\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB \u2014 NEEDED DIFFERS; launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus4)\n t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus4)\n eq = (p2 == p3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_801A6D20[((short)param_4) * 0xc4], 0xc4);\n}\n", "after_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n extern s32 D_8011D030;\n extern unsigned char D_801A6D20[];\n\n int t2;\n int t3;\n int p2;\n int p3;\n\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = (short)param_2;\n p2 = (short)t2;\n t3 = (short)param_3;\n p3 = (short)t3;\n eq = (t2 == t3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_801A6D20[((short)param_4) * 0xc4], 0xc4);\n}\n"} +{"ts": "2026-09-10 21:06:54", "label": "s104_d2", "rung": "E", "calib": {"head": "7db8372ae", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC07_007/ov_SC07_007_jr_8015C32C.c", "fn": "func_80166F58", "addr": 2148953944, "aliases": null, "header": false, "includers": 0, "nhash_before": "657f8158c460c66661fb30c81fd4ac31df15d05d", "nhash_after": "b65050511788dfc5a92aafbb5656ae915f2cd697", "source": "propagate:src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.c:func_80166F58", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.532, "objects": ["build/src/ov_SC07_007/ov_SC07_007_jr_8015C32C.o"], "before_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n\n extern s32 D_8011D030;\n extern unsigned char D_801C6828[];\n\n register int p2 __asm__(\"$20\"); /* $s4 */ // !FAKE: pin $20 \u2014 NEEDED DIFFERS (P36 rung B tus4)\n int p3; /* $s1 */\n register int t2 __asm__(\"$5\"); /* a1 */ // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus4)\n int t3; /* a2 */\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB \u2014 NEEDED DIFFERS; launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus4)\n t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus4)\n eq = (p2 == p3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_801C6828[((short)param_4) * 0xc4], 0xc4);\n}\n", "after_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n extern s32 D_8011D030;\n extern unsigned char D_801C6828[];\n\n int t2;\n int t3;\n int p2;\n int p3;\n\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = (short)param_2;\n p2 = (short)t2;\n t3 = (short)param_3;\n p3 = (short)t3;\n eq = (t2 == t3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_801C6828[((short)param_4) * 0xc4], 0xc4);\n}\n"} +{"ts": "2026-09-10 21:06:55", "label": "s104_d2", "rung": "E", "calib": {"head": "7db8372ae", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC07_011/ov_SC07_011_jr_8015C32C.c", "fn": "func_80166F58", "addr": 2148953944, "aliases": null, "header": false, "includers": 0, "nhash_before": "657f8158c460c66661fb30c81fd4ac31df15d05d", "nhash_after": "b65050511788dfc5a92aafbb5656ae915f2cd697", "source": "propagate:src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.c:func_80166F58", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.523, "objects": ["build/src/ov_SC07_011/ov_SC07_011_jr_8015C32C.o"], "before_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n\n extern s32 D_8011D030;\n extern unsigned char D_8018F3B8[];\n\n register int p2 __asm__(\"$20\"); /* $s4 */ // !FAKE: pin $20 \u2014 NEEDED DIFFERS (P36 rung B tus4)\n int p3; /* $s1 */\n register int t2 __asm__(\"$5\"); /* a1 */ // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus4)\n int t3; /* a2 */\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB \u2014 NEEDED DIFFERS; launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus4)\n t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus4)\n eq = (p2 == p3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_8018F3B8[((short)param_4) * 0xc4], 0xc4);\n}\n", "after_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n extern s32 D_8011D030;\n extern unsigned char D_8018F3B8[];\n\n int t2;\n int t3;\n int p2;\n int p3;\n\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = (short)param_2;\n p2 = (short)t2;\n t3 = (short)param_3;\n p3 = (short)t3;\n eq = (t2 == t3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_8018F3B8[((short)param_4) * 0xc4], 0xc4);\n}\n"} +{"ts": "2026-09-10 21:06:56", "label": "s104_d2", "rung": "E", "calib": {"head": "7db8372ae", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC01_077/ov_SC01_077_jr_8015C32C.c", "fn": "func_80166F58", "addr": 2148953944, "aliases": null, "header": false, "includers": 0, "nhash_before": "a5f96d7298b7249241533d514c54995f2a44d535", "nhash_after": "b65050511788dfc5a92aafbb5656ae915f2cd697", "source": "propagate:src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.c:func_80166F58", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.518, "objects": ["build/src/ov_SC01_077/ov_SC01_077_jr_8015C32C.o"], "before_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n extern unsigned char D_801D97E8[];\n\n register int p2 __asm__(\"$20\"); /* $s4 */ // !FAKE: pin $20 \u2014 NEEDED DIFFERS (P36 rung B tus2)\n int p3; /* $s1 */\n register int t2 __asm__(\"$5\"); /* a1 */ // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus2)\n int t3; /* a2 */\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB \u2014 NEEDED DIFFERS; launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus2)\n t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus2)\n eq = (p2 == p3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_801D97E8[((short)param_4) * 0xc4], 0xc4);\n}\n", "after_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n extern s32 D_8011D030;\n extern unsigned char D_801D97E8[];\n\n int t2;\n int t3;\n int p2;\n int p3;\n\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = (short)param_2;\n p2 = (short)t2;\n t3 = (short)param_3;\n p3 = (short)t3;\n eq = (t2 == t3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_801D97E8[((short)param_4) * 0xc4], 0xc4);\n}\n"} +{"ts": "2026-09-10 21:06:57", "label": "s104_d2", "rung": "E", "calib": {"head": "7db8372ae", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC07_006/ov_SC07_006_jr_8015C32C.c", "fn": "func_80166F58", "addr": 2148953944, "aliases": null, "header": false, "includers": 0, "nhash_before": "a5f96d7298b7249241533d514c54995f2a44d535", "nhash_after": "b65050511788dfc5a92aafbb5656ae915f2cd697", "source": "propagate:src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.c:func_80166F58", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.656, "objects": ["build/src/ov_SC07_006/ov_SC07_006_jr_8015C32C.o"], "before_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n extern unsigned char D_801F50C0[];\n\n register int p2 __asm__(\"$20\"); /* $s4 */ // !FAKE: pin $20 \u2014 NEEDED DIFFERS (P36 rung B tus4)\n int p3; /* $s1 */\n register int t2 __asm__(\"$5\"); /* a1 */ // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus4)\n int t3; /* a2 */\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB \u2014 NEEDED DIFFERS; launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus4)\n t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB \u2014 NEEDED DIFFERS (P36 rung B tus4)\n eq = (p2 == p3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_801F50C0[((short)param_4) * 0xc4], 0xc4);\n}\n", "after_text": "void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4)\n{\n extern s32 D_8011D030;\n extern unsigned char D_801F50C0[];\n\n int t2;\n int t3;\n int p2;\n int p3;\n\n unsigned short *puVar1;\n short iVar2;\n int eq;\n\n iVar2 = 0;\n puVar1 = ((unsigned short *)&D_8011D030);\n t2 = (short)param_2;\n p2 = (short)t2;\n t3 = (short)param_3;\n p3 = (short)t3;\n eq = (t2 == t3);\n do {\n if ((puVar1 != ((unsigned short *)param_1)) &&\n ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&\n (!eq ||\n *(int *)(puVar1 + 0x16) == *(int *)(((unsigned short *)param_1) + 0x16))) {\n ((void(*)(unsigned short *))func_80146C3C)(puVar1);\n }\n iVar2 = iVar2 + 1;\n puVar1 = puVar1 + 0x2c;\n } while (iVar2 < 0x1e);\n ((void(*)(void *, int))func_80016714)(&D_801F50C0[((short)param_4) * 0xc4], 0xc4);\n}\n"} diff --git a/src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.c b/src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.c index baf3a6b00..3752aa6eb 100644 --- a/src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.c +++ b/src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.c @@ -7438,23 +7438,25 @@ extern void func_80146C3C(u8*); void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4) { - extern s32 D_8011D030; extern unsigned char D_80184418[]; - register int p2 __asm__("$20"); /* $s4 */ // !FAKE: pin $20 — NEEDED DIFFERS (P36 rung B tus2) - int p3; /* $s1 */ - register int t2 __asm__("$5"); /* a1 */ // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus2) - int t3; /* a2 */ + int t2; + int t3; + int p2; + int p3; + unsigned short *puVar1; short iVar2; int eq; iVar2 = 0; puVar1 = ((unsigned short *)&D_8011D030); - t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB — NEEDED DIFFERS; launder via SHB — NEEDED DIFFERS (P36 rung B tus2) - t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB — NEEDED DIFFERS (P36 rung B tus2) - eq = (p2 == p3); + t2 = (short)param_2; + p2 = (short)t2; + t3 = (short)param_3; + p3 = (short)t3; + eq = (t2 == t3); do { if ((puVar1 != ((unsigned short *)param_1)) && ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) && diff --git a/src/ov_SC01_077/ov_SC01_077_jr_8015C32C.c b/src/ov_SC01_077/ov_SC01_077_jr_8015C32C.c index 86720e49d..255471e53 100644 --- a/src/ov_SC01_077/ov_SC01_077_jr_8015C32C.c +++ b/src/ov_SC01_077/ov_SC01_077_jr_8015C32C.c @@ -5339,21 +5339,25 @@ s32 func_80166994(param_1, param_2, param_3, param_4) void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4) { + extern s32 D_8011D030; extern unsigned char D_801D97E8[]; - register int p2 __asm__("$20"); /* $s4 */ // !FAKE: pin $20 — NEEDED DIFFERS (P36 rung B tus2) - int p3; /* $s1 */ - register int t2 __asm__("$5"); /* a1 */ // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus2) - int t3; /* a2 */ + int t2; + int t3; + int p2; + int p3; + unsigned short *puVar1; short iVar2; int eq; iVar2 = 0; puVar1 = ((unsigned short *)&D_8011D030); - t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB — NEEDED DIFFERS; launder via SHB — NEEDED DIFFERS (P36 rung B tus2) - t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB — NEEDED DIFFERS (P36 rung B tus2) - eq = (p2 == p3); + t2 = (short)param_2; + p2 = (short)t2; + t3 = (short)param_3; + p3 = (short)t3; + eq = (t2 == t3); do { if ((puVar1 != ((unsigned short *)param_1)) && ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) && diff --git a/src/ov_SC02_037/ov_SC02_037_jr_8015A3C8.c b/src/ov_SC02_037/ov_SC02_037_jr_8015A3C8.c index c00224831..2841d7054 100644 --- a/src/ov_SC02_037/ov_SC02_037_jr_8015A3C8.c +++ b/src/ov_SC02_037/ov_SC02_037_jr_8015A3C8.c @@ -7497,23 +7497,25 @@ extern void func_80146C3C(u8*); void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4) { - extern s32 D_8011D030; extern unsigned char D_801C8710[]; - register int p2 __asm__("$20"); /* $s4 */ // !FAKE: pin $20 — NEEDED DIFFERS (P36 rung B tus2) - int p3; /* $s1 */ - register int t2 __asm__("$5"); /* a1 */ // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus2) - int t3; /* a2 */ + int t2; + int t3; + int p2; + int p3; + unsigned short *puVar1; short iVar2; int eq; iVar2 = 0; puVar1 = ((unsigned short *)&D_8011D030); - t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB — NEEDED DIFFERS; launder via SHB — NEEDED DIFFERS (P36 rung B tus2) - t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB — NEEDED DIFFERS (P36 rung B tus2) - eq = (p2 == p3); + t2 = (short)param_2; + p2 = (short)t2; + t3 = (short)param_3; + p3 = (short)t3; + eq = (t2 == t3); do { if ((puVar1 != ((unsigned short *)param_1)) && ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) && diff --git a/src/ov_SC03_107/ov_SC03_107_jr_8015A3C8.c b/src/ov_SC03_107/ov_SC03_107_jr_8015A3C8.c index 8fb603916..450d0e1ae 100644 --- a/src/ov_SC03_107/ov_SC03_107_jr_8015A3C8.c +++ b/src/ov_SC03_107/ov_SC03_107_jr_8015A3C8.c @@ -7472,23 +7472,25 @@ extern void func_80146C3C(u8*); void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4) { - extern s32 D_8011D030; extern unsigned char D_8019AA70[]; - register int p2 __asm__("$20"); /* $s4 */ // !FAKE: pin $20 — NEEDED DIFFERS (P36 rung B tus3) - int p3; /* $s1 */ - register int t2 __asm__("$5"); /* a1 */ // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus3) - int t3; /* a2 */ + int t2; + int t3; + int p2; + int p3; + unsigned short *puVar1; short iVar2; int eq; iVar2 = 0; puVar1 = ((unsigned short *)&D_8011D030); - t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB — NEEDED DIFFERS; launder via SHB — NEEDED DIFFERS (P36 rung B tus3) - t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB — NEEDED DIFFERS (P36 rung B tus3) - eq = (p2 == p3); + t2 = (short)param_2; + p2 = (short)t2; + t3 = (short)param_3; + p3 = (short)t3; + eq = (t2 == t3); do { if ((puVar1 != ((unsigned short *)param_1)) && ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) && diff --git a/src/ov_SC07_006/ov_SC07_006_jr_8015C32C.c b/src/ov_SC07_006/ov_SC07_006_jr_8015C32C.c index 8179f30f4..8de812d81 100644 --- a/src/ov_SC07_006/ov_SC07_006_jr_8015C32C.c +++ b/src/ov_SC07_006/ov_SC07_006_jr_8015C32C.c @@ -6282,21 +6282,25 @@ extern void func_80146C3C(u8*); void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4) { + extern s32 D_8011D030; extern unsigned char D_801F50C0[]; - register int p2 __asm__("$20"); /* $s4 */ // !FAKE: pin $20 — NEEDED DIFFERS (P36 rung B tus4) - int p3; /* $s1 */ - register int t2 __asm__("$5"); /* a1 */ // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus4) - int t3; /* a2 */ + int t2; + int t3; + int p2; + int p3; + unsigned short *puVar1; short iVar2; int eq; iVar2 = 0; puVar1 = ((unsigned short *)&D_8011D030); - t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB — NEEDED DIFFERS; launder via SHB — NEEDED DIFFERS (P36 rung B tus4) - t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB — NEEDED DIFFERS (P36 rung B tus4) - eq = (p2 == p3); + t2 = (short)param_2; + p2 = (short)t2; + t3 = (short)param_3; + p3 = (short)t3; + eq = (t2 == t3); do { if ((puVar1 != ((unsigned short *)param_1)) && ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) && diff --git a/src/ov_SC07_007/ov_SC07_007_jr_8015C32C.c b/src/ov_SC07_007/ov_SC07_007_jr_8015C32C.c index 03639c9a9..4c1ba4c48 100644 --- a/src/ov_SC07_007/ov_SC07_007_jr_8015C32C.c +++ b/src/ov_SC07_007/ov_SC07_007_jr_8015C32C.c @@ -6248,23 +6248,25 @@ extern void func_80146C3C(u8*); void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4) { - extern s32 D_8011D030; extern unsigned char D_801C6828[]; - register int p2 __asm__("$20"); /* $s4 */ // !FAKE: pin $20 — NEEDED DIFFERS (P36 rung B tus4) - int p3; /* $s1 */ - register int t2 __asm__("$5"); /* a1 */ // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus4) - int t3; /* a2 */ + int t2; + int t3; + int p2; + int p3; + unsigned short *puVar1; short iVar2; int eq; iVar2 = 0; puVar1 = ((unsigned short *)&D_8011D030); - t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB — NEEDED DIFFERS; launder via SHB — NEEDED DIFFERS (P36 rung B tus4) - t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB — NEEDED DIFFERS (P36 rung B tus4) - eq = (p2 == p3); + t2 = (short)param_2; + p2 = (short)t2; + t3 = (short)param_3; + p3 = (short)t3; + eq = (t2 == t3); do { if ((puVar1 != ((unsigned short *)param_1)) && ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) && diff --git a/src/ov_SC07_010/ov_SC07_010_jr_8015C32C.c b/src/ov_SC07_010/ov_SC07_010_jr_8015C32C.c index 78aabc53c..dd215d521 100644 --- a/src/ov_SC07_010/ov_SC07_010_jr_8015C32C.c +++ b/src/ov_SC07_010/ov_SC07_010_jr_8015C32C.c @@ -5663,23 +5663,25 @@ extern void func_80146C3C(u8*); void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4) { - extern s32 D_8011D030; extern unsigned char D_801A6D20[]; - register int p2 __asm__("$20"); /* $s4 */ // !FAKE: pin $20 — NEEDED DIFFERS (P36 rung B tus4) - int p3; /* $s1 */ - register int t2 __asm__("$5"); /* a1 */ // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus4) - int t3; /* a2 */ + int t2; + int t3; + int p2; + int p3; + unsigned short *puVar1; short iVar2; int eq; iVar2 = 0; puVar1 = ((unsigned short *)&D_8011D030); - t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB — NEEDED DIFFERS; launder via SHB — NEEDED DIFFERS (P36 rung B tus4) - t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB — NEEDED DIFFERS (P36 rung B tus4) - eq = (p2 == p3); + t2 = (short)param_2; + p2 = (short)t2; + t3 = (short)param_3; + p3 = (short)t3; + eq = (t2 == t3); do { if ((puVar1 != ((unsigned short *)param_1)) && ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) && diff --git a/src/ov_SC07_011/ov_SC07_011_jr_8015C32C.c b/src/ov_SC07_011/ov_SC07_011_jr_8015C32C.c index 2e99d909b..960cb1d25 100644 --- a/src/ov_SC07_011/ov_SC07_011_jr_8015C32C.c +++ b/src/ov_SC07_011/ov_SC07_011_jr_8015C32C.c @@ -6249,23 +6249,25 @@ extern void func_80146C3C(u8*); void func_80166F58(s32 param_1, s32 param_2, s32 param_3, s32 param_4) { - extern s32 D_8011D030; extern unsigned char D_8018F3B8[]; - register int p2 __asm__("$20"); /* $s4 */ // !FAKE: pin $20 — NEEDED DIFFERS (P36 rung B tus4) - int p3; /* $s1 */ - register int t2 __asm__("$5"); /* a1 */ // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus4) - int t3; /* a2 */ + int t2; + int t3; + int p2; + int p3; + unsigned short *puVar1; short iVar2; int eq; iVar2 = 0; puVar1 = ((unsigned short *)&D_8011D030); - t2 = ((short)param_2); SHB(t2); p2 = t2; SHB(p2); // !FAKE: launder via SHB — NEEDED DIFFERS; launder via SHB — NEEDED DIFFERS (P36 rung B tus4) - t3 = ((short)param_3); SHB(t3); p3 = t3; // !FAKE: launder via SHB — NEEDED DIFFERS (P36 rung B tus4) - eq = (p2 == p3); + t2 = (short)param_2; + p2 = (short)t2; + t3 = (short)param_3; + p3 = (short)t3; + eq = (t2 == t3); do { if ((puVar1 != ((unsigned short *)param_1)) && ((unsigned int)*puVar1 == p2 || (unsigned int)*puVar1 == p3) &&