From 70134d06bfbf2241c56a04d0c74ff448e86e6edc Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Tue, 1 Sep 2026 11:19:01 -0600 Subject: [PATCH] =?UTF-8?q?feat(decomp):=20parallel=20gate=20=E2=80=94=201?= =?UTF-8?q?3=20fns=20across=2013=20binaries=20(12=20workers)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ov_SC03_094 func_8017E254 ov_SC03_031 func_8017F728 ov_SC03_028 func_8018568C md_SC07_004 func_801A3D60 ov_SC02_031 func_801831B4 ov_SC02_017 func_8017FCFC ov_SC01_080 func_801815D4 ov_SC03_030 func_8017FB04 ov_SC04_004 func_80182014 ov_SC04_015 func_8017ED28 ov_SC03_102 func_801815D4 ov_SC05_005 func_80181828 ov_SC03_119 func_801832E0 --- config/overlays.mk | 1 + config/splat.ov_SC03_028.yaml | 2 +- src/md_SC07_004/md_SC07_004.c | 52 +++++++++- src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c | 51 +++++++++- src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c | 61 +++++++++++- src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c | 59 ++++++++++- src/ov_SC03_028/ov_SC03_028_jr_80184914.c | 51 +++++++++- src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c | 90 ++++++++++++++++- src/ov_SC03_031/ov_SC03_031_jr_8017DB5C.c | 35 ++++++- src/ov_SC03_094/ov_SC03_094_jr_8017BEBC.c | 60 +++++++++++- src/ov_SC03_102/ov_SC03_102_jr_8017BEBC.c | 52 +++++++++- src/ov_SC03_119/ov_SC03_119_o0d.c | 39 +++++++- src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c | 80 ++++++++++++++- src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c | 76 ++++++++++++++- src/ov_SC05_005/ov_SC05_005_jr_8017D898.c | 113 +++++++++++++++++++++- 15 files changed, 806 insertions(+), 16 deletions(-) diff --git a/config/overlays.mk b/config/overlays.mk index 325b9fa7b..26fa0fac2 100644 --- a/config/overlays.mk +++ b/config/overlays.mk @@ -1703,6 +1703,7 @@ build/src/ov_SC03_028/ov_SC03_028_jr_80159C84.o: JTBL_PADS := 0,4 # §8e pads ( build/src/ov_SC03_028/ov_SC03_028_jr_8015AE2C.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_028/ov_SC03_028_jr_8016AB6C.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_028/ov_SC03_028_jr_80178D40.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x178 +build/src/ov_SC03_028/ov_SC03_028_jr_80184914.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x30 build/src/ov_SC03_028/ov_SC03_028_jr_80185864.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x28 build/src/ov_SC03_028/ov_SC03_028_o0c.o: JTBL_PADS := 0,4,4,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x38,+0xa8,+0x118 ov_SC03_028_CHECK_SHA := config/check.ov_SC03_028.sha diff --git a/config/splat.ov_SC03_028.yaml b/config/splat.ov_SC03_028.yaml index b930e35ca..3dbbc4c30 100644 --- a/config/splat.ov_SC03_028.yaml +++ b/config/splat.ov_SC03_028.yaml @@ -175,7 +175,7 @@ segments: - [0xc1f1c, .rodata, ov_SC03_028_jr_801847E8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xc1f48, data, tail20] - [0xc1f4c, .rodata, ov_SC03_028_jr_80184914] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc1f78, data, tail21] + - [0xc1fa0, data, tail21] - [0xc1fa4, .rodata, ov_SC03_028_jr_80185864] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xc1ff0, data, tail22] - [0xc1ff4, .rodata, ov_SC03_028_jr_80185C14] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) diff --git a/src/md_SC07_004/md_SC07_004.c b/src/md_SC07_004/md_SC07_004.c index cb3d32f2e..c4565c180 100644 --- a/src/md_SC07_004/md_SC07_004.c +++ b/src/md_SC07_004/md_SC07_004.c @@ -1316,7 +1316,57 @@ void func_801A3B18(s32 param_1) } -INCLUDE_ASM("asm/md_SC07_004/nonmatchings/md_SC07_004", func_801A3D60); +typedef struct { s32 w[8]; } Mtx32_801A3D60; + +extern void RotMatrixY(s32 a0, void *a1); +extern void func_8012BE54(s32 a0); +extern s32 func_8012B8A4(s16 *a0); +extern s32 func_8017267C(s32 *a0); +extern void func_800484EC(s32 a0, s32 a1, s32 a2); + +extern s32 D_801F8864; +extern s32 D_80126B58[4]; +extern s32 D_80126B5C; +extern s32 D_80126B64; + +void func_801A3D60(s32 a0) +{ + /* D_800AE620 is the shared 32-byte matrix global; this TU's real file-scope + * spelling (`extern Mtx32_801A90D8 D_800AE620;`) is declared LATER in the + * file. A second file-scope spelling here is a hard `conflicting types` + * error in gcc-2.7.2 (see func_801A3180 / func_801A3B18 above it), so this + * copy is BLOCK scope, matching this TU's own house style. */ + extern s32 D_800AE620[8]; + Mtx32_801A3D60 m; /* sp+0x10 */ + s32 buf[3]; /* sp+0x30 */ + s32 s0; + s32 *s1; + s32 r; + + s0 = a0; + m = *(Mtx32_801A3D60 *)&D_800AE620; + s1 = (s32 *)&m; + + if (D_801F8864 <= 0xAFFFF) { + D_801F8864 = D_801F8864 + 0x4000; + } + + r = ((s32 (*)(s32))func_8012BE54)(s0); + RotMatrixY((s16)func_8012B8A4((s16 *)s0), s1); + s0 = r; + + if (D_801F8864 != 0 && s0 >= 0x101) { + if (func_8017267C(D_80126B58) == 0) { + buf[1] = 0; + buf[0] = 0; + buf[2] = D_801F8864; + func_800484EC((s32)s1, (s32)buf, (s32)buf); + D_80126B5C += buf[0]; + D_80126B64 += buf[2]; + } + } +} + void func_801A3EA8(s32 param_1) { extern u16 D_80126B96; diff --git a/src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c b/src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c index b74a95e1e..747ced416 100644 --- a/src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c +++ b/src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c @@ -6538,7 +6538,56 @@ void func_80181598(void *a0) { } -INCLUDE_ASM("asm/ov_SC01_080/nonmatchings/ov_SC01_080_jr_8017AE2C", func_801815D4); +extern u16 D_800B99DA; +extern s16 D_801C7540; +extern u8 D_801C5D40[]; +extern void func_800D20C0(void *a0, void *a1, s32 a2); +extern void func_800D23D0(void *a0); +extern u8 *func_8012913C(s32 a0); +extern u8 *func_801291C0(void); + +void func_801815D4(s32 param_1) { + u16 sp10[6]; + u16 *p0; + u16 *p1; + s16 mask; + s16 i; + u8 *p; + + p0 = sp10; + p1 = sp10 + 4; + sp10[2] = 0; + sp10[1] = 0; + sp10[0] = 0; + __asm__("" : "=r"(p0) : "0"(p0)); + __asm__("" : "=r"(p1) : "0"(p1)); + func_800D20C0(p0, p1, 1); + func_800D23D0(sp10 + 4); + D_801C7540 = sp10[5] - 0x400; + + if ((D_800B99DA & 3) == 0) { + mask = 0x1FF; + if ((D_800B99DA & 0xF) == 0) { + func_8012913C(0x1B); + } else { + i = 0; + do { + p = func_801291C0(); + if (p != 0) { + *(u16 *)p = 0x19; + *(u16 *)(p + 0x2C) = mask; + *(s32 *)(p + 0x34) = (s32)&D_801C5D40 + (*(s16 *)(param_1 + 0xDC) << 5); + *(u16 *)(param_1 + 0xDC) = *(u16 *)(param_1 + 0xDC) + 1; + if (*(s16 *)(param_1 + 0xDC) >= 0xC0) { + *(s16 *)(param_1 + 0xDC) = 0; + } + } + i = i + 1; + } while (i <= 0); + } + } +} + extern s32 D_80127190; extern void D_801C5CC0; diff --git a/src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c b/src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c index d5bfafbe5..ce282d210 100644 --- a/src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c +++ b/src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c @@ -3747,7 +3747,7 @@ s32 func_8017FAF8(void) { #include "common.h" extern void (*D_8018E234[])(void); -extern void func_8017FCFC(void *a0); +extern void func_8017FCFC(); void func_8017FB00(void *a0) { D_8018E234[*(u16 *)((s32)a0 + 0x2)](); @@ -3850,7 +3850,64 @@ void func_8017FCB8(void *arg0) } -INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_jr_8017DF34", func_8017FCFC); +extern s32 func_800291B4(s32 arg); +extern void func_800291A0(s32, s32); +extern void func_8002D4C8(s32 a0, s32 a1); +extern void func_801746DC(void); +extern s32 func_80178BF8(); + +void func_8017FCFC(void *a0) { + register s32 t __asm__("$2"); + register s32 u __asm__("$3"); + register s32 zr __asm__("$0"); + s32 frame_pad; + s32 k; + s32 *p; + + (void)(s32 *)&frame_pad; + t = *(s16 *)((s32)a0 + 0xFE); + if (t != 0) { + u = t + zr; + t = u - 1; + *(s16 *)((s32)a0 + 0xFE) = t; + return; + } + k = *(u16 *)((s32)a0 + 0x5C); + if ((k & 1) == 0) { + return; + } + *(u16 *)((s32)a0 + 0x5C) = k & 0xFFFE; + p = D_8018E204; + t = func_800291B4(D_8018E204[(*(u16 *)((s32)a0 + 0x70)) & 0xF]) & 0xFF; + if (t != 0) { + *(u16 *)((s32)a0 + 0x5E) = 0; + t = 8; + *(s16 *)((s32)a0 + 0xFE) = t; + return; + } + k = *(u16 *)((s32)a0 + 0x5E); + if (k == 0xC) { + __asm__("" : "=r"(p) : "0"(p)); + *(s32 *)((s32)a0 + 0x58) = (s32)D_8018E1F4 | 0x40000000 | 0x20000000; + func_800291A0(p[(*(u16 *)((s32)a0 + 0x70)) & 0xF], 1); + t = 0x8C00; + *(u16 *)((s32)a0 + 0x5C) = t; + } else { + t = 8; + *(s16 *)((s32)a0 + 0xFE) = t; + if (k != 0x1D && *(s32 *)((s32)a0 + 0xDC) == 0) { + *(s32 *)((s32)a0 + 0xDC) = 1; + func_801746DC(); + ((void (*)(void))func_80178BF8)(); + *(s16 *)((s32)a0 + 0x2) = 2; + func_8002D4C8(0x59D, 0); + *(u16 *)((s32)a0 + 0x5E) = 0; + return; + } + } + *(u16 *)((s32)a0 + 0x5E) = 0; +} + extern void (*D_8018E310[])(void); diff --git a/src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c b/src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c index 86b109e4d..90354c07d 100644 --- a/src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c +++ b/src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c @@ -7895,7 +7895,64 @@ s32 func_801830EC(s32 a0, s32 a1, s16 a2, s16 a3, s32 a4) { } -INCLUDE_ASM("asm/ov_SC02_031/nonmatchings/ov_SC02_031_jr_8017AE2C", func_801831B4); +#include "common.h" + +extern u16 D_80126B5E; +extern u16 D_80126B62; +extern u16 D_80126B66; +extern s32 D_801B7A84; +extern s32 D_801A64C8; +extern s32 D_801B7930; +extern s32 D_801B7948; +extern s32 D_801B794C; +extern s32 D_801B7950; +extern s32 D_801B7988; +extern s32 D_801B7AA0; + +extern void func_8013B598(s32 a0, u16 *a1); +extern void func_8013C0F8(s32 a0); +extern void func_8017F53C(s32 a0); +extern void func_8017F5B4(s32 arg0, s32 arg1, s32 arg2); +extern void func_8013CB84(void); +extern void func_800D06E8(void); + +void func_801831B4(void) { + u16 sp10[3]; + + sp10[0] = D_80126B5E; + sp10[1] = D_80126B62; + sp10[2] = D_80126B66; + func_8013B598(0, sp10); + + switch (D_801B7A84) { + case 0: + { + s32 *p; + register s32 val __asm__("$2"); + + func_8013C0F8((s32)&D_801A64C8); + p = &D_801B7930; + func_8017F53C((s32)p); + val = D_801B7A84; + __asm__ __volatile__(""); + D_801B7948 = 0; + D_801B794C = 0; + D_801B7950 = 0; + *p = 0; + D_801B7988 = 1; + D_801B7A84 = val + 1; + } + break; + case 1: + if (D_801B7988 != 0) { + func_8017F5B4((s32)&D_801B7AA0, (s32)&D_801A64C8, (s32)&D_801B7930); + } + break; + } + func_8013CB84(); + func_800D06E8(); +} + extern s32 D_801B794C; extern s32 D_801B7930; diff --git a/src/ov_SC03_028/ov_SC03_028_jr_80184914.c b/src/ov_SC03_028/ov_SC03_028_jr_80184914.c index d5a1aa53c..9fe766705 100644 --- a/src/ov_SC03_028/ov_SC03_028_jr_80184914.c +++ b/src/ov_SC03_028/ov_SC03_028_jr_80184914.c @@ -3506,7 +3506,56 @@ void func_8018561C(s32 arg0) { } -INCLUDE_ASM("asm/ov_SC03_028/nonmatchings/ov_SC03_028_jr_80184914", func_8018568C); +extern void func_800183E0(s32 a0); +extern u8 D_801CF87C[]; +extern s32 D_80190760[]; + +void func_8018568C(s32 arg0) { + u16 var; + s32 ptr; + s32 val; + + switch (*(s32 *)(*(s32 *)(arg0 + 0x64) + 0xDC)) { + case 0: + func_800183E0((s32)&D_801CF87C); + break; + case 1: + var = *(u16 *)(arg0 + 0xFC); + func_800183E0(D_80190760[((s16)var >> 1) % 8]); + break; + case 2: + *(u16 *)(arg0 + 0xFC) = 0; + *(u16 *)(arg0 + 2) = 4; + break; + case 3: + *(u16 *)(arg0 + 0xFE) = 0xC3; + *(u16 *)(arg0 + 2) = 3; + *(u16 *)(arg0 + 0xFC) = 0; + break; + case 4: + *(u16 *)(arg0 + 0xFE) = 0xCB; + *(u16 *)(arg0 + 2) = 3; + *(u16 *)(arg0 + 0xFC) = 0; + break; + case 5: + *(u16 *)(arg0 + 0xFE) = 0xC5; + *(u16 *)(arg0 + 2) = 3; + *(u16 *)(arg0 + 0xFC) = 0; + break; + case 6: + ptr = *(s32 *)(arg0 + 0x20); + val = *(s16 *)(ptr + 0x18); + *(s16 *)(ptr + 0x18) = -val; + *(s32 *)(arg0 + 0x1C) = 0x20; + *(u16 *)(arg0 + 2) = 6; + break; + case 7: + case 8: + *(s32 *)(*(s32 *)(arg0 + 0x64) + 0xDC) = 0; + break; + } +} + extern void (*D_801907E4[])(void); diff --git a/src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c b/src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c index 65a23b3db..50c0b742d 100644 --- a/src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c +++ b/src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c @@ -5398,7 +5398,7 @@ extern void (*D_80186694[])(void); extern void func_8012C194(void); extern void func_8001CEC0(s32 a0, void *a1); extern void func_80015978(s32 a0, s32 *a1); -extern void func_8017FB04(void *a0); +extern void func_8017FB04(); extern s32 func_8012AD50(void *a0); void func_8017FA6C(void *a0) @@ -5421,7 +5421,93 @@ void func_8017FA6C(void *a0) } -INCLUDE_ASM("asm/ov_SC03_030/nonmatchings/ov_SC03_030_jr_8017AE2C", func_8017FB04); + + +extern void func_8012C098(s32 a0); +extern s32 func_80013294(void *a0, void *a1); +extern void func_80015954(s32 a0, s32 a1); + +void func_8017FB04(s32 s1) +{ + + extern s16 D_80126CB0; + extern Blk8 D_80126CAC; + register s32 s3 asm("$19"); + register s32 s2 asm("$18"); + volatile s32 stack[6]; + register s32 t4 asm("$12"); + register s32 t5 asm("$13"); + register s32 t6 asm("$14"); + register s32 v0 asm("$2"); + register s32 v1 asm("$3"); + register s32 a0 asm("$4"); + register s32 s0 asm("$16"); + + s3 = (s32)D_800AF630; + s0 = *(s32 *)(s1 + 0x20); + + if ((s32)D_80126CB0 + 0x300 < (s32)*(s16 *)(s1 + 0x100)) { + func_8012C098(s1); + return; + } + + if (func_80013294(&D_80126CAC, (void *)(s1 + 0xFC)) >= 0x500) { + goto setbit; + } + + s2 = s1 + 0xFC; + v0 = s3 + 0x18; + + __asm__ volatile( + "lw %0, 0(%3);" + "lw %1, 4(%3);" + "ctc2 %0, $0;" + "ctc2 %1, $1;" + "lw %0, 8(%3);" + "lw %1, 12(%3);" + "lw %2, 16(%3);" + "ctc2 %0, $2;" + "ctc2 %1, $3;" + "ctc2 %2, $4;" + "lw %0, 20(%3);" + "lw %1, 24(%3);" + "ctc2 %0, $5;" + "lw %2, 28(%3);" + "ctc2 %1, $6;" + "ctc2 %2, $7" + : "=&r"(t4), "=&r"(t5), "=&r"(t6) + : "r"(v0)); + + __asm__ volatile( + "lwc2 $0, 0(%0);" + "lwc2 $1, 4(%0);" + "nop;" + "nop;" + "rtps" + : : "r"(s2) : "memory"); + + a0 = (s32)&stack[0]; + __asm__ volatile("swc2 $14, 0(%0)" : : "r"(a0) : "memory"); + + v0 = (s32)&stack[2]; + __asm__ volatile("cfc2 %0, $31; nop; sw %0, 0(%1)" + : "=&r"(t4) : "r"(v0) : "memory"); + + v1 = 0x80000000; + if ((s32)stack[2] < 0) { + v0 = *(u32 *)(s0 + 4); + v0 |= v1; + *(u32 *)(s0 + 4) = v0; + return; + } + *(u32 *)(s0 + 4) &= 0x7fffffff; + func_80015954((s32)&stack[0], s1 + 4); + return; + +setbit: + *(u32 *)(s0 + 4) |= 0x80000000; +} + extern void (*D_8018686C[])(void); diff --git a/src/ov_SC03_031/ov_SC03_031_jr_8017DB5C.c b/src/ov_SC03_031/ov_SC03_031_jr_8017DB5C.c index 04d330a7b..657675de0 100644 --- a/src/ov_SC03_031/ov_SC03_031_jr_8017DB5C.c +++ b/src/ov_SC03_031/ov_SC03_031_jr_8017DB5C.c @@ -3673,7 +3673,40 @@ void func_8017F6B8(s32 a0) { } -INCLUDE_ASM("asm/ov_SC03_031/nonmatchings/ov_SC03_031_jr_8017DB5C", func_8017F728); +extern u8 * func_801290DC(s32 a0, u8 *a1); +extern u16 D_8018609E[][4]; +extern s32 rand(void); + +void func_8017F728(void *a0) { + s16 v[3]; + register s32 i __asm__("$19"); + s32 b1, b2; + s32 r1, r2; + register s32 t __asm__("$2"); + + if (*(s32 *)((s32)a0 + 0x1C) != 0) { + v[1] = *(u16 *)((s32)a0 + 0xA) + D_8018609E[*(u16 *)((s32)a0 + 0x70) & 0xF][0]; + for (i = 0; i < 10; i++) { + r1 = rand() % 160; + b1 = *(s16 *)((s32)a0 + 6); + if (rand() & 1) + t = b1 + r1; + else + t = b1 - r1; + v[0] = t; + r2 = rand() % 160; + b2 = *(s16 *)((s32)a0 + 0xE); + if (rand() & 1) + t = b2 + r2; + else + t = b2 - r2; + v[2] = t; + func_801290DC(0x31, v); + } + (*(s32 *)((s32)a0 + 0x1C))--; + } +} + extern u16 D_801860C4[]; diff --git a/src/ov_SC03_094/ov_SC03_094_jr_8017BEBC.c b/src/ov_SC03_094/ov_SC03_094_jr_8017BEBC.c index a021e96bd..0b4e3f191 100644 --- a/src/ov_SC03_094/ov_SC03_094_jr_8017BEBC.c +++ b/src/ov_SC03_094/ov_SC03_094_jr_8017BEBC.c @@ -4048,7 +4048,65 @@ void func_8017E0FC(s32 a0) { } -INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094_jr_8017BEBC", func_8017E254); +extern s32 func_8004787C(s32 a0); +extern void func_8002D4C8(s32 a0, s32 a1); + +void func_8017E254(s32 a0) { + extern u8 D_8018B4F2[]; + extern u8 D_8018B4F4[]; + extern u8 D_8018B4F8[]; + extern u8 D_8018B50C[]; + + s32 s0 = a0; + s32 ret; + u16 sum; + s16 a2; + s32 a1; + s32 matched; + + ret = func_8004787C((s16)(*(u16 *)(s0 + 0xFC) += 0x40)); + + *(s16 *)(s0 + 0xE) = *(u16 *)(s0 + 0x8C) + ((*(s16 *)(s0 + 0xFE) * ret) >> 12); + + if (*(s16 *)(s0 + 0xFC) < 0x400) { + return; + } + + sum = *(u16 *)(s0 + 0x8C) + *(u16 *)(s0 + 0xFE); + *(s16 *)(s0 + 0xE) = sum; + *(s16 *)(s0 + 0x88) = *(u16 *)(s0 + 0x6); + *(s16 *)(s0 + 0x8C) = *(u16 *)(s0 + 0xE); + a2 = *(s16 *)(s0 + 0x6); + + a1 = (*(s32 *)(s0 + 0xDC) << 3) - 8; + + for (;;) { + if (a2 == *(s16 *)(D_8018B4F4 + a1)) { + if (*(s16 *)(s0 + 0xE) == *(s16 *)(D_8018B4F8 + a1)) { + func_8002D4C8(0x744, 0); + matched = 1; + break; + } + } + a1 += 8; + if (*(s16 *)(D_8018B4F2 + a1) == 0) { + matched = 0; + break; + } + } + + if (matched == 1) { + *(s16 *)(s0 + 0x2) = 4; + *(u16 *)(s0 + 0xFC) = 0; + *(u16 *)(*(s32 *)(s0 + 0x20) + 0x2C) |= 0x80; + *(s32 *)(*(s32 *)(s0 + 0x20) + 0x80) = + (s32)(D_8018B50C + *(s16 *)(s0 + 0x70) * 8); + } else { + *(s16 *)(s0 + 0x2) = 1; + *(u16 *)(s0 + 0x5C) = (*(u16 *)(s0 + 0x5C) | 0x1000) & 0xF7FF; + } +} + #include "common.h" diff --git a/src/ov_SC03_102/ov_SC03_102_jr_8017BEBC.c b/src/ov_SC03_102/ov_SC03_102_jr_8017BEBC.c index f9d4f1995..90b6a265d 100644 --- a/src/ov_SC03_102/ov_SC03_102_jr_8017BEBC.c +++ b/src/ov_SC03_102/ov_SC03_102_jr_8017BEBC.c @@ -4672,7 +4672,57 @@ void func_8018153C(void *a0) } -INCLUDE_ASM("asm/ov_SC03_102/nonmatchings/ov_SC03_102_jr_8017BEBC", func_801815D4); + + + + + + +typedef struct { u8 b0, b1, b2, b3; } Blk4_801815D4; + +void func_801815D4(void *a0) +{ + extern void func_8012EF70(s32 a0, s32 a1); + extern void func_80015954(s32 a0, s32 a1); + extern u16 D_800B99DA; + extern Blk4_801815D4 D_80189C3C; + extern Blk4_801815D4 D_80189C58; + extern Blk4_801815D4 D_80189C74; + extern Blk4_801815D4 D_80189C90; + + u8 *s0; + s16 buf[4]; + Blk4_801815D4 col; + s32 flags; + u32 v; + u32 val; + + s0 = *(u8 **)((u8 *)a0 + 0x20); + flags = ((s32 (*)(s32, s32))func_8012EF70)((s32)((u8 *)a0 + 0xFC), (s32)buf); + + if (flags & 0xFFFFEFFF) { + register u32 loaded __asm__("$2"); + loaded = *(u32 *)(s0 + 4); + val = loaded | 0x80000000; + } else { + val = *(u32 *)(s0 + 4) & 0x7FFFFFFF; + } + *(u32 *)(s0 + 4) = val; + __asm__ __volatile__(""); + + func_80015954((s32)buf, (s32)((u8 *)a0 + 4)); + + col.b2 = 0; + v = -(D_800B99DA & 1) & 0xF; + col.b0 = v + 0xF0; + col.b1 = v + 0x40; + + D_80189C3C = col; + D_80189C58 = col; + D_80189C74 = col; + D_80189C90 = col; +} + diff --git a/src/ov_SC03_119/ov_SC03_119_o0d.c b/src/ov_SC03_119/ov_SC03_119_o0d.c index 74dcefd21..022de9808 100644 --- a/src/ov_SC03_119/ov_SC03_119_o0d.c +++ b/src/ov_SC03_119/ov_SC03_119_o0d.c @@ -2870,7 +2870,44 @@ void func_80183280(Ent_80183280 *arg) { } -INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_o0d", func_801832E0); +extern void func_8013C0F8(s32 a0); +extern s32 func_80029178(s32 arg); +extern void func_8013373C(s32 a0); + +typedef struct { + u8 pad0[2]; + u16 f2; + u8 pad1[0xD8]; + u16 fDC; + u16 mid; + union { + u32 w; + s16 h[2]; + } uE0; + u32 fE4; + u16 fE8; +} Ent_832E0; + +void func_801832E0(Ent_832E0 *param_1) +{ + + extern s32 D_801B5D38; + extern s32 D_801B86B4; + func_8013C0F8((s32)&D_801B5D38); + func_8013C0F8((s32)&D_801B86B4); + param_1->fDC = 0; + param_1->uE0.w = 0; + param_1->fE4 = 0; + param_1->fE8 = 0; + if ((func_80029178(0xB8) & 0xFF) == 0) { + param_1->f2++; + } else { + func_8013373C(0); + param_1->uE0.h[1] = -0xF7; + param_1->f2 = 4; + } +} + void func_801833C4(s32 arg0) { diff --git a/src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c b/src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c index 7e10fb9dc..b42237fb0 100644 --- a/src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c +++ b/src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c @@ -7485,7 +7485,85 @@ void func_80181EE8(s32 param_1) } -INCLUDE_ASM("asm/ov_SC04_004/nonmatchings/ov_SC04_004_jr_8017AE2C", func_80182014); +extern s32 D_80126B58; +extern u16 D_80126B5E; +extern u16 D_80126B62; +extern u16 D_80126B66; + +void func_80182014(s32 arg0, s32 arg1) { + u16 w5e; + u16 p6; + u16 w66; + u16 pE; + s16 x; + s16 y; + s16 z; + s16 lim; + s32 wide; + s16 t1n; + s16 a3n; + register s32 d __asm__("6"); + register s32 t1 __asm__("9"); + register s32 a3 __asm__("7"); + + if (*(u16 *)&D_80126B58 == 0x1A) { + return; + } + w5e = D_80126B5E; + p6 = *(u16 *)(arg0 + 6); + d = w5e - p6; + t1 = d; + if ((s16)d < 0) { + t1 = -d; + } + w66 = D_80126B66; + pE = *(u16 *)(arg0 + 0xE); + d = w66 - pE; + a3 = d; + if ((s16)d < 0) { + a3 = -d; + } + x = *(s16 *)(arg0 + 0xA); + y = *(s16 *)(arg1 + 8); + lim = *(s16 *)&D_80126B62; + if (lim < x + y) { + return; + } + z = *(s16 *)(arg1 + 0xA); + if (x + z < lim) { + return; + } + wide = t1 << 16; + t1 = wide >> 16; + if (t1 >= 0x49) { + return; + } + wide = a3 << 16; + a3 = wide >> 16; + if (a3 >= 0x49) { + return; + } + if (lim < x + ((y + z) >> 1)) { + D_80126B62 = x + y - 1; + return; + } + t1n = t1; + a3n = a3; + if (t1n < a3n) { + if ((s16)w66 > (s16)pE) { + D_80126B66 = pE + 0x49; + } else { + D_80126B66 = pE - 0x49; + } + } else { + if ((s16)w5e > (s16)p6) { + D_80126B5E = p6 + 0x49; + } else { + D_80126B5E = p6 - 0x49; + } + } +} + void func_80182170(s32 a0, s32 a1) { diff --git a/src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c b/src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c index 8b5520363..0e4db2617 100644 --- a/src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c +++ b/src/ov_SC04_015/ov_SC04_015_jr_8017AE2C.c @@ -5161,7 +5161,81 @@ void func_8017ED00(void) { } -INCLUDE_ASM("asm/ov_SC04_015/nonmatchings/ov_SC04_015_jr_8017AE2C", func_8017ED28); +#include "common.h" + + + +extern void func_8017F018(s32 a0); +extern s32 func_80128ED8(s32 param_1, s32 *param_2); +extern s32 D_801C8C64; + +void func_8017ED28(void) { + register s16 *p __asm__("$18"); + register s16 *q __asm__("$16"); + register s32 i __asm__("$19"); + register s32 c2 __asm__("$20"); + register s16 *s1 __asm__("$17"); + register s32 v1 __asm__("$3"); + register s32 v0 __asm__("$2"); + Blk8 buf; + + p = (s16 *)&D_801C8C64; + i = 0; + c2 = 2; + q = p + 10; + do { + v1 = *p; + if (v1 != 0) { + v0 = 1; + s1 = (s16 *)*(s32 *)((u8 *)q - 8); + if (v1 == v0) { + goto L_case1; + } + v0 = (v1 < 2); + if (v0 == 0) { + goto L_check2; + } + if (v1 != 0) { + goto L_common; + } + i++; + goto L_bottom; + L_check2: + if (v1 == c2) { + goto L_case2; + } + goto L_common; + L_case1: + *(Blk8 *)&buf = *(Blk8 *)((u8 *)q - 0x10); + func_8017F018((s32)&buf); + v0 = *(s16 *)(*(s32 *)((u8 *)q - 4) + 0x76); + if (v0 == 0) { + *(s16 *)((u8 *)q - 0x12) = 0x20; + *p = c2; + goto L_common; + } else { + s32 tmp = *(s32 *)((u8 *)q - 8); + v1 = (v0 << 13) / 100; + *(s16 *)(tmp + 0x1A) = v1; + *(s16 *)(tmp + 0x18) = v1; + goto L_common; + } + L_case2: + s1[13] = 0; + s1[12] = 0; + L_common: + s1[4] = *(u16 *)((u8 *)q - 0x10); + s1[5] = *(u16 *)((u8 *)q - 0xE); + s1[6] = *(u16 *)((u8 *)q - 0xC); + func_80128ED8((s32)s1, (s32 *)q); + } + i++; + L_bottom: + q += 14; + p += 14; + } while (i < 0x20); +} + extern void func_8012C194(void); extern void func_80128EA8(s32 a0, s32 a1, s32 a2); diff --git a/src/ov_SC05_005/ov_SC05_005_jr_8017D898.c b/src/ov_SC05_005/ov_SC05_005_jr_8017D898.c index 2be9b1042..3b32477e8 100644 --- a/src/ov_SC05_005/ov_SC05_005_jr_8017D898.c +++ b/src/ov_SC05_005/ov_SC05_005_jr_8017D898.c @@ -5192,7 +5192,118 @@ u8 *a0; } -INCLUDE_ASM("asm/ov_SC05_005/nonmatchings/ov_SC05_005_jr_8017D898", func_80181828); +/* Handwritten function (the target .s itself is splat-flagged handwritten) -- a bare-jr/mult/GTE + * shape no -O2 C reaches -- cookbook section 265 verbatim-asm lane, file-scope form, precedented by + * VectorNormal/func_8017D810 in src/800b.c). Transcribed 1:1 from + * asm/ov_SC05_005/nonmatchings/ov_SC05_005_jr_8017D898/func_80181828.s. + * + * Recovered C semantics: squared-XZ-distance + Y-band gate against the actor at a0; on pass, + * normalizes the XZ/0/Z-ish diff vector via VectorNormal and fires func_8012F568(1,0x4014,0, + * 0x18,&xy,&diff16) (an effect/sound-ish call), returning 1; otherwise returns 0. + */ +__asm__( + ".text\n" + ".align\t2\n" + ".globl\tfunc_80181828\n" + ".ent\tfunc_80181828\n" + "func_80181828:\n" + ".frame\t$sp,64,$31\n" + ".mask\t0x80000000,-8\n" + ".fmask\t0,0\n" + ".set\tnoreorder\n" + "addiu $29, $29, -64\n" + "addu $6, $4, $0\n" + "lui $3, %hi(D_801270C0)\n" + "lh $3, %lo(D_801270C0)($3)\n" + "addiu $2, $0, 2\n" + "beq $3, $2, .L80181970\n" + " sw $31, 56($29)\n" + "lw $2, 32($6)\n" + "lhu $4, 6($6)\n" + "lh $5, 24($2)\n" + "sh $4, 40($29)\n" + "sll $4, $4, 16\n" + "lhu $2, 10($6)\n" + "sra $4, $4, 16\n" + "sh $2, 42($29)\n" + "lui $2, %hi(D_80126B5E)\n" + "lh $2, %lo(D_80126B5E)($2)\n" + "lhu $3, 14($6)\n" + "sra $5, $5, 7\n" + "sw $0, 28($29)\n" + "subu $2, $2, $4\n" + "sh $3, 44($29)\n" + "sll $3, $3, 16\n" + "sw $2, 24($29)\n" + "lui $2, %hi(D_80126B66)\n" + "lh $2, %lo(D_80126B66)($2)\n" + "sra $3, $3, 16\n" + "subu $2, $2, $3\n" + "sw $2, 32($29)\n" + "addiu $2, $29, 24\n" + "lwc2 $9, 0($2)\n" + "lwc2 $10, 4($2)\n" + "lwc2 $11, 8($2)\n" + "nop\n" + "nop\n" + "sqr 0\n" + "swc2 $25, 0($2)\n" + "swc2 $26, 4($2)\n" + "swc2 $27, 8($2)\n" + "mult $5, $5\n" + "lw $2, 24($29)\n" + "lw $3, 32($29)\n" + "addu $2, $2, $3\n" + "mflo $8\n" + "slt $2, $2, $8\n" + "beqz $2, .L80181974\n" + " addu $2, $0, $0\n" + "lui $3, %hi(D_80126B62)\n" + "lh $3, %lo(D_80126B62)($3)\n" + "lh $4, 10($6)\n" + "subu $2, $3, $4\n" + "bltz $2, .L80181914\n" + " slti $2, $2, 10\n" + "bnez $2, .L80181924\n" + " addiu $4, $29, 24\n" + "j .L80181974\n" + " addu $2, $0, $0\n" + ".L80181914:\n" + "subu $2, $4, $3\n" + "slti $2, $2, 10\n" + "beqz $2, .L80181970\n" + " addiu $4, $29, 24\n" + ".L80181924:\n" + "jal VectorNormal\n" + " addu $5, $4, $0\n" + "addiu $4, $0, 1\n" + "addiu $5, $0, 16404\n" + "lw $2, 24($29)\n" + "lw $3, 28($29)\n" + "lw $6, 32($29)\n" + "addiu $7, $0, 24\n" + "sh $2, 48($29)\n" + "addiu $2, $29, 40\n" + "sh $3, 50($29)\n" + "sh $6, 52($29)\n" + "sw $2, 16($29)\n" + "addiu $2, $29, 48\n" + "addu $6, $0, $0\n" + "jal func_8012F568\n" + " sw $2, 20($29)\n" + "j .L80181974\n" + " addiu $2, $0, 1\n" + ".L80181970:\n" + "addu $2, $0, $0\n" + ".L80181974:\n" + "lw $31, 56($29)\n" + "addiu $29, $29, 64\n" + "jr $31\n" + " nop\n" + ".set\treorder\n" + ".end\tfunc_80181828\n" +); + extern void (*D_801A62E8[])(void);