From 7195a5ff91110eb9eb3df341fca3615f5d006b2d Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Fri, 11 Sep 2026 19:13:25 -0600 Subject: [PATCH] =?UTF-8?q?phase-36:=20S105=20s105=5Ff9=20=E2=80=94=20func?= =?UTF-8?q?=5F80187D18=20banked=20at=200=20through=20the=20whole-object=20?= =?UTF-8?q?gate=20+=20propagated=20=E2=80=94=20f9=20plain=20C=20(the=20sam?= =?UTF-8?q?e-TU=20sibling's=20spelling:=20an=20address=20alias=20+=20the?= =?UTF-8?q?=20multi-set=20abs=20chain;=203=20=E2=86=92=200)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .run/P36/delever/calibration.json | 350 +++++++++++----------- .run/P36/delever/ledger.jsonl | 1 + src/ov_SC02_027/ov_SC02_027_jr_8017D898.c | 26 +- 3 files changed, 189 insertions(+), 188 deletions(-) diff --git a/.run/P36/delever/calibration.json b/.run/P36/delever/calibration.json index b6e3fdbe0..72f6ed443 100644 --- a/.run/P36/delever/calibration.json +++ b/.run/P36/delever/calibration.json @@ -1,7 +1,7 @@ { - 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1)) {\n case 1:\n if (*(s32 *)(param_1 + 0x90) != (s32)&D_801D3BC4) {\n func_8012A828(param_1, (s32)&D_801D3BC4);\n }\n v0 = *(s32 *)(param_1 + 0x20);\n __asm__ __volatile__(\"\"); /* \u00a75a cross-jump barrier, placed between the two tail // !FAKE: barrier \u2014 NEEDED COMPILE-ERROR (P36 rung B tus7)\n stores (not immediately before the jump) so reorg can\n still fill the branch delay slot with `a1 = 0xC00`;\n keeps this arm's tail distinct from case 0's identical\n one so gcc does not fold the two duplicate tails */\n a1 = 0xC00;\n goto common;\n case 0:\n if (*(s32 *)(param_1 + 0x90) != (s32)&D_801BEAF8) {\n func_8012A828(param_1, (s32)&D_801BEAF8);\n }\n v0 = *(s32 *)(param_1 + 0x20);\n a1 = 0xC00;\n goto common;\n case 3:\n t0 = *(s32 *)(param_1 + 0x90);\n t1 = (s32)&D_801D3BC4;\n goto LAB_80180154;\n case 2:\n t0 = *(s32 *)(param_1 + 0x90);\n t1 = (s32)&D_801BEAF8;\n LAB_80180154:\n if (t0 != t1) {\n func_8012A828(param_1, t1);\n }\n v0 = *(s32 *)(param_1 + 0x20);\n a1 = 0xE00;\n common:\n r = func_8012B608((s32)*(s16 *)(v0 + 0x12), a1, 8);\n *(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) =\n *(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) + r;\n return;\n case 4:\n func_801801B0(param_1);\n return;\n default:\n return;\n }\n}\n", "after_text": "void func_8018009C(s32 param_1)\n{\n s32 v0;\n s32 a1;\n s32 t0;\n s32 t1;\n s32 r;\n\n switch ((s16)(*(u16 *)(param_1 + 0xFC) - 1)) {\n case 1:\n if (*(s32 *)(param_1 + 0x90) != (s32)&D_801D3BC4) {\n func_8012A828(param_1, (s32)&D_801D3BC4);\n }\n v0 = *(s32 *)(param_1 + 0x20);\n /* \u00a75a cross-jump barrier, placed between the two tail \n stores (not immediately before the jump) so reorg can\n still fill the branch delay slot with `a1 = 0xC00`;\n keeps this arm's tail distinct from case 0's identical\n one so gcc does not fold the two duplicate tails */\n a1 = 0xC00;\n goto common;\n case 0:\n if (*(s32 *)(param_1 + 0x90) != (s32)&D_801BEAF8) {\n func_8012A828(param_1, (s32)&D_801BEAF8);\n }\n a1 = 0xC00;\n v0 = *(s32 *)(param_1 + 0x20);\n goto common;\n case 3:\n t0 = *(s32 *)(param_1 + 0x90);\n t1 = (s32)&D_801D3BC4;\n goto LAB_80180154;\n case 2:\n t0 = *(s32 *)(param_1 + 0x90);\n t1 = (s32)&D_801BEAF8;\n LAB_80180154:\n if (t0 != t1) {\n func_8012A828(param_1, t1);\n }\n v0 = *(s32 *)(param_1 + 0x20);\n a1 = 0xE00;\n common:\n r = func_8012B608((s32)*(s16 *)(v0 + 0x12), a1, 8);\n *(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) =\n *(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) + r;\n return;\n case 4:\n func_801801B0(param_1);\n return;\n default:\n return;\n }\n}\n"} {"ts": "2026-09-11 19:12:48", "label": "s105_f9", "rung": "E", "calib": {"head": "ea0556951", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_027/ov_SC02_027_jr_8017D898.c", "fn": "func_801810A0", "addr": 2149060768, "aliases": null, "header": false, "includers": 0, "nhash_before": "bd1795bd5136441bf3abb1216317029249002455", "nhash_after": "9b1a1f2c1b2654c3b048eceae057c1cebac9c333", "source": ".run/P36/agents/ov_SC02_027__func_801810A0/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.28, "objects": ["build/src/ov_SC02_027/ov_SC02_027_jr_8017D898.o"], "before_text": "void func_801810A0(W_801810A0 *w) {\n extern u64 D_8018F298[];\n struct {\n s16 f0, f1, f2, f3, f4, f5, f6;\n u16 timer;\n s32 tbl;\n s32 pad[5];\n } L;\n register s32 t asm(\"v0\"); // !FAKE: pin v0 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 f;\n register s32 u asm(\"a0\"); // !FAKE: pin a0 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n if (func_8012BDBC((s32)w, 0x380)) {\n __asm__ __volatile__(\"\" ::: \"memory\"); // !FAKE: barrier memory \u2014 NEEDED DIFFERS (P36 rung B tus9)\n if (!func_8018152C((s32)w, 0x380)) {\n goto el;\n }\n __asm__ __volatile__(\"\" ::: \"memory\"); // !FAKE: barrier memory \u2014 NEEDED DIFFERS (P36 rung B tus9)\n *(s16 *)(w->f20 + 0x12) += func_8012B8E4((s32)w, 0x14);\n if (w->f34 == 0) {\n if (w->fFE == 0) {\n func_8002D4C8(0x68B, 0);\n w->fFE = 1;\n }\n if (w->fFC >= 0xA) {\n w->fFC = 0xA;\n w->f34 += 1;\n }\n L.tbl = (s32)&D_8018F298[*(s16 *)&w->fFC];\n L.f3 = 0x175;\n L.f6 = 0x7FFF;\n L.f2 = 0;\n L.f1 = 0;\n L.f0 = 0;\n L.f5 = 0;\n L.f4 = 0;\n L.timer = w->fFC;\n if (func_8012C51C((s32)&L, (s32)w)) {\n w->fFC += 1;\n }\n }\n } else {\nel:\n t = w->fFC;\n if (t != 0) {\n f = w->fFE;\n u = t;\n __asm__ __volatile__(\"\" : : \"r\"(t)); // !FAKE: keepalive \u2014 NEEDED DIFFERS (P36 rung B tus9)\n t = u - 1;\n w->fFC = t;\n w->f34 = 0;\n if (f != 0) {\n w->fFE = 0;\n func_8002D4C8(4, 0x68B);\n }\n }\n }\n}\n", "after_text": "void func_801810A0(W_801810A0 *w) {\n extern u64 D_8018F298[];\n struct {\n s16 f0, f1, f2, f3, f4, f5, f6;\n u16 timer;\n s32 tbl;\n s32 pad[2]; /* frame accounting (P36 S105 f9): the 20-byte request + one 8-byte reload slot for the `cnt`\n split's orphan (combine.c:2306, reload1.c:2331) leave 8 bytes of the original's 64-byte frame\n unexplained; the tree's pad[5] covered the orphan too. pad[2] and pad[3] both give 0. */\n } L;\n s16 cnt;\n s32 f;\n\n if (func_8012BDBC((s32)w, 0x380)) {\n if (!func_8018152C((s32)w, 0x380)) {\n goto el;\n }\n *(s16 *)(w->f20 + 0x12) += func_8012B8E4((s32)w, 0x14);\n if (w->f34 == 0) {\n if (w->fFE == 0) {\n func_8002D4C8(0x68B, 0);\n w->fFE = 1;\n }\n if (w->fFC >= 0xA) {\n w->fFC = 0xA;\n w->f34 += 1;\n }\n L.tbl = (s32)&D_8018F298[*(s16 *)&w->fFC];\n L.f3 = 0x175;\n L.f6 = 0x7FFF;\n L.f2 = 0;\n L.f1 = 0;\n L.f0 = 0;\n L.f5 = 0;\n L.f4 = 0;\n L.timer = w->fFC;\n if (func_8012C51C((s32)&L, (s32)w)) {\n w->fFC += 1;\n }\n }\n } else {\nel:\n cnt = w->fFC;\n if (cnt != 0) {\n f = w->fFE;\n w->fFC = cnt - 1;\n w->f34 = 0;\n if (f != 0) {\n w->fFE = 0;\n func_8002D4C8(4, 0x68B);\n }\n }\n }\n}\n"} {"ts": "2026-09-11 19:13:06", "label": "s105_f9", "rung": "E", "calib": {"head": "41ab73ae6", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_027/ov_SC02_027_jr_8017D898.c", "fn": "func_8017F498", "addr": 2149053592, "aliases": null, "header": false, "includers": 0, "nhash_before": "035b880d5c9e3941c6b9027e942e7effcf701db0", "nhash_after": "25abdc768527cc40c4cbd8c3c92182a2a6a9ca41", "source": ".run/P36/agents/ov_SC02_027__func_8017F498/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.285, "objects": ["build/src/ov_SC02_027/ov_SC02_027_jr_8017D898.o"], "before_text": "void func_8017F498(s32 a0) {\n\n extern s16 D_8018F0B0[];\n extern Blk8_80126940_8017D6D0_8017F498 D_80126940;\n Blk8_80126940_8017D6D0_8017F498 sp10;\n u8 t;\n s16 lim;\n register s16 mid __asm__(\"$5\"); // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n if (func_80148800(&D_80126B58) & 3) {\n t = (*(u8 *)(a0 + 5) + 1) & 1;\n *(u8 *)(a0 + 5) = t;\n }\n sp10 = D_80126940;\n if (sp10.v[0] < -0x3C0) {\n lim = -0x540;\n if (sp10.v[0] < -0x540) {\n sp10.v[0] = lim;\n }\n *(s16 *)(a0 + 0x2E) = 0;\n *(s32 *)(a0 + 0x14) = D_8018F0B0[*(u8 *)(a0 + 5)];\n } else {\n if (sp10.v[2] >= 0x1081) {\n mid = -0x300;\n if (sp10.v[0] < mid) {\n *(s16 *)(a0 + 0x2E) = mid - sp10.v[0];\n } else {\n *(s16 *)(a0 + 0x2E) = 0;\n }\n } else {\n mid = -0x340;\n if (sp10.v[0] < mid) {\n *(s16 *)(a0 + 0x2E) = mid - sp10.v[0];\n } else {\n *(s16 *)(a0 + 0x2E) = 0;\n }\n }\n __asm__ __volatile__(\"\" :: \"r\"(mid)); /* zero-byte: keep $a1 live past the subu */ // !FAKE: keepalive \u2014 NEEDED DIFFERS (P36 rung B tus9)\n if (sp10.v[2] >= 0x1241) {\n *(s32 *)(a0 + 0x14) = D_8018F0B0[*(u8 *)(a0 + 5)];\n } else {\n *(s32 *)(a0 + 0x14) = 0x12C;\n }\n }\n *(s16 *)(a0 + 0x28) = func_80012F74(*(s16 *)(a0 + 0x28), *(s16 *)(a0 + 0x2E), 4, 1);\n lim = -0x180;\n if (lim < sp10.v[0]) {\n sp10.v[0] = lim;\n }\n lim = -0x380;\n if (lim < sp10.v[1]) {\n sp10.v[1] = lim;\n }\n func_8017F918(a0, sp10.v);\n}\n", "after_text": "void func_8017F498(s32 a0) {\n\n extern s16 D_8018F0B0[];\n extern Blk8_80126940_8017D6D0_8017F498 D_80126940;\n Blk8_80126940_8017D6D0_8017F498 sp10;\n u8 t;\n s16 lim;\n\n if (func_80148800(&D_80126B58) & 3) {\n t = (*(u8 *)(a0 + 5) + 1) & 1;\n *(u8 *)(a0 + 5) = t;\n }\n sp10 = D_80126940;\n if (sp10.v[0] < -0x3C0) {\n lim = -0x540;\n if (sp10.v[0] < -0x540) {\n sp10.v[0] = lim;\n }\n *(s16 *)(a0 + 0x2E) = 0;\n *(s32 *)(a0 + 0x14) = D_8018F0B0[*(u8 *)(a0 + 5)];\n } else {\n if (sp10.v[2] >= 0x1081) {\n s16 mid = -0x300;\n if (sp10.v[0] < mid) {\n *(s16 *)(a0 + 0x2E) = mid - sp10.v[0];\n } else {\n *(s16 *)(a0 + 0x2E) = 0;\n }\n } else {\n s16 mid = -0x340;\n if (sp10.v[0] < mid) {\n *(s16 *)(a0 + 0x2E) = mid - sp10.v[0];\n } else {\n *(s16 *)(a0 + 0x2E) = 0;\n }\n }\n if (sp10.v[2] >= 0x1241) {\n *(s32 *)(a0 + 0x14) = D_8018F0B0[*(u8 *)(a0 + 5)];\n } else {\n *(s32 *)(a0 + 0x14) = 0x12C;\n }\n }\n *(s16 *)(a0 + 0x28) = func_80012F74(*(s16 *)(a0 + 0x28), *(s16 *)(a0 + 0x2E), 4, 1);\n lim = -0x180;\n if (lim < sp10.v[0]) {\n sp10.v[0] = lim;\n }\n lim = -0x380;\n if (lim < sp10.v[1]) {\n sp10.v[1] = lim;\n }\n func_8017F918(a0, sp10.v);\n}\n"} +{"ts": "2026-09-11 19:13:24", "label": "s105_f9", "rung": "E", "calib": {"head": "8a982ef6c", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_027/ov_SC02_027_jr_8017D898.c", "fn": "func_80187D18", "addr": 2149088536, "aliases": null, "header": false, "includers": 0, "nhash_before": "c42418c04d7966d4c0d1f42f85948db98ed14607", "nhash_after": "0e67aa175b63706304dfb65622418587598040de", "source": ".run/P36/agents/ov_SC02_027__func_80187D18/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.287, "objects": ["build/src/ov_SC02_027/ov_SC02_027_jr_8017D898.o"], "before_text": "void func_80187D18(s32 a0) {\n\n extern u8 D_800AF648;\n extern u8 D_801C1FD4[];\n extern u8 D_801C1944[];\n s32 mv[4]; /* sp+0x10 : the 4-word block handed to func_8012B1B4 */\n V8_80187D18 pad[2]; /* sp+0x20 : gcc's own area (vars must be 0x48 for a 0x68 frame) */\n V8_80187D18 sp30; /* sp+0x30 : func_80133784 arg1 */\n V8_80187D18 sp38; /* sp+0x38 : func_80133784 arg2 */\n s16 v[4]; /* sp+0x40 : RotTransPers arg0 */\n s32 sxy; /* sp+0x48 : DVECTOR \u2014 see lever 2, a u16[2] here costs 8 bytes */\n s32 z; /* sp+0x4C */\n s32 flag; /* sp+0x50 */\n s32 anim;\n s32 r;\n s32 t;\n\n if (*(u16 *)(a0 + 0x72) & 0x4000) {\n func_8012A828(a0, (s32)D_801C1FD4);\n *(s16 *)(a0 + 0xFE) = 0;\n }\n\n anim = a0 + 0x88;\n *(u16 *)(a0 + 0xFC) = *(u16 *)(a0 + 0xFC) + 1;\n if (((s32 (*)(s32, u16 *))func_8012BE98)(a0, (u16 *)anim) >= 0x1000) {\n s32 d = func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12),\n func_8012B744((void *)(a0 + 4), (void *)anim), 0x20);\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + d;\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) & 0xFFF;\n }\n\n mv[0] = 0;\n mv[1] = 0;\n mv[2] = -(*(s16 *)(a0 + 0xFC) << 17) / 0x18;\n func_8012B1B4(a0, (s32)mv);\n\n if ((((s32 (*)(s32))func_8012CBA4)(a0) & 0x6000) == 0) {\n s32 d;\n *(s32 *)(a0 + 0x4) = *(s32 *)(a0 + 0x38);\n *(s32 *)(a0 + 0x8) = *(s32 *)(a0 + 0x3C);\n *(s32 *)(a0 + 0xC) = *(s32 *)(a0 + 0x40);\n d = func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12),\n func_8012B744((void *)(a0 + 4), (void *)anim), 0x20);\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + d;\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) & 0xFFF;\n }\n\n t = func_8004787C(*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) & 0xFFF);\n r = 0x30;\n sp30.x = *(u16 *)(a0 + 0x6) - ((t * r) >> 12);\n sp30.y = *(u16 *)(a0 + 0xA) - 0x20;\n t = func_80047948(*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) & 0xFFF);\n sp30.z = *(u16 *)(a0 + 0xE) - ((t * r) >> 12);\n sp38.x = sp30.x;\n sp38.y = sp30.y + 0x60;\n sp38.z = sp30.z;\n\n if ((func_80133784(1, &sp30, (s32)&sp38) & 0x6000) == 0) {\n *(s32 *)(a0 + 0x4) = *(s32 *)(a0 + 0x38);\n *(s32 *)(a0 + 0xC) = *(s32 *)(a0 + 0x40);\n }\n\n if (*(s16 *)(a0 + 0xFE) == 0 && func_8012BD3C(a0, 0x200, 0x40000) == 1) {\n func_8012A828(a0, (s32)D_801C1944);\n *(s16 *)(a0 + 0x2) = 2;\n v[0] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x48);\n v[1] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x4C);\n v[2] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x50);\n /* $a0-pinned scopes: rematerialise &D_800AF648 (lui/addiu) before EACH call */\n { register void *r4 __asm__(\"$4\"); r4 = &D_800AF648; func_8004914C(r4); } // !FAKE: pin $4 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n { void *r4; r4 = &D_800AF648; func_800491AC(r4); }\n RotTransPers((s32)v, (s32)&sxy, &z, &flag);\n if (flag >= 0 && (u32)((*(u16 *)&sxy + 0x9F) & 0xFFFF) < 0x13F\n && (u32)((*((u16 *)&sxy + 1) + 0x77) & 0xFFFF) < 0xEF) {\n s32 sx; /* screen X, then REUSED as the pan field */\n register s32 av __asm__(\"$5\"); /* |X| \u2014 the one pin that helped */ // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 vol;\n sx = (s16)*(u16 *)&sxy;\n av = sx;\n if (sx < 0) {\n av = -sx;\n }\n vol = ((0xA0 - av) * 0x7F) / 0xA0;\n /* lever 3: sched1 otherwise hoists the PAN multiply ahead of this one */\n __asm__(\"\" : \"=r\"(vol) : \"0\"(vol)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n sx = (sx + 0xA0) / 0x14;\n if (sx == 0x10) {\n sx = 0xF;\n }\n sx = sx << 8; /* in place, so reorg can steal it */\n func_8002D4C8(0xA9B, (vol | (0x3000 | sx)) & 0xFFFF);\n }\n }\n\n if (*(s16 *)(a0 + 0xFC) == 0x18) {\n *(s16 *)(a0 + 0xFC) = 0;\n }\n}\n", "after_text": "void func_80187D18(s32 a0) {\n\n extern u8 D_800AF648;\n extern u8 D_801C1FD4[];\n extern u8 D_801C1944[];\n s32 mv[4]; /* sp+0x10 : the 4-word block handed to func_8012B1B4 */\n V8_80187D18 pad[2]; /* sp+0x20 : gcc's own area (vars must be 0x48 for a 0x68 frame) */\n V8_80187D18 sp30; /* sp+0x30 : func_80133784 arg1 */\n V8_80187D18 sp38; /* sp+0x38 : func_80133784 arg2 */\n s16 v[4]; /* sp+0x40 : RotTransPers arg0 */\n s32 sxy; /* sp+0x48 : DVECTOR \u2014 see lever 2, a u16[2] here costs 8 bytes */\n s32 z; /* sp+0x4C */\n s32 flag; /* sp+0x50 */\n s32 anim;\n s32 r;\n s32 t;\n\n if (*(u16 *)(a0 + 0x72) & 0x4000) {\n func_8012A828(a0, (s32)D_801C1FD4);\n *(s16 *)(a0 + 0xFE) = 0;\n }\n\n anim = a0 + 0x88;\n *(u16 *)(a0 + 0xFC) = *(u16 *)(a0 + 0xFC) + 1;\n if (((s32 (*)(s32, u16 *))func_8012BE98)(a0, (u16 *)anim) >= 0x1000) {\n s32 d = func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12),\n func_8012B744((void *)(a0 + 4), (void *)anim), 0x20);\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + d;\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) & 0xFFF;\n }\n\n mv[0] = 0;\n mv[1] = 0;\n mv[2] = -(*(s16 *)(a0 + 0xFC) << 17) / 0x18;\n func_8012B1B4(a0, (s32)mv);\n\n if ((((s32 (*)(s32))func_8012CBA4)(a0) & 0x6000) == 0) {\n s32 d;\n *(s32 *)(a0 + 0x4) = *(s32 *)(a0 + 0x38);\n *(s32 *)(a0 + 0x8) = *(s32 *)(a0 + 0x3C);\n *(s32 *)(a0 + 0xC) = *(s32 *)(a0 + 0x40);\n d = func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12),\n func_8012B744((void *)(a0 + 4), (void *)anim), 0x20);\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) + d;\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) =\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) & 0xFFF;\n }\n\n t = func_8004787C(*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) & 0xFFF);\n r = 0x30;\n sp30.x = *(u16 *)(a0 + 0x6) - ((t * r) >> 12);\n sp30.y = *(u16 *)(a0 + 0xA) - 0x20;\n t = func_80047948(*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) & 0xFFF);\n sp30.z = *(u16 *)(a0 + 0xE) - ((t * r) >> 12);\n sp38.x = sp30.x;\n sp38.y = sp30.y + 0x60;\n sp38.z = sp30.z;\n\n if ((func_80133784(1, &sp30, (s32)&sp38) & 0x6000) == 0) {\n *(s32 *)(a0 + 0x4) = *(s32 *)(a0 + 0x38);\n *(s32 *)(a0 + 0xC) = *(s32 *)(a0 + 0x40);\n }\n\n if (*(s16 *)(a0 + 0xFE) == 0 && func_8012BD3C(a0, 0x200, 0x40000) == 1) {\n func_8012A828(a0, (s32)D_801C1944);\n *(s16 *)(a0 + 0x2) = 2;\n v[0] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x48);\n v[1] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x4C);\n v[2] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x50);\n /* the target loads &D_800AF648 afresh (lui/addiu $a0) for EACH call: the second call names the\n * object through a second declaration of the same symbol (its SYMBOL_REF string is a different\n * pointer, so cse does not unify the two address pseudos into one callee-saved register) */\n func_8004914C(&D_800AF648);\n {\n extern u8 D_800AF648_b __asm__(\"D_800AF648\");\n func_800491AC(&D_800AF648_b);\n }\n RotTransPers((s32)v, (s32)&sxy, &z, &flag);\n if (flag >= 0 && (u32)((*(u16 *)&sxy + 0x9F) & 0xFFFF) < 0x13F\n && (u32)((*((u16 *)&sxy + 1) + 0x77) & 0xFFFF) < 0xEF) {\n s32 sx = (s16)*(u16 *)&sxy; /* screen X, then REUSED as the pan field */\n s32 vol = sx;\n if (vol < 0) {\n vol = -vol;\n }\n vol = ((0xA0 - vol) * 0x7F) / 0xA0;\n sx = (sx + 0xA0) / 0x14;\n if (sx == 0x10) {\n sx = 0xF;\n }\n sx = sx << 8; /* in place, so reorg can steal it */\n func_8002D4C8(0xA9B, (vol | (0x3000 | sx)) & 0xFFFF);\n }\n }\n\n if (*(s16 *)(a0 + 0xFC) == 0x18) {\n *(s16 *)(a0 + 0xFC) = 0;\n }\n}\n"} diff --git a/src/ov_SC02_027/ov_SC02_027_jr_8017D898.c b/src/ov_SC02_027/ov_SC02_027_jr_8017D898.c index bb77a988c..6b7d94fc4 100644 --- a/src/ov_SC02_027/ov_SC02_027_jr_8017D898.c +++ b/src/ov_SC02_027/ov_SC02_027_jr_8017D898.c @@ -9331,23 +9331,23 @@ void func_80187D18(s32 a0) { v[0] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x48); v[1] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x4C); v[2] = *(s32 *)(*(s32 *)(a0 + 0x20) + 0x50); - /* $a0-pinned scopes: rematerialise &D_800AF648 (lui/addiu) before EACH call */ - { register void *r4 __asm__("$4"); r4 = &D_800AF648; func_8004914C(r4); } // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus9) - { void *r4; r4 = &D_800AF648; func_800491AC(r4); } + /* the target loads &D_800AF648 afresh (lui/addiu $a0) for EACH call: the second call names the + * object through a second declaration of the same symbol (its SYMBOL_REF string is a different + * pointer, so cse does not unify the two address pseudos into one callee-saved register) */ + func_8004914C(&D_800AF648); + { + extern u8 D_800AF648_b __asm__("D_800AF648"); + func_800491AC(&D_800AF648_b); + } RotTransPers((s32)v, (s32)&sxy, &z, &flag); if (flag >= 0 && (u32)((*(u16 *)&sxy + 0x9F) & 0xFFFF) < 0x13F && (u32)((*((u16 *)&sxy + 1) + 0x77) & 0xFFFF) < 0xEF) { - s32 sx; /* screen X, then REUSED as the pan field */ - register s32 av __asm__("$5"); /* |X| — the one pin that helped */ // !FAKE: pin $5 — NEEDED DIFFERS (P36 rung B tus9) - s32 vol; - sx = (s16)*(u16 *)&sxy; - av = sx; - if (sx < 0) { - av = -sx; + s32 sx = (s16)*(u16 *)&sxy; /* screen X, then REUSED as the pan field */ + s32 vol = sx; + if (vol < 0) { + vol = -vol; } - vol = ((0xA0 - av) * 0x7F) / 0xA0; - /* lever 3: sched1 otherwise hoists the PAN multiply ahead of this one */ - __asm__("" : "=r"(vol) : "0"(vol)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) + vol = ((0xA0 - vol) * 0x7F) / 0xA0; sx = (sx + 0xA0) / 0x14; if (sx == 0x10) { sx = 0xF;