From 74657a03baf996a2e2333a3de2dd9dff43ebd590 Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Fri, 11 Sep 2026 00:36:21 -0600 Subject: [PATCH] =?UTF-8?q?phase-36:=20S104=20=E2=80=94=20the=20widened=20?= =?UTF-8?q?R31/R35=20pass=20(882=20classes,=20482=20s):=20delever=5Fregen?= =?UTF-8?q?=20--bank:=204=20of=204=20MATCH=20row(s)=20banked,=201=20siblin?= =?UTF-8?q?g(s)=20propagated=20=E2=80=94=20no?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .run/P36/delever/calibration.json | 372 +++++++++++----------- .run/P36/delever/ledger.jsonl | 5 + src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c | 3 +- src/ov_SC05_005/ov_SC05_005_jr_8017D898.c | 3 +- src/ov_SC06_006/ov_SC06_006_jr_8017DB90.c | 31 +- 5 files changed, 205 insertions(+), 209 deletions(-) diff --git a/.run/P36/delever/calibration.json b/.run/P36/delever/calibration.json index d236596d4..184bc1fec 100644 --- a/.run/P36/delever/calibration.json +++ b/.run/P36/delever/calibration.json @@ -1,7 +1,7 @@ { - "head": "c5786dac6", + "head": "65b0855c1", "stamp": "15956e4a96c4", - "generated": "2026-09-11 00:27", + "generated": "2026-09-11 00:35", "aliases": [ "main", "ov_SC03_014", @@ -21,207 +21,207 @@ "main": { "objects": 85, "identical": 85, - "seconds": 10.756, - "mean_s": 0.127 + "seconds": 10.965, + "mean_s": 0.129 }, "ov_SC03_014": { "objects": 32, "identical": 32, - "seconds": 6.919000000000001, - "mean_s": 0.216 + "seconds": 6.564000000000001, + "mean_s": 0.205 }, "ov_SC03_015": { "objects": 32, "identical": 32, - "seconds": 6.4350000000000005, - "mean_s": 0.201 + "seconds": 6.766, + "mean_s": 0.211 }, "ov_SC04_011": { "objects": 28, "identical": 28, - "seconds": 5.906000000000001, - "mean_s": 0.211 + "seconds": 6.163000000000001, + "mean_s": 0.22 } }, "per_object_seconds": { - "build/src/800.o": 1.069, - "build/src/800_b.o": 0.17, - "build/src/800_b_2.o": 0.446, - "build/src/800_b_o0a.o": 0.106, - "build/src/800_c.o": 0.328, - "build/src/800b2.o": 0.145, - "build/src/apicard1.o": 0.113, - "build/src/apicard2.o": 0.077, - "build/src/apicard3.o": 0.103, - "build/src/apicard4.o": 0.118, - "build/src/apicard5.o": 0.088, - "build/src/apicard6.o": 0.092, - "build/src/apicard7.o": 0.136, - "build/src/boot.o": 0.116, - "build/src/gap.o": 0.148, - "build/src/libapi1.o": 0.073, - "build/src/libapi2.o": 0.099, - "build/src/libc2_1.o": 0.094, - "build/src/libc2_2.o": 0.118, - "build/src/libcd1.o": 0.088, - "build/src/libcd2.o": 0.112, - "build/src/libetc.o": 0.081, - "build/src/libgpu.o": 0.095, - "build/src/libgpu2.o": 0.154, - "build/src/libgs1.o": 0.104, - "build/src/libgs2.o": 0.121, - "build/src/libgs3.o": 0.1, - "build/src/libgs4.o": 0.13, - "build/src/libgs5.o": 0.084, - "build/src/libgs6.o": 0.103, - "build/src/libgs7.o": 0.107, - "build/src/libgs8.o": 0.078, - "build/src/libgte1.o": 0.081, - "build/src/libgte10.o": 0.172, - "build/src/libgte11.o": 0.076, - "build/src/libgte12.o": 0.149, - "build/src/libgte13.o": 0.097, - "build/src/libgte14.o": 0.104, - "build/src/libgte15.o": 0.102, - "build/src/libgte16.o": 0.112, - "build/src/libgte17.o": 0.088, - "build/src/libgte18.o": 0.127, - "build/src/libgte19.o": 0.137, - "build/src/libgte2.o": 0.148, - "build/src/libgte20.o": 0.101, - "build/src/libgte21.o": 0.089, - "build/src/libgte22.o": 0.116, - "build/src/libgte23.o": 0.149, - "build/src/libgte24.o": 0.093, - "build/src/libgte25.o": 0.098, - "build/src/libgte26.o": 0.153, - "build/src/libgte27.o": 0.083, - "build/src/libgte28.o": 0.099, - "build/src/libgte29.o": 0.118, - "build/src/libgte3.o": 0.091, - "build/src/libgte30.o": 0.078, - "build/src/libgte4.o": 0.076, - "build/src/libgte5.o": 0.11, - "build/src/libgte6.o": 0.099, - "build/src/libgte7.o": 0.102, - "build/src/libgte8.o": 0.125, - "build/src/libgte9.o": 0.076, - "build/src/libmcrd1.o": 0.121, - "build/src/libmcrd2.o": 0.133, - "build/src/libpad1.o": 0.093, - "build/src/libpad2.o": 0.084, - "build/src/sgap.o": 0.147, - "build/src/sgap_2.o": 0.102, - "build/src/sgap_3.o": 0.081, - "build/src/sgap_4.o": 0.086, - "build/src/sgap_5.o": 0.106, - "build/src/sgap_6.o": 0.141, - "build/src/sgap_8.o": 0.09, - "build/src/snd1.o": 0.119, - "build/src/snd10.o": 0.103, - "build/src/snd11.o": 0.094, - "build/src/snd12.o": 0.166, - "build/src/snd2.o": 0.1, - "build/src/snd3.o": 0.079, - "build/src/snd4.o": 0.106, - "build/src/snd5.o": 0.093, - "build/src/snd6.o": 0.104, - "build/src/snd7.o": 0.148, - "build/src/snd8.o": 0.118, - "build/src/snd9.o": 0.097, - "build/src/ov_SC03_014/ov_SC03_014.o": 0.214, - "build/src/ov_SC03_014/ov_SC03_014_after.o": 0.737, - "build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o": 0.535, - "build/src/ov_SC03_014/ov_SC03_014_jr_80135888.o": 0.12, - "build/src/ov_SC03_014/ov_SC03_014_jr_80135A4C.o": 0.118, - "build/src/ov_SC03_014/ov_SC03_014_jr_80135D20.o": 0.148, - "build/src/ov_SC03_014/ov_SC03_014_jr_801380E0.o": 0.225, - "build/src/ov_SC03_014/ov_SC03_014_jr_8013C98C.o": 0.189, - "build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o": 0.104, - "build/src/ov_SC03_014/ov_SC03_014_jr_8013FFD8.o": 0.115, - "build/src/ov_SC03_014/ov_SC03_014_jr_80140608.o": 0.242, - "build/src/ov_SC03_014/ov_SC03_014_jr_8015444C.o": 0.102, - "build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o": 0.243, - "build/src/ov_SC03_014/ov_SC03_014_jr_801588CC.o": 0.161, - "build/src/ov_SC03_014/ov_SC03_014_jr_80159C84.o": 0.1, - "build/src/ov_SC03_014/ov_SC03_014_jr_8015A3C8.o": 0.122, - "build/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.o": 0.129, - "build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o": 0.661, - "build/src/ov_SC03_014/ov_SC03_014_jr_8016AB6C.o": 0.392, - "build/src/ov_SC03_014/ov_SC03_014_jr_80171B4C.o": 0.146, - "build/src/ov_SC03_014/ov_SC03_014_jr_801734BC.o": 0.27, - "build/src/ov_SC03_014/ov_SC03_014_jr_801789AC.o": 0.112, - "build/src/ov_SC03_014/ov_SC03_014_jr_80178D40.o": 0.151, - "build/src/ov_SC03_014/ov_SC03_014_jr_8017A4AC.o": 0.11, - "build/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.o": 0.249, - "build/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.o": 0.307, - "build/src/ov_SC03_014/ov_SC03_014_jr_80184440.o": 0.11, - "build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o": 0.369, - "build/src/ov_SC03_014/ov_SC03_014_o0b.o": 0.078, - "build/src/ov_SC03_014/ov_SC03_014_o0c.o": 0.118, - "build/src/ov_SC03_014/ov_SC03_014_o0d.o": 0.082, - "build/src/ov_SC03_014/ov_SC03_014_o0e.o": 0.16, - "build/src/ov_SC03_015/ov_SC03_015.o": 0.227, - "build/src/ov_SC03_015/ov_SC03_015_after.o": 0.626, - "build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o": 0.478, - "build/src/ov_SC03_015/ov_SC03_015_jr_80135888.o": 0.113, - "build/src/ov_SC03_015/ov_SC03_015_jr_80135A4C.o": 0.074, - "build/src/ov_SC03_015/ov_SC03_015_jr_80135D20.o": 0.164, - "build/src/ov_SC03_015/ov_SC03_015_jr_801380E0.o": 0.214, - "build/src/ov_SC03_015/ov_SC03_015_jr_8013C98C.o": 0.155, - "build/src/ov_SC03_015/ov_SC03_015_jr_8013F350.o": 0.119, - "build/src/ov_SC03_015/ov_SC03_015_jr_8013FFD8.o": 0.112, - "build/src/ov_SC03_015/ov_SC03_015_jr_80140608.o": 0.249, - "build/src/ov_SC03_015/ov_SC03_015_jr_8015444C.o": 0.129, - "build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o": 0.259, - "build/src/ov_SC03_015/ov_SC03_015_jr_801588CC.o": 0.149, - "build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o": 0.102, - "build/src/ov_SC03_015/ov_SC03_015_jr_8015A3C8.o": 0.107, - "build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o": 0.117, - "build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o": 0.624, - "build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o": 0.361, - "build/src/ov_SC03_015/ov_SC03_015_jr_80171B4C.o": 0.181, - "build/src/ov_SC03_015/ov_SC03_015_jr_801734BC.o": 0.255, - "build/src/ov_SC03_015/ov_SC03_015_jr_801789AC.o": 0.105, - "build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o": 0.17, - "build/src/ov_SC03_015/ov_SC03_015_jr_8017A4AC.o": 0.096, - "build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o": 0.219, - "build/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.o": 0.248, - "build/src/ov_SC03_015/ov_SC03_015_jr_80184440.o": 0.093, - "build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o": 0.335, - "build/src/ov_SC03_015/ov_SC03_015_o0b.o": 0.075, - "build/src/ov_SC03_015/ov_SC03_015_o0c.o": 0.102, - "build/src/ov_SC03_015/ov_SC03_015_o0d.o": 0.09, - "build/src/ov_SC03_015/ov_SC03_015_o0e.o": 0.087, - "build/src/ov_SC04_011/ov_SC04_011.o": 0.218, - "build/src/ov_SC04_011/ov_SC04_011_after.o": 0.628, - "build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o": 0.497, - "build/src/ov_SC04_011/ov_SC04_011_jr_80135888.o": 0.076, - "build/src/ov_SC04_011/ov_SC04_011_jr_80135A4C.o": 0.085, - "build/src/ov_SC04_011/ov_SC04_011_jr_80135D20.o": 0.169, - "build/src/ov_SC04_011/ov_SC04_011_jr_801380E0.o": 0.193, - "build/src/ov_SC04_011/ov_SC04_011_jr_8013C98C.o": 0.205, - "build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o": 0.093, - "build/src/ov_SC04_011/ov_SC04_011_jr_8013FFD8.o": 0.112, - "build/src/ov_SC04_011/ov_SC04_011_jr_80140608.o": 0.234, - "build/src/ov_SC04_011/ov_SC04_011_jr_8015444C.o": 0.125, - "build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o": 0.22, - "build/src/ov_SC04_011/ov_SC04_011_jr_801588CC.o": 0.112, - "build/src/ov_SC04_011/ov_SC04_011_jr_80159C84.o": 0.093, - "build/src/ov_SC04_011/ov_SC04_011_jr_8015A3C8.o": 0.095, - "build/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.o": 0.127, - "build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o": 0.537, - "build/src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.o": 0.305, + "build/src/800.o": 1.063, + "build/src/800_b.o": 0.142, + "build/src/800_b_2.o": 0.476, + "build/src/800_b_o0a.o": 0.119, + "build/src/800_c.o": 0.301, + "build/src/800b2.o": 0.137, + "build/src/apicard1.o": 0.123, + "build/src/apicard2.o": 0.104, + "build/src/apicard3.o": 0.112, + "build/src/apicard4.o": 0.087, + "build/src/apicard5.o": 0.101, + "build/src/apicard6.o": 0.077, + "build/src/apicard7.o": 0.075, + "build/src/boot.o": 0.163, + "build/src/gap.o": 0.147, + "build/src/libapi1.o": 0.109, + "build/src/libapi2.o": 0.085, + "build/src/libc2_1.o": 0.106, + "build/src/libc2_2.o": 0.086, + "build/src/libcd1.o": 0.101, + "build/src/libcd2.o": 0.088, + "build/src/libetc.o": 0.148, + "build/src/libgpu.o": 0.132, + "build/src/libgpu2.o": 0.144, + "build/src/libgs1.o": 0.095, + "build/src/libgs2.o": 0.077, + "build/src/libgs3.o": 0.095, + "build/src/libgs4.o": 0.092, + "build/src/libgs5.o": 0.085, + "build/src/libgs6.o": 0.106, + "build/src/libgs7.o": 0.091, + "build/src/libgs8.o": 0.086, + "build/src/libgte1.o": 0.083, + "build/src/libgte10.o": 0.099, + "build/src/libgte11.o": 0.088, + "build/src/libgte12.o": 0.114, + "build/src/libgte13.o": 0.131, + "build/src/libgte14.o": 0.166, + "build/src/libgte15.o": 0.132, + "build/src/libgte16.o": 0.174, + "build/src/libgte17.o": 0.1, + "build/src/libgte18.o": 0.077, + "build/src/libgte19.o": 0.079, + "build/src/libgte2.o": 0.098, + "build/src/libgte20.o": 0.09, + "build/src/libgte21.o": 0.131, + "build/src/libgte22.o": 0.083, + "build/src/libgte23.o": 0.104, + "build/src/libgte24.o": 0.088, + "build/src/libgte25.o": 0.086, + "build/src/libgte26.o": 0.112, + "build/src/libgte27.o": 0.133, + "build/src/libgte28.o": 0.134, + "build/src/libgte29.o": 0.129, + "build/src/libgte3.o": 0.124, + "build/src/libgte30.o": 0.086, + "build/src/libgte4.o": 0.144, + "build/src/libgte5.o": 0.097, + "build/src/libgte6.o": 0.127, + "build/src/libgte7.o": 0.087, + "build/src/libgte8.o": 0.099, + "build/src/libgte9.o": 0.102, + "build/src/libmcrd1.o": 0.122, + "build/src/libmcrd2.o": 0.132, + "build/src/libpad1.o": 0.083, + "build/src/libpad2.o": 0.087, + "build/src/sgap.o": 0.16, + "build/src/sgap_2.o": 0.129, + "build/src/sgap_3.o": 0.148, + "build/src/sgap_4.o": 0.168, + "build/src/sgap_5.o": 0.086, + "build/src/sgap_6.o": 0.077, + "build/src/sgap_8.o": 0.093, + "build/src/snd1.o": 0.079, + "build/src/snd10.o": 0.093, + "build/src/snd11.o": 0.095, + "build/src/snd12.o": 0.156, + "build/src/snd2.o": 0.139, + "build/src/snd3.o": 0.139, + "build/src/snd4.o": 0.117, + "build/src/snd5.o": 0.136, + "build/src/snd6.o": 0.151, + "build/src/snd7.o": 0.12, + "build/src/snd8.o": 0.078, + "build/src/snd9.o": 0.127, + "build/src/ov_SC03_014/ov_SC03_014.o": 0.21, + "build/src/ov_SC03_014/ov_SC03_014_after.o": 0.654, + "build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o": 0.525, + "build/src/ov_SC03_014/ov_SC03_014_jr_80135888.o": 0.071, + "build/src/ov_SC03_014/ov_SC03_014_jr_80135A4C.o": 0.093, + "build/src/ov_SC03_014/ov_SC03_014_jr_80135D20.o": 0.223, + "build/src/ov_SC03_014/ov_SC03_014_jr_801380E0.o": 0.234, + "build/src/ov_SC03_014/ov_SC03_014_jr_8013C98C.o": 0.194, + "build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o": 0.151, + "build/src/ov_SC03_014/ov_SC03_014_jr_8013FFD8.o": 0.095, + "build/src/ov_SC03_014/ov_SC03_014_jr_80140608.o": 0.211, + "build/src/ov_SC03_014/ov_SC03_014_jr_8015444C.o": 0.115, + "build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o": 0.229, + "build/src/ov_SC03_014/ov_SC03_014_jr_801588CC.o": 0.147, + "build/src/ov_SC03_014/ov_SC03_014_jr_80159C84.o": 0.086, + "build/src/ov_SC03_014/ov_SC03_014_jr_8015A3C8.o": 0.124, + "build/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.o": 0.144, + "build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o": 0.582, + "build/src/ov_SC03_014/ov_SC03_014_jr_8016AB6C.o": 0.325, + "build/src/ov_SC03_014/ov_SC03_014_jr_80171B4C.o": 0.158, + "build/src/ov_SC03_014/ov_SC03_014_jr_801734BC.o": 0.277, + "build/src/ov_SC03_014/ov_SC03_014_jr_801789AC.o": 0.131, + "build/src/ov_SC03_014/ov_SC03_014_jr_80178D40.o": 0.146, + "build/src/ov_SC03_014/ov_SC03_014_jr_8017A4AC.o": 0.098, + "build/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.o": 0.234, + "build/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.o": 0.256, + "build/src/ov_SC03_014/ov_SC03_014_jr_80184440.o": 0.071, + "build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o": 0.351, + "build/src/ov_SC03_014/ov_SC03_014_o0b.o": 0.08, + "build/src/ov_SC03_014/ov_SC03_014_o0c.o": 0.124, + "build/src/ov_SC03_014/ov_SC03_014_o0d.o": 0.131, + "build/src/ov_SC03_014/ov_SC03_014_o0e.o": 0.094, + "build/src/ov_SC03_015/ov_SC03_015.o": 0.144, + "build/src/ov_SC03_015/ov_SC03_015_after.o": 0.802, + "build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o": 0.588, + "build/src/ov_SC03_015/ov_SC03_015_jr_80135888.o": 0.077, + "build/src/ov_SC03_015/ov_SC03_015_jr_80135A4C.o": 0.093, + "build/src/ov_SC03_015/ov_SC03_015_jr_80135D20.o": 0.193, + "build/src/ov_SC03_015/ov_SC03_015_jr_801380E0.o": 0.193, + "build/src/ov_SC03_015/ov_SC03_015_jr_8013C98C.o": 0.154, + "build/src/ov_SC03_015/ov_SC03_015_jr_8013F350.o": 0.128, + "build/src/ov_SC03_015/ov_SC03_015_jr_8013FFD8.o": 0.101, + "build/src/ov_SC03_015/ov_SC03_015_jr_80140608.o": 0.202, + "build/src/ov_SC03_015/ov_SC03_015_jr_8015444C.o": 0.086, + "build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o": 0.192, + "build/src/ov_SC03_015/ov_SC03_015_jr_801588CC.o": 0.118, + "build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o": 0.103, + "build/src/ov_SC03_015/ov_SC03_015_jr_8015A3C8.o": 0.15, + "build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o": 0.126, + "build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o": 0.658, + "build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o": 0.335, + "build/src/ov_SC03_015/ov_SC03_015_jr_80171B4C.o": 0.167, + "build/src/ov_SC03_015/ov_SC03_015_jr_801734BC.o": 0.316, + "build/src/ov_SC03_015/ov_SC03_015_jr_801789AC.o": 0.113, + "build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o": 0.147, + "build/src/ov_SC03_015/ov_SC03_015_jr_8017A4AC.o": 0.131, + "build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o": 0.244, + "build/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.o": 0.348, + "build/src/ov_SC03_015/ov_SC03_015_jr_80184440.o": 0.072, + "build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o": 0.378, + "build/src/ov_SC03_015/ov_SC03_015_o0b.o": 0.087, + "build/src/ov_SC03_015/ov_SC03_015_o0c.o": 0.105, + "build/src/ov_SC03_015/ov_SC03_015_o0d.o": 0.119, + "build/src/ov_SC03_015/ov_SC03_015_o0e.o": 0.096, + "build/src/ov_SC04_011/ov_SC04_011.o": 0.216, + "build/src/ov_SC04_011/ov_SC04_011_after.o": 0.602, + "build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o": 0.532, + "build/src/ov_SC04_011/ov_SC04_011_jr_80135888.o": 0.106, + "build/src/ov_SC04_011/ov_SC04_011_jr_80135A4C.o": 0.07, + "build/src/ov_SC04_011/ov_SC04_011_jr_80135D20.o": 0.156, + "build/src/ov_SC04_011/ov_SC04_011_jr_801380E0.o": 0.261, + "build/src/ov_SC04_011/ov_SC04_011_jr_8013C98C.o": 0.177, + "build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o": 0.09, + "build/src/ov_SC04_011/ov_SC04_011_jr_8013FFD8.o": 0.14, + "build/src/ov_SC04_011/ov_SC04_011_jr_80140608.o": 0.23, + "build/src/ov_SC04_011/ov_SC04_011_jr_8015444C.o": 0.14, + "build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o": 0.237, + "build/src/ov_SC04_011/ov_SC04_011_jr_801588CC.o": 0.113, + "build/src/ov_SC04_011/ov_SC04_011_jr_80159C84.o": 0.086, + "build/src/ov_SC04_011/ov_SC04_011_jr_8015A3C8.o": 0.113, + "build/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.o": 0.157, + "build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o": 0.547, + "build/src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.o": 0.337, "build/src/ov_SC04_011/ov_SC04_011_jr_80171B4C.o": 0.146, - "build/src/ov_SC04_011/ov_SC04_011_jr_801734BC.o": 0.261, - "build/src/ov_SC04_011/ov_SC04_011_jr_801789AC.o": 0.095, + "build/src/ov_SC04_011/ov_SC04_011_jr_801734BC.o": 0.267, + "build/src/ov_SC04_011/ov_SC04_011_jr_801789AC.o": 0.104, "build/src/ov_SC04_011/ov_SC04_011_jr_80178D40.o": 0.152, - "build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.098, - "build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.138, - "build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.722, - "build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.082, - "build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.088 + "build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.124, + "build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.149, + "build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.741, + "build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.081, + "build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.089 }, "ok": true, - "seconds": 3.7 + "seconds": 3.9 } diff --git a/.run/P36/delever/ledger.jsonl b/.run/P36/delever/ledger.jsonl index 5e07fb6dc..518df060a 100644 --- a/.run/P36/delever/ledger.jsonl +++ b/.run/P36/delever/ledger.jsonl @@ -29360,3 +29360,8 @@ {"ts": "2026-09-11 00:29:34", "label": "s104_part3", "rung": "E", "calib": {"head": "c5786dac6", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c", "fn": "func_8017F4FC", "addr": 2149053692, "aliases": null, "header": false, "includers": 0, "nhash_before": "6f54eef895515ae932c9f5b1721fb463a4eb07ec", "nhash_after": "689b9a686cb704a164991271db2c0c8919f834da", "source": "delever_regen R18 bystander @34->37", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.304, "objects": ["build/src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.o"], "before_text": "void func_8017F4FC(void *a0) {\n s32 s0 = (s32)a0;\n s32 p20a;\n\n *(s16 *)(s0 + 0x76) = 0;\n\n if (*(s32 *)(s0 + 0xE4) == 0) {\n p20a = *(s32 *)(s0 + 0x20);\n *(u8 *)(s0 + 0xC1) = 0;\n *(s16 *)(s0 + 0x2) = 1;\n *(s32 *)(p20a + 0x4) |= 0x80000000;\n\n {\n s32 p20b = *(s32 *)(s0 + 0x20);\n *(s16 *)(s0 + 0x5E) = 0;\n *(s16 *)(s0 + 0x5C) = 0;\n *(s16 *)(p20b + 0x14) = 0;\n *(s16 *)(p20b + 0x12) = 0;\n *(s16 *)(p20b + 0x10) = 0;\n }\n\n {\n s32 p20c = *(s32 *)(s0 + 0x20);\n *(u16 *)(p20c + 0x1C) = 0x1000;\n *(u16 *)(p20c + 0x1A) = 0x1000;\n *(u16 *)(p20c + 0x18) = 0x1000;\n }\n\n {\n register u16 t88 __asm__(\"$2\") = *(u16 *)(s0 + 0x88); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register u16 t8A __asm__(\"$3\") = *(u16 *)(s0 + 0x8A); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n *(s16 *)(s0 + 0xDE) = 0;\n *(s16 *)(s0 + 0xAA) = 0;\n *(u16 *)(s0 + 0xE) = *(u16 *)(s0 + 0x8C);\n *(u16 *)(s0 + 0x6) = t88;\n *(u16 *)(s0 + 0xA) = t8A;\n func_8012A828(s0, (s32)&D_801A410C);\n }\n func_8012B2CC(s0);\n func_8002A04C(s0);\n\n if (*(s32 *)(s0 + 0xCC) != 0) {\n func_801439C0(*(s32 *)(s0 + 0xCC));\n }\n } else {\n s32 p68;\n\n if ((*(s16 *)(s0 + 0x70) & 0x8000) == 0) {\n p68 = *(s32 *)(s0 + 0x68);\n if (p68 != 0) {\n if (*(s16 *)(s0 + 0x72) & 0x8000) {\n *(u16 *)(p68 + 0xA) = *(u16 *)(p68 + 0xA) & 0x7FFF;\n }\n }\n }\n func_8012C218((void *)s0);\n }\n}\n", "after_text": "void func_8017F4FC(void *a0) {\n s32 s0 = (s32)a0;\n s32 p20a;\n\n *(s16 *)(s0 + 0x76) = 0;\n\n if (*(s32 *)(s0 + 0xE4) == 0) {\n p20a = *(s32 *)(s0 + 0x20);\n *(u8 *)(s0 + 0xC1) = 0;\n *(s16 *)(s0 + 0x2) = 1;\n *(s32 *)(p20a + 0x4) |= 0x80000000;\n\n {\n s32 p20b = *(s32 *)(s0 + 0x20);\n *(s16 *)(s0 + 0x5E) = 0;\n *(s16 *)(s0 + 0x5C) = 0;\n *(s16 *)(p20b + 0x14) = 0;\n *(s16 *)(p20b + 0x12) = 0;\n *(s16 *)(p20b + 0x10) = 0;\n }\n\n {\n s32 p20c = *(s32 *)(s0 + 0x20);\n *(u16 *)(p20c + 0x1C) = 0x1000;\n *(u16 *)(p20c + 0x1A) = 0x1000;\n *(u16 *)(p20c + 0x18) = 0x1000;\n }\n\n {\n u16 t88 = *(u16 *)(s0 + 0x88);\n u16 t8A = *(u16 *)(s0 + 0x8A);\n *(s16 *)(s0 + 0xDE) = 0;\n *(s16 *)(s0 + 0xAA) = 0;\n *(u16 *)(s0 + 0x6) = t88;\n *(u16 *)(s0 + 0xA) = t8A;\n *(u16 *)(s0 + 0xE) = *(u16 *)(s0 + 0x8C);\n func_8012A828(s0, (s32)&D_801A410C);\n }\n func_8012B2CC(s0);\n func_8002A04C(s0);\n\n if (*(s32 *)(s0 + 0xCC) != 0) {\n func_801439C0(*(s32 *)(s0 + 0xCC));\n }\n } else {\n s32 p68;\n\n if ((*(s16 *)(s0 + 0x70) & 0x8000) == 0) {\n p68 = *(s32 *)(s0 + 0x68);\n if (p68 != 0) {\n if (*(s16 *)(s0 + 0x72) & 0x8000) {\n *(u16 *)(p68 + 0xA) = *(u16 *)(p68 + 0xA) & 0x7FFF;\n }\n }\n }\n func_8012C218((void *)s0);\n }\n}\n"} {"ts": "2026-09-11 00:29:44", "label": "s104_part3", "rung": "E", "calib": {"head": "c5786dac6", "stamp": "15956e4a96c4"}, "tu": "src/800.c", "fn": "func_80020DA4", "addr": 2147618212, "aliases": null, "header": false, "includers": 0, "nhash_before": "13e7efd861982042ce5742382c2f8f7f7570312b", "nhash_after": "a8c50e1cadade326eb90b2f012730fe85cafd19f", "source": "delever_regen R7 do-while @30", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.8, "objects": ["build/src/800.o"], "before_text": "void func_80020DA4(s32 a0, s32 a1) {\n u16 *src = (u16 *)a0;\n s16 *dst = (s16 *)a1;\n s32 tbl = (s32)D_800636D4;\n\n s32 p0, p1, p2;\n s32 e0;\n s32 e1;\n s32 addr1, addr2;\n s32 hi0, lo0, hi1, lo1, hi2, lo2;\n s32 m1, m2, m3, m4, m5, m6, m7, m8, m9, m10, m11, m12, m13;\n s32 p_ab, p_ac, p1v;\n s32 frame_pad[3]; (void)&frame_pad;\n\n p0 = src[0] & 0xFFF;\n e0 = *(s32 *)((p0 << 2) + tbl);\n p2 = src[2] & 0xFFF;\n addr2 = (p2 << 2) + tbl;\n hi0 = e0 >> 16;\n lo2 = *(s16 *)addr2;\n m1 = hi0 * lo2;\n hi2 = *(s16 *)(addr2 + 2);\n m2 = hi0 * hi2;\n p1 = src[1] & 0xFFF;\n __asm__(\"\" : \"=r\"(p1) : \"0\"(p1)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n addr1 = (p1 << 2) + tbl;\n lo0 = (s16)e0;\n lo1 = *(s16 *)addr1;\n m3 = lo0 * lo1;\n e1 = *(s32 *)addr1;\n hi1 = e1 >> 16;\n m4 = hi2 * hi1;\n p_ab = m3 >> 12;\n m5 = p_ab * hi2;\n p_ac = m2 >> 12;\n m6 = p_ac * lo1;\n m7 = lo0 * lo2;\n m8 = lo2 * hi1;\n m9 = p_ab * lo2;\n m10 = hi1 * lo0;\n m11 = hi1 * hi0;\n p1v = m1 >> 12;\n m12 = p1v * lo1;\n __asm__(\"\" : \"=r\"(e1) : \"0\"(e1)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n dst[6] = -e1;\n dst[0] = m4 >> 12;\n dst[3] = m8 >> 12;\n dst[7] = m10 >> 12;\n m13 = lo0 * hi2;\n dst[8] = m11 >> 12;\n dst[1] = (m5 >> 12) - p1v;\n dst[2] = (m6 >> 12) + (m7 >> 12);\n dst[4] = (m9 >> 12) + p_ac;\n dst[5] = (m12 >> 12) - (m13 >> 12);\n}\n", "after_text": "void func_80020DA4(s32 a0, s32 a1) {\n u16 *src = (u16 *)a0;\n s16 *dst = (s16 *)a1;\n s32 tbl = (s32)D_800636D4;\n\n s32 p0, p1, p2;\n s32 e0;\n s32 e1;\n s32 addr1, addr2;\n s32 hi0, lo0, hi1, lo1, hi2, lo2;\n s32 m1, m2, m3, m4, m5, m6, m7, m8, m9, m10, m11, m12, m13;\n s32 p_ab, p_ac, p1v;\n s32 frame_pad[3]; (void)&frame_pad;\n\n p0 = src[0] & 0xFFF;\n e0 = *(s32 *)((p0 << 2) + tbl);\n p2 = src[2] & 0xFFF;\n addr2 = (p2 << 2) + tbl;\n hi0 = e0 >> 16;\n lo2 = *(s16 *)addr2;\n m1 = hi0 * lo2;\n hi2 = *(s16 *)(addr2 + 2);\n m2 = hi0 * hi2;\n p1 = src[1] & 0xFFF;\n addr1 = (p1 << 2) + tbl;\n lo0 = (s16)e0;\n lo1 = *(s16 *)addr1;\n m3 = lo0 * lo1;\n e1 = *(s32 *)addr1;\n do { hi1 = e1 >> 16; } while (0); // !FAKE: do-while \u2014 a LOOP-note scheduling barrier (sched.c:2058-2074; P36 R7)\n m4 = hi2 * hi1;\n p_ab = m3 >> 12;\n m5 = p_ab * hi2;\n p_ac = m2 >> 12;\n m6 = p_ac * lo1;\n m7 = lo0 * lo2;\n m8 = lo2 * hi1;\n m9 = p_ab * lo2;\n m10 = hi1 * lo0;\n m11 = hi1 * hi0;\n p1v = m1 >> 12;\n m12 = p1v * lo1;\n dst[6] = -e1;\n dst[0] = m4 >> 12;\n dst[3] = m8 >> 12;\n dst[7] = m10 >> 12;\n m13 = lo0 * hi2;\n dst[8] = m11 >> 12;\n dst[1] = (m5 >> 12) - p1v;\n dst[2] = (m6 >> 12) + (m7 >> 12);\n dst[4] = (m9 >> 12) + p_ac;\n dst[5] = (m12 >> 12) - (m13 >> 12);\n}\n"} {"ts": "2026-09-11 00:31:49", "label": "s104_part3", "rung": "E", "calib": {"head": "c5786dac6", "stamp": "15956e4a96c4"}, "tu": "src/shared/ov/func_80169A4C.h", "fn": "func_80169A4C", "addr": 2148964940, "aliases": null, "header": true, "includers": 136, "nhash_before": "2d4362e1f7ae619b90da288fbea9eed673478abc", "nhash_after": "3f927a2b9f52ec6c6d564fa3faed57f5ca351745", "source": "delever_regen R18 bystander @19->14", "verdict": "LEVER-FREE", "sites": [], "compiles": 141, "seconds": 71.031, "objects": ["build/src/ov_MAIN_012/ov_MAIN_012_jr_8015A3C8.o", "build/src/ov_SC01_000/ov_SC01_000_jr_8015C32C.o", "build/src/ov_SC01_001/ov_SC01_001_jr_8015C32C.o", "build/src/ov_SC01_004/ov_SC01_004_jr_8015C32C.o", "build/src/ov_SC01_005/ov_SC01_005_jr_8015C32C.o", "build/src/ov_SC01_006/ov_SC01_006_jr_8015C32C.o", "build/src/ov_SC01_008/ov_SC01_008_jr_8015C32C.o", "build/src/ov_SC01_009/ov_SC01_009_jr_8015C32C.o", "build/src/ov_SC01_074/ov_SC01_074_jr_8015C32C.o", "build/src/ov_SC01_077/ov_SC01_077_jr_8015C32C.o", "build/src/ov_SC01_080/ov_SC01_080_jr_8015C32C.o", "build/src/ov_SC01_084/ov_SC01_084_jr_8015C32C.o", "build/src/ov_SC02_000/ov_SC02_000_jr_8015C32C.o", "build/src/ov_SC02_003/ov_SC02_003_jr_8015C32C.o", "build/src/ov_SC02_004/ov_SC02_004_jr_8015C32C.o", "build/src/ov_SC02_005/ov_SC02_005_jr_8015C32C.o", "build/src/ov_SC02_011/ov_SC02_011_jr_8015C32C.o", "build/src/ov_SC02_015/ov_SC02_015_jr_8015C32C.o", "build/src/ov_SC02_016/ov_SC02_016_jr_8015C32C.o", "build/src/ov_SC02_017/ov_SC02_017_jr_8015C32C.o", "build/src/ov_SC02_021/ov_SC02_021_jr_8015C32C.o", "build/src/ov_SC02_026/ov_SC02_026_jr_8015C32C.o", "build/src/ov_SC02_027/ov_SC02_027_jr_8015C32C.o", "build/src/ov_SC02_028/ov_SC02_028_jr_8015C32C.o", "build/src/ov_SC02_031/ov_SC02_031_jr_8015C32C.o", "build/src/ov_SC02_035/ov_SC02_035_jr_8015C32C.o", "build/src/ov_SC02_037/ov_SC02_037_jr_8015A3C8.o", "build/src/ov_SC02_039/ov_SC02_039_jr_8015C32C.o", "build/src/ov_SC02_041/ov_SC02_041_jr_8015C32C.o", "build/src/ov_SC03_001/ov_SC03_001_jr_8015C32C.o", "build/src/ov_SC03_002/ov_SC03_002_jr_8015C32C.o", "build/src/ov_SC03_003/ov_SC03_003_jr_8015C32C.o", "build/src/ov_SC03_006/ov_SC03_006_jr_8015C32C.o", "build/src/ov_SC03_007/ov_SC03_007_jr_8015C32C.o", "build/src/ov_SC03_010/ov_SC03_010_jr_8015C32C.o", "build/src/ov_SC03_011/ov_SC03_011_jr_8015C32C.o", "build/src/ov_SC03_012/ov_SC03_012_jr_8015C32C.o", "build/src/ov_SC03_013/ov_SC03_013_jr_8015C32C.o", "build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o", "build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o", "build/src/ov_SC03_023/ov_SC03_023_jr_8015C32C.o", "build/src/ov_SC03_024/ov_SC03_024_jr_8015C32C.o", "build/src/ov_SC03_028/ov_SC03_028_jr_8015C32C.o", "build/src/ov_SC03_029/ov_SC03_029_jr_8015C32C.o", "build/src/ov_SC03_030/ov_SC03_030_jr_8015C32C.o", "build/src/ov_SC03_031/ov_SC03_031_jr_8015C32C.o", "build/src/ov_SC03_089/ov_SC03_089_jr_8015C32C.o", "build/src/ov_SC03_090/ov_SC03_090_jr_8015C32C.o", "build/src/ov_SC03_091/ov_SC03_091_jr_8015C32C.o", "build/src/ov_SC03_092/ov_SC03_092_jr_8015C32C.o", "build/src/ov_SC03_093/ov_SC03_093_jr_8015C32C.o", "build/src/ov_SC03_094/ov_SC03_094_jr_8015C32C.o", "build/src/ov_SC03_095/ov_SC03_095_jr_8015C32C.o", "build/src/ov_SC03_096/ov_SC03_096_jr_8015C32C.o", "build/src/ov_SC03_097/ov_SC03_097_jr_8015C32C.o", "build/src/ov_SC03_098/ov_SC03_098_jr_8015C32C.o", "build/src/ov_SC03_099/ov_SC03_099_jr_8015C32C.o", "build/src/ov_SC03_100/ov_SC03_100_jr_8015C32C.o", "build/src/ov_SC03_101/ov_SC03_101_jr_8015C32C.o", "build/src/ov_SC03_102/ov_SC03_102_jr_8015C32C.o", "build/src/ov_SC03_103/ov_SC03_103_jr_8015C32C.o", "build/src/ov_SC03_104/ov_SC03_104_jr_8015C32C.o", "build/src/ov_SC03_105/ov_SC03_105_jr_8015C32C.o", "build/src/ov_SC03_107/ov_SC03_107_jr_8015A3C8.o", "build/src/ov_SC03_108/ov_SC03_108_jr_8015C32C.o", "build/src/ov_SC03_109/ov_SC03_109_jr_8015C32C.o", "build/src/ov_SC03_110/ov_SC03_110_jr_8015C32C.o", "build/src/ov_SC03_111/ov_SC03_111_jr_8015C32C.o", "build/src/ov_SC03_112/ov_SC03_112_jr_8015C32C.o", "build/src/ov_SC03_113/ov_SC03_113_jr_8015C32C.o", "build/src/ov_SC03_114/ov_SC03_114_jr_8015C32C.o", "build/src/ov_SC03_115/ov_SC03_115_jr_8015C32C.o", "build/src/ov_SC03_116/ov_SC03_116_jr_8015C32C.o", "build/src/ov_SC03_117/ov_SC03_117_jr_8015C32C.o", "build/src/ov_SC03_118/ov_SC03_118_jr_8015C32C.o", "build/src/ov_SC03_119/ov_SC03_119_jr_8015C32C.o", "build/src/ov_SC03_121/ov_SC03_121_jr_8015C32C.o", "build/src/ov_SC03_124/ov_SC03_124_jr_8015C32C.o", "build/src/ov_SC03_125/ov_SC03_125_jr_8015C32C.o", "build/src/ov_SC03_126/ov_SC03_126_jr_8015C32C.o", "build/src/ov_SC04_000/ov_SC04_000_jr_8015C32C.o", "build/src/ov_SC04_002/ov_SC04_002_jr_8015C32C.o", "build/src/ov_SC04_003/ov_SC04_003_jr_8015C32C.o", "build/src/ov_SC04_004/ov_SC04_004_jr_8015C32C.o", "build/src/ov_SC04_005/ov_SC04_005_jr_8015C32C.o", "build/src/ov_SC04_006/ov_SC04_006_jr_8015C32C.o", "build/src/ov_SC04_007/ov_SC04_007_jr_8015C32C.o", "build/src/ov_SC04_008/ov_SC04_008_jr_8015C32C.o", "build/src/ov_SC04_009/ov_SC04_009_jr_8015C32C.o", "build/src/ov_SC04_010/ov_SC04_010_jr_8015C32C.o", "build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o", "build/src/ov_SC04_012/ov_SC04_012_jr_8015C32C.o", "build/src/ov_SC04_015/ov_SC04_015_jr_8015C32C.o", "build/src/ov_SC04_016/ov_SC04_016_jr_8015C32C.o", "build/src/ov_SC04_018/ov_SC04_018_jr_8015C32C.o", "build/src/ov_SC04_019/ov_SC04_019_jr_8015C32C.o", "build/src/ov_SC04_020/ov_SC04_020_jr_8015C32C.o", "build/src/ov_SC04_021/ov_SC04_021_jr_8015C32C.o", "build/src/ov_SC05_000/ov_SC05_000_jr_8015C32C.o", "build/src/ov_SC05_001/ov_SC05_001_jr_8015C32C.o", "build/src/ov_SC05_002/ov_SC05_002_jr_8015C32C.o", "build/src/ov_SC05_003/ov_SC05_003_jr_8015C32C.o", "build/src/ov_SC05_004/ov_SC05_004_jr_8015C32C.o", "build/src/ov_SC05_005/ov_SC05_005_jr_8015C32C.o", "build/src/ov_SC05_006/ov_SC05_006_jr_8015C32C.o", "build/src/ov_SC05_007/ov_SC05_007_jr_8015C32C.o", "build/src/ov_SC05_008/ov_SC05_008_jr_8015C32C.o", "build/src/ov_SC05_009/ov_SC05_009_jr_8015C32C.o", "build/src/ov_SC05_010/ov_SC05_010_jr_8015C32C.o", "build/src/ov_SC05_011/ov_SC05_011_jr_8015C32C.o", "build/src/ov_SC05_017/ov_SC05_017_jr_8015C32C.o", "build/src/ov_SC05_018/ov_SC05_018_jr_8015C32C.o", "build/src/ov_SC05_019/ov_SC05_019_jr_8015C32C.o", "build/src/ov_SC06_000/ov_SC06_000_jr_8015C32C.o", "build/src/ov_SC06_006/ov_SC06_006_jr_8015C32C.o", "build/src/ov_SC06_008/ov_SC06_008_jr_8015C32C.o", "build/src/ov_SC06_010/ov_SC06_010_jr_8015C32C.o", "build/src/ov_SC06_011/ov_SC06_011_jr_8015C32C.o", "build/src/ov_SC06_013/ov_SC06_013_jr_8015C32C.o", "build/src/ov_SC06_014/ov_SC06_014_jr_8015C32C.o", "build/src/ov_SC06_015/ov_SC06_015_jr_8015C32C.o", "build/src/ov_SC06_016/ov_SC06_016_jr_8015C32C.o", "build/src/ov_SC06_018/ov_SC06_018_jr_8015C32C.o", "build/src/ov_SC06_020/ov_SC06_020_jr_8015C32C.o", "build/src/ov_SC06_022/ov_SC06_022_jr_8015C32C.o", "build/src/ov_SC06_024/ov_SC06_024_jr_8015C32C.o", "build/src/ov_SC06_025/ov_SC06_025_jr_8015C32C.o", "build/src/ov_SC06_027/ov_SC06_027_jr_8015C32C.o", "build/src/ov_SC06_029/ov_SC06_029_jr_8015C32C.o", "build/src/ov_SC06_030/ov_SC06_030_jr_8015C32C.o", "build/src/ov_SC06_032/ov_SC06_032_jr_8015C32C.o", "build/src/ov_SC06_033/ov_SC06_033_jr_8015C32C.o", "build/src/ov_SC07_000/ov_SC07_000_jr_8015C32C.o", "build/src/ov_SC07_001/ov_SC07_001_jr_8015C32C.o", "build/src/ov_SC07_002/ov_SC07_002_jr_8015C32C.o", "build/src/ov_SC07_006/ov_SC07_006_jr_8015C32C.o", "build/src/ov_SC07_007/ov_SC07_007_jr_8015C32C.o", "build/src/ov_SC07_008/ov_SC07_008_jr_8015C32C.o", "build/src/ov_SC07_009/ov_SC07_009_jr_8015C32C.o", "build/src/ov_SC07_010/ov_SC07_010_jr_8015C32C.o", "build/src/ov_SC07_011/ov_SC07_011_jr_8015C32C.o"], "before_text": "s32 func_80169A4C(s32 a0, s32 a1) {\n void *arg0 = (void *)a0;\n void *arg1 = (void *)a1;\n u8 buf[0x5C]; /* spans $sp+0x10 .. $sp+0x6B */\n u8 *p = buf + 0x38; /* $sp+0x48, passed to first 3 calls */\n u8 v1;\n s8 v0;\n u16 t2c;\n u8 *q; /* $sp+0x68, first call a0 */\n s32 m5; /* -5 -> $v1 */\n s32 p5; /* 5 -> $v0 */\n q = buf + 0x58;\n __asm__(\"\" : : \"r\"(q)); // !FAKE: keepalive \u2014 NEEDED DIFFERS (P36 rung B headers1)\n m5 = -5;\n __asm__(\"\" : : \"r\"(m5)); // !FAKE: keepalive \u2014 NEEDED DIFFERS (P36 rung B headers1)\n p5 = 5;\n *(s16 *)(buf + 0x18) = p5; /* 0x28 */\n *(s16 *)(buf + 0x10) = p5; /* 0x20 */\n *(s16 *)(buf + 0x1a) = p5; /* 0x2A */\n *(s16 *)(buf + 0x0a) = p5; /* 0x1A */\n *(s16 *)(buf + 0x08) = m5; /* 0x18 */\n *(s16 *)(buf + 0x00) = m5; /* 0x10 */\n *(s16 *)(buf + 0x12) = m5; /* 0x22 */\n *(s16 *)(buf + 0x02) = m5; /* 0x12 */\n *(s16 *)(buf + 0x1c) = 0; /* 0x2C */\n *(s16 *)(buf + 0x14) = 0; /* 0x24 */\n *(s16 *)(buf + 0x0c) = 0; /* 0x1C */\n *(s16 *)(buf + 0x04) = 0; /* 0x14 */\n v1 = *(u8 *)((u8 *)arg0 + 0x30);\n *(s32 *)(buf + 0x30) = 0x50000000; /* 0x40 */\n v0 = (s8)(v1 >> 2);\n *(u8 *)(buf + 0x2e) = v1; /* 0x3E */\n *(u8 *)(buf + 0x2a) = v1; /* 0x3A */\n *(u8 *)(buf + 0x26) = v1; /* 0x36 */\n *(u8 *)(buf + 0x22) = v1; /* 0x32 */\n *(s8 *)(buf + 0x2d) = v0; /* 0x3D */\n *(s8 *)(buf + 0x29) = v0; /* 0x39 */\n *(s8 *)(buf + 0x25) = v0; /* 0x35 */\n *(s8 *)(buf + 0x21) = v0; /* 0x31 */\n *(s8 *)(buf + 0x2c) = v0; /* 0x3C */\n *(s8 *)(buf + 0x28) = v0; /* 0x38 */\n *(s8 *)(buf + 0x24) = v0; /* 0x34 */\n *(s8 *)(buf + 0x20) = v0; /* 0x30 */\n t2c = *(u16 *)((u8 *)arg0 + 0x2c);\n *(u16 *)(q + 0x02) = t2c; /* 0x6A */\n *(u16 *)(q + 0x00) = t2c; /* 0x68 */\n func_80017DC4(q, p);\n func_80048EAC(arg1, p);\n *(s32 *)(buf + 0x4c) = (s32)*(s16 *)((u8 *)arg0 + 6); /* 0x5C */\n *(s32 *)(buf + 0x50) = (s32)*(s16 *)((u8 *)arg0 + 0xa); /* 0x60 */\n *(s32 *)(buf + 0x54) = (s32)*(s16 *)((u8 *)arg0 + 0xe); /* 0x64 */\n func_80017758(buf + 0x00, p);\n *(s16 *)(buf + 0x00) = -7; /* 0x10 */\n *(s16 *)(buf + 0x10) = 0; /* 0x20 */\n *(s16 *)(buf + 0x08) = 0; /* 0x18 */\n *(s16 *)(buf + 0x18) = 7; /* 0x28 */\n *(s16 *)(buf + 0x1a) = 0; /* 0x2A */\n *(s16 *)(buf + 0x02) = 0; /* 0x12 */\n *(s16 *)(buf + 0x0a) = 7; /* 0x1A */\n *(s16 *)(buf + 0x12) = -7; /* 0x22 */\n func_80017758(buf + 0x00, p);\n}\n", "after_text": "s32 func_80169A4C(s32 a0, s32 a1) {\n void *arg0 = (void *)a0;\n void *arg1 = (void *)a1;\n u8 buf[0x5C]; /* spans $sp+0x10 .. $sp+0x6B */\n u8 *p = buf + 0x38; /* $sp+0x48, passed to first 3 calls */\n u8 v1;\n s8 v0;\n u16 t2c;\n u8 *q; /* $sp+0x68, first call a0 */\n s32 m5; /* -5 -> $v1 */\n s32 p5; /* 5 -> $v0 */\n q = buf + 0x58;\n m5 = -5;\n *(s16 *)(buf + 0x08) = m5; /* 0x18 */\n p5 = 5;\n *(s16 *)(buf + 0x18) = p5; /* 0x28 */\n *(s16 *)(buf + 0x10) = p5; /* 0x20 */\n *(s16 *)(buf + 0x1a) = p5; /* 0x2A */\n *(s16 *)(buf + 0x0a) = p5; /* 0x1A */\n *(s16 *)(buf + 0x00) = m5; /* 0x10 */\n *(s16 *)(buf + 0x12) = m5; /* 0x22 */\n *(s16 *)(buf + 0x02) = m5; /* 0x12 */\n *(s16 *)(buf + 0x1c) = 0; /* 0x2C */\n *(s16 *)(buf + 0x14) = 0; /* 0x24 */\n *(s16 *)(buf + 0x0c) = 0; /* 0x1C */\n *(s16 *)(buf + 0x04) = 0; /* 0x14 */\n v1 = *(u8 *)((u8 *)arg0 + 0x30);\n *(s32 *)(buf + 0x30) = 0x50000000; /* 0x40 */\n v0 = (s8)(v1 >> 2);\n *(u8 *)(buf + 0x2e) = v1; /* 0x3E */\n *(u8 *)(buf + 0x2a) = v1; /* 0x3A */\n *(u8 *)(buf + 0x26) = v1; /* 0x36 */\n *(u8 *)(buf + 0x22) = v1; /* 0x32 */\n *(s8 *)(buf + 0x2d) = v0; /* 0x3D */\n *(s8 *)(buf + 0x29) = v0; /* 0x39 */\n *(s8 *)(buf + 0x25) = v0; /* 0x35 */\n *(s8 *)(buf + 0x21) = v0; /* 0x31 */\n *(s8 *)(buf + 0x2c) = v0; /* 0x3C */\n *(s8 *)(buf + 0x28) = v0; /* 0x38 */\n *(s8 *)(buf + 0x24) = v0; /* 0x34 */\n *(s8 *)(buf + 0x20) = v0; /* 0x30 */\n t2c = *(u16 *)((u8 *)arg0 + 0x2c);\n *(u16 *)(q + 0x02) = t2c; /* 0x6A */\n *(u16 *)(q + 0x00) = t2c; /* 0x68 */\n func_80017DC4(q, p);\n func_80048EAC(arg1, p);\n *(s32 *)(buf + 0x4c) = (s32)*(s16 *)((u8 *)arg0 + 6); /* 0x5C */\n *(s32 *)(buf + 0x50) = (s32)*(s16 *)((u8 *)arg0 + 0xa); /* 0x60 */\n *(s32 *)(buf + 0x54) = (s32)*(s16 *)((u8 *)arg0 + 0xe); /* 0x64 */\n func_80017758(buf + 0x00, p);\n *(s16 *)(buf + 0x00) = -7; /* 0x10 */\n *(s16 *)(buf + 0x10) = 0; /* 0x20 */\n *(s16 *)(buf + 0x08) = 0; /* 0x18 */\n *(s16 *)(buf + 0x18) = 7; /* 0x28 */\n *(s16 *)(buf + 0x1a) = 0; /* 0x2A */\n *(s16 *)(buf + 0x02) = 0; /* 0x12 */\n *(s16 *)(buf + 0x0a) = 7; /* 0x1A */\n *(s16 *)(buf + 0x12) = -7; /* 0x22 */\n func_80017758(buf + 0x00, p);\n}\n"} +{"ts": "2026-09-11 00:35:38", "label": "s104_r31r35", "rung": "E", "calib": {"head": "65b0855c1", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c", "fn": "func_80181720", "addr": 2149062432, "aliases": null, "header": false, "includers": 0, "nhash_before": "f40afa42841b07872b88b7ac258bc3a65e3164a7", "nhash_after": "ee25a27ab7c0bf2c6e427d7e232f05a42371c95c", "source": "delever_regen R31 shift-cast (s16)h >> 7 @15", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.296, "objects": ["build/src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.o"], "before_text": "s32 func_80181720(void *arg0) {\n typedef struct { s32 vx, vy, vz; } VEC3L;\n VEC3L v;\n s16 raw[4];\n s16 buf[4];\n s32 r;\n s32 d;\n s32 h;\n\n if (*(s16 *)&D_801270C0 == 2) {\n return 0;\n }\n\n h = *(s16 *)(*(s32 *)((s32)arg0 + 0x20) + 0x18);\n __asm__(\"\" : \"=r\"(h) : \"0\"(h)); /* \u00a7197-A re-tie: keeps lh + sra 7 */ // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n r = h >> 7;\n raw[0] = *(u16 *)((s32)arg0 + 0x6);\n raw[1] = *(u16 *)((s32)arg0 + 0xA);\n raw[2] = *(u16 *)((s32)arg0 + 0xE);\n v.vx = (s16)D_80126B5E - raw[0];\n v.vy = 0;\n v.vz = (s16)D_80126B66 - raw[2];\n\n /* gte SQR on the XZ difference vector (in place) */\n __asm__ volatile (\n \"lwc2 $9, 0( %0 );\"\n \"lwc2 $10, 4( %0 );\"\n \"lwc2 $11, 8( %0 );\"\n \"nop;\"\n \"nop;\"\n \"sqr 0;\"\n \"swc2 $25, 0( %0 );\"\n \"swc2 $26, 4( %0 );\"\n \"swc2 $27, 8( %0 )\"\n :\n : \"r\"(&v)\n : \"$9\", \"$10\", \"$11\", \"memory\");\n\n if (r * r <= v.vx + v.vz) {\n return 0;\n }\n\n d = (s16)D_80126B62 - *(s16 *)((s32)arg0 + 0xA);\n if (d < 0) {\n if (9 < *(s16 *)((s32)arg0 + 0xA) - (s16)D_80126B62) {\n goto ret0;\n }\n } else if (9 < d) {\n return 0;\n }\n\n VectorNormal(&v, &v);\n buf[0] = v.vx;\n buf[1] = v.vy;\n buf[2] = v.vz;\n func_8012F568(1, 0x4014, 0, 0x18, (s32)raw, (s32)buf);\n return 1;\nret0:\n return 0;\n}\n", "after_text": "s32 func_80181720(void *arg0) {\n typedef struct { s32 vx, vy, vz; } VEC3L;\n VEC3L v;\n s16 raw[4];\n s16 buf[4];\n s32 r;\n s32 d;\n s32 h;\n\n if (*(s16 *)&D_801270C0 == 2) {\n return 0;\n }\n\n h = *(s16 *)(*(s32 *)((s32)arg0 + 0x20) + 0x18);\n r = (s16)h >> 7;\n raw[0] = *(u16 *)((s32)arg0 + 0x6);\n raw[1] = *(u16 *)((s32)arg0 + 0xA);\n raw[2] = *(u16 *)((s32)arg0 + 0xE);\n v.vx = (s16)D_80126B5E - raw[0];\n v.vy = 0;\n v.vz = (s16)D_80126B66 - raw[2];\n\n /* gte SQR on the XZ difference vector (in place) */\n __asm__ volatile (\n \"lwc2 $9, 0( %0 );\"\n \"lwc2 $10, 4( %0 );\"\n \"lwc2 $11, 8( %0 );\"\n \"nop;\"\n \"nop;\"\n \"sqr 0;\"\n \"swc2 $25, 0( %0 );\"\n \"swc2 $26, 4( %0 );\"\n \"swc2 $27, 8( %0 )\"\n :\n : \"r\"(&v)\n : \"$9\", \"$10\", \"$11\", \"memory\");\n\n if (r * r <= v.vx + v.vz) {\n return 0;\n }\n\n d = (s16)D_80126B62 - *(s16 *)((s32)arg0 + 0xA);\n if (d < 0) {\n if (9 < *(s16 *)((s32)arg0 + 0xA) - (s16)D_80126B62) {\n goto ret0;\n }\n } else if (9 < d) {\n return 0;\n }\n\n VectorNormal(&v, &v);\n buf[0] = v.vx;\n buf[1] = v.vy;\n buf[2] = v.vz;\n func_8012F568(1, 0x4014, 0, 0x18, (s32)raw, (s32)buf);\n return 1;\nret0:\n return 0;\n}\n"} +{"ts": "2026-09-11 00:36:07", "label": "s104_r31r35p", "rung": "E", "calib": {"head": "65b0855c1", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC05_005/ov_SC05_005_jr_8017D898.c", "fn": "func_80181828", "addr": 2149062696, "aliases": null, "header": false, "includers": 0, "nhash_before": "f40afa42841b07872b88b7ac258bc3a65e3164a7", "nhash_after": "ee25a27ab7c0bf2c6e427d7e232f05a42371c95c", "source": "propagate:src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c:func_80181720", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.179, "objects": ["build/src/ov_SC05_005/ov_SC05_005_jr_8017D898.o"], "before_text": "s32 func_80181828(void *arg0) {\n typedef struct { s32 vx, vy, vz; } VEC3L;\n VEC3L v;\n s16 raw[4];\n s16 buf[4];\n s32 r;\n s32 d;\n s32 h;\n\n if (*(s16 *)&D_801270C0 == 2) {\n return 0;\n }\n\n h = *(s16 *)(*(s32 *)((s32)arg0 + 0x20) + 0x18);\n __asm__(\"\" : \"=r\"(h) : \"0\"(h)); /* \u00a7197-A re-tie: keeps lh + sra 7 */ // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n r = h >> 7;\n raw[0] = *(u16 *)((s32)arg0 + 0x6);\n raw[1] = *(u16 *)((s32)arg0 + 0xA);\n raw[2] = *(u16 *)((s32)arg0 + 0xE);\n v.vx = (s16)D_80126B5E - raw[0];\n v.vy = 0;\n v.vz = (s16)D_80126B66 - raw[2];\n\n /* gte SQR on the XZ difference vector (in place) */\n __asm__ volatile (\n \"lwc2 $9, 0( %0 );\"\n \"lwc2 $10, 4( %0 );\"\n \"lwc2 $11, 8( %0 );\"\n \"nop;\"\n \"nop;\"\n \"sqr 0;\"\n \"swc2 $25, 0( %0 );\"\n \"swc2 $26, 4( %0 );\"\n \"swc2 $27, 8( %0 )\"\n :\n : \"r\"(&v)\n : \"$9\", \"$10\", \"$11\", \"memory\");\n\n if (r * r <= v.vx + v.vz) {\n return 0;\n }\n\n d = (s16)D_80126B62 - *(s16 *)((s32)arg0 + 0xA);\n if (d < 0) {\n if (9 < *(s16 *)((s32)arg0 + 0xA) - (s16)D_80126B62) {\n goto ret0;\n }\n } else if (9 < d) {\n return 0;\n }\n\n VectorNormal(&v, &v);\n buf[0] = v.vx;\n buf[1] = v.vy;\n buf[2] = v.vz;\n func_8012F568(1, 0x4014, 0, 0x18, (s32)raw, (s32)buf);\n return 1;\nret0:\n return 0;\n}\n", "after_text": "s32 func_80181828(void *arg0) {\n typedef struct { s32 vx, vy, vz; } VEC3L;\n VEC3L v;\n s16 raw[4];\n s16 buf[4];\n s32 r;\n s32 d;\n s32 h;\n\n if (*(s16 *)&D_801270C0 == 2) {\n return 0;\n }\n\n h = *(s16 *)(*(s32 *)((s32)arg0 + 0x20) + 0x18);\n r = (s16)h >> 7;\n raw[0] = *(u16 *)((s32)arg0 + 0x6);\n raw[1] = *(u16 *)((s32)arg0 + 0xA);\n raw[2] = *(u16 *)((s32)arg0 + 0xE);\n v.vx = (s16)D_80126B5E - raw[0];\n v.vy = 0;\n v.vz = (s16)D_80126B66 - raw[2];\n\n /* gte SQR on the XZ difference vector (in place) */\n __asm__ volatile (\n \"lwc2 $9, 0( %0 );\"\n \"lwc2 $10, 4( %0 );\"\n \"lwc2 $11, 8( %0 );\"\n \"nop;\"\n \"nop;\"\n \"sqr 0;\"\n \"swc2 $25, 0( %0 );\"\n \"swc2 $26, 4( %0 );\"\n \"swc2 $27, 8( %0 )\"\n :\n : \"r\"(&v)\n : \"$9\", \"$10\", \"$11\", \"memory\");\n\n if (r * r <= v.vx + v.vz) {\n return 0;\n }\n\n d = (s16)D_80126B62 - *(s16 *)((s32)arg0 + 0xA);\n if (d < 0) {\n if (9 < *(s16 *)((s32)arg0 + 0xA) - (s16)D_80126B62) {\n goto ret0;\n }\n } else if (9 < d) {\n return 0;\n }\n\n VectorNormal(&v, &v);\n buf[0] = v.vx;\n buf[1] = v.vy;\n buf[2] = v.vz;\n func_8012F568(1, 0x4014, 0, 0x18, (s32)raw, (s32)buf);\n return 1;\nret0:\n return 0;\n}\n"} +{"ts": "2026-09-11 00:36:12", "label": "s104_r31r35", "rung": "E", "calib": {"head": "65b0855c1", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_006/ov_SC06_006_jr_8017DB90.c", "fn": "func_801800B8", "addr": 2149056696, "aliases": null, "header": false, "includers": 0, "nhash_before": "ae46306a0ae9b638a04403b296f17fac4bdb5646", "nhash_after": "672ac01f157ccfbe9dd3edaffea45dd53873921b", "source": "delever_regen R35 drop-param-copy ctl->((Ctl801800B8 *)a0) @2", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.18, "objects": ["build/src/ov_SC06_006/ov_SC06_006_jr_8017DB90.o"], "before_text": "void func_801800B8(void *a0) {\n Ctl801800B8 *ctl = (Ctl801800B8 *)a0;\n Cmd801800B8 *p;\n u8 *obj;\n s32 t;\n s32 u;\n\n func_801802E0((s32 *)a0);\n\n u = ctl->unk0C;\n t = D_801861F0[(*(u16 *)((u8 *)D_801F8118 + 2)) * 5];\n D_801F80A4 = 0;\n D_801F8084 = 0;\n D_801F8088 = -1;\n D_801F808C = u;\n if (t != -1) {\n D_801F809C = t;\n }\n\n do { func_8017F5D0(); } while (0); // !FAKE: do-while \u2014 a LOOP-note scheduling barrier (sched.c:2058-2074; P36 R7)\n\n D_801F8090 = ctl->unk10;\n func_80180E68(ctl->unk04, ctl->unk10);\n\n D_801F8AEC = ctl->unk08;\n\n func_80129CF8();\n\n p = ctl->cmds;\n while (p->kind != -1) {\n obj = D_801F80AC[p->kind];\n switch (p->cmd) {\n case 0:\n func_8012E8A8(obj);\n *(s16 *)(obj + 0x98) = 0;\n *(s16 *)(obj + 0x34) = 0;\n break;\n case 1:\n func_8012E88C(obj);\n func_801802A0((s32)obj, p->arg,\n D_80185870[*(s16 *)(obj + 0x70)],\n D_801858A8[*(s16 *)(obj + 0x70)]);\n *(s16 *)(obj + 0x34) = 1;\n break;\n case 2:\n func_8012E88C(obj);\n func_8012A828((s32)obj, (void *)p->arg);\n *(s16 *)(obj + 0x34) = 2;\n break;\n case 3:\n *(s32 *)(obj + 0xDC) = p->arg;\n break;\n }\n p++;\n }\n}\n", "after_text": "void func_801800B8(void *a0) {\n Cmd801800B8 *p;\n u8 *obj;\n s32 t;\n s32 u;\n\n func_801802E0((s32 *)a0);\n\n u = ((Ctl801800B8 *)a0)->unk0C;\n t = D_801861F0[(*(u16 *)((u8 *)D_801F8118 + 2)) * 5];\n D_801F80A4 = 0;\n D_801F8084 = 0;\n D_801F8088 = -1;\n D_801F808C = u;\n if (t != -1) {\n D_801F809C = t;\n }\n\n func_8017F5D0();\n\n D_801F8090 = ((Ctl801800B8 *)a0)->unk10;\n func_80180E68(((Ctl801800B8 *)a0)->unk04, ((Ctl801800B8 *)a0)->unk10);\n\n D_801F8AEC = ((Ctl801800B8 *)a0)->unk08;\n\n func_80129CF8();\n\n p = ((Ctl801800B8 *)a0)->cmds;\n while (p->kind != -1) {\n obj = D_801F80AC[p->kind];\n switch (p->cmd) {\n case 0:\n func_8012E8A8(obj);\n *(s16 *)(obj + 0x98) = 0;\n *(s16 *)(obj + 0x34) = 0;\n break;\n case 1:\n func_8012E88C(obj);\n func_801802A0((s32)obj, p->arg,\n D_80185870[*(s16 *)(obj + 0x70)],\n D_801858A8[*(s16 *)(obj + 0x70)]);\n *(s16 *)(obj + 0x34) = 1;\n break;\n case 2:\n func_8012E88C(obj);\n func_8012A828((s32)obj, (void *)p->arg);\n *(s16 *)(obj + 0x34) = 2;\n break;\n case 3:\n *(s32 *)(obj + 0xDC) = p->arg;\n break;\n }\n p++;\n }\n}\n"} +{"ts": "2026-09-11 00:36:15", "label": "s104_r31r35", "rung": "E", "calib": {"head": "65b0855c1", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_006/ov_SC06_006_jr_8017DB90.c", "fn": "func_8017E330", "addr": 2149049136, "aliases": null, "header": false, "includers": 0, "nhash_before": "d64d41a1b204313cdf05992f81148fa49a84405f", "nhash_after": "f38e1aaeb186eaba8e3c9abafc1ef6f1b18af6b2", "source": "delever_regen R31 shift-cast (s16) at all 3 shifts", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.198, "objects": ["build/src/ov_SC06_006/ov_SC06_006_jr_8017DB90.o"], "before_text": "void func_8017E330(Actor_8017E330 *a0) {\n Work_8017E330 v; /* sp+0x10 */\n Drv_8017E330 *p;\n s32 i;\n s32 t;\n\n p = (Drv_8017E330 *)D_801F80E4;\n if (p == NULL) {\n return;\n }\n\n a0->fDC = 0x200;\n i = a0->f70;\n\n if ((p->f02 == 1) && (p->f34 == 1)) {\n func_8012E88C((u8 *)a0);\n a0->f98 = 0;\n\n v.x = (D_801F8428[i].x * D_801F8090) >> 12;\n v.y = (D_801F8428[i].y * D_801F8090) >> 12;\n v.z = (D_801F8428[i].z * D_801F8090) >> 12;\n\n if (*(u16 *)((u8 *)D_801F8118 + 2) == 2) {\n func_8017F824(&v, 0x200);\n a0->f06 = v.x;\n a0->f0A = v.y;\n a0->f0E = v.z;\n /* The target keeps `lh` + `sra 3` (the UNCOMBINED extendhisi2_internal\n * form). At -O2 mips.md's extendhisi2 expander does\n * `if (optimize && MEM) force_not_mem`, so expand always emits\n * lhu + sll 16 + sra 16, and combine folds that back to a\n * `(sign_extend (mem))` == `lh` only to immediately re-fold it with\n * the `>> 3` into `sll 16 ; sra 19` (3 insns). Blocking that LAST\n * merge is what the target did: can_combine_p bails when i2 and i3\n * are non-adjacent AND memory was written between them\n * (combine.c use_crosses_set_p -> `mem_last_set > from_cuid`).\n * The split load/shift statements give the non-adjacency (the\n * `lw 0x20($s0)` sits between them); the zero-byte re-tie with a\n * \"memory\" clobber supplies the write. Byte-exact, emits nothing. */\n t = p->f20->rot.x;\n __asm__(\"\" : \"=r\"(t) : \"0\"(t) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n a0->f20->rot.x = t >> 3;\n t = p->f20->rot.y;\n __asm__(\"\" : \"=r\"(t) : \"0\"(t) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n a0->f20->rot.y = t >> 3;\n t = p->f20->rot.z;\n __asm__(\"\" : \"=r\"(t) : \"0\"(t) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n a0->f20->rot.z = t >> 3;\n } else {\n a0->f06 = v.x;\n a0->f0A = v.y;\n a0->f0E = v.z;\n a0->f20->rot = p->f20->rot; /* 8-byte align-2 copy: lwl/lwr + swl/swr */\n }\n\n a0->f20->f10 = D_801F8428[i].a;\n a0->f20->f12 = D_801F8428[i].b;\n a0->f20->f14 = D_801F8428[i].c;\n } else {\n func_8012E8A8((u8 *)a0);\n a0->f98 = 0;\n }\n}\n", "after_text": "void func_8017E330(Actor_8017E330 *a0) {\n Work_8017E330 v; /* sp+0x10 */\n Drv_8017E330 *p;\n s32 i;\n s32 t;\n\n p = (Drv_8017E330 *)D_801F80E4;\n if (p == NULL) {\n return;\n }\n\n a0->fDC = 0x200;\n i = a0->f70;\n\n if ((p->f02 == 1) && (p->f34 == 1)) {\n func_8012E88C((u8 *)a0);\n a0->f98 = 0;\n\n v.x = (D_801F8428[i].x * D_801F8090) >> 12;\n v.y = (D_801F8428[i].y * D_801F8090) >> 12;\n v.z = (D_801F8428[i].z * D_801F8090) >> 12;\n\n if (*(u16 *)((u8 *)D_801F8118 + 2) == 2) {\n func_8017F824(&v, 0x200);\n a0->f06 = v.x;\n a0->f0A = v.y;\n a0->f0E = v.z;\n /* The target keeps `lh` + `sra 3` (the UNCOMBINED extendhisi2_internal\n * form). At -O2 mips.md's extendhisi2 expander does\n * `if (optimize && MEM) force_not_mem`, so expand always emits\n * lhu + sll 16 + sra 16, and combine folds that back to a\n * `(sign_extend (mem))` == `lh` only to immediately re-fold it with\n * the `>> 3` into `sll 16 ; sra 19` (3 insns). Blocking that LAST\n * merge is what the target did: can_combine_p bails when i2 and i3\n * are non-adjacent AND memory was written between them\n * (combine.c use_crosses_set_p -> `mem_last_set > from_cuid`).\n * The split load/shift statements give the non-adjacency (the\n * `lw 0x20($s0)` sits between them); the zero-byte re-tie with a\n * \"memory\" clobber supplies the write. Byte-exact, emits nothing. */\n t = p->f20->rot.x;\n a0->f20->rot.x = (s16)t >> 3;\n t = p->f20->rot.y;\n a0->f20->rot.y = (s16)t >> 3;\n t = p->f20->rot.z;\n a0->f20->rot.z = (s16)t >> 3;\n } else {\n a0->f06 = v.x;\n a0->f0A = v.y;\n a0->f0E = v.z;\n a0->f20->rot = p->f20->rot; /* 8-byte align-2 copy: lwl/lwr + swl/swr */\n }\n\n a0->f20->f10 = D_801F8428[i].a;\n a0->f20->f12 = D_801F8428[i].b;\n a0->f20->f14 = D_801F8428[i].c;\n } else {\n func_8012E8A8((u8 *)a0);\n a0->f98 = 0;\n }\n}\n"} +{"ts": "2026-09-11 00:36:18", "label": "s104_r31r35", "rung": "E", "calib": {"head": "65b0855c1", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_006/ov_SC06_006_jr_8017DB90.c", "fn": "func_8017E550", "addr": 2149049680, "aliases": null, "header": false, "includers": 0, "nhash_before": "624581e55918ffa3158c64e6028a7e371b46853e", "nhash_after": "93b0e3d3c919b5b84f69af250b17f43a0cb017f6", "source": "delever_regen R31 shift-cast (s16) at all 3 shifts", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.193, "objects": ["build/src/ov_SC06_006/ov_SC06_006_jr_8017DB90.o"], "before_text": "void func_8017E550(Actor_8017E550 *a0) {\n Work_8017E550 v;\n Drv_8017E550 *p;\n Pose_8017E550 *pp;\n s32 t;\n\n p = (Drv_8017E550 *)a0->f64;\n if (p == NULL) {\n return;\n }\n\n pp = (Pose_8017E550 *)D_80185F6C[a0->f70];\n\n if ((p->f02 == 1) && (p->f34 == 1)) {\n func_8012E88C((u8 *)a0);\n a0->f98 = 0;\n\n v.x = (pp->x * D_801F8090) >> 12;\n v.y = (pp->y * D_801F8090) >> 12;\n v.z = (pp->z * D_801F8090) >> 12;\n\n if (*(u16 *)((u8 *)D_801F8118 + 2) == 2) {\n func_8017F824(&v, 0x200);\n a0->f06 = v.x;\n a0->f0A = v.y;\n a0->f0E = v.z;\n t = p->f20->rot.x;\n __asm__(\"\" : \"=r\"(t) : \"0\"(t) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n a0->f20->rot.x = t >> 3;\n t = p->f20->rot.y;\n __asm__(\"\" : \"=r\"(t) : \"0\"(t) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n a0->f20->rot.y = t >> 3;\n t = p->f20->rot.z;\n __asm__(\"\" : \"=r\"(t) : \"0\"(t) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n a0->f20->rot.z = t >> 3;\n } else {\n a0->f06 = v.x;\n a0->f0A = v.y;\n a0->f0E = v.z;\n a0->f20->rot = p->f20->rot;\n }\n\n a0->f20->f10 = pp->a;\n a0->f20->f12 = pp->b;\n a0->f20->f14 = pp->c;\n } else {\n func_8012E8A8((u8 *)a0);\n a0->f98 = 0;\n }\n}\n", "after_text": "void func_8017E550(Actor_8017E550 *a0) {\n Work_8017E550 v;\n Drv_8017E550 *p;\n Pose_8017E550 *pp;\n s32 t;\n\n p = (Drv_8017E550 *)a0->f64;\n if (p == NULL) {\n return;\n }\n\n pp = (Pose_8017E550 *)D_80185F6C[a0->f70];\n\n if ((p->f02 == 1) && (p->f34 == 1)) {\n func_8012E88C((u8 *)a0);\n a0->f98 = 0;\n\n v.x = (pp->x * D_801F8090) >> 12;\n v.y = (pp->y * D_801F8090) >> 12;\n v.z = (pp->z * D_801F8090) >> 12;\n\n if (*(u16 *)((u8 *)D_801F8118 + 2) == 2) {\n func_8017F824(&v, 0x200);\n a0->f06 = v.x;\n a0->f0A = v.y;\n a0->f0E = v.z;\n t = p->f20->rot.x;\n a0->f20->rot.x = (s16)t >> 3;\n t = p->f20->rot.y;\n a0->f20->rot.y = (s16)t >> 3;\n t = p->f20->rot.z;\n a0->f20->rot.z = (s16)t >> 3;\n } else {\n a0->f06 = v.x;\n a0->f0A = v.y;\n a0->f0E = v.z;\n a0->f20->rot = p->f20->rot;\n }\n\n a0->f20->f10 = pp->a;\n a0->f20->f12 = pp->b;\n a0->f20->f14 = pp->c;\n } else {\n func_8012E8A8((u8 *)a0);\n a0->f98 = 0;\n }\n}\n"} diff --git a/src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c b/src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c index c097f1ba3..6f6ba27e2 100644 --- a/src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c +++ b/src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c @@ -5650,8 +5650,7 @@ s32 func_80181720(void *arg0) { } h = *(s16 *)(*(s32 *)((s32)arg0 + 0x20) + 0x18); - __asm__("" : "=r"(h) : "0"(h)); /* §197-A re-tie: keeps lh + sra 7 */ // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) - r = h >> 7; + r = (s16)h >> 7; raw[0] = *(u16 *)((s32)arg0 + 0x6); raw[1] = *(u16 *)((s32)arg0 + 0xA); raw[2] = *(u16 *)((s32)arg0 + 0xE); diff --git a/src/ov_SC05_005/ov_SC05_005_jr_8017D898.c b/src/ov_SC05_005/ov_SC05_005_jr_8017D898.c index 7eaedc785..09f626dfb 100644 --- a/src/ov_SC05_005/ov_SC05_005_jr_8017D898.c +++ b/src/ov_SC05_005/ov_SC05_005_jr_8017D898.c @@ -4858,8 +4858,7 @@ s32 func_80181828(void *arg0) { } h = *(s16 *)(*(s32 *)((s32)arg0 + 0x20) + 0x18); - __asm__("" : "=r"(h) : "0"(h)); /* §197-A re-tie: keeps lh + sra 7 */ // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) - r = h >> 7; + r = (s16)h >> 7; raw[0] = *(u16 *)((s32)arg0 + 0x6); raw[1] = *(u16 *)((s32)arg0 + 0xA); raw[2] = *(u16 *)((s32)arg0 + 0xE); diff --git a/src/ov_SC06_006/ov_SC06_006_jr_8017DB90.c b/src/ov_SC06_006/ov_SC06_006_jr_8017DB90.c index 023598276..87e8fcf18 100644 --- a/src/ov_SC06_006/ov_SC06_006_jr_8017DB90.c +++ b/src/ov_SC06_006/ov_SC06_006_jr_8017DB90.c @@ -3109,14 +3109,11 @@ void func_8017E330(Actor_8017E330 *a0) { * `lw 0x20($s0)` sits between them); the zero-byte re-tie with a * "memory" clobber supplies the write. Byte-exact, emits nothing. */ t = p->f20->rot.x; - __asm__("" : "=r"(t) : "0"(t) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) - a0->f20->rot.x = t >> 3; + a0->f20->rot.x = (s16)t >> 3; t = p->f20->rot.y; - __asm__("" : "=r"(t) : "0"(t) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) - a0->f20->rot.y = t >> 3; + a0->f20->rot.y = (s16)t >> 3; t = p->f20->rot.z; - __asm__("" : "=r"(t) : "0"(t) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) - a0->f20->rot.z = t >> 3; + a0->f20->rot.z = (s16)t >> 3; } else { a0->f06 = v.x; a0->f0A = v.y; @@ -3216,14 +3213,11 @@ void func_8017E550(Actor_8017E550 *a0) { a0->f0A = v.y; a0->f0E = v.z; t = p->f20->rot.x; - __asm__("" : "=r"(t) : "0"(t) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) - a0->f20->rot.x = t >> 3; + a0->f20->rot.x = (s16)t >> 3; t = p->f20->rot.y; - __asm__("" : "=r"(t) : "0"(t) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) - a0->f20->rot.y = t >> 3; + a0->f20->rot.y = (s16)t >> 3; t = p->f20->rot.z; - __asm__("" : "=r"(t) : "0"(t) : "memory"); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) - a0->f20->rot.z = t >> 3; + a0->f20->rot.z = (s16)t >> 3; } else { a0->f06 = v.x; a0->f0A = v.y; @@ -4433,7 +4427,6 @@ extern s16 D_80185870[]; extern s32 D_801858A8[]; void func_801800B8(void *a0) { - Ctl801800B8 *ctl = (Ctl801800B8 *)a0; Cmd801800B8 *p; u8 *obj; s32 t; @@ -4441,7 +4434,7 @@ void func_801800B8(void *a0) { func_801802E0((s32 *)a0); - u = ctl->unk0C; + u = ((Ctl801800B8 *)a0)->unk0C; t = D_801861F0[(*(u16 *)((u8 *)D_801F8118 + 2)) * 5]; D_801F80A4 = 0; D_801F8084 = 0; @@ -4451,16 +4444,16 @@ void func_801800B8(void *a0) { D_801F809C = t; } - do { func_8017F5D0(); } while (0); // !FAKE: do-while — a LOOP-note scheduling barrier (sched.c:2058-2074; P36 R7) + func_8017F5D0(); - D_801F8090 = ctl->unk10; - func_80180E68(ctl->unk04, ctl->unk10); + D_801F8090 = ((Ctl801800B8 *)a0)->unk10; + func_80180E68(((Ctl801800B8 *)a0)->unk04, ((Ctl801800B8 *)a0)->unk10); - D_801F8AEC = ctl->unk08; + D_801F8AEC = ((Ctl801800B8 *)a0)->unk08; func_80129CF8(); - p = ctl->cmds; + p = ((Ctl801800B8 *)a0)->cmds; while (p->kind != -1) { obj = D_801F80AC[p->kind]; switch (p->cmd) {