From 75cb21c7a7e0604b95a82f63fd43b357bb5103e2 Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Fri, 11 Sep 2026 02:33:23 -0600 Subject: [PATCH] =?UTF-8?q?phase-36:=20S104=20s104=5Fe16=20=E2=80=94=20fun?= =?UTF-8?q?c=5F800331D4=20banked=20at=200=20through=20the=20whole-object?= =?UTF-8?q?=20gate=20+=20propagated=20=E2=80=94=20pin=20=E2=86=92=200:=20r?= =?UTF-8?q?eturn=20++i=20(allocno=5Fcompare=20refs,=20global.c:587-603)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .run/P36/agents/main__func_80031B7C/body.c | 15 + .../agents/main__func_80031B7C/mechanism.md | 67 ++++ .run/P36/agents/main__func_800331D4/body.c | 12 + .../agents/main__func_800331D4/mechanism.md | 36 ++ .run/P36/agents/main__func_800336A8/body.c | 71 ++++ .../agents/main__func_800336A8/mechanism.md | 58 +++ .run/P36/agents/main__func_80034314/body.c | 122 ++++++ .../agents/main__func_80034314/mechanism.md | 50 +++ .run/P36/delever/calibration.json | 356 +++++++++--------- .run/P36/delever/ledger.jsonl | 1 + src/800_b_2.c | 15 +- 11 files changed, 615 insertions(+), 188 deletions(-) create mode 100644 .run/P36/agents/main__func_80031B7C/body.c create mode 100644 .run/P36/agents/main__func_80031B7C/mechanism.md create mode 100644 .run/P36/agents/main__func_800331D4/body.c create mode 100644 .run/P36/agents/main__func_800331D4/mechanism.md create mode 100644 .run/P36/agents/main__func_800336A8/body.c create mode 100644 .run/P36/agents/main__func_800336A8/mechanism.md create mode 100644 .run/P36/agents/main__func_80034314/body.c create mode 100644 .run/P36/agents/main__func_80034314/mechanism.md diff --git a/.run/P36/agents/main__func_80031B7C/body.c b/.run/P36/agents/main__func_80031B7C/body.c new file mode 100644 index 000000000..a06bbdf62 --- /dev/null +++ b/.run/P36/agents/main__func_80031B7C/body.c @@ -0,0 +1,15 @@ +void func_80031B7C(void) { + s32 i = 0; + s32 one = 1; + s32 full = 0x7FFF; + u8 *p = D_800A49D2; + +loop: + if (p[4] && !p[2] && p[3]) { + p[2] = one; + *(u16 *)p = full; + } + p += 0x54; + i++; + if (i < 8) goto loop; +} diff --git a/.run/P36/agents/main__func_80031B7C/mechanism.md b/.run/P36/agents/main__func_80031B7C/mechanism.md new file mode 100644 index 000000000..23193b101 --- /dev/null +++ b/.run/P36/agents/main__func_80031B7C/mechanism.md @@ -0,0 +1,67 @@ +# func_80031B7C (src/800_b_2.c) — S104 agent e16 — CLOSED at 0, ZERO levers (1 pin -> 0) + +## (a) The residual +Score 18, COUNT, 27 vs 25. Mine keeps TWO loop registers for the record pointer — the walked pointer (used by the +`sh` at offset 0) and a second one `addiu v1,a0,2` that carries the `+2/+3/+4` byte reads and the `sb` — and steps +both; the target walks ONE pointer `$v1` with every access an offset from it (`lbu 4/2/3(v1)`, `sb 2(v1)`, `sh 0(v1)`). +The counter/constant register shuffle (`a0/a2/a1` vs `a1/a3/a2`) is fallout of the extra pseudo. + +## (b) The pass and the decision (PROVEN on the `.loop` dump, scratch/dumps_free) +loop.c strength reduction. The `-dL` dump of the lever-free do-while says: +`Cannot eliminate biv 75: biv used in insn 44.` (the pointer, used directly by `*(u16 *)v1 = …`) and +`giv at 41 reduced to (reg:SI 84)` with the givs at 34/29/24 combined into it — the `p+2` address giv +(`record_giv` loop.c:4341, `combine_givs` loop.c:5494) gets its own register while the biv stays live. +The tree's `$3` pin worked because loop.c never treats a hard register as a biv. The target was never strength-reduced +at all: it was not a LOOP to loop.c. `loop_optimize` counts `NOTE_INSN_LOOP_BEG` notes and returns when there are none +(loop.c:352-361, "Don't waste time if no loops"); those notes come only from `expand_start_loop` (stmt.c:2171), i.e. +from `for`/`while`/`do`. A backward `goto` emits no note. The constants `1` and `0x7FFF` sit in registers set before the +loop in the target — with no loop.c there is no invariant motion, so the source itself held them in locals (a body with +the constants written inline at the stores scores 10: they are materialised inside the loop). + +## (c) The move that closed it (PROVEN on bytes) +The do-while written as the backward `goto` loop it compiles like: +```c +void func_80031B7C(void) { + s32 i = 0; + s32 one = 1; + s32 full = 0x7FFF; + u8 *p = D_800A49D2; + +loop: + if (p[4] && !p[2] && p[3]) { + p[2] = one; + *(u16 *)p = full; + } + p += 0x54; + i++; + if (i < 8) goto loop; +} +``` +Also byte-neutral (all tested at 0): the decompiler names `a0/a2/a1/v1` renamed; `u8 a2`/`u16 a1` widened to `s32` +(the stores truncate either way); `()` -> `(void)` (the TU's own prototype at src/800_b_2.c:2049 is `(void)`). +`if (++i < 8) goto loop;` with the pointer declared first scores 4 (ORDER) — keep `i++;` as its own statement. + +## (d) GENERATOR PROPOSAL +When a COUNT residual inside a loop is an extra `addiu rX,rP,K` before the loop plus a second stepped pointer, and the +`-dL` dump says "Cannot eliminate biv" for the pointer, AND the target hoists nothing that the source does not already +hold in a local, rewrite the `do { … } while (c);` as `label: … if (c) goto label;` — no LOOP_BEG note, no loop.c +(loop.c:352-361). The tell in the tree: a `$N` pin on the walked pointer of a do-while whose "constants" are locals +initialised at the top (the decompiler's rendering of registers loaded before a non-loop.c loop). + +## (e) What did not work (bytes) +- Every structured spelling keeps loop.c: a `for` with inline constants 17, `D_800A49D2[i * 0x54 + K]` indexing 21 + (three givs), `while (1) { … if (i >= 8) break; }` 18 (still a loop note), the sweep's best (do-while block) 15. +- The goto loop with `1`/`0x7FFF` inline at the stores: 10 (COUNT 24 — no loop.c means no hoisting, so the constants are + rematerialised in the body). + +## (f) Where the method fell short +METHOD §14 says "goto chain -> STRUCTURED" (four closes); this one is the INVERSE — a structured loop that the original +wrote as a backward goto. No generator emits a goto loop, and the `.loop` dump's "Cannot eliminate biv" line is the +only place that points at it; the reading "the target has NO loop optimisation at all" (no hoisting, no reduction) +is the check that distinguishes it from the S103 c2 `q = p + k` case. + +## (g) Structs +No. Giving `D_800A4988` its 0x54-byte record type (u16 @0x4A, u8 @0x4C/0x4D/0x4E) would not remove the biv's direct use +(the u16 field at the pointer's own offset) nor the loop note; the decision is loop.c's biv elimination, not an +aggregate/scalar alias question. Byte-wise a struct pointer would also have to start at `D_800A49D2` (the relocation's +symbol) to stay identical before linking. diff --git a/.run/P36/agents/main__func_800331D4/body.c b/.run/P36/agents/main__func_800331D4/body.c new file mode 100644 index 000000000..44c148c05 --- /dev/null +++ b/.run/P36/agents/main__func_800331D4/body.c @@ -0,0 +1,12 @@ +s32 func_800331D4(s32 arg0) { + u16 *p; + s32 i; + + p = D_800A46E8; + for (i = 0; i < 8; i++, p += 0x2A) { + if ((*p & 0x3F) == 1 && p[2] == (arg0 & 0xFFFF) && (((u32)arg0 >> 16) == 0 || ((u32)arg0 >> 16) == p[3])) { + return ++i; + } + } + return 0; +} diff --git a/.run/P36/agents/main__func_800331D4/mechanism.md b/.run/P36/agents/main__func_800331D4/mechanism.md new file mode 100644 index 000000000..c24a1754f --- /dev/null +++ b/.run/P36/agents/main__func_800331D4/mechanism.md @@ -0,0 +1,36 @@ +# func_800331D4 (src/800_b_2.c) — S104 agent e16 — CLOSED at 0, ZERO levers (1 pin -> 0) + +## (a) The residual +Score 9, REG-caller, 30 vs 30: the loop counter `i` and loop.c's second walked pointer (the `p+6` giv) swap `$a1`/`$v1` +(target: i = `$v1`, giv = `$a1`). Count and order already identical. The exact twin of func_800348A8 (same TU, same +`D_800A46E8` walk, only the type test differs: `(*p & 0x3F) == 1` vs `p[0] == 5`), which agent e2 closed this session. + +## (b) The pass and the decision +global.c allocation order, `allocno_compare` (global.c:587-603), priority `floor_log2(refs)*refs/live`; refs counted by +flow weighted by loop depth (flow.c:2067). In the lever-free text the giv outranks `i`, takes `$v1` first. Not re-dumped +here — the reading is e2's (main__func_800348A8/mechanism.md (b)), and the bytes confirm it on the first `--try`. + +## (c) The move that closed it (PROVEN on bytes, first try) +`return i + 1;` -> `return ++i;` — the increment adds a set and uses of `i` inside the loop (x loop depth), raising its +priority past the giv's; combine folds `i = i + 1; $v0 = i` back into `addiu v0,v1,1`, zero bytes changed. +Both spellings score 0: the tree's do-while with only that one line changed (scratch/min.c), and the delivered +body.c, which also rewrites the do-while as the `for` + one `&&`/`||` condition that func_800348A8 uses (the twin's +shape; readability). + +## (d) GENERATOR PROPOSAL +When a REG residual swaps a loop counter with another loop-carried pseudo and the counter's only exit use is +`return i + K;`, rewrite it `return ++i;` (K = 1) — and apply it to every same-TU function that walks the same global +with that return (grep `return i + 1;` beside `D_800A46E8`). + +## (e) What did not work +Nothing else tried — the first `--try` closed. The sweep (g6b/s3/s3b, 390 compiles) never mutates a return expression's +side effects, which is why it sat at 9. + +## (f) Where the method fell short +It did not: the brief named e2's close, and the twin was recognisable from the body text alone. `related.txt` lists +func_800348A8 third (src/800_b_2.c:7060, sharing `D_800A46E8`); a twin_rescan after e2's bank would have remapped this +one for free. + +## (g) Structs +No. The decision is a refs count in global.c; the `D_800A46E8` record (0x54 bytes: u16 type @0, u16 @4, u16 @6) as a +struct would re-spell `p[2]`/`p[3]` as fields at the same `(mem (plus p K))` addresses and change nothing here. diff --git a/.run/P36/agents/main__func_800336A8/body.c b/.run/P36/agents/main__func_800336A8/body.c new file mode 100644 index 000000000..3b313ae01 --- /dev/null +++ b/.run/P36/agents/main__func_800336A8/body.c @@ -0,0 +1,71 @@ +void func_800336A8(Req336A8 *arg) +{ + Chan336A8 *ch; + Voice336A8 *vo; + u16 *p; + const u16 *q; + u32 m; + u32 n; + u32 v; + s32 i; + s32 j; + + for (i = 0; i < 8; i++) { + if (arg->unk3A[i] == 0) { + continue; + } + ch = (Chan336A8 *)(D_800A4988 + i * 0x54); + vo = (Voice336A8 *)(D_800A4988 + 0x2A0 + i * 0x48); + vo->unk00 = D_80073140[ch->unk0A]; + m = ch->unk34; + m = D_8006AA30[m]; + m = m * *(s16 *)(D_800A4988 + 0x572); + m = m >> 7; + if (arg->unk16 != 0) { + m = m * arg->unk18; + m = m >> 15; + } + p = arg->unk1C; + for (j = 2; j >= 0; j--, p += 4) { + m = m * *p; + m = m >> 14; + } + n = ch->unk35; + if (n != 0) { + if (arg->unk38 != 0) { + n += arg->unk38; + if (n >= 0x42) { + n -= 0x40; + if (n >= 0x80) { + n = 0x7F; + } + } else { + n = 1; + } + } + ch->unk52 = n; + if (D_800A4F19 != 0) { + v = (m * D_8007319E[n]) >> 14; + vo->unk0A = v; + q = D_8007319E + 1; + v = (m * q[0x7F - n]) >> 14; + vo->unk08 = v; + } else { + v = (m * D_8007321E) >> 14; + vo->unk0A = v; + vo->unk08 = v; + } + } else { + v = m; + vo->unk0A = v; + vo->unk08 = v; + } + vo->unk40 = ch->unk0A; + if (vo->unk44 != 0) { + vo->unk04 |= 3; + } else { + vo->unk04 = 3; + vo->unk44 = 1; + } + } +} diff --git a/.run/P36/agents/main__func_800336A8/mechanism.md b/.run/P36/agents/main__func_800336A8/mechanism.md new file mode 100644 index 000000000..00dc62d61 --- /dev/null +++ b/.run/P36/agents/main__func_800336A8/mechanism.md @@ -0,0 +1,58 @@ +# func_800336A8 (src/800_b_2.c) — S104 agent e16 — CLOSED at 0, ZERO levers (1 barrier -> 0) + +## (a) The residual +Score 7 lever-free (sweep best 6), COUNT 120 vs 121: ONE missing `nop` — reorg fills the `beqz v0,` delay slot of +the `if (D_800A4F19 != 0)` stereo/mono test with the stereo arm's head `sll v0,v1,1`; the target leaves it empty. Every +other difference is branch-offset fallout. The tree's lever was a `__asm__ __volatile__("")` at the stereo arm's head +(ASM_INPUT stops `fill_slots_from_thread`'s scan, `stop_search_p` reorg.c:675-704). + +## (b) The pass and the decision +reorg.c `fill_eager_delay_slots` (reorg.c:3632-3736): `beqz` is an EQ test, `mostly_true_jump` returns 0 +(reorg.c:1407-1408), so the owned fall-through (the stereo arm) is tried first and its head `sll v0,v1,1` is taken +unless it "sets a resource needed at the opposite thread" (reorg.c:3368-3369, `opposite_needed` from +`mark_target_live_regs` on the mono arm, reorg.c:2441-2766). The mono arm's head is a 2-word `lui/lhu` (not eligible), so +nothing else can fill the slot: the target's `nop` means `v0` counted as LIVE at the mono arm. + +PROVEN on the `.jump2` dumps (scratch/free.j2 vs scratch/win.j2, both from `tools/cc1_dumps_tu.sh`): the only structural +difference is where the `n == 0` arm (`v = m;` = `move v0,a1`) is laid out. Lever-free (n == 0 arm first) the mono arm +falls straight into the shared `sh v0,10/8(a3)` tail. With the n == 0 arm LAST, the mono arm ends in `j L447` over the +n == 0 arm's `move v0,a1` (label 280), which is the target of the `beqz v1` (n == 0) branch. +READING (consistent with the bytes, not traced pass by pass): the `beqz v1` branch steals that `move v0,a1` from its +owned target thread into its own slot (the target's `beqz v1,…; move v0,a1`); `update_block` (reorg.c:2233-2249) leaves +a `(use (insn move v0,a1))` marker where the move was; once relax deletes the mono arm's `j` to the next active insn +(reorg.c:3945-3970), the mono arm falls through that marker and `mark_target_live_regs`'s forward scan marks every +register the marked insn sets as live (reorg.c:2696-2704) — so `v0` is in `opposite_needed` and the `sll` is refused. +NECESSITY PROVEN on bytes (scratch/v/x1_nomove.c): the same n == 0-last layout with the n == 0 arm storing `m` directly +(no `move v0,a1` to steal) fills the slot with the `sll` again. + +## (c) The move that closed it (PROVEN on bytes, `--try` 0) +Invert the outer if/else: `if (n == 0) { v = m; … } else { clamp; stereo/mono }` -> +`if (n != 0) { clamp; stereo/mono } else { v = m; … }`. No other change; the tree's barrier and its comment deleted. +The bytes are identical because jump/cross-jump/reorg re-derive the same final layout (the n == 0 path still becomes +`beqz v1,; move v0,a1`). + +## (d) GENERATOR PROPOSAL +When the residual is ONE missing `nop` in a conditional branch's delay slot (the fall-through arm's head stolen) and the +tree carries a zero-byte `asm("")` barrier at that arm's head, try inverting an ENCLOSING if/else whose trivial arm +(a register copy + the same stores as a sibling arm) comes first: put the trivial arm last. Its copy gets stolen into +the outer branch's slot, and the `update_block` USE marker (reorg.c:2233) makes the copied register live at the inner +branch's target, which denies the steal the barrier was faking. (Arm-order/polarity is residual_moves.md row 10; this is +the case where the arm to swap is the ENCLOSING one, not the one whose slot differs.) + +## (e) What did not work (bytes) +- Inverting the D_800A4F19 test itself (`== 0` / `!D_800A4F19`, mono first): 25 (mono laid out first). +- `switch (D_800A4F19)` default-first: 7; case-0-first: 25. A marked `do { stereo } while (0)`: 7 (notes do not stop + the scan; the loop's start label is unused and deleted by jump). +- `if (D_800A4F19 == 0) { mono; goto next; } stereo`: 25. Stereo products into two temps `l`/`r`: 14. + `v = m;` hoisted above `if (n == 0)`: 7. `D_8007319E[0x80 - n]` without `q`: 13; `(D_8007319E + 1)[0x7F - n]`: 7. +- The sweep (320 compiles, R5/R7/R8/R9/R10) never swaps an if/else's arms, which is the move. + +## (f) Where the method fell short +The residual points at the D_800A4F19 branch; the fix is one level OUT (the enclosing `n == 0` if/else). Reading reorg's +liveness (`mark_target_live_regs` + `update_block`'s markers) from the source is slow and the `.dbr` dump drops the USE +markers before it is written; an enumeration of "swap every if/else's arms" would have found it in seconds. That +enumeration belongs in the generator set (it is cheap: one compile per if/else in the body). + +## (g) Structs +No. `Chan336A8`/`Voice336A8`/`Req336A8` are already structs here; the decision is reorg's register liveness across a +branch, not an aggregate/scalar alias question. diff --git a/.run/P36/agents/main__func_80034314/body.c b/.run/P36/agents/main__func_80034314/body.c new file mode 100644 index 000000000..395ef1956 --- /dev/null +++ b/.run/P36/agents/main__func_80034314/body.c @@ -0,0 +1,122 @@ +s32 func_80034314(u32 arg0, u8 *p, u32 arg2) { + u32 flags; + Snd54 *e; + Rec12 *rec; + u8 *q; + s16 *pa; + s32 idx; + s32 ret; + s32 i; + s32 j; + s32 b1; + u32 x; + u32 y; + + y = arg0 >> 16; + flags = arg2; + x = arg0; + b1 = p[1]; + if (b1 == 0) { + rec = &D_80068A54[p[3]]; + } else { + if (D_800A4EE8 == 0) { + return 0; + } + if (D_800A4EF0 != b1) { + return 0; + } + rec = *(Rec12 **)((u8 *)D_800A4EE8 + 0x18) + p[3]; + } + + idx = func_800348A8(arg0); + if (idx != 0) { + ret = idx; + idx--; + e = (Snd54 *)((u8 *)D_800A46E8 + idx * 0x54); + if (flags & 0x1000) { + e->unk1C[0].unk06 = 1; + e->unk1C[0].unk02 = 0x100; + e->unk1C[0].unk04 = ((s32)(flags & 0x7F) * 0x3FFF) >> 7; + if (flags & 0x2000) { + e->unk38 = D_8006AED8[(flags >> 8) & 0xF]; + } else { + e->unk38 = 0; + e->unk39 = 0; + } + return ret; + } + if (e->unk08 != 0) { + return 0; + } + func_80034650(e, 0); + } else { + idx = func_8003310C(rec->unk04); + if (idx == 0) { + return 0; + } + ret = idx; + idx--; + e = (Snd54 *)((u8 *)D_800A46E8 + idx * 0x54); + } + + e->unk37 = rec->unk08; + e->unk34 = b1; + e->unk0C = rec->unk00; + e->unk02 = rec->unk04; + e->unk10 = e->unk0C; + e->unk04 = x; + e->unk06 = y; + e->unk14 = 1; + e->unk17 = p[2]; + e->unk16 = 0; + e->unk18 = 0x7FFF; + e->unk08 = rec->unk06; + e->unk50 = 0; + e->unk52 = 0; + + if (rec->unk08 & 0x10) { + e->unk48 = 1; + } else { + e->unk48 = 0; + } + + if (rec->unk08 & 4) { + e->unk1A = 0x400; + } else if (rec->unk08 & 8) { + e->unk1A = 0x200; + } else { + e->unk1A = 0x5F; + } + e->unk36 = 0; + + pa = &e->unk1C[0].unk00; + for (i = 0; i < 3; i++, pa = (s16 *)((u8 *)pa + 8)) { + pa[1] = 0x100; + *((u8 *)pa + 6) = 0; + if (i != 0) { + pa[0] = 0x3FFF; + pa[2] = 0x3FFF; + } else if (flags & 0x1000) { + pa[0] = ((flags & 0x7F) * 0x3FFF) >> 7; + pa[2] = ((flags & 0x7F) * 0x3FFF) >> 7; + if (flags & 0x2000) { + u8 tv = D_8006AED8[(flags >> 8) & 0xF]; + e->unk38 = tv; + e->unk39 = tv; + } + } else { + pa[0] = 0x3FFF; + pa[2] = 0x3FFF; + e->unk38 = 0; + e->unk39 = 0; + } + } + + q = e->unk3A; + for (j = 7; j >= 0; j--) { + *q++ = 0; + } + + e->unk00 = 5; + return ret; +} diff --git a/.run/P36/agents/main__func_80034314/mechanism.md b/.run/P36/agents/main__func_80034314/mechanism.md new file mode 100644 index 000000000..c449ebdca --- /dev/null +++ b/.run/P36/agents/main__func_80034314/mechanism.md @@ -0,0 +1,50 @@ +# func_80034314 (src/800_b_2.c) — S104 agent e16 — CLOSED at 0, ZERO levers (1 pin -> 0) + +## (a) The residual +Score 27 lever-free (sweep best 23), COUNT 205 vs 207: after EACH of the two calls (`func_800348A8`, `func_8003310C`) the +target keeps the result in a first register, tests it, and copies it to the long-lived `ret` +(`move v1,v0; beqz v1,…; move s5,v1; addiu v1,s5,-1`); mine puts the call result straight into `ret` +(`move s3,v0; beqz s3,…; addiu v1,s3,-1`) — one `move` missing per site. The `s3`/`s5` swap of `p` is fallout of the +missing pseudo. (The tree faked the survivor with a `$3` pin on `idx`.) + +## (b) The pass and the decision (PROVEN on the `.cse` dumps, scratch/dumps_free vs scratch/dumps_win) +cse's `(set REG0 REG1)` swap, cse.c:7440-7474: the body's `idx = f(); ret = idx;` has the copy IMMEDIATELY after the insn +that set `idx`, and `ret` is the qty's canonical register (it lives longer and beyond the block, `make_regs_eqv` +cse.c:840-856), so cse rewrites the pair as `ret = v0; idx = ret;` and the test to `ret == 0` +(`.cse`: `insn 102 (set (reg 81) v0)`, `insn 105 (set (reg 80) (reg 81))`, `jump_insn 108 … (eq (reg 81) 0)`). `idx`'s +copy is then dead (it is reassigned `ret - 1` before any read), so one register and one move vanish. +With the copy AFTER the test (win), the insn before the copy is the jump, not the setter, so the swap's +`prev … SET_DEST (PATTERN (prev)) == SET_SRC` test (cse.c:7463-7464) fails: `.cse` keeps `(set (reg 80) v0)`, +`jump_insn 105 … (eq (reg 80) 0)`, `(set (reg 81) (reg 80))`. reorg then pulls each `move s5,v1` into its branch's delay +slot (EQ site: from the fall-through head, `fill_eager_delay_slots` reorg.c:3713-3718; NE site: from the target head, +predicted taken, reorg.c:3690-3695), which is why the copy looked like it came before the test. + +## (c) The moves that closed it (PROVEN on bytes; JOINT — both sites needed) +1. `idx = func_800348A8(arg0); ret = idx; if (idx != 0) { idx = ret - 1;` -> + `idx = func_800348A8(arg0); if (idx != 0) { ret = idx; idx--;` +2. `idx = func_8003310C(…); ret = idx; if (idx == 0) return 0; idx = ret - 1;` -> + `idx = func_8003310C(…); if (idx == 0) return 0; ret = idx; idx--;` +Site 1 alone: 25 (worse than the start — METHOD step 5). `idx = ret - 1;` and `idx--;` both score 0; `idx--` delivered. +Also dropped (byte-neutral): the two orphan comments "dbr fence …" and "sched fence …" — they described launder levers +that sites.txt lists as REMOVED and that are no longer in the body (flagged here so the drop is not silent). + +## (d) GENERATOR PROPOSAL +When a COUNT residual is one missing `move` right after a call (target: `move vA,v0; b?? vA; move sK,vA`) and the body +reads `x = call(); y = x; if (x …)`, move the copy `y = x;` past the test into the arm(s) where `y` is needed (after an +early `return`), at every such site at once: the cse.c:7440 swap needs the copy to sit immediately after its source's +setter. (A variant of generator R21 — "separate the copy from its producer" — where the separating statement is the +test itself; R21's reorders stay within straight-line statements and so did not reach it.) + +## (e) What did not work (bytes) +- Only the first site changed: 25. `e = D + (idx - 1) * 0x54` with no `idx` reassignment: 25 (idx then dies at the copy + again; the target needs `idx` reassigned from `ret`). +- The sweep's 325 compiles (width `u16` counter + do-while, decl moves, block/do-while wrappers, param copies): 23. + +## (f) Where the method fell short +The residual's "register pairs" line (s5->s3, s3->v1) reads as a register permutation; the fact is a missing pseudo +(COUNT 205 vs 207). METHOD step 2 ("COUNT FIRST") was the right entry; the S103 c-list "a copy cse deleted because the +producer sat immediately before it" named the class — the only new part is that the fix is moving the copy past a branch. + +## (g) Structs +No. `Snd54`/`Rec12` are already structs; the decision is cse's register-copy canonicalisation, not an aggregate/scalar +alias question, and no field access is involved in the defect. diff --git a/.run/P36/delever/calibration.json b/.run/P36/delever/calibration.json index ab032c23d..8fcc4bf30 100644 --- a/.run/P36/delever/calibration.json +++ b/.run/P36/delever/calibration.json @@ -1,7 +1,7 @@ { - "head": "8a344a8c3", + "head": "8cdc07612", "stamp": "15956e4a96c4", - "generated": "2026-09-11 02:28", + "generated": "2026-09-11 02:33", "aliases": [ "main", "ov_SC03_014", @@ -21,206 +21,206 @@ "main": { "objects": 85, "identical": 85, - "seconds": 6.401, - "mean_s": 0.075 + "seconds": 6.5950000000000015, + "mean_s": 0.078 }, "ov_SC03_014": { "objects": 32, "identical": 32, - "seconds": 4.447999999999999, - "mean_s": 0.139 + "seconds": 4.468999999999999, + "mean_s": 0.14 }, "ov_SC03_015": { "objects": 32, "identical": 32, - "seconds": 4.4670000000000005, - "mean_s": 0.14 + "seconds": 4.237999999999999, + "mean_s": 0.132 }, "ov_SC04_011": { "objects": 28, "identical": 28, - "seconds": 3.9239999999999995, - "mean_s": 0.14 + "seconds": 3.7610000000000006, + "mean_s": 0.134 } }, "per_object_seconds": { - "build/src/800.o": 0.695, - "build/src/800_b.o": 0.101, - "build/src/800_b_2.o": 0.296, - "build/src/800_b_o0a.o": 0.06, - "build/src/800_c.o": 0.191, - "build/src/800b2.o": 0.066, - "build/src/apicard1.o": 0.07, - "build/src/apicard2.o": 0.071, - "build/src/apicard3.o": 0.071, - "build/src/apicard4.o": 0.077, - "build/src/apicard5.o": 0.058, - "build/src/apicard6.o": 0.071, - "build/src/apicard7.o": 0.058, - "build/src/boot.o": 0.083, - "build/src/gap.o": 0.065, - "build/src/libapi1.o": 0.071, - "build/src/libapi2.o": 0.062, + "build/src/800.o": 0.717, + "build/src/800_b.o": 0.071, + "build/src/800_b_2.o": 0.265, + "build/src/800_b_o0a.o": 0.069, + "build/src/800_c.o": 0.183, + "build/src/800b2.o": 0.076, + "build/src/apicard1.o": 0.069, + "build/src/apicard2.o": 0.08, + "build/src/apicard3.o": 0.063, + "build/src/apicard4.o": 0.065, + "build/src/apicard5.o": 0.069, + "build/src/apicard6.o": 0.07, + "build/src/apicard7.o": 0.084, + "build/src/boot.o": 0.087, + "build/src/gap.o": 0.066, + "build/src/libapi1.o": 0.086, + "build/src/libapi2.o": 0.058, "build/src/libc2_1.o": 0.06, - "build/src/libc2_2.o": 0.061, - "build/src/libcd1.o": 0.066, - "build/src/libcd2.o": 0.064, - "build/src/libetc.o": 0.06, - "build/src/libgpu.o": 0.068, - "build/src/libgpu2.o": 0.075, - "build/src/libgs1.o": 0.059, - "build/src/libgs2.o": 0.058, - "build/src/libgs3.o": 0.056, - "build/src/libgs4.o": 0.061, - "build/src/libgs5.o": 0.063, - "build/src/libgs6.o": 0.07, - "build/src/libgs7.o": 0.058, - "build/src/libgs8.o": 0.06, - "build/src/libgte1.o": 0.065, - "build/src/libgte10.o": 0.065, - "build/src/libgte11.o": 0.059, - "build/src/libgte12.o": 0.06, - "build/src/libgte13.o": 0.057, - "build/src/libgte14.o": 0.051, - "build/src/libgte15.o": 0.068, - "build/src/libgte16.o": 0.066, - "build/src/libgte17.o": 0.063, - "build/src/libgte18.o": 0.063, - "build/src/libgte19.o": 0.06, - "build/src/libgte2.o": 0.059, - "build/src/libgte20.o": 0.058, - "build/src/libgte21.o": 0.058, - "build/src/libgte22.o": 0.059, - "build/src/libgte23.o": 0.056, + "build/src/libc2_2.o": 0.06, + "build/src/libcd1.o": 0.072, + "build/src/libcd2.o": 0.058, + "build/src/libetc.o": 0.067, + "build/src/libgpu.o": 0.057, + "build/src/libgpu2.o": 0.066, + "build/src/libgs1.o": 0.069, + "build/src/libgs2.o": 0.084, + "build/src/libgs3.o": 0.064, + "build/src/libgs4.o": 0.052, + "build/src/libgs5.o": 0.062, + "build/src/libgs6.o": 0.078, + "build/src/libgs7.o": 0.061, + "build/src/libgs8.o": 0.058, + "build/src/libgte1.o": 0.061, + "build/src/libgte10.o": 0.056, + "build/src/libgte11.o": 0.061, + "build/src/libgte12.o": 0.058, + "build/src/libgte13.o": 0.06, + "build/src/libgte14.o": 0.057, + "build/src/libgte15.o": 0.056, + "build/src/libgte16.o": 0.056, + "build/src/libgte17.o": 0.061, + "build/src/libgte18.o": 0.064, + "build/src/libgte19.o": 0.059, + "build/src/libgte2.o": 0.063, + "build/src/libgte20.o": 0.067, + "build/src/libgte21.o": 0.063, + "build/src/libgte22.o": 0.061, + "build/src/libgte23.o": 0.085, "build/src/libgte24.o": 0.061, "build/src/libgte25.o": 0.067, - "build/src/libgte26.o": 0.061, - "build/src/libgte27.o": 0.065, - "build/src/libgte28.o": 0.06, - "build/src/libgte29.o": 0.061, - "build/src/libgte3.o": 0.058, - "build/src/libgte30.o": 0.057, - "build/src/libgte4.o": 0.062, - "build/src/libgte5.o": 0.06, - "build/src/libgte6.o": 0.06, - "build/src/libgte7.o": 0.061, - "build/src/libgte8.o": 0.062, - "build/src/libgte9.o": 0.068, - "build/src/libmcrd1.o": 0.072, - "build/src/libmcrd2.o": 0.057, - "build/src/libpad1.o": 0.065, - "build/src/libpad2.o": 0.068, - "build/src/sgap.o": 0.062, - "build/src/sgap_2.o": 0.059, - "build/src/sgap_3.o": 0.062, - "build/src/sgap_4.o": 0.064, - "build/src/sgap_5.o": 0.06, - "build/src/sgap_6.o": 0.066, - "build/src/sgap_8.o": 0.067, - "build/src/snd1.o": 0.07, - "build/src/snd10.o": 0.064, - "build/src/snd11.o": 0.057, - "build/src/snd12.o": 0.06, - "build/src/snd2.o": 0.069, + "build/src/libgte26.o": 0.054, + "build/src/libgte27.o": 0.081, + "build/src/libgte28.o": 0.067, + "build/src/libgte29.o": 0.059, + "build/src/libgte3.o": 0.063, + "build/src/libgte30.o": 0.065, + "build/src/libgte4.o": 0.065, + "build/src/libgte5.o": 0.064, + "build/src/libgte6.o": 0.064, + "build/src/libgte7.o": 0.055, + "build/src/libgte8.o": 0.058, + "build/src/libgte9.o": 0.056, + "build/src/libmcrd1.o": 0.085, + "build/src/libmcrd2.o": 0.069, + "build/src/libpad1.o": 0.058, + "build/src/libpad2.o": 0.097, + "build/src/sgap.o": 0.081, + "build/src/sgap_2.o": 0.062, + "build/src/sgap_3.o": 0.069, + "build/src/sgap_4.o": 0.068, + "build/src/sgap_5.o": 0.068, + "build/src/sgap_6.o": 0.062, + "build/src/sgap_8.o": 0.06, + "build/src/snd1.o": 0.075, + "build/src/snd10.o": 0.069, + "build/src/snd11.o": 0.066, + "build/src/snd12.o": 0.064, + "build/src/snd2.o": 0.073, "build/src/snd3.o": 0.064, - "build/src/snd4.o": 0.06, - "build/src/snd5.o": 0.058, - "build/src/snd6.o": 0.077, - "build/src/snd7.o": 0.061, - "build/src/snd8.o": 0.056, - "build/src/snd9.o": 0.068, - "build/src/ov_SC03_014/ov_SC03_014.o": 0.124, - "build/src/ov_SC03_014/ov_SC03_014_after.o": 0.506, - "build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o": 0.373, - "build/src/ov_SC03_014/ov_SC03_014_jr_80135888.o": 0.055, - "build/src/ov_SC03_014/ov_SC03_014_jr_80135A4C.o": 0.059, - "build/src/ov_SC03_014/ov_SC03_014_jr_80135D20.o": 0.115, - "build/src/ov_SC03_014/ov_SC03_014_jr_801380E0.o": 0.156, - "build/src/ov_SC03_014/ov_SC03_014_jr_8013C98C.o": 0.113, - "build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o": 0.081, - "build/src/ov_SC03_014/ov_SC03_014_jr_8013FFD8.o": 0.067, - "build/src/ov_SC03_014/ov_SC03_014_jr_80140608.o": 0.158, - "build/src/ov_SC03_014/ov_SC03_014_jr_8015444C.o": 0.074, - "build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o": 0.172, - "build/src/ov_SC03_014/ov_SC03_014_jr_801588CC.o": 0.093, - "build/src/ov_SC03_014/ov_SC03_014_jr_80159C84.o": 0.062, - "build/src/ov_SC03_014/ov_SC03_014_jr_8015A3C8.o": 0.07, - "build/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.o": 0.081, - "build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o": 0.463, - "build/src/ov_SC03_014/ov_SC03_014_jr_8016AB6C.o": 0.245, - "build/src/ov_SC03_014/ov_SC03_014_jr_80171B4C.o": 0.078, - "build/src/ov_SC03_014/ov_SC03_014_jr_801734BC.o": 0.208, - "build/src/ov_SC03_014/ov_SC03_014_jr_801789AC.o": 0.054, - "build/src/ov_SC03_014/ov_SC03_014_jr_80178D40.o": 0.101, - "build/src/ov_SC03_014/ov_SC03_014_jr_8017A4AC.o": 0.06, - "build/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.o": 0.164, - "build/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.o": 0.195, - "build/src/ov_SC03_014/ov_SC03_014_jr_80184440.o": 0.048, - "build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o": 0.241, - "build/src/ov_SC03_014/ov_SC03_014_o0b.o": 0.06, + "build/src/snd4.o": 0.063, + "build/src/snd5.o": 0.065, + "build/src/snd6.o": 0.074, + "build/src/snd7.o": 0.069, + "build/src/snd8.o": 0.059, + "build/src/snd9.o": 0.062, + "build/src/ov_SC03_014/ov_SC03_014.o": 0.133, + "build/src/ov_SC03_014/ov_SC03_014_after.o": 0.505, + "build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o": 0.38, + "build/src/ov_SC03_014/ov_SC03_014_jr_80135888.o": 0.058, + "build/src/ov_SC03_014/ov_SC03_014_jr_80135A4C.o": 0.065, + "build/src/ov_SC03_014/ov_SC03_014_jr_80135D20.o": 0.124, + "build/src/ov_SC03_014/ov_SC03_014_jr_801380E0.o": 0.149, + "build/src/ov_SC03_014/ov_SC03_014_jr_8013C98C.o": 0.121, + "build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o": 0.073, + "build/src/ov_SC03_014/ov_SC03_014_jr_8013FFD8.o": 0.065, + "build/src/ov_SC03_014/ov_SC03_014_jr_80140608.o": 0.172, + "build/src/ov_SC03_014/ov_SC03_014_jr_8015444C.o": 0.071, + "build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o": 0.162, + "build/src/ov_SC03_014/ov_SC03_014_jr_801588CC.o": 0.083, + "build/src/ov_SC03_014/ov_SC03_014_jr_80159C84.o": 0.069, + "build/src/ov_SC03_014/ov_SC03_014_jr_8015A3C8.o": 0.066, + "build/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.o": 0.085, + "build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o": 0.447, + "build/src/ov_SC03_014/ov_SC03_014_jr_8016AB6C.o": 0.242, + "build/src/ov_SC03_014/ov_SC03_014_jr_80171B4C.o": 0.098, + "build/src/ov_SC03_014/ov_SC03_014_jr_801734BC.o": 0.192, + "build/src/ov_SC03_014/ov_SC03_014_jr_801789AC.o": 0.057, + "build/src/ov_SC03_014/ov_SC03_014_jr_80178D40.o": 0.099, + "build/src/ov_SC03_014/ov_SC03_014_jr_8017A4AC.o": 0.066, + "build/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.o": 0.155, + "build/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.o": 0.18, + "build/src/ov_SC03_014/ov_SC03_014_jr_80184440.o": 0.046, + "build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o": 0.276, + "build/src/ov_SC03_014/ov_SC03_014_o0b.o": 0.052, "build/src/ov_SC03_014/ov_SC03_014_o0c.o": 0.055, - "build/src/ov_SC03_014/ov_SC03_014_o0d.o": 0.051, + "build/src/ov_SC03_014/ov_SC03_014_o0d.o": 0.057, "build/src/ov_SC03_014/ov_SC03_014_o0e.o": 0.066, - "build/src/ov_SC03_015/ov_SC03_015.o": 0.119, - "build/src/ov_SC03_015/ov_SC03_015_after.o": 0.506, - "build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o": 0.379, - "build/src/ov_SC03_015/ov_SC03_015_jr_80135888.o": 0.049, - "build/src/ov_SC03_015/ov_SC03_015_jr_80135A4C.o": 0.051, - "build/src/ov_SC03_015/ov_SC03_015_jr_80135D20.o": 0.121, - "build/src/ov_SC03_015/ov_SC03_015_jr_801380E0.o": 0.14, - "build/src/ov_SC03_015/ov_SC03_015_jr_8013C98C.o": 0.115, + "build/src/ov_SC03_015/ov_SC03_015.o": 0.11, + "build/src/ov_SC03_015/ov_SC03_015_after.o": 0.479, + "build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o": 0.368, + "build/src/ov_SC03_015/ov_SC03_015_jr_80135888.o": 0.051, + "build/src/ov_SC03_015/ov_SC03_015_jr_80135A4C.o": 0.048, + "build/src/ov_SC03_015/ov_SC03_015_jr_80135D20.o": 0.116, + "build/src/ov_SC03_015/ov_SC03_015_jr_801380E0.o": 0.133, + "build/src/ov_SC03_015/ov_SC03_015_jr_8013C98C.o": 0.105, "build/src/ov_SC03_015/ov_SC03_015_jr_8013F350.o": 0.069, - "build/src/ov_SC03_015/ov_SC03_015_jr_8013FFD8.o": 0.06, - "build/src/ov_SC03_015/ov_SC03_015_jr_80140608.o": 0.157, - "build/src/ov_SC03_015/ov_SC03_015_jr_8015444C.o": 0.068, - "build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o": 0.164, - "build/src/ov_SC03_015/ov_SC03_015_jr_801588CC.o": 0.08, - "build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o": 0.067, - "build/src/ov_SC03_015/ov_SC03_015_jr_8015A3C8.o": 0.07, - "build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o": 0.092, - "build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o": 0.466, - "build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o": 0.248, - "build/src/ov_SC03_015/ov_SC03_015_jr_80171B4C.o": 0.096, - "build/src/ov_SC03_015/ov_SC03_015_jr_801734BC.o": 0.206, - "build/src/ov_SC03_015/ov_SC03_015_jr_801789AC.o": 0.059, - "build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o": 0.098, - "build/src/ov_SC03_015/ov_SC03_015_jr_8017A4AC.o": 0.065, - "build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o": 0.166, - "build/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.o": 0.198, - "build/src/ov_SC03_015/ov_SC03_015_jr_80184440.o": 0.05, - "build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o": 0.272, + "build/src/ov_SC03_015/ov_SC03_015_jr_8013FFD8.o": 0.051, + "build/src/ov_SC03_015/ov_SC03_015_jr_80140608.o": 0.161, + "build/src/ov_SC03_015/ov_SC03_015_jr_8015444C.o": 0.065, + "build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o": 0.155, + "build/src/ov_SC03_015/ov_SC03_015_jr_801588CC.o": 0.087, + "build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o": 0.061, + "build/src/ov_SC03_015/ov_SC03_015_jr_8015A3C8.o": 0.057, + "build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o": 0.074, + "build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o": 0.443, + "build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o": 0.244, + "build/src/ov_SC03_015/ov_SC03_015_jr_80171B4C.o": 0.098, + "build/src/ov_SC03_015/ov_SC03_015_jr_801734BC.o": 0.167, + "build/src/ov_SC03_015/ov_SC03_015_jr_801789AC.o": 0.056, + "build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o": 0.091, + "build/src/ov_SC03_015/ov_SC03_015_jr_8017A4AC.o": 0.062, + "build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o": 0.155, + "build/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.o": 0.187, + "build/src/ov_SC03_015/ov_SC03_015_jr_80184440.o": 0.042, + "build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o": 0.263, "build/src/ov_SC03_015/ov_SC03_015_o0b.o": 0.062, - "build/src/ov_SC03_015/ov_SC03_015_o0c.o": 0.055, - "build/src/ov_SC03_015/ov_SC03_015_o0d.o": 0.054, - "build/src/ov_SC03_015/ov_SC03_015_o0e.o": 0.065, - "build/src/ov_SC04_011/ov_SC04_011.o": 0.113, - "build/src/ov_SC04_011/ov_SC04_011_after.o": 0.426, - "build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o": 0.34, - "build/src/ov_SC04_011/ov_SC04_011_jr_80135888.o": 0.044, - "build/src/ov_SC04_011/ov_SC04_011_jr_80135A4C.o": 0.054, - "build/src/ov_SC04_011/ov_SC04_011_jr_80135D20.o": 0.119, - "build/src/ov_SC04_011/ov_SC04_011_jr_801380E0.o": 0.147, - "build/src/ov_SC04_011/ov_SC04_011_jr_8013C98C.o": 0.104, - "build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o": 0.076, - "build/src/ov_SC04_011/ov_SC04_011_jr_8013FFD8.o": 0.062, - "build/src/ov_SC04_011/ov_SC04_011_jr_80140608.o": 0.176, - "build/src/ov_SC04_011/ov_SC04_011_jr_8015444C.o": 0.072, - "build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o": 0.162, - "build/src/ov_SC04_011/ov_SC04_011_jr_801588CC.o": 0.089, - "build/src/ov_SC04_011/ov_SC04_011_jr_80159C84.o": 0.063, - "build/src/ov_SC04_011/ov_SC04_011_jr_8015A3C8.o": 0.068, - "build/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.o": 0.097, - "build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o": 0.352, - "build/src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.o": 0.22, - "build/src/ov_SC04_011/ov_SC04_011_jr_80171B4C.o": 0.104, - "build/src/ov_SC04_011/ov_SC04_011_jr_801734BC.o": 0.171, - "build/src/ov_SC04_011/ov_SC04_011_jr_801789AC.o": 0.06, - "build/src/ov_SC04_011/ov_SC04_011_jr_80178D40.o": 0.089, - "build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.07, - "build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.11, - "build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.428, + "build/src/ov_SC03_015/ov_SC03_015_o0c.o": 0.058, + "build/src/ov_SC03_015/ov_SC03_015_o0d.o": 0.053, + "build/src/ov_SC03_015/ov_SC03_015_o0e.o": 0.067, + "build/src/ov_SC04_011/ov_SC04_011.o": 0.118, + "build/src/ov_SC04_011/ov_SC04_011_after.o": 0.425, + "build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o": 0.319, + "build/src/ov_SC04_011/ov_SC04_011_jr_80135888.o": 0.05, + "build/src/ov_SC04_011/ov_SC04_011_jr_80135A4C.o": 0.045, + "build/src/ov_SC04_011/ov_SC04_011_jr_80135D20.o": 0.116, + "build/src/ov_SC04_011/ov_SC04_011_jr_801380E0.o": 0.14, + "build/src/ov_SC04_011/ov_SC04_011_jr_8013C98C.o": 0.11, + "build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o": 0.064, + "build/src/ov_SC04_011/ov_SC04_011_jr_8013FFD8.o": 0.059, + "build/src/ov_SC04_011/ov_SC04_011_jr_80140608.o": 0.159, + "build/src/ov_SC04_011/ov_SC04_011_jr_8015444C.o": 0.066, + "build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o": 0.164, + "build/src/ov_SC04_011/ov_SC04_011_jr_801588CC.o": 0.084, + "build/src/ov_SC04_011/ov_SC04_011_jr_80159C84.o": 0.059, + "build/src/ov_SC04_011/ov_SC04_011_jr_8015A3C8.o": 0.065, + "build/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.o": 0.091, + "build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o": 0.346, + "build/src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.o": 0.205, + "build/src/ov_SC04_011/ov_SC04_011_jr_80171B4C.o": 0.087, + "build/src/ov_SC04_011/ov_SC04_011_jr_801734BC.o": 0.162, + "build/src/ov_SC04_011/ov_SC04_011_jr_801789AC.o": 0.054, + "build/src/ov_SC04_011/ov_SC04_011_jr_80178D40.o": 0.083, + "build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.059, + "build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.098, + "build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.431, "build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.054, - "build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.054 + "build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.048 }, "ok": true, "seconds": 2.2 diff --git a/.run/P36/delever/ledger.jsonl b/.run/P36/delever/ledger.jsonl index bf32a4975..24e062a7d 100644 --- a/.run/P36/delever/ledger.jsonl +++ b/.run/P36/delever/ledger.jsonl @@ -29433,3 +29433,4 @@ {"ts": "2026-09-11 02:27:46", "label": "s104_e14", "rung": "E", "calib": {"head": "42d3f035e", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c", "fn": "func_8017BEBC", "addr": 2149039804, "aliases": null, "header": false, "includers": 0, "nhash_before": "62628c1d831a73cef4e51f4db31a535b30e9735a", "nhash_after": "da24a5185aee342b1774b9e958d338764d96ad96", "source": ".run/P36/agents/ov_SC06_010__func_8017BEBC/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.26, "objects": ["build/src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.o"], "before_text": "void func_8017BEBC(s32 arg0)\n{\n XDV2 tmpxy[4];\n XSV2 box[8];\n XSV2 sxy[8];\n XV8 vt[3];\n XV8 vd8;\n XMTX2 mtx;\n struct { long otz, flag, opz, sz0, sz1, sz2, sz3; } g;\n\n s32 lim;\n s32 nparts;\n XV8 *vtp;\n s32 j;\n u32 nprim;\n u32 i;\n XPart *part;\n XPrim *prim;\n u8 *pkt;\n u32 ot;\n u8 *vtx;\n u8 *vd;\n u8 *va, *vb, *vc;\n u32 w;\n u32 m24;\n s32 code;\n u32 wx, wy, wz, wzh;\n s32 xa32, xb32, t32;\n s32 xmn1, xmx1, xmn2, xmx2;\n s32 mnc, mxc;\n s16 my, mny, mx, mn;\n\n if (*(s32 *)arg0 != 0) {\n return;\n }\n\n lim = func_800491EC() + *(s32 *)(arg0 + 0x64);\n func_800547D8(arg0 + 0x10, &mtx);\n func_80052E38(&mtx);\n\n pkt = D_800A5E60;\n part = *(XPart **)(arg0 + 0xC);\n nparts = *(s32 *)(*(s32 *)(arg0 + 8) + 8);\n vtx = *(u8 **)(*(s32 *)(arg0 + 8) + 0x10);\n ot = (u32)&D_800A6610[(*(u16 *)&D_800B9A02) << 14];\n\n for (j = 0; j < nparts; j++, part++) {\n vtp = &vt[0];\n wx = part->xx;\n mn = wx;\n mx = wx >> 16;\n wy = part->yy;\n mny = wy;\n my = wy >> 16;\n wz = part->zz;\n wzh = wz >> 16;\n box[0].vx = mn; box[0].vy = mny; box[0].vz = wz;\n box[1].vx = mx; box[1].vy = mny; box[1].vz = wz;\n box[2].vx = mn; box[2].vy = mny; box[2].vz = wzh;\n box[3].vx = mx; box[3].vy = mny; box[3].vz = wzh;\n\n gte_ldv3c(&box[0]);\n gte_rtpt();\n gte_stsxy3(&sxy[0], &sxy[1], &sxy[2]);\n gte_ldv0(&box[3]);\n gte_rtps();\n box[4].vx = mn; box[4].vy = my; box[4].vz = wz;\n box[5].vx = mx; box[5].vy = my; box[5].vz = wz;\n box[6].vx = mn; box[6].vy = my; box[6].vz = wzh;\n box[7].vx = mx; box[7].vy = my; box[7].vz = wzh;\n gte_stsxy(&sxy[3]);\n gte_ldv3c(&box[4]);\n gte_rtpt();\n gte_stsxy3(&sxy[4], &sxy[5], &sxy[6]);\n gte_ldv0(&box[7]);\n gte_rtps();\n gte_stsxy(&sxy[7]);\n gte_stszotz(&g.otz);\n\n if (lim >= g.otz) {\n xa32 = sxy[0].vx;\n xb32 = sxy[1].vx;\n if (xb32 < xa32) { xmx1 = xa32; xmn1 = xb32; } else { xmn1 = xa32; xmx1 = xb32; }\n t32 = sxy[2].vx;\n if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32;\n t32 = sxy[3].vx;\n if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32;\n xa32 = sxy[4].vx;\n xb32 = sxy[5].vx;\n if (xb32 < xa32) { xmx2 = xa32; xmn2 = xb32; } else { xmn2 = xa32; xmx2 = xb32; }\n t32 = sxy[6].vx;\n if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32;\n t32 = sxy[7].vx;\n if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32;\n mnc = xmn1;\n if (xmn2 < xmn1) mnc = xmn2;\n mxc = xmx1;\n if (mxc < xmx2) mxc = xmx2;\n if ((s16)mxc >= -0xA0 && (s16)mnc < 0xA1) {\n xa32 = sxy[0].vy;\n xb32 = sxy[1].vy;\n if (xb32 < xa32) { xmx1 = xa32; xmn1 = xb32; } else { xmn1 = xa32; xmx1 = xb32; }\n t32 = sxy[2].vy;\n if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32;\n t32 = sxy[3].vy;\n if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32;\n xa32 = sxy[4].vy;\n xb32 = sxy[5].vy;\n if (xb32 < xa32) { xmx2 = xa32; xmn2 = xb32; } else { xmn2 = xa32; xmx2 = xb32; }\n t32 = sxy[6].vy;\n if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32;\n t32 = sxy[7].vy;\n if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32;\n mnc = xmn1;\n if (xmn2 < xmn1) mnc = xmn2;\n mxc = xmx1;\n if (mxc < xmx2) mxc = xmx2;\n if ((s16)mxc >= -0x6E && (s16)mnc < 0x6F) {\n prim = (XPrim *)part->prim;\n nprim = part->nprim;\n i = 0;\n if (i >= nprim) goto noprim;\n m24 = 0xFFFFFF;\n do {\n w = prim->w1;\n va = vtx + (w & 0xFFFF);\n vb = vtx + (w >> 16);\n w = prim->w2;\n vt[0] = *(XV8 *)va;\n vt[1] = *(XV8 *)vb;\n vc = vtx + (w & 0xFFFF);\n w = w >> 16;\n vt[2] = *(XV8 *)vc;\n gte_ldv3c(vtp);\n gte_rtpt();\n gte_stflg(&g.flag);\n if (!(g.flag & 0x7F85E000)) {\n gte_nclip();\n code = w & 7;\n vd = vtx + (w & 0xFFF8);\n gte_stopz(&g.opz);\n if (g.opz > 0) {\n switch (code) {\n case 6:\n case 7:\n gte_stsxy3_ft3(pkt);\n gte_stsz3(&g.sz0, &g.sz1, &g.sz2);\n if (((XFT3 *)pkt)->x0 > ((XFT3 *)pkt)->x1) {\n mx = ((XFT3 *)pkt)->x0;\n mn = ((XFT3 *)pkt)->x1;\n } else {\n mn = ((XFT3 *)pkt)->x0;\n mx = ((XFT3 *)pkt)->x1;\n }\n if (((XFT3 *)pkt)->x2 > mx) mx = ((XFT3 *)pkt)->x2;\n else if (((XFT3 *)pkt)->x2 < mn) mn = ((XFT3 *)pkt)->x2;\n if (mx >= -0xA0 && mn < 0xA1) {\n if (((XFT3 *)pkt)->y0 > ((XFT3 *)pkt)->y1) {\n my = ((XFT3 *)pkt)->y0;\n mny = ((XFT3 *)pkt)->y1;\n } else {\n mny = ((XFT3 *)pkt)->y0;\n my = ((XFT3 *)pkt)->y1;\n }\n if (((XFT3 *)pkt)->y2 > my) my = ((XFT3 *)pkt)->y2;\n else if (((XFT3 *)pkt)->y2 < mny) mny = ((XFT3 *)pkt)->y2;\n if (my >= -0x6E && mny < 0x6F) {\n s32 za, tz, q, rgb;\n u32 *otp;\n u32 *tp;\n if (g.sz0 > g.sz1) {\n za = g.sz0;\n if (za < g.sz2) za = g.sz2;\n } else {\n za = g.sz1;\n if (za < g.sz2) za = g.sz2;\n }\n g.opz = za;\n if (code == 7) g.opz = za + 0x200;\n tz = g.opz;\n tp = (u32 *)prim->w0;\n q = 0x80 - (tz - 0x190) / 24;\n if (q < 0) q = 0;\n rgb = q | (q << 8) | (q << 16);\n ((XFT3 *)pkt)->rgbc = (tp[0] & 0xFF000000) | rgb;\n ((XFT3 *)pkt)->uvc0 = tp[1];\n ((XFT3 *)pkt)->uvp1 = tp[2];\n ((XFT3 *)pkt)->uv2 = tp[3];\n otp = (u32 *)(((tz >> 2) << 2) + ot);\n *(u32 *)pkt = (*otp & m24) | 0x7000000;\n *otp = (*otp & 0xFF000000) | ((u32)pkt & m24);\n pkt += 0x20;\n }\n }\n break;\n case 2:\n case 3:\n gte_stsxy3c(&tmpxy[0]);\n vd8 = *(XV8 *)vd;\n gte_ldv0(&vd8);\n gte_rtps();\n if (tmpxy[0].vx > tmpxy[1].vx) {\n mx = tmpxy[0].vx;\n mn = tmpxy[1].vx;\n } else {\n mn = tmpxy[0].vx;\n mx = tmpxy[1].vx;\n }\n if (tmpxy[2].vx > mx) mx = tmpxy[2].vx;\n else if (tmpxy[2].vx < mn) mn = tmpxy[2].vx;\n if (tmpxy[0].vy > tmpxy[1].vy) {\n my = tmpxy[0].vy;\n mny = tmpxy[1].vy;\n } else {\n mny = tmpxy[0].vy;\n my = tmpxy[1].vy;\n }\n if (tmpxy[2].vy > my) my = tmpxy[2].vy;\n else if (tmpxy[2].vy < mny) mny = tmpxy[2].vy;\n gte_stflg(&g.flag);\n if (!(g.flag & 0x7F85E000)) {\n gte_stsz4(&g.sz0, &g.sz1, &g.sz2, &g.sz3);\n gte_stsxy((long *)&((XFT4 *)pkt)->x3);\n if (((XFT4 *)pkt)->x3 < mn) mn = ((XFT4 *)pkt)->x3;\n else if (mx < ((XFT4 *)pkt)->x3) mx = ((XFT4 *)pkt)->x3;\n if (mx >= -0xA0 && mn < 0xA1) {\n if (((XFT4 *)pkt)->y3 < mny) mny = ((XFT4 *)pkt)->y3;\n else if (my < ((XFT4 *)pkt)->y3) my = ((XFT4 *)pkt)->y3;\n if (my >= -0x6E && mny < 0x6F) {\n s32 za, zb, tz, q, rgb;\n u32 *otp;\n u32 *tp;\n u32 uvw;\n zb = g.sz2;\n if (zb < g.sz3) zb = g.sz3;\n za = g.sz0;\n if (za < g.sz1) za = g.sz1;\n if (za < zb) za = zb;\n g.opz = za;\n if (code == 3) g.opz = za + 0x200;\n *(u32 *)&((XFT4 *)pkt)->x0 = *(u32 *)&tmpxy[0];\n *(u32 *)&((XFT4 *)pkt)->x1 = *(u32 *)&tmpxy[1];\n *(u32 *)&((XFT4 *)pkt)->x2 = *(u32 *)&tmpxy[2];\n tz = g.opz;\n tp = (u32 *)prim->w0;\n q = 0x80 - (tz - 0x190) / 24;\n if (q < 0) q = 0;\n rgb = q | (q << 8) | (q << 16);\n ((XFT4 *)pkt)->rgbc = (tp[0] & 0xFF000000) | rgb;\n ((XFT4 *)pkt)->uvc0 = tp[1];\n ((XFT4 *)pkt)->uvp1 = tp[2];\n uvw = tp[3];\n ((XFT4 *)pkt)->uv2 = uvw;\n ((XFT4 *)pkt)->uv3 = uvw >> 16;\n otp = (u32 *)(((tz >> 2) << 2) + ot);\n *(u32 *)pkt = (*otp & m24) | 0x9000000;\n *otp = (*otp & 0xFF000000) | ((u32)pkt & m24);\n pkt += 0x28;\n }\n }\n }\n break;\n }\n }\n }\n i++;\n prim++;\n } while (i < nprim);\n __asm__ __volatile__(\"\" : \"=r\"(m24) : \"0\"(m24)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus7)\n noprim: ;\n }\n }\n }\n }\n D_800A5E60 = pkt;\n}\n", "after_text": "void func_8017BEBC(s32 arg0)\n{\n XDV2 tmpxy[4];\n XSV2 box[8];\n XSV2 sxy[8];\n XV8 vt[3];\n XV8 vd8;\n XMTX2 mtx;\n struct { long otz, flag, opz, sz0, sz1, sz2, sz3; } g;\n\n s32 lim;\n s32 nparts;\n XV8 *vtp;\n s32 j;\n u32 nprim;\n u32 i;\n XPart *part;\n XPrim *prim;\n u8 *pkt;\n u32 ot;\n u8 *vtx;\n u8 *vd;\n u8 *va, *vb, *vc;\n u32 w;\n u32 m24;\n s32 code;\n u32 wx, wy, wz, wzh;\n s32 xa32, xb32, t32;\n s32 xmn1, xmx1, xmn2, xmx2;\n s32 mnc, mxc;\n s16 my, mny, mx, mn;\n\n if (*(s32 *)arg0 != 0) {\n return;\n }\n\n lim = func_800491EC() + *(s32 *)(arg0 + 0x64);\n func_800547D8(arg0 + 0x10, &mtx);\n func_80052E38(&mtx);\n\n pkt = D_800A5E60;\n part = *(XPart **)(arg0 + 0xC);\n nparts = *(s32 *)(*(s32 *)(arg0 + 8) + 8);\n vtx = *(u8 **)(*(s32 *)(arg0 + 8) + 0x10);\n ot = (u32)&D_800A6610[(*(u16 *)&D_800B9A02) << 14];\n\n for (j = 0; j < nparts; j++, part++) {\n vtp = &vt[0];\n wx = part->xx;\n mn = wx;\n mx = wx >> 16;\n wy = part->yy;\n mny = wy;\n my = wy >> 16;\n wz = part->zz;\n wzh = wz >> 16;\n box[0].vx = mn; box[0].vy = mny; box[0].vz = wz;\n box[1].vx = mx; box[1].vy = mny; box[1].vz = wz;\n box[2].vx = mn; box[2].vy = mny; box[2].vz = wzh;\n box[3].vx = mx; box[3].vy = mny; box[3].vz = wzh;\n\n gte_ldv3c(&box[0]);\n gte_rtpt();\n gte_stsxy3(&sxy[0], &sxy[1], &sxy[2]);\n gte_ldv0(&box[3]);\n gte_rtps();\n box[4].vx = mn; box[4].vy = my; box[4].vz = wz;\n box[5].vx = mx; box[5].vy = my; box[5].vz = wz;\n box[6].vx = mn; box[6].vy = my; box[6].vz = wzh;\n box[7].vx = mx; box[7].vy = my; box[7].vz = wzh;\n gte_stsxy(&sxy[3]);\n gte_ldv3c(&box[4]);\n gte_rtpt();\n gte_stsxy3(&sxy[4], &sxy[5], &sxy[6]);\n gte_ldv0(&box[7]);\n gte_rtps();\n gte_stsxy(&sxy[7]);\n gte_stszotz(&g.otz);\n\n if (lim >= g.otz) {\n xa32 = sxy[0].vx;\n xb32 = sxy[1].vx;\n if (xb32 < xa32) { xmx1 = xa32; xmn1 = xb32; } else { xmn1 = xa32; xmx1 = xb32; }\n t32 = sxy[2].vx;\n if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32;\n t32 = sxy[3].vx;\n if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32;\n xa32 = sxy[4].vx;\n xb32 = sxy[5].vx;\n if (xb32 < xa32) { xmx2 = xa32; xmn2 = xb32; } else { xmn2 = xa32; xmx2 = xb32; }\n t32 = sxy[6].vx;\n if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32;\n t32 = sxy[7].vx;\n if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32;\n mnc = xmn1;\n if (xmn2 < xmn1) mnc = xmn2;\n mxc = xmx1;\n if (mxc < xmx2) mxc = xmx2;\n if ((s16)mxc >= -0xA0 && (s16)mnc < 0xA1) {\n xa32 = sxy[0].vy;\n xb32 = sxy[1].vy;\n if (xb32 < xa32) { xmx1 = xa32; xmn1 = xb32; } else { xmn1 = xa32; xmx1 = xb32; }\n t32 = sxy[2].vy;\n if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32;\n t32 = sxy[3].vy;\n if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32;\n xa32 = sxy[4].vy;\n xb32 = sxy[5].vy;\n if (xb32 < xa32) { xmx2 = xa32; xmn2 = xb32; } else { xmn2 = xa32; xmx2 = xb32; }\n t32 = sxy[6].vy;\n if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32;\n t32 = sxy[7].vy;\n if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32;\n mnc = xmn1;\n if (xmn2 < xmn1) mnc = xmn2;\n mxc = xmx1;\n if (mxc < xmx2) mxc = xmx2;\n if ((s16)mxc >= -0x6E && (s16)mnc < 0x6F) {\n prim = (XPrim *)part->prim;\n nprim = part->nprim;\n i = 0;\n if (i >= nprim) goto noprim;\n m24 = 0xFFFFFF;\n do {\n w = prim->w1;\n va = vtx + (w & 0xFFFF);\n vb = vtx + (w >> 16);\n w = prim->w2;\n vt[0] = *(XV8 *)va;\n vt[1] = *(XV8 *)vb;\n vc = vtx + (w & 0xFFFF);\n w = w >> 16;\n vt[2] = *(XV8 *)vc;\n gte_ldv3c(vtp);\n gte_rtpt();\n gte_stflg(&g.flag);\n if (!(g.flag & 0x7F85E000)) {\n gte_nclip();\n code = w & 7;\n vd = vtx + (w & 0xFFF8);\n gte_stopz(&g.opz);\n if (g.opz > 0) {\n switch (code) {\n case 6:\n case 7:\n gte_stsxy3_ft3(pkt);\n gte_stsz3(&g.sz0, &g.sz1, &g.sz2);\n if (((XFT3 *)pkt)->x0 > ((XFT3 *)pkt)->x1) {\n mx = ((XFT3 *)pkt)->x0;\n mn = ((XFT3 *)pkt)->x1;\n } else {\n mn = ((XFT3 *)pkt)->x0;\n mx = ((XFT3 *)pkt)->x1;\n }\n if (((XFT3 *)pkt)->x2 > mx) mx = ((XFT3 *)pkt)->x2;\n else if (((XFT3 *)pkt)->x2 < mn) mn = ((XFT3 *)pkt)->x2;\n if (mx >= -0xA0 && mn < 0xA1) {\n if (((XFT3 *)pkt)->y0 > ((XFT3 *)pkt)->y1) {\n my = ((XFT3 *)pkt)->y0;\n mny = ((XFT3 *)pkt)->y1;\n } else {\n mny = ((XFT3 *)pkt)->y0;\n my = ((XFT3 *)pkt)->y1;\n }\n if (((XFT3 *)pkt)->y2 > my) my = ((XFT3 *)pkt)->y2;\n else if (((XFT3 *)pkt)->y2 < mny) mny = ((XFT3 *)pkt)->y2;\n if (my >= -0x6E && mny < 0x6F) {\n s32 za, tz, q, rgb;\n u32 *otp;\n u32 *tp;\n /* g.opz stored in each arm: post-reload cross-jump merges the two\n * stores back into one, but flow counted both (the &g.sz0/&g.sz1\n * allocno tie then falls the target's way). */\n if (g.sz0 > g.sz1) {\n za = g.sz0;\n if (za < g.sz2) za = g.sz2;\n g.opz = za;\n } else {\n za = g.sz1;\n if (za < g.sz2) za = g.sz2;\n g.opz = za;\n }\n if (code == 7) g.opz = za + 0x200;\n tz = g.opz;\n tp = (u32 *)prim->w0;\n q = 0x80 - (tz - 0x190) / 24;\n if (q < 0) q = 0;\n rgb = q | (q << 8) | (q << 16);\n ((XFT3 *)pkt)->rgbc = (tp[0] & 0xFF000000) | rgb;\n ((XFT3 *)pkt)->uvc0 = tp[1];\n ((XFT3 *)pkt)->uvp1 = tp[2];\n ((XFT3 *)pkt)->uv2 = tp[3];\n otp = (u32 *)(((tz >> 2) << 2) + ot);\n *(u32 *)pkt = (*otp & m24) | 0x7000000;\n *otp = (*otp & 0xFF000000) | ((u32)pkt & m24);\n pkt += 0x20;\n }\n }\n break;\n case 2:\n case 3:\n gte_stsxy3c(&tmpxy[0]);\n vd8 = *(XV8 *)vd;\n gte_ldv0(&vd8);\n gte_rtps();\n if (tmpxy[0].vx > tmpxy[1].vx) {\n mx = tmpxy[0].vx;\n mn = tmpxy[1].vx;\n } else {\n mn = tmpxy[0].vx;\n mx = tmpxy[1].vx;\n }\n if (tmpxy[2].vx > mx) mx = tmpxy[2].vx;\n else if (tmpxy[2].vx < mn) mn = tmpxy[2].vx;\n if (tmpxy[0].vy > tmpxy[1].vy) {\n my = tmpxy[0].vy;\n mny = tmpxy[1].vy;\n } else {\n mny = tmpxy[0].vy;\n my = tmpxy[1].vy;\n }\n if (tmpxy[2].vy > my) my = tmpxy[2].vy;\n else if (tmpxy[2].vy < mny) mny = tmpxy[2].vy;\n gte_stflg(&g.flag);\n if (!(g.flag & 0x7F85E000)) {\n gte_stsz4(&g.sz0, &g.sz1, &g.sz2, &g.sz3);\n gte_stsxy((long *)&((XFT4 *)pkt)->x3);\n if (((XFT4 *)pkt)->x3 < mn) mn = ((XFT4 *)pkt)->x3;\n else if (mx < ((XFT4 *)pkt)->x3) mx = ((XFT4 *)pkt)->x3;\n if (mx >= -0xA0 && mn < 0xA1) {\n if (((XFT4 *)pkt)->y3 < mny) mny = ((XFT4 *)pkt)->y3;\n else if (my < ((XFT4 *)pkt)->y3) my = ((XFT4 *)pkt)->y3;\n if (my >= -0x6E && mny < 0x6F) {\n s32 za, zb, tz, q, rgb;\n u32 *otp;\n u32 *tp;\n u32 uvw;\n zb = g.sz2;\n if (zb < g.sz3) zb = g.sz3;\n za = g.sz0;\n if (za < g.sz1) za = g.sz1;\n if (za < zb) za = zb;\n g.opz = za;\n if (code == 3) g.opz = za + 0x200;\n *(u32 *)&((XFT4 *)pkt)->x0 = *(u32 *)&tmpxy[0];\n *(u32 *)&((XFT4 *)pkt)->x1 = *(u32 *)&tmpxy[1];\n *(u32 *)&((XFT4 *)pkt)->x2 = *(u32 *)&tmpxy[2];\n tz = g.opz;\n tp = (u32 *)prim->w0;\n q = 0x80 - (tz - 0x190) / 24;\n if (q < 0) q = 0;\n rgb = q | (q << 8) | (q << 16);\n ((XFT4 *)pkt)->rgbc = (tp[0] & 0xFF000000) | rgb;\n ((XFT4 *)pkt)->uvc0 = tp[1];\n ((XFT4 *)pkt)->uvp1 = tp[2];\n uvw = tp[3];\n ((XFT4 *)pkt)->uv2 = uvw;\n ((XFT4 *)pkt)->uv3 = uvw >> 16;\n otp = (u32 *)(((tz >> 2) << 2) + ot);\n *(u32 *)pkt = (*otp & m24) | 0x9000000;\n *otp = (*otp & 0xFF000000) | ((u32)pkt & m24);\n pkt += 0x28;\n }\n }\n }\n break;\n }\n }\n }\n i++;\n prim++;\n } while (i < nprim);\n noprim: ;\n }\n }\n }\n }\n D_800A5E60 = pkt;\n}\n"} {"ts": "2026-09-11 02:28:04", "label": "s104_e14", "rung": "E", "calib": {"head": "219feff28", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c", "fn": "func_8017CAD4", "addr": 2149042900, "aliases": null, "header": false, "includers": 0, "nhash_before": "aefeceacd4cb55f0f0ff5441fe97c2a3c1edee22", "nhash_after": "cc90fa84d018d93ce376d74d9bc16ba5892ce5c4", "source": ".run/P36/agents/ov_SC06_010__func_8017CAD4/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.262, "objects": ["build/src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.o"], "before_text": "void func_8017CAD4(s32 *ctx, s32 *model, s32 mtxsrc)\n{\n XDV2 tmpxy[4];\n XSV2 box[8];\n XSV2 sxy[8];\n XV8 vt[3];\n XV8 vd8;\n XMTX2 mtx;\n struct { long otz, flag, opz, sz0, sz1, sz2, sz3; } g;\n\n s32 lim;\n s32 cl;\n s32 nparts;\n XV8 *vtp;\n s32 j;\n u32 nprim;\n u32 i;\n XPart *part;\n XPrim *prim;\n u8 *pkt;\n u32 ot;\n u8 *vtx;\n u8 *vd;\n u8 *va, *vb, *vc;\n u32 w;\n u32 m24;\n s32 code;\n u32 wx, wy, wz, wzh;\n s32 xa32, xb32, t32;\n s32 xmn1, xmx1, xmn2, xmx2;\n s32 mnc, mxc;\n s16 my, mny, mx, mn;\n\n if (*ctx != 0) {\n return;\n }\n\n lim = func_800491EC() + *(s32 *)((u8 *)ctx + 0x64);\n func_800547D8(mtxsrc, &mtx);\n func_80052E38(&mtx);\n\n pkt = D_800A5E60;\n part = (XPart *)((u8 *)model + 0x14);\n nparts = *(s32 *)((u8 *)model + 8);\n vtx = *(u8 **)((u8 *)model + 0x10);\n ot = (u32)&D_800A6610[(*(u16 *)&D_800B9A02) << 14];\n\n for (j = 0; j < nparts; j++, part++) {\n vtp = &vt[0];\n wx = part->xx;\n mn = wx;\n mx = wx >> 16;\n wy = part->yy;\n mny = wy;\n my = wy >> 16;\n wz = part->zz;\n wzh = wz >> 16;\n box[0].vx = mn; box[0].vy = mny; box[0].vz = wz;\n box[1].vx = mx; box[1].vy = mny; box[1].vz = wz;\n box[2].vx = mn; box[2].vy = mny; box[2].vz = wzh;\n box[3].vx = mx; box[3].vy = mny; box[3].vz = wzh;\n\n gte_ldv3c(&box[0]);\n gte_rtpt();\n gte_stsxy3(&sxy[0], &sxy[1], &sxy[2]);\n gte_ldv0(&box[3]);\n gte_rtps();\n box[4].vx = mn; box[4].vy = my; box[4].vz = wz;\n box[5].vx = mx; box[5].vy = my; box[5].vz = wz;\n box[6].vx = mn; box[6].vy = my; box[6].vz = wzh;\n box[7].vx = mx; box[7].vy = my; box[7].vz = wzh;\n gte_stsxy(&sxy[3]);\n gte_ldv3c(&box[4]);\n gte_rtpt();\n gte_stsxy3(&sxy[4], &sxy[5], &sxy[6]);\n gte_ldv0(&box[7]);\n gte_rtps();\n gte_stsxy(&sxy[7]);\n gte_stszotz(&g.otz);\n\n if (lim >= g.otz) {\n xa32 = sxy[0].vx;\n xb32 = sxy[1].vx;\n if (xb32 < xa32) { xmx1 = xa32; xmn1 = xb32; } else { xmn1 = xa32; xmx1 = xb32; }\n t32 = sxy[2].vx;\n if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32;\n t32 = sxy[3].vx;\n if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32;\n xa32 = sxy[4].vx;\n xb32 = sxy[5].vx;\n if (xb32 < xa32) { xmx2 = xa32; xmn2 = xb32; } else { xmn2 = xa32; xmx2 = xb32; }\n t32 = sxy[6].vx;\n if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32;\n t32 = sxy[7].vx;\n if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32;\n mnc = xmn1;\n if (xmn2 < xmn1) mnc = xmn2;\n mxc = xmx1;\n if (mxc < xmx2) mxc = xmx2;\n if ((s16)mxc >= -0xA0 && (s16)mnc < 0xA1) {\n xa32 = sxy[0].vy;\n xb32 = sxy[1].vy;\n if (xb32 < xa32) { xmx1 = xa32; xmn1 = xb32; } else { xmn1 = xa32; xmx1 = xb32; }\n t32 = sxy[2].vy;\n if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32;\n t32 = sxy[3].vy;\n if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32;\n xa32 = sxy[4].vy;\n xb32 = sxy[5].vy;\n if (xb32 < xa32) { xmx2 = xa32; xmn2 = xb32; } else { xmn2 = xa32; xmx2 = xb32; }\n t32 = sxy[6].vy;\n if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32;\n t32 = sxy[7].vy;\n if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32;\n mnc = xmn1;\n if (xmn2 < xmn1) mnc = xmn2;\n mxc = xmx1;\n if (mxc < xmx2) mxc = xmx2;\n if ((s16)mxc >= -0x6E && (s16)mnc < 0x6F) {\n prim = (XPrim *)part->prim;\n nprim = part->nprim;\n i = 0;\n if (i >= nprim) goto noprim;\n m24 = 0xFFFFFF;\n do {\n w = prim->w1;\n va = vtx + (w & 0xFFFF);\n vb = vtx + (w >> 16);\n w = prim->w2;\n vt[0] = *(XV8 *)va;\n vt[1] = *(XV8 *)vb;\n vc = vtx + (w & 0xFFFF);\n w = w >> 16;\n vt[2] = *(XV8 *)vc;\n gte_ldv3c(vtp);\n gte_rtpt();\n gte_stflg(&g.flag);\n if (!(g.flag & 0x7F85E000)) {\n gte_nclip();\n code = w & 7;\n vd = vtx + (w & 0xFFF8);\n gte_stopz(&g.opz);\n if (g.opz > 0) {\n switch (code) {\n case 6:\n case 7:\n gte_stsxy3_ft3(pkt);\n gte_stsz3(&g.sz0, &g.sz1, &g.sz2);\n if (((XFT3 *)pkt)->x0 > ((XFT3 *)pkt)->x1) {\n mx = ((XFT3 *)pkt)->x0;\n mn = ((XFT3 *)pkt)->x1;\n } else {\n mn = ((XFT3 *)pkt)->x0;\n mx = ((XFT3 *)pkt)->x1;\n }\n if (((XFT3 *)pkt)->x2 > mx) mx = ((XFT3 *)pkt)->x2;\n else if (((XFT3 *)pkt)->x2 < mn) mn = ((XFT3 *)pkt)->x2;\n if (mx >= -0xA0 && mn < 0xA1) {\n if (((XFT3 *)pkt)->y0 > ((XFT3 *)pkt)->y1) {\n my = ((XFT3 *)pkt)->y0;\n mny = ((XFT3 *)pkt)->y1;\n } else {\n mny = ((XFT3 *)pkt)->y0;\n my = ((XFT3 *)pkt)->y1;\n }\n if (((XFT3 *)pkt)->y2 > my) my = ((XFT3 *)pkt)->y2;\n else if (((XFT3 *)pkt)->y2 < mny) mny = ((XFT3 *)pkt)->y2;\n if (my >= -0x6E && mny < 0x6F) {\n s32 za, tz, q, rgb;\n u32 *otp;\n u32 *tp;\n if (g.sz0 > g.sz1) {\n za = g.sz0;\n if (za < g.sz2) za = g.sz2;\n } else {\n za = g.sz1;\n if (za < g.sz2) za = g.sz2;\n }\n g.opz = za;\n if (code == 7) g.opz = za + 0x40;\n tz = g.opz;\n tp = (u32 *)prim->w0;\n q = 0x80 - (tz - 0x190) / 24;\n if (q < 0) q = 0;\n rgb = q | (q << 8) | (q << 16);\n ((XFT3 *)pkt)->rgbc = (tp[0] & 0xFF000000) | rgb;\n ((XFT3 *)pkt)->uvc0 = tp[1] + (cl << 22);\n ((XFT3 *)pkt)->uvp1 = tp[2];\n ((XFT3 *)pkt)->uv2 = tp[3];\n otp = (u32 *)(((tz >> 2) << 2) + ot);\n *(u32 *)pkt = (*otp & m24) | 0x7000000;\n *otp = (*otp & 0xFF000000) | ((u32)pkt & m24);\n pkt += 0x20;\n }\n }\n break;\n case 2:\n case 3:\n gte_stsxy3c(&tmpxy[0]);\n vd8 = *(XV8 *)vd;\n gte_ldv0(&vd8);\n gte_rtps();\n if (tmpxy[0].vx > tmpxy[1].vx) {\n mx = tmpxy[0].vx;\n mn = tmpxy[1].vx;\n } else {\n mn = tmpxy[0].vx;\n mx = tmpxy[1].vx;\n }\n if (tmpxy[2].vx > mx) mx = tmpxy[2].vx;\n else if (tmpxy[2].vx < mn) mn = tmpxy[2].vx;\n if (tmpxy[0].vy > tmpxy[1].vy) {\n my = tmpxy[0].vy;\n mny = tmpxy[1].vy;\n } else {\n mny = tmpxy[0].vy;\n my = tmpxy[1].vy;\n }\n if (tmpxy[2].vy > my) my = tmpxy[2].vy;\n else if (tmpxy[2].vy < mny) mny = tmpxy[2].vy;\n gte_stflg(&g.flag);\n if (!(g.flag & 0x7F85E000)) {\n gte_stsz4(&g.sz0, &g.sz1, &g.sz2, &g.sz3);\n gte_stsxy((long *)&((XFT4 *)pkt)->x3);\n if (((XFT4 *)pkt)->x3 < mn) mn = ((XFT4 *)pkt)->x3;\n else if (mx < ((XFT4 *)pkt)->x3) mx = ((XFT4 *)pkt)->x3;\n if (mx >= -0xA0 && mn < 0xA1) {\n if (((XFT4 *)pkt)->y3 < mny) mny = ((XFT4 *)pkt)->y3;\n else if (my < ((XFT4 *)pkt)->y3) my = ((XFT4 *)pkt)->y3;\n if (my >= -0x6E && mny < 0x6F) {\n s32 za, zb, tz, q, rgb;\n u32 *otp;\n u32 *tp;\n u32 uvw;\n zb = g.sz2;\n if (zb < g.sz3) zb = g.sz3;\n za = g.sz0;\n if (za < g.sz1) za = g.sz1;\n if (za < zb) za = zb;\n g.opz = za;\n if (code == 3) g.opz = za + 0x40;\n *(u32 *)&((XFT4 *)pkt)->x0 = *(u32 *)&tmpxy[0];\n *(u32 *)&((XFT4 *)pkt)->x1 = *(u32 *)&tmpxy[1];\n *(u32 *)&((XFT4 *)pkt)->x2 = *(u32 *)&tmpxy[2];\n tz = g.opz;\n tp = (u32 *)prim->w0;\n q = 0x80 - (tz - 0x190) / 24;\n if (q < 0) q = 0;\n rgb = q | (q << 8) | (q << 16);\n ((XFT4 *)pkt)->rgbc = (tp[0] & 0xFF000000) | rgb;\n ((XFT4 *)pkt)->uvc0 = tp[1];\n ((XFT4 *)pkt)->uvp1 = tp[2];\n uvw = tp[3];\n ((XFT4 *)pkt)->uv2 = uvw;\n ((XFT4 *)pkt)->uv3 = uvw >> 16;\n otp = (u32 *)(((tz >> 2) << 2) + ot);\n *(u32 *)pkt = (*otp & m24) | 0x9000000;\n *otp = (*otp & 0xFF000000) | ((u32)pkt & m24);\n pkt += 0x28;\n }\n }\n }\n break;\n }\n }\n }\n i++;\n prim++;\n } while (i < nprim);\n __asm__ __volatile__(\"\" : \"=r\"(m24) : \"0\"(m24)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus7)\n noprim: ;\n }\n }\n }\n }\n D_800A5E60 = pkt;\n}\n", "after_text": "void func_8017CAD4(s32 *ctx, s32 *model, s32 mtxsrc)\n{\n XDV2 tmpxy[4];\n XSV2 box[8];\n XSV2 sxy[8];\n XV8 vt[3];\n XV8 vd8;\n XMTX2 mtx;\n struct { long otz, flag, opz, sz0, sz1, sz2, sz3; } g;\n\n s32 lim;\n s32 cl;\n s32 nparts;\n XV8 *vtp;\n s32 j;\n u32 nprim;\n u32 i;\n XPart *part;\n XPrim *prim;\n u8 *pkt;\n u32 ot;\n u8 *vtx;\n u8 *vd;\n u8 *va, *vb, *vc;\n u32 w;\n u32 m24;\n s32 code;\n u32 wx, wy, wz, wzh;\n s32 xa32, xb32, t32;\n s32 xmn1, xmx1, xmn2, xmx2;\n s32 mnc, mxc;\n s16 my, mny, mx, mn;\n\n if (*ctx != 0) {\n return;\n }\n\n lim = func_800491EC() + *(s32 *)((u8 *)ctx + 0x64);\n func_800547D8(mtxsrc, &mtx);\n func_80052E38(&mtx);\n\n pkt = D_800A5E60;\n part = (XPart *)((u8 *)model + 0x14);\n nparts = *(s32 *)((u8 *)model + 8);\n vtx = *(u8 **)((u8 *)model + 0x10);\n ot = (u32)&D_800A6610[(*(u16 *)&D_800B9A02) << 14];\n\n for (j = 0; j < nparts; j++, part++) {\n vtp = &vt[0];\n wx = part->xx;\n mn = wx;\n mx = wx >> 16;\n wy = part->yy;\n mny = wy;\n my = wy >> 16;\n wz = part->zz;\n wzh = wz >> 16;\n box[0].vx = mn; box[0].vy = mny; box[0].vz = wz;\n box[1].vx = mx; box[1].vy = mny; box[1].vz = wz;\n box[2].vx = mn; box[2].vy = mny; box[2].vz = wzh;\n box[3].vx = mx; box[3].vy = mny; box[3].vz = wzh;\n\n gte_ldv3c(&box[0]);\n gte_rtpt();\n gte_stsxy3(&sxy[0], &sxy[1], &sxy[2]);\n gte_ldv0(&box[3]);\n gte_rtps();\n box[4].vx = mn; box[4].vy = my; box[4].vz = wz;\n box[5].vx = mx; box[5].vy = my; box[5].vz = wz;\n box[6].vx = mn; box[6].vy = my; box[6].vz = wzh;\n box[7].vx = mx; box[7].vy = my; box[7].vz = wzh;\n gte_stsxy(&sxy[3]);\n gte_ldv3c(&box[4]);\n gte_rtpt();\n gte_stsxy3(&sxy[4], &sxy[5], &sxy[6]);\n gte_ldv0(&box[7]);\n gte_rtps();\n gte_stsxy(&sxy[7]);\n gte_stszotz(&g.otz);\n\n if (lim >= g.otz) {\n xa32 = sxy[0].vx;\n xb32 = sxy[1].vx;\n if (xb32 < xa32) { xmx1 = xa32; xmn1 = xb32; } else { xmn1 = xa32; xmx1 = xb32; }\n t32 = sxy[2].vx;\n if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32;\n t32 = sxy[3].vx;\n if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32;\n xa32 = sxy[4].vx;\n xb32 = sxy[5].vx;\n if (xb32 < xa32) { xmx2 = xa32; xmn2 = xb32; } else { xmn2 = xa32; xmx2 = xb32; }\n t32 = sxy[6].vx;\n if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32;\n t32 = sxy[7].vx;\n if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32;\n mnc = xmn1;\n if (xmn2 < xmn1) mnc = xmn2;\n mxc = xmx1;\n if (mxc < xmx2) mxc = xmx2;\n if ((s16)mxc >= -0xA0 && (s16)mnc < 0xA1) {\n xa32 = sxy[0].vy;\n xb32 = sxy[1].vy;\n if (xb32 < xa32) { xmx1 = xa32; xmn1 = xb32; } else { xmn1 = xa32; xmx1 = xb32; }\n t32 = sxy[2].vy;\n if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32;\n t32 = sxy[3].vy;\n if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32;\n xa32 = sxy[4].vy;\n xb32 = sxy[5].vy;\n if (xb32 < xa32) { xmx2 = xa32; xmn2 = xb32; } else { xmn2 = xa32; xmx2 = xb32; }\n t32 = sxy[6].vy;\n if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32;\n t32 = sxy[7].vy;\n if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32;\n mnc = xmn1;\n if (xmn2 < xmn1) mnc = xmn2;\n mxc = xmx1;\n if (mxc < xmx2) mxc = xmx2;\n if ((s16)mxc >= -0x6E && (s16)mnc < 0x6F) {\n prim = (XPrim *)part->prim;\n nprim = part->nprim;\n i = 0;\n if (i >= nprim) goto noprim;\n m24 = 0xFFFFFF;\n do {\n w = prim->w1;\n va = vtx + (w & 0xFFFF);\n vb = vtx + (w >> 16);\n w = prim->w2;\n vt[0] = *(XV8 *)va;\n vt[1] = *(XV8 *)vb;\n vc = vtx + (w & 0xFFFF);\n w = w >> 16;\n vt[2] = *(XV8 *)vc;\n gte_ldv3c(vtp);\n gte_rtpt();\n gte_stflg(&g.flag);\n if (!(g.flag & 0x7F85E000)) {\n gte_nclip();\n code = w & 7;\n vd = vtx + (w & 0xFFF8);\n gte_stopz(&g.opz);\n if (g.opz > 0) {\n switch (code) {\n case 6:\n case 7:\n gte_stsxy3_ft3(pkt);\n gte_stsz3(&g.sz0, &g.sz1, &g.sz2);\n if (((XFT3 *)pkt)->x0 > ((XFT3 *)pkt)->x1) {\n mx = ((XFT3 *)pkt)->x0;\n mn = ((XFT3 *)pkt)->x1;\n } else {\n mn = ((XFT3 *)pkt)->x0;\n mx = ((XFT3 *)pkt)->x1;\n }\n if (((XFT3 *)pkt)->x2 > mx) mx = ((XFT3 *)pkt)->x2;\n else if (((XFT3 *)pkt)->x2 < mn) mn = ((XFT3 *)pkt)->x2;\n if (mx >= -0xA0 && mn < 0xA1) {\n if (((XFT3 *)pkt)->y0 > ((XFT3 *)pkt)->y1) {\n my = ((XFT3 *)pkt)->y0;\n mny = ((XFT3 *)pkt)->y1;\n } else {\n mny = ((XFT3 *)pkt)->y0;\n my = ((XFT3 *)pkt)->y1;\n }\n if (((XFT3 *)pkt)->y2 > my) my = ((XFT3 *)pkt)->y2;\n else if (((XFT3 *)pkt)->y2 < mny) mny = ((XFT3 *)pkt)->y2;\n if (my >= -0x6E && mny < 0x6F) {\n s32 za, tz, q, rgb;\n u32 *otp;\n u32 *tp;\n /* g.opz stored in each arm: post-reload cross-jump merges the two\n * stores back into one, but flow counted both (the &g.sz0/&g.sz1\n * allocno tie then falls the target's way). */\n if (g.sz0 > g.sz1) {\n za = g.sz0;\n if (za < g.sz2) za = g.sz2;\n g.opz = za;\n } else {\n za = g.sz1;\n if (za < g.sz2) za = g.sz2;\n g.opz = za;\n }\n if (code == 7) g.opz = za + 0x40;\n tz = g.opz;\n tp = (u32 *)prim->w0;\n q = 0x80 - (tz - 0x190) / 24;\n if (q < 0) q = 0;\n rgb = q | (q << 8) | (q << 16);\n ((XFT3 *)pkt)->rgbc = (tp[0] & 0xFF000000) | rgb;\n ((XFT3 *)pkt)->uvc0 = tp[1] + (cl << 22);\n ((XFT3 *)pkt)->uvp1 = tp[2];\n ((XFT3 *)pkt)->uv2 = tp[3];\n otp = (u32 *)(((tz >> 2) << 2) + ot);\n *(u32 *)pkt = (*otp & m24) | 0x7000000;\n *otp = (*otp & 0xFF000000) | ((u32)pkt & m24);\n pkt += 0x20;\n }\n }\n break;\n case 2:\n case 3:\n gte_stsxy3c(&tmpxy[0]);\n vd8 = *(XV8 *)vd;\n gte_ldv0(&vd8);\n gte_rtps();\n if (tmpxy[0].vx > tmpxy[1].vx) {\n mx = tmpxy[0].vx;\n mn = tmpxy[1].vx;\n } else {\n mn = tmpxy[0].vx;\n mx = tmpxy[1].vx;\n }\n if (tmpxy[2].vx > mx) mx = tmpxy[2].vx;\n else if (tmpxy[2].vx < mn) mn = tmpxy[2].vx;\n if (tmpxy[0].vy > tmpxy[1].vy) {\n my = tmpxy[0].vy;\n mny = tmpxy[1].vy;\n } else {\n mny = tmpxy[0].vy;\n my = tmpxy[1].vy;\n }\n if (tmpxy[2].vy > my) my = tmpxy[2].vy;\n else if (tmpxy[2].vy < mny) mny = tmpxy[2].vy;\n gte_stflg(&g.flag);\n if (!(g.flag & 0x7F85E000)) {\n gte_stsz4(&g.sz0, &g.sz1, &g.sz2, &g.sz3);\n gte_stsxy((long *)&((XFT4 *)pkt)->x3);\n if (((XFT4 *)pkt)->x3 < mn) mn = ((XFT4 *)pkt)->x3;\n else if (mx < ((XFT4 *)pkt)->x3) mx = ((XFT4 *)pkt)->x3;\n if (mx >= -0xA0 && mn < 0xA1) {\n if (((XFT4 *)pkt)->y3 < mny) mny = ((XFT4 *)pkt)->y3;\n else if (my < ((XFT4 *)pkt)->y3) my = ((XFT4 *)pkt)->y3;\n if (my >= -0x6E && mny < 0x6F) {\n s32 za, zb, tz, q, rgb;\n u32 *otp;\n u32 *tp;\n u32 uvw;\n zb = g.sz2;\n if (zb < g.sz3) zb = g.sz3;\n za = g.sz0;\n if (za < g.sz1) za = g.sz1;\n if (za < zb) za = zb;\n g.opz = za;\n if (code == 3) g.opz = za + 0x40;\n *(u32 *)&((XFT4 *)pkt)->x0 = *(u32 *)&tmpxy[0];\n *(u32 *)&((XFT4 *)pkt)->x1 = *(u32 *)&tmpxy[1];\n *(u32 *)&((XFT4 *)pkt)->x2 = *(u32 *)&tmpxy[2];\n tz = g.opz;\n tp = (u32 *)prim->w0;\n q = 0x80 - (tz - 0x190) / 24;\n if (q < 0) q = 0;\n rgb = q | (q << 8) | (q << 16);\n ((XFT4 *)pkt)->rgbc = (tp[0] & 0xFF000000) | rgb;\n ((XFT4 *)pkt)->uvc0 = tp[1];\n ((XFT4 *)pkt)->uvp1 = tp[2];\n uvw = tp[3];\n ((XFT4 *)pkt)->uv2 = uvw;\n ((XFT4 *)pkt)->uv3 = uvw >> 16;\n otp = (u32 *)(((tz >> 2) << 2) + ot);\n *(u32 *)pkt = (*otp & m24) | 0x9000000;\n *otp = (*otp & 0xFF000000) | ((u32)pkt & m24);\n pkt += 0x28;\n }\n }\n }\n break;\n }\n }\n }\n i++;\n prim++;\n } while (i < nprim);\n noprim: ;\n }\n }\n }\n }\n D_800A5E60 = pkt;\n}\n"} {"ts": "2026-09-11 02:28:22", "label": "s104_e14", "rung": "E", "calib": {"head": "8a344a8c3", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c", "fn": "func_80180A88", "addr": 2149059208, "aliases": null, "header": false, "includers": 0, "nhash_before": "05c18ee0ac2bc4d034d90c597123f1bc91e42e81", "nhash_after": "8c1e55a803c6d94f3a54edfa04ebf6b96171ca7e", "source": ".run/P36/agents/ov_SC06_010__func_80180A88/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.275, "objects": ["build/src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.o"], "before_text": "s32 func_80180A88(void)\n{\n register s16 *p __asm__(\"$16\"); // !FAKE: pin $16 \u2014 NEEDED DIFFERS (P36 rung B tus7)\n s16 *q;\n\n switch (D_801B2BF4) {\n case 0:\n func_8013C0F8(D_801968BC);\n ((void (*)(void *))func_8017CA80)(D_801B2578);\n D_801B2594 = -0x480;\n D_801B2598 = 0x5F0;\n D_801B25CC += 0x700;\n func_8013C0F8(D_80197BE0);\n ((void (*)(void *))func_8017CA80)(D_801B25D0);\n D_801B25EC = -0x480;\n D_801B25F0 = 0x5F0;\n D_801B2624 += 0x700;\n func_8013C0F8(D_80199164);\n ((void (*)(void *))func_8017CA80)(D_801B2628);\n D_801B2644 = -0x480;\n D_801B2648 = 0x5F0;\n D_801B267C += 0x700;\n func_8013C0F8(D_8019A9D8);\n ((void (*)(void *))func_8017CA80)(D_801B2680);\n D_801B269C = -0x480;\n D_801B26A0 = 0x5F0;\n D_801B26D4 += 0x700;\n func_8013C0F8(D_8019C68C);\n ((void (*)(void *))func_8017CA80)(D_801B26D8);\n D_801B26F4 = -0x480;\n D_801B26F8 = 0x5F0;\n D_801B272C += 0x700;\n func_8013C0F8(D_8019F570);\n ((void (*)(void *))func_8017CA80)(D_801B2730);\n D_801B274C = -0x480;\n D_801B2750 = 0x5F0;\n D_801B2784 += 0x700;\n func_8013C0F8(D_801A0044);\n ((void (*)(void *))func_8017CA80)(D_801B2788);\n D_801B27A4 = -0x480;\n D_801B27A8 = 0x5F0;\n D_801B27DC += 0x700;\n func_8013C0F8(D_801A0A18);\n ((void (*)(void *))func_8017CA80)(D_801B27E0);\n D_801B27FC = -0x480;\n D_801B2800 = 0x5F0;\n D_801B2834 += 0x700;\n func_8013C0F8(D_801A13EC);\n ((void (*)(void *))func_8017CA80)(D_801B2838);\n D_801B2854 = -0x480;\n D_801B2858 = 0x5F0;\n D_801B288C += 0x700;\n func_8013C0F8(D_801A1FC0);\n ((void (*)(void *))func_8017CA80)(D_801B2890);\n D_801B28AC = -0x480;\n D_801B28B0 = 0x5F0;\n D_801B28E4 += 0x700;\n func_8013C0F8(D_801A2C24);\n ((void (*)(void *))func_8017CA80)(D_801B28E8);\n D_801B2904 = -0x480;\n D_801B2908 = 0x5F0;\n D_801B293C += 0xB00;\n func_8013C0F8(D_801A3B38);\n ((void (*)(void *))func_8017CA80)(D_801B2940);\n D_801B295C = -0x480;\n D_801B2960 = 0x5F0;\n D_801B2994 += 0x700;\n D_801B2BF4++;\n break;\n case 1:\n *(p = &D_801B25CC) = func_8017F098(0) + 0x700;\n ((void (*)(s32 *, s32 *))func_80049CAC)((s32 *)(p - 2), (s32 *)(p - 0x28));\n ((void (*)(s32 *, s32 *, s32 *))func_8017CAD4)((s32 *)D_801B2C10, (s32 *)D_801968BC,\n (s32)(q = (s16 *)p - 0x2A, (*(s32 *)((s16 *)p - 0x2A) = 0), (s32)q));\n *(p = &D_801B2624) = func_8017F098(1) + 0x700;\n ((void (*)(s32 *, s32 *))func_80049CAC)((s32 *)(p - 2), (s32 *)(p - 0x28));\n ((void (*)(s32 *, s32 *, s32 *))func_8017CAD4)((s32 *)D_801B2C10, (s32 *)D_80197BE0,\n (s32)(q = (s16 *)p - 0x2A, (*(s32 *)((s16 *)p - 0x2A) = 0), (s32)q));\n *(p = &D_801B267C) = func_8017F098(2) + 0x700;\n ((void (*)(s32 *, s32 *))func_80049CAC)((s32 *)(p - 2), (s32 *)(p - 0x28));\n ((void (*)(s32 *, s32 *, s32 *))func_8017CAD4)((s32 *)D_801B2C10, (s32 *)D_80199164,\n (s32)(q = (s16 *)p - 0x2A, (*(s32 *)((s16 *)p - 0x2A) = 0), (s32)q));\n *(p = &D_801B26D4) = func_8017F098(3) + 0x700;\n ((void (*)(s32 *, s32 *))func_80049CAC)((s32 *)(p - 2), (s32 *)(p - 0x28));\n ((void (*)(s32 *, s32 *, s32 *))func_8017CAD4)((s32 *)D_801B2C10, (s32 *)D_8019A9D8,\n (s32)(q = (s16 *)p - 0x2A, (*(s32 *)((s16 *)p - 0x2A) = 0), (s32)q));\n *(p = &D_801B272C) = func_8017F098(4) + 0x700;\n ((void (*)(s32 *, s32 *))func_80049CAC)((s32 *)(p - 2), (s32 *)(p - 0x28));\n ((void (*)(s32 *, s32 *, s32 *))func_8017CAD4)((s32 *)D_801B2C10, (s32 *)D_8019C68C,\n (s32)(q = (s16 *)p - 0x2A, (*(s32 *)((s16 *)p - 0x2A) = 0), (s32)q));\n *(p = &D_801B2784) = func_8017F098(5) + 0x700;\n ((void (*)(s32 *, s32 *))func_80049CAC)((s32 *)(p - 2), (s32 *)(p - 0x28));\n ((void (*)(s32 *, s32 *, s32 *))func_8017CAD4)((s32 *)D_801B2C10, (s32 *)D_8019F570,\n (s32)(q = (s16 *)p - 0x2A, (*(s32 *)((s16 *)p - 0x2A) = 0), (s32)q));\n *(p = &D_801B27DC) = func_8017F098(6) + 0x700;\n ((void (*)(s32 *, s32 *))func_80049CAC)((s32 *)(p - 2), (s32 *)(p - 0x28));\n ((void (*)(s32 *, s32 *, s32 *))func_8017CAD4)((s32 *)D_801B2C10, (s32 *)D_801A0044,\n (s32)(q = (s16 *)p - 0x2A, (*(s32 *)((s16 *)p - 0x2A) = 0), (s32)q));\n *(p = &D_801B2834) = func_8017F098(7) + 0x700;\n ((void (*)(s32 *, s32 *))func_80049CAC)((s32 *)(p - 2), (s32 *)(p - 0x28));\n ((void (*)(s32 *, s32 *, s32 *))func_8017CAD4)((s32 *)D_801B2C10, (s32 *)D_801A0A18,\n (s32)(q = (s16 *)p - 0x2A, (*(s32 *)((s16 *)p - 0x2A) = 0), (s32)q));\n *(p = &D_801B288C) = func_8017F098(8) + 0x700;\n ((void (*)(s32 *, s32 *))func_80049CAC)((s32 *)(p - 2), (s32 *)(p - 0x28));\n ((void (*)(s32 *, s32 *, s32 *))func_8017CAD4)((s32 *)D_801B2C10, (s32 *)D_801A13EC,\n (s32)(q = (s16 *)p - 0x2A, (*(s32 *)((s16 *)p - 0x2A) = 0), (s32)q));\n *(p = &D_801B28E4) = func_8017F098(9) + 0x700;\n ((void (*)(s32 *, s32 *))func_80049CAC)((s32 *)(p - 2), (s32 *)(p - 0x28));\n ((void (*)(s32 *, s32 *, s32 *))func_8017CAD4)((s32 *)D_801B2C10, (s32 *)D_801A1FC0,\n (s32)(q = (s16 *)p - 0x2A, (*(s32 *)((s16 *)p - 0x2A) = 0), (s32)q));\n *(p = &D_801B293C) = func_8017F098(0xA) + 0xB00;\n ((void (*)(s32 *, s32 *))func_80049CAC)((s32 *)(p - 2), (s32 *)(p - 0x28));\n ((void (*)(s32 *, s32 *, s32 *))func_8017CAD4)((s32 *)D_801B2C10, (s32 *)D_801A2C24,\n (s32)(q = (s16 *)p - 0x2A, (*(s32 *)((s16 *)p - 0x2A) = 0), (s32)q));\n *(p = &D_801B2994) = func_8017F098(0xB) + 0x700;\n ((void (*)(s32 *, s32 *))func_80049CAC)((s32 *)(p - 2), (s32 *)(p - 0x28));\n ((void (*)(s32 *, s32 *, s32 *))func_8017CAD4)((s32 *)D_801B2C10, (s32 *)D_801A3B38,\n (s32)(q = (s16 *)p - 0x2A, (*(s32 *)((s16 *)p - 0x2A) = 0), (s32)q));\n break;\n }\n}\n", "after_text": "s32 func_80180A88(void)\n{\n switch (D_801B2BF4) {\n case 0:\n func_8013C0F8(D_801968BC);\n ((void (*)(void *))func_8017CA80)(D_801B2578);\n D_801B2594 = -0x480;\n D_801B2598 = 0x5F0;\n D_801B25CC += 0x700;\n func_8013C0F8(D_80197BE0);\n ((void (*)(void *))func_8017CA80)(D_801B25D0);\n D_801B25EC = -0x480;\n D_801B25F0 = 0x5F0;\n D_801B2624 += 0x700;\n func_8013C0F8(D_80199164);\n ((void (*)(void *))func_8017CA80)(D_801B2628);\n D_801B2644 = -0x480;\n D_801B2648 = 0x5F0;\n D_801B267C += 0x700;\n func_8013C0F8(D_8019A9D8);\n ((void (*)(void *))func_8017CA80)(D_801B2680);\n D_801B269C = -0x480;\n D_801B26A0 = 0x5F0;\n D_801B26D4 += 0x700;\n func_8013C0F8(D_8019C68C);\n ((void (*)(void *))func_8017CA80)(D_801B26D8);\n D_801B26F4 = -0x480;\n D_801B26F8 = 0x5F0;\n D_801B272C += 0x700;\n func_8013C0F8(D_8019F570);\n ((void (*)(void *))func_8017CA80)(D_801B2730);\n D_801B274C = -0x480;\n D_801B2750 = 0x5F0;\n D_801B2784 += 0x700;\n func_8013C0F8(D_801A0044);\n ((void (*)(void *))func_8017CA80)(D_801B2788);\n D_801B27A4 = -0x480;\n D_801B27A8 = 0x5F0;\n D_801B27DC += 0x700;\n func_8013C0F8(D_801A0A18);\n ((void (*)(void *))func_8017CA80)(D_801B27E0);\n D_801B27FC = -0x480;\n D_801B2800 = 0x5F0;\n D_801B2834 += 0x700;\n func_8013C0F8(D_801A13EC);\n ((void (*)(void *))func_8017CA80)(D_801B2838);\n D_801B2854 = -0x480;\n D_801B2858 = 0x5F0;\n D_801B288C += 0x700;\n func_8013C0F8(D_801A1FC0);\n ((void (*)(void *))func_8017CA80)(D_801B2890);\n D_801B28AC = -0x480;\n D_801B28B0 = 0x5F0;\n D_801B28E4 += 0x700;\n func_8013C0F8(D_801A2C24);\n ((void (*)(void *))func_8017CA80)(D_801B28E8);\n D_801B2904 = -0x480;\n D_801B2908 = 0x5F0;\n D_801B293C += 0xB00;\n func_8013C0F8(D_801A3B38);\n ((void (*)(void *))func_8017CA80)(D_801B2940);\n D_801B295C = -0x480;\n D_801B2960 = 0x5F0;\n D_801B2994 += 0x700;\n D_801B2BF4++;\n break;\n case 1:\n /* one block-scoped `p` per object: each dies once, so local-alloc takes it (into $s0) before\n * the shared &D_801B2C10 pseudo; a single function-scope `p` dies 12 times and loses $s0. */\n {\n s16 *p = &D_801B25CC;\n s32 *obj;\n\n *p = func_8017F098(0) + 0x700;\n func_80049CAC((s32)(p - 2), (s32)(p - 0x28));\n obj = (s32 *)(p - 0x2A);\n *obj = 0;\n func_8017CAD4((s32 *)D_801B2C10, (s32 *)D_801968BC, (s32)obj);\n }\n {\n s16 *p = &D_801B2624;\n s32 *obj;\n\n *p = func_8017F098(1) + 0x700;\n func_80049CAC((s32)(p - 2), (s32)(p - 0x28));\n obj = (s32 *)(p - 0x2A);\n *obj = 0;\n func_8017CAD4((s32 *)D_801B2C10, (s32 *)D_80197BE0, (s32)obj);\n }\n {\n s16 *p = &D_801B267C;\n s32 *obj;\n\n *p = func_8017F098(2) + 0x700;\n func_80049CAC((s32)(p - 2), (s32)(p - 0x28));\n obj = (s32 *)(p - 0x2A);\n *obj = 0;\n func_8017CAD4((s32 *)D_801B2C10, (s32 *)D_80199164, (s32)obj);\n }\n {\n s16 *p = &D_801B26D4;\n s32 *obj;\n\n *p = func_8017F098(3) + 0x700;\n func_80049CAC((s32)(p - 2), (s32)(p - 0x28));\n obj = (s32 *)(p - 0x2A);\n *obj = 0;\n func_8017CAD4((s32 *)D_801B2C10, (s32 *)D_8019A9D8, (s32)obj);\n }\n {\n s16 *p = &D_801B272C;\n s32 *obj;\n\n *p = func_8017F098(4) + 0x700;\n func_80049CAC((s32)(p - 2), (s32)(p - 0x28));\n obj = (s32 *)(p - 0x2A);\n *obj = 0;\n func_8017CAD4((s32 *)D_801B2C10, (s32 *)D_8019C68C, (s32)obj);\n }\n {\n s16 *p = &D_801B2784;\n s32 *obj;\n\n *p = func_8017F098(5) + 0x700;\n func_80049CAC((s32)(p - 2), (s32)(p - 0x28));\n obj = (s32 *)(p - 0x2A);\n *obj = 0;\n func_8017CAD4((s32 *)D_801B2C10, (s32 *)D_8019F570, (s32)obj);\n }\n {\n s16 *p = &D_801B27DC;\n s32 *obj;\n\n *p = func_8017F098(6) + 0x700;\n func_80049CAC((s32)(p - 2), (s32)(p - 0x28));\n obj = (s32 *)(p - 0x2A);\n *obj = 0;\n func_8017CAD4((s32 *)D_801B2C10, (s32 *)D_801A0044, (s32)obj);\n }\n {\n s16 *p = &D_801B2834;\n s32 *obj;\n\n *p = func_8017F098(7) + 0x700;\n func_80049CAC((s32)(p - 2), (s32)(p - 0x28));\n obj = (s32 *)(p - 0x2A);\n *obj = 0;\n func_8017CAD4((s32 *)D_801B2C10, (s32 *)D_801A0A18, (s32)obj);\n }\n {\n s16 *p = &D_801B288C;\n s32 *obj;\n\n *p = func_8017F098(8) + 0x700;\n func_80049CAC((s32)(p - 2), (s32)(p - 0x28));\n obj = (s32 *)(p - 0x2A);\n *obj = 0;\n func_8017CAD4((s32 *)D_801B2C10, (s32 *)D_801A13EC, (s32)obj);\n }\n {\n s16 *p = &D_801B28E4;\n s32 *obj;\n\n *p = func_8017F098(9) + 0x700;\n func_80049CAC((s32)(p - 2), (s32)(p - 0x28));\n obj = (s32 *)(p - 0x2A);\n *obj = 0;\n func_8017CAD4((s32 *)D_801B2C10, (s32 *)D_801A1FC0, (s32)obj);\n }\n {\n s16 *p = &D_801B293C;\n s32 *obj;\n\n *p = func_8017F098(0xA) + 0xB00;\n func_80049CAC((s32)(p - 2), (s32)(p - 0x28));\n obj = (s32 *)(p - 0x2A);\n *obj = 0;\n func_8017CAD4((s32 *)D_801B2C10, (s32 *)D_801A2C24, (s32)obj);\n }\n {\n s16 *p = &D_801B2994;\n s32 *obj;\n\n *p = func_8017F098(0xB) + 0x700;\n func_80049CAC((s32)(p - 2), (s32)(p - 0x28));\n obj = (s32 *)(p - 0x2A);\n *obj = 0;\n func_8017CAD4((s32 *)D_801B2C10, (s32 *)D_801A3B38, (s32)obj);\n }\n break;\n }\n}\n"} +{"ts": "2026-09-11 02:33:21", "label": "s104_e16", "rung": "E", "calib": {"head": "8cdc07612", "stamp": "15956e4a96c4"}, "tu": "src/800_b_2.c", "fn": "func_800331D4", "addr": 2147693012, "aliases": null, "header": false, "includers": 0, "nhash_before": "80c352057e5fc063f18958ad6a9673c67d662c49", "nhash_after": "3ff4322a83e6162d40dfe3f6aaf2103dc206b3c1", "source": ".run/P36/agents/main__func_800331D4/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.174, "objects": ["build/src/800_b_2.o"], "before_text": "s32 func_800331D4(s32 arg0) {\n u16 *p;\n register s32 i __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n p = D_800A46E8;\n i = 0;\n do {\n if ((*p & 0x3F) == 1 && p[2] == (arg0 & 0xFFFF)) {\n if (((u32)arg0 >> 16) == 0 || ((u32)arg0 >> 16) == p[3]) {\n return i + 1;\n }\n }\n i += 1;\n p += 42;\n } while (i < 8);\n return 0;\n}\n", "after_text": "s32 func_800331D4(s32 arg0) {\n u16 *p;\n s32 i;\n\n p = D_800A46E8;\n for (i = 0; i < 8; i++, p += 0x2A) {\n if ((*p & 0x3F) == 1 && p[2] == (arg0 & 0xFFFF) && (((u32)arg0 >> 16) == 0 || ((u32)arg0 >> 16) == p[3])) {\n return ++i;\n }\n }\n return 0;\n}\n"} diff --git a/src/800_b_2.c b/src/800_b_2.c index e1f120a96..acb2ee745 100644 --- a/src/800_b_2.c +++ b/src/800_b_2.c @@ -5654,19 +5654,14 @@ extern u16 D_800A46E8[]; s32 func_800331D4(s32 arg0) { u16 *p; - register s32 i __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus9) + s32 i; p = D_800A46E8; - i = 0; - do { - if ((*p & 0x3F) == 1 && p[2] == (arg0 & 0xFFFF)) { - if (((u32)arg0 >> 16) == 0 || ((u32)arg0 >> 16) == p[3]) { - return i + 1; - } + for (i = 0; i < 8; i++, p += 0x2A) { + if ((*p & 0x3F) == 1 && p[2] == (arg0 & 0xFFFF) && (((u32)arg0 >> 16) == 0 || ((u32)arg0 >> 16) == p[3])) { + return ++i; } - i += 1; - p += 42; - } while (i < 8); + } return 0; }