From 8030518bcc6471e1922fa84de57adae0cea6ded6 Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Thu, 10 Sep 2026 21:12:58 -0600 Subject: [PATCH] =?UTF-8?q?phase-36:=20S104=20d5=20=E2=80=94=20func=5F8018?= =?UTF-8?q?37E8=20at=200=20levers=20(was=201=20$2=20pin):=20the=20hoisted?= =?UTF-8?q?=20+0xFC=20temp=20folded=20into=20a=20compound=20assignment=20s?= =?UTF-8?q?o=20the=20left=20side=20is=20born=20first=20(local-alloc.c:1486?= =?UTF-8?q?-1507,=20block=5Falloc's=20three-quantity=20order=20is=20by=20b?= =?UTF-8?q?irth,=20not=20a=20sort);=20gate=20IDENTICAL=20each?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../agents/ov_SC05_018__func_801837E8/body.c | 85 ++++ .../ov_SC05_018__func_801837E8/mechanism.md | 92 +++++ .run/P36/delever/calibration.json | 372 +++++++++--------- .run/P36/delever/ledger.jsonl | 4 + src/ov_SC03_002/ov_SC03_002_jr_80181D78.c | 6 +- src/ov_SC03_125/ov_SC03_125_jr_8017D604.c | 6 +- src/ov_SC04_020/ov_SC04_020_jr_8017D604.c | 6 +- src/ov_SC05_018/ov_SC05_018_jr_8017D604.c | 6 +- 8 files changed, 375 insertions(+), 202 deletions(-) create mode 100644 .run/P36/agents/ov_SC05_018__func_801837E8/body.c create mode 100644 .run/P36/agents/ov_SC05_018__func_801837E8/mechanism.md diff --git a/.run/P36/agents/ov_SC05_018__func_801837E8/body.c b/.run/P36/agents/ov_SC05_018__func_801837E8/body.c new file mode 100644 index 0000000000..568f26cf0a --- /dev/null +++ b/.run/P36/agents/ov_SC05_018__func_801837E8/body.c @@ -0,0 +1,85 @@ +void func_801837E8(s32 a0) { + s32 state; + s32 fv; + + state = *(u16 *)(a0 + 0x34); + if (state == 1) { + goto case1; + } + if (state < 2) { + if (state == 0) { + goto case0; + } + goto tail; + } + if (state == 2) { + goto case2; + } + if (state == 3) { + goto case3; + } + goto tail; + +case0: { + if (func_8012BEE8(a0) == 0) { + goto tail; + } + *(u16 *)(a0 + 0xFC) = 0; + *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1; + fv = rand(); + fv = (fv & 0x1F) + 0x1E; + goto store1c; +} + +case1: { + s32 v0; + s32 p; + v0 = *(u16 *)(a0 + 0xFC); + p = *(s32 *)(a0 + 0x20); + v0 = v0 + 6; + *(u16 *)(a0 + 0xFC) = v0; + *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0; + if (func_8012BEE8(a0) == 0) { + goto tail; + } + *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1; + goto randtail; +} + +case2: { + s32 p; + p = *(s32 *)(a0 + 0x20); + *(u16 *)(p + 0x12) += *(u16 *)(a0 + 0xFC); + if (func_8012BEE8(a0) == 0) { + goto tail; + } + *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1; + goto tail; +} + +case3: { + s32 v0; + s32 p; + v0 = *(u16 *)(a0 + 0xFC); + p = *(s32 *)(a0 + 0x20); + v0 = v0 - 3; + *(u16 *)(a0 + 0xFC) = v0; + *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0; + if (*(s16 *)(a0 + 0xFC) >= 9) { + goto tail; + } + *(u16 *)(a0 + 0x34) = 0; +} + +randtail: + fv = rand(); + fv = (fv & 0x3F) + 0x3C; + +store1c: + *(s32 *)(a0 + 0x1C) = fv; + +tail: + if (!((u32)func_80029504() < 0x492)) { + func_8012C218((void *)a0); + } +} diff --git a/.run/P36/agents/ov_SC05_018__func_801837E8/mechanism.md b/.run/P36/agents/ov_SC05_018__func_801837E8/mechanism.md new file mode 100644 index 0000000000..e5c17bfc10 --- /dev/null +++ b/.run/P36/agents/ov_SC05_018__func_801837E8/mechanism.md @@ -0,0 +1,92 @@ +# func_801837E8 (ov_SC05_018_jr_8017D604.c) — P36 T7 S104 agent d5 + +**Result: score 0 in plain C, no levers** (before: 1 lever, the `register s32 p __asm__("$2")` pin in case2; after: 0). +Took one `--try`; four spellings reach 0 (below). `PACK/body.c` = variant **b**. + +The move (case2 only): delete the hoisted temp `v0` and write the update as a compound assignment, so the `+0xFC` read comes +after the lhs load: +```c + s32 p; + p = *(s32 *)(a0 + 0x20); + *(u16 *)(p + 0x12) += *(u16 *)(a0 + 0xFC); +``` + +## (a) The residual +Same 94 instructions. In case2's block, three block-local pseudos are permuted: the pointer `p` (`lw 32(s0)`), the `+0xFC` +value `fc` and the tied load/sum `ld/sum` (`lhu 18(p)` + the `addu`). Mine: ld/sum=$v0, fc=$v1, p=$a1. Target: p=$v0, +ld/sum=$v1, fc=$a1. No instruction is missing (counted first: 94/94, same mnemonics in the same order). + +## (b) The pass and the decision (PROVEN on dumps + bytes) +local-alloc, `block_alloc`, **the special case for exactly three quantities**, `local-alloc.c:1486-1507` (the same code for the +suggested-register pass is at `:1439-1462`): +```c + case 3: + if (qty_compare (0, 1) > 0) EXCHANGE (0, 1); + if (qty_compare (1, 2) > 0) EXCHANGE (2, 1); + case 2: + if (qty_compare (0, 1) > 0) EXCHANGE (0, 1); +``` +`EXCHANGE` swaps *positions* in `qty_order`, but `qty_compare` is always called on the fixed *qty numbers* 0, 1, 2, and qty +numbers are handed out in BIRTH order while the block is scanned. This is not a sort. Worked out for a block with exactly +three qtys (pri = `qty_compare`'s floor_log2(refs)·refs/len): +- pri1 > pri0 and pri2 > pri1 → order [q2, q1, q0] +- pri1 > pri0 and pri2 ≤ pri1 → order **[q0, q1, q2]** (q0 goes first even though q1 ranks higher) +- pri1 ≤ pri0 → [q0, q1, q2], or [q0, q2, q1] when pri2 > pri1. +So **the first-born qty is allocated first unless the priorities strictly increase in birth order.** `find_free_reg` then +hands out the lowest free register ($2, $3, then $5, because `$a0` is live for the call argument). + +Case2's priorities (`.lreg`, block 11): p 3000 (3 refs), fc 3333/5000, ld/sum 13333/10000 (tied, 4 refs). +- **body_free**: the source reads `v0 = +0xFC` BEFORE the lhs load, so expand emits fc, p, ld (`.rtl`); sched1 hoists p + but ld still comes after fc. Births: q0=p, q1=fc, q2=ld/sum. 3333>3000 and 13333>3333 → [ld/sum, fc, p] → ld/sum $2, fc $3, + p $5 (the residual). +- **body.c**: the compound assignment evaluates its lhs first (`lhs = lhs + rhs`, PLUS_EXPR operand 0 expanded first), so + expand emits p, ld, fc (`.rtl`). Births: q0=p, q1=ld/sum, q2=fc. 10000>3000 but 5000<10000 → [p, ld/sum, fc] → p $2, + ld/sum $3, fc $5 = the target. +Byte evidence: the dump of the matching body shows `;; Register 93 in 2` (p) while a correct sort would give it $5. +body.c's own dump (`PACK/scratch/dumps_b/`) prints q0=p 3000, q1=ld/sum 10000, q2=fc 5000; the patched simulator matches it +(0 mismatches) and the shipped one does not (3). + +**Tool defect found (`tools/localalloc_sim.py`)**: it ranks every block with a full sort, so it gets this block wrong +(3 mismatches on the matching body, and it predicts the *residual*). A scratch copy with the three-qty rule added, +`PACK/scratch/lsim3.py` (a 10-line change right before the `for q in ids:` allocation loop), gives 0 mismatches on every block +of func_801837E8 in both dumps. Over the whole TU dump (1,058 blocks, via `PACK/scratch/scan.py`) the three-qty blocks with +a mismatch drop from 10–11 of 40 to 6, and blocks of any other size stay the same. All 6 left are in func_8017D604, and the +one I read is a separate defect: the simulator gives a qty its suggested register `$30`, which `find_free_reg` never hands out +(eliminable/frame register, `local-alloc.c` find_free_reg `ELIMINABLE_REGS`). **Recommend promoting the three-qty rule into +localalloc_sim.py** (it also applies to the suggested-register pass order, `:1439-1462`, which the simulator also fully sorts). + +## (c) Source moves that close it (all score 0) +- **b** (body.c): `p = *(s32 *)(a0 + 0x20); *(u16 *)(p + 0x12) += *(u16 *)(a0 + 0xFC);` +- a: `*(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += *(u16 *)(a0 + 0xFC);` (no locals) +- e: `p = …; *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + *(u16 *)(a0 + 0xFC);` (the long form: only the operand ORDER matters) +- d: the fully nested long form. +Also s1/s3: the same compound with a body-local struct pointer (`p->f12 += s->fFC`) → 0. + +## (d) Generator proposal +When a register residual is a permutation inside one basic block that has **exactly three local qtys** (the `.lreg` block +has three `Register N in M` locals) and the first-born qty is the one the target puts in the lowest register, re-order the +block's source so its birth order gives the three-qty rule's result: **inline a hoisted single-use rhs temp (`v = *(T*)(b+K); +… x = x + v;`) into its use, placed after the lhs load (`x += *(T*)(b+K)`)**. More generally, try each of the 3! birth +orders (inline or hoist the temps) and predict the result with the fixed-index rule before compiling. + +## (e) What did not work (bytes) +- c: `p` read first, then `v0 = +0xFC`, then the long form → 5 (fc is still born before ld). +- s2: struct pointer with the hoisted `v0` temp (`v0 = s->fFC; p->f12 += v0;`) → 5. The struct does not fix it; the order does. +- free_000 (swap the `+` operands, `v0 + *(p+0x12)`) → 5: the tie moves (sum ties to operand 1), but fc is still born second. +- The sweep's R8/R9 moves (history.txt, best 4) reorder statements but always keep a hoisted fc temp born before the ld. + +## (f) Where the method fell short +- Step 1 sends me to `localalloc_sim.py` for a per-block permutation, and for exactly this shape it gives the wrong answer + (it predicts the residual for the matching body). The fixed-index three-qty order is not in `residual_moves.md`, and no + simulator has it. Reading `block_alloc` from its sort onward, not only `qty_compare_1`, found it. +- The first move to try came from asking "what would the original `obj->f += self->g` look like": the decompiler's hoisted + rhs temp was the lever, and the pin was compensating for it. + +## (g) Structs question +No. The decision is **evaluation order** (which qty is born second), not the access type. Tested with body-local structs: a +struct pointer with the compound assignment → 0 (s1, s3), and a struct pointer with the hoisted temp → 5 (s2). The +`expr.c:4568-4577` aggregate channel (alias/dependence) plays no part: nothing here reorders a load across a store. Struct +typing would help *indirectly*, though: the natural struct spelling of this line is `self->obj->f12 += self->fFC;`, which is +the matching order, while the cast-soup decompile hoisted the rhs into a temp. So a struct pass makes the right C shape the +obvious one. The candidate types: the actor at `a0` (u16 state `+0x34`, s32 `+0x1C`, `obj *` `+0x20`, s16 `+0xFC`, read with +`lh` for the `< 9` test) and the object at `+0x20` (u16/s16 `+0x12`). But the pin itself did not need structs. diff --git a/.run/P36/delever/calibration.json b/.run/P36/delever/calibration.json index ed34fae66e..f25880574f 100644 --- a/.run/P36/delever/calibration.json +++ b/.run/P36/delever/calibration.json @@ -1,7 +1,7 @@ { - "head": "547571fd1", + "head": "f644ecb9d", "stamp": "15956e4a96c4", - "generated": "2026-09-10 21:10", + "generated": "2026-09-10 21:11", "aliases": [ "main", "ov_SC03_014", @@ -21,206 +21,206 @@ "main": { "objects": 85, "identical": 85, - "seconds": 10.635000000000002, - "mean_s": 0.125 + "seconds": 10.268000000000004, + "mean_s": 0.121 }, "ov_SC03_014": { "objects": 32, "identical": 32, - "seconds": 7.177999999999999, - "mean_s": 0.224 + "seconds": 6.941000000000002, + "mean_s": 0.217 }, "ov_SC03_015": { "objects": 32, "identical": 32, - "seconds": 6.9430000000000005, - "mean_s": 0.217 + "seconds": 6.563000000000002, + "mean_s": 0.205 }, "ov_SC04_011": { "objects": 28, "identical": 28, - "seconds": 6.312, - "mean_s": 0.225 + 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"0ca9f9d76b6711cb03e1602d2b539a6316fec523", "nhash_after": "eb6dd7bc00bbee44c90267704ec1a8ba9707336e", "source": "propagate:src/ov_SC06_014/ov_SC06_014_jr_8017BEBC.c:func_8017FB4C", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.066, "objects": ["build/src/ov_SC06_011/ov_SC06_011_jr_8017EEEC.o"], "before_text": "void func_8017F3C8(void *a0)\n{\n void *s3 = a0;\n void *s2;\n void *p;\n s32 v1;\n register s32 v0 __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 bits;\n s32 s0;\n s32 s1;\n\n s2 = *(void **)((s32)s3 + 0x20);\n func_8017F5F0(s3);\n p = (*(void * *)&D_801ABBD8);\n if (p == 0) {\n goto END;\n }\n v0 = *(u16 *)((s32)s2 + 0x12) + 0x800;\n p = *(void **)((s32)p + 0x20);\n bits = *(u16 *)((s32)p + 0x12) & 0x400;\n s0 = v0 & 0xFFF;\n if (bits == 0) {\n goto ELSE;\n }\n s1 = func_80012A60(s0, 0x400);\n v0 = func_80012A60(s0, 0xC00);\n v1 = (s16)s1;\n v0 = (s16)v0;\n v0 = (v0 < v1);\n if (v0 != 0) {\n goto TRUE1;\n }\n v0 = 0x400;\n goto STORE;\nTRUE1:\n v0 = 0xC00;\n goto STORE;\nELSE:\n s1 = func_80012A60(s0, 0);\n v0 = func_80012A60(s0, 0x800);\n v1 = (s16)s1;\n v0 = (s16)v0;\n v0 = (v0 < v1);\n if (v0 != 0) {\n goto TRUE2;\n }\n *(u16 *)((s32)s2 + 0x12) = 0;\n goto END;\nTRUE2:\n v0 = 0x800;\nSTORE:\n *(u16 *)((s32)s2 + 0x12) = v0;\nEND:\n func_80171990((u8 *)s3);\n}\n", "after_text": "void func_8017F3C8(void *a0)\n{\n void *s2 = *(void **)((s32)a0 + 0x20);\n void *p;\n s32 rot;\n s32 flag;\n s32 angle;\n s32 a;\n s32 b;\n\n func_8017F5F0(a0);\n p = (void *)D_801ABBD8;\n if (p != 0) {\n rot = *(u16 *)((s32)s2 + 0x12) + 0x800;\n p = *(void **)((s32)p + 0x20);\n flag = *(u16 *)((s32)p + 0x12) & 0x400;\n angle = rot & 0xFFF;\n if (flag) {\n a = func_80012A60(angle, 0x400);\n b = func_80012A60(angle, 0xC00);\n if ((s16)a <= (s16)b) {\n *(u16 *)((s32)s2 + 0x12) = 0x400;\n } else {\n *(u16 *)((s32)s2 + 0x12) = 0xC00;\n }\n } else {\n a = func_80012A60(angle, 0);\n b = func_80012A60(angle, 0x800);\n if ((s16)a <= (s16)b) {\n *(u16 *)((s32)s2 + 0x12) = 0;\n } else {\n *(u16 *)((s32)s2 + 0x12) = 0x800;\n }\n }\n }\n func_80171990((u8 *)a0);\n}\n"} {"ts": "2026-09-10 21:11:45", "label": "s104_d3", "rung": "E", "calib": {"head": "547571fd1", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_013/ov_SC06_013_jr_8017BEBC.c", "fn": "func_8017E7E8", "addr": 2149050344, "aliases": null, "header": false, "includers": 0, "nhash_before": "0ca9f9d76b6711cb03e1602d2b539a6316fec523", "nhash_after": "eb6dd7bc00bbee44c90267704ec1a8ba9707336e", "source": "propagate:src/ov_SC06_014/ov_SC06_014_jr_8017BEBC.c:func_8017FB4C", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.152, "objects": ["build/src/ov_SC06_013/ov_SC06_013_jr_8017BEBC.o"], "before_text": "void func_8017E7E8(void *a0)\n{\n void *s3 = a0;\n void *s2;\n void *p;\n s32 v1;\n register s32 v0 __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 bits;\n s32 s0;\n s32 s1;\n\n s2 = *(void **)((s32)s3 + 0x20);\n func_8017EA10(s3);\n p = (*(void * *)&D_8019AA90);\n if (p == 0) {\n goto END;\n }\n v0 = *(u16 *)((s32)s2 + 0x12) + 0x800;\n p = *(void **)((s32)p + 0x20);\n bits = *(u16 *)((s32)p + 0x12) & 0x400;\n s0 = v0 & 0xFFF;\n if (bits == 0) {\n goto ELSE;\n }\n s1 = func_80012A60(s0, 0x400);\n v0 = func_80012A60(s0, 0xC00);\n v1 = (s16)s1;\n v0 = (s16)v0;\n v0 = (v0 < v1);\n if (v0 != 0) {\n goto TRUE1;\n }\n v0 = 0x400;\n goto STORE;\nTRUE1:\n v0 = 0xC00;\n goto STORE;\nELSE:\n s1 = func_80012A60(s0, 0);\n v0 = func_80012A60(s0, 0x800);\n v1 = (s16)s1;\n v0 = (s16)v0;\n v0 = (v0 < v1);\n if (v0 != 0) {\n goto TRUE2;\n }\n *(u16 *)((s32)s2 + 0x12) = 0;\n goto END;\nTRUE2:\n v0 = 0x800;\nSTORE:\n *(u16 *)((s32)s2 + 0x12) = v0;\nEND:\n func_80171990((u8 *)s3);\n}\n", "after_text": "void func_8017E7E8(void *a0)\n{\n void *s2 = *(void **)((s32)a0 + 0x20);\n void *p;\n s32 rot;\n s32 flag;\n s32 angle;\n s32 a;\n s32 b;\n\n func_8017EA10(a0);\n p = (void *)D_8019AA90;\n if (p != 0) {\n rot = *(u16 *)((s32)s2 + 0x12) + 0x800;\n p = *(void **)((s32)p + 0x20);\n flag = *(u16 *)((s32)p + 0x12) & 0x400;\n angle = rot & 0xFFF;\n if (flag) {\n a = func_80012A60(angle, 0x400);\n b = func_80012A60(angle, 0xC00);\n if ((s16)a <= (s16)b) {\n *(u16 *)((s32)s2 + 0x12) = 0x400;\n } else {\n *(u16 *)((s32)s2 + 0x12) = 0xC00;\n }\n } else {\n a = func_80012A60(angle, 0);\n b = func_80012A60(angle, 0x800);\n if ((s16)a <= (s16)b) {\n *(u16 *)((s32)s2 + 0x12) = 0;\n } else {\n *(u16 *)((s32)s2 + 0x12) = 0x800;\n }\n }\n }\n func_80171990((u8 *)a0);\n}\n"} {"ts": "2026-09-10 21:11:45", "label": "s104_d3", "rung": "E", "calib": {"head": "547571fd1", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_015/ov_SC06_015_jr_8017BEBC.c", "fn": "func_8017E6A4", "addr": 2149050020, "aliases": null, "header": false, "includers": 0, "nhash_before": "0ca9f9d76b6711cb03e1602d2b539a6316fec523", "nhash_after": "eb6dd7bc00bbee44c90267704ec1a8ba9707336e", "source": "propagate:src/ov_SC06_014/ov_SC06_014_jr_8017BEBC.c:func_8017FB4C", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.121, "objects": ["build/src/ov_SC06_015/ov_SC06_015_jr_8017BEBC.o"], "before_text": "void func_8017E6A4(void *a0)\n{\n void *s3 = a0;\n void *s2;\n void *p;\n s32 v1;\n register s32 v0 __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 bits;\n s32 s0;\n s32 s1;\n\n s2 = *(void **)((s32)s3 + 0x20);\n func_8017E8CC(s3);\n p = (*(void * *)&D_80194888);\n if (p == 0) {\n goto END;\n }\n v0 = *(u16 *)((s32)s2 + 0x12) + 0x800;\n p = *(void **)((s32)p + 0x20);\n bits = *(u16 *)((s32)p + 0x12) & 0x400;\n s0 = v0 & 0xFFF;\n if (bits == 0) {\n goto ELSE;\n }\n s1 = func_80012A60(s0, 0x400);\n v0 = func_80012A60(s0, 0xC00);\n v1 = (s16)s1;\n v0 = (s16)v0;\n v0 = (v0 < v1);\n if (v0 != 0) {\n goto TRUE1;\n }\n v0 = 0x400;\n goto STORE;\nTRUE1:\n v0 = 0xC00;\n goto STORE;\nELSE:\n s1 = func_80012A60(s0, 0);\n v0 = func_80012A60(s0, 0x800);\n v1 = (s16)s1;\n v0 = (s16)v0;\n v0 = (v0 < v1);\n if (v0 != 0) {\n goto TRUE2;\n }\n *(u16 *)((s32)s2 + 0x12) = 0;\n goto END;\nTRUE2:\n v0 = 0x800;\nSTORE:\n *(u16 *)((s32)s2 + 0x12) = v0;\nEND:\n func_80171990((u8 *)s3);\n}\n", "after_text": "void func_8017E6A4(void *a0)\n{\n void *s2 = *(void **)((s32)a0 + 0x20);\n void *p;\n s32 rot;\n s32 flag;\n s32 angle;\n s32 a;\n s32 b;\n\n func_8017E8CC(a0);\n p = (void *)D_80194888;\n if (p != 0) {\n rot = *(u16 *)((s32)s2 + 0x12) + 0x800;\n p = *(void **)((s32)p + 0x20);\n flag = *(u16 *)((s32)p + 0x12) & 0x400;\n angle = rot & 0xFFF;\n if (flag) {\n a = func_80012A60(angle, 0x400);\n b = func_80012A60(angle, 0xC00);\n if ((s16)a <= (s16)b) {\n *(u16 *)((s32)s2 + 0x12) = 0x400;\n } else {\n *(u16 *)((s32)s2 + 0x12) = 0xC00;\n }\n } else {\n a = func_80012A60(angle, 0);\n b = func_80012A60(angle, 0x800);\n if ((s16)a <= (s16)b) {\n *(u16 *)((s32)s2 + 0x12) = 0;\n } else {\n *(u16 *)((s32)s2 + 0x12) = 0x800;\n }\n }\n }\n func_80171990((u8 *)a0);\n}\n"} +{"ts": "2026-09-10 21:12:27", "label": "s104_d5", "rung": "E", "calib": {"head": "f644ecb9d", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC05_018/ov_SC05_018_jr_8017D604.c", "fn": "func_801837E8", "addr": 2149070824, "aliases": null, "header": false, "includers": 0, "nhash_before": "e7517d4e13cd1351e8d370f35ec75fe121591d96", "nhash_after": "0f2b8c264acc441d17eb016feede2076816f1699", "source": ".run/P36/agents/ov_SC05_018__func_801837E8/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.358, "objects": ["build/src/ov_SC05_018/ov_SC05_018_jr_8017D604.o"], "before_text": "void func_801837E8(s32 a0) {\n s32 state;\n s32 fv;\n\n state = *(u16 *)(a0 + 0x34);\n if (state == 1) {\n goto case1;\n }\n if (state < 2) {\n if (state == 0) {\n goto case0;\n }\n goto tail;\n }\n if (state == 2) {\n goto case2;\n }\n if (state == 3) {\n goto case3;\n }\n goto tail;\n\ncase0: {\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0xFC) = 0;\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n fv = rand();\n fv = (fv & 0x1F) + 0x1E;\n goto store1c;\n}\n\ncase1: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 + 6;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto randtail;\n}\n\ncase2: {\n register s32 p __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n s32 v0;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto tail;\n}\n\ncase3: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 - 3;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (*(s16 *)(a0 + 0xFC) >= 9) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = 0;\n}\n\nrandtail:\n fv = rand();\n fv = (fv & 0x3F) + 0x3C;\n\nstore1c:\n *(s32 *)(a0 + 0x1C) = fv;\n\ntail:\n if (!((u32)func_80029504() < 0x492)) {\n func_8012C218((void *)a0);\n }\n}\n", "after_text": "void func_801837E8(s32 a0) {\n s32 state;\n s32 fv;\n\n state = *(u16 *)(a0 + 0x34);\n if (state == 1) {\n goto case1;\n }\n if (state < 2) {\n if (state == 0) {\n goto case0;\n }\n goto tail;\n }\n if (state == 2) {\n goto case2;\n }\n if (state == 3) {\n goto case3;\n }\n goto tail;\n\ncase0: {\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0xFC) = 0;\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n fv = rand();\n fv = (fv & 0x1F) + 0x1E;\n goto store1c;\n}\n\ncase1: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 + 6;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto randtail;\n}\n\ncase2: {\n s32 p;\n p = *(s32 *)(a0 + 0x20);\n *(u16 *)(p + 0x12) += *(u16 *)(a0 + 0xFC);\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto tail;\n}\n\ncase3: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 - 3;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (*(s16 *)(a0 + 0xFC) >= 9) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = 0;\n}\n\nrandtail:\n fv = rand();\n fv = (fv & 0x3F) + 0x3C;\n\nstore1c:\n *(s32 *)(a0 + 0x1C) = fv;\n\ntail:\n if (!((u32)func_80029504() < 0x492)) {\n func_8012C218((void *)a0);\n }\n}\n"} +{"ts": "2026-09-10 21:12:56", "label": "s104_d5", "rung": "E", "calib": {"head": "f644ecb9d", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_125/ov_SC03_125_jr_8017D604.c", "fn": "func_80180F0C", "addr": 2149060364, "aliases": null, "header": false, "includers": 0, "nhash_before": "e7517d4e13cd1351e8d370f35ec75fe121591d96", "nhash_after": "0f2b8c264acc441d17eb016feede2076816f1699", "source": "propagate:src/ov_SC05_018/ov_SC05_018_jr_8017D604.c:func_801837E8", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.237, "objects": ["build/src/ov_SC03_125/ov_SC03_125_jr_8017D604.o"], "before_text": "void func_80180F0C(s32 a0) {\n s32 state;\n s32 fv;\n\n state = *(u16 *)(a0 + 0x34);\n if (state == 1) {\n goto case1;\n }\n if (state < 2) {\n if (state == 0) {\n goto case0;\n }\n goto tail;\n }\n if (state == 2) {\n goto case2;\n }\n if (state == 3) {\n goto case3;\n }\n goto tail;\n\ncase0: {\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0xFC) = 0;\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n fv = rand();\n fv = (fv & 0x1F) + 0x1E;\n goto store1c;\n}\n\ncase1: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 + 6;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto randtail;\n}\n\ncase2: {\n register s32 p __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n s32 v0;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto tail;\n}\n\ncase3: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 - 3;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (*(s16 *)(a0 + 0xFC) >= 9) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = 0;\n}\n\nrandtail:\n fv = rand();\n fv = (fv & 0x3F) + 0x3C;\n\nstore1c:\n *(s32 *)(a0 + 0x1C) = fv;\n\ntail:\n if (!((u32)func_80029504() < 0x492)) {\n func_8012C218((void *)a0);\n }\n}\n", "after_text": "void func_80180F0C(s32 a0) {\n s32 state;\n s32 fv;\n\n state = *(u16 *)(a0 + 0x34);\n if (state == 1) {\n goto case1;\n }\n if (state < 2) {\n if (state == 0) {\n goto case0;\n }\n goto tail;\n }\n if (state == 2) {\n goto case2;\n }\n if (state == 3) {\n goto case3;\n }\n goto tail;\n\ncase0: {\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0xFC) = 0;\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n fv = rand();\n fv = (fv & 0x1F) + 0x1E;\n goto store1c;\n}\n\ncase1: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 + 6;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto randtail;\n}\n\ncase2: {\n s32 p;\n p = *(s32 *)(a0 + 0x20);\n *(u16 *)(p + 0x12) += *(u16 *)(a0 + 0xFC);\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto tail;\n}\n\ncase3: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 - 3;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (*(s16 *)(a0 + 0xFC) >= 9) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = 0;\n}\n\nrandtail:\n fv = rand();\n fv = (fv & 0x3F) + 0x3C;\n\nstore1c:\n *(s32 *)(a0 + 0x1C) = fv;\n\ntail:\n if (!((u32)func_80029504() < 0x492)) {\n func_8012C218((void *)a0);\n }\n}\n"} +{"ts": "2026-09-10 21:12:56", "label": "s104_d5", "rung": "E", "calib": {"head": "f644ecb9d", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC04_020/ov_SC04_020_jr_8017D604.c", "fn": "func_80180BD0", "addr": 2149059536, "aliases": null, "header": false, "includers": 0, "nhash_before": "e7517d4e13cd1351e8d370f35ec75fe121591d96", "nhash_after": "0f2b8c264acc441d17eb016feede2076816f1699", "source": "propagate:src/ov_SC05_018/ov_SC05_018_jr_8017D604.c:func_801837E8", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.228, "objects": ["build/src/ov_SC04_020/ov_SC04_020_jr_8017D604.o"], "before_text": "void func_80180BD0(s32 a0) {\n s32 state;\n s32 fv;\n\n state = *(u16 *)(a0 + 0x34);\n if (state == 1) {\n goto case1;\n }\n if (state < 2) {\n if (state == 0) {\n goto case0;\n }\n goto tail;\n }\n if (state == 2) {\n goto case2;\n }\n if (state == 3) {\n goto case3;\n }\n goto tail;\n\ncase0: {\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0xFC) = 0;\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n fv = rand();\n fv = (fv & 0x1F) + 0x1E;\n goto store1c;\n}\n\ncase1: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 + 6;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto randtail;\n}\n\ncase2: {\n register s32 p __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n s32 v0;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto tail;\n}\n\ncase3: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 - 3;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (*(s16 *)(a0 + 0xFC) >= 9) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = 0;\n}\n\nrandtail:\n fv = rand();\n fv = (fv & 0x3F) + 0x3C;\n\nstore1c:\n *(s32 *)(a0 + 0x1C) = fv;\n\ntail:\n if (!((u32)func_80029504() < 0x492)) {\n func_8012C218((void *)a0);\n }\n}\n", "after_text": "void func_80180BD0(s32 a0) {\n s32 state;\n s32 fv;\n\n state = *(u16 *)(a0 + 0x34);\n if (state == 1) {\n goto case1;\n }\n if (state < 2) {\n if (state == 0) {\n goto case0;\n }\n goto tail;\n }\n if (state == 2) {\n goto case2;\n }\n if (state == 3) {\n goto case3;\n }\n goto tail;\n\ncase0: {\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0xFC) = 0;\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n fv = rand();\n fv = (fv & 0x1F) + 0x1E;\n goto store1c;\n}\n\ncase1: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 + 6;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto randtail;\n}\n\ncase2: {\n s32 p;\n p = *(s32 *)(a0 + 0x20);\n *(u16 *)(p + 0x12) += *(u16 *)(a0 + 0xFC);\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto tail;\n}\n\ncase3: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 - 3;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (*(s16 *)(a0 + 0xFC) >= 9) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = 0;\n}\n\nrandtail:\n fv = rand();\n fv = (fv & 0x3F) + 0x3C;\n\nstore1c:\n *(s32 *)(a0 + 0x1C) = fv;\n\ntail:\n if (!((u32)func_80029504() < 0x492)) {\n func_8012C218((void *)a0);\n }\n}\n"} +{"ts": "2026-09-10 21:12:57", "label": "s104_d5", "rung": "E", "calib": {"head": "f644ecb9d", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_002/ov_SC03_002_jr_80181D78.c", "fn": "func_801824DC", "addr": 2149065948, "aliases": null, "header": false, "includers": 0, "nhash_before": "e7517d4e13cd1351e8d370f35ec75fe121591d96", "nhash_after": "0f2b8c264acc441d17eb016feede2076816f1699", "source": "propagate:src/ov_SC05_018/ov_SC05_018_jr_8017D604.c:func_801837E8", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.131, "objects": ["build/src/ov_SC03_002/ov_SC03_002_jr_80181D78.o"], "before_text": "void func_801824DC(s32 a0) {\n s32 state;\n s32 fv;\n\n state = *(u16 *)(a0 + 0x34);\n if (state == 1) {\n goto case1;\n }\n if (state < 2) {\n if (state == 0) {\n goto case0;\n }\n goto tail;\n }\n if (state == 2) {\n goto case2;\n }\n if (state == 3) {\n goto case3;\n }\n goto tail;\n\ncase0: {\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0xFC) = 0;\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n fv = rand();\n fv = (fv & 0x1F) + 0x1E;\n goto store1c;\n}\n\ncase1: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 + 6;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto randtail;\n}\n\ncase2: {\n register s32 p __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 v0;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto tail;\n}\n\ncase3: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 - 3;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (*(s16 *)(a0 + 0xFC) >= 9) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = 0;\n}\n\nrandtail:\n fv = rand();\n fv = (fv & 0x3F) + 0x3C;\n\nstore1c:\n *(s32 *)(a0 + 0x1C) = fv;\n\ntail:\n if (!((u32)func_80029504() < 0x492)) {\n func_8012C218((void *)a0);\n }\n}\n", "after_text": "void func_801824DC(s32 a0) {\n s32 state;\n s32 fv;\n\n state = *(u16 *)(a0 + 0x34);\n if (state == 1) {\n goto case1;\n }\n if (state < 2) {\n if (state == 0) {\n goto case0;\n }\n goto tail;\n }\n if (state == 2) {\n goto case2;\n }\n if (state == 3) {\n goto case3;\n }\n goto tail;\n\ncase0: {\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0xFC) = 0;\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n fv = rand();\n fv = (fv & 0x1F) + 0x1E;\n goto store1c;\n}\n\ncase1: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 + 6;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto randtail;\n}\n\ncase2: {\n s32 p;\n p = *(s32 *)(a0 + 0x20);\n *(u16 *)(p + 0x12) += *(u16 *)(a0 + 0xFC);\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto tail;\n}\n\ncase3: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 - 3;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (*(s16 *)(a0 + 0xFC) >= 9) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = 0;\n}\n\nrandtail:\n fv = rand();\n fv = (fv & 0x3F) + 0x3C;\n\nstore1c:\n *(s32 *)(a0 + 0x1C) = fv;\n\ntail:\n if (!((u32)func_80029504() < 0x492)) {\n func_8012C218((void *)a0);\n }\n}\n"} diff --git a/src/ov_SC03_002/ov_SC03_002_jr_80181D78.c b/src/ov_SC03_002/ov_SC03_002_jr_80181D78.c index 752e5544ee..03d8255e46 100644 --- a/src/ov_SC03_002/ov_SC03_002_jr_80181D78.c +++ b/src/ov_SC03_002/ov_SC03_002_jr_80181D78.c @@ -3193,11 +3193,9 @@ case1: { } case2: { - register s32 p __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus9) - s32 v0; - v0 = *(u16 *)(a0 + 0xFC); + s32 p; p = *(s32 *)(a0 + 0x20); - *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0; + *(u16 *)(p + 0x12) += *(u16 *)(a0 + 0xFC); if (func_8012BEE8(a0) == 0) { goto tail; } diff --git a/src/ov_SC03_125/ov_SC03_125_jr_8017D604.c b/src/ov_SC03_125/ov_SC03_125_jr_8017D604.c index 01069235f0..3d144f1b6f 100644 --- a/src/ov_SC03_125/ov_SC03_125_jr_8017D604.c +++ b/src/ov_SC03_125/ov_SC03_125_jr_8017D604.c @@ -4906,11 +4906,9 @@ case1: { } case2: { - register s32 p __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus8) - s32 v0; - v0 = *(u16 *)(a0 + 0xFC); + s32 p; p = *(s32 *)(a0 + 0x20); - *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0; + *(u16 *)(p + 0x12) += *(u16 *)(a0 + 0xFC); if (func_8012BEE8(a0) == 0) { goto tail; } diff --git a/src/ov_SC04_020/ov_SC04_020_jr_8017D604.c b/src/ov_SC04_020/ov_SC04_020_jr_8017D604.c index a870416a96..fe14be246d 100644 --- a/src/ov_SC04_020/ov_SC04_020_jr_8017D604.c +++ b/src/ov_SC04_020/ov_SC04_020_jr_8017D604.c @@ -4707,11 +4707,9 @@ case1: { } case2: { - register s32 p __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus8) - s32 v0; - v0 = *(u16 *)(a0 + 0xFC); + s32 p; p = *(s32 *)(a0 + 0x20); - *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0; + *(u16 *)(p + 0x12) += *(u16 *)(a0 + 0xFC); if (func_8012BEE8(a0) == 0) { goto tail; } diff --git a/src/ov_SC05_018/ov_SC05_018_jr_8017D604.c b/src/ov_SC05_018/ov_SC05_018_jr_8017D604.c index 6057fd28de..1da605fd28 100644 --- a/src/ov_SC05_018/ov_SC05_018_jr_8017D604.c +++ b/src/ov_SC05_018/ov_SC05_018_jr_8017D604.c @@ -6616,11 +6616,9 @@ case1: { } case2: { - register s32 p __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus8) - s32 v0; - v0 = *(u16 *)(a0 + 0xFC); + s32 p; p = *(s32 *)(a0 + 0x20); - *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0; + *(u16 *)(p + 0x12) += *(u16 *)(a0 + 0xFC); if (func_8012BEE8(a0) == 0) { goto tail; }