From 8887cf87bca4ee2c2f239dc7aaa3182d0862eb4e Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Wed, 22 Jul 2026 14:36:09 -0600 Subject: [PATCH] =?UTF-8?q?feat(phase-29):=20func=5F801299C8=20sweep=20chu?= =?UTF-8?q?nk=202=20=E2=80=94=2045/45=20banked?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- config/overlays.mk | 90 +++++++++++++++++------------------ config/splat.ov_SC03_093.yaml | 40 ++++++++-------- config/splat.ov_SC03_094.yaml | 40 ++++++++-------- config/splat.ov_SC03_095.yaml | 40 ++++++++-------- config/splat.ov_SC03_096.yaml | 40 ++++++++-------- config/splat.ov_SC03_097.yaml | 40 ++++++++-------- config/splat.ov_SC03_098.yaml | 40 ++++++++-------- config/splat.ov_SC03_099.yaml | 40 ++++++++-------- config/splat.ov_SC03_100.yaml | 40 ++++++++-------- config/splat.ov_SC03_101.yaml | 40 ++++++++-------- config/splat.ov_SC03_102.yaml | 40 ++++++++-------- config/splat.ov_SC03_103.yaml | 38 ++++++++------- config/splat.ov_SC03_104.yaml | 40 ++++++++-------- config/splat.ov_SC03_105.yaml | 42 ++++++++-------- config/splat.ov_SC03_108.yaml | 40 ++++++++-------- config/splat.ov_SC03_109.yaml | 40 ++++++++-------- config/splat.ov_SC03_110.yaml | 40 ++++++++-------- config/splat.ov_SC03_111.yaml | 40 ++++++++-------- config/splat.ov_SC03_112.yaml | 40 ++++++++-------- config/splat.ov_SC03_113.yaml | 40 ++++++++-------- config/splat.ov_SC03_114.yaml | 40 ++++++++-------- config/splat.ov_SC03_115.yaml | 40 ++++++++-------- config/splat.ov_SC03_116.yaml | 40 ++++++++-------- config/splat.ov_SC03_117.yaml | 40 ++++++++-------- config/splat.ov_SC03_118.yaml | 42 ++++++++-------- config/splat.ov_SC03_119.yaml | 42 ++++++++-------- config/splat.ov_SC03_121.yaml | 40 ++++++++-------- config/splat.ov_SC03_124.yaml | 40 ++++++++-------- config/splat.ov_SC03_125.yaml | 40 ++++++++-------- config/splat.ov_SC03_126.yaml | 42 ++++++++-------- config/splat.ov_SC04_000.yaml | 40 ++++++++-------- config/splat.ov_SC04_002.yaml | 40 ++++++++-------- config/splat.ov_SC04_003.yaml | 40 ++++++++-------- config/splat.ov_SC04_004.yaml | 40 ++++++++-------- config/splat.ov_SC04_005.yaml | 40 ++++++++-------- config/splat.ov_SC04_006.yaml | 40 ++++++++-------- config/splat.ov_SC04_007.yaml | 40 ++++++++-------- config/splat.ov_SC04_008.yaml | 38 ++++++++------- config/splat.ov_SC04_009.yaml | 40 ++++++++-------- config/splat.ov_SC04_010.yaml | 40 ++++++++-------- config/splat.ov_SC04_011.yaml | 42 ++++++++-------- config/splat.ov_SC04_012.yaml | 40 ++++++++-------- config/splat.ov_SC04_015.yaml | 40 ++++++++-------- config/splat.ov_SC04_016.yaml | 40 ++++++++-------- config/splat.ov_SC04_018.yaml | 40 ++++++++-------- config/splat.ov_SC04_019.yaml | 40 ++++++++-------- src/ov_SC03_093/ov_SC03_093.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_094/ov_SC03_094.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_095/ov_SC03_095.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_096/ov_SC03_096.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_097/ov_SC03_097.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_098/ov_SC03_098.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_099/ov_SC03_099.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_100/ov_SC03_100.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_101/ov_SC03_101.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_102/ov_SC03_102.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_103/ov_SC03_103.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_104/ov_SC03_104.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_105/ov_SC03_105.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_108/ov_SC03_108.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_109/ov_SC03_109.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_110/ov_SC03_110.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_111/ov_SC03_111.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_112/ov_SC03_112.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_113/ov_SC03_113.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_114/ov_SC03_114.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_115/ov_SC03_115.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_116/ov_SC03_116.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_117/ov_SC03_117.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_118/ov_SC03_118.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_119/ov_SC03_119.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_121/ov_SC03_121.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_124/ov_SC03_124.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_125/ov_SC03_125.c | 79 +++++++++++++++++++++++++++++- src/ov_SC03_126/ov_SC03_126.c | 79 +++++++++++++++++++++++++++++- src/ov_SC04_000/ov_SC04_000.c | 79 +++++++++++++++++++++++++++++- src/ov_SC04_002/ov_SC04_002.c | 79 +++++++++++++++++++++++++++++- src/ov_SC04_003/ov_SC04_003.c | 79 +++++++++++++++++++++++++++++- src/ov_SC04_004/ov_SC04_004.c | 79 +++++++++++++++++++++++++++++- src/ov_SC04_005/ov_SC04_005.c | 79 +++++++++++++++++++++++++++++- src/ov_SC04_006/ov_SC04_006.c | 79 +++++++++++++++++++++++++++++- src/ov_SC04_007/ov_SC04_007.c | 79 +++++++++++++++++++++++++++++- src/ov_SC04_008/ov_SC04_008.c | 79 +++++++++++++++++++++++++++++- src/ov_SC04_009/ov_SC04_009.c | 79 +++++++++++++++++++++++++++++- src/ov_SC04_010/ov_SC04_010.c | 79 +++++++++++++++++++++++++++++- src/ov_SC04_011/ov_SC04_011.c | 79 +++++++++++++++++++++++++++++- src/ov_SC04_012/ov_SC04_012.c | 79 +++++++++++++++++++++++++++++- src/ov_SC04_015/ov_SC04_015.c | 79 +++++++++++++++++++++++++++++- src/ov_SC04_016/ov_SC04_016.c | 79 +++++++++++++++++++++++++++++- src/ov_SC04_018/ov_SC04_018.c | 79 +++++++++++++++++++++++++++++- src/ov_SC04_019/ov_SC04_019.c | 79 +++++++++++++++++++++++++++++- 91 files changed, 4503 insertions(+), 948 deletions(-) diff --git a/config/overlays.mk b/config/overlays.mk index b1443a4f4..7335ca9a7 100644 --- a/config/overlays.mk +++ b/config/overlays.mk @@ -291,7 +291,7 @@ ov_SC04_000_ELF := $(ov_SC04_000_OUT).elf ov_SC04_000_MAPFILE := $(ov_SC04_000_OUT).map ov_SC04_000_LD_SCRIPT := $(ov_SC04_000_OUT).ld ov_SC04_000_SPLAT_YAML := config/splat.ov_SC04_000.yaml -ov_SC04_000_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_000_jr_8012ACE0.o,tail2.data.o,ov_SC04_000_jr_80135888.o,tail3.data.o,ov_SC04_000_jr_80135A4C.o,tail4.data.o,ov_SC04_000_jr_80135D20.o,tail5.data.o,ov_SC04_000_jr_801380E0.o,tail6.data.o,ov_SC04_000_jr_8013F350.o,tail7.data.o,ov_SC04_000_jr_8013FFD8.o,tail8.data.o,ov_SC04_000_jr_80140608.o,tail9.data.o,ov_SC04_000_jr_8015444C.o,tail10.data.o,ov_SC04_000_jr_80154C24.o,ov_SC04_000_jr_801588CC.o,tail11.data.o,ov_SC04_000_jr_80159C84.o,tail12.data.o,ov_SC04_000_jr_8015A3C8.o,tail13.data.o,ov_SC04_000_jr_8015AE2C.o,tail14.data.o,ov_SC04_000_jr_8015C32C.o,tail15.data.o,ov_SC04_000_jr_8016AB6C.o,tail16.data.o,ov_SC04_000_jr_801734BC.o,tail17.data.o,ov_SC04_000_jr_80178D40.o,tail18.data.o,ov_SC04_000_jr_8017A4AC.o,tail19.data.o,ov_SC04_000_jr_8017AE2C.o,ov_SC04_000_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC04_000_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_000.o,tail2.data.o,ov_SC04_000_jr_8012ACE0.o,tail3.data.o,ov_SC04_000_jr_80135888.o,tail4.data.o,ov_SC04_000_jr_80135A4C.o,tail5.data.o,ov_SC04_000_jr_80135D20.o,tail6.data.o,ov_SC04_000_jr_801380E0.o,tail7.data.o,ov_SC04_000_jr_8013F350.o,tail8.data.o,ov_SC04_000_jr_8013FFD8.o,tail9.data.o,ov_SC04_000_jr_80140608.o,tail10.data.o,ov_SC04_000_jr_8015444C.o,tail11.data.o,ov_SC04_000_jr_80154C24.o,ov_SC04_000_jr_801588CC.o,tail12.data.o,ov_SC04_000_jr_80159C84.o,tail13.data.o,ov_SC04_000_jr_8015A3C8.o,tail14.data.o,ov_SC04_000_jr_8015AE2C.o,tail15.data.o,ov_SC04_000_jr_8015C32C.o,tail16.data.o,ov_SC04_000_jr_8016AB6C.o,tail17.data.o,ov_SC04_000_jr_801734BC.o,tail18.data.o,ov_SC04_000_jr_80178D40.o,tail19.data.o,ov_SC04_000_jr_8017A4AC.o,tail20.data.o,ov_SC04_000_jr_8017AE2C.o,ov_SC04_000_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC04_000/ov_SC04_000_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC04_000/ov_SC04_000_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC04_000/ov_SC04_000_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -318,7 +318,7 @@ ov_SC04_018_ELF := $(ov_SC04_018_OUT).elf ov_SC04_018_MAPFILE := $(ov_SC04_018_OUT).map ov_SC04_018_LD_SCRIPT := $(ov_SC04_018_OUT).ld ov_SC04_018_SPLAT_YAML := config/splat.ov_SC04_018.yaml -ov_SC04_018_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_018_jr_8012ACE0.o,tail2.data.o,ov_SC04_018_jr_80135888.o,tail3.data.o,ov_SC04_018_jr_80135A4C.o,tail4.data.o,ov_SC04_018_jr_80135D20.o,tail5.data.o,ov_SC04_018_jr_801380E0.o,tail6.data.o,ov_SC04_018_jr_8013F350.o,tail7.data.o,ov_SC04_018_jr_8013FFD8.o,tail8.data.o,ov_SC04_018_jr_80140608.o,tail9.data.o,ov_SC04_018_jr_8015444C.o,tail10.data.o,ov_SC04_018_jr_80154C24.o,ov_SC04_018_jr_801588CC.o,tail11.data.o,ov_SC04_018_jr_80159C84.o,tail12.data.o,ov_SC04_018_jr_8015A3C8.o,tail13.data.o,ov_SC04_018_jr_8015AE2C.o,tail14.data.o,ov_SC04_018_jr_8015C32C.o,tail15.data.o,ov_SC04_018_jr_8016AB6C.o,tail16.data.o,ov_SC04_018_jr_801734BC.o,tail17.data.o,ov_SC04_018_jr_80178D40.o,tail18.data.o,ov_SC04_018_jr_8017A4AC.o,tail19.data.o,ov_SC04_018_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC04_018_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_018.o,tail2.data.o,ov_SC04_018_jr_8012ACE0.o,tail3.data.o,ov_SC04_018_jr_80135888.o,tail4.data.o,ov_SC04_018_jr_80135A4C.o,tail5.data.o,ov_SC04_018_jr_80135D20.o,tail6.data.o,ov_SC04_018_jr_801380E0.o,tail7.data.o,ov_SC04_018_jr_8013F350.o,tail8.data.o,ov_SC04_018_jr_8013FFD8.o,tail9.data.o,ov_SC04_018_jr_80140608.o,tail10.data.o,ov_SC04_018_jr_8015444C.o,tail11.data.o,ov_SC04_018_jr_80154C24.o,ov_SC04_018_jr_801588CC.o,tail12.data.o,ov_SC04_018_jr_80159C84.o,tail13.data.o,ov_SC04_018_jr_8015A3C8.o,tail14.data.o,ov_SC04_018_jr_8015AE2C.o,tail15.data.o,ov_SC04_018_jr_8015C32C.o,tail16.data.o,ov_SC04_018_jr_8016AB6C.o,tail17.data.o,ov_SC04_018_jr_801734BC.o,tail18.data.o,ov_SC04_018_jr_80178D40.o,tail19.data.o,ov_SC04_018_jr_8017A4AC.o,tail20.data.o,ov_SC04_018_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC04_018/ov_SC04_018_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC04_018/ov_SC04_018_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC04_018/ov_SC04_018_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -345,7 +345,7 @@ ov_SC04_019_ELF := $(ov_SC04_019_OUT).elf ov_SC04_019_MAPFILE := $(ov_SC04_019_OUT).map ov_SC04_019_LD_SCRIPT := $(ov_SC04_019_OUT).ld ov_SC04_019_SPLAT_YAML := config/splat.ov_SC04_019.yaml -ov_SC04_019_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_019_jr_8012ACE0.o,tail2.data.o,ov_SC04_019_jr_80135888.o,tail3.data.o,ov_SC04_019_jr_80135A4C.o,tail4.data.o,ov_SC04_019_jr_80135D20.o,tail5.data.o,ov_SC04_019_jr_801380E0.o,tail6.data.o,ov_SC04_019_jr_8013F350.o,tail7.data.o,ov_SC04_019_jr_8013FFD8.o,tail8.data.o,ov_SC04_019_jr_80140608.o,tail9.data.o,ov_SC04_019_jr_8015444C.o,tail10.data.o,ov_SC04_019_jr_80154C24.o,ov_SC04_019_jr_801588CC.o,tail11.data.o,ov_SC04_019_jr_80159C84.o,tail12.data.o,ov_SC04_019_jr_8015A3C8.o,tail13.data.o,ov_SC04_019_jr_8015AE2C.o,tail14.data.o,ov_SC04_019_jr_8015C32C.o,tail15.data.o,ov_SC04_019_jr_8016AB6C.o,tail16.data.o,ov_SC04_019_jr_801734BC.o,tail17.data.o,ov_SC04_019_jr_80178D40.o,tail18.data.o,ov_SC04_019_jr_8017A4AC.o,tail19.data.o,ov_SC04_019_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC04_019_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_019.o,tail2.data.o,ov_SC04_019_jr_8012ACE0.o,tail3.data.o,ov_SC04_019_jr_80135888.o,tail4.data.o,ov_SC04_019_jr_80135A4C.o,tail5.data.o,ov_SC04_019_jr_80135D20.o,tail6.data.o,ov_SC04_019_jr_801380E0.o,tail7.data.o,ov_SC04_019_jr_8013F350.o,tail8.data.o,ov_SC04_019_jr_8013FFD8.o,tail9.data.o,ov_SC04_019_jr_80140608.o,tail10.data.o,ov_SC04_019_jr_8015444C.o,tail11.data.o,ov_SC04_019_jr_80154C24.o,ov_SC04_019_jr_801588CC.o,tail12.data.o,ov_SC04_019_jr_80159C84.o,tail13.data.o,ov_SC04_019_jr_8015A3C8.o,tail14.data.o,ov_SC04_019_jr_8015AE2C.o,tail15.data.o,ov_SC04_019_jr_8015C32C.o,tail16.data.o,ov_SC04_019_jr_8016AB6C.o,tail17.data.o,ov_SC04_019_jr_801734BC.o,tail18.data.o,ov_SC04_019_jr_80178D40.o,tail19.data.o,ov_SC04_019_jr_8017A4AC.o,tail20.data.o,ov_SC04_019_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC04_019/ov_SC04_019_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC04_019/ov_SC04_019_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC04_019/ov_SC04_019_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1479,7 +1479,7 @@ ov_SC03_093_ELF := $(ov_SC03_093_OUT).elf ov_SC03_093_MAPFILE := $(ov_SC03_093_OUT).map ov_SC03_093_LD_SCRIPT := $(ov_SC03_093_OUT).ld ov_SC03_093_SPLAT_YAML := config/splat.ov_SC03_093.yaml -ov_SC03_093_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_093_jr_8012ACE0.o,tail2.data.o,ov_SC03_093_jr_80135888.o,tail3.data.o,ov_SC03_093_jr_80135A4C.o,tail4.data.o,ov_SC03_093_jr_80135D20.o,tail5.data.o,ov_SC03_093_jr_801380E0.o,tail6.data.o,ov_SC03_093_jr_8013F350.o,tail7.data.o,ov_SC03_093_jr_8013FFD8.o,tail8.data.o,ov_SC03_093_jr_80140608.o,tail9.data.o,ov_SC03_093_jr_8015444C.o,tail10.data.o,ov_SC03_093_jr_80154C24.o,ov_SC03_093_jr_801588CC.o,tail11.data.o,ov_SC03_093_jr_80159C84.o,tail12.data.o,ov_SC03_093_jr_8015A3C8.o,tail13.data.o,ov_SC03_093_jr_8015AE2C.o,tail14.data.o,ov_SC03_093_jr_8015C32C.o,tail15.data.o,ov_SC03_093_jr_8016AB6C.o,tail16.data.o,ov_SC03_093_jr_801734BC.o,tail17.data.o,ov_SC03_093_jr_80178D40.o,tail18.data.o,ov_SC03_093_jr_8017A4AC.o,tail19.data.o,ov_SC03_093_jr_8017AE2C.o,ov_SC03_093_jr_8017D898.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_093_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_093.o,tail2.data.o,ov_SC03_093_jr_8012ACE0.o,tail3.data.o,ov_SC03_093_jr_80135888.o,tail4.data.o,ov_SC03_093_jr_80135A4C.o,tail5.data.o,ov_SC03_093_jr_80135D20.o,tail6.data.o,ov_SC03_093_jr_801380E0.o,tail7.data.o,ov_SC03_093_jr_8013F350.o,tail8.data.o,ov_SC03_093_jr_8013FFD8.o,tail9.data.o,ov_SC03_093_jr_80140608.o,tail10.data.o,ov_SC03_093_jr_8015444C.o,tail11.data.o,ov_SC03_093_jr_80154C24.o,ov_SC03_093_jr_801588CC.o,tail12.data.o,ov_SC03_093_jr_80159C84.o,tail13.data.o,ov_SC03_093_jr_8015A3C8.o,tail14.data.o,ov_SC03_093_jr_8015AE2C.o,tail15.data.o,ov_SC03_093_jr_8015C32C.o,tail16.data.o,ov_SC03_093_jr_8016AB6C.o,tail17.data.o,ov_SC03_093_jr_801734BC.o,tail18.data.o,ov_SC03_093_jr_80178D40.o,tail19.data.o,ov_SC03_093_jr_8017A4AC.o,tail20.data.o,ov_SC03_093_jr_8017AE2C.o,ov_SC03_093_jr_8017D898.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_093/ov_SC03_093_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_093/ov_SC03_093_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_093/ov_SC03_093_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1506,7 +1506,7 @@ ov_SC03_094_ELF := $(ov_SC03_094_OUT).elf ov_SC03_094_MAPFILE := $(ov_SC03_094_OUT).map ov_SC03_094_LD_SCRIPT := $(ov_SC03_094_OUT).ld ov_SC03_094_SPLAT_YAML := config/splat.ov_SC03_094.yaml -ov_SC03_094_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_094_jr_8012ACE0.o,tail2.data.o,ov_SC03_094_jr_80135888.o,tail3.data.o,ov_SC03_094_jr_80135A4C.o,tail4.data.o,ov_SC03_094_jr_80135D20.o,tail5.data.o,ov_SC03_094_jr_801380E0.o,tail6.data.o,ov_SC03_094_jr_8013F350.o,tail7.data.o,ov_SC03_094_jr_8013FFD8.o,tail8.data.o,ov_SC03_094_jr_80140608.o,tail9.data.o,ov_SC03_094_jr_8015444C.o,tail10.data.o,ov_SC03_094_jr_80154C24.o,ov_SC03_094_jr_801588CC.o,tail11.data.o,ov_SC03_094_jr_80159C84.o,tail12.data.o,ov_SC03_094_jr_8015A3C8.o,tail13.data.o,ov_SC03_094_jr_8015AE2C.o,tail14.data.o,ov_SC03_094_jr_8015C32C.o,tail15.data.o,ov_SC03_094_jr_8016AB6C.o,tail16.data.o,ov_SC03_094_jr_801734BC.o,tail17.data.o,ov_SC03_094_jr_80178D40.o,tail18.data.o,ov_SC03_094_jr_8017A4AC.o,tail19.data.o,ov_SC03_094_jr_8017AE2C.o,ov_SC03_094_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_094_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_094.o,tail2.data.o,ov_SC03_094_jr_8012ACE0.o,tail3.data.o,ov_SC03_094_jr_80135888.o,tail4.data.o,ov_SC03_094_jr_80135A4C.o,tail5.data.o,ov_SC03_094_jr_80135D20.o,tail6.data.o,ov_SC03_094_jr_801380E0.o,tail7.data.o,ov_SC03_094_jr_8013F350.o,tail8.data.o,ov_SC03_094_jr_8013FFD8.o,tail9.data.o,ov_SC03_094_jr_80140608.o,tail10.data.o,ov_SC03_094_jr_8015444C.o,tail11.data.o,ov_SC03_094_jr_80154C24.o,ov_SC03_094_jr_801588CC.o,tail12.data.o,ov_SC03_094_jr_80159C84.o,tail13.data.o,ov_SC03_094_jr_8015A3C8.o,tail14.data.o,ov_SC03_094_jr_8015AE2C.o,tail15.data.o,ov_SC03_094_jr_8015C32C.o,tail16.data.o,ov_SC03_094_jr_8016AB6C.o,tail17.data.o,ov_SC03_094_jr_801734BC.o,tail18.data.o,ov_SC03_094_jr_80178D40.o,tail19.data.o,ov_SC03_094_jr_8017A4AC.o,tail20.data.o,ov_SC03_094_jr_8017AE2C.o,ov_SC03_094_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_094/ov_SC03_094_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_094/ov_SC03_094_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_094/ov_SC03_094_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1533,7 +1533,7 @@ ov_SC03_095_ELF := $(ov_SC03_095_OUT).elf ov_SC03_095_MAPFILE := $(ov_SC03_095_OUT).map ov_SC03_095_LD_SCRIPT := $(ov_SC03_095_OUT).ld ov_SC03_095_SPLAT_YAML := config/splat.ov_SC03_095.yaml -ov_SC03_095_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_095_jr_8012ACE0.o,tail2.data.o,ov_SC03_095_jr_80135888.o,tail3.data.o,ov_SC03_095_jr_80135A4C.o,tail4.data.o,ov_SC03_095_jr_80135D20.o,tail5.data.o,ov_SC03_095_jr_801380E0.o,tail6.data.o,ov_SC03_095_jr_8013F350.o,tail7.data.o,ov_SC03_095_jr_8013FFD8.o,tail8.data.o,ov_SC03_095_jr_80140608.o,tail9.data.o,ov_SC03_095_jr_8015444C.o,tail10.data.o,ov_SC03_095_jr_80154C24.o,ov_SC03_095_jr_801588CC.o,tail11.data.o,ov_SC03_095_jr_80159C84.o,tail12.data.o,ov_SC03_095_jr_8015A3C8.o,tail13.data.o,ov_SC03_095_jr_8015AE2C.o,tail14.data.o,ov_SC03_095_jr_8015C32C.o,tail15.data.o,ov_SC03_095_jr_8016AB6C.o,tail16.data.o,ov_SC03_095_jr_801734BC.o,tail17.data.o,ov_SC03_095_jr_80178D40.o,tail18.data.o,ov_SC03_095_jr_8017A4AC.o,tail19.data.o,ov_SC03_095_jr_8017AE2C.o,ov_SC03_095_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_095_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_095.o,tail2.data.o,ov_SC03_095_jr_8012ACE0.o,tail3.data.o,ov_SC03_095_jr_80135888.o,tail4.data.o,ov_SC03_095_jr_80135A4C.o,tail5.data.o,ov_SC03_095_jr_80135D20.o,tail6.data.o,ov_SC03_095_jr_801380E0.o,tail7.data.o,ov_SC03_095_jr_8013F350.o,tail8.data.o,ov_SC03_095_jr_8013FFD8.o,tail9.data.o,ov_SC03_095_jr_80140608.o,tail10.data.o,ov_SC03_095_jr_8015444C.o,tail11.data.o,ov_SC03_095_jr_80154C24.o,ov_SC03_095_jr_801588CC.o,tail12.data.o,ov_SC03_095_jr_80159C84.o,tail13.data.o,ov_SC03_095_jr_8015A3C8.o,tail14.data.o,ov_SC03_095_jr_8015AE2C.o,tail15.data.o,ov_SC03_095_jr_8015C32C.o,tail16.data.o,ov_SC03_095_jr_8016AB6C.o,tail17.data.o,ov_SC03_095_jr_801734BC.o,tail18.data.o,ov_SC03_095_jr_80178D40.o,tail19.data.o,ov_SC03_095_jr_8017A4AC.o,tail20.data.o,ov_SC03_095_jr_8017AE2C.o,ov_SC03_095_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_095/ov_SC03_095_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_095/ov_SC03_095_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_095/ov_SC03_095_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1560,7 +1560,7 @@ ov_SC03_096_ELF := $(ov_SC03_096_OUT).elf ov_SC03_096_MAPFILE := $(ov_SC03_096_OUT).map ov_SC03_096_LD_SCRIPT := $(ov_SC03_096_OUT).ld ov_SC03_096_SPLAT_YAML := config/splat.ov_SC03_096.yaml -ov_SC03_096_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_096_jr_8012ACE0.o,tail2.data.o,ov_SC03_096_jr_80135888.o,tail3.data.o,ov_SC03_096_jr_80135A4C.o,tail4.data.o,ov_SC03_096_jr_80135D20.o,tail5.data.o,ov_SC03_096_jr_801380E0.o,tail6.data.o,ov_SC03_096_jr_8013F350.o,tail7.data.o,ov_SC03_096_jr_8013FFD8.o,tail8.data.o,ov_SC03_096_jr_80140608.o,tail9.data.o,ov_SC03_096_jr_8015444C.o,tail10.data.o,ov_SC03_096_jr_80154C24.o,ov_SC03_096_jr_801588CC.o,tail11.data.o,ov_SC03_096_jr_80159C84.o,tail12.data.o,ov_SC03_096_jr_8015A3C8.o,tail13.data.o,ov_SC03_096_jr_8015AE2C.o,tail14.data.o,ov_SC03_096_jr_8015C32C.o,tail15.data.o,ov_SC03_096_jr_8016AB6C.o,tail16.data.o,ov_SC03_096_jr_801734BC.o,tail17.data.o,ov_SC03_096_jr_80178D40.o,tail18.data.o,ov_SC03_096_jr_8017A4AC.o,tail19.data.o,ov_SC03_096_jr_8017AE2C.o,ov_SC03_096_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_096_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_096.o,tail2.data.o,ov_SC03_096_jr_8012ACE0.o,tail3.data.o,ov_SC03_096_jr_80135888.o,tail4.data.o,ov_SC03_096_jr_80135A4C.o,tail5.data.o,ov_SC03_096_jr_80135D20.o,tail6.data.o,ov_SC03_096_jr_801380E0.o,tail7.data.o,ov_SC03_096_jr_8013F350.o,tail8.data.o,ov_SC03_096_jr_8013FFD8.o,tail9.data.o,ov_SC03_096_jr_80140608.o,tail10.data.o,ov_SC03_096_jr_8015444C.o,tail11.data.o,ov_SC03_096_jr_80154C24.o,ov_SC03_096_jr_801588CC.o,tail12.data.o,ov_SC03_096_jr_80159C84.o,tail13.data.o,ov_SC03_096_jr_8015A3C8.o,tail14.data.o,ov_SC03_096_jr_8015AE2C.o,tail15.data.o,ov_SC03_096_jr_8015C32C.o,tail16.data.o,ov_SC03_096_jr_8016AB6C.o,tail17.data.o,ov_SC03_096_jr_801734BC.o,tail18.data.o,ov_SC03_096_jr_80178D40.o,tail19.data.o,ov_SC03_096_jr_8017A4AC.o,tail20.data.o,ov_SC03_096_jr_8017AE2C.o,ov_SC03_096_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_096/ov_SC03_096_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_096/ov_SC03_096_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_096/ov_SC03_096_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1587,7 +1587,7 @@ ov_SC03_097_ELF := $(ov_SC03_097_OUT).elf ov_SC03_097_MAPFILE := $(ov_SC03_097_OUT).map ov_SC03_097_LD_SCRIPT := $(ov_SC03_097_OUT).ld ov_SC03_097_SPLAT_YAML := config/splat.ov_SC03_097.yaml -ov_SC03_097_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_097_jr_8012ACE0.o,tail2.data.o,ov_SC03_097_jr_80135888.o,tail3.data.o,ov_SC03_097_jr_80135A4C.o,tail4.data.o,ov_SC03_097_jr_80135D20.o,tail5.data.o,ov_SC03_097_jr_801380E0.o,tail6.data.o,ov_SC03_097_jr_8013F350.o,tail7.data.o,ov_SC03_097_jr_8013FFD8.o,tail8.data.o,ov_SC03_097_jr_80140608.o,tail9.data.o,ov_SC03_097_jr_8015444C.o,tail10.data.o,ov_SC03_097_jr_80154C24.o,ov_SC03_097_jr_801588CC.o,tail11.data.o,ov_SC03_097_jr_80159C84.o,tail12.data.o,ov_SC03_097_jr_8015A3C8.o,tail13.data.o,ov_SC03_097_jr_8015AE2C.o,tail14.data.o,ov_SC03_097_jr_8015C32C.o,tail15.data.o,ov_SC03_097_jr_8016AB6C.o,tail16.data.o,ov_SC03_097_jr_801734BC.o,tail17.data.o,ov_SC03_097_jr_80178D40.o,tail18.data.o,ov_SC03_097_jr_8017A4AC.o,tail19.data.o,ov_SC03_097_jr_8017AE2C.o,ov_SC03_097_jr_8017D898.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_097_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_097.o,tail2.data.o,ov_SC03_097_jr_8012ACE0.o,tail3.data.o,ov_SC03_097_jr_80135888.o,tail4.data.o,ov_SC03_097_jr_80135A4C.o,tail5.data.o,ov_SC03_097_jr_80135D20.o,tail6.data.o,ov_SC03_097_jr_801380E0.o,tail7.data.o,ov_SC03_097_jr_8013F350.o,tail8.data.o,ov_SC03_097_jr_8013FFD8.o,tail9.data.o,ov_SC03_097_jr_80140608.o,tail10.data.o,ov_SC03_097_jr_8015444C.o,tail11.data.o,ov_SC03_097_jr_80154C24.o,ov_SC03_097_jr_801588CC.o,tail12.data.o,ov_SC03_097_jr_80159C84.o,tail13.data.o,ov_SC03_097_jr_8015A3C8.o,tail14.data.o,ov_SC03_097_jr_8015AE2C.o,tail15.data.o,ov_SC03_097_jr_8015C32C.o,tail16.data.o,ov_SC03_097_jr_8016AB6C.o,tail17.data.o,ov_SC03_097_jr_801734BC.o,tail18.data.o,ov_SC03_097_jr_80178D40.o,tail19.data.o,ov_SC03_097_jr_8017A4AC.o,tail20.data.o,ov_SC03_097_jr_8017AE2C.o,ov_SC03_097_jr_8017D898.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_097/ov_SC03_097_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_097/ov_SC03_097_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_097/ov_SC03_097_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1614,7 +1614,7 @@ ov_SC03_098_ELF := $(ov_SC03_098_OUT).elf ov_SC03_098_MAPFILE := $(ov_SC03_098_OUT).map ov_SC03_098_LD_SCRIPT := $(ov_SC03_098_OUT).ld ov_SC03_098_SPLAT_YAML := config/splat.ov_SC03_098.yaml -ov_SC03_098_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_098_jr_8012ACE0.o,tail2.data.o,ov_SC03_098_jr_80135888.o,tail3.data.o,ov_SC03_098_jr_80135A4C.o,tail4.data.o,ov_SC03_098_jr_80135D20.o,tail5.data.o,ov_SC03_098_jr_801380E0.o,tail6.data.o,ov_SC03_098_jr_8013F350.o,tail7.data.o,ov_SC03_098_jr_8013FFD8.o,tail8.data.o,ov_SC03_098_jr_80140608.o,tail9.data.o,ov_SC03_098_jr_8015444C.o,tail10.data.o,ov_SC03_098_jr_80154C24.o,ov_SC03_098_jr_801588CC.o,tail11.data.o,ov_SC03_098_jr_80159C84.o,tail12.data.o,ov_SC03_098_jr_8015A3C8.o,tail13.data.o,ov_SC03_098_jr_8015AE2C.o,tail14.data.o,ov_SC03_098_jr_8015C32C.o,tail15.data.o,ov_SC03_098_jr_8016AB6C.o,tail16.data.o,ov_SC03_098_jr_801734BC.o,tail17.data.o,ov_SC03_098_jr_80178D40.o,tail18.data.o,ov_SC03_098_jr_8017A4AC.o,tail19.data.o,ov_SC03_098_jr_8017AE2C.o,ov_SC03_098_jr_8017D898.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_098_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_098.o,tail2.data.o,ov_SC03_098_jr_8012ACE0.o,tail3.data.o,ov_SC03_098_jr_80135888.o,tail4.data.o,ov_SC03_098_jr_80135A4C.o,tail5.data.o,ov_SC03_098_jr_80135D20.o,tail6.data.o,ov_SC03_098_jr_801380E0.o,tail7.data.o,ov_SC03_098_jr_8013F350.o,tail8.data.o,ov_SC03_098_jr_8013FFD8.o,tail9.data.o,ov_SC03_098_jr_80140608.o,tail10.data.o,ov_SC03_098_jr_8015444C.o,tail11.data.o,ov_SC03_098_jr_80154C24.o,ov_SC03_098_jr_801588CC.o,tail12.data.o,ov_SC03_098_jr_80159C84.o,tail13.data.o,ov_SC03_098_jr_8015A3C8.o,tail14.data.o,ov_SC03_098_jr_8015AE2C.o,tail15.data.o,ov_SC03_098_jr_8015C32C.o,tail16.data.o,ov_SC03_098_jr_8016AB6C.o,tail17.data.o,ov_SC03_098_jr_801734BC.o,tail18.data.o,ov_SC03_098_jr_80178D40.o,tail19.data.o,ov_SC03_098_jr_8017A4AC.o,tail20.data.o,ov_SC03_098_jr_8017AE2C.o,ov_SC03_098_jr_8017D898.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_098/ov_SC03_098_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_098/ov_SC03_098_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_098/ov_SC03_098_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1641,7 +1641,7 @@ ov_SC03_099_ELF := $(ov_SC03_099_OUT).elf ov_SC03_099_MAPFILE := $(ov_SC03_099_OUT).map ov_SC03_099_LD_SCRIPT := $(ov_SC03_099_OUT).ld ov_SC03_099_SPLAT_YAML := config/splat.ov_SC03_099.yaml -ov_SC03_099_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_099_jr_8012ACE0.o,tail2.data.o,ov_SC03_099_jr_80135888.o,tail3.data.o,ov_SC03_099_jr_80135A4C.o,tail4.data.o,ov_SC03_099_jr_80135D20.o,tail5.data.o,ov_SC03_099_jr_801380E0.o,tail6.data.o,ov_SC03_099_jr_8013F350.o,tail7.data.o,ov_SC03_099_jr_8013FFD8.o,tail8.data.o,ov_SC03_099_jr_80140608.o,tail9.data.o,ov_SC03_099_jr_8015444C.o,tail10.data.o,ov_SC03_099_jr_80154C24.o,ov_SC03_099_jr_801588CC.o,tail11.data.o,ov_SC03_099_jr_80159C84.o,tail12.data.o,ov_SC03_099_jr_8015A3C8.o,tail13.data.o,ov_SC03_099_jr_8015AE2C.o,tail14.data.o,ov_SC03_099_jr_8015C32C.o,tail15.data.o,ov_SC03_099_jr_8016AB6C.o,tail16.data.o,ov_SC03_099_jr_801734BC.o,tail17.data.o,ov_SC03_099_jr_80178D40.o,tail18.data.o,ov_SC03_099_jr_8017A4AC.o,tail19.data.o,ov_SC03_099_jr_8017AE2C.o,ov_SC03_099_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_099_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_099.o,tail2.data.o,ov_SC03_099_jr_8012ACE0.o,tail3.data.o,ov_SC03_099_jr_80135888.o,tail4.data.o,ov_SC03_099_jr_80135A4C.o,tail5.data.o,ov_SC03_099_jr_80135D20.o,tail6.data.o,ov_SC03_099_jr_801380E0.o,tail7.data.o,ov_SC03_099_jr_8013F350.o,tail8.data.o,ov_SC03_099_jr_8013FFD8.o,tail9.data.o,ov_SC03_099_jr_80140608.o,tail10.data.o,ov_SC03_099_jr_8015444C.o,tail11.data.o,ov_SC03_099_jr_80154C24.o,ov_SC03_099_jr_801588CC.o,tail12.data.o,ov_SC03_099_jr_80159C84.o,tail13.data.o,ov_SC03_099_jr_8015A3C8.o,tail14.data.o,ov_SC03_099_jr_8015AE2C.o,tail15.data.o,ov_SC03_099_jr_8015C32C.o,tail16.data.o,ov_SC03_099_jr_8016AB6C.o,tail17.data.o,ov_SC03_099_jr_801734BC.o,tail18.data.o,ov_SC03_099_jr_80178D40.o,tail19.data.o,ov_SC03_099_jr_8017A4AC.o,tail20.data.o,ov_SC03_099_jr_8017AE2C.o,ov_SC03_099_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_099/ov_SC03_099_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_099/ov_SC03_099_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_099/ov_SC03_099_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1668,7 +1668,7 @@ ov_SC03_100_ELF := $(ov_SC03_100_OUT).elf ov_SC03_100_MAPFILE := $(ov_SC03_100_OUT).map ov_SC03_100_LD_SCRIPT := $(ov_SC03_100_OUT).ld ov_SC03_100_SPLAT_YAML := config/splat.ov_SC03_100.yaml -ov_SC03_100_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_100_jr_8012ACE0.o,tail2.data.o,ov_SC03_100_jr_80135888.o,tail3.data.o,ov_SC03_100_jr_80135A4C.o,tail4.data.o,ov_SC03_100_jr_80135D20.o,tail5.data.o,ov_SC03_100_jr_801380E0.o,tail6.data.o,ov_SC03_100_jr_8013F350.o,tail7.data.o,ov_SC03_100_jr_8013FFD8.o,tail8.data.o,ov_SC03_100_jr_80140608.o,tail9.data.o,ov_SC03_100_jr_8015444C.o,tail10.data.o,ov_SC03_100_jr_80154C24.o,ov_SC03_100_jr_801588CC.o,tail11.data.o,ov_SC03_100_jr_80159C84.o,tail12.data.o,ov_SC03_100_jr_8015A3C8.o,tail13.data.o,ov_SC03_100_jr_8015AE2C.o,tail14.data.o,ov_SC03_100_jr_8015C32C.o,tail15.data.o,ov_SC03_100_jr_8016AB6C.o,tail16.data.o,ov_SC03_100_jr_801734BC.o,tail17.data.o,ov_SC03_100_jr_80178D40.o,tail18.data.o,ov_SC03_100_jr_8017A4AC.o,tail19.data.o,ov_SC03_100_jr_8017AE2C.o,ov_SC03_100_jr_8017D898.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_100_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_100.o,tail2.data.o,ov_SC03_100_jr_8012ACE0.o,tail3.data.o,ov_SC03_100_jr_80135888.o,tail4.data.o,ov_SC03_100_jr_80135A4C.o,tail5.data.o,ov_SC03_100_jr_80135D20.o,tail6.data.o,ov_SC03_100_jr_801380E0.o,tail7.data.o,ov_SC03_100_jr_8013F350.o,tail8.data.o,ov_SC03_100_jr_8013FFD8.o,tail9.data.o,ov_SC03_100_jr_80140608.o,tail10.data.o,ov_SC03_100_jr_8015444C.o,tail11.data.o,ov_SC03_100_jr_80154C24.o,ov_SC03_100_jr_801588CC.o,tail12.data.o,ov_SC03_100_jr_80159C84.o,tail13.data.o,ov_SC03_100_jr_8015A3C8.o,tail14.data.o,ov_SC03_100_jr_8015AE2C.o,tail15.data.o,ov_SC03_100_jr_8015C32C.o,tail16.data.o,ov_SC03_100_jr_8016AB6C.o,tail17.data.o,ov_SC03_100_jr_801734BC.o,tail18.data.o,ov_SC03_100_jr_80178D40.o,tail19.data.o,ov_SC03_100_jr_8017A4AC.o,tail20.data.o,ov_SC03_100_jr_8017AE2C.o,ov_SC03_100_jr_8017D898.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_100/ov_SC03_100_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_100/ov_SC03_100_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_100/ov_SC03_100_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1695,7 +1695,7 @@ ov_SC03_101_ELF := $(ov_SC03_101_OUT).elf ov_SC03_101_MAPFILE := $(ov_SC03_101_OUT).map ov_SC03_101_LD_SCRIPT := $(ov_SC03_101_OUT).ld ov_SC03_101_SPLAT_YAML := config/splat.ov_SC03_101.yaml -ov_SC03_101_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_101_jr_8012ACE0.o,tail2.data.o,ov_SC03_101_jr_80135888.o,tail3.data.o,ov_SC03_101_jr_80135A4C.o,tail4.data.o,ov_SC03_101_jr_80135D20.o,tail5.data.o,ov_SC03_101_jr_801380E0.o,tail6.data.o,ov_SC03_101_jr_8013F350.o,tail7.data.o,ov_SC03_101_jr_8013FFD8.o,tail8.data.o,ov_SC03_101_jr_80140608.o,tail9.data.o,ov_SC03_101_jr_8015444C.o,tail10.data.o,ov_SC03_101_jr_80154C24.o,ov_SC03_101_jr_801588CC.o,tail11.data.o,ov_SC03_101_jr_80159C84.o,tail12.data.o,ov_SC03_101_jr_8015A3C8.o,tail13.data.o,ov_SC03_101_jr_8015AE2C.o,tail14.data.o,ov_SC03_101_jr_8015C32C.o,tail15.data.o,ov_SC03_101_jr_8016AB6C.o,tail16.data.o,ov_SC03_101_jr_801734BC.o,tail17.data.o,ov_SC03_101_jr_80178D40.o,tail18.data.o,ov_SC03_101_jr_8017A4AC.o,tail19.data.o,ov_SC03_101_jr_8017AE2C.o,ov_SC03_101_jr_8017CA80.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_101_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_101.o,tail2.data.o,ov_SC03_101_jr_8012ACE0.o,tail3.data.o,ov_SC03_101_jr_80135888.o,tail4.data.o,ov_SC03_101_jr_80135A4C.o,tail5.data.o,ov_SC03_101_jr_80135D20.o,tail6.data.o,ov_SC03_101_jr_801380E0.o,tail7.data.o,ov_SC03_101_jr_8013F350.o,tail8.data.o,ov_SC03_101_jr_8013FFD8.o,tail9.data.o,ov_SC03_101_jr_80140608.o,tail10.data.o,ov_SC03_101_jr_8015444C.o,tail11.data.o,ov_SC03_101_jr_80154C24.o,ov_SC03_101_jr_801588CC.o,tail12.data.o,ov_SC03_101_jr_80159C84.o,tail13.data.o,ov_SC03_101_jr_8015A3C8.o,tail14.data.o,ov_SC03_101_jr_8015AE2C.o,tail15.data.o,ov_SC03_101_jr_8015C32C.o,tail16.data.o,ov_SC03_101_jr_8016AB6C.o,tail17.data.o,ov_SC03_101_jr_801734BC.o,tail18.data.o,ov_SC03_101_jr_80178D40.o,tail19.data.o,ov_SC03_101_jr_8017A4AC.o,tail20.data.o,ov_SC03_101_jr_8017AE2C.o,ov_SC03_101_jr_8017CA80.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_101/ov_SC03_101_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_101/ov_SC03_101_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_101/ov_SC03_101_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1722,7 +1722,7 @@ ov_SC03_102_ELF := $(ov_SC03_102_OUT).elf ov_SC03_102_MAPFILE := $(ov_SC03_102_OUT).map ov_SC03_102_LD_SCRIPT := $(ov_SC03_102_OUT).ld ov_SC03_102_SPLAT_YAML := config/splat.ov_SC03_102.yaml -ov_SC03_102_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_102_jr_8012ACE0.o,tail2.data.o,ov_SC03_102_jr_80135888.o,tail3.data.o,ov_SC03_102_jr_80135A4C.o,tail4.data.o,ov_SC03_102_jr_80135D20.o,tail5.data.o,ov_SC03_102_jr_801380E0.o,tail6.data.o,ov_SC03_102_jr_8013F350.o,tail7.data.o,ov_SC03_102_jr_8013FFD8.o,tail8.data.o,ov_SC03_102_jr_80140608.o,tail9.data.o,ov_SC03_102_jr_8015444C.o,tail10.data.o,ov_SC03_102_jr_80154C24.o,ov_SC03_102_jr_801588CC.o,tail11.data.o,ov_SC03_102_jr_80159C84.o,tail12.data.o,ov_SC03_102_jr_8015A3C8.o,tail13.data.o,ov_SC03_102_jr_8015AE2C.o,tail14.data.o,ov_SC03_102_jr_8015C32C.o,tail15.data.o,ov_SC03_102_jr_8016AB6C.o,tail16.data.o,ov_SC03_102_jr_801734BC.o,tail17.data.o,ov_SC03_102_jr_80178D40.o,tail18.data.o,ov_SC03_102_jr_8017A4AC.o,tail19.data.o,ov_SC03_102_jr_8017AE2C.o,ov_SC03_102_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_102_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_102.o,tail2.data.o,ov_SC03_102_jr_8012ACE0.o,tail3.data.o,ov_SC03_102_jr_80135888.o,tail4.data.o,ov_SC03_102_jr_80135A4C.o,tail5.data.o,ov_SC03_102_jr_80135D20.o,tail6.data.o,ov_SC03_102_jr_801380E0.o,tail7.data.o,ov_SC03_102_jr_8013F350.o,tail8.data.o,ov_SC03_102_jr_8013FFD8.o,tail9.data.o,ov_SC03_102_jr_80140608.o,tail10.data.o,ov_SC03_102_jr_8015444C.o,tail11.data.o,ov_SC03_102_jr_80154C24.o,ov_SC03_102_jr_801588CC.o,tail12.data.o,ov_SC03_102_jr_80159C84.o,tail13.data.o,ov_SC03_102_jr_8015A3C8.o,tail14.data.o,ov_SC03_102_jr_8015AE2C.o,tail15.data.o,ov_SC03_102_jr_8015C32C.o,tail16.data.o,ov_SC03_102_jr_8016AB6C.o,tail17.data.o,ov_SC03_102_jr_801734BC.o,tail18.data.o,ov_SC03_102_jr_80178D40.o,tail19.data.o,ov_SC03_102_jr_8017A4AC.o,tail20.data.o,ov_SC03_102_jr_8017AE2C.o,ov_SC03_102_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_102/ov_SC03_102_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_102/ov_SC03_102_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_102/ov_SC03_102_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1749,7 +1749,7 @@ ov_SC03_103_ELF := $(ov_SC03_103_OUT).elf ov_SC03_103_MAPFILE := $(ov_SC03_103_OUT).map ov_SC03_103_LD_SCRIPT := $(ov_SC03_103_OUT).ld ov_SC03_103_SPLAT_YAML := config/splat.ov_SC03_103.yaml -ov_SC03_103_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_103_jr_8012ACE0.o,tail2.data.o,ov_SC03_103_jr_80135888.o,tail3.data.o,ov_SC03_103_jr_80135A4C.o,tail4.data.o,ov_SC03_103_jr_80135D20.o,tail5.data.o,ov_SC03_103_jr_801380E0.o,tail6.data.o,ov_SC03_103_jr_8013F350.o,tail7.data.o,ov_SC03_103_jr_80140608.o,tail8.data.o,ov_SC03_103_jr_8015444C.o,tail9.data.o,ov_SC03_103_jr_80154C24.o,ov_SC03_103_jr_801588CC.o,tail10.data.o,ov_SC03_103_jr_80159C84.o,tail11.data.o,ov_SC03_103_jr_8015A3C8.o,tail12.data.o,ov_SC03_103_jr_8015AE2C.o,tail13.data.o,ov_SC03_103_jr_8015C32C.o,tail14.data.o,ov_SC03_103_jr_8016AB6C.o,tail15.data.o,ov_SC03_103_jr_801734BC.o,tail16.data.o,ov_SC03_103_jr_80178D40.o,tail17.data.o,ov_SC03_103_jr_8017A4AC.o,tail18.data.o,ov_SC03_103_jr_8017AE2C.o,ov_SC03_103_jr_8017C294.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_103_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_103.o,tail2.data.o,ov_SC03_103_jr_8012ACE0.o,tail3.data.o,ov_SC03_103_jr_80135888.o,tail4.data.o,ov_SC03_103_jr_80135A4C.o,tail5.data.o,ov_SC03_103_jr_80135D20.o,tail6.data.o,ov_SC03_103_jr_801380E0.o,tail7.data.o,ov_SC03_103_jr_8013F350.o,tail8.data.o,ov_SC03_103_jr_80140608.o,tail9.data.o,ov_SC03_103_jr_8015444C.o,tail10.data.o,ov_SC03_103_jr_80154C24.o,ov_SC03_103_jr_801588CC.o,tail11.data.o,ov_SC03_103_jr_80159C84.o,tail12.data.o,ov_SC03_103_jr_8015A3C8.o,tail13.data.o,ov_SC03_103_jr_8015AE2C.o,tail14.data.o,ov_SC03_103_jr_8015C32C.o,tail15.data.o,ov_SC03_103_jr_8016AB6C.o,tail16.data.o,ov_SC03_103_jr_801734BC.o,tail17.data.o,ov_SC03_103_jr_80178D40.o,tail18.data.o,ov_SC03_103_jr_8017A4AC.o,tail19.data.o,ov_SC03_103_jr_8017AE2C.o,ov_SC03_103_jr_8017C294.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_103/ov_SC03_103_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_103/ov_SC03_103_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_103/ov_SC03_103_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1776,7 +1776,7 @@ ov_SC03_104_ELF := $(ov_SC03_104_OUT).elf ov_SC03_104_MAPFILE := $(ov_SC03_104_OUT).map ov_SC03_104_LD_SCRIPT := $(ov_SC03_104_OUT).ld ov_SC03_104_SPLAT_YAML := config/splat.ov_SC03_104.yaml -ov_SC03_104_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_104_jr_8012ACE0.o,tail2.data.o,ov_SC03_104_jr_80135888.o,tail3.data.o,ov_SC03_104_jr_80135A4C.o,tail4.data.o,ov_SC03_104_jr_80135D20.o,tail5.data.o,ov_SC03_104_jr_801380E0.o,tail6.data.o,ov_SC03_104_jr_8013F350.o,tail7.data.o,ov_SC03_104_jr_8013FFD8.o,tail8.data.o,ov_SC03_104_jr_80140608.o,tail9.data.o,ov_SC03_104_jr_8015444C.o,tail10.data.o,ov_SC03_104_jr_80154C24.o,ov_SC03_104_jr_801588CC.o,tail11.data.o,ov_SC03_104_jr_80159C84.o,tail12.data.o,ov_SC03_104_jr_8015A3C8.o,tail13.data.o,ov_SC03_104_jr_8015AE2C.o,tail14.data.o,ov_SC03_104_jr_8015C32C.o,tail15.data.o,ov_SC03_104_jr_8016AB6C.o,tail16.data.o,ov_SC03_104_jr_801734BC.o,tail17.data.o,ov_SC03_104_jr_80178D40.o,tail18.data.o,ov_SC03_104_jr_8017A4AC.o,tail19.data.o,ov_SC03_104_jr_8017AE2C.o,ov_SC03_104_jr_8017CA80.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_104_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_104.o,tail2.data.o,ov_SC03_104_jr_8012ACE0.o,tail3.data.o,ov_SC03_104_jr_80135888.o,tail4.data.o,ov_SC03_104_jr_80135A4C.o,tail5.data.o,ov_SC03_104_jr_80135D20.o,tail6.data.o,ov_SC03_104_jr_801380E0.o,tail7.data.o,ov_SC03_104_jr_8013F350.o,tail8.data.o,ov_SC03_104_jr_8013FFD8.o,tail9.data.o,ov_SC03_104_jr_80140608.o,tail10.data.o,ov_SC03_104_jr_8015444C.o,tail11.data.o,ov_SC03_104_jr_80154C24.o,ov_SC03_104_jr_801588CC.o,tail12.data.o,ov_SC03_104_jr_80159C84.o,tail13.data.o,ov_SC03_104_jr_8015A3C8.o,tail14.data.o,ov_SC03_104_jr_8015AE2C.o,tail15.data.o,ov_SC03_104_jr_8015C32C.o,tail16.data.o,ov_SC03_104_jr_8016AB6C.o,tail17.data.o,ov_SC03_104_jr_801734BC.o,tail18.data.o,ov_SC03_104_jr_80178D40.o,tail19.data.o,ov_SC03_104_jr_8017A4AC.o,tail20.data.o,ov_SC03_104_jr_8017AE2C.o,ov_SC03_104_jr_8017CA80.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_104/ov_SC03_104_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_104/ov_SC03_104_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_104/ov_SC03_104_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1803,7 +1803,7 @@ ov_SC03_105_ELF := $(ov_SC03_105_OUT).elf ov_SC03_105_MAPFILE := $(ov_SC03_105_OUT).map ov_SC03_105_LD_SCRIPT := $(ov_SC03_105_OUT).ld ov_SC03_105_SPLAT_YAML := config/splat.ov_SC03_105.yaml -ov_SC03_105_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_105_jr_8012ACE0.o,tail2.data.o,ov_SC03_105_jr_80135888.o,tail3.data.o,ov_SC03_105_jr_80135A4C.o,tail4.data.o,ov_SC03_105_jr_80135D20.o,tail5.data.o,ov_SC03_105_jr_801380E0.o,tail6.data.o,ov_SC03_105_jr_8013F350.o,tail7.data.o,ov_SC03_105_jr_8013FFD8.o,tail8.data.o,ov_SC03_105_jr_80140608.o,tail9.data.o,ov_SC03_105_jr_8015444C.o,tail10.data.o,ov_SC03_105_jr_80154C24.o,ov_SC03_105_jr_801588CC.o,tail11.data.o,ov_SC03_105_jr_80159C84.o,tail12.data.o,ov_SC03_105_jr_8015A3C8.o,tail13.data.o,ov_SC03_105_jr_8015AE2C.o,tail14.data.o,ov_SC03_105_jr_8015C32C.o,tail15.data.o,ov_SC03_105_jr_8016AB6C.o,tail16.data.o,ov_SC03_105_jr_801734BC.o,tail17.data.o,ov_SC03_105_jr_80178D40.o,tail18.data.o,ov_SC03_105_jr_8017A4AC.o,tail19.data.o,ov_SC03_105_jr_8017AE2C.o,tail20.data.o,ov_SC03_105_jr_8017C8D0.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_105_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_105.o,tail2.data.o,ov_SC03_105_jr_8012ACE0.o,tail3.data.o,ov_SC03_105_jr_80135888.o,tail4.data.o,ov_SC03_105_jr_80135A4C.o,tail5.data.o,ov_SC03_105_jr_80135D20.o,tail6.data.o,ov_SC03_105_jr_801380E0.o,tail7.data.o,ov_SC03_105_jr_8013F350.o,tail8.data.o,ov_SC03_105_jr_8013FFD8.o,tail9.data.o,ov_SC03_105_jr_80140608.o,tail10.data.o,ov_SC03_105_jr_8015444C.o,tail11.data.o,ov_SC03_105_jr_80154C24.o,ov_SC03_105_jr_801588CC.o,tail12.data.o,ov_SC03_105_jr_80159C84.o,tail13.data.o,ov_SC03_105_jr_8015A3C8.o,tail14.data.o,ov_SC03_105_jr_8015AE2C.o,tail15.data.o,ov_SC03_105_jr_8015C32C.o,tail16.data.o,ov_SC03_105_jr_8016AB6C.o,tail17.data.o,ov_SC03_105_jr_801734BC.o,tail18.data.o,ov_SC03_105_jr_80178D40.o,tail19.data.o,ov_SC03_105_jr_8017A4AC.o,tail20.data.o,ov_SC03_105_jr_8017AE2C.o,tail21.data.o,ov_SC03_105_jr_8017C8D0.o,tail22.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_105/ov_SC03_105_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_105/ov_SC03_105_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_105/ov_SC03_105_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1830,7 +1830,7 @@ ov_SC03_108_ELF := $(ov_SC03_108_OUT).elf ov_SC03_108_MAPFILE := $(ov_SC03_108_OUT).map ov_SC03_108_LD_SCRIPT := $(ov_SC03_108_OUT).ld ov_SC03_108_SPLAT_YAML := config/splat.ov_SC03_108.yaml -ov_SC03_108_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_108_jr_8012ACE0.o,tail2.data.o,ov_SC03_108_jr_80135888.o,tail3.data.o,ov_SC03_108_jr_80135A4C.o,tail4.data.o,ov_SC03_108_jr_80135D20.o,tail5.data.o,ov_SC03_108_jr_801380E0.o,tail6.data.o,ov_SC03_108_jr_8013F350.o,tail7.data.o,ov_SC03_108_jr_8013FFD8.o,tail8.data.o,ov_SC03_108_jr_80140608.o,tail9.data.o,ov_SC03_108_jr_8015444C.o,tail10.data.o,ov_SC03_108_jr_80154C24.o,ov_SC03_108_jr_801588CC.o,tail11.data.o,ov_SC03_108_jr_80159C84.o,tail12.data.o,ov_SC03_108_jr_8015A3C8.o,tail13.data.o,ov_SC03_108_jr_8015AE2C.o,tail14.data.o,ov_SC03_108_jr_8015C32C.o,tail15.data.o,ov_SC03_108_jr_8016AB6C.o,tail16.data.o,ov_SC03_108_jr_801734BC.o,tail17.data.o,ov_SC03_108_jr_80178D40.o,tail18.data.o,ov_SC03_108_jr_8017A4AC.o,tail19.data.o,ov_SC03_108_jr_8017AE2C.o,ov_SC03_108_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_108_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_108.o,tail2.data.o,ov_SC03_108_jr_8012ACE0.o,tail3.data.o,ov_SC03_108_jr_80135888.o,tail4.data.o,ov_SC03_108_jr_80135A4C.o,tail5.data.o,ov_SC03_108_jr_80135D20.o,tail6.data.o,ov_SC03_108_jr_801380E0.o,tail7.data.o,ov_SC03_108_jr_8013F350.o,tail8.data.o,ov_SC03_108_jr_8013FFD8.o,tail9.data.o,ov_SC03_108_jr_80140608.o,tail10.data.o,ov_SC03_108_jr_8015444C.o,tail11.data.o,ov_SC03_108_jr_80154C24.o,ov_SC03_108_jr_801588CC.o,tail12.data.o,ov_SC03_108_jr_80159C84.o,tail13.data.o,ov_SC03_108_jr_8015A3C8.o,tail14.data.o,ov_SC03_108_jr_8015AE2C.o,tail15.data.o,ov_SC03_108_jr_8015C32C.o,tail16.data.o,ov_SC03_108_jr_8016AB6C.o,tail17.data.o,ov_SC03_108_jr_801734BC.o,tail18.data.o,ov_SC03_108_jr_80178D40.o,tail19.data.o,ov_SC03_108_jr_8017A4AC.o,tail20.data.o,ov_SC03_108_jr_8017AE2C.o,ov_SC03_108_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_108/ov_SC03_108_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_108/ov_SC03_108_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_108/ov_SC03_108_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1857,7 +1857,7 @@ ov_SC03_109_ELF := $(ov_SC03_109_OUT).elf ov_SC03_109_MAPFILE := $(ov_SC03_109_OUT).map ov_SC03_109_LD_SCRIPT := $(ov_SC03_109_OUT).ld ov_SC03_109_SPLAT_YAML := config/splat.ov_SC03_109.yaml -ov_SC03_109_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_109_jr_8012ACE0.o,tail2.data.o,ov_SC03_109_jr_80135888.o,tail3.data.o,ov_SC03_109_jr_80135A4C.o,tail4.data.o,ov_SC03_109_jr_80135D20.o,tail5.data.o,ov_SC03_109_jr_801380E0.o,tail6.data.o,ov_SC03_109_jr_8013F350.o,tail7.data.o,ov_SC03_109_jr_8013FFD8.o,tail8.data.o,ov_SC03_109_jr_80140608.o,tail9.data.o,ov_SC03_109_jr_8015444C.o,tail10.data.o,ov_SC03_109_jr_80154C24.o,ov_SC03_109_jr_801588CC.o,tail11.data.o,ov_SC03_109_jr_80159C84.o,tail12.data.o,ov_SC03_109_jr_8015A3C8.o,tail13.data.o,ov_SC03_109_jr_8015AE2C.o,tail14.data.o,ov_SC03_109_jr_8015C32C.o,tail15.data.o,ov_SC03_109_jr_8016AB6C.o,tail16.data.o,ov_SC03_109_jr_801734BC.o,tail17.data.o,ov_SC03_109_jr_80178D40.o,tail18.data.o,ov_SC03_109_jr_8017A4AC.o,tail19.data.o,ov_SC03_109_jr_8017AE2C.o,ov_SC03_109_jr_8017C180.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_109_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_109.o,tail2.data.o,ov_SC03_109_jr_8012ACE0.o,tail3.data.o,ov_SC03_109_jr_80135888.o,tail4.data.o,ov_SC03_109_jr_80135A4C.o,tail5.data.o,ov_SC03_109_jr_80135D20.o,tail6.data.o,ov_SC03_109_jr_801380E0.o,tail7.data.o,ov_SC03_109_jr_8013F350.o,tail8.data.o,ov_SC03_109_jr_8013FFD8.o,tail9.data.o,ov_SC03_109_jr_80140608.o,tail10.data.o,ov_SC03_109_jr_8015444C.o,tail11.data.o,ov_SC03_109_jr_80154C24.o,ov_SC03_109_jr_801588CC.o,tail12.data.o,ov_SC03_109_jr_80159C84.o,tail13.data.o,ov_SC03_109_jr_8015A3C8.o,tail14.data.o,ov_SC03_109_jr_8015AE2C.o,tail15.data.o,ov_SC03_109_jr_8015C32C.o,tail16.data.o,ov_SC03_109_jr_8016AB6C.o,tail17.data.o,ov_SC03_109_jr_801734BC.o,tail18.data.o,ov_SC03_109_jr_80178D40.o,tail19.data.o,ov_SC03_109_jr_8017A4AC.o,tail20.data.o,ov_SC03_109_jr_8017AE2C.o,ov_SC03_109_jr_8017C180.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_109/ov_SC03_109_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_109/ov_SC03_109_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_109/ov_SC03_109_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1884,7 +1884,7 @@ ov_SC03_110_ELF := $(ov_SC03_110_OUT).elf ov_SC03_110_MAPFILE := $(ov_SC03_110_OUT).map ov_SC03_110_LD_SCRIPT := $(ov_SC03_110_OUT).ld ov_SC03_110_SPLAT_YAML := config/splat.ov_SC03_110.yaml -ov_SC03_110_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_110_jr_8012ACE0.o,tail2.data.o,ov_SC03_110_jr_80135888.o,tail3.data.o,ov_SC03_110_jr_80135A4C.o,tail4.data.o,ov_SC03_110_jr_80135D20.o,tail5.data.o,ov_SC03_110_jr_801380E0.o,tail6.data.o,ov_SC03_110_jr_8013F350.o,tail7.data.o,ov_SC03_110_jr_8013FFD8.o,tail8.data.o,ov_SC03_110_jr_80140608.o,tail9.data.o,ov_SC03_110_jr_8015444C.o,tail10.data.o,ov_SC03_110_jr_80154C24.o,ov_SC03_110_jr_801588CC.o,tail11.data.o,ov_SC03_110_jr_80159C84.o,tail12.data.o,ov_SC03_110_jr_8015A3C8.o,tail13.data.o,ov_SC03_110_jr_8015AE2C.o,tail14.data.o,ov_SC03_110_jr_8015C32C.o,tail15.data.o,ov_SC03_110_jr_8016AB6C.o,tail16.data.o,ov_SC03_110_jr_801734BC.o,tail17.data.o,ov_SC03_110_jr_80178D40.o,tail18.data.o,ov_SC03_110_jr_8017A4AC.o,tail19.data.o,ov_SC03_110_jr_8017AE2C.o,ov_SC03_110_jr_8017D898.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_110_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_110.o,tail2.data.o,ov_SC03_110_jr_8012ACE0.o,tail3.data.o,ov_SC03_110_jr_80135888.o,tail4.data.o,ov_SC03_110_jr_80135A4C.o,tail5.data.o,ov_SC03_110_jr_80135D20.o,tail6.data.o,ov_SC03_110_jr_801380E0.o,tail7.data.o,ov_SC03_110_jr_8013F350.o,tail8.data.o,ov_SC03_110_jr_8013FFD8.o,tail9.data.o,ov_SC03_110_jr_80140608.o,tail10.data.o,ov_SC03_110_jr_8015444C.o,tail11.data.o,ov_SC03_110_jr_80154C24.o,ov_SC03_110_jr_801588CC.o,tail12.data.o,ov_SC03_110_jr_80159C84.o,tail13.data.o,ov_SC03_110_jr_8015A3C8.o,tail14.data.o,ov_SC03_110_jr_8015AE2C.o,tail15.data.o,ov_SC03_110_jr_8015C32C.o,tail16.data.o,ov_SC03_110_jr_8016AB6C.o,tail17.data.o,ov_SC03_110_jr_801734BC.o,tail18.data.o,ov_SC03_110_jr_80178D40.o,tail19.data.o,ov_SC03_110_jr_8017A4AC.o,tail20.data.o,ov_SC03_110_jr_8017AE2C.o,ov_SC03_110_jr_8017D898.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_110/ov_SC03_110_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_110/ov_SC03_110_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_110/ov_SC03_110_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1911,7 +1911,7 @@ ov_SC03_111_ELF := $(ov_SC03_111_OUT).elf ov_SC03_111_MAPFILE := $(ov_SC03_111_OUT).map ov_SC03_111_LD_SCRIPT := $(ov_SC03_111_OUT).ld ov_SC03_111_SPLAT_YAML := config/splat.ov_SC03_111.yaml -ov_SC03_111_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_111_jr_8012ACE0.o,tail2.data.o,ov_SC03_111_jr_80135888.o,tail3.data.o,ov_SC03_111_jr_80135A4C.o,tail4.data.o,ov_SC03_111_jr_80135D20.o,tail5.data.o,ov_SC03_111_jr_801380E0.o,tail6.data.o,ov_SC03_111_jr_8013F350.o,tail7.data.o,ov_SC03_111_jr_8013FFD8.o,tail8.data.o,ov_SC03_111_jr_80140608.o,tail9.data.o,ov_SC03_111_jr_8015444C.o,tail10.data.o,ov_SC03_111_jr_80154C24.o,ov_SC03_111_jr_801588CC.o,tail11.data.o,ov_SC03_111_jr_80159C84.o,tail12.data.o,ov_SC03_111_jr_8015A3C8.o,tail13.data.o,ov_SC03_111_jr_8015AE2C.o,tail14.data.o,ov_SC03_111_jr_8015C32C.o,tail15.data.o,ov_SC03_111_jr_8016AB6C.o,tail16.data.o,ov_SC03_111_jr_801734BC.o,tail17.data.o,ov_SC03_111_jr_80178D40.o,tail18.data.o,ov_SC03_111_jr_8017A4AC.o,tail19.data.o,ov_SC03_111_jr_8017AE2C.o,ov_SC03_111_jr_8017EC58.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_111_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_111.o,tail2.data.o,ov_SC03_111_jr_8012ACE0.o,tail3.data.o,ov_SC03_111_jr_80135888.o,tail4.data.o,ov_SC03_111_jr_80135A4C.o,tail5.data.o,ov_SC03_111_jr_80135D20.o,tail6.data.o,ov_SC03_111_jr_801380E0.o,tail7.data.o,ov_SC03_111_jr_8013F350.o,tail8.data.o,ov_SC03_111_jr_8013FFD8.o,tail9.data.o,ov_SC03_111_jr_80140608.o,tail10.data.o,ov_SC03_111_jr_8015444C.o,tail11.data.o,ov_SC03_111_jr_80154C24.o,ov_SC03_111_jr_801588CC.o,tail12.data.o,ov_SC03_111_jr_80159C84.o,tail13.data.o,ov_SC03_111_jr_8015A3C8.o,tail14.data.o,ov_SC03_111_jr_8015AE2C.o,tail15.data.o,ov_SC03_111_jr_8015C32C.o,tail16.data.o,ov_SC03_111_jr_8016AB6C.o,tail17.data.o,ov_SC03_111_jr_801734BC.o,tail18.data.o,ov_SC03_111_jr_80178D40.o,tail19.data.o,ov_SC03_111_jr_8017A4AC.o,tail20.data.o,ov_SC03_111_jr_8017AE2C.o,ov_SC03_111_jr_8017EC58.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_111/ov_SC03_111_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_111/ov_SC03_111_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_111/ov_SC03_111_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1938,7 +1938,7 @@ ov_SC03_112_ELF := $(ov_SC03_112_OUT).elf ov_SC03_112_MAPFILE := $(ov_SC03_112_OUT).map ov_SC03_112_LD_SCRIPT := $(ov_SC03_112_OUT).ld ov_SC03_112_SPLAT_YAML := config/splat.ov_SC03_112.yaml -ov_SC03_112_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_112_jr_8012ACE0.o,tail2.data.o,ov_SC03_112_jr_80135888.o,tail3.data.o,ov_SC03_112_jr_80135A4C.o,tail4.data.o,ov_SC03_112_jr_80135D20.o,tail5.data.o,ov_SC03_112_jr_801380E0.o,tail6.data.o,ov_SC03_112_jr_8013F350.o,tail7.data.o,ov_SC03_112_jr_8013FFD8.o,tail8.data.o,ov_SC03_112_jr_80140608.o,tail9.data.o,ov_SC03_112_jr_8015444C.o,tail10.data.o,ov_SC03_112_jr_80154C24.o,ov_SC03_112_jr_801588CC.o,tail11.data.o,ov_SC03_112_jr_80159C84.o,tail12.data.o,ov_SC03_112_jr_8015A3C8.o,tail13.data.o,ov_SC03_112_jr_8015AE2C.o,tail14.data.o,ov_SC03_112_jr_8015C32C.o,tail15.data.o,ov_SC03_112_jr_8016AB6C.o,tail16.data.o,ov_SC03_112_jr_801734BC.o,tail17.data.o,ov_SC03_112_jr_80178D40.o,tail18.data.o,ov_SC03_112_jr_8017A4AC.o,tail19.data.o,ov_SC03_112_jr_8017AE2C.o,ov_SC03_112_jr_8017C294.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_112_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_112.o,tail2.data.o,ov_SC03_112_jr_8012ACE0.o,tail3.data.o,ov_SC03_112_jr_80135888.o,tail4.data.o,ov_SC03_112_jr_80135A4C.o,tail5.data.o,ov_SC03_112_jr_80135D20.o,tail6.data.o,ov_SC03_112_jr_801380E0.o,tail7.data.o,ov_SC03_112_jr_8013F350.o,tail8.data.o,ov_SC03_112_jr_8013FFD8.o,tail9.data.o,ov_SC03_112_jr_80140608.o,tail10.data.o,ov_SC03_112_jr_8015444C.o,tail11.data.o,ov_SC03_112_jr_80154C24.o,ov_SC03_112_jr_801588CC.o,tail12.data.o,ov_SC03_112_jr_80159C84.o,tail13.data.o,ov_SC03_112_jr_8015A3C8.o,tail14.data.o,ov_SC03_112_jr_8015AE2C.o,tail15.data.o,ov_SC03_112_jr_8015C32C.o,tail16.data.o,ov_SC03_112_jr_8016AB6C.o,tail17.data.o,ov_SC03_112_jr_801734BC.o,tail18.data.o,ov_SC03_112_jr_80178D40.o,tail19.data.o,ov_SC03_112_jr_8017A4AC.o,tail20.data.o,ov_SC03_112_jr_8017AE2C.o,ov_SC03_112_jr_8017C294.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_112/ov_SC03_112_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_112/ov_SC03_112_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_112/ov_SC03_112_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1965,7 +1965,7 @@ ov_SC03_113_ELF := $(ov_SC03_113_OUT).elf ov_SC03_113_MAPFILE := $(ov_SC03_113_OUT).map ov_SC03_113_LD_SCRIPT := $(ov_SC03_113_OUT).ld ov_SC03_113_SPLAT_YAML := config/splat.ov_SC03_113.yaml -ov_SC03_113_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_113_jr_8012ACE0.o,tail2.data.o,ov_SC03_113_jr_80135888.o,tail3.data.o,ov_SC03_113_jr_80135A4C.o,tail4.data.o,ov_SC03_113_jr_80135D20.o,tail5.data.o,ov_SC03_113_jr_801380E0.o,tail6.data.o,ov_SC03_113_jr_8013F350.o,tail7.data.o,ov_SC03_113_jr_8013FFD8.o,tail8.data.o,ov_SC03_113_jr_80140608.o,tail9.data.o,ov_SC03_113_jr_8015444C.o,tail10.data.o,ov_SC03_113_jr_80154C24.o,ov_SC03_113_jr_801588CC.o,tail11.data.o,ov_SC03_113_jr_80159C84.o,tail12.data.o,ov_SC03_113_jr_8015A3C8.o,tail13.data.o,ov_SC03_113_jr_8015AE2C.o,tail14.data.o,ov_SC03_113_jr_8015C32C.o,tail15.data.o,ov_SC03_113_jr_8016AB6C.o,tail16.data.o,ov_SC03_113_jr_801734BC.o,tail17.data.o,ov_SC03_113_jr_80178D40.o,tail18.data.o,ov_SC03_113_jr_8017A4AC.o,tail19.data.o,ov_SC03_113_jr_8017AE2C.o,ov_SC03_113_jr_8017C294.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_113_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_113.o,tail2.data.o,ov_SC03_113_jr_8012ACE0.o,tail3.data.o,ov_SC03_113_jr_80135888.o,tail4.data.o,ov_SC03_113_jr_80135A4C.o,tail5.data.o,ov_SC03_113_jr_80135D20.o,tail6.data.o,ov_SC03_113_jr_801380E0.o,tail7.data.o,ov_SC03_113_jr_8013F350.o,tail8.data.o,ov_SC03_113_jr_8013FFD8.o,tail9.data.o,ov_SC03_113_jr_80140608.o,tail10.data.o,ov_SC03_113_jr_8015444C.o,tail11.data.o,ov_SC03_113_jr_80154C24.o,ov_SC03_113_jr_801588CC.o,tail12.data.o,ov_SC03_113_jr_80159C84.o,tail13.data.o,ov_SC03_113_jr_8015A3C8.o,tail14.data.o,ov_SC03_113_jr_8015AE2C.o,tail15.data.o,ov_SC03_113_jr_8015C32C.o,tail16.data.o,ov_SC03_113_jr_8016AB6C.o,tail17.data.o,ov_SC03_113_jr_801734BC.o,tail18.data.o,ov_SC03_113_jr_80178D40.o,tail19.data.o,ov_SC03_113_jr_8017A4AC.o,tail20.data.o,ov_SC03_113_jr_8017AE2C.o,ov_SC03_113_jr_8017C294.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_113/ov_SC03_113_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_113/ov_SC03_113_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_113/ov_SC03_113_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -1992,7 +1992,7 @@ ov_SC03_114_ELF := $(ov_SC03_114_OUT).elf ov_SC03_114_MAPFILE := $(ov_SC03_114_OUT).map ov_SC03_114_LD_SCRIPT := $(ov_SC03_114_OUT).ld ov_SC03_114_SPLAT_YAML := config/splat.ov_SC03_114.yaml -ov_SC03_114_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_114_jr_8012ACE0.o,tail2.data.o,ov_SC03_114_jr_80135888.o,tail3.data.o,ov_SC03_114_jr_80135A4C.o,tail4.data.o,ov_SC03_114_jr_80135D20.o,tail5.data.o,ov_SC03_114_jr_801380E0.o,tail6.data.o,ov_SC03_114_jr_8013F350.o,tail7.data.o,ov_SC03_114_jr_8013FFD8.o,tail8.data.o,ov_SC03_114_jr_80140608.o,tail9.data.o,ov_SC03_114_jr_8015444C.o,tail10.data.o,ov_SC03_114_jr_80154C24.o,ov_SC03_114_jr_801588CC.o,tail11.data.o,ov_SC03_114_jr_80159C84.o,tail12.data.o,ov_SC03_114_jr_8015A3C8.o,tail13.data.o,ov_SC03_114_jr_8015AE2C.o,tail14.data.o,ov_SC03_114_jr_8015C32C.o,tail15.data.o,ov_SC03_114_jr_8016AB6C.o,tail16.data.o,ov_SC03_114_jr_801734BC.o,tail17.data.o,ov_SC03_114_jr_80178D40.o,tail18.data.o,ov_SC03_114_jr_8017A4AC.o,tail19.data.o,ov_SC03_114_jr_8017AE2C.o,ov_SC03_114_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_114_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_114.o,tail2.data.o,ov_SC03_114_jr_8012ACE0.o,tail3.data.o,ov_SC03_114_jr_80135888.o,tail4.data.o,ov_SC03_114_jr_80135A4C.o,tail5.data.o,ov_SC03_114_jr_80135D20.o,tail6.data.o,ov_SC03_114_jr_801380E0.o,tail7.data.o,ov_SC03_114_jr_8013F350.o,tail8.data.o,ov_SC03_114_jr_8013FFD8.o,tail9.data.o,ov_SC03_114_jr_80140608.o,tail10.data.o,ov_SC03_114_jr_8015444C.o,tail11.data.o,ov_SC03_114_jr_80154C24.o,ov_SC03_114_jr_801588CC.o,tail12.data.o,ov_SC03_114_jr_80159C84.o,tail13.data.o,ov_SC03_114_jr_8015A3C8.o,tail14.data.o,ov_SC03_114_jr_8015AE2C.o,tail15.data.o,ov_SC03_114_jr_8015C32C.o,tail16.data.o,ov_SC03_114_jr_8016AB6C.o,tail17.data.o,ov_SC03_114_jr_801734BC.o,tail18.data.o,ov_SC03_114_jr_80178D40.o,tail19.data.o,ov_SC03_114_jr_8017A4AC.o,tail20.data.o,ov_SC03_114_jr_8017AE2C.o,ov_SC03_114_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_114/ov_SC03_114_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_114/ov_SC03_114_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_114/ov_SC03_114_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2019,7 +2019,7 @@ ov_SC03_115_ELF := $(ov_SC03_115_OUT).elf ov_SC03_115_MAPFILE := $(ov_SC03_115_OUT).map ov_SC03_115_LD_SCRIPT := $(ov_SC03_115_OUT).ld ov_SC03_115_SPLAT_YAML := config/splat.ov_SC03_115.yaml -ov_SC03_115_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_115_jr_8012ACE0.o,tail2.data.o,ov_SC03_115_jr_80135888.o,tail3.data.o,ov_SC03_115_jr_80135A4C.o,tail4.data.o,ov_SC03_115_jr_80135D20.o,tail5.data.o,ov_SC03_115_jr_801380E0.o,tail6.data.o,ov_SC03_115_jr_8013F350.o,tail7.data.o,ov_SC03_115_jr_8013FFD8.o,tail8.data.o,ov_SC03_115_jr_80140608.o,tail9.data.o,ov_SC03_115_jr_8015444C.o,tail10.data.o,ov_SC03_115_jr_80154C24.o,ov_SC03_115_jr_801588CC.o,tail11.data.o,ov_SC03_115_jr_80159C84.o,tail12.data.o,ov_SC03_115_jr_8015A3C8.o,tail13.data.o,ov_SC03_115_jr_8015AE2C.o,tail14.data.o,ov_SC03_115_jr_8015C32C.o,tail15.data.o,ov_SC03_115_jr_8016AB6C.o,tail16.data.o,ov_SC03_115_jr_801734BC.o,tail17.data.o,ov_SC03_115_jr_80178D40.o,tail18.data.o,ov_SC03_115_jr_8017A4AC.o,tail19.data.o,ov_SC03_115_jr_8017AE2C.o,ov_SC03_115_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_115_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_115.o,tail2.data.o,ov_SC03_115_jr_8012ACE0.o,tail3.data.o,ov_SC03_115_jr_80135888.o,tail4.data.o,ov_SC03_115_jr_80135A4C.o,tail5.data.o,ov_SC03_115_jr_80135D20.o,tail6.data.o,ov_SC03_115_jr_801380E0.o,tail7.data.o,ov_SC03_115_jr_8013F350.o,tail8.data.o,ov_SC03_115_jr_8013FFD8.o,tail9.data.o,ov_SC03_115_jr_80140608.o,tail10.data.o,ov_SC03_115_jr_8015444C.o,tail11.data.o,ov_SC03_115_jr_80154C24.o,ov_SC03_115_jr_801588CC.o,tail12.data.o,ov_SC03_115_jr_80159C84.o,tail13.data.o,ov_SC03_115_jr_8015A3C8.o,tail14.data.o,ov_SC03_115_jr_8015AE2C.o,tail15.data.o,ov_SC03_115_jr_8015C32C.o,tail16.data.o,ov_SC03_115_jr_8016AB6C.o,tail17.data.o,ov_SC03_115_jr_801734BC.o,tail18.data.o,ov_SC03_115_jr_80178D40.o,tail19.data.o,ov_SC03_115_jr_8017A4AC.o,tail20.data.o,ov_SC03_115_jr_8017AE2C.o,ov_SC03_115_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_115/ov_SC03_115_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_115/ov_SC03_115_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_115/ov_SC03_115_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2046,7 +2046,7 @@ ov_SC03_116_ELF := $(ov_SC03_116_OUT).elf ov_SC03_116_MAPFILE := $(ov_SC03_116_OUT).map ov_SC03_116_LD_SCRIPT := $(ov_SC03_116_OUT).ld ov_SC03_116_SPLAT_YAML := config/splat.ov_SC03_116.yaml -ov_SC03_116_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_116_jr_8012ACE0.o,tail2.data.o,ov_SC03_116_jr_80135888.o,tail3.data.o,ov_SC03_116_jr_80135A4C.o,tail4.data.o,ov_SC03_116_jr_80135D20.o,tail5.data.o,ov_SC03_116_jr_801380E0.o,tail6.data.o,ov_SC03_116_jr_8013F350.o,tail7.data.o,ov_SC03_116_jr_8013FFD8.o,tail8.data.o,ov_SC03_116_jr_80140608.o,tail9.data.o,ov_SC03_116_jr_8015444C.o,tail10.data.o,ov_SC03_116_jr_80154C24.o,ov_SC03_116_jr_801588CC.o,tail11.data.o,ov_SC03_116_jr_80159C84.o,tail12.data.o,ov_SC03_116_jr_8015A3C8.o,tail13.data.o,ov_SC03_116_jr_8015AE2C.o,tail14.data.o,ov_SC03_116_jr_8015C32C.o,tail15.data.o,ov_SC03_116_jr_8016AB6C.o,tail16.data.o,ov_SC03_116_jr_801734BC.o,tail17.data.o,ov_SC03_116_jr_80178D40.o,tail18.data.o,ov_SC03_116_jr_8017A4AC.o,tail19.data.o,ov_SC03_116_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_116_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_116.o,tail2.data.o,ov_SC03_116_jr_8012ACE0.o,tail3.data.o,ov_SC03_116_jr_80135888.o,tail4.data.o,ov_SC03_116_jr_80135A4C.o,tail5.data.o,ov_SC03_116_jr_80135D20.o,tail6.data.o,ov_SC03_116_jr_801380E0.o,tail7.data.o,ov_SC03_116_jr_8013F350.o,tail8.data.o,ov_SC03_116_jr_8013FFD8.o,tail9.data.o,ov_SC03_116_jr_80140608.o,tail10.data.o,ov_SC03_116_jr_8015444C.o,tail11.data.o,ov_SC03_116_jr_80154C24.o,ov_SC03_116_jr_801588CC.o,tail12.data.o,ov_SC03_116_jr_80159C84.o,tail13.data.o,ov_SC03_116_jr_8015A3C8.o,tail14.data.o,ov_SC03_116_jr_8015AE2C.o,tail15.data.o,ov_SC03_116_jr_8015C32C.o,tail16.data.o,ov_SC03_116_jr_8016AB6C.o,tail17.data.o,ov_SC03_116_jr_801734BC.o,tail18.data.o,ov_SC03_116_jr_80178D40.o,tail19.data.o,ov_SC03_116_jr_8017A4AC.o,tail20.data.o,ov_SC03_116_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_116/ov_SC03_116_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_116/ov_SC03_116_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_116/ov_SC03_116_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2073,7 +2073,7 @@ ov_SC03_117_ELF := $(ov_SC03_117_OUT).elf ov_SC03_117_MAPFILE := $(ov_SC03_117_OUT).map ov_SC03_117_LD_SCRIPT := $(ov_SC03_117_OUT).ld ov_SC03_117_SPLAT_YAML := config/splat.ov_SC03_117.yaml -ov_SC03_117_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_117_jr_8012ACE0.o,tail2.data.o,ov_SC03_117_jr_80135888.o,tail3.data.o,ov_SC03_117_jr_80135A4C.o,tail4.data.o,ov_SC03_117_jr_80135D20.o,tail5.data.o,ov_SC03_117_jr_801380E0.o,tail6.data.o,ov_SC03_117_jr_8013F350.o,tail7.data.o,ov_SC03_117_jr_8013FFD8.o,tail8.data.o,ov_SC03_117_jr_80140608.o,tail9.data.o,ov_SC03_117_jr_8015444C.o,tail10.data.o,ov_SC03_117_jr_80154C24.o,ov_SC03_117_jr_801588CC.o,tail11.data.o,ov_SC03_117_jr_80159C84.o,tail12.data.o,ov_SC03_117_jr_8015A3C8.o,tail13.data.o,ov_SC03_117_jr_8015AE2C.o,tail14.data.o,ov_SC03_117_jr_8015C32C.o,tail15.data.o,ov_SC03_117_jr_8016AB6C.o,tail16.data.o,ov_SC03_117_jr_801734BC.o,tail17.data.o,ov_SC03_117_jr_80178D40.o,tail18.data.o,ov_SC03_117_jr_8017A4AC.o,tail19.data.o,ov_SC03_117_jr_8017AE2C.o,ov_SC03_117_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_117_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_117.o,tail2.data.o,ov_SC03_117_jr_8012ACE0.o,tail3.data.o,ov_SC03_117_jr_80135888.o,tail4.data.o,ov_SC03_117_jr_80135A4C.o,tail5.data.o,ov_SC03_117_jr_80135D20.o,tail6.data.o,ov_SC03_117_jr_801380E0.o,tail7.data.o,ov_SC03_117_jr_8013F350.o,tail8.data.o,ov_SC03_117_jr_8013FFD8.o,tail9.data.o,ov_SC03_117_jr_80140608.o,tail10.data.o,ov_SC03_117_jr_8015444C.o,tail11.data.o,ov_SC03_117_jr_80154C24.o,ov_SC03_117_jr_801588CC.o,tail12.data.o,ov_SC03_117_jr_80159C84.o,tail13.data.o,ov_SC03_117_jr_8015A3C8.o,tail14.data.o,ov_SC03_117_jr_8015AE2C.o,tail15.data.o,ov_SC03_117_jr_8015C32C.o,tail16.data.o,ov_SC03_117_jr_8016AB6C.o,tail17.data.o,ov_SC03_117_jr_801734BC.o,tail18.data.o,ov_SC03_117_jr_80178D40.o,tail19.data.o,ov_SC03_117_jr_8017A4AC.o,tail20.data.o,ov_SC03_117_jr_8017AE2C.o,ov_SC03_117_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_117/ov_SC03_117_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_117/ov_SC03_117_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_117/ov_SC03_117_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2100,7 +2100,7 @@ ov_SC03_118_ELF := $(ov_SC03_118_OUT).elf ov_SC03_118_MAPFILE := $(ov_SC03_118_OUT).map ov_SC03_118_LD_SCRIPT := $(ov_SC03_118_OUT).ld ov_SC03_118_SPLAT_YAML := config/splat.ov_SC03_118.yaml -ov_SC03_118_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_118_jr_8012ACE0.o,tail2.data.o,ov_SC03_118_jr_80135888.o,tail3.data.o,ov_SC03_118_jr_80135A4C.o,tail4.data.o,ov_SC03_118_jr_80135D20.o,tail5.data.o,ov_SC03_118_jr_801380E0.o,tail6.data.o,ov_SC03_118_jr_8013F350.o,tail7.data.o,ov_SC03_118_jr_8013FFD8.o,tail8.data.o,ov_SC03_118_jr_80140608.o,tail9.data.o,ov_SC03_118_jr_8015444C.o,tail10.data.o,ov_SC03_118_jr_80154C24.o,ov_SC03_118_jr_801588CC.o,tail11.data.o,ov_SC03_118_jr_80159C84.o,tail12.data.o,ov_SC03_118_jr_8015A3C8.o,tail13.data.o,ov_SC03_118_jr_8015AE2C.o,tail14.data.o,ov_SC03_118_jr_8015C32C.o,tail15.data.o,ov_SC03_118_jr_8016AB6C.o,tail16.data.o,ov_SC03_118_jr_801734BC.o,tail17.data.o,ov_SC03_118_jr_80178D40.o,tail18.data.o,ov_SC03_118_jr_8017A4AC.o,tail19.data.o,ov_SC03_118_jr_8017AE2C.o,tail20.data.o,ov_SC03_118_jr_8017FB84.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_118_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_118.o,tail2.data.o,ov_SC03_118_jr_8012ACE0.o,tail3.data.o,ov_SC03_118_jr_80135888.o,tail4.data.o,ov_SC03_118_jr_80135A4C.o,tail5.data.o,ov_SC03_118_jr_80135D20.o,tail6.data.o,ov_SC03_118_jr_801380E0.o,tail7.data.o,ov_SC03_118_jr_8013F350.o,tail8.data.o,ov_SC03_118_jr_8013FFD8.o,tail9.data.o,ov_SC03_118_jr_80140608.o,tail10.data.o,ov_SC03_118_jr_8015444C.o,tail11.data.o,ov_SC03_118_jr_80154C24.o,ov_SC03_118_jr_801588CC.o,tail12.data.o,ov_SC03_118_jr_80159C84.o,tail13.data.o,ov_SC03_118_jr_8015A3C8.o,tail14.data.o,ov_SC03_118_jr_8015AE2C.o,tail15.data.o,ov_SC03_118_jr_8015C32C.o,tail16.data.o,ov_SC03_118_jr_8016AB6C.o,tail17.data.o,ov_SC03_118_jr_801734BC.o,tail18.data.o,ov_SC03_118_jr_80178D40.o,tail19.data.o,ov_SC03_118_jr_8017A4AC.o,tail20.data.o,ov_SC03_118_jr_8017AE2C.o,tail21.data.o,ov_SC03_118_jr_8017FB84.o,tail22.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_118/ov_SC03_118_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_118/ov_SC03_118_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_118/ov_SC03_118_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2127,7 +2127,7 @@ ov_SC03_119_ELF := $(ov_SC03_119_OUT).elf ov_SC03_119_MAPFILE := $(ov_SC03_119_OUT).map ov_SC03_119_LD_SCRIPT := $(ov_SC03_119_OUT).ld ov_SC03_119_SPLAT_YAML := config/splat.ov_SC03_119.yaml -ov_SC03_119_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_119_jr_8012ACE0.o,tail2.data.o,ov_SC03_119_jr_80135888.o,tail3.data.o,ov_SC03_119_jr_80135A4C.o,tail4.data.o,ov_SC03_119_jr_80135D20.o,tail5.data.o,ov_SC03_119_jr_801380E0.o,tail6.data.o,ov_SC03_119_jr_8013F350.o,tail7.data.o,ov_SC03_119_jr_8013FFD8.o,tail8.data.o,ov_SC03_119_jr_80140608.o,tail9.data.o,ov_SC03_119_jr_8015444C.o,tail10.data.o,ov_SC03_119_jr_80154C24.o,ov_SC03_119_jr_801588CC.o,tail11.data.o,ov_SC03_119_jr_80159C84.o,tail12.data.o,ov_SC03_119_jr_8015A3C8.o,tail13.data.o,ov_SC03_119_jr_8015AE2C.o,tail14.data.o,ov_SC03_119_jr_8015C32C.o,tail15.data.o,ov_SC03_119_jr_8016AB6C.o,tail16.data.o,ov_SC03_119_jr_801734BC.o,tail17.data.o,ov_SC03_119_jr_80178D40.o,tail18.data.o,ov_SC03_119_jr_8017A4AC.o,tail19.data.o,ov_SC03_119_jr_8017AE2C.o,tail20.data.o,ov_SC03_119_jr_8017FB84.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_119_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_119.o,tail2.data.o,ov_SC03_119_jr_8012ACE0.o,tail3.data.o,ov_SC03_119_jr_80135888.o,tail4.data.o,ov_SC03_119_jr_80135A4C.o,tail5.data.o,ov_SC03_119_jr_80135D20.o,tail6.data.o,ov_SC03_119_jr_801380E0.o,tail7.data.o,ov_SC03_119_jr_8013F350.o,tail8.data.o,ov_SC03_119_jr_8013FFD8.o,tail9.data.o,ov_SC03_119_jr_80140608.o,tail10.data.o,ov_SC03_119_jr_8015444C.o,tail11.data.o,ov_SC03_119_jr_80154C24.o,ov_SC03_119_jr_801588CC.o,tail12.data.o,ov_SC03_119_jr_80159C84.o,tail13.data.o,ov_SC03_119_jr_8015A3C8.o,tail14.data.o,ov_SC03_119_jr_8015AE2C.o,tail15.data.o,ov_SC03_119_jr_8015C32C.o,tail16.data.o,ov_SC03_119_jr_8016AB6C.o,tail17.data.o,ov_SC03_119_jr_801734BC.o,tail18.data.o,ov_SC03_119_jr_80178D40.o,tail19.data.o,ov_SC03_119_jr_8017A4AC.o,tail20.data.o,ov_SC03_119_jr_8017AE2C.o,tail21.data.o,ov_SC03_119_jr_8017FB84.o,tail22.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_119/ov_SC03_119_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_119/ov_SC03_119_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_119/ov_SC03_119_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2154,7 +2154,7 @@ ov_SC03_121_ELF := $(ov_SC03_121_OUT).elf ov_SC03_121_MAPFILE := $(ov_SC03_121_OUT).map ov_SC03_121_LD_SCRIPT := $(ov_SC03_121_OUT).ld ov_SC03_121_SPLAT_YAML := config/splat.ov_SC03_121.yaml -ov_SC03_121_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_121_jr_8012ACE0.o,tail2.data.o,ov_SC03_121_jr_80135888.o,tail3.data.o,ov_SC03_121_jr_80135A4C.o,tail4.data.o,ov_SC03_121_jr_80135D20.o,tail5.data.o,ov_SC03_121_jr_801380E0.o,tail6.data.o,ov_SC03_121_jr_8013F350.o,tail7.data.o,ov_SC03_121_jr_8013FFD8.o,tail8.data.o,ov_SC03_121_jr_80140608.o,tail9.data.o,ov_SC03_121_jr_8015444C.o,tail10.data.o,ov_SC03_121_jr_80154C24.o,ov_SC03_121_jr_801588CC.o,tail11.data.o,ov_SC03_121_jr_80159C84.o,tail12.data.o,ov_SC03_121_jr_8015A3C8.o,tail13.data.o,ov_SC03_121_jr_8015AE2C.o,tail14.data.o,ov_SC03_121_jr_8015C32C.o,tail15.data.o,ov_SC03_121_jr_8016AB6C.o,tail16.data.o,ov_SC03_121_jr_801734BC.o,tail17.data.o,ov_SC03_121_jr_80178D40.o,tail18.data.o,ov_SC03_121_jr_8017A4AC.o,tail19.data.o,ov_SC03_121_jr_8017AE2C.o,ov_SC03_121_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_121_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_121.o,tail2.data.o,ov_SC03_121_jr_8012ACE0.o,tail3.data.o,ov_SC03_121_jr_80135888.o,tail4.data.o,ov_SC03_121_jr_80135A4C.o,tail5.data.o,ov_SC03_121_jr_80135D20.o,tail6.data.o,ov_SC03_121_jr_801380E0.o,tail7.data.o,ov_SC03_121_jr_8013F350.o,tail8.data.o,ov_SC03_121_jr_8013FFD8.o,tail9.data.o,ov_SC03_121_jr_80140608.o,tail10.data.o,ov_SC03_121_jr_8015444C.o,tail11.data.o,ov_SC03_121_jr_80154C24.o,ov_SC03_121_jr_801588CC.o,tail12.data.o,ov_SC03_121_jr_80159C84.o,tail13.data.o,ov_SC03_121_jr_8015A3C8.o,tail14.data.o,ov_SC03_121_jr_8015AE2C.o,tail15.data.o,ov_SC03_121_jr_8015C32C.o,tail16.data.o,ov_SC03_121_jr_8016AB6C.o,tail17.data.o,ov_SC03_121_jr_801734BC.o,tail18.data.o,ov_SC03_121_jr_80178D40.o,tail19.data.o,ov_SC03_121_jr_8017A4AC.o,tail20.data.o,ov_SC03_121_jr_8017AE2C.o,ov_SC03_121_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_121/ov_SC03_121_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_121/ov_SC03_121_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_121/ov_SC03_121_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2181,7 +2181,7 @@ ov_SC03_124_ELF := $(ov_SC03_124_OUT).elf ov_SC03_124_MAPFILE := $(ov_SC03_124_OUT).map ov_SC03_124_LD_SCRIPT := $(ov_SC03_124_OUT).ld ov_SC03_124_SPLAT_YAML := config/splat.ov_SC03_124.yaml -ov_SC03_124_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_124_jr_8012ACE0.o,tail2.data.o,ov_SC03_124_jr_80135888.o,tail3.data.o,ov_SC03_124_jr_80135A4C.o,tail4.data.o,ov_SC03_124_jr_80135D20.o,tail5.data.o,ov_SC03_124_jr_801380E0.o,tail6.data.o,ov_SC03_124_jr_8013F350.o,tail7.data.o,ov_SC03_124_jr_8013FFD8.o,tail8.data.o,ov_SC03_124_jr_80140608.o,tail9.data.o,ov_SC03_124_jr_8015444C.o,tail10.data.o,ov_SC03_124_jr_80154C24.o,ov_SC03_124_jr_801588CC.o,tail11.data.o,ov_SC03_124_jr_80159C84.o,tail12.data.o,ov_SC03_124_jr_8015A3C8.o,tail13.data.o,ov_SC03_124_jr_8015AE2C.o,tail14.data.o,ov_SC03_124_jr_8015C32C.o,tail15.data.o,ov_SC03_124_jr_8016AB6C.o,tail16.data.o,ov_SC03_124_jr_801734BC.o,tail17.data.o,ov_SC03_124_jr_80178D40.o,tail18.data.o,ov_SC03_124_jr_8017A4AC.o,tail19.data.o,ov_SC03_124_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_124_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_124.o,tail2.data.o,ov_SC03_124_jr_8012ACE0.o,tail3.data.o,ov_SC03_124_jr_80135888.o,tail4.data.o,ov_SC03_124_jr_80135A4C.o,tail5.data.o,ov_SC03_124_jr_80135D20.o,tail6.data.o,ov_SC03_124_jr_801380E0.o,tail7.data.o,ov_SC03_124_jr_8013F350.o,tail8.data.o,ov_SC03_124_jr_8013FFD8.o,tail9.data.o,ov_SC03_124_jr_80140608.o,tail10.data.o,ov_SC03_124_jr_8015444C.o,tail11.data.o,ov_SC03_124_jr_80154C24.o,ov_SC03_124_jr_801588CC.o,tail12.data.o,ov_SC03_124_jr_80159C84.o,tail13.data.o,ov_SC03_124_jr_8015A3C8.o,tail14.data.o,ov_SC03_124_jr_8015AE2C.o,tail15.data.o,ov_SC03_124_jr_8015C32C.o,tail16.data.o,ov_SC03_124_jr_8016AB6C.o,tail17.data.o,ov_SC03_124_jr_801734BC.o,tail18.data.o,ov_SC03_124_jr_80178D40.o,tail19.data.o,ov_SC03_124_jr_8017A4AC.o,tail20.data.o,ov_SC03_124_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_124/ov_SC03_124_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_124/ov_SC03_124_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_124/ov_SC03_124_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2208,7 +2208,7 @@ ov_SC03_125_ELF := $(ov_SC03_125_OUT).elf ov_SC03_125_MAPFILE := $(ov_SC03_125_OUT).map ov_SC03_125_LD_SCRIPT := $(ov_SC03_125_OUT).ld ov_SC03_125_SPLAT_YAML := config/splat.ov_SC03_125.yaml -ov_SC03_125_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_125_jr_8012ACE0.o,tail2.data.o,ov_SC03_125_jr_80135888.o,tail3.data.o,ov_SC03_125_jr_80135A4C.o,tail4.data.o,ov_SC03_125_jr_80135D20.o,tail5.data.o,ov_SC03_125_jr_801380E0.o,tail6.data.o,ov_SC03_125_jr_8013F350.o,tail7.data.o,ov_SC03_125_jr_8013FFD8.o,tail8.data.o,ov_SC03_125_jr_80140608.o,tail9.data.o,ov_SC03_125_jr_8015444C.o,tail10.data.o,ov_SC03_125_jr_80154C24.o,ov_SC03_125_jr_801588CC.o,tail11.data.o,ov_SC03_125_jr_80159C84.o,tail12.data.o,ov_SC03_125_jr_8015A3C8.o,tail13.data.o,ov_SC03_125_jr_8015AE2C.o,tail14.data.o,ov_SC03_125_jr_8015C32C.o,tail15.data.o,ov_SC03_125_jr_8016AB6C.o,tail16.data.o,ov_SC03_125_jr_801734BC.o,tail17.data.o,ov_SC03_125_jr_80178D40.o,tail18.data.o,ov_SC03_125_jr_8017A4AC.o,tail19.data.o,ov_SC03_125_jr_8017AE2C.o,ov_SC03_125_jr_8017D604.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_125_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_125.o,tail2.data.o,ov_SC03_125_jr_8012ACE0.o,tail3.data.o,ov_SC03_125_jr_80135888.o,tail4.data.o,ov_SC03_125_jr_80135A4C.o,tail5.data.o,ov_SC03_125_jr_80135D20.o,tail6.data.o,ov_SC03_125_jr_801380E0.o,tail7.data.o,ov_SC03_125_jr_8013F350.o,tail8.data.o,ov_SC03_125_jr_8013FFD8.o,tail9.data.o,ov_SC03_125_jr_80140608.o,tail10.data.o,ov_SC03_125_jr_8015444C.o,tail11.data.o,ov_SC03_125_jr_80154C24.o,ov_SC03_125_jr_801588CC.o,tail12.data.o,ov_SC03_125_jr_80159C84.o,tail13.data.o,ov_SC03_125_jr_8015A3C8.o,tail14.data.o,ov_SC03_125_jr_8015AE2C.o,tail15.data.o,ov_SC03_125_jr_8015C32C.o,tail16.data.o,ov_SC03_125_jr_8016AB6C.o,tail17.data.o,ov_SC03_125_jr_801734BC.o,tail18.data.o,ov_SC03_125_jr_80178D40.o,tail19.data.o,ov_SC03_125_jr_8017A4AC.o,tail20.data.o,ov_SC03_125_jr_8017AE2C.o,ov_SC03_125_jr_8017D604.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_125/ov_SC03_125_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_125/ov_SC03_125_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_125/ov_SC03_125_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2235,7 +2235,7 @@ ov_SC03_126_ELF := $(ov_SC03_126_OUT).elf ov_SC03_126_MAPFILE := $(ov_SC03_126_OUT).map ov_SC03_126_LD_SCRIPT := $(ov_SC03_126_OUT).ld ov_SC03_126_SPLAT_YAML := config/splat.ov_SC03_126.yaml -ov_SC03_126_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_126_jr_8012ACE0.o,tail2.data.o,ov_SC03_126_jr_80135888.o,tail3.data.o,ov_SC03_126_jr_80135A4C.o,tail4.data.o,ov_SC03_126_jr_80135D20.o,tail5.data.o,ov_SC03_126_jr_801380E0.o,tail6.data.o,ov_SC03_126_jr_8013F350.o,tail7.data.o,ov_SC03_126_jr_8013FFD8.o,tail8.data.o,ov_SC03_126_jr_80140608.o,tail9.data.o,ov_SC03_126_jr_8015444C.o,tail10.data.o,ov_SC03_126_jr_80154C24.o,ov_SC03_126_jr_801588CC.o,tail11.data.o,ov_SC03_126_jr_80159C84.o,tail12.data.o,ov_SC03_126_jr_8015A3C8.o,tail13.data.o,ov_SC03_126_jr_8015AE2C.o,tail14.data.o,ov_SC03_126_jr_8015C32C.o,tail15.data.o,ov_SC03_126_jr_8016AB6C.o,tail16.data.o,ov_SC03_126_jr_801734BC.o,tail17.data.o,ov_SC03_126_jr_80178D40.o,tail18.data.o,ov_SC03_126_jr_8017A4AC.o,tail19.data.o,ov_SC03_126_jr_8017AE2C.o,tail20.data.o,ov_SC03_126_jr_8017D5C0.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_126_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_126.o,tail2.data.o,ov_SC03_126_jr_8012ACE0.o,tail3.data.o,ov_SC03_126_jr_80135888.o,tail4.data.o,ov_SC03_126_jr_80135A4C.o,tail5.data.o,ov_SC03_126_jr_80135D20.o,tail6.data.o,ov_SC03_126_jr_801380E0.o,tail7.data.o,ov_SC03_126_jr_8013F350.o,tail8.data.o,ov_SC03_126_jr_8013FFD8.o,tail9.data.o,ov_SC03_126_jr_80140608.o,tail10.data.o,ov_SC03_126_jr_8015444C.o,tail11.data.o,ov_SC03_126_jr_80154C24.o,ov_SC03_126_jr_801588CC.o,tail12.data.o,ov_SC03_126_jr_80159C84.o,tail13.data.o,ov_SC03_126_jr_8015A3C8.o,tail14.data.o,ov_SC03_126_jr_8015AE2C.o,tail15.data.o,ov_SC03_126_jr_8015C32C.o,tail16.data.o,ov_SC03_126_jr_8016AB6C.o,tail17.data.o,ov_SC03_126_jr_801734BC.o,tail18.data.o,ov_SC03_126_jr_80178D40.o,tail19.data.o,ov_SC03_126_jr_8017A4AC.o,tail20.data.o,ov_SC03_126_jr_8017AE2C.o,tail21.data.o,ov_SC03_126_jr_8017D5C0.o,tail22.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_126/ov_SC03_126_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC03_126/ov_SC03_126_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_126/ov_SC03_126_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2262,7 +2262,7 @@ ov_SC04_002_ELF := $(ov_SC04_002_OUT).elf ov_SC04_002_MAPFILE := $(ov_SC04_002_OUT).map ov_SC04_002_LD_SCRIPT := $(ov_SC04_002_OUT).ld ov_SC04_002_SPLAT_YAML := config/splat.ov_SC04_002.yaml -ov_SC04_002_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_002_jr_8012ACE0.o,tail2.data.o,ov_SC04_002_jr_80135888.o,tail3.data.o,ov_SC04_002_jr_80135A4C.o,tail4.data.o,ov_SC04_002_jr_80135D20.o,tail5.data.o,ov_SC04_002_jr_801380E0.o,tail6.data.o,ov_SC04_002_jr_8013F350.o,tail7.data.o,ov_SC04_002_jr_8013FFD8.o,tail8.data.o,ov_SC04_002_jr_80140608.o,tail9.data.o,ov_SC04_002_jr_8015444C.o,tail10.data.o,ov_SC04_002_jr_80154C24.o,ov_SC04_002_jr_801588CC.o,tail11.data.o,ov_SC04_002_jr_80159C84.o,tail12.data.o,ov_SC04_002_jr_8015A3C8.o,tail13.data.o,ov_SC04_002_jr_8015AE2C.o,tail14.data.o,ov_SC04_002_jr_8015C32C.o,tail15.data.o,ov_SC04_002_jr_8016AB6C.o,tail16.data.o,ov_SC04_002_jr_801734BC.o,tail17.data.o,ov_SC04_002_jr_80178D40.o,tail18.data.o,ov_SC04_002_jr_8017A4AC.o,tail19.data.o,ov_SC04_002_jr_8017AE2C.o,ov_SC04_002_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC04_002_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_002.o,tail2.data.o,ov_SC04_002_jr_8012ACE0.o,tail3.data.o,ov_SC04_002_jr_80135888.o,tail4.data.o,ov_SC04_002_jr_80135A4C.o,tail5.data.o,ov_SC04_002_jr_80135D20.o,tail6.data.o,ov_SC04_002_jr_801380E0.o,tail7.data.o,ov_SC04_002_jr_8013F350.o,tail8.data.o,ov_SC04_002_jr_8013FFD8.o,tail9.data.o,ov_SC04_002_jr_80140608.o,tail10.data.o,ov_SC04_002_jr_8015444C.o,tail11.data.o,ov_SC04_002_jr_80154C24.o,ov_SC04_002_jr_801588CC.o,tail12.data.o,ov_SC04_002_jr_80159C84.o,tail13.data.o,ov_SC04_002_jr_8015A3C8.o,tail14.data.o,ov_SC04_002_jr_8015AE2C.o,tail15.data.o,ov_SC04_002_jr_8015C32C.o,tail16.data.o,ov_SC04_002_jr_8016AB6C.o,tail17.data.o,ov_SC04_002_jr_801734BC.o,tail18.data.o,ov_SC04_002_jr_80178D40.o,tail19.data.o,ov_SC04_002_jr_8017A4AC.o,tail20.data.o,ov_SC04_002_jr_8017AE2C.o,ov_SC04_002_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC04_002/ov_SC04_002_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC04_002/ov_SC04_002_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC04_002/ov_SC04_002_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2289,7 +2289,7 @@ ov_SC04_003_ELF := $(ov_SC04_003_OUT).elf ov_SC04_003_MAPFILE := $(ov_SC04_003_OUT).map ov_SC04_003_LD_SCRIPT := $(ov_SC04_003_OUT).ld ov_SC04_003_SPLAT_YAML := config/splat.ov_SC04_003.yaml -ov_SC04_003_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_003_jr_8012ACE0.o,tail2.data.o,ov_SC04_003_jr_80135888.o,tail3.data.o,ov_SC04_003_jr_80135A4C.o,tail4.data.o,ov_SC04_003_jr_80135D20.o,tail5.data.o,ov_SC04_003_jr_801380E0.o,tail6.data.o,ov_SC04_003_jr_8013F350.o,tail7.data.o,ov_SC04_003_jr_8013FFD8.o,tail8.data.o,ov_SC04_003_jr_80140608.o,tail9.data.o,ov_SC04_003_jr_8015444C.o,tail10.data.o,ov_SC04_003_jr_80154C24.o,ov_SC04_003_jr_801588CC.o,tail11.data.o,ov_SC04_003_jr_80159C84.o,tail12.data.o,ov_SC04_003_jr_8015A3C8.o,tail13.data.o,ov_SC04_003_jr_8015AE2C.o,tail14.data.o,ov_SC04_003_jr_8015C32C.o,tail15.data.o,ov_SC04_003_jr_8016AB6C.o,tail16.data.o,ov_SC04_003_jr_801734BC.o,tail17.data.o,ov_SC04_003_jr_80178D40.o,tail18.data.o,ov_SC04_003_jr_8017A4AC.o,tail19.data.o,ov_SC04_003_jr_8017AE2C.o,ov_SC04_003_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC04_003_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_003.o,tail2.data.o,ov_SC04_003_jr_8012ACE0.o,tail3.data.o,ov_SC04_003_jr_80135888.o,tail4.data.o,ov_SC04_003_jr_80135A4C.o,tail5.data.o,ov_SC04_003_jr_80135D20.o,tail6.data.o,ov_SC04_003_jr_801380E0.o,tail7.data.o,ov_SC04_003_jr_8013F350.o,tail8.data.o,ov_SC04_003_jr_8013FFD8.o,tail9.data.o,ov_SC04_003_jr_80140608.o,tail10.data.o,ov_SC04_003_jr_8015444C.o,tail11.data.o,ov_SC04_003_jr_80154C24.o,ov_SC04_003_jr_801588CC.o,tail12.data.o,ov_SC04_003_jr_80159C84.o,tail13.data.o,ov_SC04_003_jr_8015A3C8.o,tail14.data.o,ov_SC04_003_jr_8015AE2C.o,tail15.data.o,ov_SC04_003_jr_8015C32C.o,tail16.data.o,ov_SC04_003_jr_8016AB6C.o,tail17.data.o,ov_SC04_003_jr_801734BC.o,tail18.data.o,ov_SC04_003_jr_80178D40.o,tail19.data.o,ov_SC04_003_jr_8017A4AC.o,tail20.data.o,ov_SC04_003_jr_8017AE2C.o,ov_SC04_003_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC04_003/ov_SC04_003_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC04_003/ov_SC04_003_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC04_003/ov_SC04_003_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2316,7 +2316,7 @@ ov_SC04_004_ELF := $(ov_SC04_004_OUT).elf ov_SC04_004_MAPFILE := $(ov_SC04_004_OUT).map ov_SC04_004_LD_SCRIPT := $(ov_SC04_004_OUT).ld ov_SC04_004_SPLAT_YAML := config/splat.ov_SC04_004.yaml -ov_SC04_004_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_004_jr_8012ACE0.o,tail2.data.o,ov_SC04_004_jr_80135888.o,tail3.data.o,ov_SC04_004_jr_80135A4C.o,tail4.data.o,ov_SC04_004_jr_80135D20.o,tail5.data.o,ov_SC04_004_jr_801380E0.o,tail6.data.o,ov_SC04_004_jr_8013F350.o,tail7.data.o,ov_SC04_004_jr_8013FFD8.o,tail8.data.o,ov_SC04_004_jr_80140608.o,tail9.data.o,ov_SC04_004_jr_8015444C.o,tail10.data.o,ov_SC04_004_jr_80154C24.o,ov_SC04_004_jr_801588CC.o,tail11.data.o,ov_SC04_004_jr_80159C84.o,tail12.data.o,ov_SC04_004_jr_8015A3C8.o,tail13.data.o,ov_SC04_004_jr_8015AE2C.o,tail14.data.o,ov_SC04_004_jr_8015C32C.o,tail15.data.o,ov_SC04_004_jr_8016AB6C.o,tail16.data.o,ov_SC04_004_jr_801734BC.o,tail17.data.o,ov_SC04_004_jr_80178D40.o,tail18.data.o,ov_SC04_004_jr_8017A4AC.o,tail19.data.o,ov_SC04_004_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC04_004_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_004.o,tail2.data.o,ov_SC04_004_jr_8012ACE0.o,tail3.data.o,ov_SC04_004_jr_80135888.o,tail4.data.o,ov_SC04_004_jr_80135A4C.o,tail5.data.o,ov_SC04_004_jr_80135D20.o,tail6.data.o,ov_SC04_004_jr_801380E0.o,tail7.data.o,ov_SC04_004_jr_8013F350.o,tail8.data.o,ov_SC04_004_jr_8013FFD8.o,tail9.data.o,ov_SC04_004_jr_80140608.o,tail10.data.o,ov_SC04_004_jr_8015444C.o,tail11.data.o,ov_SC04_004_jr_80154C24.o,ov_SC04_004_jr_801588CC.o,tail12.data.o,ov_SC04_004_jr_80159C84.o,tail13.data.o,ov_SC04_004_jr_8015A3C8.o,tail14.data.o,ov_SC04_004_jr_8015AE2C.o,tail15.data.o,ov_SC04_004_jr_8015C32C.o,tail16.data.o,ov_SC04_004_jr_8016AB6C.o,tail17.data.o,ov_SC04_004_jr_801734BC.o,tail18.data.o,ov_SC04_004_jr_80178D40.o,tail19.data.o,ov_SC04_004_jr_8017A4AC.o,tail20.data.o,ov_SC04_004_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC04_004/ov_SC04_004_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC04_004/ov_SC04_004_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC04_004/ov_SC04_004_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2343,7 +2343,7 @@ ov_SC04_005_ELF := $(ov_SC04_005_OUT).elf ov_SC04_005_MAPFILE := $(ov_SC04_005_OUT).map ov_SC04_005_LD_SCRIPT := $(ov_SC04_005_OUT).ld ov_SC04_005_SPLAT_YAML := config/splat.ov_SC04_005.yaml -ov_SC04_005_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_005_jr_8012ACE0.o,tail2.data.o,ov_SC04_005_jr_80135888.o,tail3.data.o,ov_SC04_005_jr_80135A4C.o,tail4.data.o,ov_SC04_005_jr_80135D20.o,tail5.data.o,ov_SC04_005_jr_801380E0.o,tail6.data.o,ov_SC04_005_jr_8013F350.o,tail7.data.o,ov_SC04_005_jr_8013FFD8.o,tail8.data.o,ov_SC04_005_jr_80140608.o,tail9.data.o,ov_SC04_005_jr_8015444C.o,tail10.data.o,ov_SC04_005_jr_80154C24.o,ov_SC04_005_jr_801588CC.o,tail11.data.o,ov_SC04_005_jr_80159C84.o,tail12.data.o,ov_SC04_005_jr_8015A3C8.o,tail13.data.o,ov_SC04_005_jr_8015AE2C.o,tail14.data.o,ov_SC04_005_jr_8015C32C.o,tail15.data.o,ov_SC04_005_jr_8016AB6C.o,tail16.data.o,ov_SC04_005_jr_801734BC.o,tail17.data.o,ov_SC04_005_jr_80178D40.o,tail18.data.o,ov_SC04_005_jr_8017A4AC.o,tail19.data.o,ov_SC04_005_jr_8017AE2C.o,ov_SC04_005_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC04_005_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_005.o,tail2.data.o,ov_SC04_005_jr_8012ACE0.o,tail3.data.o,ov_SC04_005_jr_80135888.o,tail4.data.o,ov_SC04_005_jr_80135A4C.o,tail5.data.o,ov_SC04_005_jr_80135D20.o,tail6.data.o,ov_SC04_005_jr_801380E0.o,tail7.data.o,ov_SC04_005_jr_8013F350.o,tail8.data.o,ov_SC04_005_jr_8013FFD8.o,tail9.data.o,ov_SC04_005_jr_80140608.o,tail10.data.o,ov_SC04_005_jr_8015444C.o,tail11.data.o,ov_SC04_005_jr_80154C24.o,ov_SC04_005_jr_801588CC.o,tail12.data.o,ov_SC04_005_jr_80159C84.o,tail13.data.o,ov_SC04_005_jr_8015A3C8.o,tail14.data.o,ov_SC04_005_jr_8015AE2C.o,tail15.data.o,ov_SC04_005_jr_8015C32C.o,tail16.data.o,ov_SC04_005_jr_8016AB6C.o,tail17.data.o,ov_SC04_005_jr_801734BC.o,tail18.data.o,ov_SC04_005_jr_80178D40.o,tail19.data.o,ov_SC04_005_jr_8017A4AC.o,tail20.data.o,ov_SC04_005_jr_8017AE2C.o,ov_SC04_005_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC04_005/ov_SC04_005_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC04_005/ov_SC04_005_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC04_005/ov_SC04_005_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2370,7 +2370,7 @@ ov_SC04_006_ELF := $(ov_SC04_006_OUT).elf ov_SC04_006_MAPFILE := $(ov_SC04_006_OUT).map ov_SC04_006_LD_SCRIPT := $(ov_SC04_006_OUT).ld ov_SC04_006_SPLAT_YAML := config/splat.ov_SC04_006.yaml -ov_SC04_006_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_006_jr_8012ACE0.o,tail2.data.o,ov_SC04_006_jr_80135888.o,tail3.data.o,ov_SC04_006_jr_80135A4C.o,tail4.data.o,ov_SC04_006_jr_80135D20.o,tail5.data.o,ov_SC04_006_jr_801380E0.o,tail6.data.o,ov_SC04_006_jr_8013F350.o,tail7.data.o,ov_SC04_006_jr_8013FFD8.o,tail8.data.o,ov_SC04_006_jr_80140608.o,tail9.data.o,ov_SC04_006_jr_8015444C.o,tail10.data.o,ov_SC04_006_jr_80154C24.o,ov_SC04_006_jr_801588CC.o,tail11.data.o,ov_SC04_006_jr_80159C84.o,tail12.data.o,ov_SC04_006_jr_8015A3C8.o,tail13.data.o,ov_SC04_006_jr_8015AE2C.o,tail14.data.o,ov_SC04_006_jr_8015C32C.o,tail15.data.o,ov_SC04_006_jr_8016AB6C.o,tail16.data.o,ov_SC04_006_jr_801734BC.o,tail17.data.o,ov_SC04_006_jr_80178D40.o,tail18.data.o,ov_SC04_006_jr_8017A4AC.o,tail19.data.o,ov_SC04_006_jr_8017AE2C.o,ov_SC04_006_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC04_006_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_006.o,tail2.data.o,ov_SC04_006_jr_8012ACE0.o,tail3.data.o,ov_SC04_006_jr_80135888.o,tail4.data.o,ov_SC04_006_jr_80135A4C.o,tail5.data.o,ov_SC04_006_jr_80135D20.o,tail6.data.o,ov_SC04_006_jr_801380E0.o,tail7.data.o,ov_SC04_006_jr_8013F350.o,tail8.data.o,ov_SC04_006_jr_8013FFD8.o,tail9.data.o,ov_SC04_006_jr_80140608.o,tail10.data.o,ov_SC04_006_jr_8015444C.o,tail11.data.o,ov_SC04_006_jr_80154C24.o,ov_SC04_006_jr_801588CC.o,tail12.data.o,ov_SC04_006_jr_80159C84.o,tail13.data.o,ov_SC04_006_jr_8015A3C8.o,tail14.data.o,ov_SC04_006_jr_8015AE2C.o,tail15.data.o,ov_SC04_006_jr_8015C32C.o,tail16.data.o,ov_SC04_006_jr_8016AB6C.o,tail17.data.o,ov_SC04_006_jr_801734BC.o,tail18.data.o,ov_SC04_006_jr_80178D40.o,tail19.data.o,ov_SC04_006_jr_8017A4AC.o,tail20.data.o,ov_SC04_006_jr_8017AE2C.o,ov_SC04_006_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC04_006/ov_SC04_006_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC04_006/ov_SC04_006_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC04_006/ov_SC04_006_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2397,7 +2397,7 @@ ov_SC04_007_ELF := $(ov_SC04_007_OUT).elf ov_SC04_007_MAPFILE := $(ov_SC04_007_OUT).map ov_SC04_007_LD_SCRIPT := $(ov_SC04_007_OUT).ld ov_SC04_007_SPLAT_YAML := config/splat.ov_SC04_007.yaml -ov_SC04_007_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_007_jr_8012ACE0.o,tail2.data.o,ov_SC04_007_jr_80135888.o,tail3.data.o,ov_SC04_007_jr_80135A4C.o,tail4.data.o,ov_SC04_007_jr_80135D20.o,tail5.data.o,ov_SC04_007_jr_801380E0.o,tail6.data.o,ov_SC04_007_jr_8013F350.o,tail7.data.o,ov_SC04_007_jr_8013FFD8.o,tail8.data.o,ov_SC04_007_jr_80140608.o,tail9.data.o,ov_SC04_007_jr_8015444C.o,tail10.data.o,ov_SC04_007_jr_80154C24.o,ov_SC04_007_jr_801588CC.o,tail11.data.o,ov_SC04_007_jr_80159C84.o,tail12.data.o,ov_SC04_007_jr_8015A3C8.o,tail13.data.o,ov_SC04_007_jr_8015AE2C.o,tail14.data.o,ov_SC04_007_jr_8015C32C.o,tail15.data.o,ov_SC04_007_jr_8016AB6C.o,tail16.data.o,ov_SC04_007_jr_801734BC.o,tail17.data.o,ov_SC04_007_jr_80178D40.o,tail18.data.o,ov_SC04_007_jr_8017A4AC.o,tail19.data.o,ov_SC04_007_jr_8017AE2C.o,ov_SC04_007_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC04_007_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_007.o,tail2.data.o,ov_SC04_007_jr_8012ACE0.o,tail3.data.o,ov_SC04_007_jr_80135888.o,tail4.data.o,ov_SC04_007_jr_80135A4C.o,tail5.data.o,ov_SC04_007_jr_80135D20.o,tail6.data.o,ov_SC04_007_jr_801380E0.o,tail7.data.o,ov_SC04_007_jr_8013F350.o,tail8.data.o,ov_SC04_007_jr_8013FFD8.o,tail9.data.o,ov_SC04_007_jr_80140608.o,tail10.data.o,ov_SC04_007_jr_8015444C.o,tail11.data.o,ov_SC04_007_jr_80154C24.o,ov_SC04_007_jr_801588CC.o,tail12.data.o,ov_SC04_007_jr_80159C84.o,tail13.data.o,ov_SC04_007_jr_8015A3C8.o,tail14.data.o,ov_SC04_007_jr_8015AE2C.o,tail15.data.o,ov_SC04_007_jr_8015C32C.o,tail16.data.o,ov_SC04_007_jr_8016AB6C.o,tail17.data.o,ov_SC04_007_jr_801734BC.o,tail18.data.o,ov_SC04_007_jr_80178D40.o,tail19.data.o,ov_SC04_007_jr_8017A4AC.o,tail20.data.o,ov_SC04_007_jr_8017AE2C.o,ov_SC04_007_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC04_007/ov_SC04_007_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC04_007/ov_SC04_007_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC04_007/ov_SC04_007_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2424,7 +2424,7 @@ ov_SC04_008_ELF := $(ov_SC04_008_OUT).elf ov_SC04_008_MAPFILE := $(ov_SC04_008_OUT).map ov_SC04_008_LD_SCRIPT := $(ov_SC04_008_OUT).ld ov_SC04_008_SPLAT_YAML := config/splat.ov_SC04_008.yaml -ov_SC04_008_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_008_jr_8012ACE0.o,tail2.data.o,ov_SC04_008_jr_80135888.o,tail3.data.o,ov_SC04_008_jr_80135A4C.o,tail4.data.o,ov_SC04_008_jr_80135D20.o,tail5.data.o,ov_SC04_008_jr_801380E0.o,tail6.data.o,ov_SC04_008_jr_8013F350.o,tail7.data.o,ov_SC04_008_jr_8013FFD8.o,tail8.data.o,ov_SC04_008_jr_80140608.o,tail9.data.o,ov_SC04_008_jr_8015444C.o,tail10.data.o,ov_SC04_008_jr_80154C24.o,ov_SC04_008_jr_801588CC.o,tail11.data.o,ov_SC04_008_jr_80159C84.o,tail12.data.o,ov_SC04_008_jr_8015AE2C.o,tail13.data.o,ov_SC04_008_jr_8015C32C.o,tail14.data.o,ov_SC04_008_jr_8016AB6C.o,tail15.data.o,ov_SC04_008_jr_801734BC.o,tail16.data.o,ov_SC04_008_jr_80178D40.o,tail17.data.o,ov_SC04_008_jr_8017A4AC.o,tail18.data.o,ov_SC04_008_jr_8017AE2C.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC04_008_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_008.o,tail2.data.o,ov_SC04_008_jr_8012ACE0.o,tail3.data.o,ov_SC04_008_jr_80135888.o,tail4.data.o,ov_SC04_008_jr_80135A4C.o,tail5.data.o,ov_SC04_008_jr_80135D20.o,tail6.data.o,ov_SC04_008_jr_801380E0.o,tail7.data.o,ov_SC04_008_jr_8013F350.o,tail8.data.o,ov_SC04_008_jr_8013FFD8.o,tail9.data.o,ov_SC04_008_jr_80140608.o,tail10.data.o,ov_SC04_008_jr_8015444C.o,tail11.data.o,ov_SC04_008_jr_80154C24.o,ov_SC04_008_jr_801588CC.o,tail12.data.o,ov_SC04_008_jr_80159C84.o,tail13.data.o,ov_SC04_008_jr_8015AE2C.o,tail14.data.o,ov_SC04_008_jr_8015C32C.o,tail15.data.o,ov_SC04_008_jr_8016AB6C.o,tail16.data.o,ov_SC04_008_jr_801734BC.o,tail17.data.o,ov_SC04_008_jr_80178D40.o,tail18.data.o,ov_SC04_008_jr_8017A4AC.o,tail19.data.o,ov_SC04_008_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC04_008/ov_SC04_008_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC04_008/ov_SC04_008_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC04_008/ov_SC04_008_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2451,7 +2451,7 @@ ov_SC04_009_ELF := $(ov_SC04_009_OUT).elf ov_SC04_009_MAPFILE := $(ov_SC04_009_OUT).map ov_SC04_009_LD_SCRIPT := $(ov_SC04_009_OUT).ld ov_SC04_009_SPLAT_YAML := config/splat.ov_SC04_009.yaml -ov_SC04_009_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_009_jr_8012ACE0.o,tail2.data.o,ov_SC04_009_jr_80135888.o,tail3.data.o,ov_SC04_009_jr_80135A4C.o,tail4.data.o,ov_SC04_009_jr_80135D20.o,tail5.data.o,ov_SC04_009_jr_801380E0.o,tail6.data.o,ov_SC04_009_jr_8013F350.o,tail7.data.o,ov_SC04_009_jr_8013FFD8.o,tail8.data.o,ov_SC04_009_jr_80140608.o,tail9.data.o,ov_SC04_009_jr_8015444C.o,tail10.data.o,ov_SC04_009_jr_80154C24.o,ov_SC04_009_jr_801588CC.o,tail11.data.o,ov_SC04_009_jr_80159C84.o,tail12.data.o,ov_SC04_009_jr_8015A3C8.o,tail13.data.o,ov_SC04_009_jr_8015AE2C.o,tail14.data.o,ov_SC04_009_jr_8015C32C.o,tail15.data.o,ov_SC04_009_jr_8016AB6C.o,tail16.data.o,ov_SC04_009_jr_801734BC.o,tail17.data.o,ov_SC04_009_jr_80178D40.o,tail18.data.o,ov_SC04_009_jr_8017A4AC.o,tail19.data.o,ov_SC04_009_jr_8017AE2C.o,ov_SC04_009_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC04_009_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_009.o,tail2.data.o,ov_SC04_009_jr_8012ACE0.o,tail3.data.o,ov_SC04_009_jr_80135888.o,tail4.data.o,ov_SC04_009_jr_80135A4C.o,tail5.data.o,ov_SC04_009_jr_80135D20.o,tail6.data.o,ov_SC04_009_jr_801380E0.o,tail7.data.o,ov_SC04_009_jr_8013F350.o,tail8.data.o,ov_SC04_009_jr_8013FFD8.o,tail9.data.o,ov_SC04_009_jr_80140608.o,tail10.data.o,ov_SC04_009_jr_8015444C.o,tail11.data.o,ov_SC04_009_jr_80154C24.o,ov_SC04_009_jr_801588CC.o,tail12.data.o,ov_SC04_009_jr_80159C84.o,tail13.data.o,ov_SC04_009_jr_8015A3C8.o,tail14.data.o,ov_SC04_009_jr_8015AE2C.o,tail15.data.o,ov_SC04_009_jr_8015C32C.o,tail16.data.o,ov_SC04_009_jr_8016AB6C.o,tail17.data.o,ov_SC04_009_jr_801734BC.o,tail18.data.o,ov_SC04_009_jr_80178D40.o,tail19.data.o,ov_SC04_009_jr_8017A4AC.o,tail20.data.o,ov_SC04_009_jr_8017AE2C.o,ov_SC04_009_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC04_009/ov_SC04_009_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC04_009/ov_SC04_009_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC04_009/ov_SC04_009_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2478,7 +2478,7 @@ ov_SC04_010_ELF := $(ov_SC04_010_OUT).elf ov_SC04_010_MAPFILE := $(ov_SC04_010_OUT).map ov_SC04_010_LD_SCRIPT := $(ov_SC04_010_OUT).ld ov_SC04_010_SPLAT_YAML := config/splat.ov_SC04_010.yaml -ov_SC04_010_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_010_jr_8012ACE0.o,tail2.data.o,ov_SC04_010_jr_80135888.o,tail3.data.o,ov_SC04_010_jr_80135A4C.o,tail4.data.o,ov_SC04_010_jr_80135D20.o,tail5.data.o,ov_SC04_010_jr_801380E0.o,tail6.data.o,ov_SC04_010_jr_8013F350.o,tail7.data.o,ov_SC04_010_jr_8013FFD8.o,tail8.data.o,ov_SC04_010_jr_80140608.o,tail9.data.o,ov_SC04_010_jr_8015444C.o,tail10.data.o,ov_SC04_010_jr_80154C24.o,ov_SC04_010_jr_801588CC.o,tail11.data.o,ov_SC04_010_jr_80159C84.o,tail12.data.o,ov_SC04_010_jr_8015A3C8.o,tail13.data.o,ov_SC04_010_jr_8015AE2C.o,tail14.data.o,ov_SC04_010_jr_8015C32C.o,tail15.data.o,ov_SC04_010_jr_8016AB6C.o,tail16.data.o,ov_SC04_010_jr_801734BC.o,tail17.data.o,ov_SC04_010_jr_80178D40.o,tail18.data.o,ov_SC04_010_jr_8017A4AC.o,tail19.data.o,ov_SC04_010_jr_8017AE2C.o,ov_SC04_010_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC04_010_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_010.o,tail2.data.o,ov_SC04_010_jr_8012ACE0.o,tail3.data.o,ov_SC04_010_jr_80135888.o,tail4.data.o,ov_SC04_010_jr_80135A4C.o,tail5.data.o,ov_SC04_010_jr_80135D20.o,tail6.data.o,ov_SC04_010_jr_801380E0.o,tail7.data.o,ov_SC04_010_jr_8013F350.o,tail8.data.o,ov_SC04_010_jr_8013FFD8.o,tail9.data.o,ov_SC04_010_jr_80140608.o,tail10.data.o,ov_SC04_010_jr_8015444C.o,tail11.data.o,ov_SC04_010_jr_80154C24.o,ov_SC04_010_jr_801588CC.o,tail12.data.o,ov_SC04_010_jr_80159C84.o,tail13.data.o,ov_SC04_010_jr_8015A3C8.o,tail14.data.o,ov_SC04_010_jr_8015AE2C.o,tail15.data.o,ov_SC04_010_jr_8015C32C.o,tail16.data.o,ov_SC04_010_jr_8016AB6C.o,tail17.data.o,ov_SC04_010_jr_801734BC.o,tail18.data.o,ov_SC04_010_jr_80178D40.o,tail19.data.o,ov_SC04_010_jr_8017A4AC.o,tail20.data.o,ov_SC04_010_jr_8017AE2C.o,ov_SC04_010_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC04_010/ov_SC04_010_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC04_010/ov_SC04_010_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC04_010/ov_SC04_010_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2505,7 +2505,7 @@ ov_SC04_011_ELF := $(ov_SC04_011_OUT).elf ov_SC04_011_MAPFILE := $(ov_SC04_011_OUT).map ov_SC04_011_LD_SCRIPT := $(ov_SC04_011_OUT).ld ov_SC04_011_SPLAT_YAML := config/splat.ov_SC04_011.yaml -ov_SC04_011_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_011_jr_8012ACE0.o,tail2.data.o,ov_SC04_011_jr_80135888.o,tail3.data.o,ov_SC04_011_jr_80135A4C.o,tail4.data.o,ov_SC04_011_jr_80135D20.o,tail5.data.o,ov_SC04_011_jr_801380E0.o,tail6.data.o,ov_SC04_011_jr_8013F350.o,tail7.data.o,ov_SC04_011_jr_8013FFD8.o,tail8.data.o,ov_SC04_011_jr_80140608.o,tail9.data.o,ov_SC04_011_jr_8015444C.o,tail10.data.o,ov_SC04_011_jr_80154C24.o,ov_SC04_011_jr_801588CC.o,tail11.data.o,ov_SC04_011_jr_80159C84.o,tail12.data.o,ov_SC04_011_jr_8015A3C8.o,tail13.data.o,ov_SC04_011_jr_8015AE2C.o,tail14.data.o,ov_SC04_011_jr_8015C32C.o,tail15.data.o,ov_SC04_011_jr_8016AB6C.o,tail16.data.o,ov_SC04_011_jr_801734BC.o,tail17.data.o,ov_SC04_011_jr_80178D40.o,tail18.data.o,ov_SC04_011_jr_8017A4AC.o,tail19.data.o,ov_SC04_011_jr_8017AE2C.o,tail20.data.o,ov_SC04_011_jr_8017D494.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC04_011_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_011.o,tail2.data.o,ov_SC04_011_jr_8012ACE0.o,tail3.data.o,ov_SC04_011_jr_80135888.o,tail4.data.o,ov_SC04_011_jr_80135A4C.o,tail5.data.o,ov_SC04_011_jr_80135D20.o,tail6.data.o,ov_SC04_011_jr_801380E0.o,tail7.data.o,ov_SC04_011_jr_8013F350.o,tail8.data.o,ov_SC04_011_jr_8013FFD8.o,tail9.data.o,ov_SC04_011_jr_80140608.o,tail10.data.o,ov_SC04_011_jr_8015444C.o,tail11.data.o,ov_SC04_011_jr_80154C24.o,ov_SC04_011_jr_801588CC.o,tail12.data.o,ov_SC04_011_jr_80159C84.o,tail13.data.o,ov_SC04_011_jr_8015A3C8.o,tail14.data.o,ov_SC04_011_jr_8015AE2C.o,tail15.data.o,ov_SC04_011_jr_8015C32C.o,tail16.data.o,ov_SC04_011_jr_8016AB6C.o,tail17.data.o,ov_SC04_011_jr_801734BC.o,tail18.data.o,ov_SC04_011_jr_80178D40.o,tail19.data.o,ov_SC04_011_jr_8017A4AC.o,tail20.data.o,ov_SC04_011_jr_8017AE2C.o,tail21.data.o,ov_SC04_011_jr_8017D494.o,tail22.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2532,7 +2532,7 @@ ov_SC04_012_ELF := $(ov_SC04_012_OUT).elf ov_SC04_012_MAPFILE := $(ov_SC04_012_OUT).map ov_SC04_012_LD_SCRIPT := $(ov_SC04_012_OUT).ld ov_SC04_012_SPLAT_YAML := config/splat.ov_SC04_012.yaml -ov_SC04_012_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_012_jr_8012ACE0.o,tail2.data.o,ov_SC04_012_jr_80135888.o,tail3.data.o,ov_SC04_012_jr_80135A4C.o,tail4.data.o,ov_SC04_012_jr_80135D20.o,tail5.data.o,ov_SC04_012_jr_801380E0.o,tail6.data.o,ov_SC04_012_jr_8013F350.o,tail7.data.o,ov_SC04_012_jr_8013FFD8.o,tail8.data.o,ov_SC04_012_jr_80140608.o,tail9.data.o,ov_SC04_012_jr_8015444C.o,tail10.data.o,ov_SC04_012_jr_80154C24.o,ov_SC04_012_jr_801588CC.o,tail11.data.o,ov_SC04_012_jr_80159C84.o,tail12.data.o,ov_SC04_012_jr_8015A3C8.o,tail13.data.o,ov_SC04_012_jr_8015AE2C.o,tail14.data.o,ov_SC04_012_jr_8015C32C.o,tail15.data.o,ov_SC04_012_jr_8016AB6C.o,tail16.data.o,ov_SC04_012_jr_801734BC.o,tail17.data.o,ov_SC04_012_jr_80178D40.o,tail18.data.o,ov_SC04_012_jr_8017A4AC.o,tail19.data.o,ov_SC04_012_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC04_012_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_012.o,tail2.data.o,ov_SC04_012_jr_8012ACE0.o,tail3.data.o,ov_SC04_012_jr_80135888.o,tail4.data.o,ov_SC04_012_jr_80135A4C.o,tail5.data.o,ov_SC04_012_jr_80135D20.o,tail6.data.o,ov_SC04_012_jr_801380E0.o,tail7.data.o,ov_SC04_012_jr_8013F350.o,tail8.data.o,ov_SC04_012_jr_8013FFD8.o,tail9.data.o,ov_SC04_012_jr_80140608.o,tail10.data.o,ov_SC04_012_jr_8015444C.o,tail11.data.o,ov_SC04_012_jr_80154C24.o,ov_SC04_012_jr_801588CC.o,tail12.data.o,ov_SC04_012_jr_80159C84.o,tail13.data.o,ov_SC04_012_jr_8015A3C8.o,tail14.data.o,ov_SC04_012_jr_8015AE2C.o,tail15.data.o,ov_SC04_012_jr_8015C32C.o,tail16.data.o,ov_SC04_012_jr_8016AB6C.o,tail17.data.o,ov_SC04_012_jr_801734BC.o,tail18.data.o,ov_SC04_012_jr_80178D40.o,tail19.data.o,ov_SC04_012_jr_8017A4AC.o,tail20.data.o,ov_SC04_012_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC04_012/ov_SC04_012_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC04_012/ov_SC04_012_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC04_012/ov_SC04_012_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2559,7 +2559,7 @@ ov_SC04_015_ELF := $(ov_SC04_015_OUT).elf ov_SC04_015_MAPFILE := $(ov_SC04_015_OUT).map ov_SC04_015_LD_SCRIPT := $(ov_SC04_015_OUT).ld ov_SC04_015_SPLAT_YAML := config/splat.ov_SC04_015.yaml -ov_SC04_015_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_015_jr_8012ACE0.o,tail2.data.o,ov_SC04_015_jr_80135888.o,tail3.data.o,ov_SC04_015_jr_80135A4C.o,tail4.data.o,ov_SC04_015_jr_80135D20.o,tail5.data.o,ov_SC04_015_jr_801380E0.o,tail6.data.o,ov_SC04_015_jr_8013F350.o,tail7.data.o,ov_SC04_015_jr_8013FFD8.o,tail8.data.o,ov_SC04_015_jr_80140608.o,tail9.data.o,ov_SC04_015_jr_8015444C.o,tail10.data.o,ov_SC04_015_jr_80154C24.o,ov_SC04_015_jr_801588CC.o,tail11.data.o,ov_SC04_015_jr_80159C84.o,tail12.data.o,ov_SC04_015_jr_8015A3C8.o,tail13.data.o,ov_SC04_015_jr_8015AE2C.o,tail14.data.o,ov_SC04_015_jr_8015C32C.o,tail15.data.o,ov_SC04_015_jr_8016AB6C.o,tail16.data.o,ov_SC04_015_jr_801734BC.o,tail17.data.o,ov_SC04_015_jr_80178D40.o,tail18.data.o,ov_SC04_015_jr_8017A4AC.o,tail19.data.o,ov_SC04_015_jr_8017AE2C.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC04_015_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_015.o,tail2.data.o,ov_SC04_015_jr_8012ACE0.o,tail3.data.o,ov_SC04_015_jr_80135888.o,tail4.data.o,ov_SC04_015_jr_80135A4C.o,tail5.data.o,ov_SC04_015_jr_80135D20.o,tail6.data.o,ov_SC04_015_jr_801380E0.o,tail7.data.o,ov_SC04_015_jr_8013F350.o,tail8.data.o,ov_SC04_015_jr_8013FFD8.o,tail9.data.o,ov_SC04_015_jr_80140608.o,tail10.data.o,ov_SC04_015_jr_8015444C.o,tail11.data.o,ov_SC04_015_jr_80154C24.o,ov_SC04_015_jr_801588CC.o,tail12.data.o,ov_SC04_015_jr_80159C84.o,tail13.data.o,ov_SC04_015_jr_8015A3C8.o,tail14.data.o,ov_SC04_015_jr_8015AE2C.o,tail15.data.o,ov_SC04_015_jr_8015C32C.o,tail16.data.o,ov_SC04_015_jr_8016AB6C.o,tail17.data.o,ov_SC04_015_jr_801734BC.o,tail18.data.o,ov_SC04_015_jr_80178D40.o,tail19.data.o,ov_SC04_015_jr_8017A4AC.o,tail20.data.o,ov_SC04_015_jr_8017AE2C.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC04_015/ov_SC04_015_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC04_015/ov_SC04_015_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC04_015/ov_SC04_015_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 @@ -2586,7 +2586,7 @@ ov_SC04_016_ELF := $(ov_SC04_016_OUT).elf ov_SC04_016_MAPFILE := $(ov_SC04_016_OUT).map ov_SC04_016_LD_SCRIPT := $(ov_SC04_016_OUT).ld ov_SC04_016_SPLAT_YAML := config/splat.ov_SC04_016.yaml -ov_SC04_016_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_016_jr_8012ACE0.o,tail2.data.o,ov_SC04_016_jr_80135888.o,tail3.data.o,ov_SC04_016_jr_80135A4C.o,tail4.data.o,ov_SC04_016_jr_80135D20.o,tail5.data.o,ov_SC04_016_jr_801380E0.o,tail6.data.o,ov_SC04_016_jr_8013F350.o,tail7.data.o,ov_SC04_016_jr_8013FFD8.o,tail8.data.o,ov_SC04_016_jr_80140608.o,tail9.data.o,ov_SC04_016_jr_8015444C.o,tail10.data.o,ov_SC04_016_jr_80154C24.o,ov_SC04_016_jr_801588CC.o,tail11.data.o,ov_SC04_016_jr_80159C84.o,tail12.data.o,ov_SC04_016_jr_8015A3C8.o,tail13.data.o,ov_SC04_016_jr_8015AE2C.o,tail14.data.o,ov_SC04_016_jr_8015C32C.o,tail15.data.o,ov_SC04_016_jr_8016AB6C.o,tail16.data.o,ov_SC04_016_jr_801734BC.o,tail17.data.o,ov_SC04_016_jr_80178D40.o,tail18.data.o,ov_SC04_016_jr_8017A4AC.o,tail19.data.o,ov_SC04_016_jr_8017AE2C.o,ov_SC04_016_jr_8017BEBC.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC04_016_JTBL_INTERLEAVE := --order tail.data.o,ov_SC04_016.o,tail2.data.o,ov_SC04_016_jr_8012ACE0.o,tail3.data.o,ov_SC04_016_jr_80135888.o,tail4.data.o,ov_SC04_016_jr_80135A4C.o,tail5.data.o,ov_SC04_016_jr_80135D20.o,tail6.data.o,ov_SC04_016_jr_801380E0.o,tail7.data.o,ov_SC04_016_jr_8013F350.o,tail8.data.o,ov_SC04_016_jr_8013FFD8.o,tail9.data.o,ov_SC04_016_jr_80140608.o,tail10.data.o,ov_SC04_016_jr_8015444C.o,tail11.data.o,ov_SC04_016_jr_80154C24.o,ov_SC04_016_jr_801588CC.o,tail12.data.o,ov_SC04_016_jr_80159C84.o,tail13.data.o,ov_SC04_016_jr_8015A3C8.o,tail14.data.o,ov_SC04_016_jr_8015AE2C.o,tail15.data.o,ov_SC04_016_jr_8015C32C.o,tail16.data.o,ov_SC04_016_jr_8016AB6C.o,tail17.data.o,ov_SC04_016_jr_801734BC.o,tail18.data.o,ov_SC04_016_jr_80178D40.o,tail19.data.o,ov_SC04_016_jr_8017A4AC.o,tail20.data.o,ov_SC04_016_jr_8017AE2C.o,ov_SC04_016_jr_8017BEBC.o,tail21.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC04_016/ov_SC04_016_jr_8012ACE0.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) build/src/ov_SC04_016/ov_SC04_016_jr_8013F350.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC04_016/ov_SC04_016_jr_80154C24.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x24 diff --git a/config/splat.ov_SC03_093.yaml b/config/splat.ov_SC03_093.yaml index 905b3c1b7..1f0f651a9 100644 --- a/config/splat.ov_SC03_093.yaml +++ b/config/splat.ov_SC03_093.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_093_jr_8017AE2C] - [0x55740, c, ov_SC03_093_jr_8017D898] - [0x5dd34, data, tail] + - [0xa1c84, .rodata, ov_SC03_093] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xa1c98, data, tail2] - [0xa1d60, .rodata, ov_SC03_093_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1e40, data, tail2] + - [0xa1e40, data, tail3] - [0xa1e58, .rodata, ov_SC03_093_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1e6c, data, tail3] + - [0xa1e6c, data, tail4] - [0xa1e70, .rodata, ov_SC03_093_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1e84, data, tail4] + - [0xa1e84, data, tail5] - [0xa1e88, .rodata, ov_SC03_093_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1e9c, data, tail5] + - [0xa1e9c, data, tail6] - [0xa1ed8, .rodata, ov_SC03_093_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa1f3c, data, tail6] + - [0xa1f3c, data, tail7] - [0xa2548, .rodata, ov_SC03_093_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa257c, data, tail7] + - [0xa257c, data, tail8] - [0xa2580, .rodata, ov_SC03_093_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa25b4, data, tail8] + - [0xa25b4, data, tail9] - [0xa25f0, .rodata, ov_SC03_093_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2604, data, tail9] + - [0xa2604, data, tail10] - [0xa261c, .rodata, ov_SC03_093_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2688, data, tail10] + - [0xa2688, data, tail11] - [0xa26f8, .rodata, ov_SC03_093_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa273c, .rodata, ov_SC03_093_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2784, data, tail11] + - [0xa2784, data, tail12] - [0xa27e4, .rodata, ov_SC03_093_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2818, data, tail12] + - [0xa2818, data, tail13] - [0xa281c, .rodata, ov_SC03_093_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2838, data, tail13] + - [0xa2838, data, tail14] - [0xa283c, .rodata, ov_SC03_093_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2858, data, tail14] + - [0xa2858, data, tail15] - [0xa287c, .rodata, ov_SC03_093_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2898, data, tail15] + - [0xa2898, data, tail16] - [0xa28b0, .rodata, ov_SC03_093_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa28d0, data, tail16] + - [0xa28d0, data, tail17] - [0xa2950, .rodata, ov_SC03_093_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2964, data, tail17] + - [0xa2964, data, tail18] - [0xa2b0c, .rodata, ov_SC03_093_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2c84, data, tail18] + - [0xa2c84, data, tail19] - [0xa2d14, .rodata, ov_SC03_093_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2da0, data, tail19] + - [0xa2da0, data, tail20] - [0xa2da4, .rodata, ov_SC03_093_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa2db8, .rodata, ov_SC03_093_jr_8017D898] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa2dd8, data, tail20] + - [0xa2dd8, data, tail21] - [0xA4584, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xA4587] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_094.yaml b/config/splat.ov_SC03_094.yaml index 2569f4e94..d6cc96471 100644 --- a/config/splat.ov_SC03_094.yaml +++ b/config/splat.ov_SC03_094.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_094_jr_8017AE2C] - [0x53d64, c, ov_SC03_094_jr_8017BEBC] - [0x5f730, data, tail] + - [0xa8ac0, .rodata, ov_SC03_094] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xa8ad4, data, tail2] - [0xa8b9c, .rodata, ov_SC03_094_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa8c7c, data, tail2] + - [0xa8c7c, data, tail3] - [0xa8c94, .rodata, ov_SC03_094_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa8ca8, data, tail3] + - [0xa8ca8, data, tail4] - [0xa8cac, .rodata, ov_SC03_094_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa8cc0, data, tail4] + - [0xa8cc0, data, tail5] - [0xa8cc4, .rodata, ov_SC03_094_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa8cd8, data, tail5] + - [0xa8cd8, data, tail6] - [0xa8d14, .rodata, ov_SC03_094_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa8d78, data, tail6] + - [0xa8d78, data, tail7] - [0xa9384, .rodata, ov_SC03_094_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa93b8, data, tail7] + - [0xa93b8, data, tail8] - [0xa93bc, .rodata, ov_SC03_094_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa93f0, data, tail8] + - [0xa93f0, data, tail9] - [0xa942c, .rodata, ov_SC03_094_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9440, data, tail9] + - [0xa9440, data, tail10] - [0xa9458, .rodata, ov_SC03_094_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa94c4, data, tail10] + - [0xa94c4, data, tail11] - [0xa9534, .rodata, ov_SC03_094_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa9578, .rodata, ov_SC03_094_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa95c0, data, tail11] + - [0xa95c0, data, tail12] - [0xa9620, .rodata, ov_SC03_094_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9654, data, tail12] + - [0xa9654, data, tail13] - [0xa9658, .rodata, ov_SC03_094_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9674, data, tail13] + - [0xa9674, data, tail14] - [0xa9678, .rodata, ov_SC03_094_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9694, data, tail14] + - [0xa9694, data, tail15] - [0xa96b8, .rodata, ov_SC03_094_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa96d4, data, tail15] + - [0xa96d4, data, tail16] - [0xa96ec, .rodata, ov_SC03_094_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa970c, data, tail16] + - [0xa970c, data, tail17] - [0xa978c, .rodata, ov_SC03_094_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa97a0, data, tail17] + - [0xa97a0, data, tail18] - [0xa9948, .rodata, ov_SC03_094_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9ac0, data, tail18] + - [0xa9ac0, data, tail19] - [0xa9b50, .rodata, ov_SC03_094_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9bdc, data, tail19] + - [0xa9bdc, data, tail20] - [0xa9be0, .rodata, ov_SC03_094_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa9bf4, .rodata, ov_SC03_094_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9c14, data, tail20] + - [0xa9c14, data, tail21] - [0xAB13C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xAB13F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_095.yaml b/config/splat.ov_SC03_095.yaml index e6b0d0d93..783f97836 100644 --- a/config/splat.ov_SC03_095.yaml +++ b/config/splat.ov_SC03_095.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_095_jr_8017AE2C] - [0x53d64, c, ov_SC03_095_jr_8017BEBC] - [0x58d90, data, tail] + - [0x716ec, .rodata, ov_SC03_095] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x71700, data, tail2] - [0x717c8, .rodata, ov_SC03_095_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x718a8, data, tail2] + - [0x718a8, data, tail3] - [0x718c0, .rodata, ov_SC03_095_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x718d4, data, tail3] + - [0x718d4, data, tail4] - [0x718d8, .rodata, ov_SC03_095_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x718ec, data, tail4] + - [0x718ec, data, tail5] - [0x718f0, .rodata, ov_SC03_095_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x71904, data, tail5] + - [0x71904, data, tail6] - [0x71940, .rodata, ov_SC03_095_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x719a4, data, tail6] + - [0x719a4, data, tail7] - [0x71fb0, .rodata, ov_SC03_095_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x71fe4, data, tail7] + - [0x71fe4, data, tail8] - [0x71fe8, .rodata, ov_SC03_095_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7201c, data, tail8] + - [0x7201c, data, tail9] - [0x72058, .rodata, ov_SC03_095_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7206c, data, tail9] + - [0x7206c, data, tail10] - [0x72084, .rodata, ov_SC03_095_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x720f0, data, tail10] + - [0x720f0, data, tail11] - [0x72160, .rodata, ov_SC03_095_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x721a4, .rodata, ov_SC03_095_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x721ec, data, tail11] + - [0x721ec, data, tail12] - [0x7224c, .rodata, ov_SC03_095_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72280, data, tail12] + - [0x72280, data, tail13] - [0x72284, .rodata, ov_SC03_095_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x722a0, data, tail13] + - [0x722a0, data, tail14] - [0x722a4, .rodata, ov_SC03_095_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x722c0, data, tail14] + - [0x722c0, data, tail15] - [0x722e4, .rodata, ov_SC03_095_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72300, data, tail15] + - [0x72300, data, tail16] - [0x72318, .rodata, ov_SC03_095_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72338, data, tail16] + - [0x72338, data, tail17] - [0x723b8, .rodata, ov_SC03_095_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x723cc, data, tail17] + - [0x723cc, data, tail18] - [0x72574, .rodata, ov_SC03_095_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x726ec, data, tail18] + - [0x726ec, data, tail19] - [0x7277c, .rodata, ov_SC03_095_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72808, data, tail19] + - [0x72808, data, tail20] - [0x7280c, .rodata, ov_SC03_095_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x72820, .rodata, ov_SC03_095_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72840, data, tail20] + - [0x72840, data, tail21] - [0x73D3C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x73D3F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_096.yaml b/config/splat.ov_SC03_096.yaml index bebde9cc7..f3669480c 100644 --- a/config/splat.ov_SC03_096.yaml +++ b/config/splat.ov_SC03_096.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_096_jr_8017AE2C] - [0x53d64, c, ov_SC03_096_jr_8017BEBC] - [0x58910, data, tail] + - [0x701a0, .rodata, ov_SC03_096] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x701b4, data, tail2] - [0x7027c, .rodata, ov_SC03_096_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7035c, data, tail2] + - [0x7035c, data, tail3] - [0x70374, .rodata, ov_SC03_096_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70388, data, tail3] + - [0x70388, data, tail4] - [0x7038c, .rodata, ov_SC03_096_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x703a0, data, tail4] + - [0x703a0, data, tail5] - [0x703a4, .rodata, ov_SC03_096_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x703b8, data, tail5] + - [0x703b8, data, tail6] - [0x703f4, .rodata, ov_SC03_096_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70458, data, tail6] + - [0x70458, data, tail7] - [0x70a64, .rodata, ov_SC03_096_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70a98, data, tail7] + - [0x70a98, data, tail8] - [0x70a9c, .rodata, ov_SC03_096_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70ad0, data, tail8] + - [0x70ad0, data, tail9] - [0x70b0c, .rodata, ov_SC03_096_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70b20, data, tail9] + - [0x70b20, data, tail10] - [0x70b38, .rodata, ov_SC03_096_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70ba4, data, tail10] + - [0x70ba4, data, tail11] - [0x70c14, .rodata, ov_SC03_096_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x70c58, .rodata, ov_SC03_096_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70ca0, data, tail11] + - [0x70ca0, data, tail12] - [0x70d00, .rodata, ov_SC03_096_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70d34, data, tail12] + - [0x70d34, data, tail13] - [0x70d38, .rodata, ov_SC03_096_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70d54, data, tail13] + - [0x70d54, data, tail14] - [0x70d58, .rodata, ov_SC03_096_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70d74, data, tail14] + - [0x70d74, data, tail15] - [0x70d98, .rodata, ov_SC03_096_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70db4, data, tail15] + - [0x70db4, data, tail16] - [0x70dcc, .rodata, ov_SC03_096_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70dec, data, tail16] + - [0x70dec, data, tail17] - [0x70e6c, .rodata, ov_SC03_096_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70e80, data, tail17] + - [0x70e80, data, tail18] - [0x71028, .rodata, ov_SC03_096_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x711a0, data, tail18] + - [0x711a0, data, tail19] - [0x71230, .rodata, ov_SC03_096_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x712bc, data, tail19] + - [0x712bc, data, tail20] - [0x712c0, .rodata, ov_SC03_096_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x712d4, .rodata, ov_SC03_096_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x712f4, data, tail20] + - [0x712f4, data, tail21] - [0x727F4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x727F7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_097.yaml b/config/splat.ov_SC03_097.yaml index e7603ec26..c0ea0205c 100644 --- a/config/splat.ov_SC03_097.yaml +++ b/config/splat.ov_SC03_097.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_097_jr_8017AE2C] - [0x55740, c, ov_SC03_097_jr_8017D898] - [0x5dcf0, data, tail] + - [0x80210, .rodata, ov_SC03_097] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x80224, data, tail2] - [0x802ec, .rodata, ov_SC03_097_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x803cc, data, tail2] + - [0x803cc, data, tail3] - [0x803e4, .rodata, ov_SC03_097_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x803f8, data, tail3] + - [0x803f8, data, tail4] - [0x803fc, .rodata, ov_SC03_097_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80410, data, tail4] + - [0x80410, data, tail5] - [0x80414, .rodata, ov_SC03_097_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80428, data, tail5] + - [0x80428, data, tail6] - [0x80464, .rodata, ov_SC03_097_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x804c8, data, tail6] + - [0x804c8, data, tail7] - [0x80ad4, .rodata, ov_SC03_097_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80b08, data, tail7] + - [0x80b08, data, tail8] - [0x80b0c, .rodata, ov_SC03_097_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80b40, data, tail8] + - [0x80b40, data, tail9] - [0x80b7c, .rodata, ov_SC03_097_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80b90, data, tail9] + - [0x80b90, data, tail10] - [0x80ba8, .rodata, ov_SC03_097_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80c14, data, tail10] + - [0x80c14, data, tail11] - [0x80c84, .rodata, ov_SC03_097_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x80cc8, .rodata, ov_SC03_097_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80d10, data, tail11] + - [0x80d10, data, tail12] - [0x80d70, .rodata, ov_SC03_097_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80da4, data, tail12] + - [0x80da4, data, tail13] - [0x80da8, .rodata, ov_SC03_097_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80dc4, data, tail13] + - [0x80dc4, data, tail14] - [0x80dc8, .rodata, ov_SC03_097_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80de4, data, tail14] + - [0x80de4, data, tail15] - [0x80e08, .rodata, ov_SC03_097_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80e24, data, tail15] + - [0x80e24, data, tail16] - [0x80e3c, .rodata, ov_SC03_097_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80e5c, data, tail16] + - [0x80e5c, data, tail17] - [0x80edc, .rodata, ov_SC03_097_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80ef0, data, tail17] + - [0x80ef0, data, tail18] - [0x81098, .rodata, ov_SC03_097_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x81210, data, tail18] + - [0x81210, data, tail19] - [0x812a0, .rodata, ov_SC03_097_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8132c, data, tail19] + - [0x8132c, data, tail20] - [0x81330, .rodata, ov_SC03_097_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x81344, .rodata, ov_SC03_097_jr_8017D898] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x81364, data, tail20] + - [0x81364, data, tail21] - [0x82D74, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x82D77] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_098.yaml b/config/splat.ov_SC03_098.yaml index d58152ce8..2fb5ffa10 100644 --- a/config/splat.ov_SC03_098.yaml +++ b/config/splat.ov_SC03_098.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_098_jr_8017AE2C] - [0x55740, c, ov_SC03_098_jr_8017D898] - [0x5d17c, data, tail] + - [0x9ae94, .rodata, ov_SC03_098] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x9aea8, data, tail2] - [0x9af70, .rodata, ov_SC03_098_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b050, data, tail2] + - [0x9b050, data, tail3] - [0x9b068, .rodata, ov_SC03_098_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b07c, data, tail3] + - [0x9b07c, data, tail4] - [0x9b080, .rodata, ov_SC03_098_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b094, data, tail4] + - [0x9b094, data, tail5] - [0x9b098, .rodata, ov_SC03_098_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b0ac, data, tail5] + - [0x9b0ac, data, tail6] - [0x9b0e8, .rodata, ov_SC03_098_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b14c, data, tail6] + - [0x9b14c, data, tail7] - [0x9b758, .rodata, ov_SC03_098_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b78c, data, tail7] + - [0x9b78c, data, tail8] - [0x9b790, .rodata, ov_SC03_098_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b7c4, data, tail8] + - [0x9b7c4, data, tail9] - [0x9b800, .rodata, ov_SC03_098_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b814, data, tail9] + - [0x9b814, data, tail10] - [0x9b82c, .rodata, ov_SC03_098_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b898, data, tail10] + - [0x9b898, data, tail11] - [0x9b908, .rodata, ov_SC03_098_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9b94c, .rodata, ov_SC03_098_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b994, data, tail11] + - [0x9b994, data, tail12] - [0x9b9f4, .rodata, ov_SC03_098_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ba28, data, tail12] + - [0x9ba28, data, tail13] - [0x9ba2c, .rodata, ov_SC03_098_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ba48, data, tail13] + - [0x9ba48, data, tail14] - [0x9ba4c, .rodata, ov_SC03_098_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ba68, data, tail14] + - [0x9ba68, data, tail15] - [0x9ba8c, .rodata, ov_SC03_098_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9baa8, data, tail15] + - [0x9baa8, data, tail16] - [0x9bac0, .rodata, ov_SC03_098_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9bae0, data, tail16] + - [0x9bae0, data, tail17] - [0x9bb60, .rodata, ov_SC03_098_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9bb74, data, tail17] + - [0x9bb74, data, tail18] - [0x9bd1c, .rodata, ov_SC03_098_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9be94, data, tail18] + - [0x9be94, data, tail19] - [0x9bf24, .rodata, ov_SC03_098_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9bfb0, data, tail19] + - [0x9bfb0, data, tail20] - [0x9bfb4, .rodata, ov_SC03_098_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9bfc8, .rodata, ov_SC03_098_jr_8017D898] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9bfe8, data, tail20] + - [0x9bfe8, data, tail21] - [0x9D75C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x9D75F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_099.yaml b/config/splat.ov_SC03_099.yaml index d11920e5c..aaf9f1dbe 100644 --- a/config/splat.ov_SC03_099.yaml +++ b/config/splat.ov_SC03_099.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_099_jr_8017AE2C] - [0x53d64, c, ov_SC03_099_jr_8017BEBC] - [0x5b27c, data, tail] + - [0x94b68, .rodata, ov_SC03_099] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x94b7c, data, tail2] - [0x94c44, .rodata, ov_SC03_099_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94d24, data, tail2] + - [0x94d24, data, tail3] - [0x94d3c, .rodata, ov_SC03_099_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94d50, data, tail3] + - [0x94d50, data, tail4] - [0x94d54, .rodata, ov_SC03_099_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94d68, data, tail4] + - [0x94d68, data, tail5] - [0x94d6c, .rodata, ov_SC03_099_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94d80, data, tail5] + - [0x94d80, data, tail6] - [0x94dbc, .rodata, ov_SC03_099_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x94e20, data, tail6] + - [0x94e20, data, tail7] - [0x9542c, .rodata, ov_SC03_099_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x95460, data, tail7] + - [0x95460, data, tail8] - [0x95464, .rodata, ov_SC03_099_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x95498, data, tail8] + - [0x95498, data, tail9] - [0x954d4, .rodata, ov_SC03_099_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x954e8, data, tail9] + - [0x954e8, data, tail10] - [0x95500, .rodata, ov_SC03_099_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9556c, data, tail10] + - [0x9556c, data, tail11] - [0x955dc, .rodata, ov_SC03_099_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x95620, .rodata, ov_SC03_099_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x95668, data, tail11] + - [0x95668, data, tail12] - [0x956c8, .rodata, ov_SC03_099_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x956fc, data, tail12] + - [0x956fc, data, tail13] - [0x95700, .rodata, ov_SC03_099_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9571c, data, tail13] + - [0x9571c, data, tail14] - [0x95720, .rodata, ov_SC03_099_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9573c, data, tail14] + - [0x9573c, data, tail15] - [0x95760, .rodata, ov_SC03_099_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9577c, data, tail15] + - [0x9577c, data, tail16] - [0x95794, .rodata, ov_SC03_099_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x957b4, data, tail16] + - [0x957b4, data, tail17] - [0x95834, .rodata, ov_SC03_099_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x95848, data, tail17] + - [0x95848, data, tail18] - [0x959f0, .rodata, ov_SC03_099_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x95b68, data, tail18] + - [0x95b68, data, tail19] - [0x95bf8, .rodata, ov_SC03_099_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x95c84, data, tail19] + - [0x95c84, data, tail20] - [0x95c88, .rodata, ov_SC03_099_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x95c9c, .rodata, ov_SC03_099_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x95cbc, data, tail20] + - [0x95cbc, data, tail21] - [0x97304, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x97307] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_100.yaml b/config/splat.ov_SC03_100.yaml index 0837c4efd..da13401a4 100644 --- a/config/splat.ov_SC03_100.yaml +++ b/config/splat.ov_SC03_100.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_100_jr_8017AE2C] - [0x55740, c, ov_SC03_100_jr_8017D898] - [0x5c748, data, tail] + - [0x9ddec, .rodata, ov_SC03_100] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x9de00, data, tail2] - [0x9dec8, .rodata, ov_SC03_100_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9dfa8, data, tail2] + - [0x9dfa8, data, tail3] - [0x9dfc0, .rodata, ov_SC03_100_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9dfd4, data, tail3] + - [0x9dfd4, data, tail4] - [0x9dfd8, .rodata, ov_SC03_100_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9dfec, data, tail4] + - [0x9dfec, data, tail5] - [0x9dff0, .rodata, ov_SC03_100_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9e004, data, tail5] + - [0x9e004, data, tail6] - [0x9e040, .rodata, ov_SC03_100_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9e0a4, data, tail6] + - [0x9e0a4, data, tail7] - [0x9e6b0, .rodata, ov_SC03_100_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9e6e4, data, tail7] + - [0x9e6e4, data, tail8] - [0x9e6e8, .rodata, ov_SC03_100_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9e71c, data, tail8] + - [0x9e71c, data, tail9] - [0x9e758, .rodata, ov_SC03_100_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9e76c, data, tail9] + - [0x9e76c, data, tail10] - [0x9e784, .rodata, ov_SC03_100_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9e7f0, data, tail10] + - [0x9e7f0, data, tail11] - [0x9e860, .rodata, ov_SC03_100_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9e8a4, .rodata, ov_SC03_100_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9e8ec, data, tail11] + - [0x9e8ec, data, tail12] - [0x9e94c, .rodata, ov_SC03_100_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9e980, data, tail12] + - [0x9e980, data, tail13] - [0x9e984, .rodata, ov_SC03_100_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9e9a0, data, tail13] + - [0x9e9a0, data, tail14] - [0x9e9a4, .rodata, ov_SC03_100_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9e9c0, data, tail14] + - [0x9e9c0, data, tail15] - [0x9e9e4, .rodata, ov_SC03_100_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ea00, data, tail15] + - [0x9ea00, data, tail16] - [0x9ea18, .rodata, ov_SC03_100_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ea38, data, tail16] + - [0x9ea38, data, tail17] - [0x9eab8, .rodata, ov_SC03_100_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9eacc, data, tail17] + - [0x9eacc, data, tail18] - [0x9ec74, .rodata, ov_SC03_100_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9edec, data, tail18] + - [0x9edec, data, tail19] - [0x9ee7c, .rodata, ov_SC03_100_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ef08, data, tail19] + - [0x9ef08, data, tail20] - [0x9ef0c, .rodata, ov_SC03_100_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9ef20, .rodata, ov_SC03_100_jr_8017D898] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ef40, data, tail20] + - [0x9ef40, data, tail21] - [0xA080C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xA080F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_101.yaml b/config/splat.ov_SC03_101.yaml index 91dc6d935..4dd8cc0fa 100644 --- a/config/splat.ov_SC03_101.yaml +++ b/config/splat.ov_SC03_101.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_101_jr_8017AE2C] - [0x54928, c, ov_SC03_101_jr_8017CA80] - [0x5b724, data, tail] + - [0x736b4, .rodata, ov_SC03_101] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x736c8, data, tail2] - [0x73790, .rodata, ov_SC03_101_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x73870, data, tail2] + - [0x73870, data, tail3] - [0x73888, .rodata, ov_SC03_101_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7389c, data, tail3] + - [0x7389c, data, tail4] - [0x738a0, .rodata, ov_SC03_101_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x738b4, data, tail4] + - [0x738b4, data, tail5] - [0x738b8, .rodata, ov_SC03_101_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x738cc, data, tail5] + - [0x738cc, data, tail6] - [0x73908, .rodata, ov_SC03_101_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7396c, data, tail6] + - [0x7396c, data, tail7] - [0x73f78, .rodata, ov_SC03_101_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x73fac, data, tail7] + - [0x73fac, data, tail8] - [0x73fb0, .rodata, ov_SC03_101_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x73fe4, data, tail8] + - [0x73fe4, data, tail9] - [0x74020, .rodata, ov_SC03_101_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x74034, data, tail9] + - [0x74034, data, tail10] - [0x7404c, .rodata, ov_SC03_101_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x740b8, data, tail10] + - [0x740b8, data, tail11] - [0x74128, .rodata, ov_SC03_101_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x7416c, .rodata, ov_SC03_101_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x741b4, data, tail11] + - [0x741b4, data, tail12] - [0x74214, .rodata, ov_SC03_101_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x74248, data, tail12] + - [0x74248, data, tail13] - [0x7424c, .rodata, ov_SC03_101_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x74268, data, tail13] + - [0x74268, data, tail14] - [0x7426c, .rodata, ov_SC03_101_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x74288, data, tail14] + - [0x74288, data, tail15] - [0x742ac, .rodata, ov_SC03_101_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x742c8, data, tail15] + - [0x742c8, data, tail16] - [0x742e0, .rodata, ov_SC03_101_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x74300, data, tail16] + - [0x74300, data, tail17] - [0x74380, .rodata, ov_SC03_101_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x74394, data, tail17] + - [0x74394, data, tail18] - [0x7453c, .rodata, ov_SC03_101_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x746b4, data, tail18] + - [0x746b4, data, tail19] - [0x74744, .rodata, ov_SC03_101_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x747d0, data, tail19] + - [0x747d0, data, tail20] - [0x747d4, .rodata, ov_SC03_101_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x747e8, .rodata, ov_SC03_101_jr_8017CA80] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x74808, data, tail20] + - [0x74808, data, tail21] - [0x760CC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x760CF] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_102.yaml b/config/splat.ov_SC03_102.yaml index d3d0f4e08..82ccfcbd5 100644 --- a/config/splat.ov_SC03_102.yaml +++ b/config/splat.ov_SC03_102.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_102_jr_8017AE2C] - [0x53d64, c, ov_SC03_102_jr_8017BEBC] - [0x5dfdc, data, tail] + - [0x8f330, .rodata, ov_SC03_102] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x8f344, data, tail2] - [0x8f40c, .rodata, ov_SC03_102_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f4ec, data, tail2] + - [0x8f4ec, data, tail3] - [0x8f504, .rodata, ov_SC03_102_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f518, data, tail3] + - [0x8f518, data, tail4] - [0x8f51c, .rodata, ov_SC03_102_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f530, data, tail4] + - [0x8f530, data, tail5] - [0x8f534, .rodata, ov_SC03_102_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f548, data, tail5] + - [0x8f548, data, tail6] - [0x8f584, .rodata, ov_SC03_102_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f5e8, data, tail6] + - [0x8f5e8, data, tail7] - [0x8fbf4, .rodata, ov_SC03_102_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fc28, data, tail7] + - [0x8fc28, data, tail8] - [0x8fc2c, .rodata, ov_SC03_102_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fc60, data, tail8] + - [0x8fc60, data, tail9] - [0x8fc9c, .rodata, ov_SC03_102_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fcb0, data, tail9] + - [0x8fcb0, data, tail10] - [0x8fcc8, .rodata, ov_SC03_102_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fd34, data, tail10] + - [0x8fd34, data, tail11] - [0x8fda4, .rodata, ov_SC03_102_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x8fde8, .rodata, ov_SC03_102_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fe30, data, tail11] + - [0x8fe30, data, tail12] - [0x8fe90, .rodata, ov_SC03_102_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fec4, data, tail12] + - [0x8fec4, data, tail13] - [0x8fec8, .rodata, ov_SC03_102_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fee4, data, tail13] + - [0x8fee4, data, tail14] - [0x8fee8, .rodata, ov_SC03_102_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8ff04, data, tail14] + - [0x8ff04, data, tail15] - [0x8ff28, .rodata, ov_SC03_102_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8ff44, data, tail15] + - [0x8ff44, data, tail16] - [0x8ff5c, .rodata, ov_SC03_102_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8ff7c, data, tail16] + - [0x8ff7c, data, tail17] - [0x8fffc, .rodata, ov_SC03_102_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x90010, data, tail17] + - [0x90010, data, tail18] - [0x901b8, .rodata, ov_SC03_102_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x90330, data, tail18] + - [0x90330, data, tail19] - [0x903c0, .rodata, ov_SC03_102_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9044c, data, tail19] + - [0x9044c, data, tail20] - [0x90450, .rodata, ov_SC03_102_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x90464, .rodata, ov_SC03_102_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x90484, data, tail20] + - [0x90484, data, tail21] - [0x91ACC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x91ACF] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_103.yaml b/config/splat.ov_SC03_103.yaml index 17ad4fa41..0e7ad424a 100644 --- a/config/splat.ov_SC03_103.yaml +++ b/config/splat.ov_SC03_103.yaml @@ -117,44 +117,46 @@ segments: - [0x52cd4, c, ov_SC03_103_jr_8017AE2C] - [0x5413c, c, ov_SC03_103_jr_8017C294] - [0x5bf8c, data, tail] + - [0x9a4e4, .rodata, ov_SC03_103] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x9a4f8, data, tail2] - [0x9a5c0, .rodata, ov_SC03_103_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9a6a0, data, tail2] + - [0x9a6a0, data, tail3] - [0x9a6b8, .rodata, ov_SC03_103_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9a6cc, data, tail3] + - [0x9a6cc, data, tail4] - [0x9a6d0, .rodata, ov_SC03_103_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9a6e4, data, tail4] + - [0x9a6e4, data, tail5] - [0x9a6e8, .rodata, ov_SC03_103_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9a6fc, data, tail5] + - [0x9a6fc, data, tail6] - [0x9a738, .rodata, ov_SC03_103_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9a79c, data, tail6] + - [0x9a79c, data, tail7] - [0x9ada8, .rodata, ov_SC03_103_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9addc, data, tail7] + - [0x9addc, data, tail8] - [0x9ae50, .rodata, ov_SC03_103_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ae64, data, tail8] + - [0x9ae64, data, tail9] - [0x9ae7c, .rodata, ov_SC03_103_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9aee8, data, tail9] + - [0x9aee8, data, tail10] - [0x9af58, .rodata, ov_SC03_103_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9af9c, .rodata, ov_SC03_103_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9afe4, data, tail10] + - [0x9afe4, data, tail11] - [0x9b044, .rodata, ov_SC03_103_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b078, data, tail11] + - [0x9b078, data, tail12] - [0x9b07c, .rodata, ov_SC03_103_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b098, data, tail12] + - [0x9b098, data, tail13] - [0x9b09c, .rodata, ov_SC03_103_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b0b8, data, tail13] + - [0x9b0b8, data, tail14] - [0x9b0dc, .rodata, ov_SC03_103_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b0f8, data, tail14] + - [0x9b0f8, data, tail15] - [0x9b110, .rodata, ov_SC03_103_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b130, data, tail15] + - [0x9b130, data, tail16] - [0x9b1b0, .rodata, ov_SC03_103_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b1c4, data, tail16] + - [0x9b1c4, data, tail17] - [0x9b36c, .rodata, ov_SC03_103_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b4e4, data, tail17] + - [0x9b4e4, data, tail18] - [0x9b574, .rodata, ov_SC03_103_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b600, data, tail18] + - [0x9b600, data, tail19] - [0x9b604, .rodata, ov_SC03_103_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9b618, .rodata, ov_SC03_103_jr_8017C294] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9b638, data, tail19] + - [0x9b638, data, tail20] - [0x9CC7C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x9CC7F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_104.yaml b/config/splat.ov_SC03_104.yaml index 2c027a0c2..111763fc3 100644 --- a/config/splat.ov_SC03_104.yaml +++ b/config/splat.ov_SC03_104.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_104_jr_8017AE2C] - [0x54928, c, ov_SC03_104_jr_8017CA80] - [0x62b1c, data, tail] + - [0x95a44, .rodata, ov_SC03_104] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x95a58, data, tail2] - [0x95b20, .rodata, ov_SC03_104_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x95c00, data, tail2] + - [0x95c00, data, tail3] - [0x95c18, .rodata, ov_SC03_104_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x95c2c, data, tail3] + - [0x95c2c, data, tail4] - [0x95c30, .rodata, ov_SC03_104_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x95c44, data, tail4] + - [0x95c44, data, tail5] - [0x95c48, .rodata, ov_SC03_104_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x95c5c, data, tail5] + - [0x95c5c, data, tail6] - [0x95c98, .rodata, ov_SC03_104_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x95cfc, data, tail6] + - [0x95cfc, data, tail7] - [0x96308, .rodata, ov_SC03_104_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9633c, data, tail7] + - [0x9633c, data, tail8] - [0x96340, .rodata, ov_SC03_104_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96374, data, tail8] + - [0x96374, data, tail9] - [0x963b0, .rodata, ov_SC03_104_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x963c4, data, tail9] + - [0x963c4, data, tail10] - [0x963dc, .rodata, ov_SC03_104_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96448, data, tail10] + - [0x96448, data, tail11] - [0x964b8, .rodata, ov_SC03_104_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x964fc, .rodata, ov_SC03_104_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96544, data, tail11] + - [0x96544, data, tail12] - [0x965a4, .rodata, ov_SC03_104_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x965d8, data, tail12] + - [0x965d8, data, tail13] - [0x965dc, .rodata, ov_SC03_104_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x965f8, data, tail13] + - [0x965f8, data, tail14] - [0x965fc, .rodata, ov_SC03_104_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96618, data, tail14] + - [0x96618, data, tail15] - [0x9663c, .rodata, ov_SC03_104_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96658, data, tail15] + - [0x96658, data, tail16] - [0x96670, .rodata, ov_SC03_104_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96690, data, tail16] + - [0x96690, data, tail17] - [0x96710, .rodata, ov_SC03_104_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96724, data, tail17] + - [0x96724, data, tail18] - [0x968cc, .rodata, ov_SC03_104_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96a44, data, tail18] + - [0x96a44, data, tail19] - [0x96ad4, .rodata, ov_SC03_104_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96b60, data, tail19] + - [0x96b60, data, tail20] - [0x96b64, .rodata, ov_SC03_104_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x96b78, .rodata, ov_SC03_104_jr_8017CA80] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96b98, data, tail20] + - [0x96b98, data, tail21] - [0x9833C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x9833F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_105.yaml b/config/splat.ov_SC03_105.yaml index da79d1624..136fb1fdd 100644 --- a/config/splat.ov_SC03_105.yaml +++ b/config/splat.ov_SC03_105.yaml @@ -118,47 +118,49 @@ segments: - [0x52cd4, c, ov_SC03_105_jr_8017AE2C] - [0x54778, c, ov_SC03_105_jr_8017C8D0] - [0x621a4, data, tail] + - [0x8ed3c, .rodata, ov_SC03_105] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x8ed50, data, tail2] - [0x8ee18, .rodata, ov_SC03_105_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8eef8, data, tail2] + - [0x8eef8, data, tail3] - [0x8ef10, .rodata, ov_SC03_105_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8ef24, data, tail3] + - [0x8ef24, data, tail4] - [0x8ef28, .rodata, ov_SC03_105_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8ef3c, data, tail4] + - [0x8ef3c, data, tail5] - [0x8ef40, .rodata, ov_SC03_105_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8ef54, data, tail5] + - [0x8ef54, data, tail6] - [0x8ef90, .rodata, ov_SC03_105_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8eff4, data, tail6] + - [0x8eff4, data, tail7] - [0x8f600, .rodata, ov_SC03_105_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f634, data, tail7] + - [0x8f634, data, tail8] - [0x8f638, .rodata, ov_SC03_105_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f66c, data, tail8] + - [0x8f66c, data, tail9] - [0x8f6a8, .rodata, ov_SC03_105_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f6bc, data, tail9] + - [0x8f6bc, data, tail10] - [0x8f6d4, .rodata, ov_SC03_105_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f740, data, tail10] + - [0x8f740, data, tail11] - [0x8f7b0, .rodata, ov_SC03_105_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x8f7f4, .rodata, ov_SC03_105_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f83c, data, tail11] + - [0x8f83c, data, tail12] - [0x8f89c, .rodata, ov_SC03_105_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f8d0, data, tail12] + - [0x8f8d0, data, tail13] - [0x8f8d4, .rodata, ov_SC03_105_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f8f0, data, tail13] + - [0x8f8f0, data, tail14] - [0x8f8f4, .rodata, ov_SC03_105_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f910, data, tail14] + - [0x8f910, data, tail15] - [0x8f934, .rodata, ov_SC03_105_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f950, data, tail15] + - [0x8f950, data, tail16] - [0x8f968, .rodata, ov_SC03_105_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f988, data, tail16] + - [0x8f988, data, tail17] - [0x8fa08, .rodata, ov_SC03_105_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fa1c, data, tail17] + - [0x8fa1c, data, tail18] - [0x8fbc4, .rodata, ov_SC03_105_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fd3c, data, tail18] + - [0x8fd3c, data, tail19] - [0x8fdcc, .rodata, ov_SC03_105_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fe58, data, tail19] + - [0x8fe58, data, tail20] - [0x8fe5c, .rodata, ov_SC03_105_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fe70, data, tail20] + - [0x8fe70, data, tail21] - [0x8ffa8, .rodata, ov_SC03_105_jr_8017C8D0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8ffc8, data, tail21] + - [0x8ffc8, data, tail22] - [0x94BC4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x94BC7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_108.yaml b/config/splat.ov_SC03_108.yaml index c9432810f..2b8015f11 100644 --- a/config/splat.ov_SC03_108.yaml +++ b/config/splat.ov_SC03_108.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_108_jr_8017AE2C] - [0x53d64, c, ov_SC03_108_jr_8017BEBC] - [0x58afc, data, tail] + - [0x77244, .rodata, ov_SC03_108] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x77258, data, tail2] - [0x77320, .rodata, ov_SC03_108_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77400, data, tail2] + - [0x77400, data, tail3] - [0x77418, .rodata, ov_SC03_108_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7742c, data, tail3] + - [0x7742c, data, tail4] - [0x77430, .rodata, ov_SC03_108_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77444, data, tail4] + - [0x77444, data, tail5] - [0x77448, .rodata, ov_SC03_108_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7745c, data, tail5] + - [0x7745c, data, tail6] - [0x77498, .rodata, ov_SC03_108_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x774fc, data, tail6] + - [0x774fc, data, tail7] - [0x77b08, .rodata, ov_SC03_108_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77b3c, data, tail7] + - [0x77b3c, data, tail8] - [0x77b40, .rodata, ov_SC03_108_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77b74, data, tail8] + - [0x77b74, data, tail9] - [0x77bb0, .rodata, ov_SC03_108_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77bc4, data, tail9] + - [0x77bc4, data, tail10] - [0x77bdc, .rodata, ov_SC03_108_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77c48, data, tail10] + - [0x77c48, data, tail11] - [0x77cb8, .rodata, ov_SC03_108_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x77cfc, .rodata, ov_SC03_108_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77d44, data, tail11] + - [0x77d44, data, tail12] - [0x77da4, .rodata, ov_SC03_108_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77dd8, data, tail12] + - [0x77dd8, data, tail13] - [0x77ddc, .rodata, ov_SC03_108_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77df8, data, tail13] + - [0x77df8, data, tail14] - [0x77dfc, .rodata, ov_SC03_108_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77e18, data, tail14] + - [0x77e18, data, tail15] - [0x77e3c, .rodata, ov_SC03_108_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77e58, data, tail15] + - [0x77e58, data, tail16] - [0x77e70, .rodata, ov_SC03_108_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77e90, data, tail16] + - [0x77e90, data, tail17] - [0x77f10, .rodata, ov_SC03_108_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77f24, data, tail17] + - [0x77f24, data, tail18] - [0x780cc, .rodata, ov_SC03_108_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78244, data, tail18] + - [0x78244, data, tail19] - [0x782d4, .rodata, ov_SC03_108_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78360, data, tail19] + - [0x78360, data, tail20] - [0x78364, .rodata, ov_SC03_108_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x78378, .rodata, ov_SC03_108_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78398, data, tail20] + - [0x78398, data, tail21] - [0x7994C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x7994F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_109.yaml b/config/splat.ov_SC03_109.yaml index 473ea3e09..efc960669 100644 --- a/config/splat.ov_SC03_109.yaml +++ b/config/splat.ov_SC03_109.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_109_jr_8017AE2C] - [0x54028, c, ov_SC03_109_jr_8017C180] - [0x561a8, data, tail] + - [0x6fd54, .rodata, ov_SC03_109] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x6fd68, data, tail2] - [0x6fe30, .rodata, ov_SC03_109_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6ff10, data, tail2] + - [0x6ff10, data, tail3] - [0x6ff28, .rodata, ov_SC03_109_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6ff3c, data, tail3] + - [0x6ff3c, data, tail4] - [0x6ff40, .rodata, ov_SC03_109_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6ff54, data, tail4] + - [0x6ff54, data, tail5] - [0x6ff58, .rodata, ov_SC03_109_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6ff6c, data, tail5] + - [0x6ff6c, data, tail6] - [0x6ffa8, .rodata, ov_SC03_109_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7000c, data, tail6] + - [0x7000c, data, tail7] - [0x70618, .rodata, ov_SC03_109_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7064c, data, tail7] + - [0x7064c, data, tail8] - [0x70650, .rodata, ov_SC03_109_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70684, data, tail8] + - [0x70684, data, tail9] - [0x706c0, .rodata, ov_SC03_109_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x706d4, data, tail9] + - [0x706d4, data, tail10] - [0x706ec, .rodata, ov_SC03_109_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70758, data, tail10] + - [0x70758, data, tail11] - [0x707c8, .rodata, ov_SC03_109_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x7080c, .rodata, ov_SC03_109_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70854, data, tail11] + - [0x70854, data, tail12] - [0x708b4, .rodata, ov_SC03_109_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x708e8, data, tail12] + - [0x708e8, data, tail13] - [0x708ec, .rodata, ov_SC03_109_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70908, data, tail13] + - [0x70908, data, tail14] - [0x7090c, .rodata, ov_SC03_109_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70928, data, tail14] + - [0x70928, data, tail15] - [0x7094c, .rodata, ov_SC03_109_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70968, data, tail15] + - [0x70968, data, tail16] - [0x70980, .rodata, ov_SC03_109_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x709a0, data, tail16] + - [0x709a0, data, tail17] - [0x70a20, .rodata, ov_SC03_109_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70a34, data, tail17] + - [0x70a34, data, tail18] - [0x70bdc, .rodata, ov_SC03_109_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70d54, data, tail18] + - [0x70d54, data, tail19] - [0x70de4, .rodata, ov_SC03_109_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70e70, data, tail19] + - [0x70e70, data, tail20] - [0x70e74, .rodata, ov_SC03_109_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x70e88, .rodata, ov_SC03_109_jr_8017C180] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x70ea8, data, tail20] + - [0x70ea8, data, tail21] - [0x72354, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x72357] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_110.yaml b/config/splat.ov_SC03_110.yaml index 277ac306e..b8c58dc6c 100644 --- a/config/splat.ov_SC03_110.yaml +++ b/config/splat.ov_SC03_110.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_110_jr_8017AE2C] - [0x55740, c, ov_SC03_110_jr_8017D898] - [0x59bc8, data, tail] + - [0x779f0, .rodata, ov_SC03_110] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x77a04, data, tail2] - [0x77acc, .rodata, ov_SC03_110_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77bac, data, tail2] + - [0x77bac, data, tail3] - [0x77bc4, .rodata, ov_SC03_110_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77bd8, data, tail3] + - [0x77bd8, data, tail4] - [0x77bdc, .rodata, ov_SC03_110_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77bf0, data, tail4] + - [0x77bf0, data, tail5] - [0x77bf4, .rodata, ov_SC03_110_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77c08, data, tail5] + - [0x77c08, data, tail6] - [0x77c44, .rodata, ov_SC03_110_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x77ca8, data, tail6] + - [0x77ca8, data, tail7] - [0x782b4, .rodata, ov_SC03_110_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x782e8, data, tail7] + - [0x782e8, data, tail8] - [0x782ec, .rodata, ov_SC03_110_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78320, data, tail8] + - [0x78320, data, tail9] - [0x7835c, .rodata, ov_SC03_110_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78370, data, tail9] + - [0x78370, data, tail10] - [0x78388, .rodata, ov_SC03_110_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x783f4, data, tail10] + - [0x783f4, data, tail11] - [0x78464, .rodata, ov_SC03_110_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x784a8, .rodata, ov_SC03_110_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x784f0, data, tail11] + - [0x784f0, data, tail12] - [0x78550, .rodata, ov_SC03_110_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78584, data, tail12] + - [0x78584, data, tail13] - [0x78588, .rodata, ov_SC03_110_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x785a4, data, tail13] + - [0x785a4, data, tail14] - [0x785a8, .rodata, ov_SC03_110_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x785c4, data, tail14] + - [0x785c4, data, tail15] - [0x785e8, .rodata, ov_SC03_110_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78604, data, tail15] + - [0x78604, data, tail16] - [0x7861c, .rodata, ov_SC03_110_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7863c, data, tail16] + - [0x7863c, data, tail17] - [0x786bc, .rodata, ov_SC03_110_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x786d0, data, tail17] + - [0x786d0, data, tail18] - [0x78878, .rodata, ov_SC03_110_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x789f0, data, tail18] + - [0x789f0, data, tail19] - [0x78a80, .rodata, ov_SC03_110_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78b0c, data, tail19] + - [0x78b0c, data, tail20] - [0x78b10, .rodata, ov_SC03_110_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x78b24, .rodata, ov_SC03_110_jr_8017D898] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x78b44, data, tail20] + - [0x78b44, data, tail21] - [0x7A384, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x7A387] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_111.yaml b/config/splat.ov_SC03_111.yaml index 0d866e6b9..f91b1d0cc 100644 --- a/config/splat.ov_SC03_111.yaml +++ b/config/splat.ov_SC03_111.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_111_jr_8017AE2C] - [0x56b00, c, ov_SC03_111_jr_8017EC58] - [0x5c77c, data, tail] + - [0x8ef70, .rodata, ov_SC03_111] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x8ef84, data, tail2] - [0x8f04c, .rodata, ov_SC03_111_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f12c, data, tail2] + - [0x8f12c, data, tail3] - [0x8f144, .rodata, ov_SC03_111_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f158, data, tail3] + - [0x8f158, data, tail4] - [0x8f15c, .rodata, ov_SC03_111_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f170, data, tail4] + - [0x8f170, data, tail5] - [0x8f174, .rodata, ov_SC03_111_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f188, data, tail5] + - [0x8f188, data, tail6] - [0x8f1c4, .rodata, ov_SC03_111_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f228, data, tail6] + - [0x8f228, data, tail7] - [0x8f834, .rodata, ov_SC03_111_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f868, data, tail7] + - [0x8f868, data, tail8] - [0x8f86c, .rodata, ov_SC03_111_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f8a0, data, tail8] + - [0x8f8a0, data, tail9] - [0x8f8dc, .rodata, ov_SC03_111_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f8f0, data, tail9] + - [0x8f8f0, data, tail10] - [0x8f908, .rodata, ov_SC03_111_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8f974, data, tail10] + - [0x8f974, data, tail11] - [0x8f9e4, .rodata, ov_SC03_111_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x8fa28, .rodata, ov_SC03_111_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fa70, data, tail11] + - [0x8fa70, data, tail12] - [0x8fad0, .rodata, ov_SC03_111_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fb04, data, tail12] + - [0x8fb04, data, tail13] - [0x8fb08, .rodata, ov_SC03_111_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fb24, data, tail13] + - [0x8fb24, data, tail14] - [0x8fb28, .rodata, ov_SC03_111_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fb44, data, tail14] + - [0x8fb44, data, tail15] - [0x8fb68, .rodata, ov_SC03_111_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fb84, data, tail15] + - [0x8fb84, data, tail16] - [0x8fb9c, .rodata, ov_SC03_111_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fbbc, data, tail16] + - [0x8fbbc, data, tail17] - [0x8fc3c, .rodata, ov_SC03_111_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8fc50, data, tail17] + - [0x8fc50, data, tail18] - [0x8fdf8, .rodata, ov_SC03_111_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8ff70, data, tail18] + - [0x8ff70, data, tail19] - [0x90000, .rodata, ov_SC03_111_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9008c, data, tail19] + - [0x9008c, data, tail20] - [0x90090, .rodata, ov_SC03_111_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x900a4, .rodata, ov_SC03_111_jr_8017EC58] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x900c4, data, tail20] + - [0x900c4, data, tail21] - [0x91A2C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x91A2F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_112.yaml b/config/splat.ov_SC03_112.yaml index d18511168..f1892c38c 100644 --- a/config/splat.ov_SC03_112.yaml +++ b/config/splat.ov_SC03_112.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_112_jr_8017AE2C] - [0x5413c, c, ov_SC03_112_jr_8017C294] - [0x5d584, data, tail] + - [0x826d8, .rodata, ov_SC03_112] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x826ec, data, tail2] - [0x827b4, .rodata, ov_SC03_112_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x82894, data, tail2] + - [0x82894, data, tail3] - [0x828ac, .rodata, ov_SC03_112_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x828c0, data, tail3] + - [0x828c0, data, tail4] - [0x828c4, .rodata, ov_SC03_112_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x828d8, data, tail4] + - [0x828d8, data, tail5] - [0x828dc, .rodata, ov_SC03_112_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x828f0, data, tail5] + - [0x828f0, data, tail6] - [0x8292c, .rodata, ov_SC03_112_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x82990, data, tail6] + - [0x82990, data, tail7] - [0x82f9c, .rodata, ov_SC03_112_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x82fd0, data, tail7] + - [0x82fd0, data, tail8] - [0x82fd4, .rodata, ov_SC03_112_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x83008, data, tail8] + - [0x83008, data, tail9] - [0x83044, .rodata, ov_SC03_112_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x83058, data, tail9] + - [0x83058, data, tail10] - [0x83070, .rodata, ov_SC03_112_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x830dc, data, tail10] + - [0x830dc, data, tail11] - [0x8314c, .rodata, ov_SC03_112_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x83190, .rodata, ov_SC03_112_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x831d8, data, tail11] + - [0x831d8, data, tail12] - [0x83238, .rodata, ov_SC03_112_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8326c, data, tail12] + - [0x8326c, data, tail13] - [0x83270, .rodata, ov_SC03_112_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8328c, data, tail13] + - [0x8328c, data, tail14] - [0x83290, .rodata, ov_SC03_112_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x832ac, data, tail14] + - [0x832ac, data, tail15] - [0x832d0, .rodata, ov_SC03_112_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x832ec, data, tail15] + - [0x832ec, data, tail16] - [0x83304, .rodata, ov_SC03_112_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x83324, data, tail16] + - [0x83324, data, tail17] - [0x833a4, .rodata, ov_SC03_112_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x833b8, data, tail17] + - [0x833b8, data, tail18] - [0x83560, .rodata, ov_SC03_112_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x836d8, data, tail18] + - [0x836d8, data, tail19] - [0x83768, .rodata, ov_SC03_112_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x837f4, data, tail19] + - [0x837f4, data, tail20] - [0x837f8, .rodata, ov_SC03_112_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x8380c, .rodata, ov_SC03_112_jr_8017C294] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8382c, data, tail20] + - [0x8382c, data, tail21] - [0x84FF4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x84FF7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_113.yaml b/config/splat.ov_SC03_113.yaml index 3822d54bf..466b4c6e7 100644 --- a/config/splat.ov_SC03_113.yaml +++ b/config/splat.ov_SC03_113.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_113_jr_8017AE2C] - [0x5413c, c, ov_SC03_113_jr_8017C294] - [0x5ac34, data, tail] + - [0x7b360, .rodata, ov_SC03_113] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x7b374, data, tail2] - [0x7b43c, .rodata, ov_SC03_113_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7b51c, data, tail2] + - [0x7b51c, data, tail3] - [0x7b534, .rodata, ov_SC03_113_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7b548, data, tail3] + - [0x7b548, data, tail4] - [0x7b54c, .rodata, ov_SC03_113_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7b560, data, tail4] + - [0x7b560, data, tail5] - [0x7b564, .rodata, ov_SC03_113_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7b578, data, tail5] + - [0x7b578, data, tail6] - [0x7b5b4, .rodata, ov_SC03_113_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7b618, data, tail6] + - [0x7b618, data, tail7] - [0x7bc24, .rodata, ov_SC03_113_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7bc58, data, tail7] + - [0x7bc58, data, tail8] - [0x7bc5c, .rodata, ov_SC03_113_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7bc90, data, tail8] + - [0x7bc90, data, tail9] - [0x7bccc, .rodata, ov_SC03_113_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7bce0, data, tail9] + - [0x7bce0, data, tail10] - [0x7bcf8, .rodata, ov_SC03_113_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7bd64, data, tail10] + - [0x7bd64, data, tail11] - [0x7bdd4, .rodata, ov_SC03_113_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x7be18, .rodata, ov_SC03_113_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7be60, data, tail11] + - [0x7be60, data, tail12] - [0x7bec0, .rodata, ov_SC03_113_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7bef4, data, tail12] + - [0x7bef4, data, tail13] - [0x7bef8, .rodata, ov_SC03_113_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7bf14, data, tail13] + - [0x7bf14, data, tail14] - [0x7bf18, .rodata, ov_SC03_113_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7bf34, data, tail14] + - [0x7bf34, data, tail15] - [0x7bf58, .rodata, ov_SC03_113_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7bf74, data, tail15] + - [0x7bf74, data, tail16] - [0x7bf8c, .rodata, ov_SC03_113_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7bfac, data, tail16] + - [0x7bfac, data, tail17] - [0x7c02c, .rodata, ov_SC03_113_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7c040, data, tail17] + - [0x7c040, data, tail18] - [0x7c1e8, .rodata, ov_SC03_113_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7c360, data, tail18] + - [0x7c360, data, tail19] - [0x7c3f0, .rodata, ov_SC03_113_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7c47c, data, tail19] + - [0x7c47c, data, tail20] - [0x7c480, .rodata, ov_SC03_113_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x7c494, .rodata, ov_SC03_113_jr_8017C294] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7c4b4, data, tail20] + - [0x7c4b4, data, tail21] - [0x7DB94, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x7DB97] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_114.yaml b/config/splat.ov_SC03_114.yaml index 91cc86fc7..6ce203b6b 100644 --- a/config/splat.ov_SC03_114.yaml +++ b/config/splat.ov_SC03_114.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_114_jr_8017AE2C] - [0x53d64, c, ov_SC03_114_jr_8017BEBC] - [0x5689c, data, tail] + - [0x7f06c, .rodata, ov_SC03_114] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x7f080, data, tail2] - [0x7f148, .rodata, ov_SC03_114_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7f228, data, tail2] + - [0x7f228, data, tail3] - [0x7f240, .rodata, ov_SC03_114_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7f254, data, tail3] + - [0x7f254, data, tail4] - [0x7f258, .rodata, ov_SC03_114_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7f26c, data, tail4] + - [0x7f26c, data, tail5] - [0x7f270, .rodata, ov_SC03_114_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7f284, data, tail5] + - [0x7f284, data, tail6] - [0x7f2c0, .rodata, ov_SC03_114_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7f324, data, tail6] + - [0x7f324, data, tail7] - [0x7f930, .rodata, ov_SC03_114_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7f964, data, tail7] + - [0x7f964, data, tail8] - [0x7f968, .rodata, ov_SC03_114_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7f99c, data, tail8] + - [0x7f99c, data, tail9] - [0x7f9d8, .rodata, ov_SC03_114_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7f9ec, data, tail9] + - [0x7f9ec, data, tail10] - [0x7fa04, .rodata, ov_SC03_114_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7fa70, data, tail10] + - [0x7fa70, data, tail11] - [0x7fae0, .rodata, ov_SC03_114_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x7fb24, .rodata, ov_SC03_114_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7fb6c, data, tail11] + - [0x7fb6c, data, tail12] - [0x7fbcc, .rodata, ov_SC03_114_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7fc00, data, tail12] + - [0x7fc00, data, tail13] - [0x7fc04, .rodata, ov_SC03_114_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7fc20, data, tail13] + - [0x7fc20, data, tail14] - [0x7fc24, .rodata, ov_SC03_114_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7fc40, data, tail14] + - [0x7fc40, data, tail15] - [0x7fc64, .rodata, ov_SC03_114_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7fc80, data, tail15] + - [0x7fc80, data, tail16] - [0x7fc98, .rodata, ov_SC03_114_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7fcb8, data, tail16] + - [0x7fcb8, data, tail17] - [0x7fd38, .rodata, ov_SC03_114_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7fd4c, data, tail17] + - [0x7fd4c, data, tail18] - [0x7fef4, .rodata, ov_SC03_114_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8006c, data, tail18] + - [0x8006c, data, tail19] - [0x800fc, .rodata, ov_SC03_114_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80188, data, tail19] + - [0x80188, data, tail20] - [0x8018c, .rodata, ov_SC03_114_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x801a0, .rodata, ov_SC03_114_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x801c0, data, tail20] + - [0x801c0, data, tail21] - [0x8170C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x8170F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_115.yaml b/config/splat.ov_SC03_115.yaml index 6b39939c3..3a33e581a 100644 --- a/config/splat.ov_SC03_115.yaml +++ b/config/splat.ov_SC03_115.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_115_jr_8017AE2C] - [0x53d64, c, ov_SC03_115_jr_8017BEBC] - [0x58308, data, tail] + - [0x6a9e0, .rodata, ov_SC03_115] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x6a9f4, data, tail2] - [0x6aabc, .rodata, ov_SC03_115_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6ab9c, data, tail2] + - [0x6ab9c, data, tail3] - [0x6abb4, .rodata, ov_SC03_115_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6abc8, data, tail3] + - [0x6abc8, data, tail4] - [0x6abcc, .rodata, ov_SC03_115_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6abe0, data, tail4] + - [0x6abe0, data, tail5] - [0x6abe4, .rodata, ov_SC03_115_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6abf8, data, tail5] + - [0x6abf8, data, tail6] - [0x6ac34, .rodata, ov_SC03_115_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6ac98, data, tail6] + - [0x6ac98, data, tail7] - [0x6b2a4, .rodata, ov_SC03_115_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b2d8, data, tail7] + - [0x6b2d8, data, tail8] - [0x6b2dc, .rodata, ov_SC03_115_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b310, data, tail8] + - [0x6b310, data, tail9] - [0x6b34c, .rodata, ov_SC03_115_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b360, data, tail9] + - [0x6b360, data, tail10] - [0x6b378, .rodata, ov_SC03_115_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b3e4, data, tail10] + - [0x6b3e4, data, tail11] - [0x6b454, .rodata, ov_SC03_115_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x6b498, .rodata, ov_SC03_115_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b4e0, data, tail11] + - [0x6b4e0, data, tail12] - [0x6b540, .rodata, ov_SC03_115_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b574, data, tail12] + - [0x6b574, data, tail13] - [0x6b578, .rodata, ov_SC03_115_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b594, data, tail13] + - [0x6b594, data, tail14] - [0x6b598, .rodata, ov_SC03_115_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b5b4, data, tail14] + - [0x6b5b4, data, tail15] - [0x6b5d8, .rodata, ov_SC03_115_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b5f4, data, tail15] + - [0x6b5f4, data, tail16] - [0x6b60c, .rodata, ov_SC03_115_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b62c, data, tail16] + - [0x6b62c, data, tail17] - [0x6b6ac, .rodata, ov_SC03_115_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b6c0, data, tail17] + - [0x6b6c0, data, tail18] - [0x6b868, .rodata, ov_SC03_115_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6b9e0, data, tail18] + - [0x6b9e0, data, tail19] - [0x6ba70, .rodata, ov_SC03_115_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6bafc, data, tail19] + - [0x6bafc, data, tail20] - [0x6bb00, .rodata, ov_SC03_115_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x6bb14, .rodata, ov_SC03_115_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6bb34, data, tail20] + - [0x6bb34, data, tail21] - [0x6CFE4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x6CFE7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_116.yaml b/config/splat.ov_SC03_116.yaml index 818f4d2c2..87e8a6a5a 100644 --- a/config/splat.ov_SC03_116.yaml +++ b/config/splat.ov_SC03_116.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC03_116_jr_8017A4AC] - [0x52cd4, c, ov_SC03_116_jr_8017AE2C] - [0x5a70c, data, tail] + - [0x6d57c, .rodata, ov_SC03_116] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x6d590, data, tail2] - [0x6d658, .rodata, ov_SC03_116_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6d738, data, tail2] + - [0x6d738, data, tail3] - [0x6d750, .rodata, ov_SC03_116_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6d764, data, tail3] + - [0x6d764, data, tail4] - [0x6d768, .rodata, ov_SC03_116_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6d77c, data, tail4] + - [0x6d77c, data, tail5] - [0x6d780, .rodata, ov_SC03_116_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6d794, data, tail5] + - [0x6d794, data, tail6] - [0x6d7d0, .rodata, ov_SC03_116_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6d834, data, tail6] + - [0x6d834, data, tail7] - [0x6de40, .rodata, ov_SC03_116_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6de74, data, tail7] + - [0x6de74, data, tail8] - [0x6de78, .rodata, ov_SC03_116_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6deac, data, tail8] + - [0x6deac, data, tail9] - [0x6dee8, .rodata, ov_SC03_116_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6defc, data, tail9] + - [0x6defc, data, tail10] - [0x6df14, .rodata, ov_SC03_116_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6df80, data, tail10] + - [0x6df80, data, tail11] - [0x6dff0, .rodata, ov_SC03_116_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x6e034, .rodata, ov_SC03_116_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e07c, data, tail11] + - [0x6e07c, data, tail12] - [0x6e0dc, .rodata, ov_SC03_116_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e110, data, tail12] + - [0x6e110, data, tail13] - [0x6e114, .rodata, ov_SC03_116_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e130, data, tail13] + - [0x6e130, data, tail14] - [0x6e134, .rodata, ov_SC03_116_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e150, data, tail14] + - [0x6e150, data, tail15] - [0x6e174, .rodata, ov_SC03_116_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e190, data, tail15] + - [0x6e190, data, tail16] - [0x6e1a8, .rodata, ov_SC03_116_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e1c8, data, tail16] + - [0x6e1c8, data, tail17] - [0x6e248, .rodata, ov_SC03_116_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e25c, data, tail17] + - [0x6e25c, data, tail18] - [0x6e404, .rodata, ov_SC03_116_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e57c, data, tail18] + - [0x6e57c, data, tail19] - [0x6e60c, .rodata, ov_SC03_116_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e698, data, tail19] + - [0x6e698, data, tail20] - [0x6e69c, .rodata, ov_SC03_116_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e6b0, data, tail20] + - [0x6e6b0, data, tail21] - [0x6FBF4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x6FBF7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_117.yaml b/config/splat.ov_SC03_117.yaml index 761c14224..0125c05d0 100644 --- a/config/splat.ov_SC03_117.yaml +++ b/config/splat.ov_SC03_117.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_117_jr_8017AE2C] - [0x53d64, c, ov_SC03_117_jr_8017BEBC] - [0x5c718, data, tail] + - [0xa3c1c, .rodata, ov_SC03_117] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xa3c30, data, tail2] - [0xa3cf8, .rodata, ov_SC03_117_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3dd8, data, tail2] + - [0xa3dd8, data, tail3] - [0xa3df0, .rodata, ov_SC03_117_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3e04, data, tail3] + - [0xa3e04, data, tail4] - [0xa3e08, .rodata, ov_SC03_117_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3e1c, data, tail4] + - [0xa3e1c, data, tail5] - [0xa3e20, .rodata, ov_SC03_117_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3e34, data, tail5] + - [0xa3e34, data, tail6] - [0xa3e70, .rodata, ov_SC03_117_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa3ed4, data, tail6] + - [0xa3ed4, data, tail7] - [0xa44e0, .rodata, ov_SC03_117_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa4514, data, tail7] + - [0xa4514, data, tail8] - [0xa4518, .rodata, ov_SC03_117_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa454c, data, tail8] + - [0xa454c, data, tail9] - [0xa4588, .rodata, ov_SC03_117_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa459c, data, tail9] + - [0xa459c, data, tail10] - [0xa45b4, .rodata, ov_SC03_117_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa4620, data, tail10] + - [0xa4620, data, tail11] - [0xa4690, .rodata, ov_SC03_117_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa46d4, .rodata, ov_SC03_117_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa471c, data, tail11] + - [0xa471c, data, tail12] - [0xa477c, .rodata, ov_SC03_117_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa47b0, data, tail12] + - [0xa47b0, data, tail13] - [0xa47b4, .rodata, ov_SC03_117_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa47d0, data, tail13] + - [0xa47d0, data, tail14] - [0xa47d4, .rodata, ov_SC03_117_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa47f0, data, tail14] + - [0xa47f0, data, tail15] - [0xa4814, .rodata, ov_SC03_117_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa4830, data, tail15] + - [0xa4830, data, tail16] - [0xa4848, .rodata, ov_SC03_117_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa4868, data, tail16] + - [0xa4868, data, tail17] - [0xa48e8, .rodata, ov_SC03_117_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa48fc, data, tail17] + - [0xa48fc, data, tail18] - [0xa4aa4, .rodata, ov_SC03_117_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa4c1c, data, tail18] + - [0xa4c1c, data, tail19] - [0xa4cac, .rodata, ov_SC03_117_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa4d38, data, tail19] + - [0xa4d38, data, tail20] - [0xa4d3c, .rodata, ov_SC03_117_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xa4d50, .rodata, ov_SC03_117_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa4d70, data, tail20] + - [0xa4d70, data, tail21] - [0xA67EC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xA67EF] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_118.yaml b/config/splat.ov_SC03_118.yaml index ca77ab898..47e9e149a 100644 --- a/config/splat.ov_SC03_118.yaml +++ b/config/splat.ov_SC03_118.yaml @@ -118,47 +118,49 @@ segments: - [0x52cd4, c, ov_SC03_118_jr_8017AE2C] - [0x57a2c, c, ov_SC03_118_jr_8017FB84] - [0x617c4, data, tail] + - [0xa9b78, .rodata, ov_SC03_118] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xa9b8c, data, tail2] - [0xa9c54, .rodata, ov_SC03_118_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9d34, data, tail2] + - [0xa9d34, data, tail3] - [0xa9d4c, .rodata, ov_SC03_118_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9d60, data, tail3] + - [0xa9d60, data, tail4] - [0xa9d64, .rodata, ov_SC03_118_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9d78, data, tail4] + - [0xa9d78, data, tail5] - [0xa9d7c, .rodata, ov_SC03_118_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9d90, data, tail5] + - [0xa9d90, data, tail6] - [0xa9dcc, .rodata, ov_SC03_118_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9e30, data, tail6] + - [0xa9e30, data, tail7] - [0xaa43c, .rodata, ov_SC03_118_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa470, data, tail7] + - [0xaa470, data, tail8] - [0xaa474, .rodata, ov_SC03_118_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa4a8, data, tail8] + - [0xaa4a8, data, tail9] - [0xaa4e4, .rodata, ov_SC03_118_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa4f8, data, tail9] + - [0xaa4f8, data, tail10] - [0xaa510, .rodata, ov_SC03_118_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa57c, data, tail10] + - [0xaa57c, data, tail11] - [0xaa5ec, .rodata, ov_SC03_118_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xaa630, .rodata, ov_SC03_118_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa678, data, tail11] + - [0xaa678, data, tail12] - [0xaa6d8, .rodata, ov_SC03_118_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa70c, data, tail12] + - [0xaa70c, data, tail13] - [0xaa710, .rodata, ov_SC03_118_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa72c, data, tail13] + - [0xaa72c, data, tail14] - [0xaa730, .rodata, ov_SC03_118_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa74c, data, tail14] + - [0xaa74c, data, tail15] - [0xaa770, .rodata, ov_SC03_118_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa78c, data, tail15] + - [0xaa78c, data, tail16] - [0xaa7a4, .rodata, ov_SC03_118_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa7c4, data, tail16] + - [0xaa7c4, data, tail17] - [0xaa844, .rodata, ov_SC03_118_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa858, data, tail17] + - [0xaa858, data, tail18] - [0xaaa00, .rodata, ov_SC03_118_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaab78, data, tail18] + - [0xaab78, data, tail19] - [0xaac08, .rodata, ov_SC03_118_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaac94, data, tail19] + - [0xaac94, data, tail20] - [0xaac98, .rodata, ov_SC03_118_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaacac, data, tail20] + - [0xaacac, data, tail21] - [0xaacd8, .rodata, ov_SC03_118_jr_8017FB84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaacf8, data, tail21] + - [0xaacf8, data, tail22] - [0xAC6F4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xAC6F7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_119.yaml b/config/splat.ov_SC03_119.yaml index 4145b654f..54e0d82b7 100644 --- a/config/splat.ov_SC03_119.yaml +++ b/config/splat.ov_SC03_119.yaml @@ -118,47 +118,49 @@ segments: - [0x52cd4, c, ov_SC03_119_jr_8017AE2C] - [0x57a2c, c, ov_SC03_119_jr_8017FB84] - [0x617c4, data, tail] + - [0xa9b78, .rodata, ov_SC03_119] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xa9b8c, data, tail2] - [0xa9c54, .rodata, ov_SC03_119_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9d34, data, tail2] + - [0xa9d34, data, tail3] - [0xa9d4c, .rodata, ov_SC03_119_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9d60, data, tail3] + - [0xa9d60, data, tail4] - [0xa9d64, .rodata, ov_SC03_119_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9d78, data, tail4] + - [0xa9d78, data, tail5] - [0xa9d7c, .rodata, ov_SC03_119_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9d90, data, tail5] + - [0xa9d90, data, tail6] - [0xa9dcc, .rodata, ov_SC03_119_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xa9e30, data, tail6] + - [0xa9e30, data, tail7] - [0xaa43c, .rodata, ov_SC03_119_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa470, data, tail7] + - [0xaa470, data, tail8] - [0xaa474, .rodata, ov_SC03_119_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa4a8, data, tail8] + - [0xaa4a8, data, tail9] - [0xaa4e4, .rodata, ov_SC03_119_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa4f8, data, tail9] + - [0xaa4f8, data, tail10] - [0xaa510, .rodata, ov_SC03_119_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa57c, data, tail10] + - [0xaa57c, data, tail11] - [0xaa5ec, .rodata, ov_SC03_119_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xaa630, .rodata, ov_SC03_119_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa678, data, tail11] + - [0xaa678, data, tail12] - [0xaa6d8, .rodata, ov_SC03_119_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa70c, data, tail12] + - [0xaa70c, data, tail13] - [0xaa710, .rodata, ov_SC03_119_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa72c, data, tail13] + - [0xaa72c, data, tail14] - [0xaa730, .rodata, ov_SC03_119_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa74c, data, tail14] + - [0xaa74c, data, tail15] - [0xaa770, .rodata, ov_SC03_119_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa78c, data, tail15] + - [0xaa78c, data, tail16] - [0xaa7a4, .rodata, ov_SC03_119_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa7c4, data, tail16] + - [0xaa7c4, data, tail17] - [0xaa844, .rodata, ov_SC03_119_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaa858, data, tail17] + - [0xaa858, data, tail18] - [0xaaa00, .rodata, ov_SC03_119_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaab78, data, tail18] + - [0xaab78, data, tail19] - [0xaac08, .rodata, ov_SC03_119_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaac94, data, tail19] + - [0xaac94, data, tail20] - [0xaac98, .rodata, ov_SC03_119_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaacac, data, tail20] + - [0xaacac, data, tail21] - [0xaacd8, .rodata, ov_SC03_119_jr_8017FB84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xaacf8, data, tail21] + - [0xaacf8, data, tail22] - [0xAC6F4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xAC6F7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_121.yaml b/config/splat.ov_SC03_121.yaml index 8c40ab7aa..10c68b6e3 100644 --- a/config/splat.ov_SC03_121.yaml +++ b/config/splat.ov_SC03_121.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_121_jr_8017AE2C] - [0x53d64, c, ov_SC03_121_jr_8017BEBC] - [0x59fe0, data, tail] + - [0x84680, .rodata, ov_SC03_121] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x84694, data, tail2] - [0x8475c, .rodata, ov_SC03_121_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8483c, data, tail2] + - [0x8483c, data, tail3] - [0x84854, .rodata, ov_SC03_121_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x84868, data, tail3] + - [0x84868, data, tail4] - [0x8486c, .rodata, ov_SC03_121_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x84880, data, tail4] + - [0x84880, data, tail5] - [0x84884, .rodata, ov_SC03_121_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x84898, data, tail5] + - [0x84898, data, tail6] - [0x848d4, .rodata, ov_SC03_121_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x84938, data, tail6] + - [0x84938, data, tail7] - [0x84f44, .rodata, ov_SC03_121_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x84f78, data, tail7] + - [0x84f78, data, tail8] - [0x84f7c, .rodata, ov_SC03_121_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x84fb0, data, tail8] + - [0x84fb0, data, tail9] - [0x84fec, .rodata, ov_SC03_121_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x85000, data, tail9] + - [0x85000, data, tail10] - [0x85018, .rodata, ov_SC03_121_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x85084, data, tail10] + - [0x85084, data, tail11] - [0x850f4, .rodata, ov_SC03_121_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x85138, .rodata, ov_SC03_121_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x85180, data, tail11] + - [0x85180, data, tail12] - [0x851e0, .rodata, ov_SC03_121_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x85214, data, tail12] + - [0x85214, data, tail13] - [0x85218, .rodata, ov_SC03_121_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x85234, data, tail13] + - [0x85234, data, tail14] - [0x85238, .rodata, ov_SC03_121_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x85254, data, tail14] + - [0x85254, data, tail15] - [0x85278, .rodata, ov_SC03_121_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x85294, data, tail15] + - [0x85294, data, tail16] - [0x852ac, .rodata, ov_SC03_121_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x852cc, data, tail16] + - [0x852cc, data, tail17] - [0x8534c, .rodata, ov_SC03_121_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x85360, data, tail17] + - [0x85360, data, tail18] - [0x85508, .rodata, ov_SC03_121_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x85680, data, tail18] + - [0x85680, data, tail19] - [0x85710, .rodata, ov_SC03_121_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8579c, data, tail19] + - [0x8579c, data, tail20] - [0x857a0, .rodata, ov_SC03_121_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x857b4, .rodata, ov_SC03_121_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x857d4, data, tail20] + - [0x857d4, data, tail21] - [0x86E54, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x86E57] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_124.yaml b/config/splat.ov_SC03_124.yaml index b19deb408..386f9a062 100644 --- a/config/splat.ov_SC03_124.yaml +++ b/config/splat.ov_SC03_124.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC03_124_jr_8017A4AC] - [0x52cd4, c, ov_SC03_124_jr_8017AE2C] - [0x6276c, data, tail] + - [0xb6dd4, .rodata, ov_SC03_124] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xb6de8, data, tail2] - [0xb6eb0, .rodata, ov_SC03_124_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb6f90, data, tail2] + - [0xb6f90, data, tail3] - [0xb6fa8, .rodata, ov_SC03_124_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb6fbc, data, tail3] + - [0xb6fbc, data, tail4] - [0xb6fc0, .rodata, ov_SC03_124_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb6fd4, data, tail4] + - [0xb6fd4, data, tail5] - [0xb6fd8, .rodata, ov_SC03_124_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb6fec, data, tail5] + - [0xb6fec, data, tail6] - [0xb7028, .rodata, ov_SC03_124_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb708c, data, tail6] + - [0xb708c, data, tail7] - [0xb7698, .rodata, ov_SC03_124_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb76cc, data, tail7] + - [0xb76cc, data, tail8] - [0xb76d0, .rodata, ov_SC03_124_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7704, data, tail8] + - [0xb7704, data, tail9] - [0xb7740, .rodata, ov_SC03_124_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7754, data, tail9] + - [0xb7754, data, tail10] - [0xb776c, .rodata, ov_SC03_124_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb77d8, data, tail10] + - [0xb77d8, data, tail11] - [0xb7848, .rodata, ov_SC03_124_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xb788c, .rodata, ov_SC03_124_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb78d4, data, tail11] + - [0xb78d4, data, tail12] - [0xb7934, .rodata, ov_SC03_124_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7968, data, tail12] + - [0xb7968, data, tail13] - [0xb796c, .rodata, ov_SC03_124_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7988, data, tail13] + - [0xb7988, data, tail14] - [0xb798c, .rodata, ov_SC03_124_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb79a8, data, tail14] + - [0xb79a8, data, tail15] - [0xb79cc, .rodata, ov_SC03_124_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb79e8, data, tail15] + - [0xb79e8, data, tail16] - [0xb7a00, .rodata, ov_SC03_124_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7a20, data, tail16] + - [0xb7a20, data, tail17] - [0xb7aa0, .rodata, ov_SC03_124_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7ab4, data, tail17] + - [0xb7ab4, data, tail18] - [0xb7c5c, .rodata, ov_SC03_124_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7dd4, data, tail18] + - [0xb7dd4, data, tail19] - [0xb7e64, .rodata, ov_SC03_124_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7ef0, data, tail19] + - [0xb7ef0, data, tail20] - [0xb7ef4, .rodata, ov_SC03_124_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xb7f08, data, tail20] + - [0xb7f08, data, tail21] - [0xBA48C, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xBA48F] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_125.yaml b/config/splat.ov_SC03_125.yaml index d75f4edad..89277f16a 100644 --- a/config/splat.ov_SC03_125.yaml +++ b/config/splat.ov_SC03_125.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC03_125_jr_8017AE2C] - [0x554ac, c, ov_SC03_125_jr_8017D604] - [0x5bbdc, data, tail] + - [0x99ac0, .rodata, ov_SC03_125] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x99ad4, data, tail2] - [0x99b9c, .rodata, ov_SC03_125_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x99c7c, data, tail2] + - [0x99c7c, data, tail3] - [0x99c94, .rodata, ov_SC03_125_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x99ca8, data, tail3] + - [0x99ca8, data, tail4] - [0x99cac, .rodata, ov_SC03_125_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x99cc0, data, tail4] + - [0x99cc0, data, tail5] - [0x99cc4, .rodata, ov_SC03_125_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x99cd8, data, tail5] + - [0x99cd8, data, tail6] - [0x99d14, .rodata, ov_SC03_125_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x99d78, data, tail6] + - [0x99d78, data, tail7] - [0x9a384, .rodata, ov_SC03_125_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9a3b8, data, tail7] + - [0x9a3b8, data, tail8] - [0x9a3bc, .rodata, ov_SC03_125_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9a3f0, data, tail8] + - [0x9a3f0, data, tail9] - [0x9a42c, .rodata, ov_SC03_125_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9a440, data, tail9] + - [0x9a440, data, tail10] - [0x9a458, .rodata, ov_SC03_125_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9a4c4, data, tail10] + - [0x9a4c4, data, tail11] - [0x9a534, .rodata, ov_SC03_125_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9a578, .rodata, ov_SC03_125_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9a5c0, data, tail11] + - [0x9a5c0, data, tail12] - [0x9a620, .rodata, ov_SC03_125_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9a654, data, tail12] + - [0x9a654, data, tail13] - [0x9a658, .rodata, ov_SC03_125_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9a674, data, tail13] + - [0x9a674, data, tail14] - [0x9a678, .rodata, ov_SC03_125_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9a694, data, tail14] + - [0x9a694, data, tail15] - [0x9a6b8, .rodata, ov_SC03_125_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9a6d4, data, tail15] + - [0x9a6d4, data, tail16] - [0x9a6ec, .rodata, ov_SC03_125_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9a70c, data, tail16] + - [0x9a70c, data, tail17] - [0x9a78c, .rodata, ov_SC03_125_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9a7a0, data, tail17] + - [0x9a7a0, data, tail18] - [0x9a948, .rodata, ov_SC03_125_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9aac0, data, tail18] + - [0x9aac0, data, tail19] - [0x9ab50, .rodata, ov_SC03_125_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9abdc, data, tail19] + - [0x9abdc, data, tail20] - [0x9abe0, .rodata, ov_SC03_125_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9abf4, .rodata, ov_SC03_125_jr_8017D604] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ac14, data, tail20] + - [0x9ac14, data, tail21] - [0x9C3E4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x9C3E7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC03_126.yaml b/config/splat.ov_SC03_126.yaml index 1d0ec6ab5..46e8ed3a8 100644 --- a/config/splat.ov_SC03_126.yaml +++ b/config/splat.ov_SC03_126.yaml @@ -118,47 +118,49 @@ segments: - [0x52cd4, c, ov_SC03_126_jr_8017AE2C] - [0x55468, c, ov_SC03_126_jr_8017D5C0] - [0x570d4, data, tail] + - [0x653ac, .rodata, ov_SC03_126] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x653c0, data, tail2] - [0x65488, .rodata, ov_SC03_126_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65568, data, tail2] + - [0x65568, data, tail3] - [0x65580, .rodata, ov_SC03_126_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65594, data, tail3] + - [0x65594, data, tail4] - [0x65598, .rodata, ov_SC03_126_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x655ac, data, tail4] + - [0x655ac, data, tail5] - [0x655b0, .rodata, ov_SC03_126_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x655c4, data, tail5] + - [0x655c4, data, tail6] - [0x65600, .rodata, ov_SC03_126_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65664, data, tail6] + - [0x65664, data, tail7] - [0x65c70, .rodata, ov_SC03_126_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65ca4, data, tail7] + - [0x65ca4, data, tail8] - [0x65ca8, .rodata, ov_SC03_126_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65cdc, data, tail8] + - [0x65cdc, data, tail9] - [0x65d18, .rodata, ov_SC03_126_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65d2c, data, tail9] + - [0x65d2c, data, tail10] - [0x65d44, .rodata, ov_SC03_126_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65db0, data, tail10] + - [0x65db0, data, tail11] - [0x65e20, .rodata, ov_SC03_126_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x65e64, .rodata, ov_SC03_126_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65eac, data, tail11] + - [0x65eac, data, tail12] - [0x65f0c, .rodata, ov_SC03_126_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65f40, data, tail12] + - [0x65f40, data, tail13] - [0x65f44, .rodata, ov_SC03_126_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65f60, data, tail13] + - [0x65f60, data, tail14] - [0x65f64, .rodata, ov_SC03_126_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65f80, data, tail14] + - [0x65f80, data, tail15] - [0x65fa4, .rodata, ov_SC03_126_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65fc0, data, tail15] + - [0x65fc0, data, tail16] - [0x65fd8, .rodata, ov_SC03_126_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65ff8, data, tail16] + - [0x65ff8, data, tail17] - [0x66078, .rodata, ov_SC03_126_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6608c, data, tail17] + - [0x6608c, data, tail18] - [0x66234, .rodata, ov_SC03_126_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x663ac, data, tail18] + - [0x663ac, data, tail19] - [0x6643c, .rodata, ov_SC03_126_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x664c8, data, tail19] + - [0x664c8, data, tail20] - [0x664cc, .rodata, ov_SC03_126_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x664e0, data, tail20] + - [0x664e0, data, tail21] - [0x66500, .rodata, ov_SC03_126_jr_8017D5C0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x66520, data, tail21] + - [0x66520, data, tail22] - [0x679D4, bin, trailing] # final 1 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x679D5] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC04_000.yaml b/config/splat.ov_SC04_000.yaml index 960a5420f..401ee2efe 100644 --- a/config/splat.ov_SC04_000.yaml +++ b/config/splat.ov_SC04_000.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC04_000_jr_8017AE2C] - [0x53d64, c, ov_SC04_000_jr_8017BEBC] - [0x5b0e0, data, tail] + - [0x7f428, .rodata, ov_SC04_000] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x7f43c, data, tail2] - [0x7f504, .rodata, ov_SC04_000_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7f5e4, data, tail2] + - [0x7f5e4, data, tail3] - [0x7f5fc, .rodata, ov_SC04_000_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7f610, data, tail3] + - [0x7f610, data, tail4] - [0x7f614, .rodata, ov_SC04_000_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7f628, data, tail4] + - [0x7f628, data, tail5] - [0x7f62c, .rodata, ov_SC04_000_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7f640, data, tail5] + - [0x7f640, data, tail6] - [0x7f67c, .rodata, ov_SC04_000_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7f6e0, data, tail6] + - [0x7f6e0, data, tail7] - [0x7fcec, .rodata, ov_SC04_000_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7fd20, data, tail7] + - [0x7fd20, data, tail8] - [0x7fd24, .rodata, ov_SC04_000_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7fd58, data, tail8] + - [0x7fd58, data, tail9] - [0x7fd94, .rodata, ov_SC04_000_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7fda8, data, tail9] + - [0x7fda8, data, tail10] - [0x7fdc0, .rodata, ov_SC04_000_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7fe2c, data, tail10] + - [0x7fe2c, data, tail11] - [0x7fe9c, .rodata, ov_SC04_000_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x7fee0, .rodata, ov_SC04_000_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7ff28, data, tail11] + - [0x7ff28, data, tail12] - [0x7ff88, .rodata, ov_SC04_000_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7ffbc, data, tail12] + - [0x7ffbc, data, tail13] - [0x7ffc0, .rodata, ov_SC04_000_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7ffdc, data, tail13] + - [0x7ffdc, data, tail14] - [0x7ffe0, .rodata, ov_SC04_000_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7fffc, data, tail14] + - [0x7fffc, data, tail15] - [0x80020, .rodata, ov_SC04_000_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8003c, data, tail15] + - [0x8003c, data, tail16] - [0x80054, .rodata, ov_SC04_000_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80074, data, tail16] + - [0x80074, data, tail17] - [0x800f4, .rodata, ov_SC04_000_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80108, data, tail17] + - [0x80108, data, tail18] - [0x802b0, .rodata, ov_SC04_000_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80428, data, tail18] + - [0x80428, data, tail19] - [0x804b8, .rodata, ov_SC04_000_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x80544, data, tail19] + - [0x80544, data, tail20] - [0x80548, .rodata, ov_SC04_000_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x8055c, .rodata, ov_SC04_000_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8057c, data, tail20] + - [0x8057c, data, tail21] - [0x82EFC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x82EFF] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC04_002.yaml b/config/splat.ov_SC04_002.yaml index e3eab7681..c0db2e89e 100644 --- a/config/splat.ov_SC04_002.yaml +++ b/config/splat.ov_SC04_002.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC04_002_jr_8017AE2C] - [0x53d64, c, ov_SC04_002_jr_8017BEBC] - [0x6024c, data, tail] + - [0x96778, .rodata, ov_SC04_002] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x9678c, data, tail2] - [0x96854, .rodata, ov_SC04_002_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96934, data, tail2] + - [0x96934, data, tail3] - [0x9694c, .rodata, ov_SC04_002_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96960, data, tail3] + - [0x96960, data, tail4] - [0x96964, .rodata, ov_SC04_002_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96978, data, tail4] + - [0x96978, data, tail5] - [0x9697c, .rodata, ov_SC04_002_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96990, data, tail5] + - [0x96990, data, tail6] - [0x969cc, .rodata, ov_SC04_002_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x96a30, data, tail6] + - [0x96a30, data, tail7] - [0x9703c, .rodata, ov_SC04_002_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97070, data, tail7] + - [0x97070, data, tail8] - [0x97074, .rodata, ov_SC04_002_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x970a8, data, tail8] + - [0x970a8, data, tail9] - [0x970e4, .rodata, ov_SC04_002_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x970f8, data, tail9] + - [0x970f8, data, tail10] - [0x97110, .rodata, ov_SC04_002_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9717c, data, tail10] + - [0x9717c, data, tail11] - [0x971ec, .rodata, ov_SC04_002_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x97230, .rodata, ov_SC04_002_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97278, data, tail11] + - [0x97278, data, tail12] - [0x972d8, .rodata, ov_SC04_002_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9730c, data, tail12] + - [0x9730c, data, tail13] - [0x97310, .rodata, ov_SC04_002_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9732c, data, tail13] + - [0x9732c, data, tail14] - [0x97330, .rodata, ov_SC04_002_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9734c, data, tail14] + - [0x9734c, data, tail15] - [0x97370, .rodata, ov_SC04_002_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9738c, data, tail15] + - [0x9738c, data, tail16] - [0x973a4, .rodata, ov_SC04_002_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x973c4, data, tail16] + - [0x973c4, data, tail17] - [0x97444, .rodata, ov_SC04_002_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97458, data, tail17] + - [0x97458, data, tail18] - [0x97600, .rodata, ov_SC04_002_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97778, data, tail18] + - [0x97778, data, tail19] - [0x97808, .rodata, ov_SC04_002_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97894, data, tail19] + - [0x97894, data, tail20] - [0x97898, .rodata, ov_SC04_002_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x978ac, .rodata, ov_SC04_002_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x978cc, data, tail20] + - [0x978cc, data, tail21] - [0x995DC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x995DF] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC04_003.yaml b/config/splat.ov_SC04_003.yaml index adaa1e23f..f49e132d5 100644 --- a/config/splat.ov_SC04_003.yaml +++ b/config/splat.ov_SC04_003.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC04_003_jr_8017AE2C] - [0x53d64, c, ov_SC04_003_jr_8017BEBC] - [0x59fe8, data, tail] + - [0x713f4, .rodata, ov_SC04_003] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x71408, data, tail2] - [0x714d0, .rodata, ov_SC04_003_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x715b0, data, tail2] + - [0x715b0, data, tail3] - [0x715c8, .rodata, ov_SC04_003_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x715dc, data, tail3] + - [0x715dc, data, tail4] - [0x715e0, .rodata, ov_SC04_003_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x715f4, data, tail4] + - [0x715f4, data, tail5] - [0x715f8, .rodata, ov_SC04_003_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7160c, data, tail5] + - [0x7160c, data, tail6] - [0x71648, .rodata, ov_SC04_003_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x716ac, data, tail6] + - [0x716ac, data, tail7] - [0x71cb8, .rodata, ov_SC04_003_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x71cec, data, tail7] + - [0x71cec, data, tail8] - [0x71cf0, .rodata, ov_SC04_003_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x71d24, data, tail8] + - [0x71d24, data, tail9] - [0x71d60, .rodata, ov_SC04_003_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x71d74, data, tail9] + - [0x71d74, data, tail10] - [0x71d8c, .rodata, ov_SC04_003_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x71df8, data, tail10] + - [0x71df8, data, tail11] - [0x71e68, .rodata, ov_SC04_003_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x71eac, .rodata, ov_SC04_003_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x71ef4, data, tail11] + - [0x71ef4, data, tail12] - [0x71f54, .rodata, ov_SC04_003_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x71f88, data, tail12] + - [0x71f88, data, tail13] - [0x71f8c, .rodata, ov_SC04_003_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x71fa8, data, tail13] + - [0x71fa8, data, tail14] - [0x71fac, .rodata, ov_SC04_003_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x71fc8, data, tail14] + - [0x71fc8, data, tail15] - [0x71fec, .rodata, ov_SC04_003_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72008, data, tail15] + - [0x72008, data, tail16] - [0x72020, .rodata, ov_SC04_003_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72040, data, tail16] + - [0x72040, data, tail17] - [0x720c0, .rodata, ov_SC04_003_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x720d4, data, tail17] + - [0x720d4, data, tail18] - [0x7227c, .rodata, ov_SC04_003_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x723f4, data, tail18] + - [0x723f4, data, tail19] - [0x72484, .rodata, ov_SC04_003_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72510, data, tail19] + - [0x72510, data, tail20] - [0x72514, .rodata, ov_SC04_003_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x72528, .rodata, ov_SC04_003_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x72548, data, tail20] + - [0x72548, data, tail21] - [0x73A94, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x73A97] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC04_004.yaml b/config/splat.ov_SC04_004.yaml index 04e7500d2..5e7e7dbe2 100644 --- a/config/splat.ov_SC04_004.yaml +++ b/config/splat.ov_SC04_004.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC04_004_jr_8017A4AC] - [0x52cd4, c, ov_SC04_004_jr_8017AE2C] - [0x5c51c, data, tail] + - [0x891f0, .rodata, ov_SC04_004] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x89204, data, tail2] - [0x892cc, .rodata, ov_SC04_004_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x893ac, data, tail2] + - [0x893ac, data, tail3] - [0x893c4, .rodata, ov_SC04_004_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x893d8, data, tail3] + - [0x893d8, data, tail4] - [0x893dc, .rodata, ov_SC04_004_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x893f0, data, tail4] + - [0x893f0, data, tail5] - [0x893f4, .rodata, ov_SC04_004_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89408, data, tail5] + - [0x89408, data, tail6] - [0x89444, .rodata, ov_SC04_004_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x894a8, data, tail6] + - [0x894a8, data, tail7] - [0x89ab4, .rodata, ov_SC04_004_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89ae8, data, tail7] + - [0x89ae8, data, tail8] - [0x89aec, .rodata, ov_SC04_004_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89b20, data, tail8] + - [0x89b20, data, tail9] - [0x89b5c, .rodata, ov_SC04_004_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89b70, data, tail9] + - [0x89b70, data, tail10] - [0x89b88, .rodata, ov_SC04_004_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89bf4, data, tail10] + - [0x89bf4, data, tail11] - [0x89c64, .rodata, ov_SC04_004_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x89ca8, .rodata, ov_SC04_004_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89cf0, data, tail11] + - [0x89cf0, data, tail12] - [0x89d50, .rodata, ov_SC04_004_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89d84, data, tail12] + - [0x89d84, data, tail13] - [0x89d88, .rodata, ov_SC04_004_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89da4, data, tail13] + - [0x89da4, data, tail14] - [0x89da8, .rodata, ov_SC04_004_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89dc4, data, tail14] + - [0x89dc4, data, tail15] - [0x89de8, .rodata, ov_SC04_004_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89e04, data, tail15] + - [0x89e04, data, tail16] - [0x89e1c, .rodata, ov_SC04_004_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89e3c, data, tail16] + - [0x89e3c, data, tail17] - [0x89ebc, .rodata, ov_SC04_004_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x89ed0, data, tail17] + - [0x89ed0, data, tail18] - [0x8a078, .rodata, ov_SC04_004_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8a1f0, data, tail18] + - [0x8a1f0, data, tail19] - [0x8a280, .rodata, ov_SC04_004_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8a30c, data, tail19] + - [0x8a30c, data, tail20] - [0x8a310, .rodata, ov_SC04_004_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8a324, data, tail20] + - [0x8a324, data, tail21] - [0x8BAFC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x8BAFF] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC04_005.yaml b/config/splat.ov_SC04_005.yaml index 144f13d4c..199893a2e 100644 --- a/config/splat.ov_SC04_005.yaml +++ b/config/splat.ov_SC04_005.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC04_005_jr_8017AE2C] - [0x53d64, c, ov_SC04_005_jr_8017BEBC] - [0x5f950, data, tail] + - [0x973b4, .rodata, ov_SC04_005] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x973c8, data, tail2] - [0x97490, .rodata, ov_SC04_005_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97570, data, tail2] + - [0x97570, data, tail3] - [0x97588, .rodata, ov_SC04_005_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9759c, data, tail3] + - [0x9759c, data, tail4] - [0x975a0, .rodata, ov_SC04_005_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x975b4, data, tail4] + - [0x975b4, data, tail5] - [0x975b8, .rodata, ov_SC04_005_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x975cc, data, tail5] + - [0x975cc, data, tail6] - [0x97608, .rodata, ov_SC04_005_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9766c, data, tail6] + - [0x9766c, data, tail7] - [0x97c78, .rodata, ov_SC04_005_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97cac, data, tail7] + - [0x97cac, data, tail8] - [0x97cb0, .rodata, ov_SC04_005_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97ce4, data, tail8] + - [0x97ce4, data, tail9] - [0x97d20, .rodata, ov_SC04_005_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97d34, data, tail9] + - [0x97d34, data, tail10] - [0x97d4c, .rodata, ov_SC04_005_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97db8, data, tail10] + - [0x97db8, data, tail11] - [0x97e28, .rodata, ov_SC04_005_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x97e6c, .rodata, ov_SC04_005_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97eb4, data, tail11] + - [0x97eb4, data, tail12] - [0x97f14, .rodata, ov_SC04_005_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97f48, data, tail12] + - [0x97f48, data, tail13] - [0x97f4c, .rodata, ov_SC04_005_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97f68, data, tail13] + - [0x97f68, data, tail14] - [0x97f6c, .rodata, ov_SC04_005_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97f88, data, tail14] + - [0x97f88, data, tail15] - [0x97fac, .rodata, ov_SC04_005_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97fc8, data, tail15] + - [0x97fc8, data, tail16] - [0x97fe0, .rodata, ov_SC04_005_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x98000, data, tail16] + - [0x98000, data, tail17] - [0x98080, .rodata, ov_SC04_005_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x98094, data, tail17] + - [0x98094, data, tail18] - [0x9823c, .rodata, ov_SC04_005_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x983b4, data, tail18] + - [0x983b4, data, tail19] - [0x98444, .rodata, ov_SC04_005_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x984d0, data, tail19] + - [0x984d0, data, tail20] - [0x984d4, .rodata, ov_SC04_005_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x984e8, .rodata, ov_SC04_005_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x98508, data, tail20] + - [0x98508, data, tail21] - [0x9A1D4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x9A1D7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC04_006.yaml b/config/splat.ov_SC04_006.yaml index 957f247ca..2f38ba5be 100644 --- a/config/splat.ov_SC04_006.yaml +++ b/config/splat.ov_SC04_006.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC04_006_jr_8017AE2C] - [0x53d64, c, ov_SC04_006_jr_8017BEBC] - [0x57a30, data, tail] + - [0x7365c, .rodata, ov_SC04_006] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x73670, data, tail2] - [0x73738, .rodata, ov_SC04_006_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x73818, data, tail2] + - [0x73818, data, tail3] - [0x73830, .rodata, ov_SC04_006_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x73844, data, tail3] + - [0x73844, data, tail4] - [0x73848, .rodata, ov_SC04_006_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7385c, data, tail4] + - [0x7385c, data, tail5] - [0x73860, .rodata, ov_SC04_006_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x73874, data, tail5] + - [0x73874, data, tail6] - [0x738b0, .rodata, ov_SC04_006_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x73914, data, tail6] + - [0x73914, data, tail7] - [0x73f20, .rodata, ov_SC04_006_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x73f54, data, tail7] + - [0x73f54, data, tail8] - [0x73f58, .rodata, ov_SC04_006_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x73f8c, data, tail8] + - [0x73f8c, data, tail9] - [0x73fc8, .rodata, ov_SC04_006_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x73fdc, data, tail9] + - [0x73fdc, data, tail10] - [0x73ff4, .rodata, ov_SC04_006_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x74060, data, tail10] + - [0x74060, data, tail11] - [0x740d0, .rodata, ov_SC04_006_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x74114, .rodata, ov_SC04_006_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7415c, data, tail11] + - [0x7415c, data, tail12] - [0x741bc, .rodata, ov_SC04_006_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x741f0, data, tail12] + - [0x741f0, data, tail13] - [0x741f4, .rodata, ov_SC04_006_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x74210, data, tail13] + - [0x74210, data, tail14] - [0x74214, .rodata, ov_SC04_006_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x74230, data, tail14] + - [0x74230, data, tail15] - [0x74254, .rodata, ov_SC04_006_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x74270, data, tail15] + - [0x74270, data, tail16] - [0x74288, .rodata, ov_SC04_006_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x742a8, data, tail16] + - [0x742a8, data, tail17] - [0x74328, .rodata, ov_SC04_006_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7433c, data, tail17] + - [0x7433c, data, tail18] - [0x744e4, .rodata, ov_SC04_006_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7465c, data, tail18] + - [0x7465c, data, tail19] - [0x746ec, .rodata, ov_SC04_006_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x74778, data, tail19] + - [0x74778, data, tail20] - [0x7477c, .rodata, ov_SC04_006_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x74790, .rodata, ov_SC04_006_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x747b0, data, tail20] + - [0x747b0, data, tail21] - [0x75C74, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x75C77] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC04_007.yaml b/config/splat.ov_SC04_007.yaml index 2a54b1e91..258214dc5 100644 --- a/config/splat.ov_SC04_007.yaml +++ b/config/splat.ov_SC04_007.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC04_007_jr_8017AE2C] - [0x53d64, c, ov_SC04_007_jr_8017BEBC] - [0x5d9e8, data, tail] + - [0x8ac18, .rodata, ov_SC04_007] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x8ac2c, data, tail2] - [0x8acf4, .rodata, ov_SC04_007_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8add4, data, tail2] + - [0x8add4, data, tail3] - [0x8adec, .rodata, ov_SC04_007_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8ae00, data, tail3] + - [0x8ae00, data, tail4] - [0x8ae04, .rodata, ov_SC04_007_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8ae18, data, tail4] + - [0x8ae18, data, tail5] - [0x8ae1c, .rodata, ov_SC04_007_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8ae30, data, tail5] + - [0x8ae30, data, tail6] - [0x8ae6c, .rodata, ov_SC04_007_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8aed0, data, tail6] + - [0x8aed0, data, tail7] - [0x8b4dc, .rodata, ov_SC04_007_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8b510, data, tail7] + - [0x8b510, data, tail8] - [0x8b514, .rodata, ov_SC04_007_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8b548, data, tail8] + - [0x8b548, data, tail9] - [0x8b584, .rodata, ov_SC04_007_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8b598, data, tail9] + - [0x8b598, data, tail10] - [0x8b5b0, .rodata, ov_SC04_007_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8b61c, data, tail10] + - [0x8b61c, data, tail11] - [0x8b68c, .rodata, ov_SC04_007_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x8b6d0, .rodata, ov_SC04_007_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8b718, data, tail11] + - [0x8b718, data, tail12] - [0x8b778, .rodata, ov_SC04_007_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8b7ac, data, tail12] + - [0x8b7ac, data, tail13] - [0x8b7b0, .rodata, ov_SC04_007_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8b7cc, data, tail13] + - [0x8b7cc, data, tail14] - [0x8b7d0, .rodata, ov_SC04_007_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8b7ec, data, tail14] + - [0x8b7ec, data, tail15] - [0x8b810, .rodata, ov_SC04_007_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8b82c, data, tail15] + - [0x8b82c, data, tail16] - [0x8b844, .rodata, ov_SC04_007_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8b864, data, tail16] + - [0x8b864, data, tail17] - [0x8b8e4, .rodata, ov_SC04_007_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8b8f8, data, tail17] + - [0x8b8f8, data, tail18] - [0x8baa0, .rodata, ov_SC04_007_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8bc18, data, tail18] + - [0x8bc18, data, tail19] - [0x8bca8, .rodata, ov_SC04_007_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8bd34, data, tail19] + - [0x8bd34, data, tail20] - [0x8bd38, .rodata, ov_SC04_007_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x8bd4c, .rodata, ov_SC04_007_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x8bd6c, data, tail20] + - [0x8bd6c, data, tail21] - [0x8DA34, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x8DA37] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC04_008.yaml b/config/splat.ov_SC04_008.yaml index 95c5a531c..8e1b88775 100644 --- a/config/splat.ov_SC04_008.yaml +++ b/config/splat.ov_SC04_008.yaml @@ -116,43 +116,45 @@ segments: - [0x52354, c, ov_SC04_008_jr_8017A4AC] - [0x52cd4, c, ov_SC04_008_jr_8017AE2C] - [0x56920, data, tail] + - [0x67900, .rodata, ov_SC04_008] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x67914, data, tail2] - [0x679dc, .rodata, ov_SC04_008_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x67abc, data, tail2] + - [0x67abc, data, tail3] - [0x67ad4, .rodata, ov_SC04_008_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x67ae8, data, tail3] + - [0x67ae8, data, tail4] - [0x67aec, .rodata, ov_SC04_008_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x67b00, data, tail4] + - [0x67b00, data, tail5] - [0x67b04, .rodata, ov_SC04_008_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x67b18, data, tail5] + - [0x67b18, data, tail6] - [0x67b54, .rodata, ov_SC04_008_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x67bb8, data, tail6] + - [0x67bb8, data, tail7] - [0x681c4, .rodata, ov_SC04_008_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x681f8, data, tail7] + - [0x681f8, data, tail8] - [0x681fc, .rodata, ov_SC04_008_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68230, data, tail8] + - [0x68230, data, tail9] - [0x6826c, .rodata, ov_SC04_008_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68280, data, tail9] + - [0x68280, data, tail10] - [0x68298, .rodata, ov_SC04_008_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68304, data, tail10] + - [0x68304, data, tail11] - [0x68374, .rodata, ov_SC04_008_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x683b8, .rodata, ov_SC04_008_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68400, data, tail11] + - [0x68400, data, tail12] - [0x68460, .rodata, ov_SC04_008_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68494, data, tail12] + - [0x68494, data, tail13] - [0x684b8, .rodata, ov_SC04_008_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x684d4, data, tail13] + - [0x684d4, data, tail14] - [0x684f8, .rodata, ov_SC04_008_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68514, data, tail14] + - [0x68514, data, tail15] - [0x6852c, .rodata, ov_SC04_008_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6854c, data, tail15] + - [0x6854c, data, tail16] - [0x685cc, .rodata, ov_SC04_008_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x685e0, data, tail16] + - [0x685e0, data, tail17] - [0x68788, .rodata, ov_SC04_008_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68900, data, tail17] + - [0x68900, data, tail18] - [0x68990, .rodata, ov_SC04_008_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68a1c, data, tail18] + - [0x68a1c, data, tail19] - [0x68a20, .rodata, ov_SC04_008_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68a34, data, tail19] + - [0x68a34, data, tail20] - [0x6B364, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x6B367] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC04_009.yaml b/config/splat.ov_SC04_009.yaml index 41687c6c1..4207bca8e 100644 --- a/config/splat.ov_SC04_009.yaml +++ b/config/splat.ov_SC04_009.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC04_009_jr_8017AE2C] - [0x53d64, c, ov_SC04_009_jr_8017BEBC] - [0x5694c, data, tail] + - [0x6db14, .rodata, ov_SC04_009] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x6db28, data, tail2] - [0x6dbf0, .rodata, ov_SC04_009_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6dcd0, data, tail2] + - [0x6dcd0, data, tail3] - [0x6dce8, .rodata, ov_SC04_009_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6dcfc, data, tail3] + - [0x6dcfc, data, tail4] - [0x6dd00, .rodata, ov_SC04_009_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6dd14, data, tail4] + - [0x6dd14, data, tail5] - [0x6dd18, .rodata, ov_SC04_009_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6dd2c, data, tail5] + - [0x6dd2c, data, tail6] - [0x6dd68, .rodata, ov_SC04_009_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6ddcc, data, tail6] + - [0x6ddcc, data, tail7] - [0x6e3d8, .rodata, ov_SC04_009_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e40c, data, tail7] + - [0x6e40c, data, tail8] - [0x6e410, .rodata, ov_SC04_009_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e444, data, tail8] + - [0x6e444, data, tail9] - [0x6e480, .rodata, ov_SC04_009_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e494, data, tail9] + - [0x6e494, data, tail10] - [0x6e4ac, .rodata, ov_SC04_009_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e518, data, tail10] + - [0x6e518, data, tail11] - [0x6e588, .rodata, ov_SC04_009_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x6e5cc, .rodata, ov_SC04_009_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e614, data, tail11] + - [0x6e614, data, tail12] - [0x6e674, .rodata, ov_SC04_009_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e6a8, data, tail12] + - [0x6e6a8, data, tail13] - [0x6e6ac, .rodata, ov_SC04_009_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e6c8, data, tail13] + - [0x6e6c8, data, tail14] - [0x6e6cc, .rodata, ov_SC04_009_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e6e8, data, tail14] + - [0x6e6e8, data, tail15] - [0x6e70c, .rodata, ov_SC04_009_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e728, data, tail15] + - [0x6e728, data, tail16] - [0x6e740, .rodata, ov_SC04_009_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e760, data, tail16] + - [0x6e760, data, tail17] - [0x6e7e0, .rodata, ov_SC04_009_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6e7f4, data, tail17] + - [0x6e7f4, data, tail18] - [0x6e99c, .rodata, ov_SC04_009_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6eb14, data, tail18] + - [0x6eb14, data, tail19] - [0x6eba4, .rodata, ov_SC04_009_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6ec30, data, tail19] + - [0x6ec30, data, tail20] - [0x6ec34, .rodata, ov_SC04_009_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x6ec48, .rodata, ov_SC04_009_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6ec68, data, tail20] + - [0x6ec68, data, tail21] - [0x70114, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x70117] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC04_010.yaml b/config/splat.ov_SC04_010.yaml index 39a157071..0f765d99a 100644 --- a/config/splat.ov_SC04_010.yaml +++ b/config/splat.ov_SC04_010.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC04_010_jr_8017AE2C] - [0x53d64, c, ov_SC04_010_jr_8017BEBC] - [0x55ff8, data, tail] + - [0x64fa0, .rodata, ov_SC04_010] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x64fb4, data, tail2] - [0x6507c, .rodata, ov_SC04_010_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6515c, data, tail2] + - [0x6515c, data, tail3] - [0x65174, .rodata, ov_SC04_010_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65188, data, tail3] + - [0x65188, data, tail4] - [0x6518c, .rodata, ov_SC04_010_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x651a0, data, tail4] + - [0x651a0, data, tail5] - [0x651a4, .rodata, ov_SC04_010_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x651b8, data, tail5] + - [0x651b8, data, tail6] - [0x651f4, .rodata, ov_SC04_010_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65258, data, tail6] + - [0x65258, data, tail7] - [0x65864, .rodata, ov_SC04_010_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65898, data, tail7] + - [0x65898, data, tail8] - [0x6589c, .rodata, ov_SC04_010_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x658d0, data, tail8] + - [0x658d0, data, tail9] - [0x6590c, .rodata, ov_SC04_010_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65920, data, tail9] + - [0x65920, data, tail10] - [0x65938, .rodata, ov_SC04_010_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x659a4, data, tail10] + - [0x659a4, data, tail11] - [0x65a14, .rodata, ov_SC04_010_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x65a58, .rodata, ov_SC04_010_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65aa0, data, tail11] + - [0x65aa0, data, tail12] - [0x65b00, .rodata, ov_SC04_010_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65b34, data, tail12] + - [0x65b34, data, tail13] - [0x65b38, .rodata, ov_SC04_010_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65b54, data, tail13] + - [0x65b54, data, tail14] - [0x65b58, .rodata, ov_SC04_010_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65b74, data, tail14] + - [0x65b74, data, tail15] - [0x65b98, .rodata, ov_SC04_010_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65bb4, data, tail15] + - [0x65bb4, data, tail16] - [0x65bcc, .rodata, ov_SC04_010_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65bec, data, tail16] + - [0x65bec, data, tail17] - [0x65c6c, .rodata, ov_SC04_010_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65c80, data, tail17] + - [0x65c80, data, tail18] - [0x65e28, .rodata, ov_SC04_010_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x65fa0, data, tail18] + - [0x65fa0, data, tail19] - [0x66030, .rodata, ov_SC04_010_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x660bc, data, tail19] + - [0x660bc, data, tail20] - [0x660c0, .rodata, ov_SC04_010_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x660d4, .rodata, ov_SC04_010_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x660f4, data, tail20] + - [0x660f4, data, tail21] - [0x675EC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x675EF] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC04_011.yaml b/config/splat.ov_SC04_011.yaml index 8e4ca4b4f..cdc59f8fc 100644 --- a/config/splat.ov_SC04_011.yaml +++ b/config/splat.ov_SC04_011.yaml @@ -118,47 +118,49 @@ segments: - [0x52cd4, c, ov_SC04_011_jr_8017AE2C] - [0x5533c, c, ov_SC04_011_jr_8017D494] - [0x68288, data, tail] + - [0xc453c, .rodata, ov_SC04_011] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xc4550, data, tail2] - [0xc4618, .rodata, ov_SC04_011_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc46f8, data, tail2] + - [0xc46f8, data, tail3] - [0xc4710, .rodata, ov_SC04_011_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc4724, data, tail3] + - [0xc4724, data, tail4] - [0xc4728, .rodata, ov_SC04_011_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc473c, data, tail4] + - [0xc473c, data, tail5] - [0xc4740, .rodata, ov_SC04_011_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc4754, data, tail5] + - [0xc4754, data, tail6] - [0xc4790, .rodata, ov_SC04_011_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc47f4, data, tail6] + - [0xc47f4, data, tail7] - [0xc4e00, .rodata, ov_SC04_011_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc4e34, data, tail7] + - [0xc4e34, data, tail8] - [0xc4e38, .rodata, ov_SC04_011_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc4e6c, data, tail8] + - [0xc4e6c, data, tail9] - [0xc4ea8, .rodata, ov_SC04_011_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc4ebc, data, tail9] + - [0xc4ebc, data, tail10] - [0xc4ed4, .rodata, ov_SC04_011_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc4f40, data, tail10] + - [0xc4f40, data, tail11] - [0xc4fb0, .rodata, ov_SC04_011_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xc4ff4, .rodata, ov_SC04_011_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc503c, data, tail11] + - [0xc503c, data, tail12] - [0xc509c, .rodata, ov_SC04_011_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc50d0, data, tail12] + - [0xc50d0, data, tail13] - [0xc50d4, .rodata, ov_SC04_011_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc50f0, data, tail13] + - [0xc50f0, data, tail14] - [0xc50f4, .rodata, ov_SC04_011_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5110, data, tail14] + - [0xc5110, data, tail15] - [0xc5134, .rodata, ov_SC04_011_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5150, data, tail15] + - [0xc5150, data, tail16] - [0xc5168, .rodata, ov_SC04_011_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5188, data, tail16] + - [0xc5188, data, tail17] - [0xc5208, .rodata, ov_SC04_011_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc521c, data, tail17] + - [0xc521c, data, tail18] - [0xc53c4, .rodata, ov_SC04_011_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc553c, data, tail18] + - [0xc553c, data, tail19] - [0xc55cc, .rodata, ov_SC04_011_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5658, data, tail19] + - [0xc5658, data, tail20] - [0xc565c, .rodata, ov_SC04_011_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc5670, data, tail20] + - [0xc5670, data, tail21] - [0xc57a8, .rodata, ov_SC04_011_jr_8017D494] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xc57c8, data, tail21] + - [0xc57c8, data, tail22] - [0xC9554, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xC9557] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC04_012.yaml b/config/splat.ov_SC04_012.yaml index 0f43f61b7..5933ed50a 100644 --- a/config/splat.ov_SC04_012.yaml +++ b/config/splat.ov_SC04_012.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC04_012_jr_8017A4AC] - [0x52cd4, c, ov_SC04_012_jr_8017AE2C] - [0x5645c, data, tail] + - [0x67680, .rodata, ov_SC04_012] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x67694, data, tail2] - [0x6775c, .rodata, ov_SC04_012_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6783c, data, tail2] + - [0x6783c, data, tail3] - [0x67854, .rodata, ov_SC04_012_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x67868, data, tail3] + - [0x67868, data, tail4] - [0x6786c, .rodata, ov_SC04_012_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x67880, data, tail4] + - [0x67880, data, tail5] - [0x67884, .rodata, ov_SC04_012_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x67898, data, tail5] + - [0x67898, data, tail6] - [0x678d4, .rodata, ov_SC04_012_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x67938, data, tail6] + - [0x67938, data, tail7] - [0x67f44, .rodata, ov_SC04_012_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x67f78, data, tail7] + - [0x67f78, data, tail8] - [0x67f7c, .rodata, ov_SC04_012_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x67fb0, data, tail8] + - [0x67fb0, data, tail9] - [0x67fec, .rodata, ov_SC04_012_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68000, data, tail9] + - [0x68000, data, tail10] - [0x68018, .rodata, ov_SC04_012_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68084, data, tail10] + - [0x68084, data, tail11] - [0x680f4, .rodata, ov_SC04_012_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x68138, .rodata, ov_SC04_012_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68180, data, tail11] + - [0x68180, data, tail12] - [0x681e0, .rodata, ov_SC04_012_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68214, data, tail12] + - [0x68214, data, tail13] - [0x68218, .rodata, ov_SC04_012_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68234, data, tail13] + - [0x68234, data, tail14] - [0x68238, .rodata, ov_SC04_012_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68254, data, tail14] + - [0x68254, data, tail15] - [0x68278, .rodata, ov_SC04_012_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68294, data, tail15] + - [0x68294, data, tail16] - [0x682ac, .rodata, ov_SC04_012_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x682cc, data, tail16] + - [0x682cc, data, tail17] - [0x6834c, .rodata, ov_SC04_012_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68360, data, tail17] + - [0x68360, data, tail18] - [0x68508, .rodata, ov_SC04_012_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x68680, data, tail18] + - [0x68680, data, tail19] - [0x68710, .rodata, ov_SC04_012_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x6879c, data, tail19] + - [0x6879c, data, tail20] - [0x687a0, .rodata, ov_SC04_012_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x687b4, data, tail20] + - [0x687b4, data, tail21] - [0x6B0E4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x6B0E7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC04_015.yaml b/config/splat.ov_SC04_015.yaml index d86f91166..d1c99a07f 100644 --- a/config/splat.ov_SC04_015.yaml +++ b/config/splat.ov_SC04_015.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC04_015_jr_8017A4AC] - [0x52cd4, c, ov_SC04_015_jr_8017AE2C] - [0x5c38c, data, tail] + - [0x9e318, .rodata, ov_SC04_015] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x9e32c, data, tail2] - [0x9e3f4, .rodata, ov_SC04_015_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9e4d4, data, tail2] + - [0x9e4d4, data, tail3] - [0x9e4ec, .rodata, ov_SC04_015_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9e500, data, tail3] + - [0x9e500, data, tail4] - [0x9e504, .rodata, ov_SC04_015_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9e518, data, tail4] + - [0x9e518, data, tail5] - [0x9e51c, .rodata, ov_SC04_015_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9e530, data, tail5] + - [0x9e530, data, tail6] - [0x9e56c, .rodata, ov_SC04_015_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9e5d0, data, tail6] + - [0x9e5d0, data, tail7] - [0x9ebdc, .rodata, ov_SC04_015_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ec10, data, tail7] + - [0x9ec10, data, tail8] - [0x9ec14, .rodata, ov_SC04_015_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ec48, data, tail8] + - [0x9ec48, data, tail9] - [0x9ec84, .rodata, ov_SC04_015_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ec98, data, tail9] + - [0x9ec98, data, tail10] - [0x9ecb0, .rodata, ov_SC04_015_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ed1c, data, tail10] + - [0x9ed1c, data, tail11] - [0x9ed8c, .rodata, ov_SC04_015_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x9edd0, .rodata, ov_SC04_015_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ee18, data, tail11] + - [0x9ee18, data, tail12] - [0x9ee78, .rodata, ov_SC04_015_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9eeac, data, tail12] + - [0x9eeac, data, tail13] - [0x9eeb0, .rodata, ov_SC04_015_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9eecc, data, tail13] + - [0x9eecc, data, tail14] - [0x9eed0, .rodata, ov_SC04_015_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9eeec, data, tail14] + - [0x9eeec, data, tail15] - [0x9ef10, .rodata, ov_SC04_015_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ef2c, data, tail15] + - [0x9ef2c, data, tail16] - [0x9ef44, .rodata, ov_SC04_015_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9ef64, data, tail16] + - [0x9ef64, data, tail17] - [0x9efe4, .rodata, ov_SC04_015_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9eff8, data, tail17] + - [0x9eff8, data, tail18] - [0x9f1a0, .rodata, ov_SC04_015_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9f318, data, tail18] + - [0x9f318, data, tail19] - [0x9f3a8, .rodata, ov_SC04_015_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9f434, data, tail19] + - [0x9f434, data, tail20] - [0x9f438, .rodata, ov_SC04_015_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x9f44c, data, tail20] + - [0x9f44c, data, tail21] - [0xA1284, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xA1287] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC04_016.yaml b/config/splat.ov_SC04_016.yaml index 7d7265707..dbfe9f44e 100644 --- a/config/splat.ov_SC04_016.yaml +++ b/config/splat.ov_SC04_016.yaml @@ -118,46 +118,48 @@ segments: - [0x52cd4, c, ov_SC04_016_jr_8017AE2C] - [0x53d64, c, ov_SC04_016_jr_8017BEBC] - [0x57e58, data, tail] + - [0x7c4d0, .rodata, ov_SC04_016] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0x7c4e4, data, tail2] - [0x7c5ac, .rodata, ov_SC04_016_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7c68c, data, tail2] + - [0x7c68c, data, tail3] - [0x7c6a4, .rodata, ov_SC04_016_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7c6b8, data, tail3] + - [0x7c6b8, data, tail4] - [0x7c6bc, .rodata, ov_SC04_016_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7c6d0, data, tail4] + - [0x7c6d0, data, tail5] - [0x7c6d4, .rodata, ov_SC04_016_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7c6e8, data, tail5] + - [0x7c6e8, data, tail6] - [0x7c724, .rodata, ov_SC04_016_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7c788, data, tail6] + - [0x7c788, data, tail7] - [0x7cd94, .rodata, ov_SC04_016_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7cdc8, data, tail7] + - [0x7cdc8, data, tail8] - [0x7cdcc, .rodata, ov_SC04_016_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7ce00, data, tail8] + - [0x7ce00, data, tail9] - [0x7ce3c, .rodata, ov_SC04_016_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7ce50, data, tail9] + - [0x7ce50, data, tail10] - [0x7ce68, .rodata, ov_SC04_016_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7ced4, data, tail10] + - [0x7ced4, data, tail11] - [0x7cf44, .rodata, ov_SC04_016_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x7cf88, .rodata, ov_SC04_016_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7cfd0, data, tail11] + - [0x7cfd0, data, tail12] - [0x7d030, .rodata, ov_SC04_016_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7d064, data, tail12] + - [0x7d064, data, tail13] - [0x7d068, .rodata, ov_SC04_016_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7d084, data, tail13] + - [0x7d084, data, tail14] - [0x7d088, .rodata, ov_SC04_016_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7d0a4, data, tail14] + - [0x7d0a4, data, tail15] - [0x7d0c8, .rodata, ov_SC04_016_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7d0e4, data, tail15] + - [0x7d0e4, data, tail16] - [0x7d0fc, .rodata, ov_SC04_016_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7d11c, data, tail16] + - [0x7d11c, data, tail17] - [0x7d19c, .rodata, ov_SC04_016_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7d1b0, data, tail17] + - [0x7d1b0, data, tail18] - [0x7d358, .rodata, ov_SC04_016_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7d4d0, data, tail18] + - [0x7d4d0, data, tail19] - [0x7d560, .rodata, ov_SC04_016_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7d5ec, data, tail19] + - [0x7d5ec, data, tail20] - [0x7d5f0, .rodata, ov_SC04_016_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x7d604, .rodata, ov_SC04_016_jr_8017BEBC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x7d624, data, tail20] + - [0x7d624, data, tail21] - [0x84184, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x84187] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC04_018.yaml b/config/splat.ov_SC04_018.yaml index d21bd58ea..3ec68fa33 100644 --- a/config/splat.ov_SC04_018.yaml +++ b/config/splat.ov_SC04_018.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC04_018_jr_8017A4AC] - [0x52cd4, c, ov_SC04_018_jr_8017AE2C] - [0x64dd0, data, tail] + - [0xbc2e8, .rodata, ov_SC04_018] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xbc2fc, data, tail2] - [0xbc3c4, .rodata, ov_SC04_018_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbc4a4, data, tail2] + - [0xbc4a4, data, tail3] - [0xbc4bc, .rodata, ov_SC04_018_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbc4d0, data, tail3] + - [0xbc4d0, data, tail4] - [0xbc4d4, .rodata, ov_SC04_018_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbc4e8, data, tail4] + - [0xbc4e8, data, tail5] - [0xbc4ec, .rodata, ov_SC04_018_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbc500, data, tail5] + - [0xbc500, data, tail6] - [0xbc53c, .rodata, ov_SC04_018_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbc5a0, data, tail6] + - [0xbc5a0, data, tail7] - [0xbcbac, .rodata, ov_SC04_018_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbcbe0, data, tail7] + - [0xbcbe0, data, tail8] - [0xbcbe4, .rodata, ov_SC04_018_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbcc18, data, tail8] + - [0xbcc18, data, tail9] - [0xbcc54, .rodata, ov_SC04_018_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbcc68, data, tail9] + - [0xbcc68, data, tail10] - [0xbcc80, .rodata, ov_SC04_018_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbccec, data, tail10] + - [0xbccec, data, tail11] - [0xbcd5c, .rodata, ov_SC04_018_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xbcda0, .rodata, ov_SC04_018_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbcde8, data, tail11] + - [0xbcde8, data, tail12] - [0xbce48, .rodata, ov_SC04_018_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbce7c, data, tail12] + - [0xbce7c, data, tail13] - [0xbce80, .rodata, ov_SC04_018_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbce9c, data, tail13] + - [0xbce9c, data, tail14] - [0xbcea0, .rodata, ov_SC04_018_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbcebc, data, tail14] + - [0xbcebc, data, tail15] - [0xbcee0, .rodata, ov_SC04_018_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbcefc, data, tail15] + - [0xbcefc, data, tail16] - [0xbcf14, .rodata, ov_SC04_018_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbcf34, data, tail16] + - [0xbcf34, data, tail17] - [0xbcfb4, .rodata, ov_SC04_018_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbcfc8, data, tail17] + - [0xbcfc8, data, tail18] - [0xbd170, .rodata, ov_SC04_018_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbd2e8, data, tail18] + - [0xbd2e8, data, tail19] - [0xbd378, .rodata, ov_SC04_018_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbd404, data, tail19] + - [0xbd404, data, tail20] - [0xbd408, .rodata, ov_SC04_018_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbd41c, data, tail20] + - [0xbd41c, data, tail21] - [0xBF9CC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xBF9CF] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/config/splat.ov_SC04_019.yaml b/config/splat.ov_SC04_019.yaml index 085c6230c..e3ae4bdb6 100644 --- a/config/splat.ov_SC04_019.yaml +++ b/config/splat.ov_SC04_019.yaml @@ -117,45 +117,47 @@ segments: - [0x52354, c, ov_SC04_019_jr_8017A4AC] - [0x52cd4, c, ov_SC04_019_jr_8017AE2C] - [0x64dd0, data, tail] + - [0xbc2e8, .rodata, ov_SC04_019] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) + - [0xbc2fc, data, tail2] - [0xbc3c4, .rodata, ov_SC04_019_jr_8012ACE0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbc4a4, data, tail2] + - [0xbc4a4, data, tail3] - [0xbc4bc, .rodata, ov_SC04_019_jr_80135888] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbc4d0, data, tail3] + - [0xbc4d0, data, tail4] - [0xbc4d4, .rodata, ov_SC04_019_jr_80135A4C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbc4e8, data, tail4] + - [0xbc4e8, data, tail5] - [0xbc4ec, .rodata, ov_SC04_019_jr_80135D20] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbc500, data, tail5] + - [0xbc500, data, tail6] - [0xbc53c, .rodata, ov_SC04_019_jr_801380E0] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbc5a0, data, tail6] + - [0xbc5a0, data, tail7] - [0xbcbac, .rodata, ov_SC04_019_jr_8013F350] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbcbe0, data, tail7] + - [0xbcbe0, data, tail8] - [0xbcbe4, .rodata, ov_SC04_019_jr_8013FFD8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbcc18, data, tail8] + - [0xbcc18, data, tail9] - [0xbcc54, .rodata, ov_SC04_019_jr_80140608] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbcc68, data, tail9] + - [0xbcc68, data, tail10] - [0xbcc80, .rodata, ov_SC04_019_jr_8015444C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbccec, data, tail10] + - [0xbccec, data, tail11] - [0xbcd5c, .rodata, ov_SC04_019_jr_80154C24] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0xbcda0, .rodata, ov_SC04_019_jr_801588CC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbcde8, data, tail11] + - [0xbcde8, data, tail12] - [0xbce48, .rodata, ov_SC04_019_jr_80159C84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbce7c, data, tail12] + - [0xbce7c, data, tail13] - [0xbce80, .rodata, ov_SC04_019_jr_8015A3C8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbce9c, data, tail13] + - [0xbce9c, data, tail14] - [0xbcea0, .rodata, ov_SC04_019_jr_8015AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbcebc, data, tail14] + - [0xbcebc, data, tail15] - [0xbcee0, .rodata, ov_SC04_019_jr_8015C32C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbcefc, data, tail15] + - [0xbcefc, data, tail16] - [0xbcf14, .rodata, ov_SC04_019_jr_8016AB6C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbcf34, data, tail16] + - [0xbcf34, data, tail17] - [0xbcfb4, .rodata, ov_SC04_019_jr_801734BC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbcfc8, data, tail17] + - [0xbcfc8, data, tail18] - [0xbd170, .rodata, ov_SC04_019_jr_80178D40] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbd2e8, data, tail18] + - [0xbd2e8, data, tail19] - [0xbd378, .rodata, ov_SC04_019_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbd404, data, tail19] + - [0xbd404, data, tail20] - [0xbd408, .rodata, ov_SC04_019_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0xbd41c, data, tail20] + - [0xbd41c, data, tail21] - [0xBF9CC, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0xBF9CF] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/src/ov_SC03_093/ov_SC03_093.c b/src/ov_SC03_093/ov_SC03_093.c index 975178ca8..67b782bb3 100644 --- a/src/ov_SC03_093/ov_SC03_093.c +++ b/src/ov_SC03_093/ov_SC03_093.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_093/nonmatchings/ov_SC03_093", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801CAFA8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801CC570 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801CC66A; +extern u8 D_801CC592; +extern u8 D_801CC570; +extern u8 D_801CAFA8[]; +extern u8 D_801CAFA9[]; +extern u8 D_801CAFAA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801CC66A; + g = D_801CC592; + b = D_801CC570; + D_801CAFA8[0] = r * 5 >> 3; + D_801CAFA9[0] = g << 3; + D_801CAFAA[0] = (s32)(b * 255) >> 4; + D_801CAFA8[4] = (s32)(r * 143) >> 4; + D_801CAFA9[4] = g * 25 >> 1; + D_801CAFAA[4] = (s32)(b * 255) >> 4; + D_801CAFA8[8] = (s32)(r * 255) >> 4; + D_801CAFA9[8] = (s32)(g * 255) >> 4; + D_801CAFAA[8] = (s32)(b * 255) >> 4; + D_801CAFA8[12] = (s32)(r * 143) >> 4; + D_801CAFA9[12] = (s32)(g * 255) >> 4; + D_801CAFAA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801CAFA8[i] = arg2[0x44] * D_801CC66A >> 4; + D_801CAFA9[i] = arg2[0x45] * D_801CC592 >> 4; + D_801CAFAA[i] = arg2[0x46] * D_801CC570 >> 4; + i = (arg1 + 1) * 4; + D_801CAFA8[i] = arg2[0x47] * D_801CC66A >> 4; + D_801CAFA9[i] = arg2[0x48] * D_801CC592 >> 4; + D_801CAFAA[i] = arg2[0x49] * D_801CC570 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801CC66A << 3; + arg2[0x21] = D_801CC592 << 3; + arg2[0x22] = D_801CC570 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_094/ov_SC03_094.c b/src/ov_SC03_094/ov_SC03_094.c index 2f618ee62..210485572 100644 --- a/src/ov_SC03_094/ov_SC03_094.c +++ b/src/ov_SC03_094/ov_SC03_094.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801D1DE8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801D3128 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801D3222; +extern u8 D_801D314A; +extern u8 D_801D3128; +extern u8 D_801D1DE8[]; +extern u8 D_801D1DE9[]; +extern u8 D_801D1DEA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801D3222; + g = D_801D314A; + b = D_801D3128; + D_801D1DE8[0] = r * 5 >> 3; + D_801D1DE9[0] = g << 3; + D_801D1DEA[0] = (s32)(b * 255) >> 4; + D_801D1DE8[4] = (s32)(r * 143) >> 4; + D_801D1DE9[4] = g * 25 >> 1; + D_801D1DEA[4] = (s32)(b * 255) >> 4; + D_801D1DE8[8] = (s32)(r * 255) >> 4; + D_801D1DE9[8] = (s32)(g * 255) >> 4; + D_801D1DEA[8] = (s32)(b * 255) >> 4; + D_801D1DE8[12] = (s32)(r * 143) >> 4; + D_801D1DE9[12] = (s32)(g * 255) >> 4; + D_801D1DEA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801D1DE8[i] = arg2[0x44] * D_801D3222 >> 4; + D_801D1DE9[i] = arg2[0x45] * D_801D314A >> 4; + D_801D1DEA[i] = arg2[0x46] * D_801D3128 >> 4; + i = (arg1 + 1) * 4; + D_801D1DE8[i] = arg2[0x47] * D_801D3222 >> 4; + D_801D1DE9[i] = arg2[0x48] * D_801D314A >> 4; + D_801D1DEA[i] = arg2[0x49] * D_801D3128 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801D3222 << 3; + arg2[0x21] = D_801D314A << 3; + arg2[0x22] = D_801D3128 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_095/ov_SC03_095.c b/src/ov_SC03_095/ov_SC03_095.c index 257f4e52e..42ca99a81 100644 --- a/src/ov_SC03_095/ov_SC03_095.c +++ b/src/ov_SC03_095/ov_SC03_095.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_095/nonmatchings/ov_SC03_095", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_8019A9E0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_8019BD28 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_8019BE22; +extern u8 D_8019BD4A; +extern u8 D_8019BD28; +extern u8 D_8019A9E0[]; +extern u8 D_8019A9E1[]; +extern u8 D_8019A9E2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_8019BE22; + g = D_8019BD4A; + b = D_8019BD28; + D_8019A9E0[0] = r * 5 >> 3; + D_8019A9E1[0] = g << 3; + D_8019A9E2[0] = (s32)(b * 255) >> 4; + D_8019A9E0[4] = (s32)(r * 143) >> 4; + D_8019A9E1[4] = g * 25 >> 1; + D_8019A9E2[4] = (s32)(b * 255) >> 4; + D_8019A9E0[8] = (s32)(r * 255) >> 4; + D_8019A9E1[8] = (s32)(g * 255) >> 4; + D_8019A9E2[8] = (s32)(b * 255) >> 4; + D_8019A9E0[12] = (s32)(r * 143) >> 4; + D_8019A9E1[12] = (s32)(g * 255) >> 4; + D_8019A9E2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_8019A9E0[i] = arg2[0x44] * D_8019BE22 >> 4; + D_8019A9E1[i] = arg2[0x45] * D_8019BD4A >> 4; + D_8019A9E2[i] = arg2[0x46] * D_8019BD28 >> 4; + i = (arg1 + 1) * 4; + D_8019A9E0[i] = arg2[0x47] * D_8019BE22 >> 4; + D_8019A9E1[i] = arg2[0x48] * D_8019BD4A >> 4; + D_8019A9E2[i] = arg2[0x49] * D_8019BD28 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_8019BE22 << 3; + arg2[0x21] = D_8019BD4A << 3; + arg2[0x22] = D_8019BD28 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_096/ov_SC03_096.c b/src/ov_SC03_096/ov_SC03_096.c index 7f6a49d6b..58f7f656d 100644 --- a/src/ov_SC03_096/ov_SC03_096.c +++ b/src/ov_SC03_096/ov_SC03_096.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_096/nonmatchings/ov_SC03_096", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_80199498/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_8019A7E0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_8019A8DA; +extern u8 D_8019A802; +extern u8 D_8019A7E0; +extern u8 D_80199498[]; +extern u8 D_80199499[]; +extern u8 D_8019949A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_8019A8DA; + g = D_8019A802; + b = D_8019A7E0; + D_80199498[0] = r * 5 >> 3; + D_80199499[0] = g << 3; + D_8019949A[0] = (s32)(b * 255) >> 4; + D_80199498[4] = (s32)(r * 143) >> 4; + D_80199499[4] = g * 25 >> 1; + D_8019949A[4] = (s32)(b * 255) >> 4; + D_80199498[8] = (s32)(r * 255) >> 4; + D_80199499[8] = (s32)(g * 255) >> 4; + D_8019949A[8] = (s32)(b * 255) >> 4; + D_80199498[12] = (s32)(r * 143) >> 4; + D_80199499[12] = (s32)(g * 255) >> 4; + D_8019949A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_80199498[i] = arg2[0x44] * D_8019A8DA >> 4; + D_80199499[i] = arg2[0x45] * D_8019A802 >> 4; + D_8019949A[i] = arg2[0x46] * D_8019A7E0 >> 4; + i = (arg1 + 1) * 4; + D_80199498[i] = arg2[0x47] * D_8019A8DA >> 4; + D_80199499[i] = arg2[0x48] * D_8019A802 >> 4; + D_8019949A[i] = arg2[0x49] * D_8019A7E0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_8019A8DA << 3; + arg2[0x21] = D_8019A802 << 3; + arg2[0x22] = D_8019A7E0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_097/ov_SC03_097.c b/src/ov_SC03_097/ov_SC03_097.c index d4b9d60d7..0b9da6f00 100644 --- a/src/ov_SC03_097/ov_SC03_097.c +++ b/src/ov_SC03_097/ov_SC03_097.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_097/nonmatchings/ov_SC03_097", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801A9520/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801AAD60 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801AAE5A; +extern u8 D_801AAD82; +extern u8 D_801AAD60; +extern u8 D_801A9520[]; +extern u8 D_801A9521[]; +extern u8 D_801A9522[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801AAE5A; + g = D_801AAD82; + b = D_801AAD60; + D_801A9520[0] = r * 5 >> 3; + D_801A9521[0] = g << 3; + D_801A9522[0] = (s32)(b * 255) >> 4; + D_801A9520[4] = (s32)(r * 143) >> 4; + D_801A9521[4] = g * 25 >> 1; + D_801A9522[4] = (s32)(b * 255) >> 4; + D_801A9520[8] = (s32)(r * 255) >> 4; + D_801A9521[8] = (s32)(g * 255) >> 4; + D_801A9522[8] = (s32)(b * 255) >> 4; + D_801A9520[12] = (s32)(r * 143) >> 4; + D_801A9521[12] = (s32)(g * 255) >> 4; + D_801A9522[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801A9520[i] = arg2[0x44] * D_801AAE5A >> 4; + D_801A9521[i] = arg2[0x45] * D_801AAD82 >> 4; + D_801A9522[i] = arg2[0x46] * D_801AAD60 >> 4; + i = (arg1 + 1) * 4; + D_801A9520[i] = arg2[0x47] * D_801AAE5A >> 4; + D_801A9521[i] = arg2[0x48] * D_801AAD82 >> 4; + D_801A9522[i] = arg2[0x49] * D_801AAD60 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801AAE5A << 3; + arg2[0x21] = D_801AAD82 << 3; + arg2[0x22] = D_801AAD60 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_098/ov_SC03_098.c b/src/ov_SC03_098/ov_SC03_098.c index 862d1f9be..7b07aa4ee 100644 --- a/src/ov_SC03_098/ov_SC03_098.c +++ b/src/ov_SC03_098/ov_SC03_098.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801C4190/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801C5748 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801C5842; +extern u8 D_801C576A; +extern u8 D_801C5748; +extern u8 D_801C4190[]; +extern u8 D_801C4191[]; +extern u8 D_801C4192[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801C5842; + g = D_801C576A; + b = D_801C5748; + D_801C4190[0] = r * 5 >> 3; + D_801C4191[0] = g << 3; + D_801C4192[0] = (s32)(b * 255) >> 4; + D_801C4190[4] = (s32)(r * 143) >> 4; + D_801C4191[4] = g * 25 >> 1; + D_801C4192[4] = (s32)(b * 255) >> 4; + D_801C4190[8] = (s32)(r * 255) >> 4; + D_801C4191[8] = (s32)(g * 255) >> 4; + D_801C4192[8] = (s32)(b * 255) >> 4; + D_801C4190[12] = (s32)(r * 143) >> 4; + D_801C4191[12] = (s32)(g * 255) >> 4; + D_801C4192[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801C4190[i] = arg2[0x44] * D_801C5842 >> 4; + D_801C4191[i] = arg2[0x45] * D_801C576A >> 4; + D_801C4192[i] = arg2[0x46] * D_801C5748 >> 4; + i = (arg1 + 1) * 4; + D_801C4190[i] = arg2[0x47] * D_801C5842 >> 4; + D_801C4191[i] = arg2[0x48] * D_801C576A >> 4; + D_801C4192[i] = arg2[0x49] * D_801C5748 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801C5842 << 3; + arg2[0x21] = D_801C576A << 3; + arg2[0x22] = D_801C5748 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_099/ov_SC03_099.c b/src/ov_SC03_099/ov_SC03_099.c index 55fc78bc4..b65de32c5 100644 --- a/src/ov_SC03_099/ov_SC03_099.c +++ b/src/ov_SC03_099/ov_SC03_099.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_099/nonmatchings/ov_SC03_099", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801BDE60/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801BF2F0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801BF3EA; +extern u8 D_801BF312; +extern u8 D_801BF2F0; +extern u8 D_801BDE60[]; +extern u8 D_801BDE61[]; +extern u8 D_801BDE62[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801BF3EA; + g = D_801BF312; + b = D_801BF2F0; + D_801BDE60[0] = r * 5 >> 3; + D_801BDE61[0] = g << 3; + D_801BDE62[0] = (s32)(b * 255) >> 4; + D_801BDE60[4] = (s32)(r * 143) >> 4; + D_801BDE61[4] = g * 25 >> 1; + D_801BDE62[4] = (s32)(b * 255) >> 4; + D_801BDE60[8] = (s32)(r * 255) >> 4; + D_801BDE61[8] = (s32)(g * 255) >> 4; + D_801BDE62[8] = (s32)(b * 255) >> 4; + D_801BDE60[12] = (s32)(r * 143) >> 4; + D_801BDE61[12] = (s32)(g * 255) >> 4; + D_801BDE62[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801BDE60[i] = arg2[0x44] * D_801BF3EA >> 4; + D_801BDE61[i] = arg2[0x45] * D_801BF312 >> 4; + D_801BDE62[i] = arg2[0x46] * D_801BF2F0 >> 4; + i = (arg1 + 1) * 4; + D_801BDE60[i] = arg2[0x47] * D_801BF3EA >> 4; + D_801BDE61[i] = arg2[0x48] * D_801BF312 >> 4; + D_801BDE62[i] = arg2[0x49] * D_801BF2F0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801BF3EA << 3; + arg2[0x21] = D_801BF312 << 3; + arg2[0x22] = D_801BF2F0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_100/ov_SC03_100.c b/src/ov_SC03_100/ov_SC03_100.c index 31630b2bf..25be0db8e 100644 --- a/src/ov_SC03_100/ov_SC03_100.c +++ b/src/ov_SC03_100/ov_SC03_100.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_100/nonmatchings/ov_SC03_100", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801C70E8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801C87F8 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801C88F2; +extern u8 D_801C881A; +extern u8 D_801C87F8; +extern u8 D_801C70E8[]; +extern u8 D_801C70E9[]; +extern u8 D_801C70EA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801C88F2; + g = D_801C881A; + b = D_801C87F8; + D_801C70E8[0] = r * 5 >> 3; + D_801C70E9[0] = g << 3; + D_801C70EA[0] = (s32)(b * 255) >> 4; + D_801C70E8[4] = (s32)(r * 143) >> 4; + D_801C70E9[4] = g * 25 >> 1; + D_801C70EA[4] = (s32)(b * 255) >> 4; + D_801C70E8[8] = (s32)(r * 255) >> 4; + D_801C70E9[8] = (s32)(g * 255) >> 4; + D_801C70EA[8] = (s32)(b * 255) >> 4; + D_801C70E8[12] = (s32)(r * 143) >> 4; + D_801C70E9[12] = (s32)(g * 255) >> 4; + D_801C70EA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801C70E8[i] = arg2[0x44] * D_801C88F2 >> 4; + D_801C70E9[i] = arg2[0x45] * D_801C881A >> 4; + D_801C70EA[i] = arg2[0x46] * D_801C87F8 >> 4; + i = (arg1 + 1) * 4; + D_801C70E8[i] = arg2[0x47] * D_801C88F2 >> 4; + D_801C70E9[i] = arg2[0x48] * D_801C881A >> 4; + D_801C70EA[i] = arg2[0x49] * D_801C87F8 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801C88F2 << 3; + arg2[0x21] = D_801C881A << 3; + arg2[0x22] = D_801C87F8 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_101/ov_SC03_101.c b/src/ov_SC03_101/ov_SC03_101.c index 651cdb240..93badad1b 100644 --- a/src/ov_SC03_101/ov_SC03_101.c +++ b/src/ov_SC03_101/ov_SC03_101.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_101/nonmatchings/ov_SC03_101", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_8019C9B0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_8019E0B8 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_8019E1B2; +extern u8 D_8019E0DA; +extern u8 D_8019E0B8; +extern u8 D_8019C9B0[]; +extern u8 D_8019C9B1[]; +extern u8 D_8019C9B2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_8019E1B2; + g = D_8019E0DA; + b = D_8019E0B8; + D_8019C9B0[0] = r * 5 >> 3; + D_8019C9B1[0] = g << 3; + D_8019C9B2[0] = (s32)(b * 255) >> 4; + D_8019C9B0[4] = (s32)(r * 143) >> 4; + D_8019C9B1[4] = g * 25 >> 1; + D_8019C9B2[4] = (s32)(b * 255) >> 4; + D_8019C9B0[8] = (s32)(r * 255) >> 4; + D_8019C9B1[8] = (s32)(g * 255) >> 4; + D_8019C9B2[8] = (s32)(b * 255) >> 4; + D_8019C9B0[12] = (s32)(r * 143) >> 4; + D_8019C9B1[12] = (s32)(g * 255) >> 4; + D_8019C9B2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_8019C9B0[i] = arg2[0x44] * D_8019E1B2 >> 4; + D_8019C9B1[i] = arg2[0x45] * D_8019E0DA >> 4; + D_8019C9B2[i] = arg2[0x46] * D_8019E0B8 >> 4; + i = (arg1 + 1) * 4; + D_8019C9B0[i] = arg2[0x47] * D_8019E1B2 >> 4; + D_8019C9B1[i] = arg2[0x48] * D_8019E0DA >> 4; + D_8019C9B2[i] = arg2[0x49] * D_8019E0B8 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_8019E1B2 << 3; + arg2[0x21] = D_8019E0DA << 3; + arg2[0x22] = D_8019E0B8 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_102/ov_SC03_102.c b/src/ov_SC03_102/ov_SC03_102.c index 1e8b8f803..9b0624c54 100644 --- a/src/ov_SC03_102/ov_SC03_102.c +++ b/src/ov_SC03_102/ov_SC03_102.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_102/nonmatchings/ov_SC03_102", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801B8628/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801B9AB8 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801B9BB2; +extern u8 D_801B9ADA; +extern u8 D_801B9AB8; +extern u8 D_801B8628[]; +extern u8 D_801B8629[]; +extern u8 D_801B862A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801B9BB2; + g = D_801B9ADA; + b = D_801B9AB8; + D_801B8628[0] = r * 5 >> 3; + D_801B8629[0] = g << 3; + D_801B862A[0] = (s32)(b * 255) >> 4; + D_801B8628[4] = (s32)(r * 143) >> 4; + D_801B8629[4] = g * 25 >> 1; + D_801B862A[4] = (s32)(b * 255) >> 4; + D_801B8628[8] = (s32)(r * 255) >> 4; + D_801B8629[8] = (s32)(g * 255) >> 4; + D_801B862A[8] = (s32)(b * 255) >> 4; + D_801B8628[12] = (s32)(r * 143) >> 4; + D_801B8629[12] = (s32)(g * 255) >> 4; + D_801B862A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801B8628[i] = arg2[0x44] * D_801B9BB2 >> 4; + D_801B8629[i] = arg2[0x45] * D_801B9ADA >> 4; + D_801B862A[i] = arg2[0x46] * D_801B9AB8 >> 4; + i = (arg1 + 1) * 4; + D_801B8628[i] = arg2[0x47] * D_801B9BB2 >> 4; + D_801B8629[i] = arg2[0x48] * D_801B9ADA >> 4; + D_801B862A[i] = arg2[0x49] * D_801B9AB8 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801B9BB2 << 3; + arg2[0x21] = D_801B9ADA << 3; + arg2[0x22] = D_801B9AB8 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_103/ov_SC03_103.c b/src/ov_SC03_103/ov_SC03_103.c index 5ac720a30..55c5163b4 100644 --- a/src/ov_SC03_103/ov_SC03_103.c +++ b/src/ov_SC03_103/ov_SC03_103.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_103/nonmatchings/ov_SC03_103", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801C37E0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801C4C68 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801C4D62; +extern u8 D_801C4C8A; +extern u8 D_801C4C68; +extern u8 D_801C37E0[]; +extern u8 D_801C37E1[]; +extern u8 D_801C37E2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801C4D62; + g = D_801C4C8A; + b = D_801C4C68; + D_801C37E0[0] = r * 5 >> 3; + D_801C37E1[0] = g << 3; + D_801C37E2[0] = (s32)(b * 255) >> 4; + D_801C37E0[4] = (s32)(r * 143) >> 4; + D_801C37E1[4] = g * 25 >> 1; + D_801C37E2[4] = (s32)(b * 255) >> 4; + D_801C37E0[8] = (s32)(r * 255) >> 4; + D_801C37E1[8] = (s32)(g * 255) >> 4; + D_801C37E2[8] = (s32)(b * 255) >> 4; + D_801C37E0[12] = (s32)(r * 143) >> 4; + D_801C37E1[12] = (s32)(g * 255) >> 4; + D_801C37E2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801C37E0[i] = arg2[0x44] * D_801C4D62 >> 4; + D_801C37E1[i] = arg2[0x45] * D_801C4C8A >> 4; + D_801C37E2[i] = arg2[0x46] * D_801C4C68 >> 4; + i = (arg1 + 1) * 4; + D_801C37E0[i] = arg2[0x47] * D_801C4D62 >> 4; + D_801C37E1[i] = arg2[0x48] * D_801C4C8A >> 4; + D_801C37E2[i] = arg2[0x49] * D_801C4C68 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801C4D62 << 3; + arg2[0x21] = D_801C4C8A << 3; + arg2[0x22] = D_801C4C68 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_104/ov_SC03_104.c b/src/ov_SC03_104/ov_SC03_104.c index a3278cf2c..97d706292 100644 --- a/src/ov_SC03_104/ov_SC03_104.c +++ b/src/ov_SC03_104/ov_SC03_104.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_104/nonmatchings/ov_SC03_104", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801BED78/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801C0328 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801C0422; +extern u8 D_801C034A; +extern u8 D_801C0328; +extern u8 D_801BED78[]; +extern u8 D_801BED79[]; +extern u8 D_801BED7A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801C0422; + g = D_801C034A; + b = D_801C0328; + D_801BED78[0] = r * 5 >> 3; + D_801BED79[0] = g << 3; + D_801BED7A[0] = (s32)(b * 255) >> 4; + D_801BED78[4] = (s32)(r * 143) >> 4; + D_801BED79[4] = g * 25 >> 1; + D_801BED7A[4] = (s32)(b * 255) >> 4; + D_801BED78[8] = (s32)(r * 255) >> 4; + D_801BED79[8] = (s32)(g * 255) >> 4; + D_801BED7A[8] = (s32)(b * 255) >> 4; + D_801BED78[12] = (s32)(r * 143) >> 4; + D_801BED79[12] = (s32)(g * 255) >> 4; + D_801BED7A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801BED78[i] = arg2[0x44] * D_801C0422 >> 4; + D_801BED79[i] = arg2[0x45] * D_801C034A >> 4; + D_801BED7A[i] = arg2[0x46] * D_801C0328 >> 4; + i = (arg1 + 1) * 4; + D_801BED78[i] = arg2[0x47] * D_801C0422 >> 4; + D_801BED79[i] = arg2[0x48] * D_801C034A >> 4; + D_801BED7A[i] = arg2[0x49] * D_801C0328 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801C0422 << 3; + arg2[0x21] = D_801C034A << 3; + arg2[0x22] = D_801C0328 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_105/ov_SC03_105.c b/src/ov_SC03_105/ov_SC03_105.c index 39faeaf8c..534a47c7e 100644 --- a/src/ov_SC03_105/ov_SC03_105.c +++ b/src/ov_SC03_105/ov_SC03_105.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_105/nonmatchings/ov_SC03_105", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801B8308/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801BCBA8 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801BCCAA; +extern u8 D_801BCBD2; +extern u8 D_801BCBA8; +extern u8 D_801B8308[]; +extern u8 D_801B8309[]; +extern u8 D_801B830A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801BCCAA; + g = D_801BCBD2; + b = D_801BCBA8; + D_801B8308[0] = r * 5 >> 3; + D_801B8309[0] = g << 3; + D_801B830A[0] = (s32)(b * 255) >> 4; + D_801B8308[4] = (s32)(r * 143) >> 4; + D_801B8309[4] = g * 25 >> 1; + D_801B830A[4] = (s32)(b * 255) >> 4; + D_801B8308[8] = (s32)(r * 255) >> 4; + D_801B8309[8] = (s32)(g * 255) >> 4; + D_801B830A[8] = (s32)(b * 255) >> 4; + D_801B8308[12] = (s32)(r * 143) >> 4; + D_801B8309[12] = (s32)(g * 255) >> 4; + D_801B830A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801B8308[i] = arg2[0x44] * D_801BCCAA >> 4; + D_801B8309[i] = arg2[0x45] * D_801BCBD2 >> 4; + D_801B830A[i] = arg2[0x46] * D_801BCBA8 >> 4; + i = (arg1 + 1) * 4; + D_801B8308[i] = arg2[0x47] * D_801BCCAA >> 4; + D_801B8309[i] = arg2[0x48] * D_801BCBD2 >> 4; + D_801B830A[i] = arg2[0x49] * D_801BCBA8 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801BCCAA << 3; + arg2[0x21] = D_801BCBD2 << 3; + arg2[0x22] = D_801BCBA8 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_108/ov_SC03_108.c b/src/ov_SC03_108/ov_SC03_108.c index 12b0761c6..5e5de853b 100644 --- a/src/ov_SC03_108/ov_SC03_108.c +++ b/src/ov_SC03_108/ov_SC03_108.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_108/nonmatchings/ov_SC03_108", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801A05F8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801A1938 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801A1A32; +extern u8 D_801A195A; +extern u8 D_801A1938; +extern u8 D_801A05F8[]; +extern u8 D_801A05F9[]; +extern u8 D_801A05FA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801A1A32; + g = D_801A195A; + b = D_801A1938; + D_801A05F8[0] = r * 5 >> 3; + D_801A05F9[0] = g << 3; + D_801A05FA[0] = (s32)(b * 255) >> 4; + D_801A05F8[4] = (s32)(r * 143) >> 4; + D_801A05F9[4] = g * 25 >> 1; + D_801A05FA[4] = (s32)(b * 255) >> 4; + D_801A05F8[8] = (s32)(r * 255) >> 4; + D_801A05F9[8] = (s32)(g * 255) >> 4; + D_801A05FA[8] = (s32)(b * 255) >> 4; + D_801A05F8[12] = (s32)(r * 143) >> 4; + D_801A05F9[12] = (s32)(g * 255) >> 4; + D_801A05FA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801A05F8[i] = arg2[0x44] * D_801A1A32 >> 4; + D_801A05F9[i] = arg2[0x45] * D_801A195A >> 4; + D_801A05FA[i] = arg2[0x46] * D_801A1938 >> 4; + i = (arg1 + 1) * 4; + D_801A05F8[i] = arg2[0x47] * D_801A1A32 >> 4; + D_801A05F9[i] = arg2[0x48] * D_801A195A >> 4; + D_801A05FA[i] = arg2[0x49] * D_801A1938 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801A1A32 << 3; + arg2[0x21] = D_801A195A << 3; + arg2[0x22] = D_801A1938 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_109/ov_SC03_109.c b/src/ov_SC03_109/ov_SC03_109.c index 6fb465abc..fb2c2c5e4 100644 --- a/src/ov_SC03_109/ov_SC03_109.c +++ b/src/ov_SC03_109/ov_SC03_109.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_109/nonmatchings/ov_SC03_109", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_80199008/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_8019A340 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_8019A43A; +extern u8 D_8019A362; +extern u8 D_8019A340; +extern u8 D_80199008[]; +extern u8 D_80199009[]; +extern u8 D_8019900A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_8019A43A; + g = D_8019A362; + b = D_8019A340; + D_80199008[0] = r * 5 >> 3; + D_80199009[0] = g << 3; + D_8019900A[0] = (s32)(b * 255) >> 4; + D_80199008[4] = (s32)(r * 143) >> 4; + D_80199009[4] = g * 25 >> 1; + D_8019900A[4] = (s32)(b * 255) >> 4; + D_80199008[8] = (s32)(r * 255) >> 4; + D_80199009[8] = (s32)(g * 255) >> 4; + D_8019900A[8] = (s32)(b * 255) >> 4; + D_80199008[12] = (s32)(r * 143) >> 4; + D_80199009[12] = (s32)(g * 255) >> 4; + D_8019900A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_80199008[i] = arg2[0x44] * D_8019A43A >> 4; + D_80199009[i] = arg2[0x45] * D_8019A362 >> 4; + D_8019900A[i] = arg2[0x46] * D_8019A340 >> 4; + i = (arg1 + 1) * 4; + D_80199008[i] = arg2[0x47] * D_8019A43A >> 4; + D_80199009[i] = arg2[0x48] * D_8019A362 >> 4; + D_8019900A[i] = arg2[0x49] * D_8019A340 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_8019A43A << 3; + arg2[0x21] = D_8019A362 << 3; + arg2[0x22] = D_8019A340 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_110/ov_SC03_110.c b/src/ov_SC03_110/ov_SC03_110.c index 885c52bab..f0f1dc3a4 100644 --- a/src/ov_SC03_110/ov_SC03_110.c +++ b/src/ov_SC03_110/ov_SC03_110.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_110/nonmatchings/ov_SC03_110", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801A0DB0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801A2370 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801A246A; +extern u8 D_801A2392; +extern u8 D_801A2370; +extern u8 D_801A0DB0[]; +extern u8 D_801A0DB1[]; +extern u8 D_801A0DB2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801A246A; + g = D_801A2392; + b = D_801A2370; + D_801A0DB0[0] = r * 5 >> 3; + D_801A0DB1[0] = g << 3; + D_801A0DB2[0] = (s32)(b * 255) >> 4; + D_801A0DB0[4] = (s32)(r * 143) >> 4; + D_801A0DB1[4] = g * 25 >> 1; + D_801A0DB2[4] = (s32)(b * 255) >> 4; + D_801A0DB0[8] = (s32)(r * 255) >> 4; + D_801A0DB1[8] = (s32)(g * 255) >> 4; + D_801A0DB2[8] = (s32)(b * 255) >> 4; + D_801A0DB0[12] = (s32)(r * 143) >> 4; + D_801A0DB1[12] = (s32)(g * 255) >> 4; + D_801A0DB2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801A0DB0[i] = arg2[0x44] * D_801A246A >> 4; + D_801A0DB1[i] = arg2[0x45] * D_801A2392 >> 4; + D_801A0DB2[i] = arg2[0x46] * D_801A2370 >> 4; + i = (arg1 + 1) * 4; + D_801A0DB0[i] = arg2[0x47] * D_801A246A >> 4; + D_801A0DB1[i] = arg2[0x48] * D_801A2392 >> 4; + D_801A0DB2[i] = arg2[0x49] * D_801A2370 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801A246A << 3; + arg2[0x21] = D_801A2392 << 3; + arg2[0x22] = D_801A2370 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_111/ov_SC03_111.c b/src/ov_SC03_111/ov_SC03_111.c index c0636eec8..253a492c3 100644 --- a/src/ov_SC03_111/ov_SC03_111.c +++ b/src/ov_SC03_111/ov_SC03_111.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_111/nonmatchings/ov_SC03_111", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801B82B8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801B9A18 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801B9B12; +extern u8 D_801B9A3A; +extern u8 D_801B9A18; +extern u8 D_801B82B8[]; +extern u8 D_801B82B9[]; +extern u8 D_801B82BA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801B9B12; + g = D_801B9A3A; + b = D_801B9A18; + D_801B82B8[0] = r * 5 >> 3; + D_801B82B9[0] = g << 3; + D_801B82BA[0] = (s32)(b * 255) >> 4; + D_801B82B8[4] = (s32)(r * 143) >> 4; + D_801B82B9[4] = g * 25 >> 1; + D_801B82BA[4] = (s32)(b * 255) >> 4; + D_801B82B8[8] = (s32)(r * 255) >> 4; + D_801B82B9[8] = (s32)(g * 255) >> 4; + D_801B82BA[8] = (s32)(b * 255) >> 4; + D_801B82B8[12] = (s32)(r * 143) >> 4; + D_801B82B9[12] = (s32)(g * 255) >> 4; + D_801B82BA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801B82B8[i] = arg2[0x44] * D_801B9B12 >> 4; + D_801B82B9[i] = arg2[0x45] * D_801B9A3A >> 4; + D_801B82BA[i] = arg2[0x46] * D_801B9A18 >> 4; + i = (arg1 + 1) * 4; + D_801B82B8[i] = arg2[0x47] * D_801B9B12 >> 4; + D_801B82B9[i] = arg2[0x48] * D_801B9A3A >> 4; + D_801B82BA[i] = arg2[0x49] * D_801B9A18 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801B9B12 << 3; + arg2[0x21] = D_801B9A3A << 3; + arg2[0x22] = D_801B9A18 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_112/ov_SC03_112.c b/src/ov_SC03_112/ov_SC03_112.c index b78eef661..d55727990 100644 --- a/src/ov_SC03_112/ov_SC03_112.c +++ b/src/ov_SC03_112/ov_SC03_112.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_112/nonmatchings/ov_SC03_112", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801ABB18/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801ACFE0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801AD0DA; +extern u8 D_801AD002; +extern u8 D_801ACFE0; +extern u8 D_801ABB18[]; +extern u8 D_801ABB19[]; +extern u8 D_801ABB1A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801AD0DA; + g = D_801AD002; + b = D_801ACFE0; + D_801ABB18[0] = r * 5 >> 3; + D_801ABB19[0] = g << 3; + D_801ABB1A[0] = (s32)(b * 255) >> 4; + D_801ABB18[4] = (s32)(r * 143) >> 4; + D_801ABB19[4] = g * 25 >> 1; + D_801ABB1A[4] = (s32)(b * 255) >> 4; + D_801ABB18[8] = (s32)(r * 255) >> 4; + D_801ABB19[8] = (s32)(g * 255) >> 4; + D_801ABB1A[8] = (s32)(b * 255) >> 4; + D_801ABB18[12] = (s32)(r * 143) >> 4; + D_801ABB19[12] = (s32)(g * 255) >> 4; + D_801ABB1A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801ABB18[i] = arg2[0x44] * D_801AD0DA >> 4; + D_801ABB19[i] = arg2[0x45] * D_801AD002 >> 4; + D_801ABB1A[i] = arg2[0x46] * D_801ACFE0 >> 4; + i = (arg1 + 1) * 4; + D_801ABB18[i] = arg2[0x47] * D_801AD0DA >> 4; + D_801ABB19[i] = arg2[0x48] * D_801AD002 >> 4; + D_801ABB1A[i] = arg2[0x49] * D_801ACFE0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801AD0DA << 3; + arg2[0x21] = D_801AD002 << 3; + arg2[0x22] = D_801ACFE0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_113/ov_SC03_113.c b/src/ov_SC03_113/ov_SC03_113.c index 1b2750b94..b92f34b60 100644 --- a/src/ov_SC03_113/ov_SC03_113.c +++ b/src/ov_SC03_113/ov_SC03_113.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_113/nonmatchings/ov_SC03_113", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801A46A8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801A5B80 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801A5C7A; +extern u8 D_801A5BA2; +extern u8 D_801A5B80; +extern u8 D_801A46A8[]; +extern u8 D_801A46A9[]; +extern u8 D_801A46AA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801A5C7A; + g = D_801A5BA2; + b = D_801A5B80; + D_801A46A8[0] = r * 5 >> 3; + D_801A46A9[0] = g << 3; + D_801A46AA[0] = (s32)(b * 255) >> 4; + D_801A46A8[4] = (s32)(r * 143) >> 4; + D_801A46A9[4] = g * 25 >> 1; + D_801A46AA[4] = (s32)(b * 255) >> 4; + D_801A46A8[8] = (s32)(r * 255) >> 4; + D_801A46A9[8] = (s32)(g * 255) >> 4; + D_801A46AA[8] = (s32)(b * 255) >> 4; + D_801A46A8[12] = (s32)(r * 143) >> 4; + D_801A46A9[12] = (s32)(g * 255) >> 4; + D_801A46AA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801A46A8[i] = arg2[0x44] * D_801A5C7A >> 4; + D_801A46A9[i] = arg2[0x45] * D_801A5BA2 >> 4; + D_801A46AA[i] = arg2[0x46] * D_801A5B80 >> 4; + i = (arg1 + 1) * 4; + D_801A46A8[i] = arg2[0x47] * D_801A5C7A >> 4; + D_801A46A9[i] = arg2[0x48] * D_801A5BA2 >> 4; + D_801A46AA[i] = arg2[0x49] * D_801A5B80 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801A5C7A << 3; + arg2[0x21] = D_801A5BA2 << 3; + arg2[0x22] = D_801A5B80 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_114/ov_SC03_114.c b/src/ov_SC03_114/ov_SC03_114.c index 4d2f5bfc7..169ea6c88 100644 --- a/src/ov_SC03_114/ov_SC03_114.c +++ b/src/ov_SC03_114/ov_SC03_114.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_114/nonmatchings/ov_SC03_114", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801A8340/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801A96F8 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801A97F2; +extern u8 D_801A971A; +extern u8 D_801A96F8; +extern u8 D_801A8340[]; +extern u8 D_801A8341[]; +extern u8 D_801A8342[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801A97F2; + g = D_801A971A; + b = D_801A96F8; + D_801A8340[0] = r * 5 >> 3; + D_801A8341[0] = g << 3; + D_801A8342[0] = (s32)(b * 255) >> 4; + D_801A8340[4] = (s32)(r * 143) >> 4; + D_801A8341[4] = g * 25 >> 1; + D_801A8342[4] = (s32)(b * 255) >> 4; + D_801A8340[8] = (s32)(r * 255) >> 4; + D_801A8341[8] = (s32)(g * 255) >> 4; + D_801A8342[8] = (s32)(b * 255) >> 4; + D_801A8340[12] = (s32)(r * 143) >> 4; + D_801A8341[12] = (s32)(g * 255) >> 4; + D_801A8342[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801A8340[i] = arg2[0x44] * D_801A97F2 >> 4; + D_801A8341[i] = arg2[0x45] * D_801A971A >> 4; + D_801A8342[i] = arg2[0x46] * D_801A96F8 >> 4; + i = (arg1 + 1) * 4; + D_801A8340[i] = arg2[0x47] * D_801A97F2 >> 4; + D_801A8341[i] = arg2[0x48] * D_801A971A >> 4; + D_801A8342[i] = arg2[0x49] * D_801A96F8 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801A97F2 << 3; + arg2[0x21] = D_801A971A << 3; + arg2[0x22] = D_801A96F8 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_115/ov_SC03_115.c b/src/ov_SC03_115/ov_SC03_115.c index 3ebd3cb55..287e9a3cb 100644 --- a/src/ov_SC03_115/ov_SC03_115.c +++ b/src/ov_SC03_115/ov_SC03_115.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_115/nonmatchings/ov_SC03_115", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_80193C98/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_80194FD0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801950CA; +extern u8 D_80194FF2; +extern u8 D_80194FD0; +extern u8 D_80193C98[]; +extern u8 D_80193C99[]; +extern u8 D_80193C9A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801950CA; + g = D_80194FF2; + b = D_80194FD0; + D_80193C98[0] = r * 5 >> 3; + D_80193C99[0] = g << 3; + D_80193C9A[0] = (s32)(b * 255) >> 4; + D_80193C98[4] = (s32)(r * 143) >> 4; + D_80193C99[4] = g * 25 >> 1; + D_80193C9A[4] = (s32)(b * 255) >> 4; + D_80193C98[8] = (s32)(r * 255) >> 4; + D_80193C99[8] = (s32)(g * 255) >> 4; + D_80193C9A[8] = (s32)(b * 255) >> 4; + D_80193C98[12] = (s32)(r * 143) >> 4; + D_80193C99[12] = (s32)(g * 255) >> 4; + D_80193C9A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_80193C98[i] = arg2[0x44] * D_801950CA >> 4; + D_80193C99[i] = arg2[0x45] * D_80194FF2 >> 4; + D_80193C9A[i] = arg2[0x46] * D_80194FD0 >> 4; + i = (arg1 + 1) * 4; + D_80193C98[i] = arg2[0x47] * D_801950CA >> 4; + D_80193C99[i] = arg2[0x48] * D_80194FF2 >> 4; + D_80193C9A[i] = arg2[0x49] * D_80194FD0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801950CA << 3; + arg2[0x21] = D_80194FF2 << 3; + arg2[0x22] = D_80194FD0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_116/ov_SC03_116.c b/src/ov_SC03_116/ov_SC03_116.c index 908b88b2d..3d14dfca2 100644 --- a/src/ov_SC03_116/ov_SC03_116.c +++ b/src/ov_SC03_116/ov_SC03_116.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_116/nonmatchings/ov_SC03_116", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_80196828/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_80197BE0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_80197CDA; +extern u8 D_80197C02; +extern u8 D_80197BE0; +extern u8 D_80196828[]; +extern u8 D_80196829[]; +extern u8 D_8019682A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_80197CDA; + g = D_80197C02; + b = D_80197BE0; + D_80196828[0] = r * 5 >> 3; + D_80196829[0] = g << 3; + D_8019682A[0] = (s32)(b * 255) >> 4; + D_80196828[4] = (s32)(r * 143) >> 4; + D_80196829[4] = g * 25 >> 1; + D_8019682A[4] = (s32)(b * 255) >> 4; + D_80196828[8] = (s32)(r * 255) >> 4; + D_80196829[8] = (s32)(g * 255) >> 4; + D_8019682A[8] = (s32)(b * 255) >> 4; + D_80196828[12] = (s32)(r * 143) >> 4; + D_80196829[12] = (s32)(g * 255) >> 4; + D_8019682A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_80196828[i] = arg2[0x44] * D_80197CDA >> 4; + D_80196829[i] = arg2[0x45] * D_80197C02 >> 4; + D_8019682A[i] = arg2[0x46] * D_80197BE0 >> 4; + i = (arg1 + 1) * 4; + D_80196828[i] = arg2[0x47] * D_80197CDA >> 4; + D_80196829[i] = arg2[0x48] * D_80197C02 >> 4; + D_8019682A[i] = arg2[0x49] * D_80197BE0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_80197CDA << 3; + arg2[0x21] = D_80197C02 << 3; + arg2[0x22] = D_80197BE0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_117/ov_SC03_117.c b/src/ov_SC03_117/ov_SC03_117.c index eb995c04c..fb4c2b0dd 100644 --- a/src/ov_SC03_117/ov_SC03_117.c +++ b/src/ov_SC03_117/ov_SC03_117.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801CCFA0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801CE7D8 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801CE8D2; +extern u8 D_801CE7FA; +extern u8 D_801CE7D8; +extern u8 D_801CCFA0[]; +extern u8 D_801CCFA1[]; +extern u8 D_801CCFA2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801CE8D2; + g = D_801CE7FA; + b = D_801CE7D8; + D_801CCFA0[0] = r * 5 >> 3; + D_801CCFA1[0] = g << 3; + D_801CCFA2[0] = (s32)(b * 255) >> 4; + D_801CCFA0[4] = (s32)(r * 143) >> 4; + D_801CCFA1[4] = g * 25 >> 1; + D_801CCFA2[4] = (s32)(b * 255) >> 4; + D_801CCFA0[8] = (s32)(r * 255) >> 4; + D_801CCFA1[8] = (s32)(g * 255) >> 4; + D_801CCFA2[8] = (s32)(b * 255) >> 4; + D_801CCFA0[12] = (s32)(r * 143) >> 4; + D_801CCFA1[12] = (s32)(g * 255) >> 4; + D_801CCFA2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801CCFA0[i] = arg2[0x44] * D_801CE8D2 >> 4; + D_801CCFA1[i] = arg2[0x45] * D_801CE7FA >> 4; + D_801CCFA2[i] = arg2[0x46] * D_801CE7D8 >> 4; + i = (arg1 + 1) * 4; + D_801CCFA0[i] = arg2[0x47] * D_801CE8D2 >> 4; + D_801CCFA1[i] = arg2[0x48] * D_801CE7FA >> 4; + D_801CCFA2[i] = arg2[0x49] * D_801CE7D8 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801CE8D2 << 3; + arg2[0x21] = D_801CE7FA << 3; + arg2[0x22] = D_801CE7D8 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_118/ov_SC03_118.c b/src/ov_SC03_118/ov_SC03_118.c index 752afb7f4..4c2b35b8b 100644 --- a/src/ov_SC03_118/ov_SC03_118.c +++ b/src/ov_SC03_118/ov_SC03_118.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_118/nonmatchings/ov_SC03_118", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801D2EF0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801D46E0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801D47DA; +extern u8 D_801D4702; +extern u8 D_801D46E0; +extern u8 D_801D2EF0[]; +extern u8 D_801D2EF1[]; +extern u8 D_801D2EF2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801D47DA; + g = D_801D4702; + b = D_801D46E0; + D_801D2EF0[0] = r * 5 >> 3; + D_801D2EF1[0] = g << 3; + D_801D2EF2[0] = (s32)(b * 255) >> 4; + D_801D2EF0[4] = (s32)(r * 143) >> 4; + D_801D2EF1[4] = g * 25 >> 1; + D_801D2EF2[4] = (s32)(b * 255) >> 4; + D_801D2EF0[8] = (s32)(r * 255) >> 4; + D_801D2EF1[8] = (s32)(g * 255) >> 4; + D_801D2EF2[8] = (s32)(b * 255) >> 4; + D_801D2EF0[12] = (s32)(r * 143) >> 4; + D_801D2EF1[12] = (s32)(g * 255) >> 4; + D_801D2EF2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801D2EF0[i] = arg2[0x44] * D_801D47DA >> 4; + D_801D2EF1[i] = arg2[0x45] * D_801D4702 >> 4; + D_801D2EF2[i] = arg2[0x46] * D_801D46E0 >> 4; + i = (arg1 + 1) * 4; + D_801D2EF0[i] = arg2[0x47] * D_801D47DA >> 4; + D_801D2EF1[i] = arg2[0x48] * D_801D4702 >> 4; + D_801D2EF2[i] = arg2[0x49] * D_801D46E0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801D47DA << 3; + arg2[0x21] = D_801D4702 << 3; + arg2[0x22] = D_801D46E0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_119/ov_SC03_119.c b/src/ov_SC03_119/ov_SC03_119.c index 439d1f60f..2046e3513 100644 --- a/src/ov_SC03_119/ov_SC03_119.c +++ b/src/ov_SC03_119/ov_SC03_119.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801D2EF0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801D46E0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801D47DA; +extern u8 D_801D4702; +extern u8 D_801D46E0; +extern u8 D_801D2EF0[]; +extern u8 D_801D2EF1[]; +extern u8 D_801D2EF2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801D47DA; + g = D_801D4702; + b = D_801D46E0; + D_801D2EF0[0] = r * 5 >> 3; + D_801D2EF1[0] = g << 3; + D_801D2EF2[0] = (s32)(b * 255) >> 4; + D_801D2EF0[4] = (s32)(r * 143) >> 4; + D_801D2EF1[4] = g * 25 >> 1; + D_801D2EF2[4] = (s32)(b * 255) >> 4; + D_801D2EF0[8] = (s32)(r * 255) >> 4; + D_801D2EF1[8] = (s32)(g * 255) >> 4; + D_801D2EF2[8] = (s32)(b * 255) >> 4; + D_801D2EF0[12] = (s32)(r * 143) >> 4; + D_801D2EF1[12] = (s32)(g * 255) >> 4; + D_801D2EF2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801D2EF0[i] = arg2[0x44] * D_801D47DA >> 4; + D_801D2EF1[i] = arg2[0x45] * D_801D4702 >> 4; + D_801D2EF2[i] = arg2[0x46] * D_801D46E0 >> 4; + i = (arg1 + 1) * 4; + D_801D2EF0[i] = arg2[0x47] * D_801D47DA >> 4; + D_801D2EF1[i] = arg2[0x48] * D_801D4702 >> 4; + D_801D2EF2[i] = arg2[0x49] * D_801D46E0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801D47DA << 3; + arg2[0x21] = D_801D4702 << 3; + arg2[0x22] = D_801D46E0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_121/ov_SC03_121.c b/src/ov_SC03_121/ov_SC03_121.c index 174e01104..4ffffc4e7 100644 --- a/src/ov_SC03_121/ov_SC03_121.c +++ b/src/ov_SC03_121/ov_SC03_121.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_121/nonmatchings/ov_SC03_121", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801AD998/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801AEE40 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801AEF3A; +extern u8 D_801AEE62; +extern u8 D_801AEE40; +extern u8 D_801AD998[]; +extern u8 D_801AD999[]; +extern u8 D_801AD99A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801AEF3A; + g = D_801AEE62; + b = D_801AEE40; + D_801AD998[0] = r * 5 >> 3; + D_801AD999[0] = g << 3; + D_801AD99A[0] = (s32)(b * 255) >> 4; + D_801AD998[4] = (s32)(r * 143) >> 4; + D_801AD999[4] = g * 25 >> 1; + D_801AD99A[4] = (s32)(b * 255) >> 4; + D_801AD998[8] = (s32)(r * 255) >> 4; + D_801AD999[8] = (s32)(g * 255) >> 4; + D_801AD99A[8] = (s32)(b * 255) >> 4; + D_801AD998[12] = (s32)(r * 143) >> 4; + D_801AD999[12] = (s32)(g * 255) >> 4; + D_801AD99A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801AD998[i] = arg2[0x44] * D_801AEF3A >> 4; + D_801AD999[i] = arg2[0x45] * D_801AEE62 >> 4; + D_801AD99A[i] = arg2[0x46] * D_801AEE40 >> 4; + i = (arg1 + 1) * 4; + D_801AD998[i] = arg2[0x47] * D_801AEF3A >> 4; + D_801AD999[i] = arg2[0x48] * D_801AEE62 >> 4; + D_801AD99A[i] = arg2[0x49] * D_801AEE40 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801AEF3A << 3; + arg2[0x21] = D_801AEE62 << 3; + arg2[0x22] = D_801AEE40 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_124/ov_SC03_124.c b/src/ov_SC03_124/ov_SC03_124.c index 9202f5d42..4593d1bda 100644 --- a/src/ov_SC03_124/ov_SC03_124.c +++ b/src/ov_SC03_124/ov_SC03_124.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_124/nonmatchings/ov_SC03_124", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801E04C0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801E2448 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801E2572; +extern u8 D_801E2472; +extern u8 D_801E2448; +extern u8 D_801E04C0[]; +extern u8 D_801E04C1[]; +extern u8 D_801E04C2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801E2572; + g = D_801E2472; + b = D_801E2448; + D_801E04C0[0] = r * 5 >> 3; + D_801E04C1[0] = g << 3; + D_801E04C2[0] = (s32)(b * 255) >> 4; + D_801E04C0[4] = (s32)(r * 143) >> 4; + D_801E04C1[4] = g * 25 >> 1; + D_801E04C2[4] = (s32)(b * 255) >> 4; + D_801E04C0[8] = (s32)(r * 255) >> 4; + D_801E04C1[8] = (s32)(g * 255) >> 4; + D_801E04C2[8] = (s32)(b * 255) >> 4; + D_801E04C0[12] = (s32)(r * 143) >> 4; + D_801E04C1[12] = (s32)(g * 255) >> 4; + D_801E04C2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801E04C0[i] = arg2[0x44] * D_801E2572 >> 4; + D_801E04C1[i] = arg2[0x45] * D_801E2472 >> 4; + D_801E04C2[i] = arg2[0x46] * D_801E2448 >> 4; + i = (arg1 + 1) * 4; + D_801E04C0[i] = arg2[0x47] * D_801E2572 >> 4; + D_801E04C1[i] = arg2[0x48] * D_801E2472 >> 4; + D_801E04C2[i] = arg2[0x49] * D_801E2448 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801E2572 << 3; + arg2[0x21] = D_801E2472 << 3; + arg2[0x22] = D_801E2448 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_125/ov_SC03_125.c b/src/ov_SC03_125/ov_SC03_125.c index ce3bf3aeb..73ffe1de6 100644 --- a/src/ov_SC03_125/ov_SC03_125.c +++ b/src/ov_SC03_125/ov_SC03_125.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_125/nonmatchings/ov_SC03_125", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801C2DB8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801C43A0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801C44CA; +extern u8 D_801C43CA; +extern u8 D_801C43A0; +extern u8 D_801C2DB8[]; +extern u8 D_801C2DB9[]; +extern u8 D_801C2DBA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801C44CA; + g = D_801C43CA; + b = D_801C43A0; + D_801C2DB8[0] = r * 5 >> 3; + D_801C2DB9[0] = g << 3; + D_801C2DBA[0] = (s32)(b * 255) >> 4; + D_801C2DB8[4] = (s32)(r * 143) >> 4; + D_801C2DB9[4] = g * 25 >> 1; + D_801C2DBA[4] = (s32)(b * 255) >> 4; + D_801C2DB8[8] = (s32)(r * 255) >> 4; + D_801C2DB9[8] = (s32)(g * 255) >> 4; + D_801C2DBA[8] = (s32)(b * 255) >> 4; + D_801C2DB8[12] = (s32)(r * 143) >> 4; + D_801C2DB9[12] = (s32)(g * 255) >> 4; + D_801C2DBA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801C2DB8[i] = arg2[0x44] * D_801C44CA >> 4; + D_801C2DB9[i] = arg2[0x45] * D_801C43CA >> 4; + D_801C2DBA[i] = arg2[0x46] * D_801C43A0 >> 4; + i = (arg1 + 1) * 4; + D_801C2DB8[i] = arg2[0x47] * D_801C44CA >> 4; + D_801C2DB9[i] = arg2[0x48] * D_801C43CA >> 4; + D_801C2DBA[i] = arg2[0x49] * D_801C43A0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801C44CA << 3; + arg2[0x21] = D_801C43CA << 3; + arg2[0x22] = D_801C43A0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC03_126/ov_SC03_126.c b/src/ov_SC03_126/ov_SC03_126.c index 67f38a250..2d564a235 100644 --- a/src/ov_SC03_126/ov_SC03_126.c +++ b/src/ov_SC03_126/ov_SC03_126.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC03_126/nonmatchings/ov_SC03_126", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_8018E680/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_8018F9B8 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_8018FAB2; +extern u8 D_8018F9DA; +extern u8 D_8018F9B8; +extern u8 D_8018E680[]; +extern u8 D_8018E681[]; +extern u8 D_8018E682[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_8018FAB2; + g = D_8018F9DA; + b = D_8018F9B8; + D_8018E680[0] = r * 5 >> 3; + D_8018E681[0] = g << 3; + D_8018E682[0] = (s32)(b * 255) >> 4; + D_8018E680[4] = (s32)(r * 143) >> 4; + D_8018E681[4] = g * 25 >> 1; + D_8018E682[4] = (s32)(b * 255) >> 4; + D_8018E680[8] = (s32)(r * 255) >> 4; + D_8018E681[8] = (s32)(g * 255) >> 4; + D_8018E682[8] = (s32)(b * 255) >> 4; + D_8018E680[12] = (s32)(r * 143) >> 4; + D_8018E681[12] = (s32)(g * 255) >> 4; + D_8018E682[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_8018E680[i] = arg2[0x44] * D_8018FAB2 >> 4; + D_8018E681[i] = arg2[0x45] * D_8018F9DA >> 4; + D_8018E682[i] = arg2[0x46] * D_8018F9B8 >> 4; + i = (arg1 + 1) * 4; + D_8018E680[i] = arg2[0x47] * D_8018FAB2 >> 4; + D_8018E681[i] = arg2[0x48] * D_8018F9DA >> 4; + D_8018E682[i] = arg2[0x49] * D_8018F9B8 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_8018FAB2 << 3; + arg2[0x21] = D_8018F9DA << 3; + arg2[0x22] = D_8018F9B8 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC04_000/ov_SC04_000.c b/src/ov_SC04_000/ov_SC04_000.c index 94191ba39..39edc4fec 100644 --- a/src/ov_SC04_000/ov_SC04_000.c +++ b/src/ov_SC04_000/ov_SC04_000.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_000/nonmatchings/ov_SC04_000", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801A8730/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801AAEE8 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801AAFE2; +extern u8 D_801AAF0A; +extern u8 D_801AAEE8; +extern u8 D_801A8730[]; +extern u8 D_801A8731[]; +extern u8 D_801A8732[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801AAFE2; + g = D_801AAF0A; + b = D_801AAEE8; + D_801A8730[0] = r * 5 >> 3; + D_801A8731[0] = g << 3; + D_801A8732[0] = (s32)(b * 255) >> 4; + D_801A8730[4] = (s32)(r * 143) >> 4; + D_801A8731[4] = g * 25 >> 1; + D_801A8732[4] = (s32)(b * 255) >> 4; + D_801A8730[8] = (s32)(r * 255) >> 4; + D_801A8731[8] = (s32)(g * 255) >> 4; + D_801A8732[8] = (s32)(b * 255) >> 4; + D_801A8730[12] = (s32)(r * 143) >> 4; + D_801A8731[12] = (s32)(g * 255) >> 4; + D_801A8732[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801A8730[i] = arg2[0x44] * D_801AAFE2 >> 4; + D_801A8731[i] = arg2[0x45] * D_801AAF0A >> 4; + D_801A8732[i] = arg2[0x46] * D_801AAEE8 >> 4; + i = (arg1 + 1) * 4; + D_801A8730[i] = arg2[0x47] * D_801AAFE2 >> 4; + D_801A8731[i] = arg2[0x48] * D_801AAF0A >> 4; + D_801A8732[i] = arg2[0x49] * D_801AAEE8 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801AAFE2 << 3; + arg2[0x21] = D_801AAF0A << 3; + arg2[0x22] = D_801AAEE8 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC04_002/ov_SC04_002.c b/src/ov_SC04_002/ov_SC04_002.c index a6a010341..4ee566822 100644 --- a/src/ov_SC04_002/ov_SC04_002.c +++ b/src/ov_SC04_002/ov_SC04_002.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_002/nonmatchings/ov_SC04_002", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801BFA40/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801C15C0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801C16C0; +extern u8 D_801C15E2; +extern u8 D_801C15C0; +extern u8 D_801BFA40[]; +extern u8 D_801BFA41[]; +extern u8 D_801BFA42[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801C16C0; + g = D_801C15E2; + b = D_801C15C0; + D_801BFA40[0] = r * 5 >> 3; + D_801BFA41[0] = g << 3; + D_801BFA42[0] = (s32)(b * 255) >> 4; + D_801BFA40[4] = (s32)(r * 143) >> 4; + D_801BFA41[4] = g * 25 >> 1; + D_801BFA42[4] = (s32)(b * 255) >> 4; + D_801BFA40[8] = (s32)(r * 255) >> 4; + D_801BFA41[8] = (s32)(g * 255) >> 4; + D_801BFA42[8] = (s32)(b * 255) >> 4; + D_801BFA40[12] = (s32)(r * 143) >> 4; + D_801BFA41[12] = (s32)(g * 255) >> 4; + D_801BFA42[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801BFA40[i] = arg2[0x44] * D_801C16C0 >> 4; + D_801BFA41[i] = arg2[0x45] * D_801C15E2 >> 4; + D_801BFA42[i] = arg2[0x46] * D_801C15C0 >> 4; + i = (arg1 + 1) * 4; + D_801BFA40[i] = arg2[0x47] * D_801C16C0 >> 4; + D_801BFA41[i] = arg2[0x48] * D_801C15E2 >> 4; + D_801BFA42[i] = arg2[0x49] * D_801C15C0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801C16C0 << 3; + arg2[0x21] = D_801C15E2 << 3; + arg2[0x22] = D_801C15C0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC04_003/ov_SC04_003.c b/src/ov_SC04_003/ov_SC04_003.c index 1c0bb87d0..084b4c2b1 100644 --- a/src/ov_SC04_003/ov_SC04_003.c +++ b/src/ov_SC04_003/ov_SC04_003.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_003/nonmatchings/ov_SC04_003", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_8019A6A8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_8019BA80 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_8019BB7A; +extern u8 D_8019BAA2; +extern u8 D_8019BA80; +extern u8 D_8019A6A8[]; +extern u8 D_8019A6A9[]; +extern u8 D_8019A6AA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_8019BB7A; + g = D_8019BAA2; + b = D_8019BA80; + D_8019A6A8[0] = r * 5 >> 3; + D_8019A6A9[0] = g << 3; + D_8019A6AA[0] = (s32)(b * 255) >> 4; + D_8019A6A8[4] = (s32)(r * 143) >> 4; + D_8019A6A9[4] = g * 25 >> 1; + D_8019A6AA[4] = (s32)(b * 255) >> 4; + D_8019A6A8[8] = (s32)(r * 255) >> 4; + D_8019A6A9[8] = (s32)(g * 255) >> 4; + D_8019A6AA[8] = (s32)(b * 255) >> 4; + D_8019A6A8[12] = (s32)(r * 143) >> 4; + D_8019A6A9[12] = (s32)(g * 255) >> 4; + D_8019A6AA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_8019A6A8[i] = arg2[0x44] * D_8019BB7A >> 4; + D_8019A6A9[i] = arg2[0x45] * D_8019BAA2 >> 4; + D_8019A6AA[i] = arg2[0x46] * D_8019BA80 >> 4; + i = (arg1 + 1) * 4; + D_8019A6A8[i] = arg2[0x47] * D_8019BB7A >> 4; + D_8019A6A9[i] = arg2[0x48] * D_8019BAA2 >> 4; + D_8019A6AA[i] = arg2[0x49] * D_8019BA80 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_8019BB7A << 3; + arg2[0x21] = D_8019BAA2 << 3; + arg2[0x22] = D_8019BA80 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC04_004/ov_SC04_004.c b/src/ov_SC04_004/ov_SC04_004.c index ae120a3bb..292d08be3 100644 --- a/src/ov_SC04_004/ov_SC04_004.c +++ b/src/ov_SC04_004/ov_SC04_004.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_004/nonmatchings/ov_SC04_004", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801B24A8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801B3AE0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801B3BE0; +extern u8 D_801B3B02; +extern u8 D_801B3AE0; +extern u8 D_801B24A8[]; +extern u8 D_801B24A9[]; +extern u8 D_801B24AA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801B3BE0; + g = D_801B3B02; + b = D_801B3AE0; + D_801B24A8[0] = r * 5 >> 3; + D_801B24A9[0] = g << 3; + D_801B24AA[0] = (s32)(b * 255) >> 4; + D_801B24A8[4] = (s32)(r * 143) >> 4; + D_801B24A9[4] = g * 25 >> 1; + D_801B24AA[4] = (s32)(b * 255) >> 4; + D_801B24A8[8] = (s32)(r * 255) >> 4; + D_801B24A9[8] = (s32)(g * 255) >> 4; + D_801B24AA[8] = (s32)(b * 255) >> 4; + D_801B24A8[12] = (s32)(r * 143) >> 4; + D_801B24A9[12] = (s32)(g * 255) >> 4; + D_801B24AA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801B24A8[i] = arg2[0x44] * D_801B3BE0 >> 4; + D_801B24A9[i] = arg2[0x45] * D_801B3B02 >> 4; + D_801B24AA[i] = arg2[0x46] * D_801B3AE0 >> 4; + i = (arg1 + 1) * 4; + D_801B24A8[i] = arg2[0x47] * D_801B3BE0 >> 4; + D_801B24A9[i] = arg2[0x48] * D_801B3B02 >> 4; + D_801B24AA[i] = arg2[0x49] * D_801B3AE0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801B3BE0 << 3; + arg2[0x21] = D_801B3B02 << 3; + arg2[0x22] = D_801B3AE0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC04_005/ov_SC04_005.c b/src/ov_SC04_005/ov_SC04_005.c index 8b3ea0c5c..66bad3f3e 100644 --- a/src/ov_SC04_005/ov_SC04_005.c +++ b/src/ov_SC04_005/ov_SC04_005.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_005/nonmatchings/ov_SC04_005", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801C0680/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801C21C0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801C22BA; +extern u8 D_801C21E2; +extern u8 D_801C21C0; +extern u8 D_801C0680[]; +extern u8 D_801C0681[]; +extern u8 D_801C0682[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801C22BA; + g = D_801C21E2; + b = D_801C21C0; + D_801C0680[0] = r * 5 >> 3; + D_801C0681[0] = g << 3; + D_801C0682[0] = (s32)(b * 255) >> 4; + D_801C0680[4] = (s32)(r * 143) >> 4; + D_801C0681[4] = g * 25 >> 1; + D_801C0682[4] = (s32)(b * 255) >> 4; + D_801C0680[8] = (s32)(r * 255) >> 4; + D_801C0681[8] = (s32)(g * 255) >> 4; + D_801C0682[8] = (s32)(b * 255) >> 4; + D_801C0680[12] = (s32)(r * 143) >> 4; + D_801C0681[12] = (s32)(g * 255) >> 4; + D_801C0682[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801C0680[i] = arg2[0x44] * D_801C22BA >> 4; + D_801C0681[i] = arg2[0x45] * D_801C21E2 >> 4; + D_801C0682[i] = arg2[0x46] * D_801C21C0 >> 4; + i = (arg1 + 1) * 4; + D_801C0680[i] = arg2[0x47] * D_801C22BA >> 4; + D_801C0681[i] = arg2[0x48] * D_801C21E2 >> 4; + D_801C0682[i] = arg2[0x49] * D_801C21C0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801C22BA << 3; + arg2[0x21] = D_801C21E2 << 3; + arg2[0x22] = D_801C21C0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC04_006/ov_SC04_006.c b/src/ov_SC04_006/ov_SC04_006.c index 0d1c512ef..279179f28 100644 --- a/src/ov_SC04_006/ov_SC04_006.c +++ b/src/ov_SC04_006/ov_SC04_006.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_006/nonmatchings/ov_SC04_006", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_8019C928/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_8019DC60 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_8019DD5A; +extern u8 D_8019DC82; +extern u8 D_8019DC60; +extern u8 D_8019C928[]; +extern u8 D_8019C929[]; +extern u8 D_8019C92A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_8019DD5A; + g = D_8019DC82; + b = D_8019DC60; + D_8019C928[0] = r * 5 >> 3; + D_8019C929[0] = g << 3; + D_8019C92A[0] = (s32)(b * 255) >> 4; + D_8019C928[4] = (s32)(r * 143) >> 4; + D_8019C929[4] = g * 25 >> 1; + D_8019C92A[4] = (s32)(b * 255) >> 4; + D_8019C928[8] = (s32)(r * 255) >> 4; + D_8019C929[8] = (s32)(g * 255) >> 4; + D_8019C92A[8] = (s32)(b * 255) >> 4; + D_8019C928[12] = (s32)(r * 143) >> 4; + D_8019C929[12] = (s32)(g * 255) >> 4; + D_8019C92A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_8019C928[i] = arg2[0x44] * D_8019DD5A >> 4; + D_8019C929[i] = arg2[0x45] * D_8019DC82 >> 4; + D_8019C92A[i] = arg2[0x46] * D_8019DC60 >> 4; + i = (arg1 + 1) * 4; + D_8019C928[i] = arg2[0x47] * D_8019DD5A >> 4; + D_8019C929[i] = arg2[0x48] * D_8019DC82 >> 4; + D_8019C92A[i] = arg2[0x49] * D_8019DC60 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_8019DD5A << 3; + arg2[0x21] = D_8019DC82 << 3; + arg2[0x22] = D_8019DC60 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC04_007/ov_SC04_007.c b/src/ov_SC04_007/ov_SC04_007.c index f7f7e6c7d..b3663bde3 100644 --- a/src/ov_SC04_007/ov_SC04_007.c +++ b/src/ov_SC04_007/ov_SC04_007.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_007/nonmatchings/ov_SC04_007", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801B3EE0/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801B5A20 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801B5B1A; +extern u8 D_801B5A42; +extern u8 D_801B5A20; +extern u8 D_801B3EE0[]; +extern u8 D_801B3EE1[]; +extern u8 D_801B3EE2[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801B5B1A; + g = D_801B5A42; + b = D_801B5A20; + D_801B3EE0[0] = r * 5 >> 3; + D_801B3EE1[0] = g << 3; + D_801B3EE2[0] = (s32)(b * 255) >> 4; + D_801B3EE0[4] = (s32)(r * 143) >> 4; + D_801B3EE1[4] = g * 25 >> 1; + D_801B3EE2[4] = (s32)(b * 255) >> 4; + D_801B3EE0[8] = (s32)(r * 255) >> 4; + D_801B3EE1[8] = (s32)(g * 255) >> 4; + D_801B3EE2[8] = (s32)(b * 255) >> 4; + D_801B3EE0[12] = (s32)(r * 143) >> 4; + D_801B3EE1[12] = (s32)(g * 255) >> 4; + D_801B3EE2[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801B3EE0[i] = arg2[0x44] * D_801B5B1A >> 4; + D_801B3EE1[i] = arg2[0x45] * D_801B5A42 >> 4; + D_801B3EE2[i] = arg2[0x46] * D_801B5A20 >> 4; + i = (arg1 + 1) * 4; + D_801B3EE0[i] = arg2[0x47] * D_801B5B1A >> 4; + D_801B3EE1[i] = arg2[0x48] * D_801B5A42 >> 4; + D_801B3EE2[i] = arg2[0x49] * D_801B5A20 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801B5B1A << 3; + arg2[0x21] = D_801B5A42 << 3; + arg2[0x22] = D_801B5A20 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC04_008/ov_SC04_008.c b/src/ov_SC04_008/ov_SC04_008.c index b81f14f9d..8a0141fd9 100644 --- a/src/ov_SC04_008/ov_SC04_008.c +++ b/src/ov_SC04_008/ov_SC04_008.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_008/nonmatchings/ov_SC04_008", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_80190BB8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_80193350 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_8019344A; +extern u8 D_80193372; +extern u8 D_80193350; +extern u8 D_80190BB8[]; +extern u8 D_80190BB9[]; +extern u8 D_80190BBA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_8019344A; + g = D_80193372; + b = D_80193350; + D_80190BB8[0] = r * 5 >> 3; + D_80190BB9[0] = g << 3; + D_80190BBA[0] = (s32)(b * 255) >> 4; + D_80190BB8[4] = (s32)(r * 143) >> 4; + D_80190BB9[4] = g * 25 >> 1; + D_80190BBA[4] = (s32)(b * 255) >> 4; + D_80190BB8[8] = (s32)(r * 255) >> 4; + D_80190BB9[8] = (s32)(g * 255) >> 4; + D_80190BBA[8] = (s32)(b * 255) >> 4; + D_80190BB8[12] = (s32)(r * 143) >> 4; + D_80190BB9[12] = (s32)(g * 255) >> 4; + D_80190BBA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_80190BB8[i] = arg2[0x44] * D_8019344A >> 4; + D_80190BB9[i] = arg2[0x45] * D_80193372 >> 4; + D_80190BBA[i] = arg2[0x46] * D_80193350 >> 4; + i = (arg1 + 1) * 4; + D_80190BB8[i] = arg2[0x47] * D_8019344A >> 4; + D_80190BB9[i] = arg2[0x48] * D_80193372 >> 4; + D_80190BBA[i] = arg2[0x49] * D_80193350 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_8019344A << 3; + arg2[0x21] = D_80193372 << 3; + arg2[0x22] = D_80193350 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC04_009/ov_SC04_009.c b/src/ov_SC04_009/ov_SC04_009.c index 5043268eb..2474cc4da 100644 --- a/src/ov_SC04_009/ov_SC04_009.c +++ b/src/ov_SC04_009/ov_SC04_009.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_009/nonmatchings/ov_SC04_009", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_80196DC8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_80198100 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801981FA; +extern u8 D_80198122; +extern u8 D_80198100; +extern u8 D_80196DC8[]; +extern u8 D_80196DC9[]; +extern u8 D_80196DCA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801981FA; + g = D_80198122; + b = D_80198100; + D_80196DC8[0] = r * 5 >> 3; + D_80196DC9[0] = g << 3; + D_80196DCA[0] = (s32)(b * 255) >> 4; + D_80196DC8[4] = (s32)(r * 143) >> 4; + D_80196DC9[4] = g * 25 >> 1; + D_80196DCA[4] = (s32)(b * 255) >> 4; + D_80196DC8[8] = (s32)(r * 255) >> 4; + D_80196DC9[8] = (s32)(g * 255) >> 4; + D_80196DCA[8] = (s32)(b * 255) >> 4; + D_80196DC8[12] = (s32)(r * 143) >> 4; + D_80196DC9[12] = (s32)(g * 255) >> 4; + D_80196DCA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_80196DC8[i] = arg2[0x44] * D_801981FA >> 4; + D_80196DC9[i] = arg2[0x45] * D_80198122 >> 4; + D_80196DCA[i] = arg2[0x46] * D_80198100 >> 4; + i = (arg1 + 1) * 4; + D_80196DC8[i] = arg2[0x47] * D_801981FA >> 4; + D_80196DC9[i] = arg2[0x48] * D_80198122 >> 4; + D_80196DCA[i] = arg2[0x49] * D_80198100 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801981FA << 3; + arg2[0x21] = D_80198122 << 3; + arg2[0x22] = D_80198100 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC04_010/ov_SC04_010.c b/src/ov_SC04_010/ov_SC04_010.c index 3ca3aed5b..548e813f5 100644 --- a/src/ov_SC04_010/ov_SC04_010.c +++ b/src/ov_SC04_010/ov_SC04_010.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_010/nonmatchings/ov_SC04_010", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_8018E260/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_8018F5D8 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_8018F6D2; +extern u8 D_8018F5FA; +extern u8 D_8018F5D8; +extern u8 D_8018E260[]; +extern u8 D_8018E261[]; +extern u8 D_8018E262[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_8018F6D2; + g = D_8018F5FA; + b = D_8018F5D8; + D_8018E260[0] = r * 5 >> 3; + D_8018E261[0] = g << 3; + D_8018E262[0] = (s32)(b * 255) >> 4; + D_8018E260[4] = (s32)(r * 143) >> 4; + D_8018E261[4] = g * 25 >> 1; + D_8018E262[4] = (s32)(b * 255) >> 4; + D_8018E260[8] = (s32)(r * 255) >> 4; + D_8018E261[8] = (s32)(g * 255) >> 4; + D_8018E262[8] = (s32)(b * 255) >> 4; + D_8018E260[12] = (s32)(r * 143) >> 4; + D_8018E261[12] = (s32)(g * 255) >> 4; + D_8018E262[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_8018E260[i] = arg2[0x44] * D_8018F6D2 >> 4; + D_8018E261[i] = arg2[0x45] * D_8018F5FA >> 4; + D_8018E262[i] = arg2[0x46] * D_8018F5D8 >> 4; + i = (arg1 + 1) * 4; + D_8018E260[i] = arg2[0x47] * D_8018F6D2 >> 4; + D_8018E261[i] = arg2[0x48] * D_8018F5FA >> 4; + D_8018E262[i] = arg2[0x49] * D_8018F5D8 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_8018F6D2 << 3; + arg2[0x21] = D_8018F5FA << 3; + arg2[0x22] = D_8018F5D8 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC04_011/ov_SC04_011.c b/src/ov_SC04_011/ov_SC04_011.c index 51e11c1ac..519f7dd65 100644 --- a/src/ov_SC04_011/ov_SC04_011.c +++ b/src/ov_SC04_011/ov_SC04_011.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801ED9C8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801F1540 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801F163A; +extern u8 D_801F1562; +extern u8 D_801F1540; +extern u8 D_801ED9C8[]; +extern u8 D_801ED9C9[]; +extern u8 D_801ED9CA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801F163A; + g = D_801F1562; + b = D_801F1540; + D_801ED9C8[0] = r * 5 >> 3; + D_801ED9C9[0] = g << 3; + D_801ED9CA[0] = (s32)(b * 255) >> 4; + D_801ED9C8[4] = (s32)(r * 143) >> 4; + D_801ED9C9[4] = g * 25 >> 1; + D_801ED9CA[4] = (s32)(b * 255) >> 4; + D_801ED9C8[8] = (s32)(r * 255) >> 4; + D_801ED9C9[8] = (s32)(g * 255) >> 4; + D_801ED9CA[8] = (s32)(b * 255) >> 4; + D_801ED9C8[12] = (s32)(r * 143) >> 4; + D_801ED9C9[12] = (s32)(g * 255) >> 4; + D_801ED9CA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801ED9C8[i] = arg2[0x44] * D_801F163A >> 4; + D_801ED9C9[i] = arg2[0x45] * D_801F1562 >> 4; + D_801ED9CA[i] = arg2[0x46] * D_801F1540 >> 4; + i = (arg1 + 1) * 4; + D_801ED9C8[i] = arg2[0x47] * D_801F163A >> 4; + D_801ED9C9[i] = arg2[0x48] * D_801F1562 >> 4; + D_801ED9CA[i] = arg2[0x49] * D_801F1540 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801F163A << 3; + arg2[0x21] = D_801F1562 << 3; + arg2[0x22] = D_801F1540 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC04_012/ov_SC04_012.c b/src/ov_SC04_012/ov_SC04_012.c index 19f48b694..58591bd98 100644 --- a/src/ov_SC04_012/ov_SC04_012.c +++ b/src/ov_SC04_012/ov_SC04_012.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_012/nonmatchings/ov_SC04_012", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_80190938/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801930D0 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801931CA; +extern u8 D_801930F2; +extern u8 D_801930D0; +extern u8 D_80190938[]; +extern u8 D_80190939[]; +extern u8 D_8019093A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801931CA; + g = D_801930F2; + b = D_801930D0; + D_80190938[0] = r * 5 >> 3; + D_80190939[0] = g << 3; + D_8019093A[0] = (s32)(b * 255) >> 4; + D_80190938[4] = (s32)(r * 143) >> 4; + D_80190939[4] = g * 25 >> 1; + D_8019093A[4] = (s32)(b * 255) >> 4; + D_80190938[8] = (s32)(r * 255) >> 4; + D_80190939[8] = (s32)(g * 255) >> 4; + D_8019093A[8] = (s32)(b * 255) >> 4; + D_80190938[12] = (s32)(r * 143) >> 4; + D_80190939[12] = (s32)(g * 255) >> 4; + D_8019093A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_80190938[i] = arg2[0x44] * D_801931CA >> 4; + D_80190939[i] = arg2[0x45] * D_801930F2 >> 4; + D_8019093A[i] = arg2[0x46] * D_801930D0 >> 4; + i = (arg1 + 1) * 4; + D_80190938[i] = arg2[0x47] * D_801931CA >> 4; + D_80190939[i] = arg2[0x48] * D_801930F2 >> 4; + D_8019093A[i] = arg2[0x49] * D_801930D0 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801931CA << 3; + arg2[0x21] = D_801930F2 << 3; + arg2[0x22] = D_801930D0 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC04_015/ov_SC04_015.c b/src/ov_SC04_015/ov_SC04_015.c index 052834ec3..17c59f4ad 100644 --- a/src/ov_SC04_015/ov_SC04_015.c +++ b/src/ov_SC04_015/ov_SC04_015.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_015/nonmatchings/ov_SC04_015", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801C7620/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801C9240 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801C936A; +extern u8 D_801C926A; +extern u8 D_801C9240; +extern u8 D_801C7620[]; +extern u8 D_801C7621[]; +extern u8 D_801C7622[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801C936A; + g = D_801C926A; + b = D_801C9240; + D_801C7620[0] = r * 5 >> 3; + D_801C7621[0] = g << 3; + D_801C7622[0] = (s32)(b * 255) >> 4; + D_801C7620[4] = (s32)(r * 143) >> 4; + D_801C7621[4] = g * 25 >> 1; + D_801C7622[4] = (s32)(b * 255) >> 4; + D_801C7620[8] = (s32)(r * 255) >> 4; + D_801C7621[8] = (s32)(g * 255) >> 4; + D_801C7622[8] = (s32)(b * 255) >> 4; + D_801C7620[12] = (s32)(r * 143) >> 4; + D_801C7621[12] = (s32)(g * 255) >> 4; + D_801C7622[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801C7620[i] = arg2[0x44] * D_801C936A >> 4; + D_801C7621[i] = arg2[0x45] * D_801C926A >> 4; + D_801C7622[i] = arg2[0x46] * D_801C9240 >> 4; + i = (arg1 + 1) * 4; + D_801C7620[i] = arg2[0x47] * D_801C936A >> 4; + D_801C7621[i] = arg2[0x48] * D_801C926A >> 4; + D_801C7622[i] = arg2[0x49] * D_801C9240 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801C936A << 3; + arg2[0x21] = D_801C926A << 3; + arg2[0x22] = D_801C9240 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC04_016/ov_SC04_016.c b/src/ov_SC04_016/ov_SC04_016.c index 8d0880516..93470c49d 100644 --- a/src/ov_SC04_016/ov_SC04_016.c +++ b/src/ov_SC04_016/ov_SC04_016.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_016/nonmatchings/ov_SC04_016", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801A57C8/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801AC170 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801AC26A; +extern u8 D_801AC192; +extern u8 D_801AC170; +extern u8 D_801A57C8[]; +extern u8 D_801A57C9[]; +extern u8 D_801A57CA[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801AC26A; + g = D_801AC192; + b = D_801AC170; + D_801A57C8[0] = r * 5 >> 3; + D_801A57C9[0] = g << 3; + D_801A57CA[0] = (s32)(b * 255) >> 4; + D_801A57C8[4] = (s32)(r * 143) >> 4; + D_801A57C9[4] = g * 25 >> 1; + D_801A57CA[4] = (s32)(b * 255) >> 4; + D_801A57C8[8] = (s32)(r * 255) >> 4; + D_801A57C9[8] = (s32)(g * 255) >> 4; + D_801A57CA[8] = (s32)(b * 255) >> 4; + D_801A57C8[12] = (s32)(r * 143) >> 4; + D_801A57C9[12] = (s32)(g * 255) >> 4; + D_801A57CA[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801A57C8[i] = arg2[0x44] * D_801AC26A >> 4; + D_801A57C9[i] = arg2[0x45] * D_801AC192 >> 4; + D_801A57CA[i] = arg2[0x46] * D_801AC170 >> 4; + i = (arg1 + 1) * 4; + D_801A57C8[i] = arg2[0x47] * D_801AC26A >> 4; + D_801A57C9[i] = arg2[0x48] * D_801AC192 >> 4; + D_801A57CA[i] = arg2[0x49] * D_801AC170 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801AC26A << 3; + arg2[0x21] = D_801AC192 << 3; + arg2[0x22] = D_801AC170 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC04_018/ov_SC04_018.c b/src/ov_SC04_018/ov_SC04_018.c index 4efe0c038..2c4c9d11f 100644 --- a/src/ov_SC04_018/ov_SC04_018.c +++ b/src/ov_SC04_018/ov_SC04_018.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_018/nonmatchings/ov_SC04_018", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801E5A18/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801E7988 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801E7AB2; +extern u8 D_801E79B2; +extern u8 D_801E7988; +extern u8 D_801E5A18[]; +extern u8 D_801E5A19[]; +extern u8 D_801E5A1A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801E7AB2; + g = D_801E79B2; + b = D_801E7988; + D_801E5A18[0] = r * 5 >> 3; + D_801E5A19[0] = g << 3; + D_801E5A1A[0] = (s32)(b * 255) >> 4; + D_801E5A18[4] = (s32)(r * 143) >> 4; + D_801E5A19[4] = g * 25 >> 1; + D_801E5A1A[4] = (s32)(b * 255) >> 4; + D_801E5A18[8] = (s32)(r * 255) >> 4; + D_801E5A19[8] = (s32)(g * 255) >> 4; + D_801E5A1A[8] = (s32)(b * 255) >> 4; + D_801E5A18[12] = (s32)(r * 143) >> 4; + D_801E5A19[12] = (s32)(g * 255) >> 4; + D_801E5A1A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801E5A18[i] = arg2[0x44] * D_801E7AB2 >> 4; + D_801E5A19[i] = arg2[0x45] * D_801E79B2 >> 4; + D_801E5A1A[i] = arg2[0x46] * D_801E7988 >> 4; + i = (arg1 + 1) * 4; + D_801E5A18[i] = arg2[0x47] * D_801E7AB2 >> 4; + D_801E5A19[i] = arg2[0x48] * D_801E79B2 >> 4; + D_801E5A1A[i] = arg2[0x49] * D_801E7988 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801E7AB2 << 3; + arg2[0x21] = D_801E79B2 << 3; + arg2[0x22] = D_801E7988 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */ diff --git a/src/ov_SC04_019/ov_SC04_019.c b/src/ov_SC04_019/ov_SC04_019.c index 019be7126..6874f3ba0 100644 --- a/src/ov_SC04_019/ov_SC04_019.c +++ b/src/ov_SC04_019/ov_SC04_019.c @@ -560,7 +560,84 @@ void func_8012956C(void) { DEFINE_func_801298F4() /* dedup: shared engine-core @0x801298F4 (src/shared) */ -INCLUDE_ASM("asm/ov_SC04_019/nonmatchings/ov_SC04_019", func_801299C8); + +// @class: schedule +// @stuck: none — MATCH (158 ins, match_one relocation-masked) +// +// Levers that landed it (2 iterations, 56 mismatched -> MATCH): +// 1. §43 K&R s16-param definition: `void f(a0,a1,a2) s16 a0; s16 a1; u8 *a2;` reproduces the +// in-place `sll $a0,$a0,16` zero-test on the arg reg + the raw-$a1 copy (`addu $a3,$a1,$zero`) +// stashed in the jtbl branch delay slot and RE-extended per use in the case body. +// 2. §18 array-of-struct %lo-fold: three sibling extern arrays D_801E5A18/1/2[] (a 4-row x 3-comp +// RGB gradient table, stride 4) give `lui $at,%hi(sym); addu $at,$at,idx4; sb $v0,%lo(sym)($at)` +// for the indexed case and plain `lui/sb %lo(sym+k)` for the constant-index case. +// 3. Switch CASE-ORDER = source order: the jump table dispatches case 1 to the FIRST emitted block, +// so `case 1:` must be written before `case 0/2:` and `case 3/4:`. +// 4. THE residual (56 -> 0): the case-1 body must be written ROW-MAJOR (BE0[0],BE1[0],BE2[0], +// BE0[4],BE1[4],BE2[4],...), i.e. the natural table fill. gcc-2.7.2's sched pass then REORDERS +// the stores itself (BE0,BE1,BE5,BE8,BE4,BEC,BE9,BED,BE2,BE6,BEA,BEE) because the three arrays +// are distinct declarations => provably non-aliasing. Writing the source in the target's STORE +// order is the trap: it pins the b*255 / r*143 CSEs at their late store sites instead of letting +// them hoist into $a0/$v1 at rows 0/1, and mis-schedules the D_801E7988 load. +// 5. Shift signedness: `u32` component locals give `srl` for r*5>>3 and g*25>>1; an explicit +// `(s32)(x * 255) >> 4` gives `sra` for the *255 / *143 / *45 terms (mixed within one block). + +extern u8 D_801E7AB2; +extern u8 D_801E79B2; +extern u8 D_801E7988; +extern u8 D_801E5A18[]; +extern u8 D_801E5A19[]; +extern u8 D_801E5A1A[]; + +void func_801299C8(arg0, arg1, arg2) +s16 arg0; +s16 arg1; +u8 *arg2; +{ + u32 r; + u32 g; + u32 b; + s32 i; + + if (arg0 != 0) { + switch (arg1) { + case 1: + r = D_801E7AB2; + g = D_801E79B2; + b = D_801E7988; + D_801E5A18[0] = r * 5 >> 3; + D_801E5A19[0] = g << 3; + D_801E5A1A[0] = (s32)(b * 255) >> 4; + D_801E5A18[4] = (s32)(r * 143) >> 4; + D_801E5A19[4] = g * 25 >> 1; + D_801E5A1A[4] = (s32)(b * 255) >> 4; + D_801E5A18[8] = (s32)(r * 255) >> 4; + D_801E5A19[8] = (s32)(g * 255) >> 4; + D_801E5A1A[8] = (s32)(b * 255) >> 4; + D_801E5A18[12] = (s32)(r * 143) >> 4; + D_801E5A19[12] = (s32)(g * 255) >> 4; + D_801E5A1A[12] = (s32)(b * 45) >> 2; + break; + case 0: + case 2: + i = arg1 * 4; + D_801E5A18[i] = arg2[0x44] * D_801E7AB2 >> 4; + D_801E5A19[i] = arg2[0x45] * D_801E79B2 >> 4; + D_801E5A1A[i] = arg2[0x46] * D_801E7988 >> 4; + i = (arg1 + 1) * 4; + D_801E5A18[i] = arg2[0x47] * D_801E7AB2 >> 4; + D_801E5A19[i] = arg2[0x48] * D_801E79B2 >> 4; + D_801E5A1A[i] = arg2[0x49] * D_801E7988 >> 4; + break; + case 3: + case 4: + arg2[0x20] = D_801E7AB2 << 3; + arg2[0x21] = D_801E79B2 << 3; + arg2[0x22] = D_801E7988 << 3; + break; + } + } +} DEFINE_func_80129C40() /* dedup: shared engine-core @0x80129C40 (src/shared) */