diff --git a/src/ov_SC02_000/ov_SC02_000_jr_8018173C.c b/src/ov_SC02_000/ov_SC02_000_jr_8018173C.c
index 3a67c4f9c..168e7a80d 100644
--- a/src/ov_SC02_000/ov_SC02_000_jr_8018173C.c
+++ b/src/ov_SC02_000/ov_SC02_000_jr_8018173C.c
@@ -3518,7 +3518,22 @@ void func_80182F4C(s32 arg0)
 }
 
 
-INCLUDE_ASM("asm/ov_SC02_000/nonmatchings/ov_SC02_000_jr_8018173C", func_80182F78);
+extern s32 func_80171D78(s32 a0, s32 a1);
+extern u8 D_801E6C8C[8];
+extern u8 D_801E6C94[8];
+
+void func_80182F78(s32 arg0)
+{
+    u8 local_18[16];
+
+    __builtin_memcpy(local_18, D_801E6C8C, 8);
+    __builtin_memcpy(local_18 + 8, D_801E6C94, 8);
+
+    if (func_80171D78(arg0, (s32)local_18) != 0) {
+        (*(u8 *)(arg0 + 0x214))++;
+    }
+}
+
 
 DEFINE_func_80183010()  /* dedup: shared engine-core @0x80183010 (src/shared) */
 
diff --git a/src/ov_SC03_107/ov_SC03_107_jr_8015A3C8.c b/src/ov_SC03_107/ov_SC03_107_jr_8015A3C8.c
index b986fe694..523c1890d 100644
--- a/src/ov_SC03_107/ov_SC03_107_jr_8015A3C8.c
+++ b/src/ov_SC03_107/ov_SC03_107_jr_8015A3C8.c
@@ -8101,7 +8101,22 @@ void func_80168430(s32 param_1) {
 }
 
 
-INCLUDE_ASM("asm/ov_SC03_107/nonmatchings/ov_SC03_107_jr_8015A3C8", func_801684B4);
+extern void func_80146C3C();
+extern s32 func_80166994(s32 a0, s32 a1, s32 a2, s32 a3);
+
+void func_801684B4(s32 a0) {
+    if ((*(s32 *)(*(s32 *)(a0 + 0x34) + 0x44) & 0x2) == 0) {
+        ((void (*)(void))func_80146C3C)();
+    } else {
+        s16 v0 = *(u16 *)(a0 + 0x2A) - 1;
+        *(s16 *)(a0 + 0x2A) = v0;
+        if (v0 == 0) {
+            func_80166994(a0, 0, 2, 0);
+            *(s16 *)(a0 + 0x2) = *(u16 *)(a0 + 0x2) + 1;
+        }
+    }
+}
+
 
 DEFINE_func_80168540()  /* dedup: shared engine-core @0x80168540 (src/shared) */
 
diff --git a/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c b/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c
index 5c6bbd970..4c6de71c9 100644
--- a/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c
+++ b/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c
@@ -6617,7 +6617,45 @@ void func_80183BD0(s32 a0) {
 }
 
 
-INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_80183BF0);
+extern u16 D_801EFD40;
+extern void func_80185960(s32 target, u16 *cur, s32 step);
+
+/* NOTE (band verify): the destination TU (src/ov_SC04_011/ov_SC04_011_jr_8017D494.c) has two
+   pre-existing "extern s32 func_80183BF0(s32 a0);" decls for this address (file-scope L6237,
+   and function-scope L6444 inside func_80183880), both used only as a discarded-value statement
+   "func_80183BF0(a0);". That decl's `s32` return conflicts with the real behavior: no path here
+   ever sets $v0 before the shared jr $ra, and -- per cookbook §162f1 -- a non-void return type
+   marks $v0 live-out and BLOCKS reorg from filling the second clamp-if's branch delay slot with
+   the `-0x20` constant (costs +1 insn, verified: s32 draft compiles to 34 ins vs the target's 33).
+   The TU's own extern-s32 decl of THIS function is what conflicts (self_decl_tu), so per
+   blast-radius law the fix stays in this draft: following the file's own established idiom for
+   the mirror case (see impl_801833D4 above in this same TU, same trick, opposite direction), this
+   draft defines the body under a distinct C identifier `impl_80183BF0` and binds it to the real
+   assembler symbol via __asm__(). The TU's `func_80183BF0` identifier is therefore never given a
+   body under that exact name in this file, so its pre-existing (wrong) s32 prototype never
+   collides with our void definition -- and the emitted code is still the byte-identical 33-insn
+   function (gcc: "conflicting types for 'func_80183BF0'" is what a literal `void func_80183BF0`
+   definition would hit here). */
+void impl_80183BF0(s32 a0) __asm__("func_80183BF0");
+
+void impl_80183BF0(s32 a0)
+{
+    s16 sVar1;
+
+    if (D_801EFD40 & 0x40) {
+        sVar1 = *(s16 *)(a0 + 0x102) + *(s16 *)(a0 + 0x104);
+        *(s16 *)(a0 + 0x102) = sVar1;
+        if (sVar1 < -0x17F) {
+            *(u16 *)(a0 + 0x104) = 0x20;
+        }
+        if (*(s16 *)(a0 + 0x102) >= 0x180) {
+            *(s16 *)(a0 + 0x104) = -0x20;
+        }
+    } else {
+        func_80185960(0, (u16 *)(a0 + 0x102), 0x20);
+    }
+}
+
 
 extern void func_80185960(s32 target, u16 *cur, s32 step);
 extern s32 func_8012B6D4(s16 *a0, s16 *a1);
diff --git a/src/ov_SC06_029/ov_SC06_029_jr_8017C954.c b/src/ov_SC06_029/ov_SC06_029_jr_8017C954.c
index 3a64786b5..e96e13b10 100644
--- a/src/ov_SC06_029/ov_SC06_029_jr_8017C954.c
+++ b/src/ov_SC06_029/ov_SC06_029_jr_8017C954.c
@@ -3864,7 +3864,25 @@ void func_8017E800(void *a0) {
 }
 
 
-INCLUDE_ASM("asm/ov_SC06_029/nonmatchings/ov_SC06_029_jr_8017C954", func_8017E83C);
+extern s32 ratan2(s32, s32);
+extern void func_8017E95C();
+
+void func_8017E83C(s32 a0) {
+    typedef struct { s16 v[4]; } Blk8_80126940_8017E8DC;
+    extern Blk8_80126940_8017E8DC D_80126940;
+    Blk8_80126940_8017E8DC sp10a;
+    Blk8_80126940_8017E8DC sp10b;
+    s32 v0;
+
+    sp10a = D_80126940;
+    sp10b = D_80126940;
+    v0 = ratan2(sp10a.v[0], sp10a.v[2]);
+    sp10a.v[1] = -0x380;
+    sp10b.v[0] = 0;
+    sp10b.v[2] = 0;
+    func_8017E95C(a0, sp10a.v, sp10b.v, v0 & 0xfff);
+}
+
 
 typedef struct { s16 v[4]; } Blk8_80126940_8017E8DC;
 
diff --git a/src/ov_SC07_000/ov_SC07_000_jr_8017BEBC.c b/src/ov_SC07_000/ov_SC07_000_jr_8017BEBC.c
index 2f25a949e..4be5c7055 100644
--- a/src/ov_SC07_000/ov_SC07_000_jr_8017BEBC.c
+++ b/src/ov_SC07_000/ov_SC07_000_jr_8017BEBC.c
@@ -4643,7 +4643,50 @@ void func_8017F958(s32 a0)
 }
 
 
-INCLUDE_ASM("asm/ov_SC07_000/nonmatchings/ov_SC07_000_jr_8017BEBC", func_8017F9B4);
+typedef struct { u8 b[4]; } __attribute__((packed, aligned(1))) Blk4_9B4;
+
+extern void func_8001CD9C(s32, void *);
+extern void func_800233CC(void *, u16);
+
+extern u16 aD_801D0630[] __asm__("D_801D0630");
+extern u16 D_801D0632[];
+extern u16 aD_801D0660[] __asm__("D_801D0660");
+extern u16 aD_801D0662[] __asm__("D_801D0662");
+
+extern u8 D_801D0620[];
+extern u8 D_801865A8[];
+extern Blk4_9B4 aD_801CE7A4[] __asm__("D_801CE7A4");
+extern Blk4_9B4 D_801D0624[];
+
+void func_8017F9B4(void *arg0) {
+    register void *s1 __asm__("$17") = arg0;
+    void *s0 = D_801D0620;
+    register s32 off1 __asm__("$3");
+    register s32 off2 __asm__("$4");
+
+    func_8001CD9C(*(s32 *)((u8 *)s1 + 0x20), s0);
+    func_800233CC(s0, 0x40);
+
+    for (off1 = 0, off2 = 0; off1 < 0x30; off1 += 8, off2 += 4) {
+        *(s16 *)((u8 *)aD_801D0660 + off2) = (s16)(*(u16 *)((u8 *)aD_801D0630 + off1)) >> 3;
+        __asm__ __volatile__("" ::: "memory");
+        *(s16 *)((u8 *)aD_801D0662 + off2) = (s16)(*(u16 *)((u8 *)D_801D0632 + off1)) >> 3;
+    }
+
+    *(Blk4_9B4 *)D_801D0620 = *(Blk4_9B4 *)D_801865A8;
+    D_801D0624[0] = aD_801CE7A4[0];
+
+    *(u32 *)(*(s32 *)((u8 *)s1 + 0x20) + 4) |= 0x50000000;
+    *(u16 *)(*(s32 *)((u8 *)s1 + 0x20) + 0x18) = 0x800;
+    *(u16 *)(*(s32 *)((u8 *)s1 + 0x20) + 0x1A) = 0x800;
+    *(u16 *)(*(s32 *)((u8 *)s1 + 0x20) + 0x2C) = 0xC040;
+
+    *(s32 *)((u8 *)s1 + 0x1C) = 4;
+    *(u16 *)((u8 *)s1 + 0x2C) = 0;
+    *(u16 *)((u8 *)s1 + 0x2E) = 0;
+    *(u16 *)((u8 *)s1 + 0x2) += 1;
+}
+
 
 
 extern void (*D_801865AC[])(void);