From 93e2a9170c49cc7a16905fc0e2c4f5bd7b8f8a7c Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Thu, 10 Sep 2026 23:50:01 -0600 Subject: [PATCH] =?UTF-8?q?phase-36:=20S104=20banks=20=E2=80=94=20the=20R2?= =?UTF-8?q?3(case-label)/R34/R35/R36=20pass:=20915=20classes=20in=201,757?= =?UTF-8?q?=20s,=20MATCH=2016=20(bank=20line=20above);=20d20's=20minimum-l?= =?UTF-8?q?ever=20func=5F80180324=20(8=20=E2=86=92=202=20marked=20dead=20b?= =?UTF-8?q?ranches)=20PARKED=20for=20Drew=20=E2=80=94=20an=20invented=20al?= =?UTF-8?q?ways-false=20condition=20is=20not=20covered=20by=20ruling=20(a)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../agents/ov_SC04_007__func_80180324/body.c | 123 ++++++ .../ov_SC04_007__func_80180324/mechanism.md | 116 ++++++ .run/P36/delever/calibration.json | 370 +++++++++--------- .run/P36/delever/ledger.jsonl | 17 + src/800.c | 7 +- src/ov_SC01_084/ov_SC01_084_jr_80182A00.c | 5 +- src/ov_SC02_016/ov_SC02_016_jr_801810C8.c | 5 +- src/ov_SC03_002/ov_SC03_002_jr_80181D78.c | 10 +- src/ov_SC03_010/ov_SC03_010_jr_8017C730.c | 9 +- src/ov_SC03_010/ov_SC03_010_jr_8017F6C0.c | 7 +- src/ov_SC03_011/ov_SC03_011_jr_8017C730.c | 7 +- src/ov_SC03_013/ov_SC03_013_jr_801806F8.c | 7 +- src/ov_SC03_097/ov_SC03_097_jr_8017D898.c | 9 +- src/ov_SC03_108/ov_SC03_108_jr_8017BEBC.c | 10 +- src/ov_SC05_017/ov_SC05_017_jr_80188B1C.c | 11 +- src/ov_SC06_024/ov_SC06_024_jr_8017BEBC.c | 41 +- src/ov_SC06_030/ov_SC06_030_jr_8017F65C.c | 11 +- src/ov_SC07_002/ov_SC07_002_jr_8017C8D0.c | 14 +- src/shared/ov/func_801860E4__93576b99.h | 19 +- 19 files changed, 518 insertions(+), 280 deletions(-) create mode 100644 .run/P36/agents/ov_SC04_007__func_80180324/body.c create mode 100644 .run/P36/agents/ov_SC04_007__func_80180324/mechanism.md diff --git a/.run/P36/agents/ov_SC04_007__func_80180324/body.c b/.run/P36/agents/ov_SC04_007__func_80180324/body.c new file mode 100644 index 000000000..8496a8da4 --- /dev/null +++ b/.run/P36/agents/ov_SC04_007__func_80180324/body.c @@ -0,0 +1,123 @@ +void func_80180324(void *ent, void *spr, u32 *q, u32 *ot) +{ + extern u8 *D_800A5E60; + + Ft4_801833F0 *poly; + Drm_801833F0 *dm; + s32 vtx; + u32 flags; + s32 tp, abr, code, shift; + u16 x; + u32 y; + s32 tpage, clut, cy; + s32 su, sv, uu, vv; + s32 e; /* the sprite's far texel edge, u then v: read only by the dead arms */ + u16 fl; + s32 i; /* also the second loop's counter (one variable: $t3 in both loops) */ + u32 b; + + poly = (Ft4_801833F0 *)D_800A5E60; + fl = *(u16 *)((s32)ent + 0x1E) & 0x8000; + flags = *(u32 *)((s32)ent + 4); + tp = (flags >> 24) & 3; + shift = 2 - tp; + x = *(u16 *)((s32)ent + 0x28) + (*(s16 *)((s32)spr + 4) >> shift); + y = *(u16 *)((s32)ent + 0x2A) + *(u16 *)((s32)spr + 6); + vtx = *(s32 *)((s32)ent + 0x20); + D_800A5E60 += 0xF0; + if (flags & 0x40000000) { + code = 0x2E; + abr = (flags >> 28) & 3; + } else { + code = 0x2C; + abr = 1; + } + tpage = (tp << 7) | (abr << 5) | ((y & 0x100) >> 4) | ((x & 0x3C0) >> 6) | + ((y & 0x200) << 2); + b = *(u8 *)((s32)ent + 0x27); + cy = (b + 0x100) << 6; + if (b < 0xE0) { + clut = cy | 0x16; + } else { + clut = cy | 0x10; + } + { + s32 t = ((x - ((tpage & 0xF) << 6)) << shift) + + (*(u16 *)((s32)spr + 4) & ((1 << shift) - 1)); + e = t + *(u8 *)((s32)spr + 2) - 1; + su = t; + if (tpage & 0x200) su = e; // !FAKE: dead-branch su (u edge) — combine folds the always-false tpage bit via nonzero_bits (combine.c:8716/6803) into an unconditional jump (combine.c:2353), jump2 deletes the arm after flow (toplev.c:3142), leaving `t + spr[2] - 1` dead as in the target (P36 S104 d20 minimum-lever) + } + y &= 0xFFFF; + if (tpage & 0x10) { + y -= 0x100; + sv = y; + } else { + sv = y; + } + e = sv + *(u8 *)((s32)spr + 3) - 1; + if (tpage & 0x200) su = e; // !FAKE: dead-branch su (v edge) — same mechanism; keeps `sv + spr[3] - 1` (P36 S104 d20 minimum-lever) + i = 1; + uu = su; + vv = sv; + for (; i < 13; i += 2, poly++) { + s32 k = (i - 1) * 4; + poly->tag.len = 9; + poly->code = code; + poly->tpage = tpage; + poly->u2 = su; + poly->v2 = sv; + poly->u0 = SR3_801833F0(vtx + k + 0x10) + uu; + poly->v0 = SR3_801833F0(vtx + k + 0x12) + vv; + poly->u1 = SR3_801833F0(vtx + i * 4 + 0x10) + uu; + poly->v1 = SR3_801833F0(vtx + i * 4 + 0x12) + vv; + /* k2 is recorded as a giv HERE, AFTER the u1/v1 mem giv - see (1). */ + { + s32 k2 = (i + 1) * 4; + poly->u3 = SR3_801833F0(vtx + k2 + 0x10) + uu; + poly->v3 = SR3_801833F0(vtx + k2 + 0x12) + vv; + } + poly->clut = clut; + poly->r0 = *(u8 *)((s32)ent + 0x24); + poly->g0 = *(u8 *)((s32)ent + 0x25); + poly->b0 = *(u8 *)((s32)ent + 0x26); + poly->x0 = ((u16 *)q)[i * 2]; + poly->y0 = ((u16 *)q)[i * 2 + 1]; + poly->x1 = ((u16 *)q)[i * 2 + 2]; + poly->y1 = ((u16 *)q)[i * 2 + 3]; + poly->x2 = ((u16 *)q)[0]; + poly->y2 = ((u16 *)q)[1]; + poly->x3 = ((u16 *)q)[i * 2 + 4]; + poly->y3 = ((u16 *)q)[i * 2 + 5]; + if (fl != 0) { + ADDPRIM_801833F0(&ot[*(s32 *)((s32)q + 0x34 + (i >> 1) * 4)], poly); + } else { + ADDPRIM_801833F0(ot, poly); + } + } + poly[-1].x3 = ((u16 *)q)[2]; + poly[-1].y3 = ((u16 *)q)[3]; + poly[-1].u3 = su + SR3_801833F0(vtx + 0x10); + poly[-1].v3 = sv + SR3_801833F0(vtx + 0x12); + + if (flags & 0x40000000) { + dm = (Drm_801833F0 *)poly; + if (fl != 0) { + i = 0; + D_800A5E60 += 0x30; + do { + i++; + dm->tag.len = 1; + dm->code0 = (abr << 5) | 0xE100000A; + ADDPRIM_801833F0(&ot[*(volatile s32 *)((s32)q + 0x34)], dm); + q = (u32 *)((s32)q + 4); + dm++; + } while (i < 6); + } else { + dm->code0 = (abr << 5) | 0xE100000A; + D_800A5E60 += 8; + dm->tag.len = 1; + ADDPRIM_801833F0(ot, dm); + } + } +} diff --git a/.run/P36/agents/ov_SC04_007__func_80180324/mechanism.md b/.run/P36/agents/ov_SC04_007__func_80180324/mechanism.md new file mode 100644 index 000000000..bbbca0d20 --- /dev/null +++ b/.run/P36/agents/ov_SC04_007__func_80180324/mechanism.md @@ -0,0 +1,116 @@ +# func_80180324 (ov_SC04_007) — agent d20, P36 T7 S104 + +**Result: `--try` score 0 (328/328), on this function AND all ten other members of its family (table: +`scratch/copies/TABLE.md`).** No register pin, no `asm` of any kind, no `volatile` added (the loop-2 +`*(volatile s32 *)` cast was already in body_free.c and is still needed: without it 7, see (e)). + +**It is NOT a lever-free close, and I do not claim one.** The body keeps two `if (tpage & 0x200) su = e;` +statements. `tpage` never has bit 9 set, so each test is always false: an invented identically-zero +condition, which step 6 refuses. Both are marked `// !FAKE: dead-branch` as the step-9 minimum-lever body. +Lever count 8 → 2 (tree: 1 `$0` pin + 6 asm keepalives + the pre-existing volatile cast; now: 2 +C-level dead branches + the same volatile cast; 0 pins, 0 asm). +Drew's ruling needed: is a C-level dead branch that reproduces a real late-dead branch in the original an +acceptable marked lever, or should it go back to asm keepalives? + +## (a) The residual +The lever-free text is 10 instructions short (318 vs 328): +- the target computes `t + spr[2] - 1` and `sv + spr[3] - 1` (lbu/addu/addiu each, the second with its + load-delay nop) and never reads either; +- it keeps `move s3,a0` (su := t) in the lbu delay slot, and the chain reads `a0` (t), not `s3`; +- it keeps the sv if/else as `beqz; j; addiu s2,a1,-256 | move s2,a1`, where the free text gets + if-converted; +- in the loop, the counter `i` / the 0xFFFFFF mask / the vtx+4 giv are permuted over t3/t4/t5, and + sv/uu/vv/0xFF000000 are permuted over a1/s0/s1/s2. + +## (b) Mechanism: passes and decisions (every claim here tested on bytes unless it says otherwise) +1. **Dead code survives only if its consumer disappears AFTER flow.** flow's final pass deletes dead sets + (`flow.c:1478-1490`), and nothing re-runs flow later. combine (after flow) folds a test on a pseudo whose + `nonzero_bits` (`combine.c:6803`, `simplify_comparison` `:8716`) prove it constant. That turns the + conditional jump into `(set (pc) (label_ref))` (`combine.c:2353`; seen in `.combine`: jump_insn 164). + jump2 (`toplev.c:3142`, after sched2) then deletes the unreachable arm. The chain that fed only that arm + stays as dead code, byte-exact. Micro-reproduced (`scratch/micro/t3.c`) and on the real function. + This REFUTES the family exemplar's note 1 (ov_SC02_028 `func_801833F0` header, "gcc-2.7.2 deletes any + pure-C spelling"). +2. **The copy must follow the chain's read of t in sched1's order, in the same block.** If the copy comes + first and t does not die in it, local-alloc's `optimize_reg_copy_1` (`local-alloc.c:700`) rewrites the + chain to read su. Every separate-temp variant read `s3`/`s2`. The copy is placed last only if it wins + sched1's tie: + - `adjust_priority` boosts a "birthing" insn (`sched.c:2469`, `:2539`: dest set once and live after). + With a fresh `ue`, the chain's final addiu is birthing and wins, and the copy lands above it. + - Declaring ONE variable `e` for both edges (two live sets) un-boosts it. The tie then goes to + `INSN_LUID` (`sched.c:2428`), so the copy, textually later, is scheduled last. + - t then dies in the copy. `combine_regs` refuses to tie it to the global su (`local-alloc.c:1774`), so + `move s3,a0` survives. sched2 moves it into the lbu delay slot. +3. **sv if/else kept as j+else.** jump.c's `if (...) x = a; else x = b` → `x = b; if (...) x = a` rewrite + (`jump.c:699`) needs a ONE-insn then-arm (`jump.c:748-749`). Writing the then-arm as + `y -= 0x100; sv = y;` gives two insns in every pre-flow jump pass. cse's `(set REG0 REG1)` swap + (`cse.c:7440`) plus flow then fold it back to one `addiu s2,a1,-256`. +4. **Loop permutation t3/t4/t5.** `allocno_compare` (`global.c:587-600`) ranks by `floor_log2(refs)·refs/live`. + `i` (9/114 → 2368) ranked below the hoisted 0xFFFFFF (13/111 → 3513). Using `i` as the second loop's + counter too (the target has i and m in the SAME `$t3`, so they are one variable) gives 16/152 → 4210. + i is then allocated first and takes t3. This also puts vtx (8/184 → 1304) back below the k2 giv + (1320.8), so the tree's vtx keepalive becomes unnecessary. +5. **a1/s0/s1/s2 permutation.** A v dead arm written as `sv = e` gives sv 8 refs → 1764, so sv takes a1 + before vv. Writing the v arm into `su` instead gives sv 7/135 → 1037. That drops sv below vv (1250), + uu (1238.9) and the 0xFF000000 constant (1238.5), which is the target's order: vv=a1, uu=s0, const=s1, + sv=s2, su=s3. + +## (c) The moves (from body_free.c, 43) +- one `s32 e` holds both edge values: `e = t + w - 1; su = t; if (C) su = e;` and, after the tpage + if/else, `e = sv + h - 1; if (C) su = e;` (C = `tpage & 0x200`, always false). 43 → 32. +- loop 2's counter `m` replaced by `i` (declaration of `m` deleted). 32 → 18. +- the v dead arm writes `su`, not `sv`. 18 → 1. +- then-arm `y -= 0x100; sv = y;` (else `sv = y;`, the `(u16)` cast gone). 1 → 0. +- conditions that also give 0: any pair drawn from {`tp & 4`, `tpage & 0x200`, `tpage & 0x400`, + `tpage & 0x1000`} (13 of 256 pairs scored 0; `scratch/c2search.py`). + +## (d) Generator proposals +- **G-a (natural, broad):** when a tree has `x = y + zr` (a `$0`-pin copy) in an else-arm whose then-arm is + `x = y OP K`, rewrite the then-arm as `y OP= K; x = y;` and the else as `x = y`. The two-insn arm blocks + jump.c:748's if-conversion; cse.c:7440 and flow fold it back to one insn. +- **G-b (natural):** when a tree keeps `asm("" :: "r"(i))` density reads on a loop counter, and a LATER + loop's counter lands in the same hard register in the target, merge the two counters into one variable + (refs and live length add; global.c:595). +- **G-c (lever-to-lever, marked):** when a tree keeps `asm("" :: "r"(expr))` for a value the target + computes and never reads, replace it with `if () X = expr;`. X is a variable + set on the live path and live afterwards; enumerate X, and enumerate the test over bits a live pseudo + provably lacks. Same lever count, but it moves the lever from asm to C and lets the other levers go. + +## (e) What did not work (byte evidence) +- A fresh `ue`/`ve` per edge: the chain reads s3 (optimize_reg_copy_1), 60-87. +- `su = C ? e : t` with C always true (`if (!C) su = t; else su = e;`): combine leaves + `move v0,zero; bnez v0`, 60. +- The same test on `fl` twice: cse shares the and-result and combine cannot fold both jumps (`move v1,zero`). + Tests on `fl` also add refs to fl and change which pseudos spill. +- The v arm writing `sv`/`vv`/`uu`/`y`, or a su/sv swap: 29-38. +- `i = 1` before the dead branch with the branch holding the copies: a loop-entry test appears + (slti/beqz), 96-141. +- sv else-arm `(u16)y`, `(u32)(u16)y`, `y & 0xFFFF`: blocks the if-conversion but leaves + `andi s2,a1,0xffff`, 1. combine only simplifies inside a LOG_LINK pair, and the else block has one insn. + A fresh masked `yy` reshuffles the whole allocation (109-126). Ternary / `y -= ((c) ? 0x100 : 0)`: 29. + Inverted test, `== 0` test or switch: the arms swap, 3. +- Dropping the loop-2 volatile, or spelling that read as `((s32 *)q)[13]` + `q++`, a struct field, a local + `z` pointer, `ot + …`, or indexing by the counter: 5-7. loop.c eliminates the q biv. + +## (f) Where the method fell short +- Neither the method nor the cookbook explains how a dead value can survive, and the exemplar header said + it cannot. The "DEAD CODE IS REAL" keepalive is a reproducible pass sequence (flow → combine fold → + jump2), testable in a 10-line micro. A `.combine` grep for `(set (pc) (label_ref` would have shown it. +- The allocation table misled until I matched pseudo numbers to variables by hand (declaration order). + The tool should print variable names. +- `pkill -f` killed my own shell once (the memory note is right). The coordinator's regen fleet was running + (40 `--try` processes), so compiles took ~2 s each. + +## (g) Structs +Struct typing does not plausibly change what keeps the two dead-branch levers. They exist because the +target contains unread arithmetic, and only a consumer removed after flow (or an asm use) produces that. +Tested: a UV pair as a local struct goes to the stack (stores kept); as a union it vanishes but leaves an +orphan 48-byte frame (`scratch/micro/t4.c`). Neither is the target shape. + +For the pre-existing loop-2 volatile, a body-local `struct { u32 a[13]; s32 z; } *` field read scores 7, +the same as the plain read: loop.c's biv elimination does not look at MEM_IN_STRUCT_P, so a struct is not +the missing piece there either. + +The one struct question left open: the original likely had real flip/UV-edge code (a sprite RECT struct +or flag field) whose test the compiler could prove false. Finding that field in the entity or sprite +layout would turn the invented `tpage & 0x200` into the original's test. diff --git a/.run/P36/delever/calibration.json b/.run/P36/delever/calibration.json index 036c33b5a..140fa95f6 100644 --- a/.run/P36/delever/calibration.json +++ b/.run/P36/delever/calibration.json @@ -1,7 +1,7 @@ { - "head": "97e5d721b", + "head": "2e05e1238", "stamp": "15956e4a96c4", - "generated": "2026-09-10 23:47", + "generated": "2026-09-10 23:48", "aliases": [ "main", "ov_SC03_014", @@ -21,207 +21,207 @@ "main": { "objects": 85, "identical": 85, - "seconds": 10.692999999999998, - "mean_s": 0.126 + "seconds": 9.173999999999998, + "mean_s": 0.108 }, "ov_SC03_014": { "objects": 32, "identical": 32, - "seconds": 7.435, - "mean_s": 0.232 + "seconds": 6.347, + "mean_s": 0.198 }, "ov_SC03_015": { "objects": 32, "identical": 32, - "seconds": 6.612000000000001, - "mean_s": 0.207 + "seconds": 6.3530000000000015, + "mean_s": 0.199 }, "ov_SC04_011": { "objects": 28, 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"build/src/ov_SC04_011/ov_SC04_011_jr_80178D40.o": 0.135, + "build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.09, + "build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.16, + "build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.683, + "build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.077, + "build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.099 }, "ok": true, - "seconds": 3.8 + "seconds": 8.7 } diff --git a/.run/P36/delever/ledger.jsonl b/.run/P36/delever/ledger.jsonl index 2345699d1..fede73971 100644 --- a/.run/P36/delever/ledger.jsonl +++ b/.run/P36/delever/ledger.jsonl @@ -29282,3 +29282,20 @@ {"ts": "2026-09-10 23:46:24", "label": "s104_d32", "rung": "E", "calib": {"head": "b074d7f20", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c", "fn": "func_80181744", "addr": 2149062468, "aliases": null, "header": false, "includers": 0, "nhash_before": "9467e18b6ff3f59131a7460352517a3b2b3993b8", "nhash_after": "3ed27d3161cb1f5aad5f27ac0606c337a24d6000", "source": ".run/P36/agents/ov_SC04_004__func_80181744/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.368, "objects": ["build/src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.o"], "before_text": "void func_80181744(s32 a0) {\n s32 local[4]; \n register s32 v0 __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus7)\n s32 sum;\n\n v0 = func_80180AF0(a0, 0xFFFB0000, local);\n if (v0 == 1) {\n func_8012ADE4((u8 *)a0);\n *(s32 *)(a0 + 0x1C) = 8;\n func_8012A8B0((u8 *)a0, (s32)&D_80199644);\n func_8012B23C(a0);\n func_8012AD44((s32 *)a0, 1);\n } else {\n v0 = *(s16 *)(a0 + 0x102);\n if (v0 != 0) {\n \n register s32 tmp __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus7)\n tmp = v0;\n __asm__ __volatile__(\"\" : \"=r\"(tmp) : \"0\"(tmp) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus7)\n v0 = tmp - 1;\n } else {\n s16 cnt;\n\n if (*(s16 *)(a0 + 0xAA) == 0) {\n func_80180FF8((void *)a0);\n }\n cnt = *(u16 *)(a0 + 0x104) - 1;\n *(s16 *)(a0 + 0x104) = cnt;\n if (cnt != 0) {\n v0 = 4;\n } else {\n *(s16 *)(a0 + 0x104) = 3;\n v0 = 0x20;\n }\n }\n *(s16 *)(a0 + 0x102) = v0;\n\n v0 = *(s32 *)(a0 + 0x20);\n sum = *(u16 *)(v0 + 0x12) + *(u16 *)(a0 + 0x106);\n *(u16 *)(v0 + 0x12) = sum;\n if (func_8012BEE8(a0) != 0) {\n *(s32 *)(a0 + 0x1C) = 0x80;\n v0 = rand();\n *(s16 *)(a0 + 0x106) = (v0 & 0x20) - 0x10;\n }\n }\n}\n", "after_text": "void func_80181744(s32 a0) {\n s32 local;\n\n if (func_80180AF0(a0, 0xFFFB0000, &local) == 1) {\n func_8012ADE4((u8 *)a0);\n *(s32 *)(a0 + 0x1C) = 8;\n func_8012A8B0((u8 *)a0, (s32)&D_80199644);\n func_8012B23C(a0);\n func_8012AD44((s32 *)a0, 1);\n } else {\n if (*(s16 *)(a0 + 0x102) != 0) {\n (*(s16 *)(a0 + 0x102))--;\n } else {\n if (*(s16 *)(a0 + 0xAA) == 0) {\n func_80180FF8((void *)a0);\n }\n if (--(*(s16 *)(a0 + 0x104)) != 0) {\n *(s16 *)(a0 + 0x102) = 4;\n } else {\n *(s16 *)(a0 + 0x104) = 3;\n *(s16 *)(a0 + 0x102) = 0x20;\n }\n }\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += *(u16 *)(a0 + 0x106);\n if (func_8012BEE8(a0) != 0) {\n *(s32 *)(a0 + 0x1C) = 0x80;\n *(s16 *)(a0 + 0x106) = (rand() & 0x20) - 0x10;\n }\n }\n}\n"} {"ts": "2026-09-10 23:46:52", "label": "s104_d32", "rung": "E", "calib": {"head": "b074d7f20", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC04_003/ov_SC04_003_jr_8017BEBC.c", "fn": "func_801806E8", "addr": 2149058280, "aliases": null, "header": false, "includers": 0, "nhash_before": "9467e18b6ff3f59131a7460352517a3b2b3993b8", "nhash_after": "3ed27d3161cb1f5aad5f27ac0606c337a24d6000", "source": "propagate:src/ov_SC04_004/ov_SC04_004_jr_8017AE2C.c:func_80181744", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.263, "objects": ["build/src/ov_SC04_003/ov_SC04_003_jr_8017BEBC.o"], "before_text": "void func_801806E8(s32 a0) {\n s32 local[4]; \n register s32 v0 __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 sum;\n\n v0 = func_8017FA94(a0, 0xFFFB0000, local);\n if (v0 == 1) {\n func_8012ADE4((u8 *)a0);\n *(s32 *)(a0 + 0x1C) = 8;\n func_8012A8B0((u8 *)a0, (s32)&D_8019760C);\n func_8012B23C(a0);\n func_8012AD44((s32 *)a0, 1);\n } else {\n v0 = *(s16 *)(a0 + 0x102);\n if (v0 != 0) {\n \n register s32 tmp __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n tmp = v0;\n __asm__ __volatile__(\"\" : \"=r\"(tmp) : \"0\"(tmp) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n v0 = tmp - 1;\n } else {\n s16 cnt;\n\n if (*(s16 *)(a0 + 0xAA) == 0) {\n func_8017FF9C((void *)a0);\n }\n cnt = *(u16 *)(a0 + 0x104) - 1;\n *(s16 *)(a0 + 0x104) = cnt;\n if (cnt != 0) {\n v0 = 4;\n } else {\n *(s16 *)(a0 + 0x104) = 3;\n v0 = 0x20;\n }\n }\n *(s16 *)(a0 + 0x102) = v0;\n\n v0 = *(s32 *)(a0 + 0x20);\n sum = *(u16 *)(v0 + 0x12) + *(u16 *)(a0 + 0x106);\n *(u16 *)(v0 + 0x12) = sum;\n if (func_8012BEE8(a0) != 0) {\n *(s32 *)(a0 + 0x1C) = 0x80;\n v0 = rand();\n *(s16 *)(a0 + 0x106) = (v0 & 0x20) - 0x10;\n }\n }\n}\n", "after_text": "void func_801806E8(s32 a0) {\n s32 local;\n\n if (func_8017FA94(a0, 0xFFFB0000, &local) == 1) {\n func_8012ADE4((u8 *)a0);\n *(s32 *)(a0 + 0x1C) = 8;\n func_8012A8B0((u8 *)a0, (s32)&D_8019760C);\n func_8012B23C(a0);\n func_8012AD44((s32 *)a0, 1);\n } else {\n if (*(s16 *)(a0 + 0x102) != 0) {\n (*(s16 *)(a0 + 0x102))--;\n } else {\n if (*(s16 *)(a0 + 0xAA) == 0) {\n func_8017FF9C((void *)a0);\n }\n if (--(*(s16 *)(a0 + 0x104)) != 0) {\n *(s16 *)(a0 + 0x102) = 4;\n } else {\n *(s16 *)(a0 + 0x104) = 3;\n *(s16 *)(a0 + 0x102) = 0x20;\n }\n }\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += *(u16 *)(a0 + 0x106);\n if (func_8012BEE8(a0) != 0) {\n *(s32 *)(a0 + 0x1C) = 0x80;\n *(s16 *)(a0 + 0x106) = (rand() & 0x20) - 0x10;\n }\n }\n}\n"} {"ts": "2026-09-10 23:47:29", "label": "s104_d32", "rung": "E", "calib": {"head": "97e5d721b", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c", "fn": "func_801831B8", "addr": 2149069240, "aliases": null, "header": false, "includers": 0, "nhash_before": "9467e18b6ff3f59131a7460352517a3b2b3993b8", "nhash_after": "3ed27d3161cb1f5aad5f27ac0606c337a24d6000", "source": ".run/P36/agents/ov_SC04_004__func_80181744/scratch/copies/func_801831B8.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.36, "objects": ["build/src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.o"], "before_text": "void func_801831B8(s32 a0) {\n s32 local[4]; /* sp+0x10, out-param scratch for func_80182564; never read back here */\n register s32 v0 __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n s32 sum;\n\n v0 = func_80182564(a0, 0xFFFB0000, local);\n if (v0 == 1) {\n func_8012ADE4((u8 *)a0);\n *(s32 *)(a0 + 0x1C) = 8;\n func_8012A8B0((u8 *)a0, (s32)&D_801A86E4);\n func_8012B23C(a0);\n func_8012AD44((s32 *)a0, 1);\n } else {\n v0 = *(s16 *)(a0 + 0x102);\n if (v0 != 0) {\n /* two DISTINCT registers on purpose: the pinned $v0 (=result) is a\n * hardware register variable, so gcc cannot copy-propagate the\n * plain local `tmp` into it \u2014 it must emit a real move, matching\n * the target's addu $v1,$v0,zero / addiu $v0,$v1,-1 pair. */\n register s32 tmp __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n tmp = v0;\n __asm__ __volatile__(\"\" : \"=r\"(tmp) : \"0\"(tmp) : \"memory\"); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus8)\n v0 = tmp - 1;\n } else {\n s16 cnt;\n\n if (*(s16 *)(a0 + 0xAA) == 0) {\n func_80182A6C((void *)a0);\n }\n cnt = *(u16 *)(a0 + 0x104) - 1;\n *(s16 *)(a0 + 0x104) = cnt;\n if (cnt != 0) {\n v0 = 4;\n } else {\n *(s16 *)(a0 + 0x104) = 3;\n v0 = 0x20;\n }\n }\n *(s16 *)(a0 + 0x102) = v0;\n\n v0 = *(s32 *)(a0 + 0x20);\n sum = *(u16 *)(v0 + 0x12) + *(u16 *)(a0 + 0x106);\n *(u16 *)(v0 + 0x12) = sum;\n if (func_8012BEE8(a0) != 0) {\n *(s32 *)(a0 + 0x1C) = 0x80;\n v0 = rand();\n *(s16 *)(a0 + 0x106) = (v0 & 0x20) - 0x10;\n }\n }\n}\n", "after_text": "void func_801831B8(s32 a0) {\n s32 local;\n\n if (func_80182564(a0, 0xFFFB0000, &local) == 1) {\n func_8012ADE4((u8 *)a0);\n *(s32 *)(a0 + 0x1C) = 8;\n func_8012A8B0((u8 *)a0, (s32)&D_801A86E4);\n func_8012B23C(a0);\n func_8012AD44((s32 *)a0, 1);\n } else {\n if (*(s16 *)(a0 + 0x102) != 0) {\n (*(s16 *)(a0 + 0x102))--;\n } else {\n if (*(s16 *)(a0 + 0xAA) == 0) {\n func_80182A6C((void *)a0);\n }\n if (--(*(s16 *)(a0 + 0x104)) != 0) {\n *(s16 *)(a0 + 0x102) = 4;\n } else {\n *(s16 *)(a0 + 0x104) = 3;\n *(s16 *)(a0 + 0x102) = 0x20;\n }\n }\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += *(u16 *)(a0 + 0x106);\n if (func_8012BEE8(a0) != 0) {\n *(s32 *)(a0 + 0x1C) = 0x80;\n *(s16 *)(a0 + 0x106) = (rand() & 0x20) - 0x10;\n }\n }\n}\n"} +{"ts": "2026-09-10 23:48:28", "label": "s104_new4", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_010/ov_SC03_010_jr_8017F6C0.c", "fn": "func_8017F920", "addr": 2149054752, "aliases": null, "header": false, "includers": 0, "nhash_before": "761ffbd7f663979f0bfe9571e3fe171d7ab464d0", "nhash_after": "1b7cf933d004c37ffe340dad8fb7250e58d6ef1f", "source": "delever_regen R34 merge-disjoint v1->addr", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.073, "objects": ["build/src/ov_SC03_010/ov_SC03_010_jr_8017F6C0.o"], "before_text": "void func_8017F920(s32 a0) {\n s32 v0;\n s32 v1;\n register s32 addr __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n addr = (s32)&D_8019C7EC;\n *(s32 *)(a0 + 0x78) = addr;\n if (D_80078EAE == 0) {\n v0 = (*(s16 *)addr * 24) / 16;\n } else {\n v0 = *(u16 *)addr;\n }\n *(s16 *)(a0 + 0x76) = v0;\n *(s16 *)(a0 + 0x5C) = D_8019C7EE;\n if (D_8019C7F0 != 0) {\n v0 = ((s32 (*)(void))func_8012C1B8)();\n *(s32 *)(a0 + 0x20) = v0;\n if (v0 == 0) {\n func_8012CAE4((void *)a0);\n return;\n }\n func_8001C810(v0, D_8019C7F0);\n }\n if (D_8019C7F4 != 0) {\n *(s32 *)(a0 + 0x58) = D_8019C7F4 | 0x60000000;\n }\n\n v1 = *(s32 *)(a0 + 0x20);\n *(s32 *)(v1 + 0x4) |= 0x8040;\n *(u16 *)(a0 + 0x5C) = 0xCC00;\n func_8012A828(a0, (void *)&D_8019D200);\n\n *(s16 *)(a0 + 0x34) = 1;\n *(s16 *)(a0 + 0x2) = 0xB;\n *(s32 *)(a0 + 0x1C) = 0x3C;\n *(s8 *)(a0 + 0x75) = 9;\n D_801A005C = (s16 *)-1;\n}\n", "after_text": "void func_8017F920(s32 a0) {\n s32 v0;\n s32 addr;\n\n addr = (s32)&D_8019C7EC;\n *(s32 *)(a0 + 0x78) = addr;\n if (D_80078EAE == 0) {\n v0 = (*(s16 *)addr * 24) / 16;\n } else {\n v0 = *(u16 *)addr;\n }\n *(s16 *)(a0 + 0x76) = v0;\n *(s16 *)(a0 + 0x5C) = D_8019C7EE;\n if (D_8019C7F0 != 0) {\n v0 = ((s32 (*)(void))func_8012C1B8)();\n *(s32 *)(a0 + 0x20) = v0;\n if (v0 == 0) {\n func_8012CAE4((void *)a0);\n return;\n }\n func_8001C810(v0, D_8019C7F0);\n }\n if (D_8019C7F4 != 0) {\n *(s32 *)(a0 + 0x58) = D_8019C7F4 | 0x60000000;\n }\n\n addr = *(s32 *)(a0 + 0x20);\n *(s32 *)(addr + 0x4) |= 0x8040;\n *(u16 *)(a0 + 0x5C) = 0xCC00;\n func_8012A828(a0, (void *)&D_8019D200);\n\n *(s16 *)(a0 + 0x34) = 1;\n *(s16 *)(a0 + 0x2) = 0xB;\n *(s32 *)(a0 + 0x1C) = 0x3C;\n *(s8 *)(a0 + 0x75) = 9;\n D_801A005C = (s16 *)-1;\n}\n"} +{"ts": "2026-09-10 23:48:57", "label": "s104_new4p", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_013/ov_SC03_013_jr_801806F8.c", "fn": "func_80180958", "addr": 2149058904, "aliases": null, "header": false, "includers": 0, "nhash_before": "761ffbd7f663979f0bfe9571e3fe171d7ab464d0", "nhash_after": "1b7cf933d004c37ffe340dad8fb7250e58d6ef1f", "source": "propagate:src/ov_SC03_010/ov_SC03_010_jr_8017F6C0.c:func_8017F920", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.08, "objects": ["build/src/ov_SC03_013/ov_SC03_013_jr_801806F8.o"], "before_text": "void func_80180958(s32 a0) {\n s32 v0;\n s32 v1;\n register s32 addr __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n addr = (s32)&D_801A52E4;\n *(s32 *)(a0 + 0x78) = addr;\n if (D_80078EAE == 0) {\n v0 = (*(s16 *)addr * 24) / 16;\n } else {\n v0 = *(u16 *)addr;\n }\n *(s16 *)(a0 + 0x76) = v0;\n *(s16 *)(a0 + 0x5C) = D_801A52E6;\n if (D_801A52E8 != 0) {\n v0 = ((s32 (*)(void))func_8012C1B8)();\n *(s32 *)(a0 + 0x20) = v0;\n if (v0 == 0) {\n func_8012CAE4((void *)a0);\n return;\n }\n func_8001C810(v0, D_801A52E8);\n }\n if (D_801A52EC != 0) {\n *(s32 *)(a0 + 0x58) = D_801A52EC | 0x60000000;\n }\n\n v1 = *(s32 *)(a0 + 0x20);\n *(s32 *)(v1 + 0x4) |= 0x8040;\n *(u16 *)(a0 + 0x5C) = 0xCC00;\n func_8012A828(a0, (void *)&D_801A5CF8);\n\n *(s16 *)(a0 + 0x34) = 1;\n *(s16 *)(a0 + 0x2) = 0xB;\n *(s32 *)(a0 + 0x1C) = 0x3C;\n *(s8 *)(a0 + 0x75) = 9;\n D_801AD3E4 = (s16 *)-1;\n}\n", "after_text": "void func_80180958(s32 a0) {\n s32 v0;\n s32 addr;\n\n addr = (s32)&D_801A52E4;\n *(s32 *)(a0 + 0x78) = addr;\n if (D_80078EAE == 0) {\n v0 = (*(s16 *)addr * 24) / 16;\n } else {\n v0 = *(u16 *)addr;\n }\n *(s16 *)(a0 + 0x76) = v0;\n *(s16 *)(a0 + 0x5C) = D_801A52E6;\n if (D_801A52E8 != 0) {\n v0 = ((s32 (*)(void))func_8012C1B8)();\n *(s32 *)(a0 + 0x20) = v0;\n if (v0 == 0) {\n func_8012CAE4((void *)a0);\n return;\n }\n func_8001C810(v0, D_801A52E8);\n }\n if (D_801A52EC != 0) {\n *(s32 *)(a0 + 0x58) = D_801A52EC | 0x60000000;\n }\n\n addr = *(s32 *)(a0 + 0x20);\n *(s32 *)(addr + 0x4) |= 0x8040;\n *(u16 *)(a0 + 0x5C) = 0xCC00;\n func_8012A828(a0, (void *)&D_801A5CF8);\n\n *(s16 *)(a0 + 0x34) = 1;\n *(s16 *)(a0 + 0x2) = 0xB;\n *(s32 *)(a0 + 0x1C) = 0x3C;\n *(s8 *)(a0 + 0x75) = 9;\n D_801AD3E4 = (s16 *)-1;\n}\n"} +{"ts": "2026-09-10 23:49:10", "label": "s104_new4", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/800.c", "fn": "CdReadSectorReadyCB", "addr": 2147590968, "aliases": null, "header": false, "includers": 0, "nhash_before": "14c38513a5e3d924ac91ee86d64488bfba56afca", "nhash_after": "eb2c568c6a8c824cd25dcd8f3a8eda2ba4fc36cd", "source": "delever_regen R34 merge-disjoint cnt->i", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.759, "objects": ["build/src/800.o"], "before_text": "void CdReadSectorReadyCB(u8 reason) {\n CdReq *p = (CdReq *)&cdReq_state;\n XRECT dead;\n u32 *q;\n XRECT *r;\n register s32 i __asm__(\"$18\"); // !FAKE: pin $18 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 n, pos, res, b;\n s32 tmp;\n s32 k80;\n s32 one;\n s32 dst;\n s32 cnt;\n s32 dst4;\n\n if (reason != 1) goto endReason;\n\n func_80043994(cdReq_sectorHdrBuf, 3);\n pos = CdPosToInt((CdlLOC *)cdReq_sectorHdrBuf);\n if (pos != cdReq_posInt) {\n if (D_800AE6F8 == 4) func_8002FDC8();\n cdReq_drainPhase = 2;\n return;\n }\n cdReq_posInt = pos + 1;\n switch (D_800AE6F8) {\n case 0:\n func_80043994(lzss_sectorStagingBuf, 4);\n if (lzss_sectorStagingBuf[0] != 0x434150) goto abortDrain;\n p->flags = D_80079A75;\n switch (D_80079A74) {\n case 6:\n func_80043994(D_8007A280, 0x1FC);\n q = &D_8007A280[0x24];\n n = D_80079A78;\n i = 0;\n p->rectp = (XRECT *)D_8007A280;\n if (n > 0) {\n do {\n func_800599B8(p->rectp, q);\n i++;\n r = p->rectp;\n q += (s16)r->w / 2;\n p->rectp = r + 1;\n } while (i < n);\n }\n goto sectorDone;\n setTwo:\n p->phase = 2;\n goto tilePhase;\n case 0:\n case 5:\n p->texIdx = 0;\n func_80043994(p->mask, 0x10);\n p->rect.h = 0x20;\n p->rect.w = 0x20;\n p->rect.y = 0;\n p->rect.x = 0;\n p->bit = 1;\n p->byteIdx = 0;\n for (;;) {\n if (p->byteIdx >= 0x40) {\n if (p->flags != 0) goto setTwo;\n p->phase = 0;\n goto tilePhase;\n }\n if ((p->mask[p->byteIdx] & p->bit) != 0) goto tilePhase;\n if (p->bit == 0x80) {\n p->bit = 1;\n p->byteIdx++;\n } else {\n p->bit <<= 1;\n }\n p->rect.x += 0x20;\n if ((s16)p->rect.x > 0x3FF) {\n p->rect.x = 0;\n p->rect.y += 0x20;\n }\n }\n tilePhase:\n p->phase++;\n break;\n case 7:\n if (p->size < 0) goto phaseDone;\n p->phase = 3;\n p->words = (u32)(D_80079A7C - 0x7FD) >> 2;\n p->sink = (s32)D_80072C80;\n break;\n case 1:\n p->phase = 3;\n p->words = (u32)(D_80079A7C - 0x7FD) >> 2;\n p->sink = p->dest;\n break;\n case 8:\n p->phase = 6;\n p->words = (u32)(D_80079A7C - 0x7FD) >> 2;\n break;\n case 2:\n if (p->busy != 0) goto phaseDone;\n p->phase = 3;\n dst = *(s32 *)(p->count * 8 + p->list + 4);\n tmp = D_80079A7C - 0x7FD;\n p->words = (u32)tmp >> 2;\n p->sink = dst;\n break;\n case 3:\n if (p->busy != 0) goto phaseDone;\n do {\n res = func_8002FB08(*(s32 *)(p->count * 8 + p->list));\n } while (res == 0);\n p->phase = 4;\n p->words = D_80079A7C - 0x800;\n break;\n case 4:\n p->phase = 5;\n p->words = (u32)(D_80079A7C - 0x7FD) >> 2;\n dst4 = p->dest;\n p->sink = dst4;\n func_80018714((void *)dst4);\n break;\n }\n break;\n case 1:\n q = &lzss_sectorStagingBuf[p->texIdx * 0x200];\n func_80043994(q, 0x200);\n func_800599B8(&p->rect, q);\n p->texIdx = (p->texIdx + 1) & 3;\n k80 = 0x80;\n one = 1;\n do {\n b = p->bit;\n if (b == k80) {\n p->bit = one;\n p->byteIdx++;\n } else {\n p->bit = b << 1;\n }\n if (p->byteIdx < 0x40) goto cont1;\n sectorDone:\n if (p->flags != 0) goto phaseDone;\n p->phase = 0;\n goto post;\n cont1:\n p->rect.x += 0x20;\n if ((s16)p->rect.x > 0x3FF) {\n p->rect.x = 0;\n p->rect.y += 0x20;\n }\n } while ((p->mask[p->byteIdx] & p->bit) == 0);\n break;\n case 3:\n if (p->words < 0x201) {\n func_80043994((void *)p->sink, p->words);\n goto sectorDone;\n }\n func_80043994((void *)p->sink, 0x200);\n p->sink += 0x800;\n p->words -= 0x200;\n break;\n case 4:\n if (p->words < 0x801) {\n cnt = (p->words + 3) / 4;\n func_80043994(lzss_sectorStagingBuf, cnt);\n if (func_8002FC64(p->words, lzss_sectorStagingBuf) == 0) goto stageFail;\n p->count++;\n if (p->flags != 0) goto phaseDone;\n p->phase = 0;\n break;\n }\n func_80043994(lzss_sectorStagingBuf, 0x200);\n res = func_8002FC64(0x800, lzss_sectorStagingBuf);\n p->sink += 0x800;\n p->words -= 0x800;\n if (res != 0) break;\n stageFail:\n func_8002FDC8();\n p->phase = 7;\n break;\n case 5:\n func_80043994(lzss_sectorStagingBuf, 0x200);\n if (LzssDecodeSector((u8 *)lzss_sectorStagingBuf) == 0) goto sectorDone;\n break;\n case 6:\n p->words -= 0x200;\n if (p->words > 0) break;\n if (p->flags == 0) goto setZero;\n phaseDone:\n p->phase = 2;\n break;\n setZero:\n p->phase = 0;\n break;\n }\npost:\n if (p->phase == 2) {\n p->drain = 1;\n } else if (p->phase == 7) {\n p->drain = 2;\n }\nendReason:\n if (reason == 5) {\n if (p->phase == 4) func_8002FDC8();\n abortDrain:\n p->drain = 2;\n }\n}\n", "after_text": "void CdReadSectorReadyCB(u8 reason) {\n CdReq *p = (CdReq *)&cdReq_state;\n XRECT dead;\n u32 *q;\n XRECT *r;\n s32 i;\n s32 n, pos, res, b;\n s32 tmp;\n s32 k80;\n s32 one;\n s32 dst;\n s32 dst4;\n\n if (reason != 1) goto endReason;\n\n func_80043994(cdReq_sectorHdrBuf, 3);\n pos = CdPosToInt((CdlLOC *)cdReq_sectorHdrBuf);\n if (pos != cdReq_posInt) {\n if (D_800AE6F8 == 4) func_8002FDC8();\n cdReq_drainPhase = 2;\n return;\n }\n cdReq_posInt = pos + 1;\n switch (D_800AE6F8) {\n case 0:\n func_80043994(lzss_sectorStagingBuf, 4);\n if (lzss_sectorStagingBuf[0] != 0x434150) goto abortDrain;\n p->flags = D_80079A75;\n switch (D_80079A74) {\n case 6:\n func_80043994(D_8007A280, 0x1FC);\n q = &D_8007A280[0x24];\n n = D_80079A78;\n i = 0;\n p->rectp = (XRECT *)D_8007A280;\n if (n > 0) {\n do {\n func_800599B8(p->rectp, q);\n i++;\n r = p->rectp;\n q += (s16)r->w / 2;\n p->rectp = r + 1;\n } while (i < n);\n }\n goto sectorDone;\n setTwo:\n p->phase = 2;\n goto tilePhase;\n case 0:\n case 5:\n p->texIdx = 0;\n func_80043994(p->mask, 0x10);\n p->rect.h = 0x20;\n p->rect.w = 0x20;\n p->rect.y = 0;\n p->rect.x = 0;\n p->bit = 1;\n p->byteIdx = 0;\n for (;;) {\n if (p->byteIdx >= 0x40) {\n if (p->flags != 0) goto setTwo;\n p->phase = 0;\n goto tilePhase;\n }\n if ((p->mask[p->byteIdx] & p->bit) != 0) goto tilePhase;\n if (p->bit == 0x80) {\n p->bit = 1;\n p->byteIdx++;\n } else {\n p->bit <<= 1;\n }\n p->rect.x += 0x20;\n if ((s16)p->rect.x > 0x3FF) {\n p->rect.x = 0;\n p->rect.y += 0x20;\n }\n }\n tilePhase:\n p->phase++;\n break;\n case 7:\n if (p->size < 0) goto phaseDone;\n p->phase = 3;\n p->words = (u32)(D_80079A7C - 0x7FD) >> 2;\n p->sink = (s32)D_80072C80;\n break;\n case 1:\n p->phase = 3;\n p->words = (u32)(D_80079A7C - 0x7FD) >> 2;\n p->sink = p->dest;\n break;\n case 8:\n p->phase = 6;\n p->words = (u32)(D_80079A7C - 0x7FD) >> 2;\n break;\n case 2:\n if (p->busy != 0) goto phaseDone;\n p->phase = 3;\n dst = *(s32 *)(p->count * 8 + p->list + 4);\n tmp = D_80079A7C - 0x7FD;\n p->words = (u32)tmp >> 2;\n p->sink = dst;\n break;\n case 3:\n if (p->busy != 0) goto phaseDone;\n do {\n res = func_8002FB08(*(s32 *)(p->count * 8 + p->list));\n } while (res == 0);\n p->phase = 4;\n p->words = D_80079A7C - 0x800;\n break;\n case 4:\n p->phase = 5;\n p->words = (u32)(D_80079A7C - 0x7FD) >> 2;\n dst4 = p->dest;\n p->sink = dst4;\n func_80018714((void *)dst4);\n break;\n }\n break;\n case 1:\n q = &lzss_sectorStagingBuf[p->texIdx * 0x200];\n func_80043994(q, 0x200);\n func_800599B8(&p->rect, q);\n p->texIdx = (p->texIdx + 1) & 3;\n k80 = 0x80;\n one = 1;\n do {\n b = p->bit;\n if (b == k80) {\n p->bit = one;\n p->byteIdx++;\n } else {\n p->bit = b << 1;\n }\n if (p->byteIdx < 0x40) goto cont1;\n sectorDone:\n if (p->flags != 0) goto phaseDone;\n p->phase = 0;\n goto post;\n cont1:\n p->rect.x += 0x20;\n if ((s16)p->rect.x > 0x3FF) {\n p->rect.x = 0;\n p->rect.y += 0x20;\n }\n } while ((p->mask[p->byteIdx] & p->bit) == 0);\n break;\n case 3:\n if (p->words < 0x201) {\n func_80043994((void *)p->sink, p->words);\n goto sectorDone;\n }\n func_80043994((void *)p->sink, 0x200);\n p->sink += 0x800;\n p->words -= 0x200;\n break;\n case 4:\n if (p->words < 0x801) {\n i = (p->words + 3) / 4;\n func_80043994(lzss_sectorStagingBuf, i);\n if (func_8002FC64(p->words, lzss_sectorStagingBuf) == 0) goto stageFail;\n p->count++;\n if (p->flags != 0) goto phaseDone;\n p->phase = 0;\n break;\n }\n func_80043994(lzss_sectorStagingBuf, 0x200);\n res = func_8002FC64(0x800, lzss_sectorStagingBuf);\n p->sink += 0x800;\n p->words -= 0x800;\n if (res != 0) break;\n stageFail:\n func_8002FDC8();\n p->phase = 7;\n break;\n case 5:\n func_80043994(lzss_sectorStagingBuf, 0x200);\n if (LzssDecodeSector((u8 *)lzss_sectorStagingBuf) == 0) goto sectorDone;\n break;\n case 6:\n p->words -= 0x200;\n if (p->words > 0) break;\n if (p->flags == 0) goto setZero;\n phaseDone:\n p->phase = 2;\n break;\n setZero:\n p->phase = 0;\n break;\n }\npost:\n if (p->phase == 2) {\n p->drain = 1;\n } else if (p->phase == 7) {\n p->drain = 2;\n }\nendReason:\n if (reason == 5) {\n if (p->phase == 4) func_8002FDC8();\n abortDrain:\n p->drain = 2;\n }\n}\n"} +{"ts": "2026-09-10 23:49:13", "label": "s104_new4", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC01_084/ov_SC01_084_jr_80182A00.c", "fn": "func_80183790", "addr": 2149070736, "aliases": null, "header": false, "includers": 0, "nhash_before": "6859d6d8399a922c267bd920b9cb4f5d29436d91", "nhash_after": "5f17d8f43fb309952829c6aee21e6b1f9dcad312", "source": "delever_regen R36 merge-set-chain sum2 @16", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.176, "objects": ["build/src/ov_SC01_084/ov_SC01_084_jr_80182A00.o"], "before_text": "void func_80183790(s32 a0) {\n s32 sum1;\n register s32 sum2 __asm__(\"$17\"); // !FAKE: pin $17 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 frac;\n s32 threshold;\n s32 ret;\n s32 val0;\n u16 tmp[3];\n s32 cnt1;\n s32 cnt2;\n s32 ptr;\n s32 k5;\n\n sum1 = D_801C7748 + D_8018ABA4;\n frac = sum1 & 0xFFF;\n sum2 = D_801C774A;\n sum2 += D_8018ABA6;\n\n threshold = -(sum1 * 1536) / 12288 - 0x22;\n\n ret = func_80047948(frac);\n val0 = (ret * sum2) >> 12;\n\n ret = func_8004787C(frac);\n k5 = D_8018ABAC;\n tmp[0] = val0;\n tmp[1] = threshold;\n tmp[2] = (ret * sum2) >> 12;\n\n cnt1 = *(s32 *)(a0 + 0x1C);\n tmp[1] -= D_8018ABA8 + k5 * cnt1;\n\n *(s16 *)(a0 + 0x6) = tmp[0];\n *(s16 *)(a0 + 0xA) = tmp[1];\n *(s16 *)(a0 + 0xE) = tmp[2];\n\n ptr = *(s32 *)(a0 + 0x20);\n *(s16 *)(ptr + 0x12) = (-sum1) & 0xFFF;\n\n cnt2 = *(s32 *)(a0 + 0x1C) + 1;\n *(s32 *)(a0 + 0x1C) = cnt2;\n\n if (cnt2 >= D_8018ABAA) {\n *(s32 *)(a0 + 0x1C) = 0x3C;\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n }\n}\n", "after_text": "void func_80183790(s32 a0) {\n s32 sum1;\n s32 sum2;\n s32 frac;\n s32 threshold;\n s32 ret;\n s32 val0;\n u16 tmp[3];\n s32 cnt1;\n s32 cnt2;\n s32 ptr;\n s32 k5;\n\n sum1 = D_801C7748 + D_8018ABA4;\n frac = sum1 & 0xFFF;\n sum2 = D_801C774A + D_8018ABA6;\n\n threshold = -(sum1 * 1536) / 12288 - 0x22;\n\n ret = func_80047948(frac);\n val0 = (ret * sum2) >> 12;\n\n ret = func_8004787C(frac);\n k5 = D_8018ABAC;\n tmp[0] = val0;\n tmp[1] = threshold;\n tmp[2] = (ret * sum2) >> 12;\n\n cnt1 = *(s32 *)(a0 + 0x1C);\n tmp[1] -= D_8018ABA8 + k5 * cnt1;\n\n *(s16 *)(a0 + 0x6) = tmp[0];\n *(s16 *)(a0 + 0xA) = tmp[1];\n *(s16 *)(a0 + 0xE) = tmp[2];\n\n ptr = *(s32 *)(a0 + 0x20);\n *(s16 *)(ptr + 0x12) = (-sum1) & 0xFFF;\n\n cnt2 = *(s32 *)(a0 + 0x1C) + 1;\n *(s32 *)(a0 + 0x1C) = cnt2;\n\n if (cnt2 >= D_8018ABAA) {\n *(s32 *)(a0 + 0x1C) = 0x3C;\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n }\n}\n"} +{"ts": "2026-09-10 23:49:17", "label": "s104_new4", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_016/ov_SC02_016_jr_801810C8.c", "fn": "func_801826F0", "addr": 2149066480, "aliases": null, "header": false, "includers": 0, "nhash_before": "c5bbc41d6c07ef09247015dd14644819ad1538e2", "nhash_after": "d430b3d7286c62c3044aadd62894294f435280b9", "source": "delever_regen R36 merge-set-chain p @6", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.184, "objects": ["build/src/ov_SC02_016/ov_SC02_016_jr_801810C8.o"], "before_text": "void func_801826F0(s32 *param_1)\n{\n int new_var;\nregister s32 p __asm__(\"$4\"); // !FAKE: pin $4 \u2014 NEEDED DIFFERS (P36 rung B tus9)\ns32 r;\n p = (s32) (&D_801B42D8);\n r = param_1[0x2c / 4];\n new_var = r;\n p += new_var;\n *((s8 *) p) = 0;\n ((void (*)(void)) func_80146C3C)();\n}\n", "after_text": "void func_801826F0(s32 *param_1)\n{\n int new_var;\ns32 p;\ns32 r;\n r = param_1[0x2c / 4];\n new_var = r;\n p = (s32) (&D_801B42D8) + new_var;\n *((s8 *) p) = 0;\n ((void (*)(void)) func_80146C3C)();\n}\n"} +{"ts": "2026-09-10 23:49:20", "label": "s104_new4", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_002/ov_SC03_002_jr_80181D78.c", "fn": "func_80181D78", "addr": 2149064056, "aliases": null, "header": false, "includers": 0, "nhash_before": "651049464ecb66ac8a993474913a93fd64d39b33", "nhash_after": "d3cc71c3fceaf8dfab434a3310d49c7207b7b1b4", "source": "delever_regen R23 split self into 3", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.126, "objects": ["build/src/ov_SC03_002/ov_SC03_002_jr_80181D78.o"], "before_text": "void func_80181D78(s32 a0) {\n s32 r;\n s32 r2;\n register s32 *self __asm__(\"$16\"); // !FAKE: pin $16 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n u16 arr[6];\n\n extern s32 rand(void);\n extern void func_8012A828(s32 a0, s32 a1);\n extern void func_8012E8A8(u8 *a0);\n extern s32 func_8012BEE8(s32 a0);\n extern void func_8012B178(s32 a0, s32 a1);\n extern void func_8012AD80(s32 a0);\n extern s32 func_8012B030(u8 *a0);\n extern s32 func_8012B744(void *a0, void *a1);\n extern s32 func_8012B608(s32 a0, s32 a1, s32 a2);\n extern s32 func_8012B6D4(s16 *a0, s16 *a1);\n extern s32 func_8012BC60(void *a0, void *a1);\n extern void func_801821B4(s32 arg0);\n extern s16 D_80189CD8[];\n extern u16 D_80189CDA;\n extern u16 D_80189CDC;\n extern s16 D_80189CDE[];\n extern void (*D_80189CEC[])(void);\n extern void (*D_80189CE4)(void);\n extern void (*D_80189CE0)(void);\n extern void (*D_80189CE8[])(void);\n extern u8 D_801C855C[];\n extern u8 D_801C8634[];\n extern u8 D_801C868C[];\n extern void (*D_80189C00[])(void);\n extern u8 D_801C887C[];\n extern void (*D_80189CA8[])(void);\n\n switch (*(u16 *)(a0 + 0x34)) {\n case 0:\n *(s32 *)(a0 + 0x1C) += 1;\n if (D_80189CD8[0] >= *(s32 *)(a0 + 0x1C)) {\n return;\n }\n *(u16 *)(a0 + 0x34) += 1;\n break;\n case 1:\n *(s32 *)&arr[0] = *(s32 *)(*(s32 *)(a0 + 0x64) + 4);\n arr[1] += D_80189CDA;\n *(s32 *)&arr[2] = *(s32 *)(*(s32 *)(a0 + 0x64) + 8);\n *(s32 *)&arr[4] = *(s32 *)(*(s32 *)(a0 + 0x64) + 0xC);\n arr[5] += D_80189CDC;\n r = func_8012B744((void *)(a0 + 4), D_80189CEC);\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) = r;\n func_8012B2CC((s32)a0);\n func_8012B178((s32)a0, (s32)D_80189CE4);\n func_8012AD80((s32)a0);\n *(u16 *)(a0 + 0xA) -= 8;\n func_8012B030((u8 *)a0);\n *(s32 *)(a0 + 0x1C) += 1;\n if (*(s32 *)(a0 + 0x1C) < D_80189CDE[0]) {\n return;\n }\n func_8012B178((s32)a0, (s32)D_80189CE0);\n func_8012A828((s32)a0, (s32)D_801C855C);\n *(u16 *)(a0 + 0x34) += 1;\n *(s32 *)(a0 + 0x1C) = 0;\n break;\n case 2:\n func_8012B178((s32)a0, (s32)D_80189CE0);\n func_8012AD80((s32)a0);\n *(u16 *)(a0 + 0xA) -= 8;\n func_8012B030((u8 *)a0);\n *(s32 *)(a0 + 0x1C) += 1;\n if (*(s32 *)(a0 + 0x1C) < *(s16 *)D_80189CE8) {\n return;\n }\n func_8012A828((s32)a0, (s32)D_80189CA8);\n *(u16 *)(a0 + 0x34) += 1;\n *(s32 *)(a0 + 0x1C) = 5;\n break;\n case 3:\n if (func_8012BEE8((s32)a0) == 0) {\n return;\n }\n *(u16 *)(a0 + 0x34) += 1;\n *(s32 *)(a0 + 0x1C) = 0;\n break;\n case 4:\n if (func_8012BEE8((s32)a0) != 0) {\n *(s32 *)(a0 + 0x1C) = (rand() & 0x1F) + 0xB4;\n func_8012A828((s32)a0, (s32)((rand() & 1) ? D_801C8634 : D_801C868C));\n }\n if (*(s16 *)(a0 + 0x102) != 1) {\n return;\n }\n func_8012A828((s32)a0, (s32)D_80189C00);\n *(u16 *)(a0 + 0x34) += 1;\n *(s32 *)(a0 + 0x1C) = 6;\n break;\n case 5:\n func_8012BEE8((s32)a0);\n if (*(s32 *)(a0 + 0x1C) == 1) {\n func_8012A828((s32)a0, (s32)D_801C855C);\n }\n self = (s32 *)(a0 + 4);\n r = func_8012B6D4((s16 *)self, (s16 *)(*(s32 *)(a0 + 0x64) + 4));\n r2 = func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), r, 8);\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += r2;\n if (func_8012BC60((void *)self, (void *)(*(s32 *)(a0 + 0x64) + 4)) < 0x7900) {\n return;\n }\n func_8012A828((s32)a0, (s32)D_801C887C);\n *(u16 *)(a0 + 0x34) += 1;\n func_801821B4((s32)a0);\n return;\n case 6:\n self = (s32 *)(a0 + 4);\n r = func_8012B6D4((s16 *)self, (s16 *)(*(s32 *)(a0 + 0x64) + 4));\n r2 = func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), r, 8);\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += r2;\n func_8012B178((s32)a0, (s32)0xFFFA0000);\n func_8012AD80((s32)a0);\n *(u16 *)(a0 + 0xA) -= 8;\n func_8012B030((u8 *)a0);\n if (*(s16 *)(a0 + 0x102) != 2) {\n return;\n }\n *(u16 *)(a0 + 0x34) += 1;\n *(s32 *)(a0 + 0x1C) = 0x10;\n break;\n case 7:\n self = (s32 *)(a0 + 4);\n r = func_8012B6D4((s16 *)self, (s16 *)(*(s32 *)(a0 + 0x64) + 4));\n r2 = func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), r, 8);\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += r2;\n func_8012B178((s32)a0, (s32)0xFFFA0000);\n func_8012AD80((s32)a0);\n *(u16 *)(a0 + 0xA) -= 8;\n func_8012B030((u8 *)a0);\n if (func_8012BEE8((s32)a0) == 0) {\n return;\n }\n func_8012E8A8((u8 *)a0);\n *(u16 *)(a0 + 0x34) += 1;\n break;\n case 8:\n break;\n }\n}\n", "after_text": "void func_80181D78(s32 a0) {\n s32 r;\n s32 r2;\n s32 *self, *self2, *self3;\n u16 arr[6];\n\n extern s32 rand(void);\n extern void func_8012A828(s32 a0, s32 a1);\n extern void func_8012E8A8(u8 *a0);\n extern s32 func_8012BEE8(s32 a0);\n extern void func_8012B178(s32 a0, s32 a1);\n extern void func_8012AD80(s32 a0);\n extern s32 func_8012B030(u8 *a0);\n extern s32 func_8012B744(void *a0, void *a1);\n extern s32 func_8012B608(s32 a0, s32 a1, s32 a2);\n extern s32 func_8012B6D4(s16 *a0, s16 *a1);\n extern s32 func_8012BC60(void *a0, void *a1);\n extern void func_801821B4(s32 arg0);\n extern s16 D_80189CD8[];\n extern u16 D_80189CDA;\n extern u16 D_80189CDC;\n extern s16 D_80189CDE[];\n extern void (*D_80189CEC[])(void);\n extern void (*D_80189CE4)(void);\n extern void (*D_80189CE0)(void);\n extern void (*D_80189CE8[])(void);\n extern u8 D_801C855C[];\n extern u8 D_801C8634[];\n extern u8 D_801C868C[];\n extern void (*D_80189C00[])(void);\n extern u8 D_801C887C[];\n extern void (*D_80189CA8[])(void);\n\n switch (*(u16 *)(a0 + 0x34)) {\n case 0:\n *(s32 *)(a0 + 0x1C) += 1;\n if (D_80189CD8[0] >= *(s32 *)(a0 + 0x1C)) {\n return;\n }\n *(u16 *)(a0 + 0x34) += 1;\n break;\n case 1:\n *(s32 *)&arr[0] = *(s32 *)(*(s32 *)(a0 + 0x64) + 4);\n arr[1] += D_80189CDA;\n *(s32 *)&arr[2] = *(s32 *)(*(s32 *)(a0 + 0x64) + 8);\n *(s32 *)&arr[4] = *(s32 *)(*(s32 *)(a0 + 0x64) + 0xC);\n arr[5] += D_80189CDC;\n r = func_8012B744((void *)(a0 + 4), D_80189CEC);\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) = r;\n func_8012B2CC((s32)a0);\n func_8012B178((s32)a0, (s32)D_80189CE4);\n func_8012AD80((s32)a0);\n *(u16 *)(a0 + 0xA) -= 8;\n func_8012B030((u8 *)a0);\n *(s32 *)(a0 + 0x1C) += 1;\n if (*(s32 *)(a0 + 0x1C) < D_80189CDE[0]) {\n return;\n }\n func_8012B178((s32)a0, (s32)D_80189CE0);\n func_8012A828((s32)a0, (s32)D_801C855C);\n *(u16 *)(a0 + 0x34) += 1;\n *(s32 *)(a0 + 0x1C) = 0;\n break;\n case 2:\n func_8012B178((s32)a0, (s32)D_80189CE0);\n func_8012AD80((s32)a0);\n *(u16 *)(a0 + 0xA) -= 8;\n func_8012B030((u8 *)a0);\n *(s32 *)(a0 + 0x1C) += 1;\n if (*(s32 *)(a0 + 0x1C) < *(s16 *)D_80189CE8) {\n return;\n }\n func_8012A828((s32)a0, (s32)D_80189CA8);\n *(u16 *)(a0 + 0x34) += 1;\n *(s32 *)(a0 + 0x1C) = 5;\n break;\n case 3:\n if (func_8012BEE8((s32)a0) == 0) {\n return;\n }\n *(u16 *)(a0 + 0x34) += 1;\n *(s32 *)(a0 + 0x1C) = 0;\n break;\n case 4:\n if (func_8012BEE8((s32)a0) != 0) {\n *(s32 *)(a0 + 0x1C) = (rand() & 0x1F) + 0xB4;\n func_8012A828((s32)a0, (s32)((rand() & 1) ? D_801C8634 : D_801C868C));\n }\n if (*(s16 *)(a0 + 0x102) != 1) {\n return;\n }\n func_8012A828((s32)a0, (s32)D_80189C00);\n *(u16 *)(a0 + 0x34) += 1;\n *(s32 *)(a0 + 0x1C) = 6;\n break;\n case 5:\n func_8012BEE8((s32)a0);\n if (*(s32 *)(a0 + 0x1C) == 1) {\n func_8012A828((s32)a0, (s32)D_801C855C);\n }\n self = (s32 *)(a0 + 4);\n r = func_8012B6D4((s16 *)self, (s16 *)(*(s32 *)(a0 + 0x64) + 4));\n r2 = func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), r, 8);\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += r2;\n if (func_8012BC60((void *)self, (void *)(*(s32 *)(a0 + 0x64) + 4)) < 0x7900) {\n return;\n }\n func_8012A828((s32)a0, (s32)D_801C887C);\n *(u16 *)(a0 + 0x34) += 1;\n func_801821B4((s32)a0);\n return;\n case 6:\n self2 = (s32 *)(a0 + 4);\n r = func_8012B6D4((s16 *)self2, (s16 *)(*(s32 *)(a0 + 0x64) + 4));\n r2 = func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), r, 8);\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += r2;\n func_8012B178((s32)a0, (s32)0xFFFA0000);\n func_8012AD80((s32)a0);\n *(u16 *)(a0 + 0xA) -= 8;\n func_8012B030((u8 *)a0);\n if (*(s16 *)(a0 + 0x102) != 2) {\n return;\n }\n *(u16 *)(a0 + 0x34) += 1;\n *(s32 *)(a0 + 0x1C) = 0x10;\n break;\n case 7:\n self3 = (s32 *)(a0 + 4);\n r = func_8012B6D4((s16 *)self3, (s16 *)(*(s32 *)(a0 + 0x64) + 4));\n r2 = func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), r, 8);\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += r2;\n func_8012B178((s32)a0, (s32)0xFFFA0000);\n func_8012AD80((s32)a0);\n *(u16 *)(a0 + 0xA) -= 8;\n func_8012B030((u8 *)a0);\n if (func_8012BEE8((s32)a0) == 0) {\n return;\n }\n func_8012E8A8((u8 *)a0);\n *(u16 *)(a0 + 0x34) += 1;\n break;\n case 8:\n break;\n }\n}\n"} +{"ts": "2026-09-10 23:49:23", "label": "s104_new4", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_011/ov_SC03_011_jr_8017C730.c", "fn": "func_8017F9CC", "addr": 2149054924, "aliases": null, "header": false, "includers": 0, "nhash_before": "3549926032d416037d523ca381579d67498a8538", "nhash_after": "13a414d9c3dc7f97dc5aeaa8ccc227ea8b75af4f", "source": "delever_regen R34 merge-disjoint v1->addr", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.197, "objects": ["build/src/ov_SC03_011/ov_SC03_011_jr_8017C730.o"], "before_text": "void func_8017F9CC(s32 a0) {\n s32 v0;\n s32 v1;\n register s32 addr __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n\n addr = (s32)&D_8018547C;\n *(s32 *)(a0 + 0x78) = addr;\n if (D_80078EAE == 0) {\n v0 = (*(s16 *)addr * 24) / 16;\n } else {\n v0 = *(u16 *)addr;\n }\n *(s16 *)(a0 + 0x76) = v0;\n *(s16 *)(a0 + 0x5C) = D_8018547E;\n if (D_80185480 != 0) {\n v0 = ((s32 (*)(void))func_8012C1B8)();\n *(s32 *)(a0 + 0x20) = v0;\n if (v0 == 0) {\n func_8012CAE4((void *)a0);\n return;\n }\n func_8001C810(v0, D_80185480);\n }\n if (D_80185484 != 0) {\n *(s32 *)(a0 + 0x58) = D_80185484 | 0x60000000;\n }\n\n v1 = *(s32 *)(a0 + 0x20);\n *(s32 *)(v1 + 0x4) |= 0x8040;\n *(s8 *)(a0 + 0xC0) = 1;\n *(s32 *)(a0 + 0xB4) = 1;\n func_8012A828(a0, (void *)&D_80181594);\n\n *(s16 *)(a0 + 0x2) = 1;\n *(s8 *)(a0 + 0x75) = 8;\n func_8012C588(0xE1, a0);\n\n *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18) = 0xCCC;\n *(s16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = 0xCCC;\n *(s16 *)(*(s32 *)(a0 + 0x20) + 0x1C) = 0xCCC;\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x2C) |= 0x10;\n}\n", "after_text": "void func_8017F9CC(s32 a0) {\n s32 v0;\n s32 addr;\n\n addr = (s32)&D_8018547C;\n *(s32 *)(a0 + 0x78) = addr;\n if (D_80078EAE == 0) {\n v0 = (*(s16 *)addr * 24) / 16;\n } else {\n v0 = *(u16 *)addr;\n }\n *(s16 *)(a0 + 0x76) = v0;\n *(s16 *)(a0 + 0x5C) = D_8018547E;\n if (D_80185480 != 0) {\n v0 = ((s32 (*)(void))func_8012C1B8)();\n *(s32 *)(a0 + 0x20) = v0;\n if (v0 == 0) {\n func_8012CAE4((void *)a0);\n return;\n }\n func_8001C810(v0, D_80185480);\n }\n if (D_80185484 != 0) {\n *(s32 *)(a0 + 0x58) = D_80185484 | 0x60000000;\n }\n\n addr = *(s32 *)(a0 + 0x20);\n *(s32 *)(addr + 0x4) |= 0x8040;\n *(s8 *)(a0 + 0xC0) = 1;\n *(s32 *)(a0 + 0xB4) = 1;\n func_8012A828(a0, (void *)&D_80181594);\n\n *(s16 *)(a0 + 0x2) = 1;\n *(s8 *)(a0 + 0x75) = 8;\n func_8012C588(0xE1, a0);\n\n *(s16 *)(*(s32 *)(a0 + 0x20) + 0x18) = 0xCCC;\n *(s16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = 0xCCC;\n *(s16 *)(*(s32 *)(a0 + 0x20) + 0x1C) = 0xCCC;\n *(u16 *)(*(s32 *)(a0 + 0x20) + 0x2C) |= 0x10;\n}\n"} +{"ts": "2026-09-10 23:49:26", "label": "s104_new4", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_010/ov_SC03_010_jr_8017C730.c", "fn": "func_8017E3B8", "addr": 2149049272, "aliases": null, "header": false, "includers": 0, "nhash_before": "ed673c58d06c4b0a35016d61d521ec6b1796623d", "nhash_after": "2894e804cf559409dfdd682d459ff6331d37c714", "source": "delever_regen R34 merge-disjoint ang1->m1", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.156, "objects": ["build/src/ov_SC03_010/ov_SC03_010_jr_8017C730.o"], "before_text": "void func_8017E3B8(a0)\ns32 a0;\n{\n s16 s2;\n s16 s0;\n s32 obj;\n s32 ang0;\n s32 ang1;\n s32 x;\n register s32 m1 __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 m2;\n s16 d;\n s32 q;\n u16 vol;\n u16 prev;\n s32 pad[2];\n\n prev = *(u16 *)(a0 + 0x100);\n *(s16 *)(a0 + 0x100) = 0;\n *(s16 *)(a0 + 0x102) = prev;\n *(s32 *)(a0 + 0x1C) += 1;\n\n s2 = D_80126B62 - *(u16 *)(a0 + 0xA);\n if (s2 < 0) {\n s2 = -s2;\n }\n if (s2 > 0x180) {\n return;\n }\n\n s0 = *(s16 *)(a0 + 0xFC);\n if (s0 != 0) {\n if ((func_800291B4(0xCE) & 0xFF) >= s0) {\n *(s16 *)(a0 + 0x5C) = 0;\n return;\n }\n *(s16 *)(a0 + 0x5C) = 0x800;\n if (*(s16 *)(a0 + 0xFC) != 0) {\n goto L474;\n }\n }\n if ((*(s32 *)(a0 + 0x1C) & 0x20) != 0) {\n return;\n }\nL474:\n\n if (*(s32 *)(a0 + 0x1C) & 1) {\n obj = func_80132EF4(a0, 0x22);\n if (obj != 0) {\n func_80129374(obj, a0);\n if (*(s16 *)(a0 + 0xFE) == 0) {\n *(s16 *)(*(s32 *)(obj + 0x20) + 0x18) = 0x2C00;\n *(s16 *)(*(s32 *)(obj + 0x20) + 0x1A) = 0x2000;\n } else {\n *(s16 *)(*(s32 *)(obj + 0x20) + 0x18) = 0x4000;\n *(s16 *)(*(s32 *)(obj + 0x20) + 0x1A) = 0x4000;\n }\n }\n }\n\n x = ratan2(-*(s16 *)&D_80126B66, *(s16 *)&D_80126B5E) - 0x400;\n m1 = x & 0xFFF;\n ang0 = m1;\n if (x & 0x800) {\n ang0 = m1 | 0xF000;\n }\n x = ratan2(-*(s16 *)(a0 + 0xE), *(s16 *)(a0 + 6)) - 0x400;\n m2 = x & 0xFFF;\n ang1 = m2;\n if (x & 0x800) {\n ang1 = m2 | 0xF000;\n }\n x = ang1 - ang0;\n m2 = x & 0xFFF;\n d = m2;\n if (x & 0x800) {\n d = m2 | 0xF000;\n }\n if (d < 0) {\n d = -d;\n }\n if (d < 0x200) {\n if (D_80183C68[*(s16 *)(a0 + 0x70)] != 0) {\n q = ((0x200 - d) >> 2) - (s2 >> 2);\n if (q < 0) {\n vol = 0x1000;\n } else {\n vol = q | 0x1000;\n }\n func_8002D59C(D_80183C68[*(s16 *)(a0 + 0x70)], vol,\n *(s16 *)(a0 + 0x70) & 0xFFFF);\n *(s16 *)(a0 + 0x100) = 1;\n }\n }\n\n if ((*(s16 *)(a0 + 0xFC) != 0 || (*(s32 *)(a0 + 0x1C) & 0x1F) >= 8) &&\n func_8017E69C(a0) != 0) {\n u16 *p = &D_80126B96;\n D_80126B98 = 0xC;\n *p |= 0x4000;\n }\n}\n", "after_text": "void func_8017E3B8(a0)\ns32 a0;\n{\n s16 s2;\n s16 s0;\n s32 obj;\n s32 ang0;\n s32 x;\n s32 m1;\n s32 m2;\n s16 d;\n s32 q;\n u16 vol;\n u16 prev;\n s32 pad[2];\n\n prev = *(u16 *)(a0 + 0x100);\n *(s16 *)(a0 + 0x100) = 0;\n *(s16 *)(a0 + 0x102) = prev;\n *(s32 *)(a0 + 0x1C) += 1;\n\n s2 = D_80126B62 - *(u16 *)(a0 + 0xA);\n if (s2 < 0) {\n s2 = -s2;\n }\n if (s2 > 0x180) {\n return;\n }\n\n s0 = *(s16 *)(a0 + 0xFC);\n if (s0 != 0) {\n if ((func_800291B4(0xCE) & 0xFF) >= s0) {\n *(s16 *)(a0 + 0x5C) = 0;\n return;\n }\n *(s16 *)(a0 + 0x5C) = 0x800;\n if (*(s16 *)(a0 + 0xFC) != 0) {\n goto L474;\n }\n }\n if ((*(s32 *)(a0 + 0x1C) & 0x20) != 0) {\n return;\n }\nL474:\n\n if (*(s32 *)(a0 + 0x1C) & 1) {\n obj = func_80132EF4(a0, 0x22);\n if (obj != 0) {\n func_80129374(obj, a0);\n if (*(s16 *)(a0 + 0xFE) == 0) {\n *(s16 *)(*(s32 *)(obj + 0x20) + 0x18) = 0x2C00;\n *(s16 *)(*(s32 *)(obj + 0x20) + 0x1A) = 0x2000;\n } else {\n *(s16 *)(*(s32 *)(obj + 0x20) + 0x18) = 0x4000;\n *(s16 *)(*(s32 *)(obj + 0x20) + 0x1A) = 0x4000;\n }\n }\n }\n\n x = ratan2(-*(s16 *)&D_80126B66, *(s16 *)&D_80126B5E) - 0x400;\n m1 = x & 0xFFF;\n ang0 = m1;\n if (x & 0x800) {\n ang0 = m1 | 0xF000;\n }\n x = ratan2(-*(s16 *)(a0 + 0xE), *(s16 *)(a0 + 6)) - 0x400;\n m2 = x & 0xFFF;\n m1 = m2;\n if (x & 0x800) {\n m1 = m2 | 0xF000;\n }\n x = m1 - ang0;\n m2 = x & 0xFFF;\n d = m2;\n if (x & 0x800) {\n d = m2 | 0xF000;\n }\n if (d < 0) {\n d = -d;\n }\n if (d < 0x200) {\n if (D_80183C68[*(s16 *)(a0 + 0x70)] != 0) {\n q = ((0x200 - d) >> 2) - (s2 >> 2);\n if (q < 0) {\n vol = 0x1000;\n } else {\n vol = q | 0x1000;\n }\n func_8002D59C(D_80183C68[*(s16 *)(a0 + 0x70)], vol,\n *(s16 *)(a0 + 0x70) & 0xFFFF);\n *(s16 *)(a0 + 0x100) = 1;\n }\n }\n\n if ((*(s16 *)(a0 + 0xFC) != 0 || (*(s32 *)(a0 + 0x1C) & 0x1F) >= 8) &&\n func_8017E69C(a0) != 0) {\n u16 *p = &D_80126B96;\n D_80126B98 = 0xC;\n *p |= 0x4000;\n }\n}\n"} +{"ts": "2026-09-10 23:49:29", "label": "s104_new4", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_097/ov_SC03_097_jr_8017D898.c", "fn": "func_8017F304", "addr": 2149053188, "aliases": null, "header": false, "includers": 0, "nhash_before": "905729303c63306c7637f8dbd2f0e079167a9be6", "nhash_after": "3abe21b26b56e4d0a29a9d1cf6bd7045cbb4a42f", "source": "delever_regen R34 merge-disjoint hi->lo", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.217, "objects": ["build/src/ov_SC03_097/ov_SC03_097_jr_8017D898.o"], "before_text": "void func_8017F304(s32 a0) {\n Blk8_80126940_8017D6D0_8017F48C sp10;\n u8 t;\n register s16 lo __asm__(\"$4\"); // !FAKE: pin $4 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s16 hi;\n\n if (func_80148800(&D_80126B58) & 3) {\n t = (*(u8 *)(a0 + 5) + 1) & 1;\n *(u8 *)(a0 + 5) = t;\n *(s32 *)(a0 + 0x14) = D_80189BC0[t];\n }\n\n sp10 = D_80126940;\n\n lo = -0x1440;\n if (sp10.v[0] < lo) {\n sp10.v[0] = lo;\n }\n hi = -0x10c0;\n if (sp10.v[0] > hi) {\n sp10.v[0] = hi;\n }\n func_8017F53C(a0, sp10.v);\n}\n", "after_text": "void func_8017F304(s32 a0) {\n Blk8_80126940_8017D6D0_8017F48C sp10;\n u8 t;\n s16 lo;\n\n if (func_80148800(&D_80126B58) & 3) {\n t = (*(u8 *)(a0 + 5) + 1) & 1;\n *(u8 *)(a0 + 5) = t;\n *(s32 *)(a0 + 0x14) = D_80189BC0[t];\n }\n\n sp10 = D_80126940;\n\n lo = -0x1440;\n if (sp10.v[0] < lo) {\n sp10.v[0] = lo;\n }\n lo = -0x10c0;\n if (sp10.v[0] > lo) {\n sp10.v[0] = lo;\n }\n func_8017F53C(a0, sp10.v);\n}\n"} +{"ts": "2026-09-10 23:49:33", "label": "s104_new4", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_108/ov_SC03_108_jr_8017BEBC.c", "fn": "func_8017E71C", "addr": 2149050140, "aliases": null, "header": false, "includers": 0, "nhash_before": "0ea24e9a21fddab5ebae1502532eb27d1b235f0b", "nhash_after": "08c70527f0ac1dd812f293d794646413129b1b52", "source": "delever_regen R34 merge-disjoint vol->v1", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.183, "objects": ["build/src/ov_SC03_108/ov_SC03_108_jr_8017BEBC.o"], "before_text": "void func_8017E71C(void *a0) {\n extern u8 D_80184818[];\n extern s16 D_8018481A[][4];\n extern u16 D_8018481E[];\n s32 s0 = (s32)a0;\n s32 v1;\n s32 s1;\n s16 v[4]; /* sp+0x10 */\n s32 sxy; /* sp+0x18 */\n s32 z; /* sp+0x1C */\n s32 flag; /* sp+0x20 */\n\n if (*(s16 *)(s0 + 0x102) == 0) {\n v1 = ((s32 (*)(void *, u8 *))func_8012CC64)(a0, D_80184818);\n } else {\n v1 = ((s32 (*)(s32, s32))func_8012CC40)(\n s0, (s32)&D_80184818[*(s16 *)(s0 + 0x102) * 8]);\n }\n\n if (*(s16 *)(s0 + 0xA) >= -0x200) {\n func_8012C218((void *)s0);\n return;\n }\n\n if (v1 != 0) {\n v1 = v1 & 0x2000;\n s1 = D_8018481E[*(s16 *)(s0 + 0x102) * 4];\n if (v1 != 0) {\n *(s16 *)(s0 + 0x16) = -*(u16 *)(s0 + 0x16);\n if (*(s16 *)(s0 + 0xFE) == 0) {\n *(s16 *)(s0 + 0xFE) = *(s16 *)(s0 + 0xFE) + 1;\n *(s16 *)(s0 + 0x16) = *(u16 *)(s0 + 0x16) - 8;\n }\n } else {\n *(s16 *)(s0 + 0xFE) = 0;\n *(s16 *)(s0 + 0x16) = -4;\n if (*(s16 *)(s0 + 0x102) < 2) {\n if ((rand() & 0x7FFF) < (s16)s1) {\n func_8012C658(0x1A9, 2, s0);\n }\n }\n }\n if (s1 != 0) {\n s32 e = func_80132EF4(s0, 0x22);\n if (e != 0) {\n *(s16 *)(e + 0xA) = *(u16 *)(e + 0xA)\n + *(u16 *)&D_8018481A[*(s16 *)(s0 + 0x102)][0];\n *(s16 *)(e + 0x34) = s1 + 1;\n }\n }\n\n {\n s32 f = *(u16 *)(s0 + 0x70);\n s1 = (f & 0x80) ? 0x6DC : 0;\n if (f & 0x40) {\n s1 = 0x6DB;\n }\n }\n if (s1 != 0) {\n s32 sx;\n s32 pan;\n s32 vol;\n\n v[0] = *(u16 *)(s0 + 0x6);\n v[1] = *(u16 *)(s0 + 0xA);\n v[2] = *(u16 *)(s0 + 0xE);\n func_8012E32C();\n RotTransPers((s32)v, (s32)&sxy, &z, &flag);\n sx = (s16)*(u16 *)&sxy;\n pan = (sx + 0xA0) / 0x14;\n if (sx < 0) {\n vol = (sx >> 1) + 0x7F;\n } else {\n vol = 0x7F - (sx >> 1);\n }\n if ((u32)(pan & 0xFFFF) < 0x10) {\n s32 row = vol - 0x2F;\n __asm__(\"\" : \"=r\"(row) : \"0\"(row)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus10)\n if ((u32)(row & 0xFFFF) < 0x51) {\n func_8002D4C8(s1, (vol | 0x3000 | (pan << 8)) & 0xFFFF);\n }\n }\n }\n }\n\n {\n s32 p = *(s32 *)(s0 + 0x20);\n *(s16 *)(p + 0x10) = *(u16 *)(p + 0x10) + *(u16 *)(s0 + 0x100);\n }\n func_8017E9C0(s0);\n}\n", "after_text": "void func_8017E71C(void *a0) {\n extern u8 D_80184818[];\n extern s16 D_8018481A[][4];\n extern u16 D_8018481E[];\n s32 s0 = (s32)a0;\n s32 v1;\n s32 s1;\n s16 v[4]; /* sp+0x10 */\n s32 sxy; /* sp+0x18 */\n s32 z; /* sp+0x1C */\n s32 flag; /* sp+0x20 */\n\n if (*(s16 *)(s0 + 0x102) == 0) {\n v1 = ((s32 (*)(void *, u8 *))func_8012CC64)(a0, D_80184818);\n } else {\n v1 = ((s32 (*)(s32, s32))func_8012CC40)(\n s0, (s32)&D_80184818[*(s16 *)(s0 + 0x102) * 8]);\n }\n\n if (*(s16 *)(s0 + 0xA) >= -0x200) {\n func_8012C218((void *)s0);\n return;\n }\n\n if (v1 != 0) {\n v1 = v1 & 0x2000;\n s1 = D_8018481E[*(s16 *)(s0 + 0x102) * 4];\n if (v1 != 0) {\n *(s16 *)(s0 + 0x16) = -*(u16 *)(s0 + 0x16);\n if (*(s16 *)(s0 + 0xFE) == 0) {\n *(s16 *)(s0 + 0xFE) = *(s16 *)(s0 + 0xFE) + 1;\n *(s16 *)(s0 + 0x16) = *(u16 *)(s0 + 0x16) - 8;\n }\n } else {\n *(s16 *)(s0 + 0xFE) = 0;\n *(s16 *)(s0 + 0x16) = -4;\n if (*(s16 *)(s0 + 0x102) < 2) {\n if ((rand() & 0x7FFF) < (s16)s1) {\n func_8012C658(0x1A9, 2, s0);\n }\n }\n }\n if (s1 != 0) {\n s32 e = func_80132EF4(s0, 0x22);\n if (e != 0) {\n *(s16 *)(e + 0xA) = *(u16 *)(e + 0xA)\n + *(u16 *)&D_8018481A[*(s16 *)(s0 + 0x102)][0];\n *(s16 *)(e + 0x34) = s1 + 1;\n }\n }\n\n {\n s32 f = *(u16 *)(s0 + 0x70);\n s1 = (f & 0x80) ? 0x6DC : 0;\n if (f & 0x40) {\n s1 = 0x6DB;\n }\n }\n if (s1 != 0) {\n s32 sx;\n s32 pan;\n\n v[0] = *(u16 *)(s0 + 0x6);\n v[1] = *(u16 *)(s0 + 0xA);\n v[2] = *(u16 *)(s0 + 0xE);\n func_8012E32C();\n RotTransPers((s32)v, (s32)&sxy, &z, &flag);\n sx = (s16)*(u16 *)&sxy;\n pan = (sx + 0xA0) / 0x14;\n if (sx < 0) {\n v1 = (sx >> 1) + 0x7F;\n } else {\n v1 = 0x7F - (sx >> 1);\n }\n if ((u32)(pan & 0xFFFF) < 0x10) {\n s32 row = v1 - 0x2F;\n if ((u32)(row & 0xFFFF) < 0x51) {\n func_8002D4C8(s1, (v1 | 0x3000 | (pan << 8)) & 0xFFFF);\n }\n }\n }\n }\n\n {\n s32 p = *(s32 *)(s0 + 0x20);\n *(s16 *)(p + 0x10) = *(u16 *)(p + 0x10) + *(u16 *)(s0 + 0x100);\n }\n func_8017E9C0(s0);\n}\n"} +{"ts": "2026-09-10 23:49:36", "label": "s104_new4", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC05_017/ov_SC05_017_jr_80188B1C.c", "fn": "func_80189F24", "addr": 2149097252, "aliases": null, "header": false, "includers": 0, "nhash_before": "450df146d136e0e6927d572062be5ac8347caffe", "nhash_after": "b3b8acd7c22b64ecc0077715f381e6732745c7a9", "source": "delever_regen R34 merge-disjoint w->size", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.207, "objects": ["build/src/ov_SC05_017/ov_SC05_017_jr_80188B1C.o"], "before_text": "void func_80189F24(s16 *arg0, s32 arg1)\n{\n extern u16 D_800B99DA;\n extern u8 D_801E67A0[];\n\n u8 sp10[4];\n s32 size;\n s32 prod;\n register s32 h __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 w;\n\n if (D_801E67A0[D_800B99DA & 0xF] == 0) {\n size = 0x60;\n } else {\n size = 0x50;\n }\n\n arg1++;\n prod = size * arg1;\n w = prod / 32;\n h = w / 2;\n sp10[0] = w;\n sp10[1] = w;\n sp10[2] = h;\n sp10[3] = 0;\n\n while (arg0[3] != -1) {\n func_80189FE0((u16 *)arg0, *(s32 *)sp10);\n arg0 += 4;\n }\n}\n", "after_text": "void func_80189F24(s16 *arg0, s32 arg1)\n{\n extern u16 D_800B99DA;\n extern u8 D_801E67A0[];\n\n u8 sp10[4];\n s32 size;\n s32 prod;\n s32 h;\n\n if (D_801E67A0[D_800B99DA & 0xF] == 0) {\n size = 0x60;\n } else {\n size = 0x50;\n }\n\n arg1++;\n prod = size * arg1;\n size = prod / 32;\n h = size / 2;\n sp10[0] = size;\n sp10[1] = size;\n sp10[2] = h;\n sp10[3] = 0;\n\n while (arg0[3] != -1) {\n func_80189FE0((u16 *)arg0, *(s32 *)sp10);\n arg0 += 4;\n }\n}\n"} +{"ts": "2026-09-10 23:49:39", "label": "s104_new4", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_024/ov_SC06_024_jr_8017BEBC.c", "fn": "func_801809A8", "addr": 2149058984, "aliases": null, "header": false, "includers": 0, "nhash_before": "dad322193cf70888550159e2d4e6bd5dec998896", "nhash_after": "a96d724d95f93e65be7276ccaca3b2f38130c8ec", "source": "delever_regen R35 drop-param-copy s0->a0 @3", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.254, "objects": ["build/src/ov_SC06_024/ov_SC06_024_jr_8017BEBC.o"], "before_text": "void func_801809A8(s32 a0)\n{\n s32 s0 = a0;\n s32 v1;\n\n if (func_8012C354(a0, &D_80193688) != 0) {\n *(u8 *)(s0 + 0xC0) = 1;\n *(s32 *)(s0 + 0xB4) = -1;\n *(s16 *)(s0 + 0xAE) = -1;\n *(u8 *)(s0 + 0x75) = 8;\n func_8012A828(s0, &D_801936C8);\n __asm__(\"\" : \"=r\"(s0) : \"0\"(s0)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n if (*(s16 *)(s0 + 0x70) != 0) {\n *(s16 *)(s0 + 2) = 4;\n } else {\n *(s16 *)(s0 + 2) = 1;\n *(u32 *)(*(s32 *)(s0 + 0x20) + 4) |= 0x80000000;\n func_8012B2CC(s0);\n v1 = func_8012C658(0x346, 1, s0);\n if (v1 != 0) {\n *(s16 *)(v1 + 6) = -0x660;\n *(s16 *)(v1 + 0xA) = -0x682;\n *(s16 *)(v1 + 0xE) = 0x80;\n }\n v1 = func_8012C658(0x346, 1, s0);\n if (v1 != 0) {\n *(s16 *)(v1 + 6) = -0xA60;\n *(s16 *)(v1 + 0xA) = -0x882;\n *(s16 *)(v1 + 0xE) = 0x80;\n }\n }\n }\n}\n", "after_text": "void func_801809A8(s32 a0)\n{\n s32 v1;\n\n if (func_8012C354(a0, &D_80193688) != 0) {\n *(u8 *)(a0 + 0xC0) = 1;\n *(s32 *)(a0 + 0xB4) = -1;\n *(s16 *)(a0 + 0xAE) = -1;\n *(u8 *)(a0 + 0x75) = 8;\n func_8012A828(a0, &D_801936C8);\n if (*(s16 *)(a0 + 0x70) != 0) {\n *(s16 *)(a0 + 2) = 4;\n } else {\n *(s16 *)(a0 + 2) = 1;\n *(u32 *)(*(s32 *)(a0 + 0x20) + 4) |= 0x80000000;\n func_8012B2CC(a0);\n v1 = func_8012C658(0x346, 1, a0);\n if (v1 != 0) {\n *(s16 *)(v1 + 6) = -0x660;\n *(s16 *)(v1 + 0xA) = -0x682;\n *(s16 *)(v1 + 0xE) = 0x80;\n }\n v1 = func_8012C658(0x346, 1, a0);\n if (v1 != 0) {\n *(s16 *)(v1 + 6) = -0xA60;\n *(s16 *)(v1 + 0xA) = -0x882;\n *(s16 *)(v1 + 0xE) = 0x80;\n }\n }\n }\n}\n"} +{"ts": "2026-09-10 23:49:42", "label": "s104_new4", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_030/ov_SC06_030_jr_8017F65C.c", "fn": "func_80180DCC", "addr": 2149060044, "aliases": null, "header": false, "includers": 0, "nhash_before": "5e5fc405fbefd8fc78130ae82fb3e17086d50a75", "nhash_after": "b7e2982bb84cfc9133ed6a566ac8408397c4cb0e", "source": "delever_regen R34 merge-disjoint v1->bits", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.149, "objects": ["build/src/ov_SC06_030/ov_SC06_030_jr_8017F65C.o"], "before_text": "void func_80180DCC(void *a0)\n{\n void *s3 = a0;\n void *s2;\n void *p;\n s32 v1;\n register s32 v0 __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 bits;\n s32 s0;\n s32 s1;\n\n s2 = *(void **)((s32)s3 + 0x20);\n func_80180FF4(s3);\n p = D_801B9F10;\n if (p == 0) {\n goto END;\n }\n v0 = *(u16 *)((s32)s2 + 0x12) + 0x800;\n p = *(void **)((s32)p + 0x20);\n bits = *(u16 *)((s32)p + 0x12) & 0x400;\n s0 = v0 & 0xFFF;\n if (bits == 0) {\n goto ELSE;\n }\n s1 = func_80012A60(s0, 0x400);\n v0 = func_80012A60(s0, 0xC00);\n v1 = (s16)s1;\n v0 = (s16)v0;\n v0 = (v0 < v1);\n if (v0 != 0) {\n goto TRUE1;\n }\n v0 = 0x400;\n goto STORE;\nTRUE1:\n v0 = 0xC00;\n goto STORE;\nELSE:\n s1 = func_80012A60(s0, 0);\n v0 = func_80012A60(s0, 0x800);\n v1 = (s16)s1;\n v0 = (s16)v0;\n v0 = (v0 < v1);\n if (v0 != 0) {\n goto TRUE2;\n }\n *(u16 *)((s32)s2 + 0x12) = 0;\n goto END;\nTRUE2:\n v0 = 0x800;\nSTORE:\n *(u16 *)((s32)s2 + 0x12) = v0;\nEND:\n func_80171990((u8 *)s3);\n}\n", "after_text": "void func_80180DCC(void *a0)\n{\n void *s3 = a0;\n void *s2;\n void *p;\n s32 v0;\n s32 bits;\n s32 s0;\n s32 s1;\n\n s2 = *(void **)((s32)s3 + 0x20);\n func_80180FF4(s3);\n p = D_801B9F10;\n if (p == 0) {\n goto END;\n }\n v0 = *(u16 *)((s32)s2 + 0x12) + 0x800;\n p = *(void **)((s32)p + 0x20);\n bits = *(u16 *)((s32)p + 0x12) & 0x400;\n s0 = v0 & 0xFFF;\n if (bits == 0) {\n goto ELSE;\n }\n s1 = func_80012A60(s0, 0x400);\n v0 = func_80012A60(s0, 0xC00);\n bits = (s16)s1;\n v0 = (s16)v0;\n v0 = (v0 < bits);\n if (v0 != 0) {\n goto TRUE1;\n }\n v0 = 0x400;\n goto STORE;\nTRUE1:\n v0 = 0xC00;\n goto STORE;\nELSE:\n s1 = func_80012A60(s0, 0);\n v0 = func_80012A60(s0, 0x800);\n bits = (s16)s1;\n v0 = (s16)v0;\n v0 = (v0 < bits);\n if (v0 != 0) {\n goto TRUE2;\n }\n *(u16 *)((s32)s2 + 0x12) = 0;\n goto END;\nTRUE2:\n v0 = 0x800;\nSTORE:\n *(u16 *)((s32)s2 + 0x12) = v0;\nEND:\n func_80171990((u8 *)s3);\n}\n"} +{"ts": "2026-09-10 23:49:46", "label": "s104_new4", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC07_002/ov_SC07_002_jr_8017C8D0.c", "fn": "func_8017FCA8", "addr": 2149055656, "aliases": null, "header": false, "includers": 0, "nhash_before": "2037208c44f19f1f96facff7a4342505bd748717", "nhash_after": "7052ffbb5a7a6ffe3ab36a0e7123497751591a56", "source": "delever_regen R34 merge-disjoint sc->ret", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.353, "objects": ["build/src/ov_SC07_002/ov_SC07_002_jr_8017C8D0.o"], "before_text": "void func_8017FCA8(s32 a0)\n{\n typedef struct { s16 m0, m1, m2, m3; } PosFCA8;\n extern s16 D_80126940[4];\n extern s32 func_8012E544(s32 a0);\n extern void func_80015978(s32 a0, s32 *a1);\n extern s32 func_80013294(void *a0, void *a1);\n extern s32 ratan2(s32 dx, s32 dy);\n extern void func_80181394();\n\n PosFCA8 cur;\n PosFCA8 target;\n s32 ret;\n s32 dist;\n s16 clamped;\n s16 va;\n s16 vb;\n register s32 sc __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus10)\n\n cur = *(PosFCA8 *) D_80126940;\n ret = func_8012E544(0x306);\n if (ret != 0) {\n func_80015978(ret + 4, (s32 *) &target);\n if (cur.m1 > -0x200) {\n cur.m1 = -0x200;\n }\n func_80015978(ret + 4, (s32 *) &target);\n target.m1 = cur.m1;\n dist = func_80013294(&cur, &target) - 0x100;\n clamped = dist;\n if (clamped < 0) {\n clamped = 0;\n }\n if (clamped > 0x300) {\n clamped = 0x300;\n }\n va = ((clamped * 512) / 0x300) + 0x38;\n *(s16 *) (a0 + 0x20) = va;\n vb = ((clamped * 111) / 0x300) - 0x70;\n *(s16 *) (a0 + 0x30) = vb;\n sc = ((clamped * 800) / 0x300) + 0x190;\n *(s32 *) (a0 + 0x14) = (s16) sc;\n } else {\n target = *(PosFCA8 *) D_80126940;\n }\n\n func_80181394(a0, &cur, ratan2(cur.m0 - target.m0, cur.m2 - target.m2) & 0xfff);\n}\n", "after_text": "void func_8017FCA8(s32 a0)\n{\n typedef struct { s16 m0, m1, m2, m3; } PosFCA8;\n extern s16 D_80126940[4];\n extern s32 func_8012E544(s32 a0);\n extern void func_80015978(s32 a0, s32 *a1);\n extern s32 func_80013294(void *a0, void *a1);\n extern s32 ratan2(s32 dx, s32 dy);\n extern void func_80181394();\n\n PosFCA8 cur;\n PosFCA8 target;\n s32 ret;\n s32 dist;\n s16 clamped;\n s16 va;\n s16 vb;\n\n cur = *(PosFCA8 *) D_80126940;\n ret = func_8012E544(0x306);\n if (ret != 0) {\n func_80015978(ret + 4, (s32 *) &target);\n if (cur.m1 > -0x200) {\n cur.m1 = -0x200;\n }\n func_80015978(ret + 4, (s32 *) &target);\n target.m1 = cur.m1;\n dist = func_80013294(&cur, &target) - 0x100;\n clamped = dist;\n if (clamped < 0) {\n clamped = 0;\n }\n if (clamped > 0x300) {\n clamped = 0x300;\n }\n va = ((clamped * 512) / 0x300) + 0x38;\n *(s16 *) (a0 + 0x20) = va;\n vb = ((clamped * 111) / 0x300) - 0x70;\n *(s16 *) (a0 + 0x30) = vb;\n ret = ((clamped * 800) / 0x300) + 0x190;\n *(s32 *) (a0 + 0x14) = (s16) ret;\n } else {\n target = *(PosFCA8 *) D_80126940;\n }\n\n func_80181394(a0, &cur, ratan2(cur.m0 - target.m0, cur.m2 - target.m2) & 0xfff);\n}\n"} +{"ts": "2026-09-10 23:49:50", "label": "s104_new4", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC07_002/ov_SC07_002_jr_8017C8D0.c", "fn": "func_80182DF0", "addr": 2149068272, "aliases": null, "header": false, "includers": 0, "nhash_before": "cccf7250f9748b9775b2a75f88b6d275ca4f6be2", "nhash_after": "6e348e5dd650a9275d833080911025dcbf86ff37", "source": "delever_regen R35 drop-param-copy s0->arg0 @2", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.372, "objects": ["build/src/ov_SC07_002/ov_SC07_002_jr_8017C8D0.o"], "before_text": "void func_80182DF0(s32 arg0) {\n register s32 s0 __asm__(\"$16\") = arg0; // !FAKE: pin $16 \u2014 NEEDED DIFFERS (P36 rung B tus10)\n\n *(s16 *)(s0 + 0x52) = (rand() & 3) * 2 - 3;\n if (func_8012BEE8(s0) != 0) {\n func_80182038(s0);\n }\n ((void (*)(s32))func_8018247C)(s0);\n}\n", "after_text": "void func_80182DF0(s32 arg0) {\n\n *(s16 *)(arg0 + 0x52) = (rand() & 3) * 2 - 3;\n if (func_8012BEE8(arg0) != 0) {\n func_80182038(arg0);\n }\n ((void (*)(s32))func_8018247C)(arg0);\n}\n"} +{"ts": "2026-09-10 23:49:54", "label": "s104_new4", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/shared/ov/func_801860E4__93576b99.h", "fn": "func_801860E4", "addr": 2149081316, "aliases": null, "header": true, "includers": 1, "nhash_before": "6b3c6fc446c43adc219db71ec716f4f8a3618329", "nhash_after": "6290be311ccca56abab22131567720a5f3cd852f", "source": "delever_regen R35 drop-param-copy s0->a0 @2", "verdict": "LEVER-FREE", "sites": [], "compiles": 2, "seconds": 0.546, "objects": ["build/src/ov_SC02_000/ov_SC02_000_jr_8018173C.o", "build/src/ov_SC02_003/ov_SC02_003_jr_8018173C.o"], "before_text": "void func_801860E4(void *a0) {\n register s32 s0 __asm__(\"$16\") = (s32)a0; // !FAKE: pin $16 \u2014 NEEDED DIFFERS (P36 rung B headers2)\n s32 s1;\n s32 v0;\n v0 = ((s32 (*)(void))func_8012C1B8)();\n s1 = v0;\n *(s32 *)((s8 *)s0 + 0x20) = v0;\n if (v0 == 0) {\n func_8012CAE4((void *)s0);\n } else {\n func_8001C214(s1, (s32)&D_801DF700);\n func_8001D0E8(s1, 0x800, 0x800);\n func_8012A828(s0, &D_8018EFDC);\n *(s32 *)((s8 *)s0 + 0x14) = 0xFFFC0000;\n *(s32 *)((s8 *)s0 + 0x48) = 0x20000;\n *(s32 *)((s8 *)s0 + 0x44) = 0;\n *(s32 *)((s8 *)s0 + 0x4C) = 0;\n *(s16 *)((s8 *)s0 + 0xDC) = 0x40;\n *(u16 *)((s8 *)s0 + 0x2) = *(u16 *)((s8 *)s0 + 0x2) + 1;\n }\n}\n", "after_text": "void func_801860E4(void *a0) {\n s32 s1;\n s32 v0;\n v0 = ((s32 (*)(void))func_8012C1B8)();\n s1 = v0;\n *(s32 *)((s8 *)a0 + 0x20) = v0;\n if (v0 == 0) {\n func_8012CAE4((void *)a0);\n } else {\n func_8001C214(s1, (s32)&D_801DF700);\n func_8001D0E8(s1, 0x800, 0x800);\n func_8012A828(a0, &D_8018EFDC);\n *(s32 *)((s8 *)a0 + 0x14) = 0xFFFC0000;\n *(s32 *)((s8 *)a0 + 0x48) = 0x20000;\n *(s32 *)((s8 *)a0 + 0x44) = 0;\n *(s32 *)((s8 *)a0 + 0x4C) = 0;\n *(s16 *)((s8 *)a0 + 0xDC) = 0x40;\n *(u16 *)((s8 *)a0 + 0x2) = *(u16 *)((s8 *)a0 + 0x2) + 1;\n }\n}\n"} +{"ts": "2026-09-10 23:49:59", "label": "s104_new4", "rung": "E", "calib": {"head": "2e05e1238", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC06_024/ov_SC06_024_jr_8017BEBC.c", "fn": "func_8017E1F0", "addr": 2149048816, "aliases": null, "header": false, "includers": 0, "nhash_before": "6324c81779cff6fcd1e141cabdb217672883a9a6", "nhash_after": "f807c4c4938489b0e6abfdf941f101e82a9db735", "source": "delever_regen R34 merge-disjoint k->i", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.232, "objects": ["build/src/ov_SC06_024/ov_SC06_024_jr_8017BEBC.o"], "before_text": "void func_8017E1F0(s32 param_)\n{\n s32 s1;\n register s32 ent __asm__(\"$16\"); // !FAKE: pin $16 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register s32 i __asm__(\"$18\"); // !FAKE: pin $18 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 k;\n struct {\n s16 m[16];\n s16 out[4];\n s16 ax, ay, az;\n s16 w03;\n s16 idx;\n s16 f06;\n s16 f07;\n s16 f08;\n s32 f09;\n } frm;\n s32 *pp;\n s16 *cp;\n s32 cnt;\n s32 rnd;\n s32 cur;\n s32 ret;\n s32 idx;\n s32 tbl;\n s32 tmp;\n\n s1 = param_;\n switch (*(u16 *)(s1 + 0x34)) {\n case 0:\n *(s32 *)(s1 + 0x1C) = 0;\n *(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 1;\n func_80128D60(0, D_801E1120, &D_80193338);\n break;\n case 1:\n if (func_8012BEE8(s1) != 0) {\n func_8002D4C8(0x956, 0);\n *(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 1;\n }\n break;\n case 2:\n pp = *(s32 **)(s1 + 0x20);\n pp = (s32 *)*(s32 *)((s32)pp + 0x20);\n i = 3;\n cp = (s16 *)pp + 6;\n do {\n cp[3] = *(u16 *)(s1 + 0xFE);\n cp += 6;\n } while (--i >= 0);\n *(u16 *)(s1 + 0xFE) = *(u16 *)(s1 + 0xFE) + 0x1E;\n if (*(s16 *)(s1 + 0xFE) < 0x385) {\n break;\n }\n *(u16 *)(s1 + 0xFE) = 900;\n *(s32 *)(s1 + 0x1C) = 0;\n *(s32 *)(s1 + 0xE0) = 0;\n *(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 1;\n func_8002D4C8(4, 0x956);\n func_8002D4C8(0x957, 0);\n break;\n case 3:\n if (func_8012BEE8(s1) == 0) {\n break;\n }\n tmp = D_801E1158;\n frm.w03 = 0x2D5;\n frm.f06 = 0;\n frm.f09 = 0;\n frm.f08 = 0;\n frm.f07 = 0x7FFF;\n *(u16 *)(s1 + 0x108) = 0;\n func_8012EC04(s1, tmp, (s32 *)frm.m);\n k = 0;\n while (k < 4) {\n func_8012F14C((s32)frm.m, (s32)&D_80193448[k * 4], (s32)frm.out);\n frm.idx = k;\n frm.ax = frm.out[0];\n frm.ay = frm.out[1];\n frm.az = frm.out[2];\n func_8012C51C(&frm.ax, s1);\n ent = func_80132EF4(s1, 0x22);\n if (ent != 0) {\n *(u16 *)(ent + 0x34) = rand() & 1 | 0x2000;\n *(u16 *)(*(s32 *)(ent + 0x20) + 0x2C) = 0xC006U;\n frm.out[1] = frm.out[1] - 0x20;\n *(s16 *)(ent + 6) = frm.out[0];\n *(s16 *)(ent + 0xA) = frm.out[1];\n *(s16 *)(ent + 0xE) = frm.out[2];\n }\n k++;\n }\n func_8002D4C8(0x953, 0);\n cnt = *(s32 *)(s1 + 0xE0) + 1;\n *(s32 *)(s1 + 0xE0) = cnt;\n if (cnt < 2) {\n rnd = rand();\n cur = *(s16 *)(*(s32 *)(s1 + 0x20) + 0x12);\n idx = rnd % 4;\n tbl = cur + *(s16 *)&D_80193530[idx * 2];\n *(u16 *)(s1 + 0x34) = 5;\n *(s32 *)(s1 + 0x1C) = 0x1E;\n D_801E111C = tbl;\n } else {\n *(s32 *)(s1 + 0x1C) = 0;\n *(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 1;\n }\n break;\n case 4:\n if (func_8012BEE8(s1) != 0) {\n *(u16 *)(s1 + 2) = 4;\n *(u16 *)(s1 + 0x34) = 0;\n func_8002D4C8(0x958, 0);\n }\n break;\n case 5:\n if (func_8012BEE8(s1) != 0) {\n ret = func_8012B608(*(s16 *)(*(s32 *)(s1 + 0x20) + 0x12), D_801E111C, 8);\n *(u16 *)(*(s32 *)(s1 + 0x20) + 0x12) =\n *(u16 *)(*(s32 *)(s1 + 0x20) + 0x12) + ret;\n if (ret == 0) {\n *(u16 *)(s1 + 0x34) = 3;\n }\n }\n break;\n }\n func_80128DB4(0, D_801E1120);\n}\n", "after_text": "void func_8017E1F0(s32 param_)\n{\n s32 s1;\n s32 ent;\n s32 i;\n struct {\n s16 m[16];\n s16 out[4];\n s16 ax, ay, az;\n s16 w03;\n s16 idx;\n s16 f06;\n s16 f07;\n s16 f08;\n s32 f09;\n } frm;\n s32 *pp;\n s16 *cp;\n s32 cnt;\n s32 rnd;\n s32 cur;\n s32 ret;\n s32 idx;\n s32 tbl;\n s32 tmp;\n\n s1 = param_;\n switch (*(u16 *)(s1 + 0x34)) {\n case 0:\n *(s32 *)(s1 + 0x1C) = 0;\n *(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 1;\n func_80128D60(0, D_801E1120, &D_80193338);\n break;\n case 1:\n if (func_8012BEE8(s1) != 0) {\n func_8002D4C8(0x956, 0);\n *(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 1;\n }\n break;\n case 2:\n pp = *(s32 **)(s1 + 0x20);\n pp = (s32 *)*(s32 *)((s32)pp + 0x20);\n i = 3;\n cp = (s16 *)pp + 6;\n do {\n cp[3] = *(u16 *)(s1 + 0xFE);\n cp += 6;\n } while (--i >= 0);\n *(u16 *)(s1 + 0xFE) = *(u16 *)(s1 + 0xFE) + 0x1E;\n if (*(s16 *)(s1 + 0xFE) < 0x385) {\n break;\n }\n *(u16 *)(s1 + 0xFE) = 900;\n *(s32 *)(s1 + 0x1C) = 0;\n *(s32 *)(s1 + 0xE0) = 0;\n *(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 1;\n func_8002D4C8(4, 0x956);\n func_8002D4C8(0x957, 0);\n break;\n case 3:\n if (func_8012BEE8(s1) == 0) {\n break;\n }\n tmp = D_801E1158;\n frm.w03 = 0x2D5;\n frm.f06 = 0;\n frm.f09 = 0;\n frm.f08 = 0;\n frm.f07 = 0x7FFF;\n *(u16 *)(s1 + 0x108) = 0;\n func_8012EC04(s1, tmp, (s32 *)frm.m);\n i = 0;\n while (i < 4) {\n func_8012F14C((s32)frm.m, (s32)&D_80193448[i * 4], (s32)frm.out);\n frm.idx = i;\n frm.ax = frm.out[0];\n frm.ay = frm.out[1];\n frm.az = frm.out[2];\n func_8012C51C(&frm.ax, s1);\n ent = func_80132EF4(s1, 0x22);\n if (ent != 0) {\n *(u16 *)(ent + 0x34) = rand() & 1 | 0x2000;\n *(u16 *)(*(s32 *)(ent + 0x20) + 0x2C) = 0xC006U;\n frm.out[1] = frm.out[1] - 0x20;\n *(s16 *)(ent + 6) = frm.out[0];\n *(s16 *)(ent + 0xA) = frm.out[1];\n *(s16 *)(ent + 0xE) = frm.out[2];\n }\n i++;\n }\n func_8002D4C8(0x953, 0);\n cnt = *(s32 *)(s1 + 0xE0) + 1;\n *(s32 *)(s1 + 0xE0) = cnt;\n if (cnt < 2) {\n rnd = rand();\n cur = *(s16 *)(*(s32 *)(s1 + 0x20) + 0x12);\n idx = rnd % 4;\n tbl = cur + *(s16 *)&D_80193530[idx * 2];\n *(u16 *)(s1 + 0x34) = 5;\n *(s32 *)(s1 + 0x1C) = 0x1E;\n D_801E111C = tbl;\n } else {\n *(s32 *)(s1 + 0x1C) = 0;\n *(u16 *)(s1 + 0x34) = *(u16 *)(s1 + 0x34) + 1;\n }\n break;\n case 4:\n if (func_8012BEE8(s1) != 0) {\n *(u16 *)(s1 + 2) = 4;\n *(u16 *)(s1 + 0x34) = 0;\n func_8002D4C8(0x958, 0);\n }\n break;\n case 5:\n if (func_8012BEE8(s1) != 0) {\n ret = func_8012B608(*(s16 *)(*(s32 *)(s1 + 0x20) + 0x12), D_801E111C, 8);\n *(u16 *)(*(s32 *)(s1 + 0x20) + 0x12) =\n *(u16 *)(*(s32 *)(s1 + 0x20) + 0x12) + ret;\n if (ret == 0) {\n *(u16 *)(s1 + 0x34) = 3;\n }\n }\n break;\n }\n func_80128DB4(0, D_801E1120);\n}\n"} diff --git a/src/800.c b/src/800.c index b4fc64036..c88d81980 100644 --- a/src/800.c +++ b/src/800.c @@ -7598,13 +7598,12 @@ void CdReadSectorReadyCB(u8 reason) { XRECT dead; u32 *q; XRECT *r; - register s32 i __asm__("$18"); // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B tus9) + s32 i; s32 n, pos, res, b; s32 tmp; s32 k80; s32 one; s32 dst; - s32 cnt; s32 dst4; if (reason != 1) goto endReason; @@ -7753,8 +7752,8 @@ void CdReadSectorReadyCB(u8 reason) { break; case 4: if (p->words < 0x801) { - cnt = (p->words + 3) / 4; - func_80043994(lzss_sectorStagingBuf, cnt); + i = (p->words + 3) / 4; + func_80043994(lzss_sectorStagingBuf, i); if (func_8002FC64(p->words, lzss_sectorStagingBuf) == 0) goto stageFail; p->count++; if (p->flags != 0) goto phaseDone; diff --git a/src/ov_SC01_084/ov_SC01_084_jr_80182A00.c b/src/ov_SC01_084/ov_SC01_084_jr_80182A00.c index 40dc946de..3b5e1b162 100644 --- a/src/ov_SC01_084/ov_SC01_084_jr_80182A00.c +++ b/src/ov_SC01_084/ov_SC01_084_jr_80182A00.c @@ -694,7 +694,7 @@ extern s32 func_8004787C(s32 a0); void func_80183790(s32 a0) { s32 sum1; - register s32 sum2 __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus9) + s32 sum2; s32 frac; s32 threshold; s32 ret; @@ -707,8 +707,7 @@ void func_80183790(s32 a0) { sum1 = D_801C7748 + D_8018ABA4; frac = sum1 & 0xFFF; - sum2 = D_801C774A; - sum2 += D_8018ABA6; + sum2 = D_801C774A + D_8018ABA6; threshold = -(sum1 * 1536) / 12288 - 0x22; diff --git a/src/ov_SC02_016/ov_SC02_016_jr_801810C8.c b/src/ov_SC02_016/ov_SC02_016_jr_801810C8.c index 20527521f..9e40d0776 100644 --- a/src/ov_SC02_016/ov_SC02_016_jr_801810C8.c +++ b/src/ov_SC02_016/ov_SC02_016_jr_801810C8.c @@ -3897,12 +3897,11 @@ extern s8 D_801B42D8; void func_801826F0(s32 *param_1) { int new_var; -register s32 p __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus9) +s32 p; s32 r; - p = (s32) (&D_801B42D8); r = param_1[0x2c / 4]; new_var = r; - p += new_var; + p = (s32) (&D_801B42D8) + new_var; *((s8 *) p) = 0; ((void (*)(void)) func_80146C3C)(); } diff --git a/src/ov_SC03_002/ov_SC03_002_jr_80181D78.c b/src/ov_SC03_002/ov_SC03_002_jr_80181D78.c index 03d8255e4..169fe58a6 100644 --- a/src/ov_SC03_002/ov_SC03_002_jr_80181D78.c +++ b/src/ov_SC03_002/ov_SC03_002_jr_80181D78.c @@ -2838,7 +2838,7 @@ extern void func_80181D3C(void *a0); void func_80181D78(s32 a0) { s32 r; s32 r2; - register s32 *self __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus9) + s32 *self, *self2, *self3; u16 arr[6]; extern s32 rand(void); @@ -2947,8 +2947,8 @@ void func_80181D78(s32 a0) { func_801821B4((s32)a0); return; case 6: - self = (s32 *)(a0 + 4); - r = func_8012B6D4((s16 *)self, (s16 *)(*(s32 *)(a0 + 0x64) + 4)); + self2 = (s32 *)(a0 + 4); + r = func_8012B6D4((s16 *)self2, (s16 *)(*(s32 *)(a0 + 0x64) + 4)); r2 = func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), r, 8); *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += r2; func_8012B178((s32)a0, (s32)0xFFFA0000); @@ -2962,8 +2962,8 @@ void func_80181D78(s32 a0) { *(s32 *)(a0 + 0x1C) = 0x10; break; case 7: - self = (s32 *)(a0 + 4); - r = func_8012B6D4((s16 *)self, (s16 *)(*(s32 *)(a0 + 0x64) + 4)); + self3 = (s32 *)(a0 + 4); + r = func_8012B6D4((s16 *)self3, (s16 *)(*(s32 *)(a0 + 0x64) + 4)); r2 = func_8012B608(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12), r, 8); *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) += r2; func_8012B178((s32)a0, (s32)0xFFFA0000); diff --git a/src/ov_SC03_010/ov_SC03_010_jr_8017C730.c b/src/ov_SC03_010/ov_SC03_010_jr_8017C730.c index 2ddf6f374..c0ef37e14 100644 --- a/src/ov_SC03_010/ov_SC03_010_jr_8017C730.c +++ b/src/ov_SC03_010/ov_SC03_010_jr_8017C730.c @@ -3433,9 +3433,8 @@ s32 a0; s16 s0; s32 obj; s32 ang0; - s32 ang1; s32 x; - register s32 m1 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus9) + s32 m1; s32 m2; s16 d; s32 q; @@ -3494,11 +3493,11 @@ L474: } x = ratan2(-*(s16 *)(a0 + 0xE), *(s16 *)(a0 + 6)) - 0x400; m2 = x & 0xFFF; - ang1 = m2; + m1 = m2; if (x & 0x800) { - ang1 = m2 | 0xF000; + m1 = m2 | 0xF000; } - x = ang1 - ang0; + x = m1 - ang0; m2 = x & 0xFFF; d = m2; if (x & 0x800) { diff --git a/src/ov_SC03_010/ov_SC03_010_jr_8017F6C0.c b/src/ov_SC03_010/ov_SC03_010_jr_8017F6C0.c index f4a651e9d..3c1eb0746 100644 --- a/src/ov_SC03_010/ov_SC03_010_jr_8017F6C0.c +++ b/src/ov_SC03_010/ov_SC03_010_jr_8017F6C0.c @@ -2981,8 +2981,7 @@ extern void func_8012CAE4(void *a0); void func_8017F920(s32 a0) { s32 v0; - s32 v1; - register s32 addr __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus9) + s32 addr; addr = (s32)&D_8019C7EC; *(s32 *)(a0 + 0x78) = addr; @@ -3006,8 +3005,8 @@ void func_8017F920(s32 a0) { *(s32 *)(a0 + 0x58) = D_8019C7F4 | 0x60000000; } - v1 = *(s32 *)(a0 + 0x20); - *(s32 *)(v1 + 0x4) |= 0x8040; + addr = *(s32 *)(a0 + 0x20); + *(s32 *)(addr + 0x4) |= 0x8040; *(u16 *)(a0 + 0x5C) = 0xCC00; func_8012A828(a0, (void *)&D_8019D200); diff --git a/src/ov_SC03_011/ov_SC03_011_jr_8017C730.c b/src/ov_SC03_011/ov_SC03_011_jr_8017C730.c index f67a35bc6..d2ea9967d 100644 --- a/src/ov_SC03_011/ov_SC03_011_jr_8017C730.c +++ b/src/ov_SC03_011/ov_SC03_011_jr_8017C730.c @@ -4678,8 +4678,7 @@ extern s32 func_8012C588(s32 a0, s32 a1); void func_8017F9CC(s32 a0) { s32 v0; - s32 v1; - register s32 addr __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus8) + s32 addr; addr = (s32)&D_8018547C; *(s32 *)(a0 + 0x78) = addr; @@ -4703,8 +4702,8 @@ void func_8017F9CC(s32 a0) { *(s32 *)(a0 + 0x58) = D_80185484 | 0x60000000; } - v1 = *(s32 *)(a0 + 0x20); - *(s32 *)(v1 + 0x4) |= 0x8040; + addr = *(s32 *)(a0 + 0x20); + *(s32 *)(addr + 0x4) |= 0x8040; *(s8 *)(a0 + 0xC0) = 1; *(s32 *)(a0 + 0xB4) = 1; func_8012A828(a0, (void *)&D_80181594); diff --git a/src/ov_SC03_013/ov_SC03_013_jr_801806F8.c b/src/ov_SC03_013/ov_SC03_013_jr_801806F8.c index 91e06e7c0..a13e9c4af 100644 --- a/src/ov_SC03_013/ov_SC03_013_jr_801806F8.c +++ b/src/ov_SC03_013/ov_SC03_013_jr_801806F8.c @@ -2998,8 +2998,7 @@ extern void func_8012A828(s32 a0, void *a1); void func_80180958(s32 a0) { s32 v0; - s32 v1; - register s32 addr __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus9) + s32 addr; addr = (s32)&D_801A52E4; *(s32 *)(a0 + 0x78) = addr; @@ -3023,8 +3022,8 @@ void func_80180958(s32 a0) { *(s32 *)(a0 + 0x58) = D_801A52EC | 0x60000000; } - v1 = *(s32 *)(a0 + 0x20); - *(s32 *)(v1 + 0x4) |= 0x8040; + addr = *(s32 *)(a0 + 0x20); + *(s32 *)(addr + 0x4) |= 0x8040; *(u16 *)(a0 + 0x5C) = 0xCC00; func_8012A828(a0, (void *)&D_801A5CF8); diff --git a/src/ov_SC03_097/ov_SC03_097_jr_8017D898.c b/src/ov_SC03_097/ov_SC03_097_jr_8017D898.c index 749d90525..c19c10b99 100644 --- a/src/ov_SC03_097/ov_SC03_097_jr_8017D898.c +++ b/src/ov_SC03_097/ov_SC03_097_jr_8017D898.c @@ -3287,8 +3287,7 @@ extern u16 func_80148800(s32 *a0); void func_8017F304(s32 a0) { Blk8_80126940_8017D6D0_8017F48C sp10; u8 t; - register s16 lo __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus9) - s16 hi; + s16 lo; if (func_80148800(&D_80126B58) & 3) { t = (*(u8 *)(a0 + 5) + 1) & 1; @@ -3302,9 +3301,9 @@ void func_8017F304(s32 a0) { if (sp10.v[0] < lo) { sp10.v[0] = lo; } - hi = -0x10c0; - if (sp10.v[0] > hi) { - sp10.v[0] = hi; + lo = -0x10c0; + if (sp10.v[0] > lo) { + sp10.v[0] = lo; } func_8017F53C(a0, sp10.v); } diff --git a/src/ov_SC03_108/ov_SC03_108_jr_8017BEBC.c b/src/ov_SC03_108/ov_SC03_108_jr_8017BEBC.c index 38e7927e3..a1dff3453 100644 --- a/src/ov_SC03_108/ov_SC03_108_jr_8017BEBC.c +++ b/src/ov_SC03_108/ov_SC03_108_jr_8017BEBC.c @@ -3749,7 +3749,6 @@ void func_8017E71C(void *a0) { if (s1 != 0) { s32 sx; s32 pan; - s32 vol; v[0] = *(u16 *)(s0 + 0x6); v[1] = *(u16 *)(s0 + 0xA); @@ -3759,15 +3758,14 @@ void func_8017E71C(void *a0) { sx = (s16)*(u16 *)&sxy; pan = (sx + 0xA0) / 0x14; if (sx < 0) { - vol = (sx >> 1) + 0x7F; + v1 = (sx >> 1) + 0x7F; } else { - vol = 0x7F - (sx >> 1); + v1 = 0x7F - (sx >> 1); } if ((u32)(pan & 0xFFFF) < 0x10) { - s32 row = vol - 0x2F; - __asm__("" : "=r"(row) : "0"(row)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus10) + s32 row = v1 - 0x2F; if ((u32)(row & 0xFFFF) < 0x51) { - func_8002D4C8(s1, (vol | 0x3000 | (pan << 8)) & 0xFFFF); + func_8002D4C8(s1, (v1 | 0x3000 | (pan << 8)) & 0xFFFF); } } } diff --git a/src/ov_SC05_017/ov_SC05_017_jr_80188B1C.c b/src/ov_SC05_017/ov_SC05_017_jr_80188B1C.c index 1f3167d50..dbd828cb0 100644 --- a/src/ov_SC05_017/ov_SC05_017_jr_80188B1C.c +++ b/src/ov_SC05_017/ov_SC05_017_jr_80188B1C.c @@ -3950,8 +3950,7 @@ void func_80189F24(s16 *arg0, s32 arg1) u8 sp10[4]; s32 size; s32 prod; - register s32 h __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus9) - s32 w; + s32 h; if (D_801E67A0[D_800B99DA & 0xF] == 0) { size = 0x60; @@ -3961,10 +3960,10 @@ void func_80189F24(s16 *arg0, s32 arg1) arg1++; prod = size * arg1; - w = prod / 32; - h = w / 2; - sp10[0] = w; - sp10[1] = w; + size = prod / 32; + h = size / 2; + sp10[0] = size; + sp10[1] = size; sp10[2] = h; sp10[3] = 0; diff --git a/src/ov_SC06_024/ov_SC06_024_jr_8017BEBC.c b/src/ov_SC06_024/ov_SC06_024_jr_8017BEBC.c index 9d2f16258..671fd582f 100644 --- a/src/ov_SC06_024/ov_SC06_024_jr_8017BEBC.c +++ b/src/ov_SC06_024/ov_SC06_024_jr_8017BEBC.c @@ -3589,9 +3589,8 @@ extern s32 D_801E1158; void func_8017E1F0(s32 param_) { s32 s1; - register s32 ent __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus9) - register s32 i __asm__("$18"); // !FAKE: pin $18 — NEEDED DIFFERS (P36 rung B tus9) - s32 k; + s32 ent; + s32 i; struct { s16 m[16]; s16 out[4]; @@ -3658,10 +3657,10 @@ void func_8017E1F0(s32 param_) frm.f07 = 0x7FFF; *(u16 *)(s1 + 0x108) = 0; func_8012EC04(s1, tmp, (s32 *)frm.m); - k = 0; - while (k < 4) { - func_8012F14C((s32)frm.m, (s32)&D_80193448[k * 4], (s32)frm.out); - frm.idx = k; + i = 0; + while (i < 4) { + func_8012F14C((s32)frm.m, (s32)&D_80193448[i * 4], (s32)frm.out); + frm.idx = i; frm.ax = frm.out[0]; frm.ay = frm.out[1]; frm.az = frm.out[2]; @@ -3675,7 +3674,7 @@ void func_8017E1F0(s32 param_) *(s16 *)(ent + 0xA) = frm.out[1]; *(s16 *)(ent + 0xE) = frm.out[2]; } - k++; + i++; } func_8002D4C8(0x953, 0); cnt = *(s32 *)(s1 + 0xE0) + 1; @@ -5002,29 +5001,27 @@ extern u8 D_801936C8[]; void func_801809A8(s32 a0) { - s32 s0 = a0; s32 v1; if (func_8012C354(a0, &D_80193688) != 0) { - *(u8 *)(s0 + 0xC0) = 1; - *(s32 *)(s0 + 0xB4) = -1; - *(s16 *)(s0 + 0xAE) = -1; - *(u8 *)(s0 + 0x75) = 8; - func_8012A828(s0, &D_801936C8); - __asm__("" : "=r"(s0) : "0"(s0)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) - if (*(s16 *)(s0 + 0x70) != 0) { - *(s16 *)(s0 + 2) = 4; + *(u8 *)(a0 + 0xC0) = 1; + *(s32 *)(a0 + 0xB4) = -1; + *(s16 *)(a0 + 0xAE) = -1; + *(u8 *)(a0 + 0x75) = 8; + func_8012A828(a0, &D_801936C8); + if (*(s16 *)(a0 + 0x70) != 0) { + *(s16 *)(a0 + 2) = 4; } else { - *(s16 *)(s0 + 2) = 1; - *(u32 *)(*(s32 *)(s0 + 0x20) + 4) |= 0x80000000; - func_8012B2CC(s0); - v1 = func_8012C658(0x346, 1, s0); + *(s16 *)(a0 + 2) = 1; + *(u32 *)(*(s32 *)(a0 + 0x20) + 4) |= 0x80000000; + func_8012B2CC(a0); + v1 = func_8012C658(0x346, 1, a0); if (v1 != 0) { *(s16 *)(v1 + 6) = -0x660; *(s16 *)(v1 + 0xA) = -0x682; *(s16 *)(v1 + 0xE) = 0x80; } - v1 = func_8012C658(0x346, 1, s0); + v1 = func_8012C658(0x346, 1, a0); if (v1 != 0) { *(s16 *)(v1 + 6) = -0xA60; *(s16 *)(v1 + 0xA) = -0x882; diff --git a/src/ov_SC06_030/ov_SC06_030_jr_8017F65C.c b/src/ov_SC06_030/ov_SC06_030_jr_8017F65C.c index 914897e58..0f0ad48f0 100644 --- a/src/ov_SC06_030/ov_SC06_030_jr_8017F65C.c +++ b/src/ov_SC06_030/ov_SC06_030_jr_8017F65C.c @@ -3704,8 +3704,7 @@ void func_80180DCC(void *a0) void *s3 = a0; void *s2; void *p; - s32 v1; - register s32 v0 __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus9) + s32 v0; s32 bits; s32 s0; s32 s1; @@ -3725,9 +3724,9 @@ void func_80180DCC(void *a0) } s1 = func_80012A60(s0, 0x400); v0 = func_80012A60(s0, 0xC00); - v1 = (s16)s1; + bits = (s16)s1; v0 = (s16)v0; - v0 = (v0 < v1); + v0 = (v0 < bits); if (v0 != 0) { goto TRUE1; } @@ -3739,9 +3738,9 @@ TRUE1: ELSE: s1 = func_80012A60(s0, 0); v0 = func_80012A60(s0, 0x800); - v1 = (s16)s1; + bits = (s16)s1; v0 = (s16)v0; - v0 = (v0 < v1); + v0 = (v0 < bits); if (v0 != 0) { goto TRUE2; } diff --git a/src/ov_SC07_002/ov_SC07_002_jr_8017C8D0.c b/src/ov_SC07_002/ov_SC07_002_jr_8017C8D0.c index 05bde45dc..0e71f135c 100644 --- a/src/ov_SC07_002/ov_SC07_002_jr_8017C8D0.c +++ b/src/ov_SC07_002/ov_SC07_002_jr_8017C8D0.c @@ -4512,7 +4512,6 @@ void func_8017FCA8(s32 a0) s16 clamped; s16 va; s16 vb; - register s32 sc __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus10) cur = *(PosFCA8 *) D_80126940; ret = func_8012E544(0x306); @@ -4535,8 +4534,8 @@ void func_8017FCA8(s32 a0) *(s16 *) (a0 + 0x20) = va; vb = ((clamped * 111) / 0x300) - 0x70; *(s16 *) (a0 + 0x30) = vb; - sc = ((clamped * 800) / 0x300) + 0x190; - *(s32 *) (a0 + 0x14) = (s16) sc; + ret = ((clamped * 800) / 0x300) + 0x190; + *(s32 *) (a0 + 0x14) = (s16) ret; } else { target = *(PosFCA8 *) D_80126940; } @@ -6234,13 +6233,12 @@ extern void func_80182038(s32 param_1); extern void func_8018247C(void); void func_80182DF0(s32 arg0) { - register s32 s0 __asm__("$16") = arg0; // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus10) - *(s16 *)(s0 + 0x52) = (rand() & 3) * 2 - 3; - if (func_8012BEE8(s0) != 0) { - func_80182038(s0); + *(s16 *)(arg0 + 0x52) = (rand() & 3) * 2 - 3; + if (func_8012BEE8(arg0) != 0) { + func_80182038(arg0); } - ((void (*)(s32))func_8018247C)(s0); + ((void (*)(s32))func_8018247C)(arg0); } diff --git a/src/shared/ov/func_801860E4__93576b99.h b/src/shared/ov/func_801860E4__93576b99.h index a246f6d5b..b5bec208f 100644 --- a/src/shared/ov/func_801860E4__93576b99.h +++ b/src/shared/ov/func_801860E4__93576b99.h @@ -8,23 +8,22 @@ extern void func_8012A828(s32 a0, void *a1); extern s32 D_801DF700; extern s32 D_8018EFDC; void func_801860E4(void *a0) { - register s32 s0 __asm__("$16") = (s32)a0; // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B headers2) s32 s1; s32 v0; v0 = ((s32 (*)(void))func_8012C1B8)(); s1 = v0; - *(s32 *)((s8 *)s0 + 0x20) = v0; + *(s32 *)((s8 *)a0 + 0x20) = v0; if (v0 == 0) { - func_8012CAE4((void *)s0); + func_8012CAE4((void *)a0); } else { func_8001C214(s1, (s32)&D_801DF700); func_8001D0E8(s1, 0x800, 0x800); - func_8012A828(s0, &D_8018EFDC); - *(s32 *)((s8 *)s0 + 0x14) = 0xFFFC0000; - *(s32 *)((s8 *)s0 + 0x48) = 0x20000; - *(s32 *)((s8 *)s0 + 0x44) = 0; - *(s32 *)((s8 *)s0 + 0x4C) = 0; - *(s16 *)((s8 *)s0 + 0xDC) = 0x40; - *(u16 *)((s8 *)s0 + 0x2) = *(u16 *)((s8 *)s0 + 0x2) + 1; + func_8012A828(a0, &D_8018EFDC); + *(s32 *)((s8 *)a0 + 0x14) = 0xFFFC0000; + *(s32 *)((s8 *)a0 + 0x48) = 0x20000; + *(s32 *)((s8 *)a0 + 0x44) = 0; + *(s32 *)((s8 *)a0 + 0x4C) = 0; + *(s16 *)((s8 *)a0 + 0xDC) = 0x40; + *(u16 *)((s8 *)a0 + 0x2) = *(u16 *)((s8 *)a0 + 0x2) + 1; } }