diff --git a/src/800c3.c b/src/800c3.c
index b62ae321b..90d776024 100644
--- a/src/800c3.c
+++ b/src/800c3.c
@@ -2480,7 +2480,84 @@ L8005F820:
 
 INCLUDE_ASM("asm/nonmatchings/800c3", func_8005F830);
 
-INCLUDE_ASM("asm/nonmatchings/800c3", func_8005FA94);
+/* func_8005FA94 — cookbook §265 VERBATIM-ASM bank (file-scope form), generated by
+ * tools/asm_verbatim.py from asm/nonmatchings/800c3/func_8005FA94.s.
+ * Byte-equivalent to the INCLUDE_ASM stub by construction; the function is NOT
+ * decompiled (§265 ACCOUNTING). Immediates/offsets are decimal for maspsx (§383).
+ */
+__asm__(
+    ".text\n"
+    ".align\t2\n"
+    ".globl\tfunc_8005FA94\n"
+    ".ent\tfunc_8005FA94\n"
+    "func_8005FA94:\n"
+    ".frame\t$sp,24,$31\n"
+    ".mask\t0x80010000,0\n"
+    ".fmask\t0,0\n"
+    ".set\tnoreorder\n"
+    "addiu $sp,$sp,-24\n"
+    "sw $s0,16($sp)\n"
+    "addu $s0,$a0,$zero\n"
+    "sw $ra,20($sp)\n"
+    "lw $v0,76($s0)\n"
+    "lbu $v1,70($s0)\n"
+    "addiu $v0,$v0,1\n"
+    "beqz $v1,.L8005FB2C\n"
+    " sw $v0,76($s0)\n"
+    "addiu $v0,$zero,1\n"
+    "bne $v1,$v0,.L8005FAEC\n"
+    " nop\n"
+    "lbu $v1,74($s0)\n"
+    "nop\n"
+    "sltiu $v0,$v1,2\n"
+    "bnez $v0,.L8005FB00\n"
+    " addiu $v0,$v1,1\n"
+    "addiu $v0,$zero,2\n"
+    "sb $v0,73($s0)\n"
+    "addiu $v0,$zero,255\n"
+    "j .L8005FB60\n"
+    " sb $v0,70($s0)\n"
+    ".L8005FAEC:\n"
+    "lbu $v1,74($s0)\n"
+    "nop\n"
+    "sltiu $v0,$v1,4\n"
+    "beqz $v0,.L8005FB08\n"
+    " addiu $v0,$v1,1\n"
+    ".L8005FB00:\n"
+    "j .L8005FB60\n"
+    " sb $v0,74($s0)\n"
+    ".L8005FB08:\n"
+    "lbu $v0,73($s0)\n"
+    "nop\n"
+    "beqz $v0,.L8005FB2C\n"
+    " nop\n"
+    "lui $v0,%hi(D_80072960)\n"
+    "lw $v0,%lo(D_80072960)($v0)\n"
+    "nop\n"
+    "jalr $v0\n"
+    " addu $a0,$s0,$zero\n"
+    ".L8005FB2C:\n"
+    "lw $v0,60($s0)\n"
+    "nop\n"
+    "lbu $v1,0($v0)\n"
+    "addiu $v0,$zero,243\n"
+    "beq $v1,$v0,.L8005FB60\n"
+    " addiu $v1,$zero,255\n"
+    "lw $v0,48($s0)\n"
+    "nop\n"
+    "sb $v1,0($v0)\n"
+    "lw $v0,48($s0)\n"
+    "nop\n"
+    "sb $zero,1($v0)\n"
+    "sb $zero,232($s0)\n"
+    ".L8005FB60:\n"
+    "lw $ra,20($sp)\n"
+    "lw $s0,16($sp)\n"
+    "jr $ra\n"
+    " addiu $sp,$sp,24\n"
+    ".set\treorder\n"
+    ".end\tfunc_8005FA94\n"
+);
 
 s32 func_8005FB70(void *arg0) {
     register s32 ff __asm__("$2");