diff --git a/docs/automation-runbook.md b/docs/automation-runbook.md index d4e78ce8d..28fa93f6b 100644 --- a/docs/automation-runbook.md +++ b/docs/automation-runbook.md @@ -4,12 +4,36 @@ The automation manager: a **token-free grinder** (CPU permuter) + a **token-heav agent waves), both banking through the **incorruptible whole-binary byte-gate** (G3/P9 — a wrong match can NEVER bank) and logging every near-miss to a **ranked backlog** for hand-finishing. -## What is running right now +## What is running right now (2026-06-22 — reach-1 pivot) -- **Grinder** (`tools/grinder.py` under `tools/auto_supervisor.sh`) — **LAUNCHED**, token-free. - Permutes the backlog's closest near-misses → byte-gate → banks the real matches → propagates ×134. - Idles when the backlog is drained (waiting for worker-produced near-misses). Survives crashes - (supervisor relaunches). Heartbeat: `.run/auto/grinder_heartbeat.json`. +**Nothing running.** The reach-134 ×134 wave fuel hit its wall (waves 1–16 → fleet ≈61.16%, then confirmed +walls), and the grinder is STOPPED (`.run/auto/STOP` present). The project pivoted to the **reach-1 harvest** +(below) — fuel built + staged, NOT started; Drew drives it from a fresh session. Full state: +`phase-ends/CURRENT_PHASE.md` ★★ REACH-1 HANDOFF. + +## ★ Reach-1 harvest — smallest-first idiom-mining (the Phase-21 active direction) + +**Fuel (BUILT):** 420 reach-1 (overlay-unique) region-main draftable fns in `ov_SC01_077`, ALL Ghidra-C cached, +small (median 47 ins; 251 ≤60 ins). `tools/wave_targets.py --pool reach1` serves them **smallest-first**; the +orchestrator `POOLS` + `.run/auto/orch_state.json` are set to `reach1`, so **`prep --mode pool` serves it**. +Leverage is **×1** (overlay-unique → banks in `ov_SC01_077` only; `dedup_propagate` skips reach<2, no ×134) — +but `ov_SC01_077` is the largest overlay, so 420 small fns is a real fleet lever (plausibly +1–3%). + +**The cycle (Drew controls pacing — `/loop` self-paced or hand-cycle):** +1. `.venv/bin/python tools/orchestrator.py prep --mode pool --n 24` → reach1 smallest-first batch → `.run/auto/wave_batch.json`. +2. Read the batch; launch `tools/workflows/worker_wave.js` with `args={draftDir:".run/drafts-wave", targets:}`. +3. `.venv/bin/python tools/orchestrator.py finish --drafts .run/drafts-wave --commit` — **BACKGROUNDED + `dangerouslyDisableSandbox`** (foreground make build/git get sandbox-killed exit 144). Prints `{banked, near, verified, fleet_pct, …}`. +4. **Distill EVERY wave that has `verified` banks** — `tools/workflows/distill.js` `args={draftsDir:".run/drafts-wave", verified:}`. This is an idiom-MINING pass (more aggressive than the conservative ×134 run): each new gcc quirk → cookbook → feeds forward to bigger reach-1 fns AND occasionally cracks a reach-134 **wall** (×134 bonus, like the Phase-18 pin idiom). +5. Loop (~17 waves for all 420). close-rate should stay HIGH (small fns) → no pool rotation; if it drops <0.15 ×2 and rotates off `reach1`, re-route by setting `"pool":"reach1"` in `.run/auto/orch_state.json`. +6. **Optional token-free grinder** (parallel — permutes reach-1 near-misses): `rm -f .run/auto/STOP && DRIVER=tools/grinder.py setsid nohup bash tools/auto_supervisor.sh --permute-secs 120 -j 14 >/dev/null 2>&1 &` (dangerouslyDisableSandbox). + +The Monitor / STOP / grinder / safety sections below apply unchanged. (The original ×134 "Launch the WORKER +waves" cycle below is the same mechanics with a different pool — reach1 supersedes it for the active run.) + +### Grinder (token-free, currently STOPPED) + +`tools/grinder.py` under `tools/auto_supervisor.sh` — permutes the backlog's closest near-misses → byte-gate → +banks → ×134. Idles when drained; supervisor relaunches on crash. Heartbeat: `.run/auto/grinder_heartbeat.json`. ## Monitor (read-only, from anywhere) diff --git a/docs/backlog.md b/docs/backlog.md index 2223ebd60..8e540e767 100644 --- a/docs/backlog.md +++ b/docs/backlog.md @@ -2,107 +2,122 @@ > Generated by `tools/backlog.py render` from `.run/backlog.jsonl`. These are functions the Phase-21 automation got **close** on but did NOT byte-match. The whole-binary byte-gate is the sole arbiter (G3/P9): **byte-matches bank and are NOT listed here** — only genuine near-misses/blockers are. Ranked by hand-session priority: **reach** (×N propagation leverage) → **closeness** (match_one mismatch count, lower = closer) → **size**. Each row's `best_draft` is the closest C the machine reached — resume from there. -**Open near-misses:** 100 · by status {'near': 62, 'failed': 38} · by class {'WAVE': 24, 'struct': 13, 'schedule': 22, 'plumbing': 12, 'regalloc-order': 22, 'remat': 2, 'other': 2, 'iv-combine': 3} +**Open near-misses:** 115 · by status {'near': 72, 'failed': 43} · by class {'WAVE': 20, 'plumbing': 15, 'schedule': 28, 'struct': 15, 'regalloc-order': 27, 'remat': 2, 'other': 5, 'iv-combine': 2, 'loop-guard': 1} | # | addr | reach | class | nins | status | closeness | where it stuck | best draft | |--:|------|------:|-------|-----:|--------|----------:|----------------|------------| | 1 | func_80174684 | 134 | WAVE | 8 | near | 0 | match_one MATCH but gate rejected (declaration/TU plumbing) | `.run/backlog_drafts/func_80174684.c` | -| 2 | func_801733FC | 134 | struct | 25 | near | 0 | none — modeled on sibling func_80173460 (packed 8-byte struct copy + two s16=1 stores) | `.run/backlog_drafts/func_801733FC.c` | -| 3 | func_8014A51C | 134 | schedule | 32 | near | 0 | none — MATCH (32 ins, relocation-masked) | `.run/backlog_drafts/func_8014A51C.c` | -| 4 | func_80151664 | 134 | plumbing | 35 | near | 0 | none — MATCH (35 ins, relocation-masked); canonical externs kept, call-site casts only | `.run/backlog_drafts/func_80151664.c` | -| 5 | func_801522CC | 134 | plumbing | 41 | near | 0 | TBD — first compile; func_80153C18 canonical is (void) but target sets $a0=$s0 in its delay slot (call-site cast) | `.run/backlog_drafts/func_801522CC.c` | -| 6 | func_801497A8 | 134 | regalloc-order | 47 | near | 0 | none — MATCH. $s1 pinned to D_80078E78 base; result accumulator + masked | `.run/backlog_drafts/func_801497A8.c` | -| 7 | func_801483E8 | 134 | struct | 50 | near | 0 | none — MATCH | `.run/backlog_drafts/func_801483E8.c` | -| 8 | func_8015F380 | 134 | plumbing | 50 | near | 0 | none — expect MATCH (single call-crossing local pinned to $s0) | `.run/backlog_drafts/func_8015F380.c` | -| 9 | func_8016EFC8 | 134 | schedule | 51 | near | 0 | none — MATCH (51 ins). Temp `u32 v = *a0 / 0x4000000;` hoists the load to ins 0 and | `.run/backlog_drafts/func_8016EFC8.c` | -| 10 | func_80156ECC | 134 | plumbing | 55 | near | 0 | none — MATCH (clean reconstruction; 3 call-crossing structs in s1/s2/s4, lh/lhu pair) | `.run/backlog_drafts/func_80156ECC.c` | -| 11 | func_801758FC | 134 | schedule | 55 | near | 0 | none — MATCH (55 ins) | `.run/backlog_drafts/func_801758FC.c` | -| 12 | func_801759D8 | 134 | schedule | 56 | near | 0 | none — MATCH (56 ins) | `.run/backlog_drafts/func_801759D8.c` | -| 13 | func_80147E44 | 134 | regalloc-order | 67 | near | 0 | none -- MATCH (67 ins). $s1/$s0/$s3/$s2 pins ($17/$16/$19/$18) + 3-pointer reload | `.run/backlog_drafts/func_80147E44.c` | -| 14 | func_80164418 | 134 | struct | 70 | near | 0 | none — MATCH (s16 stack array forces the spill; 2nd ratan2 reuses /dy/ in $a1) | `.run/backlog_drafts/func_80164418.c` | -| 15 | func_80166054 | 134 | regalloc-order | 94 | near | 0 | none — MATCH (94 ins). Pins: param_1->$s2, angle->$s0, shift->$s1, r0->$s3, | `.run/backlog_drafts/func_80166054.c` | -| 16 | func_801463A0 | 134 | struct | 101 | near | 0 | none — MATCH (101 ins, match_one); real symbol names; misaligned 8B copy + s16 stores + masked B9C last | `.run/backlog_drafts/func_801463A0.c` | -| 17 | func_80167714 | 134 | regalloc-order | 104 | near | 0 | none — MATCH (104 ins) | `.run/backlog_drafts/func_80167714.c` | -| 18 | func_80169228 | 134 | regalloc-order | 105 | near | 0 | none — MATCH (105 ins, relocation-masked). Key levers: arg0/p pinned $s1/$s0, | `.run/backlog_drafts/func_80169228.c` | -| 19 | func_80174CB0 | 134 | regalloc-order | 123 | near | 0 | none — MATCH (match_one 123/123). Levers: (1) §21 one combined stack struct {s32 a[5]; ...} | `.run/backlog_drafts/func_80174CB0.c` | -| 20 | func_80171C64 | 134 | regalloc-order | 24 | near | 1 | unknown — first draft, param_1 must land in $s1 and (param_2 & 0xFF) in $s0 across the func_80171EC8 call | `.run/backlog_drafts/func_80171C64.c` | -| 21 | func_8016F0E4 | 134 | plumbing | 26 | near | 1 | none — MATCH (26 ins); natural C form, param_1 auto-allocated to $s0 | `.run/backlog_drafts/func_8016F0E4.c` | -| 22 | func_8014F3E8 | 134 | WAVE | 32 | near | 1 | WAVE: 1 mismatch | `.run/backlog_drafts/func_8014F3E8.c` | -| 23 | func_801775E0 | 134 | regalloc-order | 67 | near | 1 | 1 ins — target `sb $v0,0x6($s0)` vs mine `sb $v0,26($s1)` (same store P1+0x1a; gcc address-CSE picks $s1 base not the recomputed $s0); all else byte-identical | `.run/backlog_drafts/func_801775E0.c` | -| 24 | func_8014FFDC | 134 | struct | 93 | near | 1 | none — MATCH | `.run/backlog_drafts/func_8014FFDC.c` | -| 25 | func_80171FFC | 134 | regalloc-order | 40 | near | 3 | none — MATCH (40 ins). Key: func_8017248C takes (a0,a1); calling it with | `.run/backlog_drafts/func_80171FFC.c` | -| 26 | func_801466F0 | 134 | plumbing | 24 | near | 4 | none — MATCH (struct param-spill + branch-polarity) | `.run/backlog_drafts/func_801466F0.c` | -| 27 | func_80147364 | 134 | remat | 30 | near | 4 | none — MATCH (30 ins). Lever: hoist &D_80126B58 into a local ptr `u8 *p=&D_80126B58;` so gcc | `.run/backlog_drafts/func_80147364.c` | -| 28 | func_80140D68 | 134 | schedule | 65 | near | 5 | 5-ins near-miss — gcc hoists `lui 0xff00` (the 0xFF000000 mask) one slot too early in the first AddPrim block, so the D_800B9A02 index value lands in $v1 instead of $a1 and *param_1 is read late (idx 35-43). Structure + regs otherwise byte-exact (frame eliminated via struct-array D_800AE7BC, &D_800B9A02 held in $a2 via the pB $6 pin, param_1+8 grouping fixes the rest). Pure sched1 list-order residual -> permuter candidate (try reg-hint + reorder around the lui 0xff00 / lw 0($a0) pair). | `.run/backlog_drafts/func_80140D68.c` | -| 29 | func_80175820 | 134 | schedule | 55 | near | 6 | body byte-IDENTICAL; only residual is the phantom 0x10 leaf frame — target schedules `addiu $sp,-0x10` into the load-delay slot at insn 26 (after the D_8011F7C0 load) and `addiu $sp,0x10` before `jr ra`. With the frame forced (reserved local + anchor) gcc emits the prologue adjust at insn 0 instead of the delay slot (§5 frame-scheduling class); pins block the permuter, no C lever found to move it. Frameless form left here = body byte-exact, 2 frame insns short. | `.run/backlog_drafts/func_80175820.c` | -| 30 | func_8016130C | 134 | WAVE | 26 | near | 9 | WAVE: 9 mismatch | `.run/backlog_drafts/func_8016130C.c` | -| 31 | func_801495C4 | 134 | regalloc-order | 34 | near | 10 | 10-mismatch near-miss, ALL pure stack-slot offset immediates. Instruction sequence, opcodes, | `.run/backlog_drafts/func_801495C4.c` | -| 32 | func_80161374 | 134 | schedule | 41 | near | 10 | none — MATCH (41/41 relocation-masked) | `.run/backlog_drafts/func_80161374.c` | -| 33 | func_80163764 | 134 | regalloc-order | 42 | near | 10 | none — MATCH (42 ins). pins $s2/$s1/$s0/$s3 + u32 counter (sltiu) + init order s2,s3,i,p | `.run/backlog_drafts/func_80163764.c` | -| 34 | func_80149374 | 134 | remat | 23 | near | 11 | gcc -O2 CSEs &sp18 into freed callee-saved $s0 (1 addu + 2 move); target rematerializes addiu $sp,0x18 twice. Single-buffer straight-line address reused across 2 calls -> CSE wins; no clean C (cast/type/union/ptr-var/$8-pin) flips it; two-distinct-locals remats but grows frame +8 (gcc-2.7.2 won't coalesce slots back to 0x18). Frame/regs/params all match; only this 1 insn differs. | `.run/backlog_drafts/func_80149374.c` | -| 35 | func_80150528 | 134 | schedule | 53 | near | 12 | none — MATCH (53 ins). Modeled on banked sibling DEFINE_func_80163950 (same D_801202A0 stride-0x10C loop + func_80135A4C call); single-pointer for-loop reproduces gcc's two-IV (p, p+0x20) schedule exactly. NB: §20 had flagged this "unsteerable" pre-sibling-exemplar. | `.run/backlog_drafts/func_80150528.c` | -| 36 | func_80146AFC | 134 | schedule | 40 | near | 13 | none — MATCH | `.run/backlog_drafts/func_80146AFC.c` | -| 37 | func_8016BF50 | 134 | WAVE | 22 | near | 14 | WAVE: 14 mismatch | `.run/backlog_drafts/func_8016BF50.c` | -| 38 | func_80146A6C | 134 | WAVE | 18 | near | 17 | WAVE: 17 mismatch | `.run/backlog_drafts/func_80146A6C.c` | -| 39 | func_8016E778 | 134 | WAVE | 20 | near | 17 | WAVE: 17 mismatch | `.run/backlog_drafts/func_8016E778.c` | -| 40 | func_8015C030 | 134 | WAVE | 23 | near | 17 | WAVE: 17 mismatch | `.run/backlog_drafts/func_8015C030.c` | -| 41 | func_8014ADE0 | 134 | schedule | 139 | near | 19 | 16 ins off — all compiler-internal ties: (1) 0xAAA8 const lands $v0 vs target $v1; | `.run/backlog_drafts/func_8014ADE0.c` | -| 42 | func_8016191C | 134 | plumbing | 24 | near | 20 | none — MATCH (24 ins). early-return-per-arm: each arm sets $v0 directly + j-tail merges | `.run/backlog_drafts/func_8016191C.c` | -| 43 | func_8014FE60 | 134 | regalloc-order | 95 | near | 20 | none — MATCH (permuter closed the final bothzero-block regalloc/schedule residual: moving `a = in[2]` before the +0x7E read-modify-write flips the 0x7FFF constant into $v1 and computes return-0 in $v0) | `.run/backlog_drafts/func_8014FE60.c` | -| 44 | func_80172C50 | 134 | WAVE | 20 | near | 23 | WAVE: 23 mismatch | `.run/backlog_drafts/func_80172C50.c` | -| 45 | func_8017248C | 134 | WAVE | 24 | near | 23 | WAVE: 23 mismatch | `.run/backlog_drafts/func_8017248C.c` | -| 46 | func_8014E5B4 | 134 | regalloc-order | 59 | near | 23 | none — MATCH | `.run/backlog_drafts/func_8014E5B4.c` | -| 47 | func_80141B90 | 134 | struct | 29 | near | 24 | none — MATCH (29 ins); array-of-int %lo-fold + call + u16 if-block; volatile-double reserves the target's 8-byte frame slot | `.run/backlog_drafts/func_80141B90.c` | -| 48 | func_801719A4 | 134 | struct | 24 | near | 25 | none — MATCH (24 ins, relocation-masked) | `.run/backlog_drafts/func_801719A4.c` | -| 49 | func_8016706C | 134 | WAVE | 30 | near | 27 | WAVE: 27 mismatch | `.run/backlog_drafts/func_8016706C.c` | -| 50 | func_8014D2A0 | 134 | other | 80 | near | 27 | none — MATCH (80 ins, relocation-masked); loop-guard idiom per engine_core DEFINE_func_80164ACC | `.run/backlog_drafts/func_8014D2A0.c` | -| 51 | func_80177AD4 | 134 | iv-combine | 34 | near | 28 | cc1 combine_givs will NOT fold the halfword RMW (lhu;sh) into the byte-store biv. Target uses ONE IV at p+0x20 (byte at 0, halfword RMW at -2); our cc1 either (a) merges into ONE IV but bases it at the LOWEST offset = the halfword (+0x1e), so every load/store offset is shifted (0/2 vs -2/0) and byte-differs; or (b, this draft) keeps the byte biv at the correct +0x20 base but SPAWNS a 2nd IV (+0x1e) for the RMW halfword -> +1 addiu + schedule shift (28 mismatched, mostly the 2nd-IV addiu and a 1-row delay-slot schedule shift). Probe-confirmed: even with both fields as forward non-negative struct members, the halfword RMW never folds into the byte biv (a non-RMW byte/halfword pair DOES merge). Genuine gcc-2.7.2 giv-combination divergence, not source-typeable. Matches the Phase-20 §20 verdict (independently re-derived). STUB. | `.run/backlog_drafts/func_80177AD4.c` | -| 52 | func_801777BC | 134 | schedule | 59 | near | 29 | body byte-matches; residual ~3 ins = prologue instruction-scheduling (final `sll t8,16` / `lw param_7` / `addu t0,a0,0xC` ordering around the blez guard) + the loop-counter copy `addu t3,v0` — pure gcc sched/regalloc tie-break, permuter-blocked by the register __asm__ pins | `.run/backlog_drafts/func_801777BC.c` | -| 53 | func_80161888 | 134 | schedule | 37 | near | 30 | none — MATCH (proxy verified) | `.run/backlog_drafts/func_80161888.c` | -| 54 | func_80144B14 | 134 | schedule | 34 | near | 31 | none — MATCH (34 ins). Two stack structs (s16[3] each) passed by addr to | `.run/backlog_drafts/func_80144B14.c` | -| 55 | func_801778A8 | 134 | iv-combine | 38 | near | 38 | gcc spawns 2 IVs (byte giv @+0xc, halfword RMW giv @+0xa); target combines both into ONE IV at +0xc reaching the halfword at -2($a3). A struct collapses to 1 IV but anchors at the struct base (+0xa) not +0xc; raw byte+halfword RMW never combines. Same combine_givs-refuses-halfword-RMW wall as sibling func_80177AD4 (§20, stubbed). Floor 33-off; not source-steerable (combine runs pre-regalloc, pins/order don't move it). | `.run/backlog_drafts/func_801778A8.c` | -| 56 | func_80177EA4 | 134 | regalloc-order | 56 | near | 45 | structure/branch-polarity/block-order/IV all match (56=56 ins); residual is gcc loop-invariant HOISTING — move_movables threshold=62 vs my loop insn_count=46 hoists 5 constants (0x3000000,0x74808080,6,1) to prologue regs while the target re-materializes them INLINE each iteration (only the 0xFFFFFF mask is hoisted in both). To match, the loop-pass insn_count would need >=60 so threshold*1*1 < insn_count after the first hoist; clean C producing the identical final logic yields 46. Pins free regs (more hoisting), barriers/volatile/for-vs-do-while don't raise insn_count. ~45 masked-mismatches all cascade from the 5 hoisted-vs-inline constants + their register reassignment. | `.run/backlog_drafts/func_80177EA4.c` | -| 57 | func_80176144 | 134 | regalloc-order | 53 | near | 50 | none — MATCH | `.run/backlog_drafts/func_80176144.c` | -| 58 | func_8016163C | 134 | plumbing | 78 | near | 50 | none — MATCH (78 ins). First arm calls func_801599A4 with NO arg (asm nop delay slot) via fn-ptr cast ((void(*)(void))func_801599A4)(). | `.run/backlog_drafts/func_8016163C.c` | -| 59 | func_8014F2E0 | 134 | schedule | 66 | near | 51 | §10 IV-init placement (piVar3 setup not sunk past loop guard) + store-vs-load (D_801150D8=0 schedules between the two arg-loads) — both CONFIRMED-unsteerable per cookbook §20; 11-off | `.run/backlog_drafts/func_8014F2E0.c` | -| 60 | func_80161774 | 134 | plumbing | 69 | near | 53 | none — MATCH (69 ins, match_one verified; clean nested-if; param_1 -> $s0 call-crossing) | `.run/backlog_drafts/func_80161774.c` | -| 61 | func_80177940 | 134 | iv-combine | 101 | near | 65 | prologue+setup (35 ins) byte-match exactly; loop body diverges on gcc loop-invariant hoist ORDERING (scheduler tie-break), the conditional 0x74808080 recompute-vs-hoist, and the tail IV final-value double-move (addu s3,a0,zero; addu v0,s3,zero) + pd+=5 increment placement -- same loop-IV-combine class S20 flags as stub for sibling func_80177AD4. | `.run/backlog_drafts/func_80177940.c` | -| 62 | func_8014DD8C | 134 | WAVE | 108 | near | 83 | WAVE: 83 mismatch | `.run/backlog_drafts/func_8014DD8C.c` | -| 63 | func_801705C0 | 134 | WAVE | 14 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801705C0.c` | -| 64 | func_8016B91C | 134 | WAVE | 18 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8016B91C.c` | -| 65 | func_801718AC | 134 | WAVE | 22 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801718AC.c` | -| 66 | func_80168B70 | 134 | WAVE | 27 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80168B70.c` | -| 67 | func_801494CC | 134 | WAVE | 30 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801494CC.c` | -| 68 | func_801708B0 | 134 | WAVE | 30 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801708B0.c` | -| 69 | func_80170CF0 | 134 | schedule | 30 | failed | | 4-ins PROLOGUE-ORDER residual (body insns 4-29 byte-identical). My cc1 hoists the funcptr lui/lw ABOVE the frame setup (lui,lw,addiu sp,sw s0); target keeps frame setup first (addiu sp,sw s0,lui,lw). Same prologue-order class as func_80177F84 (cookbook L1332) — no C lever found (intermediate var/cast/void*-vs-funcptr/pin/early-ptr all reproduce the hoist; barriers/empty-asm/volatile-local regress). KEY WIN: `case 0: break;` forces emit_case_nodes' slti<2;bnez→default lower-bound prune, exactly matching the target dispatch tree (a bare 2-case switch omits it). | `.run/backlog_drafts/func_80170CF0.c` | -| 70 | func_80149450 | 134 | WAVE | 31 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80149450.c` | -| 71 | func_80149F2C | 134 | WAVE | 31 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80149F2C.c` | -| 72 | func_80152C80 | 134 | plumbing | 41 | failed | | none — MATCH expected (linear call/store sequence, no regalloc tension) | `.run/backlog_drafts/func_80152C80.c` | -| 73 | func_8014C1C8 | 134 | regalloc-order | 44 | failed | | none — MATCH (match_one 44/44 ins, relocation-masked) | `.run/backlog_drafts/func_8014C1C8.c` | -| 74 | func_80146750 | 134 | regalloc-order | 47 | failed | | none — MATCH (match_one 47/47; psVar4->$a3 / psVar3->$v1 pins forced the init order) | `.run/backlog_drafts/func_80146750.c` | -| 75 | func_8014680C | 134 | struct | 47 | failed | | none — MATCH (47 ins, relocation-masked) | `.run/backlog_drafts/func_8014680C.c` | -| 76 | func_8014C4AC | 134 | other | 47 | failed | | none — MATCH (shared-ret0 goto §16 flips final branch polarity + schedules ret=0 into delay slot; memcpy(t0+0x7C,a3,8) inlines the lwl/lwr/swl/swr 8-byte block §21; param_1 = unsigned short* for the lhu reads) | `.run/backlog_drafts/func_8014C4AC.c` | -| 77 | func_80151B98 | 134 | regalloc-order | 47 | failed | | none — MATCH | `.run/backlog_drafts/func_80151B98.c` | -| 78 | func_80147F78 | 134 | schedule | 48 | failed | | TWO residuals remain. (1) FRAME: target frame is 0x60 = exactly 64 bytes (16 words) of LIVE local vars on top of the 4 saved regs (s0,s1,s2,ra) + 0x10 arg area; my body has no locals so frame is 0x20. Reproducing 64B of live local needs an address-escaped local buffer, but the target has only the 3 visible jals (no 4th call to receive &buf), so I cannot make a 16-word local survive -O2 dead-store-elim without emitting an extra instruction. (2) RELOAD SCHEDULE: target reloads D_80127090/94/98 from memory (folded lui%hi;lw%lo) with the FIRST reload HOISTED up between store90 and store94 (free non-volatile scheduling); a "memory" clobber barrier (below) forces the folded reloads but pins them strictly AFTER all three stores. The natural source is almost certainly a 16-word local buffer that ALIASES the globals (non-volatile reloads, freely scheduled) — same construct that also explains the 0x60 frame. Closest faithful body kept below; folded reload bytes are correct, frame + hoist are the gap. | `.run/backlog_drafts/func_80147F78.c` | -| 79 | func_80151C54 | 134 | plumbing | 52 | failed | | none — MATCH (52 ins). Branch-polarity §3-T4: BD60 arm is fall-through (if !=1 && ==0x11), BC44 is else. | `.run/backlog_drafts/func_80151C54.c` | -| 80 | func_8017129C | 134 | struct | 58 | failed | | none — MATCH (58 ins); three aligned 16-byte block-copies via struct assignment (cookbook §21) | `.run/backlog_drafts/func_8017129C.c` | -| 81 | func_80173A60 | 134 | regalloc-order | 59 | failed | | none — MATCH (59 ins) | `.run/backlog_drafts/func_80173A60.c` | -| 82 | func_8014A738 | 134 | regalloc-order | 62 | failed | | none — MATCH | `.run/backlog_drafts/func_8014A738.c` | -| 83 | func_80175308 | 134 | struct | 67 | failed | | none — MATCH (67 ins, relocation-masked) | `.run/backlog_drafts/func_80175308.c` | -| 84 | func_8014D610 | 134 | plumbing | 74 | failed | | none — MATCH (74 ins). for-loop + continue, single IV pointer p; gcc derives the $s0 = p+0x75 second induction var. Template: DEFINE_func_80163950 (sibling, same D_801202A0 loop + func_80135A4C). | `.run/backlog_drafts/func_8014D610.c` | -| 85 | func_80163534 | 134 | schedule | 76 | failed | | mismatch=13, a single 1-position scheduling tie. Instrs 1-30 byte-perfect; all registers correct | `.run/backlog_drafts/func_80163534.c` | -| 86 | func_8014CF04 | 134 | struct | 82 | failed | | none — MATCH (82 ins; array-of-struct scan, for-loop over Ent D_801202A0[96], stride 0x10C) | `.run/backlog_drafts/func_8014CF04.c` | -| 87 | func_80156670 | 134 | schedule | 83 | failed | | none — MATCH (83 ins). Key: hoist `iVar1 = uVar3*4;` as its OWN statement before the if so gcc schedules `sll v1,s1,2` into the bnez delay slot (computed unconditionally) and reuses v1 index-first (`iVar1 + (s32)&D_801150E0` → `addu v0,v1,v0`). 13-arg call to func_80157158 (a0-a3 + 9 stack args at 0x10..0x30); param_2/param_3 cast (u16) → andi; param_6 incoming as lhu(u16). Address args = integer math `iVar2 + (s32)&D_x` (index-first → lui;addiu;addu, index added first). | `.run/backlog_drafts/func_80156670.c` | -| 88 | func_8014D4C0 | 134 | schedule | 84 | failed | | none — MATCH (goto forces if-body out-of-line/last; `>=` fixes slt operand order) | `.run/backlog_drafts/func_8014D4C0.c` | -| 89 | func_8016A73C | 134 | struct | 85 | failed | | none — MATCH (85 ins, relocation-masked) | `.run/backlog_drafts/func_8016A73C.c` | -| 90 | func_80173CB4 | 134 | schedule | 90 | failed | | none — MATCH (switch form keeps cases unmerged; final block: reuse one temp for the D_8012750C test + the func_8013767C result -> $a0 alloc; invert if to !=0 for branch polarity + store order) | `.run/backlog_drafts/func_80173CB4.c` | -| 91 | func_8014C6F4 | 134 | regalloc-order | 91 | failed | | 19-off loop tie-break — target compiles the search as a while/for (pre-guard sltu;beqz present) with the found pointer snapshotted to $v0 split from the IV in $a0 and the +4 sunk into both call-arg delay slots; do-while is instruction-count-exact (91=91) but lacks the pre-guard, while every for/while form costs +4 ins (merge stays in $a0). §10 schedule/regalloc residual. | `.run/backlog_drafts/func_8014C6F4.c` | -| 92 | func_8014D12C | 134 | schedule | 93 | failed | | none — MATCH (93 ins). Block-order lever: success-continuation (return 1) | `.run/backlog_drafts/func_8014D12C.c` | -| 93 | func_801502EC | 134 | schedule | 93 | failed | | none — MATCH (93 ins). 8-byte block copy via alignment-1 struct (Blk8{u8 b[8]}) assignment reproduces the lwl/lwr/swl/swr; ret=0 hoisted before the block copy to fix the s3-vs-ra prologue save order. | `.run/backlog_drafts/func_801502EC.c` | -| 94 | func_80150170 | 134 | struct | 95 | failed | | none — MATCH (95/95). Keys: (1) two parallel 3-halfword groups via chained assign `sp10.x = sp18.x = v` (sp18 inner so 0x18 stores first); (2) align-1 blk8 struct copy for the lwl/lwr/swl/swr 8-byte copy into actor+0x80 (src = sp buf from func_801502EC, or u8[] D_801152A8); (3) f0/f2 = u16 (lhu), f1 = s16 (lh for the slt); (4) `(iVar5/iVar6)!=0` single-OR test + branch-polarity invert (not-both-zero is fall-through); (5) both-zero tail register pins: 0x7fff -> $v1 (`register s32 __asm__("$3")`), sp10.f0/f2 -> reused $a0 (`register u32 __asm__("$4")` written twice) to force gcc's hoist-load + reg reuse schedule. | `.run/backlog_drafts/func_80150170.c` | -| 95 | func_8014CD80 | 134 | regalloc-order | 97 | failed | | none — MATCH (97 ins). iVar3 pinned to $v1 (register __asm__("$3")) so | `.run/backlog_drafts/func_8014CD80.c` | -| 96 | func_8014E284 | 134 | WAVE | 108 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8014E284.c` | -| 97 | func_80167540 | 134 | WAVE | 117 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80167540.c` | -| 98 | func_8014F4C0 | 134 | WAVE | 141 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8014F4C0.c` | -| 99 | func_8014E048 | 134 | WAVE | 143 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8014E048.c` | -| 100 | func_80155800 | 134 | WAVE | 145 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80155800.c` | +| 2 | func_80161208 | 134 | plumbing | 14 | near | 0 | none — MATCH expected (param saved across call → natural $s0, no pin needed) | `.run/backlog_drafts/func_80161208.c` | +| 3 | func_8016E778 | 134 | plumbing | 20 | near | 0 | none — MATCH (build-word spread + 3-halfword buffer, two stack addrs passed) | `.run/backlog_drafts/func_8016E778.c` | +| 4 | func_80172C50 | 134 | plumbing | 20 | near | 0 | none — MATCH (unaligned 8-byte memcpy + tail call) | `.run/backlog_drafts/func_80172C50.c` | +| 5 | func_8016BF50 | 134 | schedule | 22 | near | 0 | none — MATCH; short buf[3] keeps all 3 stores live + hoisting *(int*)(p+0x34) into a local | `.run/backlog_drafts/func_8016BF50.c` | +| 6 | func_801733FC | 134 | struct | 25 | near | 0 | none — modeled on sibling func_80173460 (packed 8-byte struct copy + two s16=1 stores) | `.run/backlog_drafts/func_801733FC.c` | +| 7 | func_8014A51C | 134 | schedule | 32 | near | 0 | none — MATCH (32 ins, relocation-masked) | `.run/backlog_drafts/func_8014A51C.c` | +| 8 | func_801495C4 | 134 | regalloc-order | 34 | near | 0 | none — MATCH expected (cloned byte-matched sibling func_8014964C recipe: $16 pin + asm barriers force param_2→$s0 and rematerialize &in/&mid/mtx) | `.run/backlog_drafts/func_801495C4.c` | +| 9 | func_80151664 | 134 | plumbing | 35 | near | 0 | none — MATCH (35 ins, relocation-masked); canonical externs kept, call-site casts only | `.run/backlog_drafts/func_80151664.c` | +| 10 | func_801522CC | 134 | plumbing | 41 | near | 0 | TBD — first compile; func_80153C18 canonical is (void) but target sets $a0=$s0 in its delay slot (call-site cast) | `.run/backlog_drafts/func_801522CC.c` | +| 11 | func_801497A8 | 134 | regalloc-order | 47 | near | 0 | none — MATCH. $s1 pinned to D_80078E78 base; result accumulator + masked | `.run/backlog_drafts/func_801497A8.c` | +| 12 | func_801483E8 | 134 | struct | 50 | near | 0 | none — MATCH | `.run/backlog_drafts/func_801483E8.c` | +| 13 | func_8015F380 | 134 | plumbing | 50 | near | 0 | none — expect MATCH (single call-crossing local pinned to $s0) | `.run/backlog_drafts/func_8015F380.c` | +| 14 | func_8016EFC8 | 134 | schedule | 51 | near | 0 | none — MATCH (51 ins). Temp `u32 v = *a0 / 0x4000000;` hoists the load to ins 0 and | `.run/backlog_drafts/func_8016EFC8.c` | +| 15 | func_80156ECC | 134 | plumbing | 55 | near | 0 | none — MATCH (clean reconstruction; 3 call-crossing structs in s1/s2/s4, lh/lhu pair) | `.run/backlog_drafts/func_80156ECC.c` | +| 16 | func_801758FC | 134 | schedule | 55 | near | 0 | none — MATCH (55 ins) | `.run/backlog_drafts/func_801758FC.c` | +| 17 | func_801759D8 | 134 | schedule | 56 | near | 0 | none — MATCH (56 ins) | `.run/backlog_drafts/func_801759D8.c` | +| 18 | func_80147E44 | 134 | regalloc-order | 67 | near | 0 | none -- MATCH (67 ins). $s1/$s0/$s3/$s2 pins ($17/$16/$19/$18) + 3-pointer reload | `.run/backlog_drafts/func_80147E44.c` | +| 19 | func_80164418 | 134 | struct | 70 | near | 0 | none — MATCH (s16 stack array forces the spill; 2nd ratan2 reuses /dy/ in $a1) | `.run/backlog_drafts/func_80164418.c` | +| 20 | func_80166054 | 134 | regalloc-order | 94 | near | 0 | none — MATCH (94 ins). Pins: param_1->$s2, angle->$s0, shift->$s1, r0->$s3, | `.run/backlog_drafts/func_80166054.c` | +| 21 | func_801463A0 | 134 | struct | 101 | near | 0 | none — MATCH (101 ins, match_one); real symbol names; misaligned 8B copy + s16 stores + masked B9C last | `.run/backlog_drafts/func_801463A0.c` | +| 22 | func_80167714 | 134 | regalloc-order | 104 | near | 0 | none — MATCH (104 ins) | `.run/backlog_drafts/func_80167714.c` | +| 23 | func_80169228 | 134 | regalloc-order | 105 | near | 0 | none — MATCH (105 ins, relocation-masked). Key levers: arg0/p pinned $s1/$s0, | `.run/backlog_drafts/func_80169228.c` | +| 24 | func_80174CB0 | 134 | regalloc-order | 123 | near | 0 | none — MATCH (match_one 123/123). Levers: (1) §21 one combined stack struct {s32 a[5]; ...} | `.run/backlog_drafts/func_80174CB0.c` | +| 25 | func_80178004 | 134 | regalloc-order | 165 | near | 0 | none — MATCH (full register pins per sibling func_80177EA4; running-ptr $s2 to stop unroll-rebase; | `.run/backlog_drafts/func_80178004.c` | +| 26 | func_80163C2C | 134 | regalloc-order | 167 | near | 0 | none — MATCH (167 ins) | `.run/backlog_drafts/func_80163C2C.c` | +| 27 | func_8015126C | 134 | regalloc-order | 254 | near | 0 | none — MATCH (254 ins, relocation-masked) | `.run/backlog_drafts/func_8015126C.c` | +| 28 | func_8016F0E4 | 134 | plumbing | 26 | near | 1 | none — MATCH (26 ins); natural C form, param_1 auto-allocated to $s0 | `.run/backlog_drafts/func_8016F0E4.c` | +| 29 | func_8014F3E8 | 134 | WAVE | 32 | near | 1 | WAVE: 1 mismatch | `.run/backlog_drafts/func_8014F3E8.c` | +| 30 | func_80177AD4 | 134 | regalloc-order | 34 | near | 1 | 1 ins — loop-bound shift reads loop-carried $a3 (sll v0,a3,16) vs target's dying copy $v0 (sll v0,v0,16); gcc CSE canonicalizes the two equal-valued regs to the loop-carried one. IV-combine (§20) CRACKED via $a2/$a3 pins (was 31-mismatch "stub"). | `.run/backlog_drafts/func_80177AD4.c` | +| 31 | func_801775E0 | 134 | regalloc-order | 67 | near | 1 | 1 ins — target `sb $v0,0x6($s0)` vs mine `sb $v0,26($s1)` (same store P1+0x1a; gcc address-CSE picks $s1 base not the recomputed $s0); all else byte-identical | `.run/backlog_drafts/func_801775E0.c` | +| 32 | func_8014FFDC | 134 | struct | 93 | near | 1 | none — MATCH | `.run/backlog_drafts/func_8014FFDC.c` | +| 33 | func_80153E00 | 134 | regalloc-order | 195 | near | 1 | none — MATCH (195 ins). Levers: pin $s0(arg0)/$s2(flag base)/$s3(D_80078E78); LET uVar3 | `.run/backlog_drafts/func_80153E00.c` | +| 34 | func_80171FFC | 134 | regalloc-order | 40 | near | 3 | none — MATCH (40 ins). Key: func_8017248C takes (a0,a1); calling it with | `.run/backlog_drafts/func_80171FFC.c` | +| 35 | func_801466F0 | 134 | plumbing | 24 | near | 4 | none — MATCH (struct param-spill + branch-polarity) | `.run/backlog_drafts/func_801466F0.c` | +| 36 | func_80147364 | 134 | remat | 30 | near | 4 | none — MATCH (30 ins). Lever: hoist &D_80126B58 into a local ptr `u8 *p=&D_80126B58;` so gcc | `.run/backlog_drafts/func_80147364.c` | +| 37 | func_80146A6C | 134 | struct | 18 | near | 5 | none — MATCH | `.run/backlog_drafts/func_80146A6C.c` | +| 38 | func_80140D68 | 134 | schedule | 65 | near | 5 | 5-ins near-miss — gcc hoists `lui 0xff00` (the 0xFF000000 mask) one slot too early in the first AddPrim block, so the D_800B9A02 index value lands in $v1 instead of $a1 and *param_1 is read late (idx 35-43). Structure + regs otherwise byte-exact (frame eliminated via struct-array D_800AE7BC, &D_800B9A02 held in $a2 via the pB $6 pin, param_1+8 grouping fixes the rest). Pure sched1 list-order residual -> permuter candidate (try reg-hint + reorder around the lui 0xff00 / lw 0($a0) pair). | `.run/backlog_drafts/func_80140D68.c` | +| 39 | func_80175820 | 134 | schedule | 55 | near | 6 | body byte-IDENTICAL; only residual is the phantom 0x10 leaf frame — target schedules `addiu $sp,-0x10` into the load-delay slot at insn 26 (after the D_8011F7C0 load) and `addiu $sp,0x10` before `jr ra`. With the frame forced (reserved local + anchor) gcc emits the prologue adjust at insn 0 instead of the delay slot (§5 frame-scheduling class); pins block the permuter, no C lever found to move it. Frameless form left here = body byte-exact, 2 frame insns short. | `.run/backlog_drafts/func_80175820.c` | +| 40 | func_8016130C | 134 | WAVE | 26 | near | 9 | WAVE: 9 mismatch | `.run/backlog_drafts/func_8016130C.c` | +| 41 | func_80161374 | 134 | schedule | 41 | near | 10 | none — MATCH (41/41 relocation-masked) | `.run/backlog_drafts/func_80161374.c` | +| 42 | func_80163764 | 134 | regalloc-order | 42 | near | 10 | none — MATCH (42 ins). pins $s2/$s1/$s0/$s3 + u32 counter (sltiu) + init order s2,s3,i,p | `.run/backlog_drafts/func_80163764.c` | +| 43 | func_80149374 | 134 | remat | 23 | near | 11 | gcc -O2 CSEs &sp18 into freed callee-saved $s0 (1 addu + 2 move); target rematerializes addiu $sp,0x18 twice. Single-buffer straight-line address reused across 2 calls -> CSE wins; no clean C (cast/type/union/ptr-var/$8-pin) flips it; two-distinct-locals remats but grows frame +8 (gcc-2.7.2 won't coalesce slots back to 0x18). Frame/regs/params all match; only this 1 insn differs. | `.run/backlog_drafts/func_80149374.c` | +| 44 | func_80150528 | 134 | schedule | 53 | near | 12 | none — MATCH (53 ins). Modeled on banked sibling DEFINE_func_80163950 (same D_801202A0 stride-0x10C loop + func_80135A4C call); single-pointer for-loop reproduces gcc's two-IV (p, p+0x20) schedule exactly. NB: §20 had flagged this "unsteerable" pre-sibling-exemplar. | `.run/backlog_drafts/func_80150528.c` | +| 45 | func_80146AFC | 134 | schedule | 40 | near | 13 | none — MATCH | `.run/backlog_drafts/func_80146AFC.c` | +| 46 | func_8015C030 | 134 | WAVE | 23 | near | 17 | WAVE: 17 mismatch | `.run/backlog_drafts/func_8015C030.c` | +| 47 | func_8014ADE0 | 134 | schedule | 139 | near | 19 | 16 ins off — all compiler-internal ties: (1) 0xAAA8 const lands $v0 vs target $v1; | `.run/backlog_drafts/func_8014ADE0.c` | +| 48 | func_8016191C | 134 | plumbing | 24 | near | 20 | none — MATCH (24 ins). early-return-per-arm: each arm sets $v0 directly + j-tail merges | `.run/backlog_drafts/func_8016191C.c` | +| 49 | func_8014FE60 | 134 | regalloc-order | 95 | near | 20 | none — MATCH (permuter closed the final bothzero-block regalloc/schedule residual: moving `a = in[2]` before the +0x7E read-modify-write flips the 0x7FFF constant into $v1 and computes return-0 in $v0) | `.run/backlog_drafts/func_8014FE60.c` | +| 50 | func_8017248C | 134 | WAVE | 24 | near | 23 | WAVE: 23 mismatch | `.run/backlog_drafts/func_8017248C.c` | +| 51 | func_8014E5B4 | 134 | regalloc-order | 59 | near | 23 | none — MATCH | `.run/backlog_drafts/func_8014E5B4.c` | +| 52 | func_80141B90 | 134 | struct | 29 | near | 24 | none — MATCH (29 ins); array-of-int %lo-fold + call + u16 if-block; volatile-double reserves the target's 8-byte frame slot | `.run/backlog_drafts/func_80141B90.c` | +| 53 | func_801719A4 | 134 | struct | 24 | near | 25 | none — MATCH (24 ins, relocation-masked) | `.run/backlog_drafts/func_801719A4.c` | +| 54 | func_8016706C | 134 | WAVE | 30 | near | 27 | WAVE: 27 mismatch | `.run/backlog_drafts/func_8016706C.c` | +| 55 | func_8014D2A0 | 134 | other | 80 | near | 27 | none — MATCH (80 ins, relocation-masked); loop-guard idiom per engine_core DEFINE_func_80164ACC | `.run/backlog_drafts/func_8014D2A0.c` | +| 56 | func_801777BC | 134 | schedule | 59 | near | 29 | body byte-matches; residual ~3 ins = prologue instruction-scheduling (final `sll t8,16` / `lw param_7` / `addu t0,a0,0xC` ordering around the blez guard) + the loop-counter copy `addu t3,v0` — pure gcc sched/regalloc tie-break, permuter-blocked by the register __asm__ pins | `.run/backlog_drafts/func_801777BC.c` | +| 57 | func_80161888 | 134 | schedule | 37 | near | 30 | none — MATCH (proxy verified) | `.run/backlog_drafts/func_80161888.c` | +| 58 | func_80144B14 | 134 | schedule | 34 | near | 31 | none — MATCH (34 ins). Two stack structs (s16[3] each) passed by addr to | `.run/backlog_drafts/func_80144B14.c` | +| 59 | func_801778A8 | 134 | iv-combine | 38 | near | 38 | gcc spawns 2 IVs (byte giv @+0xc, halfword RMW giv @+0xa); target combines both into ONE IV at +0xc reaching the halfword at -2($a3). A struct collapses to 1 IV but anchors at the struct base (+0xa) not +0xc; raw byte+halfword RMW never combines. Same combine_givs-refuses-halfword-RMW wall as sibling func_80177AD4 (§20, stubbed). Floor 33-off; not source-steerable (combine runs pre-regalloc, pins/order don't move it). | `.run/backlog_drafts/func_801778A8.c` | +| 60 | func_80176144 | 134 | regalloc-order | 53 | near | 50 | none — MATCH | `.run/backlog_drafts/func_80176144.c` | +| 61 | func_8016163C | 134 | plumbing | 78 | near | 50 | none — MATCH (78 ins). First arm calls func_801599A4 with NO arg (asm nop delay slot) via fn-ptr cast ((void(*)(void))func_801599A4)(). | `.run/backlog_drafts/func_8016163C.c` | +| 62 | func_8014F2E0 | 134 | schedule | 66 | near | 51 | §10 IV-init placement (piVar3 setup not sunk past loop guard) + store-vs-load (D_801150D8=0 schedules between the two arg-loads) — both CONFIRMED-unsteerable per cookbook §20; 11-off | `.run/backlog_drafts/func_8014F2E0.c` | +| 63 | func_80161774 | 134 | plumbing | 69 | near | 53 | none — MATCH (69 ins, match_one verified; clean nested-if; param_1 -> $s0 call-crossing) | `.run/backlog_drafts/func_80161774.c` | +| 64 | func_80176D94 | 134 | schedule | 152 | near | 63 | 63/152 — frame+prologue+4 calls+2x(801783D0/801777BC) MATCH (pins $s0=uVar2/$s2=param_2 + CSE-break barrier); residual is GIANT store-block caller-saved temp COLORING ($a2/$a3/$a0/$v1 vs target $t0/$t1/$t2/$a2) + micro-schedule (~70-ins straight line) + 4 delay-slot fills (li a1,4 vs s0-capture). structurally complete, count-exact → permuter/grinder territory. | `.run/backlog_drafts/func_80176D94.c` | +| 65 | func_80177940 | 134 | iv-combine | 101 | near | 65 | prologue+setup (35 ins) byte-match exactly; loop body diverges on gcc loop-invariant hoist ORDERING (scheduler tie-break), the conditional 0x74808080 recompute-vs-hoist, and the tail IV final-value double-move (addu s3,a0,zero; addu v0,s3,zero) + pd+=5 increment placement -- same loop-IV-combine class S20 flags as stub for sibling func_80177AD4. | `.run/backlog_drafts/func_80177940.c` | +| 66 | func_801770E0 | 134 | schedule | 152 | near | 66 | instr-count exact (152); residual = straight-line back-half scheduling + const temp-reg allocation ($t0/$t1/$t2 vs $v1/$a2/$a3) + a 2-ins prologue save-vs-sll swap. register pins ($s2/$s1/$s0) + CSE-break barrier are load-bearing (without pins 133+); permuter blocked by the register __asm__ pins (§10/§17 hard tail). | `.run/backlog_drafts/func_801770E0.c` | +| 67 | func_8014DD8C | 134 | WAVE | 108 | near | 83 | WAVE: 83 mismatch | `.run/backlog_drafts/func_8014DD8C.c` | +| 68 | func_80148094 | 134 | regalloc-order | 213 | near | 107 | ~39/213 residual (LCS), all in the sVar1>=0x201 clamp blocks: $v0/$v1 mflo regalloc swap + coupled branch-polarity/join-placement (bnez<->beqz) + 2 delay-slot fills (addiu s1,v0,0x400 into 80013F3C slot; sll s1,16 in-place into 2nd ratan2 slot) + early_ret a2-vs-s5 -> permuter/grinder territory | `.run/backlog_drafts/func_80148094.c` | +| 69 | func_8014EA4C | 134 | loop-guard | 183 | near | 142 | body byte-identical; residual is the §20 IV-final-value loop guard — target emits an | `.run/backlog_drafts/func_8014EA4C.c` | +| 70 | func_801412A8 | 134 | regalloc-order | 198 | near | 154 | 154-mismatch near-miss (198/198 ins, structure+branches exact). Two irreducible gcc residuals: (1) HEAD: held &D_800B9A02 ptr must be init-at-decl to stay in a reg across all 4 prims (correct 198-ins), but that forces gcc to materialize the address at fn entry (2 ins before the branches) vs target's in-body materialization -> shifts the head regalloc cascade; in-body assign re-materializes per-use (172 ins, wrong count) even with the $9 pin. (2) BODY: gcc OFFSET-FOLDS the 4x-unrolled prim stores (p[0..3], p+=4 -> sw at 16/20/24/28 from a fixed base) instead of ADVANCING $t6 (addiu $t6,0x10; sw at 0/4/8/12) like the target; no C form (post-inc, char* advance, =r/0 barrier, r-only barrier) triggers the register-advance. Pins landed p1->$t6/uVar4->$t0/iVar1->$a0/pidx->$t1 (head 0-1,8,14,16-19 exact). | `.run/backlog_drafts/func_801412A8.c` | +| 71 | func_801571C4 | 134 | schedule | 198 | near | 183 | prologue instruction SCHEDULE + frame-layout residual. Body + loop are byte-exact and | `.run/backlog_drafts/func_801571C4.c` | +| 72 | func_8014EE14 | 134 | schedule | 248 | near | 205 | body structurally matched (97 reloc-masked, mostly +1-offset branch artifacts). 3 real residuals, | `.run/backlog_drafts/func_8014EE14.c` | +| 73 | func_801705C0 | 134 | WAVE | 14 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801705C0.c` | +| 74 | func_8016B91C | 134 | WAVE | 18 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8016B91C.c` | +| 75 | func_80156600 | 134 | other | 18 | failed | | none — MATCH (simple counted scan, do-while form per Ghidra-C) | `.run/backlog_drafts/func_80156600.c` | +| 76 | func_801718AC | 134 | WAVE | 22 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801718AC.c` | +| 77 | func_80168B70 | 134 | WAVE | 27 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80168B70.c` | +| 78 | func_801494CC | 134 | WAVE | 30 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801494CC.c` | +| 79 | func_801708B0 | 134 | WAVE | 30 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801708B0.c` | +| 80 | func_80170CF0 | 134 | schedule | 30 | failed | | 4-ins PROLOGUE-ORDER residual (body insns 4-29 byte-identical). My cc1 hoists the funcptr lui/lw ABOVE the frame setup (lui,lw,addiu sp,sw s0); target keeps frame setup first (addiu sp,sw s0,lui,lw). Same prologue-order class as func_80177F84 (cookbook L1332) — no C lever found (intermediate var/cast/void*-vs-funcptr/pin/early-ptr all reproduce the hoist; barriers/empty-asm/volatile-local regress). KEY WIN: `case 0: break;` forces emit_case_nodes' slti<2;bnez→default lower-bound prune, exactly matching the target dispatch tree (a bare 2-case switch omits it). | `.run/backlog_drafts/func_80170CF0.c` | +| 81 | func_80149450 | 134 | WAVE | 31 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80149450.c` | +| 82 | func_80149F2C | 134 | WAVE | 31 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80149F2C.c` | +| 83 | func_80152C80 | 134 | plumbing | 41 | failed | | none — MATCH expected (linear call/store sequence, no regalloc tension) | `.run/backlog_drafts/func_80152C80.c` | +| 84 | func_8014C1C8 | 134 | regalloc-order | 44 | failed | | none — MATCH (match_one 44/44 ins, relocation-masked) | `.run/backlog_drafts/func_8014C1C8.c` | +| 85 | func_80146750 | 134 | regalloc-order | 47 | failed | | none — MATCH (match_one 47/47; psVar4->$a3 / psVar3->$v1 pins forced the init order) | `.run/backlog_drafts/func_80146750.c` | +| 86 | func_8014680C | 134 | struct | 47 | failed | | none — MATCH (47 ins, relocation-masked) | `.run/backlog_drafts/func_8014680C.c` | +| 87 | func_8014C4AC | 134 | other | 47 | failed | | none — MATCH (shared-ret0 goto §16 flips final branch polarity + schedules ret=0 into delay slot; memcpy(t0+0x7C,a3,8) inlines the lwl/lwr/swl/swr 8-byte block §21; param_1 = unsigned short* for the lhu reads) | `.run/backlog_drafts/func_8014C4AC.c` | +| 88 | func_80151B98 | 134 | regalloc-order | 47 | failed | | none — MATCH | `.run/backlog_drafts/func_80151B98.c` | +| 89 | func_80147F78 | 134 | schedule | 48 | failed | | TWO residuals remain. (1) FRAME: target frame is 0x60 = exactly 64 bytes (16 words) of LIVE local vars on top of the 4 saved regs (s0,s1,s2,ra) + 0x10 arg area; my body has no locals so frame is 0x20. Reproducing 64B of live local needs an address-escaped local buffer, but the target has only the 3 visible jals (no 4th call to receive &buf), so I cannot make a 16-word local survive -O2 dead-store-elim without emitting an extra instruction. (2) RELOAD SCHEDULE: target reloads D_80127090/94/98 from memory (folded lui%hi;lw%lo) with the FIRST reload HOISTED up between store90 and store94 (free non-volatile scheduling); a "memory" clobber barrier (below) forces the folded reloads but pins them strictly AFTER all three stores. The natural source is almost certainly a 16-word local buffer that ALIASES the globals (non-volatile reloads, freely scheduled) — same construct that also explains the 0x60 frame. Closest faithful body kept below; folded reload bytes are correct, frame + hoist are the gap. | `.run/backlog_drafts/func_80147F78.c` | +| 90 | func_80151C54 | 134 | plumbing | 52 | failed | | none — MATCH (52 ins). Branch-polarity §3-T4: BD60 arm is fall-through (if !=1 && ==0x11), BC44 is else. | `.run/backlog_drafts/func_80151C54.c` | +| 91 | func_8017129C | 134 | struct | 58 | failed | | none — MATCH (58 ins); three aligned 16-byte block-copies via struct assignment (cookbook §21) | `.run/backlog_drafts/func_8017129C.c` | +| 92 | func_80173A60 | 134 | regalloc-order | 59 | failed | | none — MATCH (59 ins) | `.run/backlog_drafts/func_80173A60.c` | +| 93 | func_8014A738 | 134 | regalloc-order | 62 | failed | | none — MATCH | `.run/backlog_drafts/func_8014A738.c` | +| 94 | func_80175308 | 134 | struct | 67 | failed | | none — MATCH (67 ins, relocation-masked) | `.run/backlog_drafts/func_80175308.c` | +| 95 | func_8014D610 | 134 | plumbing | 74 | failed | | none — MATCH (74 ins). for-loop + continue, single IV pointer p; gcc derives the $s0 = p+0x75 second induction var. Template: DEFINE_func_80163950 (sibling, same D_801202A0 loop + func_80135A4C). | `.run/backlog_drafts/func_8014D610.c` | +| 96 | func_80163534 | 134 | schedule | 76 | failed | | mismatch=13, a single 1-position scheduling tie. Instrs 1-30 byte-perfect; all registers correct | `.run/backlog_drafts/func_80163534.c` | +| 97 | func_8014CF04 | 134 | struct | 82 | failed | | none — MATCH (82 ins; array-of-struct scan, for-loop over Ent D_801202A0[96], stride 0x10C) | `.run/backlog_drafts/func_8014CF04.c` | +| 98 | func_80156670 | 134 | schedule | 83 | failed | | none — MATCH (83 ins). Key: hoist `iVar1 = uVar3*4;` as its OWN statement before the if so gcc schedules `sll v1,s1,2` into the bnez delay slot (computed unconditionally) and reuses v1 index-first (`iVar1 + (s32)&D_801150E0` → `addu v0,v1,v0`). 13-arg call to func_80157158 (a0-a3 + 9 stack args at 0x10..0x30); param_2/param_3 cast (u16) → andi; param_6 incoming as lhu(u16). Address args = integer math `iVar2 + (s32)&D_x` (index-first → lui;addiu;addu, index added first). | `.run/backlog_drafts/func_80156670.c` | +| 99 | func_8014D4C0 | 134 | schedule | 84 | failed | | none — MATCH (goto forces if-body out-of-line/last; `>=` fixes slt operand order) | `.run/backlog_drafts/func_8014D4C0.c` | +| 100 | func_8016A73C | 134 | struct | 85 | failed | | none — MATCH (85 ins, relocation-masked) | `.run/backlog_drafts/func_8016A73C.c` | +| 101 | func_80173CB4 | 134 | schedule | 90 | failed | | none — MATCH (switch form keeps cases unmerged; final block: reuse one temp for the D_8012750C test + the func_8013767C result -> $a0 alloc; invert if to !=0 for branch polarity + store order) | `.run/backlog_drafts/func_80173CB4.c` | +| 102 | func_8014C6F4 | 134 | regalloc-order | 91 | failed | | 19-off loop tie-break — target compiles the search as a while/for (pre-guard sltu;beqz present) with the found pointer snapshotted to $v0 split from the IV in $a0 and the +4 sunk into both call-arg delay slots; do-while is instruction-count-exact (91=91) but lacks the pre-guard, while every for/while form costs +4 ins (merge stays in $a0). §10 schedule/regalloc residual. | `.run/backlog_drafts/func_8014C6F4.c` | +| 103 | func_8014D12C | 134 | schedule | 93 | failed | | none — MATCH (93 ins). Block-order lever: success-continuation (return 1) | `.run/backlog_drafts/func_8014D12C.c` | +| 104 | func_801502EC | 134 | schedule | 93 | failed | | none — MATCH (93 ins). 8-byte block copy via alignment-1 struct (Blk8{u8 b[8]}) assignment reproduces the lwl/lwr/swl/swr; ret=0 hoisted before the block copy to fix the s3-vs-ra prologue save order. | `.run/backlog_drafts/func_801502EC.c` | +| 105 | func_80150170 | 134 | struct | 95 | failed | | none — MATCH (95/95). Keys: (1) two parallel 3-halfword groups via chained assign `sp10.x = sp18.x = v` (sp18 inner so 0x18 stores first); (2) align-1 blk8 struct copy for the lwl/lwr/swl/swr 8-byte copy into actor+0x80 (src = sp buf from func_801502EC, or u8[] D_801152A8); (3) f0/f2 = u16 (lhu), f1 = s16 (lh for the slt); (4) `(iVar5/iVar6)!=0` single-OR test + branch-polarity invert (not-both-zero is fall-through); (5) both-zero tail register pins: 0x7fff -> $v1 (`register s32 __asm__("$3")`), sp10.f0/f2 -> reused $a0 (`register u32 __asm__("$4")` written twice) to force gcc's hoist-load + reg reuse schedule. | `.run/backlog_drafts/func_80150170.c` | +| 106 | func_8014CD80 | 134 | regalloc-order | 97 | failed | | none — MATCH (97 ins). iVar3 pinned to $v1 (register __asm__("$3")) so | `.run/backlog_drafts/func_8014CD80.c` | +| 107 | func_8014E284 | 134 | WAVE | 108 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8014E284.c` | +| 108 | func_80167540 | 134 | WAVE | 117 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80167540.c` | +| 109 | func_8014F4C0 | 134 | WAVE | 141 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8014F4C0.c` | +| 110 | func_8014E048 | 134 | WAVE | 143 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8014E048.c` | +| 111 | func_80155800 | 134 | WAVE | 145 | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80155800.c` | +| 112 | func_80144090 | 134 | schedule | 154 | failed | | corner-block store/CSE schedule — gcc groups P+2/P-2 (share s>>6) vs target alternates P+2,P+4,P-2,P+0; plus otz*4 (sll $a0,$s5,2) scheduled late not into the D_800B9A02-load delay slot. Structure/regalloc all match (pins+array-of-struct %lo-fold+branch-polarity+mult-grouping landed; 144->52). Residual is §10 schedule tie-break, not source-steerable. | `.run/backlog_drafts/func_80144090.c` | +| 113 | func_8014F74C | 134 | other | 174 | failed | | none — MATCH (174 ins). Keys: sibling func_8014FA70 template; in/out/sp20 u8[8] short-trio bufs (lwl/lwr/swl/swr unaligned copies); load each a0 field once into b0/b1/b2 (stored to both sp20+out, reused in the 0x146-add block); 3-way memcpy branch on s1 (0x2000->D_801152A8, 0x4000->D_801152B0, else->D_800D3918); goto-form cmp-chain; final `""::: "memory"` barrier blocks gcc store-flag fold of (in4==out4)<<15 back to a branch | `.run/backlog_drafts/func_8014F74C.c` | +| 114 | func_80156B74 | 134 | struct | 214 | failed | | none — MATCH | `.run/backlog_drafts/func_80156B74.c` | +| 115 | func_80144B9C | 134 | other | 770 | failed | | -O0 cluster fn (prologue 21F0A003, fp-frame, all locals spilled+reloaded, load-delay nops). match_one compiles -O2 so it CANNOT match this; needs its own per-file -O0 split (Makefile CC1FLAGS:=-O0), like ov_SC01_077_o0.c. Body below is the faithful -O0 source; gate via whole-binary -O0 build only. | `.run/backlog_drafts/func_80144B9C.c` | diff --git a/docs/matching-cookbook.md b/docs/matching-cookbook.md index 1329ccdfc..5db271870 100644 --- a/docs/matching-cookbook.md +++ b/docs/matching-cookbook.md @@ -1487,6 +1487,33 @@ byte-matched evidence fn. (Pins/array-decay/statement-order/shared-ret0/for-vs-d emitted code at -O2. Size N×4 picks the frame: 1–2 words → 8, 3–4 → 0x10. (This is the INDUCE direction; §5's phantom-frame note is the REMOVE direction where gcc *adds* a frame the target lacks.) *evidence func_801758FC (0x10).* +> **⚠ CANDIDATE (unverified) — the next two bullets are from `func_801775E0`, a NEAR-MISS (closeness 2, NOT +> byte-banked)**, appended directly by a wave-13 drafter (that drafter→cookbook path is now blocked, `commit:0219`). +> They are plausible gcc-2.7.2 observations but were NOT confirmed by a byte-match. A drafter MAY try them — the +> byte-gate (G3/P9) is the sole arbiter, so a wrong idiom can never bank — but VERIFY before trusting. Drew to +> keep / refine / drop. + +- **`lbu` value with SIGNED compares (`bltz` + `slti`, NOT `sltu`) → write each range bound as a SEPARATE `if (…) goto` + statement, never a chained `||`:** when the target loads a `u8` global with `lbu` (zero-extend → known 0..255) yet + the comparisons are signed (`bltz $v1`; `slti $v0,$v1,K`) — including a provably-dead `bltz` on a 0..255 value — + gcc-2.7.2 has emitted the conditions as INDEPENDENT signed `slt` branches. A chained `if (v<0 || v>0xf6 || v<0xf3)` + CANONICALIZES: gcc proves `v<0` impossible (drops the `bltz`) and folds `v>0xf6 || v<0xf3` into the unsigned range + trick `sltu $2,$v1,247` / `addiu -0xf3; sltiu 4` (wrong: `sltu`, no `bltz`, fewer ins). Splitting into + `if (v==0) goto a; if (v<0) goto b; if (v>=0xf7) goto b; if (v<0xf3) goto c;` keeps each as its own signed `slt`+branch + (the `v<0` becomes a real `bltz`, the bounds become `slti`), reproducing the target exactly. The launder/barrier + tricks do NOT help (gcc re-derives the u8 range across an `__asm__` move); only the per-condition `if-goto` split does. + *fixes the unsigned-range-collapse → signed-separate-compare divergence; evidence func_801775E0 (`bltz;slti 0xF7;slti 0xF3`).* +- **shared join-block placement (call/store block reached by ≥2 paths) is steered by which exit the LAST range test + BRANCHES to vs FALLS THROUGH:** gcc-2.7.2's jump pass lays the join block (e.g. a `jal` reached by both an early + `beq` and the range-chain fall-through) right after whichever predecessor it processes to fall through. Writing the + chain's terminal as `if (v>=K) goto join;` (branch TO the join) puts the join AFTER the sibling block (matches a target + whose join sits between the early-eq block and the tail); writing `if (v=0xf3)goto call` form gives correct [chain][eq-block][call][else] layout but leaves + the terminal as `beqz→call` where the target has `bnez→.L674`; the negative form flips to a 50-mismatch layout).* + ### §22 — DEF-side loose-typing recovery + grinder blacklist (Phase 21) The wide **self-MATCH → whole-binary-gate gap** (a draft that `match_one`-MATCHes but the gate rejects) is dominated diff --git a/docs/progress.fleet.md b/docs/progress.fleet.md index 098f74d8f..d0856c710 100644 --- a/docs/progress.fleet.md +++ b/docs/progress.fleet.md @@ -3,148 +3,148 @@ # source-derived (committed src/*.c + config/dedup.us.yaml). Live byte gate: `make check-all`; # cross-binary collapsible-byte leverage: docs/duplicates.cross.md. -FLEET REAL substantive : 207946 (of which dedup-shared 207442 via 1560 groups / 207486 instances) +FLEET REAL substantive : 208751 (of which dedup-shared 208246 via 1566 groups / 208290 instances) FLEET LINKED PsyQ objs : 959 -FLEET byte-identical : 209593 / 344010 = 60.93% (REAL+LINKED+empties) +FLEET byte-identical : 210398 / 344010 = 61.16% (REAL+LINKED+empties) FLEET NON_MATCHING : 7 (0 in any default build — G4) -FLEET INCLUDE_ASM stubs : 134410 +FLEET INCLUDE_ASM stubs : 133605 FLEET matchable : 344010 | binary | REAL | shared | LINKED | byte-ident | matchable | byte-ident % | |---|---:|---:|---:|---:|---:|---:| | main | 54 | 2 | 959 | 1055 | 2096 | 50.3% | | resident | 123 | 0 | 0 | 125 | 146 | 85.6% | -| ov_SC01_000 | 1552 | 1552 | 0 | 1552 | 2403 | 64.6% | -| ov_SC01_001 | 1552 | 1552 | 0 | 1554 | 2467 | 63.0% | -| ov_SC01_004 | 1544 | 1544 | 0 | 1545 | 2416 | 63.9% | -| ov_SC01_005 | 1551 | 1551 | 0 | 1558 | 2504 | 62.2% | -| ov_SC01_006 | 1551 | 1551 | 0 | 1558 | 2504 | 62.2% | -| ov_SC01_008 | 1544 | 1544 | 0 | 1546 | 2428 | 63.7% | -| ov_SC01_009 | 1544 | 1544 | 0 | 1545 | 2510 | 61.6% | -| ov_SC01_074 | 1544 | 1544 | 0 | 1546 | 2427 | 63.7% | -| ov_SC01_077 | 1841 | 1512 | 0 | 1843 | 2586 | 71.3% | -| ov_SC01_080 | 1548 | 1548 | 0 | 1548 | 2515 | 61.6% | -| ov_SC01_084 | 1548 | 1548 | 0 | 1553 | 2581 | 60.2% | -| ov_SC02_000 | 1552 | 1552 | 0 | 1559 | 2684 | 58.1% | -| ov_SC02_003 | 1552 | 1552 | 0 | 1559 | 2684 | 58.1% | -| ov_SC02_004 | 1548 | 1548 | 0 | 1548 | 2403 | 64.4% | -| ov_SC02_005 | 1544 | 1544 | 0 | 1554 | 2930 | 53.0% | -| ov_SC02_011 | 1550 | 1550 | 0 | 1562 | 2896 | 53.9% | -| ov_SC02_015 | 1550 | 1550 | 0 | 1550 | 2416 | 64.2% | -| ov_SC02_016 | 1550 | 1550 | 0 | 1553 | 2548 | 60.9% | -| ov_SC02_017 | 1550 | 1550 | 0 | 1558 | 2735 | 57.0% | -| ov_SC02_021 | 1550 | 1550 | 0 | 1550 | 2439 | 63.6% | -| ov_SC02_026 | 1548 | 1548 | 0 | 1554 | 2575 | 60.3% | -| ov_SC02_027 | 1548 | 1548 | 0 | 1557 | 2695 | 57.8% | -| ov_SC02_028 | 1548 | 1548 | 0 | 1558 | 2704 | 57.6% | -| ov_SC02_031 | 1548 | 1548 | 0 | 1554 | 2565 | 60.6% | -| ov_SC02_035 | 1548 | 1548 | 0 | 1551 | 2523 | 61.5% | -| ov_SC02_039 | 1548 | 1548 | 0 | 1548 | 2418 | 64.0% | -| ov_SC02_041 | 1548 | 1548 | 0 | 1551 | 2563 | 60.5% | -| ov_SC03_001 | 1548 | 1548 | 0 | 1566 | 2870 | 54.6% | -| ov_SC03_002 | 1552 | 1552 | 0 | 1568 | 2632 | 59.6% | -| ov_SC03_003 | 1548 | 1548 | 0 | 1549 | 2425 | 63.9% | -| ov_SC03_006 | 1554 | 1554 | 0 | 1563 | 2768 | 56.5% | -| ov_SC03_007 | 1548 | 1548 | 0 | 1552 | 2626 | 59.1% | -| ov_SC03_010 | 1548 | 1548 | 0 | 1548 | 2472 | 62.6% | -| ov_SC03_011 | 1548 | 1548 | 0 | 1554 | 2530 | 61.4% | -| ov_SC03_012 | 1548 | 1548 | 0 | 1549 | 2408 | 64.3% | -| ov_SC03_013 | 1548 | 1548 | 0 | 1548 | 2495 | 62.0% | -| ov_SC03_014 | 1548 | 1548 | 0 | 1558 | 2688 | 58.0% | -| ov_SC03_015 | 1548 | 1548 | 0 | 1558 | 2688 | 58.0% | -| ov_SC03_023 | 1548 | 1548 | 0 | 1549 | 2437 | 63.6% | -| ov_SC03_024 | 1548 | 1548 | 0 | 1560 | 2644 | 59.0% | -| ov_SC03_028 | 1548 | 1548 | 0 | 1552 | 2667 | 58.2% | -| ov_SC03_029 | 1550 | 1550 | 0 | 1560 | 2647 | 58.9% | -| ov_SC03_030 | 1552 | 1552 | 0 | 1554 | 2498 | 62.2% | -| ov_SC03_031 | 1548 | 1548 | 0 | 1552 | 2517 | 61.7% | -| ov_SC03_089 | 1548 | 1548 | 0 | 1555 | 2584 | 60.2% | -| ov_SC03_090 | 1548 | 1548 | 0 | 1556 | 2628 | 59.2% | -| ov_SC03_091 | 1548 | 1548 | 0 | 1556 | 2643 | 58.9% | -| ov_SC03_092 | 1548 | 1548 | 0 | 1560 | 2590 | 60.2% | -| ov_SC03_093 | 1548 | 1548 | 0 | 1552 | 2566 | 60.5% | -| ov_SC03_094 | 1548 | 1548 | 0 | 1554 | 2579 | 60.3% | -| ov_SC03_095 | 1548 | 1548 | 0 | 1551 | 2477 | 62.6% | -| ov_SC03_096 | 1548 | 1548 | 0 | 1551 | 2468 | 62.8% | -| ov_SC03_097 | 1548 | 1548 | 0 | 1555 | 2606 | 59.7% | -| ov_SC03_098 | 1548 | 1548 | 0 | 1551 | 2544 | 61.0% | -| ov_SC03_099 | 1548 | 1548 | 0 | 1551 | 2507 | 61.9% | -| ov_SC03_100 | 1548 | 1548 | 0 | 1552 | 2542 | 61.1% | -| ov_SC03_101 | 1548 | 1548 | 0 | 1552 | 2531 | 61.3% | -| ov_SC03_102 | 1548 | 1548 | 0 | 1551 | 2495 | 62.2% | -| ov_SC03_103 | 1550 | 1550 | 0 | 1553 | 2513 | 61.8% | -| ov_SC03_104 | 1548 | 1548 | 0 | 1555 | 2619 | 59.4% | -| ov_SC03_105 | 1548 | 1548 | 0 | 1555 | 2600 | 59.8% | -| ov_SC03_108 | 1548 | 1548 | 0 | 1548 | 2446 | 63.3% | -| ov_SC03_109 | 1548 | 1548 | 0 | 1550 | 2426 | 63.9% | -| ov_SC03_110 | 1548 | 1548 | 0 | 1548 | 2471 | 62.6% | -| ov_SC03_111 | 1548 | 1548 | 0 | 1551 | 2513 | 61.7% | -| ov_SC03_112 | 1550 | 1550 | 0 | 1552 | 2529 | 61.4% | -| ov_SC03_113 | 1550 | 1550 | 0 | 1553 | 2471 | 62.8% | -| ov_SC03_114 | 1548 | 1548 | 0 | 1550 | 2417 | 64.1% | -| ov_SC03_115 | 1548 | 1548 | 0 | 1550 | 2475 | 62.6% | -| ov_SC03_116 | 1548 | 1548 | 0 | 1551 | 2441 | 63.5% | -| ov_SC03_117 | 1548 | 1548 | 0 | 1554 | 2560 | 60.7% | -| ov_SC03_118 | 1548 | 1548 | 0 | 1561 | 2688 | 58.1% | -| ov_SC03_119 | 1548 | 1548 | 0 | 1561 | 2688 | 58.1% | -| ov_SC03_121 | 1548 | 1548 | 0 | 1551 | 2462 | 63.0% | -| ov_SC03_124 | 1544 | 1544 | 0 | 1564 | 2744 | 57.0% | -| ov_SC03_125 | 1548 | 1548 | 0 | 1560 | 2591 | 60.2% | -| ov_SC03_126 | 1548 | 1548 | 0 | 1549 | 2425 | 63.9% | -| ov_SC04_000 | 1552 | 1552 | 0 | 1561 | 2547 | 61.3% | -| ov_SC04_002 | 1548 | 1548 | 0 | 1552 | 2639 | 58.8% | -| ov_SC04_003 | 1548 | 1548 | 0 | 1552 | 2505 | 62.0% | -| ov_SC04_004 | 1548 | 1548 | 0 | 1550 | 2561 | 60.5% | -| ov_SC04_005 | 1548 | 1548 | 0 | 1554 | 2615 | 59.4% | -| ov_SC04_006 | 1548 | 1548 | 0 | 1550 | 2456 | 63.1% | -| ov_SC04_007 | 1548 | 1548 | 0 | 1552 | 2572 | 60.3% | -| ov_SC04_008 | 1548 | 1548 | 0 | 1548 | 2417 | 64.0% | -| ov_SC04_009 | 1548 | 1548 | 0 | 1551 | 2443 | 63.5% | -| ov_SC04_010 | 1548 | 1548 | 0 | 1549 | 2421 | 64.0% | -| ov_SC04_011 | 1548 | 1548 | 0 | 1554 | 2806 | 55.4% | -| ov_SC04_012 | 1548 | 1548 | 0 | 1549 | 2422 | 64.0% | -| ov_SC04_015 | 1548 | 1548 | 0 | 1560 | 2614 | 59.7% | -| ov_SC04_016 | 1548 | 1548 | 0 | 1550 | 2442 | 63.5% | -| ov_SC04_018 | 1548 | 1548 | 0 | 1561 | 2858 | 54.6% | -| ov_SC04_019 | 1548 | 1548 | 0 | 1561 | 2858 | 54.6% | -| ov_SC04_020 | 1548 | 1548 | 0 | 1560 | 2570 | 60.7% | -| ov_SC04_021 | 1548 | 1548 | 0 | 1549 | 2425 | 63.9% | -| ov_SC05_000 | 1552 | 1552 | 0 | 1555 | 2422 | 64.2% | -| ov_SC05_001 | 1548 | 1548 | 0 | 1553 | 2577 | 60.3% | -| ov_SC05_002 | 1548 | 1548 | 0 | 1551 | 2445 | 63.4% | -| ov_SC05_003 | 1548 | 1548 | 0 | 1549 | 2484 | 62.4% | -| ov_SC05_004 | 1548 | 1548 | 0 | 1550 | 2467 | 62.8% | -| ov_SC05_005 | 1548 | 1548 | 0 | 1549 | 2494 | 62.1% | -| ov_SC05_006 | 1548 | 1548 | 0 | 1548 | 2432 | 63.7% | -| ov_SC05_007 | 1548 | 1548 | 0 | 1553 | 2485 | 62.5% | -| ov_SC05_008 | 1548 | 1548 | 0 | 1550 | 2546 | 60.9% | -| ov_SC05_009 | 1548 | 1548 | 0 | 1552 | 2440 | 63.6% | -| ov_SC05_010 | 1548 | 1548 | 0 | 1552 | 2591 | 59.9% | -| ov_SC05_011 | 1548 | 1548 | 0 | 1549 | 2411 | 64.2% | -| ov_SC05_017 | 1544 | 1544 | 0 | 1556 | 2845 | 54.7% | -| ov_SC05_018 | 1548 | 1548 | 0 | 1561 | 2676 | 58.3% | -| ov_SC05_019 | 1548 | 1548 | 0 | 1549 | 2425 | 63.9% | -| ov_SC06_000 | 1552 | 1552 | 0 | 1560 | 2692 | 57.9% | -| ov_SC06_006 | 1548 | 1548 | 0 | 1549 | 2514 | 61.6% | -| ov_SC06_008 | 1550 | 1550 | 0 | 1556 | 2544 | 61.2% | -| ov_SC06_010 | 1548 | 1548 | 0 | 1553 | 2520 | 61.6% | -| ov_SC06_011 | 1548 | 1548 | 0 | 1552 | 2471 | 62.8% | -| ov_SC06_013 | 1548 | 1548 | 0 | 1549 | 2427 | 63.8% | -| ov_SC06_014 | 1548 | 1548 | 0 | 1550 | 2455 | 63.1% | -| ov_SC06_015 | 1548 | 1548 | 0 | 1548 | 2423 | 63.9% | -| ov_SC06_016 | 1548 | 1548 | 0 | 1550 | 2552 | 60.7% | -| ov_SC06_018 | 1548 | 1548 | 0 | 1556 | 2668 | 58.3% | -| ov_SC06_020 | 1548 | 1548 | 0 | 1549 | 2521 | 61.4% | -| ov_SC06_022 | 1548 | 1548 | 0 | 1556 | 2645 | 58.8% | -| ov_SC06_024 | 1548 | 1548 | 0 | 1554 | 2670 | 58.2% | -| ov_SC06_025 | 1548 | 1548 | 0 | 1553 | 2575 | 60.3% | -| ov_SC06_027 | 1548 | 1548 | 0 | 1549 | 2410 | 64.3% | -| ov_SC06_029 | 1548 | 1548 | 0 | 1560 | 2665 | 58.5% | -| ov_SC06_030 | 1548 | 1548 | 0 | 1548 | 2459 | 63.0% | -| ov_SC06_032 | 1548 | 1548 | 0 | 1555 | 2661 | 58.4% | -| ov_SC06_033 | 1548 | 1548 | 0 | 1555 | 2634 | 59.0% | -| ov_SC07_000 | 1552 | 1552 | 0 | 1554 | 2522 | 61.6% | -| ov_SC07_001 | 1548 | 1548 | 0 | 1550 | 2457 | 63.1% | -| ov_SC07_002 | 1548 | 1548 | 0 | 1552 | 2582 | 60.1% | -| ov_SC07_008 | 1548 | 1548 | 0 | 1548 | 2388 | 64.8% | -| ov_SC07_009 | 1548 | 1548 | 0 | 1550 | 2432 | 63.7% | +| ov_SC01_000 | 1558 | 1558 | 0 | 1558 | 2403 | 64.8% | +| ov_SC01_001 | 1558 | 1558 | 0 | 1560 | 2467 | 63.2% | +| ov_SC01_004 | 1550 | 1550 | 0 | 1551 | 2416 | 64.2% | +| ov_SC01_005 | 1557 | 1557 | 0 | 1564 | 2504 | 62.5% | +| ov_SC01_006 | 1557 | 1557 | 0 | 1564 | 2504 | 62.5% | +| ov_SC01_008 | 1550 | 1550 | 0 | 1552 | 2428 | 63.9% | +| ov_SC01_009 | 1550 | 1550 | 0 | 1551 | 2510 | 61.8% | +| ov_SC01_074 | 1550 | 1550 | 0 | 1552 | 2427 | 63.9% | +| ov_SC01_077 | 1848 | 1518 | 0 | 1850 | 2586 | 71.5% | +| ov_SC01_080 | 1554 | 1554 | 0 | 1554 | 2515 | 61.8% | +| ov_SC01_084 | 1554 | 1554 | 0 | 1559 | 2581 | 60.4% | +| ov_SC02_000 | 1558 | 1558 | 0 | 1565 | 2684 | 58.3% | +| ov_SC02_003 | 1558 | 1558 | 0 | 1565 | 2684 | 58.3% | +| ov_SC02_004 | 1554 | 1554 | 0 | 1554 | 2403 | 64.7% | +| ov_SC02_005 | 1550 | 1550 | 0 | 1560 | 2930 | 53.2% | +| ov_SC02_011 | 1556 | 1556 | 0 | 1568 | 2896 | 54.1% | +| ov_SC02_015 | 1556 | 1556 | 0 | 1556 | 2416 | 64.4% | +| ov_SC02_016 | 1556 | 1556 | 0 | 1559 | 2548 | 61.2% | +| ov_SC02_017 | 1556 | 1556 | 0 | 1564 | 2735 | 57.2% | +| ov_SC02_021 | 1556 | 1556 | 0 | 1556 | 2439 | 63.8% | +| ov_SC02_026 | 1554 | 1554 | 0 | 1560 | 2575 | 60.6% | +| ov_SC02_027 | 1554 | 1554 | 0 | 1563 | 2695 | 58.0% | +| ov_SC02_028 | 1554 | 1554 | 0 | 1564 | 2704 | 57.8% | +| ov_SC02_031 | 1554 | 1554 | 0 | 1560 | 2565 | 60.8% | +| ov_SC02_035 | 1554 | 1554 | 0 | 1557 | 2523 | 61.7% | +| ov_SC02_039 | 1554 | 1554 | 0 | 1554 | 2418 | 64.3% | +| ov_SC02_041 | 1554 | 1554 | 0 | 1557 | 2563 | 60.7% | +| ov_SC03_001 | 1554 | 1554 | 0 | 1572 | 2870 | 54.8% | +| ov_SC03_002 | 1558 | 1558 | 0 | 1574 | 2632 | 59.8% | +| ov_SC03_003 | 1554 | 1554 | 0 | 1555 | 2425 | 64.1% | +| ov_SC03_006 | 1560 | 1560 | 0 | 1569 | 2768 | 56.7% | +| ov_SC03_007 | 1554 | 1554 | 0 | 1558 | 2626 | 59.3% | +| ov_SC03_010 | 1554 | 1554 | 0 | 1554 | 2472 | 62.9% | +| ov_SC03_011 | 1554 | 1554 | 0 | 1560 | 2530 | 61.7% | +| ov_SC03_012 | 1554 | 1554 | 0 | 1555 | 2408 | 64.6% | +| ov_SC03_013 | 1554 | 1554 | 0 | 1554 | 2495 | 62.3% | +| ov_SC03_014 | 1554 | 1554 | 0 | 1564 | 2688 | 58.2% | +| ov_SC03_015 | 1554 | 1554 | 0 | 1564 | 2688 | 58.2% | +| ov_SC03_023 | 1554 | 1554 | 0 | 1555 | 2437 | 63.8% | +| ov_SC03_024 | 1554 | 1554 | 0 | 1566 | 2644 | 59.2% | +| ov_SC03_028 | 1554 | 1554 | 0 | 1558 | 2667 | 58.4% | +| ov_SC03_029 | 1556 | 1556 | 0 | 1566 | 2647 | 59.2% | +| ov_SC03_030 | 1558 | 1558 | 0 | 1560 | 2498 | 62.4% | +| ov_SC03_031 | 1554 | 1554 | 0 | 1558 | 2517 | 61.9% | +| ov_SC03_089 | 1554 | 1554 | 0 | 1561 | 2584 | 60.4% | +| ov_SC03_090 | 1554 | 1554 | 0 | 1562 | 2628 | 59.4% | +| ov_SC03_091 | 1554 | 1554 | 0 | 1562 | 2643 | 59.1% | +| ov_SC03_092 | 1554 | 1554 | 0 | 1566 | 2590 | 60.5% | +| ov_SC03_093 | 1554 | 1554 | 0 | 1558 | 2566 | 60.7% | +| ov_SC03_094 | 1554 | 1554 | 0 | 1560 | 2579 | 60.5% | +| ov_SC03_095 | 1554 | 1554 | 0 | 1557 | 2477 | 62.9% | +| ov_SC03_096 | 1554 | 1554 | 0 | 1557 | 2468 | 63.1% | +| ov_SC03_097 | 1554 | 1554 | 0 | 1561 | 2606 | 59.9% | +| ov_SC03_098 | 1554 | 1554 | 0 | 1557 | 2544 | 61.2% | +| ov_SC03_099 | 1554 | 1554 | 0 | 1557 | 2507 | 62.1% | +| ov_SC03_100 | 1554 | 1554 | 0 | 1558 | 2542 | 61.3% | +| ov_SC03_101 | 1554 | 1554 | 0 | 1558 | 2531 | 61.6% | +| ov_SC03_102 | 1554 | 1554 | 0 | 1557 | 2495 | 62.4% | +| ov_SC03_103 | 1556 | 1556 | 0 | 1559 | 2513 | 62.0% | +| ov_SC03_104 | 1554 | 1554 | 0 | 1561 | 2619 | 59.6% | +| ov_SC03_105 | 1554 | 1554 | 0 | 1561 | 2600 | 60.0% | +| ov_SC03_108 | 1554 | 1554 | 0 | 1554 | 2446 | 63.5% | +| ov_SC03_109 | 1554 | 1554 | 0 | 1556 | 2426 | 64.1% | +| ov_SC03_110 | 1554 | 1554 | 0 | 1554 | 2471 | 62.9% | +| ov_SC03_111 | 1554 | 1554 | 0 | 1557 | 2513 | 62.0% | +| ov_SC03_112 | 1556 | 1556 | 0 | 1558 | 2529 | 61.6% | +| ov_SC03_113 | 1556 | 1556 | 0 | 1559 | 2471 | 63.1% | +| ov_SC03_114 | 1554 | 1554 | 0 | 1556 | 2417 | 64.4% | +| ov_SC03_115 | 1554 | 1554 | 0 | 1556 | 2475 | 62.9% | +| ov_SC03_116 | 1554 | 1554 | 0 | 1557 | 2441 | 63.8% | +| ov_SC03_117 | 1554 | 1554 | 0 | 1560 | 2560 | 60.9% | +| ov_SC03_118 | 1554 | 1554 | 0 | 1567 | 2688 | 58.3% | +| ov_SC03_119 | 1554 | 1554 | 0 | 1567 | 2688 | 58.3% | +| ov_SC03_121 | 1554 | 1554 | 0 | 1557 | 2462 | 63.2% | +| ov_SC03_124 | 1550 | 1550 | 0 | 1570 | 2744 | 57.2% | +| ov_SC03_125 | 1554 | 1554 | 0 | 1566 | 2591 | 60.4% | +| ov_SC03_126 | 1554 | 1554 | 0 | 1555 | 2425 | 64.1% | +| ov_SC04_000 | 1558 | 1558 | 0 | 1567 | 2547 | 61.5% | +| ov_SC04_002 | 1554 | 1554 | 0 | 1558 | 2639 | 59.0% | +| ov_SC04_003 | 1554 | 1554 | 0 | 1558 | 2505 | 62.2% | +| ov_SC04_004 | 1554 | 1554 | 0 | 1556 | 2561 | 60.8% | +| ov_SC04_005 | 1554 | 1554 | 0 | 1560 | 2615 | 59.7% | +| ov_SC04_006 | 1554 | 1554 | 0 | 1556 | 2456 | 63.4% | +| ov_SC04_007 | 1554 | 1554 | 0 | 1558 | 2572 | 60.6% | +| ov_SC04_008 | 1554 | 1554 | 0 | 1554 | 2417 | 64.3% | +| ov_SC04_009 | 1554 | 1554 | 0 | 1557 | 2443 | 63.7% | +| ov_SC04_010 | 1554 | 1554 | 0 | 1555 | 2421 | 64.2% | +| ov_SC04_011 | 1554 | 1554 | 0 | 1560 | 2806 | 55.6% | +| ov_SC04_012 | 1554 | 1554 | 0 | 1555 | 2422 | 64.2% | +| ov_SC04_015 | 1554 | 1554 | 0 | 1566 | 2614 | 59.9% | +| ov_SC04_016 | 1554 | 1554 | 0 | 1556 | 2442 | 63.7% | +| ov_SC04_018 | 1554 | 1554 | 0 | 1567 | 2858 | 54.8% | +| ov_SC04_019 | 1554 | 1554 | 0 | 1567 | 2858 | 54.8% | +| ov_SC04_020 | 1554 | 1554 | 0 | 1566 | 2570 | 60.9% | +| ov_SC04_021 | 1554 | 1554 | 0 | 1555 | 2425 | 64.1% | +| ov_SC05_000 | 1558 | 1558 | 0 | 1561 | 2422 | 64.5% | +| ov_SC05_001 | 1554 | 1554 | 0 | 1559 | 2577 | 60.5% | +| ov_SC05_002 | 1554 | 1554 | 0 | 1557 | 2445 | 63.7% | +| ov_SC05_003 | 1554 | 1554 | 0 | 1555 | 2484 | 62.6% | +| ov_SC05_004 | 1554 | 1554 | 0 | 1556 | 2467 | 63.1% | +| ov_SC05_005 | 1554 | 1554 | 0 | 1555 | 2494 | 62.3% | +| ov_SC05_006 | 1554 | 1554 | 0 | 1554 | 2432 | 63.9% | +| ov_SC05_007 | 1554 | 1554 | 0 | 1559 | 2485 | 62.7% | +| ov_SC05_008 | 1554 | 1554 | 0 | 1556 | 2546 | 61.1% | +| ov_SC05_009 | 1554 | 1554 | 0 | 1558 | 2440 | 63.9% | +| ov_SC05_010 | 1554 | 1554 | 0 | 1558 | 2591 | 60.1% | +| ov_SC05_011 | 1554 | 1554 | 0 | 1555 | 2411 | 64.5% | +| ov_SC05_017 | 1550 | 1550 | 0 | 1562 | 2845 | 54.9% | +| ov_SC05_018 | 1554 | 1554 | 0 | 1567 | 2676 | 58.6% | +| ov_SC05_019 | 1554 | 1554 | 0 | 1555 | 2425 | 64.1% | +| ov_SC06_000 | 1558 | 1558 | 0 | 1566 | 2692 | 58.2% | +| ov_SC06_006 | 1554 | 1554 | 0 | 1555 | 2514 | 61.9% | +| ov_SC06_008 | 1556 | 1556 | 0 | 1562 | 2544 | 61.4% | +| ov_SC06_010 | 1554 | 1554 | 0 | 1559 | 2520 | 61.9% | +| ov_SC06_011 | 1554 | 1554 | 0 | 1558 | 2471 | 63.1% | +| ov_SC06_013 | 1554 | 1554 | 0 | 1555 | 2427 | 64.1% | +| ov_SC06_014 | 1554 | 1554 | 0 | 1556 | 2455 | 63.4% | +| ov_SC06_015 | 1554 | 1554 | 0 | 1554 | 2423 | 64.1% | +| ov_SC06_016 | 1554 | 1554 | 0 | 1556 | 2552 | 61.0% | +| ov_SC06_018 | 1554 | 1554 | 0 | 1562 | 2668 | 58.5% | +| ov_SC06_020 | 1554 | 1554 | 0 | 1555 | 2521 | 61.7% | +| ov_SC06_022 | 1554 | 1554 | 0 | 1562 | 2645 | 59.1% | +| ov_SC06_024 | 1554 | 1554 | 0 | 1560 | 2670 | 58.4% | +| ov_SC06_025 | 1554 | 1554 | 0 | 1559 | 2575 | 60.5% | +| ov_SC06_027 | 1554 | 1554 | 0 | 1555 | 2410 | 64.5% | +| ov_SC06_029 | 1554 | 1554 | 0 | 1566 | 2665 | 58.8% | +| ov_SC06_030 | 1554 | 1554 | 0 | 1554 | 2459 | 63.2% | +| ov_SC06_032 | 1554 | 1554 | 0 | 1561 | 2661 | 58.7% | +| ov_SC06_033 | 1554 | 1554 | 0 | 1561 | 2634 | 59.3% | +| ov_SC07_000 | 1558 | 1558 | 0 | 1560 | 2522 | 61.9% | +| ov_SC07_001 | 1554 | 1554 | 0 | 1556 | 2457 | 63.3% | +| ov_SC07_002 | 1554 | 1554 | 0 | 1558 | 2582 | 60.3% | +| ov_SC07_008 | 1554 | 1554 | 0 | 1554 | 2388 | 65.1% | +| ov_SC07_009 | 1554 | 1554 | 0 | 1556 | 2432 | 64.0% | diff --git a/phase-ends/CURRENT_PHASE.md b/phase-ends/CURRENT_PHASE.md index 03ec2ec38..ab9eeeb12 100644 --- a/phase-ends/CURRENT_PHASE.md +++ b/phase-ends/CURRENT_PHASE.md @@ -9,7 +9,58 @@ --- -## ★ CURRENT STATE & FRESH-SESSION RESUME — READ THIS FIRST (2026-06-22 07:40) +## ★★ REACH-1 HARVEST HANDOFF — READ THIS FIRST (2026-06-22, authoritative current state) + +> Everything below this section (the prior ×134 QUEUED-RUN block, TRIP HAND-OFF, POST-REBOOT, etc.) is a +> HISTORICAL session-layer kept for the trail. **THIS section is the current state + the fresh-session plan.** + +**Fleet ≈ 61.16% byte-identical** · 136/136 binaries byte-identical · 0 NON_MATCHING. +**Nothing running** — grinder STOPPED (Drew; `.run/auto/STOP` present), no worker wave in flight. Paused at a +clean, committed checkpoint (HEAD = the reach-1 handoff commit). Committed locally; **not pushed** (R6 — Drew pushes). + +**What this session did (×134 tail harvest → pivot):** +- Worker waves **13–16** on the cached reach-134 fuel: banked **+6** (incl. the 476-ins `func_80141CA4` ×134) + + 1 grinder bank; **fleet 60.93% → 61.16%**. Yield diminished 3→2→0→1: the reach-134 ≤150-ins cached fuel is + now **confirmed walls** (§20 IV-combine / LICM-hoist / schedule + DEF-side loose-typing; o0 pool empty; the + capped-7 = the Phase-16 loose-typing wall). Re-firing them is the poor-ROI anti-pattern (Drew agreed). +- **Guard committed (`commit:0219`):** worker drafters now write ONLY their draft `.c` — a wave-13 drafter had + appended UNVERIFIED near-miss idioms to the cookbook directly (distill owns the cookbook). See "Open for Drew". +- **PIVOT (Drew's call, gate-2 AskUserQuestion):** stop the reach-134 wall-waves + grinder; harvest the + **reach-1 (overlay-unique) fuel** instead — abundant, small, far less loose-typed → much higher crack rate. + +**★ THE REACH-1 FUEL IS BUILT + WIRED (this session's deliverable — ready for the fresh session):** +- **420 reach-1, region-main, draftable fns in `ov_SC01_077`, ALL cached** (298 prefetched this session via + headless `DecompileFunctions.java` → `.run/ghidra_c`: 298 ok / 0 fail / 0 no-func). Small: median 47 ins, + 185 ≤40, 251 ≤60, 330 ≤100. +- **`tools/wave_targets.py --pool reach1`** serves them **SMALLEST-FIRST** (new pool, committed). The + orchestrator's `POOLS` + `.run/auto/orch_state.json` are set to `reach1`, so **`prep --mode pool` serves it + out of the box**. Verified: prep → clean 24-target batch of 14–15-ins fns; asm + ghidra_c paths resolve. +- **Leverage = ×1** — overlay-unique, so they bank in `ov_SC01_077` only (dedup_propagate skips reach<2, no + ×134). But `ov_SC01_077` is the largest overlay → 420 small fns ≈ a real fleet chunk (plausibly **+1–3%**). + +**THE PLAN — smallest-first idiom-MINING harvest (Drew's design, agreed):** run the same loop on the `reach1` +pool, **distilling after EVERY wave** (this is idiom-mining, not just banking): the tiny fns one-shot for free +%, the small-medium (~30–80 ins) band surfaces fresh gcc idioms → distill → the cookbook grows → bigger reach-1 +fns one-shot, AND a new idiom occasionally cracks a reach-134 **wall** (×134 bonus, e.g. the Phase-18 pin idiom). + +**FRESH-SESSION CYCLE (Drew starts + controls pacing — full runbook: `docs/automation-runbook.md` §reach-1):** +1. `.venv/bin/python tools/orchestrator.py prep --mode pool --n 24` → reach1 smallest-first batch → `.run/auto/wave_batch.json`. +2. Read the batch; launch `tools/workflows/worker_wave.js` with `args={draftDir:".run/drafts-wave", targets:}`. +3. On completion: `.venv/bin/python tools/orchestrator.py finish --drafts .run/drafts-wave --commit` — **BACKGROUNDED + `dangerouslyDisableSandbox`** (foreground make build/git get sandbox-killed exit 144). Prints `{banked, near, verified, fleet_pct, …}`. +4. **Distill EVERY wave that has `verified` banks:** `tools/workflows/distill.js` `args={draftsDir:".run/drafts-wave", verified:}` (the idiom-mining step). +5. Loop (~17 waves for all 420). close-rate should stay HIGH (small fns) → the orchestrator won't rotate off `reach1`; if it ever does (close-rate <0.15 ×2 → rotates to tractable walls), re-route: set `pool":"reach1"` in `.run/auto/orch_state.json`. +6. **Optional token-free grinder** (parallel, permutes reach-1 near-misses): `rm -f .run/auto/STOP && DRIVER=tools/grinder.py setsid nohup bash tools/auto_supervisor.sh --permute-secs 120 -j 14 >/dev/null 2>&1 &` (dangerouslyDisableSandbox). **STOP all:** `bash tools/auto_stop.sh`. Live %: `make report`. + +**More fuel if 420 runs dry:** region `a` (65) + `o0` (8) reach-1 (excluded from the pool — different build paths +/ -O0 handling; add later); the deferred reach-134 walls + capped-7 (hand-finish backlog). + +**Open for Drew:** the uncommitted 2 §21 cookbook bullets are **CANDIDATE / unverified** (from near-miss +`func_801775E0`) — marked as such this session; keep/refine/drop. ("Don't start the waves" was this session's +instruction; the fresh session launches them.) + +--- + +## (SUPERSEDED by the REACH-1 HANDOFF above — historical trail) prior ×134 state (2026-06-22 07:40) > The dated sections lower down (TRIP HAND-OFF, POST-REBOOT RESUME, FRESH-SESSION RUN LIVE, SUSTAINED LOOP, > OPTION C) are HISTORICAL session-layers, kept for the trail. **This section is the authoritative current state.** diff --git a/tools/orchestrator.py b/tools/orchestrator.py index 968776686..6b503d1c7 100644 --- a/tools/orchestrator.py +++ b/tools/orchestrator.py @@ -28,7 +28,7 @@ REPO = os.path.dirname(os.path.dirname(os.path.abspath(__file__))) PY = ".venv/bin/python" STATE = os.path.join(REPO, ".run/auto/orch_state.json") BATCH = ".run/auto/wave_batch.json" -POOLS = ["tractable", "giants", "o0", "capped"] # ROI rotation order +POOLS = ["reach1", "tractable", "giants", "o0", "capped"] # ROI rotation order (reach1 = Phase-21 overlay-unique harvest) def load_state(): diff --git a/tools/wave_targets.py b/tools/wave_targets.py index 9e3deb941..7e34b1c8e 100644 --- a/tools/wave_targets.py +++ b/tools/wave_targets.py @@ -6,7 +6,8 @@ Emits a JSON array of {name, addr, nins, class, asm, ghidra_c} for tools/workflo ranked by leverage (reach*nins), skipping known walls already logged 'failed'/'stub' in the backlog. Pools (ROI rotation): tractable (reach-134 WAVE/PINS/STRUCT <=150 ins, main region) | giants | -o0 | capped | any-reach134. +o0 | capped | any-reach134 | reach1 (overlay-unique reach-1 fns, region main, sorted SMALLEST-FIRST +— the Phase-21 idiom-mining harvest: easy wins + distill the gcc quirk each reveals, feed forward). Usage: tools/wave_targets.py --pool tractable --n 24 [--region main|a|any] [--out -] """ @@ -95,7 +96,7 @@ def emit(batch, out): def main(): ap = argparse.ArgumentParser() ap.add_argument("--pool", default="tractable", - choices=["tractable", "giants", "o0", "capped", "any-reach134"]) + choices=["tractable", "giants", "o0", "capped", "any-reach134", "reach1"]) ap.add_argument("--class", dest="rclass", default=None, help="CLASS-GROUPED wave: select backlog near-misses of this residual class " "(REGALLOC/SCHEDULE/REMAT/STRUCT/IV/LOOPGUARD/LOOSE/PLUMBING/OTHER) to re-attempt") @@ -151,13 +152,18 @@ def main(): return t["class"] == "O0" if a.pool == "any-reach134": return t["reach_134"] + if a.pool == "reach1": # overlay-unique fuel (Phase 21 idiom-mining), smallest-first sorted below + return (not t["reach_134"]) and t["class"] in ("WAVE", "PINS", "STRUCT", "STUB") and (t["nins"] or 999) <= a.max_nins return False pool = [t for t in m["targets"] if ok(t)] if a.pool == "capped": # the matched-but-local recovery set (not stubs) pool = [{"name": n, "addr": "0x" + n[5:].lower(), "nins": None, "class": "CAPPED", "reach": 134, "leverage": 0} for n in m.get("capped_recovery", [])] - pool.sort(key=lambda t: t.get("leverage") or 0, reverse=True) + if a.pool == "reach1": + pool.sort(key=lambda t: t.get("nins") or 0) # SMALLEST-FIRST (idiom-mining order, Drew) + else: + pool.sort(key=lambda t: t.get("leverage") or 0, reverse=True) pool = pool[:a.n] batch = [{"name": t["name"], "addr": t["addr"], "nins": t["nins"], "class": t["class"],