From a443612e6d873ea0e7d0e7e53f80b46c68f72371 Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Wed, 12 Aug 2026 12:52:16 -0600 Subject: [PATCH] feat(phase-30 S48-T6): propagate func_8017F8CC to its zero-crack siblings --- src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c | 108 ++++++++++++++++++++-- src/ov_SC06_018/ov_SC06_018_jr_8017C24C.c | 90 +++++++++++++++++- src/ov_SC06_022/ov_SC06_022_jr_80184A28.c | 90 +++++++++++++++++- src/ov_SC06_024/ov_SC06_024_jr_80186F00.c | 90 +++++++++++++++++- src/ov_SC06_032/ov_SC06_032_jr_80182890.c | 90 +++++++++++++++++- src/ov_SC06_033/ov_SC06_033_jr_8018D98C.c | 99 ++++++++++++++++++-- 6 files changed, 534 insertions(+), 33 deletions(-) diff --git a/src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c b/src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c index b157151079..0f03c6a9c8 100644 --- a/src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c +++ b/src/ov_SC06_010/ov_SC06_010_jr_8017A4AC.c @@ -1786,9 +1786,6 @@ extern void func_8016A700(void *a0); extern s32 func_8016A73C(s32 arg0); extern s32 func_8016A8FC(s32 a0); extern void func_8016A890(s32 arg0); -extern u16 D_80126B5E; -extern u16 D_80126B62; -extern u16 D_80126B66; extern void func_8016AA50(s32 param_1, s32 param_2); extern void (*D_80189B5C[])(void); extern void func_8016AB30(void *a0); @@ -2899,9 +2896,6 @@ void func_8017B0E4(int param_1, int param_2) -extern u16 D_80126B5E; -extern u16 D_80126B62; -extern u16 D_80126B66; extern s16 D_801B1F84; extern u16 D_801B2004; extern u16 D_801B2006; @@ -2909,6 +2903,12 @@ extern u16 D_801B2008; extern s16 D_801B2C08; void func_8017B1D8(void) { + /* [T51] scoped in from file scope: a file-scope decl of these symbols constrains every + LATER function in this TU, which blocks a byte-true decl of a different type. + Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */ + extern u16 D_80126B5E; + extern u16 D_80126B62; + extern u16 D_80126B66; func_8012A418(); D_801B2C08 = 0; D_801B1F84 = 0; @@ -3230,9 +3230,6 @@ s32 func_8017B8E8(s32 src) { // @class: struct // @stuck: none — MATCH (63 ins) -extern u16 D_80126B5E; -extern u16 D_80126B62; -extern u16 D_80126B66; extern u16 D_801B2004; extern u16 D_801B2006; extern u16 D_801B2008; @@ -3258,6 +3255,12 @@ extern s16 D_801B1FF8; void func_8017B940(void) { + /* [T51] scoped in from file scope: a file-scope decl of these symbols constrains every + LATER function in this TU, which blocks a byte-true decl of a different type. + Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */ + extern u16 D_80126B5E; + extern u16 D_80126B62; + extern u16 D_80126B66; s32 buf[3]; D_8012694C = 2; @@ -5257,7 +5260,92 @@ void func_80181AD8(s32 param_1) } -INCLUDE_ASM("asm/ov_SC06_010/nonmatchings/ov_SC06_010_jr_8017A4AC", func_80181D80); +typedef struct { + SVECTOR_8016E7C8 v[4]; /* 0x00 */ + s32 f0, f1, f2, f3, f4, f5; /* 0x20..0x37 */ + u8 f6; /* 0x38 */ + u8 pad[7]; /* -> 0x40 */ +} Prim_8016E7C8_80181D80; + + + + + + + + + +void func_80181D80(s32 a0) +{ + + extern s16 D_801A4C10[]; + extern u16 D_80126B5E; + extern u16 D_80126B62; + extern u16 D_80126B66; + switch (*(u16 *)(a0 + 0x34)) { + case 0: + { + s16 idx = *(s16 *)(a0 + 0x70); + s16 *p = &D_801A4C10[(idx - 1) * 4]; + s16 gx = *(s16 *)&D_80126B5E; + s16 gz; + s32 p20; + + if (!(*p < gx)) { + break; + } + p++; + if (!(gx < *p)) { + break; + } + p++; + gz = *(s16 *)&D_80126B66; + if (!(*p < gz)) { + break; + } + if (!(gz < p[1])) { + break; + } + + p20 = *(s32 *)(a0 + 0x20); + *(u32 *)(p20 + 4) = *(u32 *)(p20 + 4) & 0x7FFFFFFF; + + { + s32 t; + + *(s16 *)(a0 + 0x88) = D_80126B5E; + *(s16 *)(a0 + 0x6) = D_80126B5E; + t = D_80126B62 - 0x80; + *(s16 *)(a0 + 0x8A) = t; + + t = *(u16 *)(a0 + 0x34); + { + register s16 z __asm__("$3"); + t = t + 1; + z = D_80126B66; + *(u16 *)(a0 + 0x34) = t; + *(s16 *)(a0 + 0x8C) = z; + *(s16 *)(a0 + 0xE) = z; + } + } + break; + } + case 1: + { + s16 v; + + v = *(u16 *)(a0 + 0xA) + 8; + *(u16 *)(a0 + 0xA) = v; + if (v < *(s16 *)(a0 + 0x8A)) { + break; + } + *(s16 *)(a0 + 0x2) = 1; + *(u16 *)(a0 + 0x34) = 0; + break; + } + } +} + INCLUDE_ASM("asm/ov_SC06_010/nonmatchings/ov_SC06_010_jr_8017A4AC", func_80181EB0); diff --git a/src/ov_SC06_018/ov_SC06_018_jr_8017C24C.c b/src/ov_SC06_018/ov_SC06_018_jr_8017C24C.c index 3e567d8e73..9354b37af8 100644 --- a/src/ov_SC06_018/ov_SC06_018_jr_8017C24C.c +++ b/src/ov_SC06_018/ov_SC06_018_jr_8017C24C.c @@ -1786,9 +1786,6 @@ extern void func_8016A700(void *a0); extern s32 func_8016A73C(s32 arg0); extern s32 func_8016A8FC(s32 a0); extern void func_8016A890(s32 arg0); -extern u16 D_80126B5E; -extern u16 D_80126B62; -extern u16 D_80126B66; extern void func_8016AA50(s32 param_1, s32 param_2); extern void (*D_80196740[])(void); extern void func_8016AB30(void *a0); @@ -4469,7 +4466,92 @@ void func_8017F430(s32 param_1) } -INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_jr_8017C24C", func_8017F6D8); +typedef struct { + SVECTOR_8016E7C8 v[4]; /* 0x00 */ + s32 f0, f1, f2, f3, f4, f5; /* 0x20..0x37 */ + u8 f6; /* 0x38 */ + u8 pad[7]; /* -> 0x40 */ +} Prim_8016E7C8_8017F6D8; + + + + + + + + + +void func_8017F6D8(s32 a0) +{ + + extern s16 D_801AAF3C[]; + extern u16 D_80126B5E; + extern u16 D_80126B62; + extern u16 D_80126B66; + switch (*(u16 *)(a0 + 0x34)) { + case 0: + { + s16 idx = *(s16 *)(a0 + 0x70); + s16 *p = &D_801AAF3C[(idx - 1) * 4]; + s16 gx = *(s16 *)&D_80126B5E; + s16 gz; + s32 p20; + + if (!(*p < gx)) { + break; + } + p++; + if (!(gx < *p)) { + break; + } + p++; + gz = *(s16 *)&D_80126B66; + if (!(*p < gz)) { + break; + } + if (!(gz < p[1])) { + break; + } + + p20 = *(s32 *)(a0 + 0x20); + *(u32 *)(p20 + 4) = *(u32 *)(p20 + 4) & 0x7FFFFFFF; + + { + s32 t; + + *(s16 *)(a0 + 0x88) = D_80126B5E; + *(s16 *)(a0 + 0x6) = D_80126B5E; + t = D_80126B62 - 0x80; + *(s16 *)(a0 + 0x8A) = t; + + t = *(u16 *)(a0 + 0x34); + { + register s16 z __asm__("$3"); + t = t + 1; + z = D_80126B66; + *(u16 *)(a0 + 0x34) = t; + *(s16 *)(a0 + 0x8C) = z; + *(s16 *)(a0 + 0xE) = z; + } + } + break; + } + case 1: + { + s16 v; + + v = *(u16 *)(a0 + 0xA) + 8; + *(u16 *)(a0 + 0xA) = v; + if (v < *(s16 *)(a0 + 0x8A)) { + break; + } + *(s16 *)(a0 + 0x2) = 1; + *(u16 *)(a0 + 0x34) = 0; + break; + } + } +} + INCLUDE_ASM("asm/ov_SC06_018/nonmatchings/ov_SC06_018_jr_8017C24C", func_8017F808); diff --git a/src/ov_SC06_022/ov_SC06_022_jr_80184A28.c b/src/ov_SC06_022/ov_SC06_022_jr_80184A28.c index 7162b6a1d0..88d0a46826 100644 --- a/src/ov_SC06_022/ov_SC06_022_jr_80184A28.c +++ b/src/ov_SC06_022/ov_SC06_022_jr_80184A28.c @@ -1773,9 +1773,6 @@ extern void func_8016A700(void *a0); extern s32 func_8016A73C(s32 arg0); extern s32 func_8016A8FC(s32 a0); extern void func_8016A890(s32 arg0); -extern u16 D_80126B5E; -extern u16 D_80126B62; -extern u16 D_80126B66; extern void func_8016AA50(s32 param_1, s32 param_2); extern void (*D_80190484[])(void); extern void func_8016AB30(void *a0); @@ -6698,7 +6695,92 @@ void func_8018C28C(s32 param_1) } -INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80184A28", func_8018C534); +typedef struct { + SVECTOR_8016E7C8 v[4]; /* 0x00 */ + s32 f0, f1, f2, f3, f4, f5; /* 0x20..0x37 */ + u8 f6; /* 0x38 */ + u8 pad[7]; /* -> 0x40 */ +} Prim_8016E7C8_8018C534; + + + + + + + + + +void func_8018C534(s32 a0) +{ + + extern s16 D_801DD668[]; + extern u16 D_80126B5E; + extern u16 D_80126B62; + extern u16 D_80126B66; + switch (*(u16 *)(a0 + 0x34)) { + case 0: + { + s16 idx = *(s16 *)(a0 + 0x70); + s16 *p = &D_801DD668[(idx - 1) * 4]; + s16 gx = *(s16 *)&D_80126B5E; + s16 gz; + s32 p20; + + if (!(*p < gx)) { + break; + } + p++; + if (!(gx < *p)) { + break; + } + p++; + gz = *(s16 *)&D_80126B66; + if (!(*p < gz)) { + break; + } + if (!(gz < p[1])) { + break; + } + + p20 = *(s32 *)(a0 + 0x20); + *(u32 *)(p20 + 4) = *(u32 *)(p20 + 4) & 0x7FFFFFFF; + + { + s32 t; + + *(s16 *)(a0 + 0x88) = D_80126B5E; + *(s16 *)(a0 + 0x6) = D_80126B5E; + t = D_80126B62 - 0x80; + *(s16 *)(a0 + 0x8A) = t; + + t = *(u16 *)(a0 + 0x34); + { + register s16 z __asm__("$3"); + t = t + 1; + z = D_80126B66; + *(u16 *)(a0 + 0x34) = t; + *(s16 *)(a0 + 0x8C) = z; + *(s16 *)(a0 + 0xE) = z; + } + } + break; + } + case 1: + { + s16 v; + + v = *(u16 *)(a0 + 0xA) + 8; + *(u16 *)(a0 + 0xA) = v; + if (v < *(s16 *)(a0 + 0x8A)) { + break; + } + *(s16 *)(a0 + 0x2) = 1; + *(u16 *)(a0 + 0x34) = 0; + break; + } + } +} + INCLUDE_ASM("asm/ov_SC06_022/nonmatchings/ov_SC06_022_jr_80184A28", func_8018C664); diff --git a/src/ov_SC06_024/ov_SC06_024_jr_80186F00.c b/src/ov_SC06_024/ov_SC06_024_jr_80186F00.c index 9e6c891232..a140c4924f 100644 --- a/src/ov_SC06_024/ov_SC06_024_jr_80186F00.c +++ b/src/ov_SC06_024/ov_SC06_024_jr_80186F00.c @@ -1771,9 +1771,6 @@ extern void func_8016A700(void *a0); extern s32 func_8016A73C(s32 arg0); extern s32 func_8016A8FC(s32 a0); extern void func_8016A890(s32 arg0); -extern u16 D_80126B5E; -extern u16 D_80126B62; -extern u16 D_80126B66; extern void func_8016AA50(s32 param_1, s32 param_2); extern void (*D_8019295C[])(void); extern void func_8016AB30(void *a0); @@ -6949,7 +6946,92 @@ void func_8018E764(s32 param_1) } -INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_80186F00", func_8018EA0C); +typedef struct { + SVECTOR_8016E7C8 v[4]; /* 0x00 */ + s32 f0, f1, f2, f3, f4, f5; /* 0x20..0x37 */ + u8 f6; /* 0x38 */ + u8 pad[7]; /* -> 0x40 */ +} Prim_8016E7C8_8018EA0C; + + + + + + + + + +void func_8018EA0C(s32 a0) +{ + + extern s16 D_801DC7AC[]; + extern u16 D_80126B5E; + extern u16 D_80126B62; + extern u16 D_80126B66; + switch (*(u16 *)(a0 + 0x34)) { + case 0: + { + s16 idx = *(s16 *)(a0 + 0x70); + s16 *p = &D_801DC7AC[(idx - 1) * 4]; + s16 gx = *(s16 *)&D_80126B5E; + s16 gz; + s32 p20; + + if (!(*p < gx)) { + break; + } + p++; + if (!(gx < *p)) { + break; + } + p++; + gz = *(s16 *)&D_80126B66; + if (!(*p < gz)) { + break; + } + if (!(gz < p[1])) { + break; + } + + p20 = *(s32 *)(a0 + 0x20); + *(u32 *)(p20 + 4) = *(u32 *)(p20 + 4) & 0x7FFFFFFF; + + { + s32 t; + + *(s16 *)(a0 + 0x88) = D_80126B5E; + *(s16 *)(a0 + 0x6) = D_80126B5E; + t = D_80126B62 - 0x80; + *(s16 *)(a0 + 0x8A) = t; + + t = *(u16 *)(a0 + 0x34); + { + register s16 z __asm__("$3"); + t = t + 1; + z = D_80126B66; + *(u16 *)(a0 + 0x34) = t; + *(s16 *)(a0 + 0x8C) = z; + *(s16 *)(a0 + 0xE) = z; + } + } + break; + } + case 1: + { + s16 v; + + v = *(u16 *)(a0 + 0xA) + 8; + *(u16 *)(a0 + 0xA) = v; + if (v < *(s16 *)(a0 + 0x8A)) { + break; + } + *(s16 *)(a0 + 0x2) = 1; + *(u16 *)(a0 + 0x34) = 0; + break; + } + } +} + INCLUDE_ASM("asm/ov_SC06_024/nonmatchings/ov_SC06_024_jr_80186F00", func_8018EB3C); diff --git a/src/ov_SC06_032/ov_SC06_032_jr_80182890.c b/src/ov_SC06_032/ov_SC06_032_jr_80182890.c index c679c03b45..65769d58f9 100644 --- a/src/ov_SC06_032/ov_SC06_032_jr_80182890.c +++ b/src/ov_SC06_032/ov_SC06_032_jr_80182890.c @@ -1771,9 +1771,6 @@ extern void func_8016A700(void *a0); extern s32 func_8016A73C(s32 arg0); extern s32 func_8016A8FC(s32 a0); extern void func_8016A890(s32 arg0); -extern u16 D_80126B5E; -extern u16 D_80126B62; -extern u16 D_80126B66; extern void func_8016AA50(s32 param_1, s32 param_2); extern void (*D_80196490[])(void); extern void func_8016AB30(void *a0); @@ -6720,7 +6717,92 @@ void func_8018C11C(s32 param_1) } -INCLUDE_ASM("asm/ov_SC06_032/nonmatchings/ov_SC06_032_jr_80182890", func_8018C3C4); +typedef struct { + SVECTOR_8016E7C8 v[4]; /* 0x00 */ + s32 f0, f1, f2, f3, f4, f5; /* 0x20..0x37 */ + u8 f6; /* 0x38 */ + u8 pad[7]; /* -> 0x40 */ +} Prim_8016E7C8_8018C3C4; + + + + + + + + + +void func_8018C3C4(s32 a0) +{ + + extern s16 D_801CA89C[]; + extern u16 D_80126B5E; + extern u16 D_80126B62; + extern u16 D_80126B66; + switch (*(u16 *)(a0 + 0x34)) { + case 0: + { + s16 idx = *(s16 *)(a0 + 0x70); + s16 *p = &D_801CA89C[(idx - 1) * 4]; + s16 gx = *(s16 *)&D_80126B5E; + s16 gz; + s32 p20; + + if (!(*p < gx)) { + break; + } + p++; + if (!(gx < *p)) { + break; + } + p++; + gz = *(s16 *)&D_80126B66; + if (!(*p < gz)) { + break; + } + if (!(gz < p[1])) { + break; + } + + p20 = *(s32 *)(a0 + 0x20); + *(u32 *)(p20 + 4) = *(u32 *)(p20 + 4) & 0x7FFFFFFF; + + { + s32 t; + + *(s16 *)(a0 + 0x88) = D_80126B5E; + *(s16 *)(a0 + 0x6) = D_80126B5E; + t = D_80126B62 - 0x80; + *(s16 *)(a0 + 0x8A) = t; + + t = *(u16 *)(a0 + 0x34); + { + register s16 z __asm__("$3"); + t = t + 1; + z = D_80126B66; + *(u16 *)(a0 + 0x34) = t; + *(s16 *)(a0 + 0x8C) = z; + *(s16 *)(a0 + 0xE) = z; + } + } + break; + } + case 1: + { + s16 v; + + v = *(u16 *)(a0 + 0xA) + 8; + *(u16 *)(a0 + 0xA) = v; + if (v < *(s16 *)(a0 + 0x8A)) { + break; + } + *(s16 *)(a0 + 0x2) = 1; + *(u16 *)(a0 + 0x34) = 0; + break; + } + } +} + INCLUDE_ASM("asm/ov_SC06_032/nonmatchings/ov_SC06_032_jr_80182890", func_8018C4F4); diff --git a/src/ov_SC06_033/ov_SC06_033_jr_8018D98C.c b/src/ov_SC06_033/ov_SC06_033_jr_8018D98C.c index d0981401f2..5a6e95d562 100644 --- a/src/ov_SC06_033/ov_SC06_033_jr_8018D98C.c +++ b/src/ov_SC06_033/ov_SC06_033_jr_8018D98C.c @@ -1784,9 +1784,6 @@ extern void func_8016A700(void *a0); extern s32 func_8016A73C(s32 arg0); extern s32 func_8016A8FC(s32 a0); extern void func_8016A890(s32 arg0); -extern u16 D_80126B5E; -extern u16 D_80126B62; -extern u16 D_80126B66; extern void func_8016AA50(s32 param_1, s32 param_2); extern void (*D_801949A0[])(void); extern void func_8016AB30(void *a0); @@ -2953,9 +2950,6 @@ extern u8 D_801202A0[]; extern u8 D_801C8344; extern u8 D_801C836C; extern u8 D_80126B5C; -extern u16 D_80126B5E; -extern u16 D_80126B62; -extern u16 D_80126B66; extern u16 D_800B99D8; /* Zero-emission launder (see NOTES.md). Each expansion gets a FRESH pseudo that @@ -3003,6 +2997,12 @@ extern u16 D_800B99D8; } while (i < 0x60); void func_8018D98C(s32 a0) { + /* [T51] scoped in from file scope: a file-scope decl of these symbols constrains every + LATER function in this TU, which blocks a byte-true decl of a different type. + Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */ + extern u16 D_80126B5E; + extern u16 D_80126B62; + extern u16 D_80126B66; u16 v10[4]; /* sp+0x10 */ s16 v18[4]; /* sp+0x18 */ s16 v20[4]; /* sp+0x20 */ @@ -3942,7 +3942,92 @@ void func_8018FDBC(s32 param_1) } -INCLUDE_ASM("asm/ov_SC06_033/nonmatchings/ov_SC06_033_jr_8018D98C", func_80190064); +typedef struct { + SVECTOR_8016E7C8 v[4]; /* 0x00 */ + s32 f0, f1, f2, f3, f4, f5; /* 0x20..0x37 */ + u8 f6; /* 0x38 */ + u8 pad[7]; /* -> 0x40 */ +} Prim_8016E7C8_80190064; + + + + + + + + + +void func_80190064(s32 a0) +{ + + extern s16 D_801C95B4[]; + extern u16 D_80126B5E; + extern u16 D_80126B62; + extern u16 D_80126B66; + switch (*(u16 *)(a0 + 0x34)) { + case 0: + { + s16 idx = *(s16 *)(a0 + 0x70); + s16 *p = &D_801C95B4[(idx - 1) * 4]; + s16 gx = *(s16 *)&D_80126B5E; + s16 gz; + s32 p20; + + if (!(*p < gx)) { + break; + } + p++; + if (!(gx < *p)) { + break; + } + p++; + gz = *(s16 *)&D_80126B66; + if (!(*p < gz)) { + break; + } + if (!(gz < p[1])) { + break; + } + + p20 = *(s32 *)(a0 + 0x20); + *(u32 *)(p20 + 4) = *(u32 *)(p20 + 4) & 0x7FFFFFFF; + + { + s32 t; + + *(s16 *)(a0 + 0x88) = D_80126B5E; + *(s16 *)(a0 + 0x6) = D_80126B5E; + t = D_80126B62 - 0x80; + *(s16 *)(a0 + 0x8A) = t; + + t = *(u16 *)(a0 + 0x34); + { + register s16 z __asm__("$3"); + t = t + 1; + z = D_80126B66; + *(u16 *)(a0 + 0x34) = t; + *(s16 *)(a0 + 0x8C) = z; + *(s16 *)(a0 + 0xE) = z; + } + } + break; + } + case 1: + { + s16 v; + + v = *(u16 *)(a0 + 0xA) + 8; + *(u16 *)(a0 + 0xA) = v; + if (v < *(s16 *)(a0 + 0x8A)) { + break; + } + *(s16 *)(a0 + 0x2) = 1; + *(u16 *)(a0 + 0x34) = 0; + break; + } + } +} + INCLUDE_ASM("asm/ov_SC06_033/nonmatchings/ov_SC06_033_jr_8018D98C", func_80190194);