From a59914878f346f309c100e6f814ecfda2373b35f Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Fri, 11 Sep 2026 13:16:25 -0600 Subject: [PATCH] =?UTF-8?q?phase-36:=20S105=20s105=5Ff4=20=E2=80=94=20func?= =?UTF-8?q?=5F801835B0=20banked=20at=200=20through=20the=20whole-object=20?= =?UTF-8?q?gate=20+=20propagated=20=E2=80=94=20f4=20plain=20C=20(single-se?= =?UTF-8?q?t=20s16=20loaded=20directly=20=E2=80=94=20combine's=20narrow-lo?= =?UTF-8?q?ad=20split;=20pad=20deleted)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .run/P36/delever/calibration.json | 356 +++++++++++----------- .run/P36/delever/ledger.jsonl | 1 + src/ov_SC04_011/ov_SC04_011_jr_8017D494.c | 36 +-- 3 files changed, 194 insertions(+), 199 deletions(-) diff --git a/.run/P36/delever/calibration.json b/.run/P36/delever/calibration.json index 8e051d0775..116d0d7fa8 100644 --- a/.run/P36/delever/calibration.json +++ b/.run/P36/delever/calibration.json @@ -1,7 +1,7 @@ { - "head": "71e32fed0", + "head": "310cea91f", "stamp": "15956e4a96c4", - "generated": "2026-09-11 13:07", + "generated": "2026-09-11 13:16", "aliases": [ "main", "ov_SC03_014", @@ -21,206 +21,206 @@ "main": { "objects": 85, "identical": 85, - "seconds": 6.562999999999997, - "mean_s": 0.077 + "seconds": 6.469999999999996, + "mean_s": 0.076 }, "ov_SC03_014": { "objects": 32, "identical": 32, - "seconds": 4.531, + "seconds": 4.555, "mean_s": 0.142 }, "ov_SC03_015": { "objects": 32, "identical": 32, - "seconds": 4.307, - "mean_s": 0.135 + "seconds": 4.340000000000001, + "mean_s": 0.136 }, "ov_SC04_011": { "objects": 28, "identical": 28, - "seconds": 3.765999999999999, - "mean_s": 0.134 + "seconds": 3.735, + "mean_s": 0.133 } }, "per_object_seconds": { "build/src/800.o": 0.742, - "build/src/800_b.o": 0.072, - "build/src/800_b_2.o": 0.293, - "build/src/800_b_o0a.o": 0.065, - "build/src/800_c.o": 0.196, - "build/src/800b2.o": 0.072, - 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+++ b/.run/P36/delever/ledger.jsonl @@ -29596,3 +29596,4 @@ {"ts": "2026-09-11 13:07:08", "label": "s105_f3", "rung": "E", "calib": {"head": "e16cb5d6f", "stamp": "15956e4a96c4"}, "tu": "src/md_SC07_004/md_SC07_004.c", "fn": "func_801AADA8", "addr": 2149232040, "aliases": null, "header": false, "includers": 0, "nhash_before": "ce1f7e565e647700e8d102f539b46f94715101c4", "nhash_after": "d002368c040e50941ffbafafe1a04ce043cfad13", "source": ".run/P36/agents/md_SC07_004__func_801AADA8/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.31, "objects": ["build/src/md_SC07_004/md_SC07_004.o"], "before_text": "void func_801AADA8(s32 arg0, s32 arg1, s32 arg2)\n{\n extern void *func_80010A08(s32);\n extern void func_8004914C(void *);\n extern void func_800491AC(void *);\n extern s32 RotTransPers(s32, s32, s32 *, s32 *);\n extern u8 D_800AF648;\n extern OtBlk_8018A974_801AADA8 D_800A651C[];\n extern u8 D_800A6518[];\n extern short D_800B9A02;\n extern void func_80016638(void *a0, s32 a1, s32 a2);\n\n s32 sp10;\n s32 sp14;\n s32 temp_v0_2;\n void *temp_v0;\n s32 ot;\n s32 depth4;\n u16 *bidx;\n u32 mask1;\n register s32 rgb __asm__(\"$16\"); // !FAKE: pin $16 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register u32 tag0 __asm__(\"$4\"); // !FAKE: pin $4 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n rgb = arg2;\n __asm__(\"\" : \"=r\"(rgb) : \"0\"(rgb)); /* zero-byte 2nd SET: kills the sched1 birthing boost */ // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n temp_v0 = func_80010A08(0x10);\n *(u8 *)((u8 *)temp_v0 + 3) = 3;\n *(s32 *)((u8 *)temp_v0 + 4) = rgb;\n *(u8 *)((u8 *)temp_v0 + 7) = 0x42;\n func_8004914C(&D_800AF648);\n func_800491AC(&D_800AF648);\n temp_v0_2 = RotTransPers(arg0, temp_v0 + 8, &sp10, &sp14);\n if ((temp_v0_2 > 0) && (sp14 >= 0) &&\n (RotTransPers(arg1, temp_v0 + 0xC, &sp10, &sp14) > 0) && (sp14 >= 0)) {\n /* addPrim(otp, p) == setaddr(p, getaddr(otp)), setaddr(otp, p) */\n mask1 = 0xFFFFFF;\n bidx = (u16 *)&D_800B9A02;\n depth4 = temp_v0_2 * 4;\n tag0 = *(u32 *)temp_v0;\n *(u32 *)temp_v0 = (tag0 & 0xFF000000) |\n (*(u32 *)(depth4 + D_800A651C[*bidx].a) & mask1);\n ot = D_800A651C[*bidx].a;\n *(u32 *)(depth4 + ot) =\n (*(u32 *)(depth4 + ot) & 0xFF000000) | ((u32)temp_v0 & mask1);\n func_80016638(&D_800A6518[*bidx * 20], temp_v0_2, 1);\n }\n}\n", "after_text": "void func_801AADA8(s32 arg0, s32 arg1, s32 arg2)\n{\n extern void *func_80010A08(s32);\n extern void func_8004914C(void *);\n extern void func_800491AC(void *);\n extern s32 RotTransPers(s32, s32, s32 *, s32 *);\n extern u8 D_800AF648;\n extern OtBlk_8018A974_801AADA8 D_800A651C[];\n extern u8 D_800A6518[];\n extern short D_800B9A02;\n extern void func_80016638(void *a0, s32 a1, s32 a2);\n\n s32 sp10;\n s32 sp14;\n s32 temp_v0_2;\n void *temp_v0;\n s32 ot;\n s32 depth4;\n u16 *bidx;\n u32 tag;\n\n temp_v0 = func_80010A08(0x10);\n *(s32 *)((u8 *)temp_v0 + 4) = arg2;\n *(u8 *)((u8 *)temp_v0 + 3) = 3;\n *(u8 *)((u8 *)temp_v0 + 7) = 0x42;\n func_8004914C(&D_800AF648);\n func_800491AC(&D_800AF648);\n temp_v0_2 = RotTransPers(arg0, temp_v0 + 8, &sp10, &sp14);\n if ((temp_v0_2 > 0) && (sp14 >= 0) &&\n (RotTransPers(arg1, temp_v0 + 0xC, &sp10, &sp14) > 0) && (sp14 >= 0)) {\n /* addPrim(otp, p) == setaddr(p, getaddr(otp)), setaddr(otp, p) */\n bidx = (u16 *)&D_800B9A02;\n depth4 = temp_v0_2 * 4;\n tag = *(u32 *)temp_v0;\n tag &= 0xFF000000;\n tag |= *(u32 *)(depth4 + D_800A651C[*bidx].a) & 0xFFFFFF;\n *(u32 *)temp_v0 = tag;\n ot = D_800A651C[*bidx].a;\n *(u32 *)(depth4 + ot) =\n (*(u32 *)(depth4 + ot) & 0xFF000000) | ((u32)temp_v0 & 0xFFFFFF);\n func_80016638(&D_800A6518[*bidx * 20], temp_v0_2, 1);\n }\n}\n"} {"ts": "2026-09-11 13:07:26", "label": "s105_f3", "rung": "E", "calib": {"head": "6aabe1905", "stamp": "15956e4a96c4"}, "tu": "src/md_SC07_004/md_SC07_004.c", "fn": "func_801AB21C", "addr": 2149233180, "aliases": null, "header": false, "includers": 0, "nhash_before": "ca68e496aa82e27ea0ff5b726cdc2cfbbb589500", "nhash_after": "3c67ba2bfae7116fd908c9908ee27a5f434842d4", "source": ".run/P36/agents/md_SC07_004__func_801AB21C/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.31, "objects": ["build/src/md_SC07_004/md_SC07_004.o"], "before_text": "void func_801AB21C(s32 a0, s32 a1, s32 a2, s32 a3)\n{\n extern void *func_80010A08(s32);\n extern void func_80016638(void *a0, s32 a1, s32 a2);\n extern u16 D_800B9A02;\n extern OtBlk_8018A974_801AADA8 D_800A651C[];\n extern u8 D_800A6518[];\n extern OtBlk_8018A974_801AADA8 D_800AE7BC[];\n extern u8 D_800AE7B8[];\n\n F4_801AB21C *p;\n u32 *ot;\n s32 idx;\n\n p = (F4_801AB21C *)func_80010A08(0x18);\n\n p->len = 5;\n p->code = 0x2A;\n p->r0 = a1;\n p->g0 = a2;\n p->b0 = a3;\n p->x0 = p->x2 = -160;\n p->x1 = p->x3 = 160;\n p->y0 = p->y1 = -120;\n p->y2 = p->y3 = 120;\n idx = a0 & 0xFFFF;\n if (idx != 0) {\n u32 m24 = 0x00FFFFFF;\n u32 mFF = 0xFF000000;\n register s32 i4 __asm__(\"$6\") = idx * 4; // !FAKE: pin $6 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register u32 pv __asm__(\"$4\"); // !FAKE: pin $4 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n pv = *(u32 *)p;\n *(u32 *)p = (pv & mFF) | (*(u32 *)(i4 + D_800A651C[D_800B9A02].a) & m24);\n i4 += D_800A651C[D_800B9A02].a;\n *(u32 *)i4 = (*(u32 *)i4 & mFF) | ((u32)p & m24);\n func_80016638(&D_800A6518[D_800B9A02 * 20], idx, 1);\n } else {\n u32 m24 = 0x00FFFFFF;\n register u32 pv __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n pv = *(u32 *)p;\n *(u32 *)p = (pv & 0xFF000000) | (*(u32 *)D_800AE7BC[D_800B9A02].a & m24);\n __asm__ __volatile__(\"\" : \"=r\"(pv)); /* zero-byte 2nd SET: kills the sched1 birthing boost */ // !FAKE: launder out-only \u2014 NEEDED DIFFERS (P36 rung B tus9)\n ot = (u32 *)D_800AE7BC[D_800B9A02].a;\n *ot = (*ot & 0xFF000000) | ((u32)p & m24);\n func_80016638(&D_800AE7B8[D_800B9A02 * 20], 0, 1);\n }\n}\n", "after_text": "void func_801AB21C(s32 a0, s32 a1, s32 a2, s32 a3)\n{\n extern void *func_80010A08(s32);\n extern void func_80016638(void *a0, s32 a1, s32 a2);\n extern u16 D_800B9A02;\n extern OtBlk_8018A974_801AADA8 D_800A651C[];\n extern u8 D_800A6518[];\n extern OtBlk_8018A974_801AADA8 D_800AE7BC[];\n extern u8 D_800AE7B8[];\n\n F4_801AB21C *p;\n u32 *ot;\n s32 idx;\n\n p = (F4_801AB21C *)func_80010A08(0x18);\n\n p->len = 5;\n p->code = 0x2A;\n p->r0 = a1;\n p->g0 = a2;\n p->b0 = a3;\n p->x0 = p->x2 = -160;\n p->x1 = p->x3 = 160;\n p->y0 = p->y1 = -120;\n p->y2 = p->y3 = 120;\n idx = a0 & 0xFFFF;\n if (idx != 0) {\n s32 i4 = idx * 4;\n u32 tag;\n /* addPrim(otp, p) == setaddr(p, getaddr(otp)), setaddr(otp, p) */\n tag = *(u32 *)p;\n tag &= 0xFF000000;\n tag |= *(u32 *)(i4 + D_800A651C[D_800B9A02].a) & 0xFFFFFF;\n *(u32 *)p = tag;\n i4 += D_800A651C[D_800B9A02].a;\n *(u32 *)i4 = (*(u32 *)i4 & 0xFF000000) | ((u32)p & 0xFFFFFF);\n func_80016638(&D_800A6518[D_800B9A02 * 20], idx, 1);\n } else {\n u32 tag;\n tag = *(u32 *)p;\n tag &= 0xFF000000;\n tag |= *(u32 *)D_800AE7BC[D_800B9A02].a & 0xFFFFFF;\n *(u32 *)p = tag;\n ot = (u32 *)D_800AE7BC[D_800B9A02].a;\n *ot = (*ot & 0xFF000000) | ((u32)p & 0xFFFFFF);\n func_80016638(&D_800AE7B8[D_800B9A02 * 20], 0, 1);\n }\n}\n"} {"ts": "2026-09-11 13:07:44", "label": "s105_f3_minlever", "rung": "E", "calib": {"head": "71e32fed0", "stamp": "15956e4a96c4"}, "tu": "src/md_SC07_004/md_SC07_004.c", "fn": "func_801ADF5C", "addr": 2149244764, "aliases": null, "header": false, "includers": 0, "nhash_before": "5fe4a1e02a9494e91b8615408e7eaa308ecbc7ea", "nhash_after": "5fe4a1e02a9494e91b8615408e7eaa308ecbc7ea", "source": ".run/P36/agents/md_SC07_004__func_801ADF5C/body.c", "verdict": "LEVER-FREE", "sites": [{"ord": 0, "kind": "pin", "cls": "A", "detail": "$2", "via": "", "line": 9663, "verdict": "NEEDED", "why": "left by the author", "oracle": ""}, {"ord": 1, "kind": "pin", "cls": "A", "detail": "$3", "via": "", "line": 9664, "verdict": "NEEDED", "why": "left by the author", "oracle": ""}, {"ord": 2, "kind": "pin", "cls": "A", "detail": "$5", "via": "", "line": 9665, "verdict": "NEEDED", "why": "left by the author", "oracle": ""}, {"ord": 3, "kind": "barrier", "cls": "B", "detail": "", "via": "", "line": 9669, "verdict": "NEEDED", "why": "left by the author", "oracle": ""}, {"ord": 4, "kind": "barrier", "cls": "B", "detail": "", "via": "", "line": 9685, "verdict": "NEEDED", "why": "left by the author", "oracle": ""}], "compiles": 1, "seconds": 0.308, "objects": ["build/src/md_SC07_004/md_SC07_004.o"], "before_text": "void func_801ADF5C(void *a0)\n{\n void *s0;\n struct { s16 x, y, w, h; } rect;\n\n void *p;\n\n s0 = a0;\n\n /* D_800B9AC4/D_800B9AC8 are fields of the struct rooted at D_800B9A78\n * (see engine_core.h's Ent_956C / func_8012956C); the func_801298F4\n * call target is that struct's base, computed as p - 0x4C so the\n * compiler reuses the already-materialized D_800B9AC4 address instead\n * of emitting a second relocation. A plain `&D_800B9AC4 - 0x4C`\n * constant-folds at compile time into a FRESH symbolic constant\n * (its own lui/addiu, computed before the stores) instead of runtime\n * register arithmetic, so the address is pinned into a real pseudo\n * with the same zero-byte re-tie idiom func_8012956C uses for its\n * `base` pointer. */\n p = &D_800B9AC4;\n *(void **)p = &D_801F76B0;\n D_800B9AC8 = &D_801F74A8;\n func_801298F4((void *)((u8 *)p - 0x4C));\n\n {\n s32 mask;\n s16 one;\n register s32 rv0 __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register s32 rv1 __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n register s32 ra1 __asm__(\"$5\"); // !FAKE: pin $5 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n mask = 0xF7FFFFFF;\n one = 1;\n __asm__ __volatile__(\"\"); // !FAKE: barrier \u2014 NEEDED DIFFERS (P36 rung B tus9)\n rv0 = 0x2000;\n rv1 = 0x118;\n\n D_800B9AA4 = (s16)rv0;\n D_800B9AA6 = (s16)rv0;\n\n rv0 = 0x8C;\n\n D_800B9A90 = (s16)rv1;\n D_800B9A92 = (s16)rv1;\n D_800B9AB4 = (s16)rv1;\n D_800B9AB6 = (s16)rv1;\n\n\n rv1 = D_800B9A88;\n __asm__ __volatile__(\"\"); // !FAKE: barrier \u2014 NEEDED DIFFERS (P36 rung B tus9)\n ra1 = 0x100;\n\n D_800B9AA0 = (s16)rv0;\n D_800B9AA2 = (s16)rv0;\n\n rv0 = 0x1E0;\n\n rect.x = (s16)ra1;\n rect.w = (s16)ra1;\n\n ra1 = (s32)&D_801F8B18;\n\n D_800B9AAE = one;\n D_800B9ABA = 0;\n D_800B9AB8 = 0;\n\n rect.y = (s16)rv0;\n rect.h = one;\n\n D_800B9A88 = rv1 & mask;\n\n StoreImage((s32)&rect, (void *)ra1);\n }\n\n func_8012AD50(s0);\n}\n", "after_text": "void func_801ADF5C(void *a0)\n{\n void *s0;\n struct { s16 x, y, w, h; } rect;\n\n void *p;\n\n s0 = a0;\n\n /* D_800B9AC4/D_800B9AC8 are fields of the struct rooted at D_800B9A78\n * (see engine_core.h's Ent_956C / func_8012956C); the func_801298F4\n * call target is that struct's base, computed as p - 0x4C so the\n * compiler reuses the already-materialized D_800B9AC4 address instead\n * of emitting a second relocation. A plain `&D_800B9AC4 - 0x4C`\n * constant-folds at compile time into a FRESH symbolic constant\n * (its own lui/addiu, computed before the stores) instead of runtime\n * register arithmetic, so the address is pinned into a real pseudo\n * with the same zero-byte re-tie idiom func_8012956C uses for its\n * `base` pointer. */\n p = &D_800B9AC4;\n *(void **)p = &D_801F76B0;\n D_800B9AC8 = &D_801F74A8;\n func_801298F4((void *)((u8 *)p - 0x4C));\n\n {\n s32 mask;\n s16 one;\n register s32 rv0 __asm__(\"$2\"); // !FAKE: pin $2 rv0 \u2014 the 0x2000/0x8C/0x1E0 holder is a 3-death pseudo, global.c find_reg (global.c:945-990) hands it $a2 once the single-death locals hold $v0/$v1 (P36 S105 f3 minimum-lever)\n register s32 rv1 __asm__(\"$3\"); // !FAKE: pin $3 rv1 \u2014 the 0x118/D_800B9A88 holder, same global.c:945-990 contest (P36 S105 f3 minimum-lever)\n register s32 ra1 __asm__(\"$5\"); // !FAKE: pin $5 ra1 \u2014 keeps `ra1 = &D_801F8B18` a second SET of one pseudo (combine.c:1460 otherwise folds it into the call argument and the 0x100 load becomes a birthing insn, sched.c:2477-2490) (P36 S105 f3 minimum-lever)\n\n mask = 0xF7FFFFFF;\n one = 1;\n __asm__ __volatile__(\"\"); // !FAKE: barrier after one/mask \u2014 sched1 birthing boost (sched.c:2477-2544) would sink `li 1` to its first store; the target keeps it at the block top (P36 S105 f3 minimum-lever)\n rv0 = 0x2000;\n rv1 = 0x118;\n\n D_800B9AA4 = (s16)rv0;\n D_800B9AA6 = (s16)rv0;\n\n rv0 = 0x8C;\n\n D_800B9A90 = (s16)rv1;\n D_800B9A92 = (s16)rv1;\n D_800B9AB4 = (s16)rv1;\n D_800B9AB6 = (s16)rv1;\n\n\n rv1 = D_800B9A88;\n __asm__ __volatile__(\"\"); // !FAKE: barrier after the D_800B9A88 load \u2014 keeps the 0x8C/0x100 group below the load (sched1 hazard tie-break, sched.c:2620-2690, otherwise lifts the load and the 0x118 stores past it) (P36 S105 f3 minimum-lever)\n ra1 = 0x100;\n\n D_800B9AA0 = (s16)rv0;\n D_800B9AA2 = (s16)rv0;\n\n rv0 = 0x1E0;\n\n rect.x = (s16)ra1;\n rect.w = (s16)ra1;\n\n ra1 = (s32)&D_801F8B18;\n\n D_800B9AAE = one;\n D_800B9ABA = 0;\n D_800B9AB8 = 0;\n\n rect.y = (s16)rv0;\n rect.h = one;\n\n D_800B9A88 = rv1 & mask;\n\n StoreImage((s32)&rect, (void *)ra1);\n }\n\n func_8012AD50(s0);\n}\n"} +{"ts": "2026-09-11 13:16:24", "label": "s105_f4", "rung": "E", "calib": {"head": "310cea91f", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC04_011/ov_SC04_011_jr_8017D494.c", "fn": "func_801835B0", "addr": 2149070256, "aliases": null, "header": false, "includers": 0, "nhash_before": "cf754f55211cfd7815057357e76cbc8644b45f08", "nhash_after": "ecdbae9cdde6fc5053c5622c0a3ebfd21ba70abb", "source": ".run/P36/agents/ov_SC04_011__func_801835B0/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.412, "objects": ["build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o"], "before_text": "void func_801835B0(s32 a0)\n{\n s32 obj;\n s16 *p;\n s32 t;\n s16 u;\n s16 m;\n s16 c;\n s32 pad[6]; /* \u00a7333: sets the 0x18 frame */\n\n obj = aFC4C[D_801EFD20];\n p = (s16 *)(a0 + 0xEC);\n if ((a0 + 0xE4) != 0) {\n *(u16 *)(a0 + 0xEC) = *(u16 *)(a0 + 0xE4) - *(u16 *)(obj + 6);\n *(u16 *)(a0 + 0xEE) = *(u16 *)(a0 + 0xE6) - *(u16 *)(obj + 0xA);\n *(u16 *)(a0 + 0xF0) = *(u16 *)(a0 + 0xE8) - *(u16 *)(obj + 0xE);\n } else {\n *(u16 *)(a0 + 0xF0) = 0;\n *(u16 *)(a0 + 0xEE) = 0;\n *(u16 *)(a0 + 0xEC) = 0;\n }\n *(u16 *)(a0 + 0xEA) = 0x1E0;\n\n t = p[0];\n u = t;\n if (t < 0) {\n __asm__(\"\" : \"=r\"(u) : \"0\"(u)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B t3_tus1)\n m = -u;\n } else {\n m = u;\n }\n *(u16 *)(a0 + 0xE2) = 0;\n\n t = p[1];\n u = t;\n if (t < 0) {\n __asm__(\"\" : \"=r\"(u) : \"0\"(u)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B t3_tus1)\n c = -u;\n } else {\n c = u;\n }\n if (m < c) {\n m = c;\n *(u16 *)(a0 + 0xE2) = 1;\n }\n\n t = p[2];\n u = t;\n if (t < 0) {\n __asm__(\"\" : \"=r\"(u) : \"0\"(u)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B t3_tus1)\n c = -u;\n } else {\n c = u;\n }\n if (m < c) {\n *(u16 *)(a0 + 0xE2) = 2;\n }\n}\n", "after_text": "void func_801835B0(s32 a0)\n{\n s32 obj;\n s16 *p;\n s16 x;\n s16 y;\n s16 z;\n s16 m;\n s16 c;\n\n obj = aFC4C[D_801EFD20];\n p = (s16 *)(a0 + 0xEC);\n if ((a0 + 0xE4) != 0) {\n *(u16 *)(a0 + 0xEC) = *(u16 *)(a0 + 0xE4) - *(u16 *)(obj + 6);\n *(u16 *)(a0 + 0xEE) = *(u16 *)(a0 + 0xE6) - *(u16 *)(obj + 0xA);\n *(u16 *)(a0 + 0xF0) = *(u16 *)(a0 + 0xE8) - *(u16 *)(obj + 0xE);\n } else {\n *(u16 *)(a0 + 0xF0) = 0;\n *(u16 *)(a0 + 0xEE) = 0;\n *(u16 *)(a0 + 0xEC) = 0;\n }\n *(u16 *)(a0 + 0xEA) = 0x1E0;\n\n x = p[0];\n if (x < 0) {\n m = -x;\n } else {\n m = x;\n }\n *(u16 *)(a0 + 0xE2) = 0;\n\n y = p[1];\n if (y < 0) {\n c = -y;\n } else {\n c = y;\n }\n if (m < c) {\n m = c;\n *(u16 *)(a0 + 0xE2) = 1;\n }\n\n z = p[2];\n if (z < 0) {\n c = -z;\n } else {\n c = z;\n }\n if (m < c) {\n *(u16 *)(a0 + 0xE2) = 2;\n }\n}\n"} diff --git a/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c b/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c index 1de7f7204c..425b0e6957 100644 --- a/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c +++ b/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c @@ -6969,11 +6969,11 @@ void func_801835B0(s32 a0) { s32 obj; s16 *p; - s32 t; - s16 u; + s16 x; + s16 y; + s16 z; s16 m; s16 c; - s32 pad[6]; /* ยง333: sets the 0x18 frame */ obj = aFC4C[D_801EFD20]; p = (s16 *)(a0 + 0xEC); @@ -6988,36 +6988,30 @@ void func_801835B0(s32 a0) } *(u16 *)(a0 + 0xEA) = 0x1E0; - t = p[0]; - u = t; - if (t < 0) { - __asm__("" : "=r"(u) : "0"(u)); // !FAKE: launder โ€” NEEDED DIFFERS (P36 rung B t3_tus1) - m = -u; + x = p[0]; + if (x < 0) { + m = -x; } else { - m = u; + m = x; } *(u16 *)(a0 + 0xE2) = 0; - t = p[1]; - u = t; - if (t < 0) { - __asm__("" : "=r"(u) : "0"(u)); // !FAKE: launder โ€” NEEDED DIFFERS (P36 rung B t3_tus1) - c = -u; + y = p[1]; + if (y < 0) { + c = -y; } else { - c = u; + c = y; } if (m < c) { m = c; *(u16 *)(a0 + 0xE2) = 1; } - t = p[2]; - u = t; - if (t < 0) { - __asm__("" : "=r"(u) : "0"(u)); // !FAKE: launder โ€” NEEDED DIFFERS (P36 rung B t3_tus1) - c = -u; + z = p[2]; + if (z < 0) { + c = -z; } else { - c = u; + c = z; } if (m < c) { *(u16 *)(a0 + 0xE2) = 2;