diff --git a/src/md_MAIN_003/md_MAIN_003.c b/src/md_MAIN_003/md_MAIN_003.c
index 7000ecd42e..e79e3ac5cf 100644
--- a/src/md_MAIN_003/md_MAIN_003.c
+++ b/src/md_MAIN_003/md_MAIN_003.c
@@ -900,4 +900,248 @@ INCLUDE_ASM("asm/md_MAIN_003/nonmatchings/md_MAIN_003", D_800D3200);
 
 INCLUDE_ASM("asm/md_MAIN_003/nonmatchings/md_MAIN_003", func_800D3204);
 
-INCLUDE_ASM("asm/md_MAIN_003/nonmatchings/md_MAIN_003", func_800D3234);
+__asm__(
+    ".set\tnoreorder\n"
+    ".set\tnoat\n"
+    ".section\t.text\n"
+    ".align\t2\n"
+    ".globl\tfunc_800D3234\n"
+    ".type\tfunc_800D3234, @function\n"
+    ".ent\tfunc_800D3234\n"
+    "func_800D3234:\n"
+    "lui $t0, %hi(D_800D3200)\n"
+    "addiu $t0, $t0, %lo(D_800D3200)\n"
+    "lui $a2, %hi(D_800DBE78)\n"
+    "addiu $a2, $a2, %lo(D_800DBE78)\n"
+    "lui $a3, %hi(D_800EBE78)\n"
+    "addiu $a3, $a3, %lo(D_800EBE78)\n"
+    "bnez $a0, .L800D328C\n"
+    "lw $t1, 0($t0)\n"
+    "lui $t0, %hi(D_800D3574)\n"
+    "addiu $t0, $t0, %lo(D_800D3574)\n"
+    "lw $a0, 0($t0)\n"
+    "lw $a1, 4($t0)\n"
+    "lw $v0, 8($t0)\n"
+    "lw $v1, 12($t0)\n"
+    "lw $t4, 16($t0)\n"
+    "lw $t5, 20($t0)\n"
+    "lw $t7, 24($t0)\n"
+    "lw $t8, 28($t0)\n"
+    "lw $t9, 32($t0)\n"
+    "add $t1, $t1, $t1\n"
+    "bgez $zero, .L800D3404\n"
+    "add $t6, $a1, $t1\n"
+    ".L800D328C:\n"
+    "add $t5, $zero, $zero\n"
+    "add $t7, $zero, $zero\n"
+    "add $t8, $zero, $zero\n"
+    "add $t9, $zero, $zero\n"
+    "add $t1, $t1, $t1\n"
+    "add $t6, $a1, $t1\n"
+    "lhu $t0, 0($a0)\n"
+    "lhu $t1, 2($a0)\n"
+    "lhu $t4, 4($a0)\n"
+    "lhu $t2, 6($a0)\n"
+    "lhu $v0, 8($a0)\n"
+    "lhu $v1, 10($a0)\n"
+    "addi $t2, $t2, -3\n"
+    "bltz $t2, .L800D32CC\n"
+    "sll $t4, $t4, 10\n"
+    "addi $t5, $zero, 1\n"
+    ".L800D32CC:\n"
+    "addi $a0, $a0, 12\n"
+    "sll $v0, $v0, 16\n"
+    "or $v0, $v0, $v1\n"
+    "or $v1, $zero, $zero\n"
+    "sh $t0, 0($a1)\n"
+    "sh $t1, 2($a1)\n"
+    "addi $a1, $a1, 2\n"
+    ".L800D32E8:\n"
+    "beqz $t5, .L800D33C0\n"
+    "srl $t0, $v0, 22\n"
+    "xori $at, $t0, 1023\n"
+    "beqz $at, .L800D350C\n"
+    "addi $a1, $a1, 2\n"
+    "addi $at, $t5, -3\n"
+    "bltz $at, .L800D330C\n"
+    "addi $at, $a2, -1024\n"
+    "addi $at, $at, -1024\n"
+    ".L800D330C:\n"
+    "srl $t0, $v0, 24\n"
+    "sll $t0, $t0, 2\n"
+    "add $t0, $t0, $at\n"
+    "lhu $t1, 0($t0)\n"
+    "lhu $t2, 2($t0)\n"
+    "and $t0, $zero, $zero\n"
+    "beqz $t2, .L800D3350\n"
+    "sllv $v0, $v0, $t1\n"
+    "addi $at, $zero, 32\n"
+    "sub $at, $at, $t2\n"
+    "srlv $t0, $v0, $at\n"
+    "bltz $v0, .L800D334C\n"
+    "sllv $v0, $v0, $t2\n"
+    "addi $t3, $zero, -1\n"
+    "srlv $t3, $t3, $at\n"
+    "sub $t0, $t0, $t3\n"
+    ".L800D334C:\n"
+    "add $v1, $v1, $t2\n"
+    ".L800D3350:\n"
+    "add $v1, $v1, $t1\n"
+    "andi $at, $v1, 16\n"
+    "beqz $at, .L800D3370\n"
+    "andi $v1, $v1, 15\n"
+    "lhu $t1, 0($a0)\n"
+    "addi $a0, $a0, 2\n"
+    "sllv $t1, $t1, $v1\n"
+    "or $v0, $v0, $t1\n"
+    ".L800D3370:\n"
+    "addi $at, $t5, -2\n"
+    "bgtz $at, .L800D3398\n"
+    "add $t1, $t9, $t0\n"
+    "beqz $at, .L800D3390\n"
+    "add $t1, $t8, $t0\n"
+    "add $t1, $t7, $t0\n"
+    "bgez $zero, .L800D339C\n"
+    "add $t7, $t7, $t0\n"
+    ".L800D3390:\n"
+    "bgez $zero, .L800D339C\n"
+    "add $t8, $t8, $t0\n"
+    ".L800D3398:\n"
+    "add $t9, $t9, $t0\n"
+    ".L800D339C:\n"
+    "sll $t1, $t1, 2\n"
+    "andi $t1, $t1, 1023\n"
+    "or $t1, $t4, $t1\n"
+    "addi $t5, $t5, 1\n"
+    "addi $at, $t5, -7\n"
+    "bnez $at, .L800D33F8\n"
+    "sh $t1, 0($a1)\n"
+    "bgez $zero, .L800D33F8\n"
+    "addi $t5, $t5, -6\n"
+    ".L800D33C0:\n"
+    "xori $at, $t0, 511\n"
+    "beqz $at, .L800D350C\n"
+    "addi $a1, $a1, 2\n"
+    "sll $v0, $v0, 10\n"
+    "addi $v1, $v1, 10\n"
+    "andi $at, $v1, 16\n"
+    "beqz $at, .L800D33F0\n"
+    "andi $v1, $v1, 15\n"
+    "lhu $t1, 0($a0)\n"
+    "addi $a0, $a0, 2\n"
+    "sllv $t1, $t1, $v1\n"
+    "or $v0, $v0, $t1\n"
+    ".L800D33F0:\n"
+    "or $t0, $t4, $t0\n"
+    "sh $t0, 0($a1)\n"
+    ".L800D33F8:\n"
+    "subu $at, $a1, $t6\n"
+    "bgez $at, .L800D3540\n"
+    "addi $a1, $a1, 2\n"
+    ".L800D3404:\n"
+    "srl $t0, $v0, 19\n"
+    "sll $t0, $t0, 3\n"
+    "add $t0, $t0, $a2\n"
+    "lw $t1, 0($t0)\n"
+    "nop\n"
+    "bnez $t1, .L800D3460\n"
+    "andi $at, $t1, 255\n"
+    "sll $v0, $v0, 8\n"
+    "addi $v1, $v1, 8\n"
+    "andi $at, $v1, 16\n"
+    "beqz $at, .L800D3444\n"
+    "andi $v1, $v1, 15\n"
+    "lhu $t0, 0($a0)\n"
+    "addi $a0, $a0, 2\n"
+    "sllv $t0, $t0, $v1\n"
+    "or $v0, $v0, $t0\n"
+    ".L800D3444:\n"
+    "srl $t0, $v0, 23\n"
+    "sll $t0, $t0, 2\n"
+    "add $t0, $t0, $a3\n"
+    "lw $t1, 0($t0)\n"
+    "add $t3, $zero, $zero\n"
+    "bgez $zero, .L800D3464\n"
+    "andi $at, $t1, 255\n"
+    ".L800D3460:\n"
+    "lw $t3, 4($t0)\n"
+    ".L800D3464:\n"
+    "sllv $v0, $v0, $at\n"
+    "add $v1, $v1, $at\n"
+    "andi $at, $v1, 16\n"
+    "beqz $at, .L800D3488\n"
+    "andi $v1, $v1, 15\n"
+    "lhu $t0, 0($a0)\n"
+    "addi $a0, $a0, 2\n"
+    "sllv $t0, $t0, $v1\n"
+    "or $v0, $v0, $t0\n"
+    ".L800D3488:\n"
+    "srl $t1, $t1, 16\n"
+    "xori $at, $t1, 31775\n"
+    "beqz $at, .L800D34E8\n"
+    "xori $at, $t1, 65024\n"
+    "beqz $at, .L800D32E8\n"
+    "sh $t1, 0($a1)\n"
+    "beqz $t3, .L800D3404\n"
+    "addi $a1, $a1, 2\n"
+    "andi $t2, $t3, 65535\n"
+    "xori $at, $t2, 31775\n"
+    "beqz $at, .L800D34E8\n"
+    "xori $at, $t2, 65024\n"
+    "beqz $at, .L800D32E8\n"
+    "sh $t2, 0($a1)\n"
+    "srl $t2, $t3, 16\n"
+    "beqz $t2, .L800D3404\n"
+    "addi $a1, $a1, 2\n"
+    "xori $at, $t2, 31775\n"
+    "beqz $at, .L800D34E8\n"
+    "xori $at, $t2, 65024\n"
+    "beqz $at, .L800D32E8\n"
+    "sh $t2, 0($a1)\n"
+    "bgez $zero, .L800D3404\n"
+    "addi $a1, $a1, 2\n"
+    ".L800D34E8:\n"
+    "srl $t0, $v0, 16\n"
+    "sh $t0, 0($a1)\n"
+    "addi $a1, $a1, 2\n"
+    "lhu $t0, 0($a0)\n"
+    "addi $a0, $a0, 2\n"
+    "sll $v0, $v0, 16\n"
+    "sllv $t0, $t0, $v1\n"
+    "bgez $zero, .L800D3404\n"
+    "or $v0, $v0, $t0\n"
+    ".L800D350C:\n"
+    "ori $t0, $zero, 65024\n"
+    "addi $v0, $zero, 64\n"
+    ".L800D3514:\n"
+    "sh $t0, 0($a1)\n"
+    "addi $a1, $a1, 2\n"
+    "bnez $v0, .L800D3514\n"
+    "addi $v0, $v0, -1\n"
+    "mfc0 $t1, $12\n"
+    "nop\n"
+    "lui $at, 2\n"
+    "or $t1, $t1, $at\n"
+    "mtc0 $t1, $12\n"
+    "jr $ra\n"
+    "add $v0, $zero, $zero\n"
+    ".L800D3540:\n"
+    "lui $t0, %hi(D_800D3574)\n"
+    "addiu $t0, $t0, %lo(D_800D3574)\n"
+    "sw $a0, 0($t0)\n"
+    "sw $a1, 4($t0)\n"
+    "sw $v0, 8($t0)\n"
+    "sw $v1, 12($t0)\n"
+    "sw $t4, 16($t0)\n"
+    "sw $t5, 20($t0)\n"
+    "sw $t7, 24($t0)\n"
+    "sw $t8, 28($t0)\n"
+    "sw $t9, 32($t0)\n"
+    "jr $ra\n"
+    "addi $v0, $zero, 1\n"
+    ".set\treorder\n"
+    ".set\tat\n"
+    ".end\tfunc_800D3234\n"
+    ".size\tfunc_800D3234, .-func_800D3234\n"
+);
+
diff --git a/src/md_SC03_076/md_SC03_076.c b/src/md_SC03_076/md_SC03_076.c
index 5f476554d9..2e32472373 100644
--- a/src/md_SC03_076/md_SC03_076.c
+++ b/src/md_SC03_076/md_SC03_076.c
@@ -2,7 +2,15 @@
 
 INCLUDE_ASM("asm/md_SC03_076/nonmatchings/md_SC03_076", func_801EF6E4);
 
-INCLUDE_ASM("asm/md_SC03_076/nonmatchings/md_SC03_076", func_801EF70C);
+s32 func_801EF70C(void)
+{
+    extern s16 D_801F96B8;
+    extern s16 D_801F96BA;
+    extern void (*D_801F2A14[])(void);
+    D_801F2A14[D_801F96B8]();
+    return ((u32)D_801F96BA) >> 31;
+}
+
 
 void func_801EF750(void) {
 
diff --git a/src/ov_SC01_084/ov_SC01_084_jr_8017CA80.c b/src/ov_SC01_084/ov_SC01_084_jr_8017CA80.c
index 6951c884ac..2a894c5e64 100644
--- a/src/ov_SC01_084/ov_SC01_084_jr_8017CA80.c
+++ b/src/ov_SC01_084/ov_SC01_084_jr_8017CA80.c
@@ -3843,7 +3843,27 @@ void func_8017F378(s32 param_1)
 }
 
 
-INCLUDE_ASM("asm/ov_SC01_084/nonmatchings/ov_SC01_084_jr_8017CA80", func_8017F474);
+void func_8017F474(void *a0) {
+    extern struct B8_17F474 { u8 b[8]; } D_8018A790[];
+    extern s32 D_801270D8;
+    extern s32 func_8012BEE8(s32 a0);
+    extern s32 func_8012BD14(s32 a0);
+    extern s32 D_80126B9C;
+    extern void func_8017F218(void *a0);
+
+    *(struct B8_17F474 *)((s32)a0 + 0x50) = D_8018A790[0];
+
+    if (D_801270D8 == 6) {
+        if (func_8012BEE8((s32)a0)) {
+            if (func_8012BD14((s32)a0) <= 0x27100) {
+                if (D_80126B9C & 0x8000000) {
+                    func_8017F218(a0);
+                }
+            }
+        }
+    }
+}
+
 
 extern s32 func_8012BEE8(s32 arg);
     extern void func_8017F26C(s32 *a0);
diff --git a/src/ov_SC02_005/ov_SC02_005_jr_80181D30.c b/src/ov_SC02_005/ov_SC02_005_jr_80181D30.c
index 3fbcc99249..310d4459fe 100644
--- a/src/ov_SC02_005/ov_SC02_005_jr_80181D30.c
+++ b/src/ov_SC02_005/ov_SC02_005_jr_80181D30.c
@@ -5532,7 +5532,35 @@ s32 func_8018687C(s32 a0)
 }
 
 
-INCLUDE_ASM("asm/ov_SC02_005/nonmatchings/ov_SC02_005_jr_80181D30", func_8018692C);
+#include "common.h"
+
+extern s32 func_8012C658(s32 arg0, s32 arg1, s32 arg2);
+
+s32 func_8018692C(s32 arg0) {
+    extern s32 D_801E43CC[];
+    extern s32 D_801E4400[];
+
+    s32 count = 0;
+    s32 i = 0;
+    s32 *p = D_801E43CC;
+
+    for (; i < 13; i++, p++) {
+        if ((*p = func_8012C658(0x49, i, arg0)) == 0) {
+            count++;
+        }
+    }
+
+    i = 0;
+    p = D_801E4400;
+    for (; i < 6; i++, p++) {
+        if ((*p = func_8012C658(0x49, i + 13, arg0)) == 0) {
+            count++;
+        }
+    }
+
+    return count;
+}
+
 
 
 
diff --git a/src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c b/src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c
index 195fbdacf2..d6b05f3f72 100644
--- a/src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c
+++ b/src/ov_SC03_007/ov_SC03_007_jr_8017AE2C.c
@@ -8300,7 +8300,28 @@ void func_80184278(int param_1)
 
 INCLUDE_ASM("asm/ov_SC03_007/nonmatchings/ov_SC03_007_jr_8017AE2C", func_80184410);
 
-INCLUDE_ASM("asm/ov_SC03_007/nonmatchings/ov_SC03_007_jr_8017AE2C", func_80184500);
+extern void func_801846EC(s32 *param_1);
+extern u8 D_801E9D30[];
+
+void func_80184500(s32 param_1) {
+    s32 rec;
+    s32 val;
+
+    rec = (s32)(D_801E9D30 + *(s32 *)(param_1 + 0x34) * 0x40);
+    val = *(u8 *)rec;
+    val = val - 8;
+    if (val > 0) {
+        goto join;
+    }
+    func_801846EC(param_1);
+join:
+    if (val <= 0) {
+        return;
+    }
+    val = (val << 16 | val << 8) | val;
+    *(s32 *)rec = val;
+}
+
 
 INCLUDE_ASM("asm/ov_SC03_007/nonmatchings/ov_SC03_007_jr_8017AE2C", func_80184560);
 
diff --git a/src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c b/src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c
index 202af94add..d4f2867228 100644
--- a/src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c
+++ b/src/ov_SC03_030/ov_SC03_030_jr_8017AE2C.c
@@ -4051,7 +4051,31 @@ void func_8017DA4C(int param_1)
 
 INCLUDE_ASM("asm/ov_SC03_030/nonmatchings/ov_SC03_030_jr_8017AE2C", func_8017DA9C);
 
-INCLUDE_ASM("asm/ov_SC03_030/nonmatchings/ov_SC03_030_jr_8017AE2C", func_8017DAFC);
+typedef struct { u8 b[8]; } Blk8_8017DAFC;
+extern Blk8_8017DAFC D_801E06BC;
+extern u8 D_801858EC;
+extern void func_80019064(void *a0);
+extern s32 func_80171D78(s32 a0, s32 a1);
+extern void func_8017DFA0(s32 param_1);
+extern void func_80175414(s32 _arg0);
+extern void func_8016F264(void);
+extern s32 func_80171990(u8 *a0);
+
+void func_8017DAFC(void *a0) {
+    void *s0 = a0;
+    Blk8_8017DAFC buffer;
+
+    buffer = D_801E06BC;
+    func_80019064(&D_801858EC);
+    func_80171D78((s32)s0, (s32)&buffer);
+    func_8017DFA0((s32)s0);
+    if (--*(s32 *)((s32)s0 + 0x200) == -1) {
+        ((void (*)(void))func_80175414)();
+        func_8016F264();
+        func_80171990((u8 *)s0);
+    }
+}
+
 
 extern u8 D_801858EC;
 extern void func_80019064(void *a0);
diff --git a/src/ov_SC03_089/ov_SC03_089_jr_8017CA80.c b/src/ov_SC03_089/ov_SC03_089_jr_8017CA80.c
index a76a0865d4..52a1db741d 100644
--- a/src/ov_SC03_089/ov_SC03_089_jr_8017CA80.c
+++ b/src/ov_SC03_089/ov_SC03_089_jr_8017CA80.c
@@ -6222,7 +6222,47 @@ void func_80184D40(void *a0) {
 }
 
 
-INCLUDE_ASM("asm/ov_SC03_089/nonmatchings/ov_SC03_089_jr_8017CA80", func_80184D7C);
+void func_80184D7C(s32 param_1)
+{
+    extern void func_8012C1B8(void);
+    extern void func_8012CAE4(void *a0);
+    extern void func_8001C214(s32 a0, s32 a1);
+    extern s32 func_8012C194(void);
+    extern void func_8001CD9C(s32 a0, void *a1);
+    extern u8 D_801A4014;
+    extern u8 D_801A3B18;
+    extern u16 D_801A3B58[];
+
+    s32 obj;
+    s32 sub;
+    u16 t;
+
+    obj = ((s32 (*)(void))func_8012C1B8)();
+    *(s32 *)(param_1 + 0x20) = obj;
+    if (obj == 0) {
+        func_8012CAE4((void *)param_1);
+        return;
+    }
+
+    func_8001C214(obj, (s32)&D_801A4014);
+
+    sub = ((s32 (*)(void))func_8012C194)();
+    if (sub != 0) {
+        *(s32 *)(param_1 + 0xCC) = sub;
+        func_8001CD9C(sub, (void *)&D_801A3B18);
+        *(u16 *)(sub + 0x18) = 0x800;
+        *(u16 *)(sub + 0x1A) = 0x800;
+        *(u32 *)(sub + 4) |= 0x50000000;
+    }
+
+    *(u16 *)(*(s32 *)(param_1 + 0x20) + 0x2C) |= 0x20;
+    *(s32 *)(*(s32 *)(param_1 + 0x20) + 0x80) = (s32)D_801A3B58;
+
+    t = *(u16 *)(*(s32 *)(param_1 + 0x64) + 0x36);
+    *(s16 *)(param_1 + 2) = 1;
+    *(u16 *)(param_1 + 0xFE) = t;
+}
+
 
 
 typedef struct { s16 a, b, c; } SV3x_80184B30_80184E54;
diff --git a/src/ov_SC03_119/ov_SC03_119_jr_8017FB84.c b/src/ov_SC03_119/ov_SC03_119_jr_8017FB84.c
index c5efd60eaa..a726a6221a 100644
--- a/src/ov_SC03_119/ov_SC03_119_jr_8017FB84.c
+++ b/src/ov_SC03_119/ov_SC03_119_jr_8017FB84.c
@@ -4427,7 +4427,37 @@ DEFINE_func_801838A4()  /* dedup: shared engine-core @0x801838A4 (src/shared) */
 DEFINE_func_801838E0()  /* dedup: shared engine-core @0x801838E0 (src/shared) */
 
 
-INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_8018391C);
+void func_8018391C(void *a0)
+{
+    extern void func_8012C1B8(void);
+    extern void func_8012CAE4(void *a0);
+    extern void func_8001CA1C(s32, s32);
+    extern s32 func_8012A828(void*, void*);
+    extern s32 rand(void);
+    extern u8 D_8018E160;
+    extern u8 D_8018E1C0;
+
+    register s32 s0 __asm__("$16");
+    s32 v0;
+
+    v0 = ((s32 (*)(void))func_8012C1B8)();
+    s0 = (s32)a0;
+    *(s32 *)(s0 + 0x20) = v0;
+    if (v0 == 0) {
+        func_8012CAE4((void *)s0);
+    } else {
+        ((void (*)(s32, void *))func_8001CA1C)(v0, &D_8018E160);
+        ((s32 (*)(s32, void *))func_8012A828)(s0, &D_8018E1C0);
+        *(s32 *)(s0 + 0x94) = rand() & 7;
+        *(u16 *)(s0 + 2) = 1;
+        *(s16 *)(*(s32 *)(s0 + 0x20) + 0x18) = (rand() >> 3) + 0x2000;
+        *(u16 *)(*(s32 *)(s0 + 0x20) + 0x1A) = 0x2000;
+        *(u16 *)(*(s32 *)(s0 + 0x20) + 0x2C) |= 0x10;
+        *(u32 *)(*(s32 *)(s0 + 0x20) + 4) |= 0x8000000;
+        *(u16 *)(*(s32 *)(s0 + 0x20) + 0x14) = rand() & 0xFFF;
+    }
+}
+
 
 void func_801839F4(s32 param_1) {
     if ((func_80029178(0xB8) & 0xFF) != 0) {
@@ -5328,7 +5358,22 @@ void func_80185550(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
 }
 
 
-INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017FB84", func_801855F0);
+void func_801855F0(s32 arg0, s32 arg1, s32 arg2) {
+    /* [T51] scoped in from file scope: a file-scope decl of these symbols constrains every
+       LATER function in this TU, which blocks a byte-true decl of a different type
+       (func_80185698 below declares D_801D4472 as s32 at block scope).
+       Declaration-only move (cookbook §103); the whole-binary byte-gate is the arbiter. */
+    extern s16 D_801D446C;
+    extern s16 D_801D446E;
+    extern s16 D_801D4470;
+    extern s16 D_801D4472;
+
+    D_801D446C = *(u16 *)((s32)arg0 + 0x0);
+    D_801D446E = *(u16 *)((s32)arg0 + 0x2);
+    D_801D4470 = arg1;
+    D_801D4472 = arg2;
+}
+
 
 
 
diff --git a/src/ov_SC04_003/ov_SC04_003_jr_8017BEBC.c b/src/ov_SC04_003/ov_SC04_003_jr_8017BEBC.c
index ab444545b8..11450f430a 100644
--- a/src/ov_SC04_003/ov_SC04_003_jr_8017BEBC.c
+++ b/src/ov_SC04_003/ov_SC04_003_jr_8017BEBC.c
@@ -3925,7 +3925,28 @@ void func_8017E040(void *a0) {
 }
 
 
-INCLUDE_ASM("asm/ov_SC04_003/nonmatchings/ov_SC04_003_jr_8017BEBC", func_8017E07C);
+void func_8017E07C(void *a0, s32 a1) {
+    extern s32 func_8012C51C(void *a0, s32 a1);
+    struct S80143BDC { s16 f0, f2, f4, f6, f8, fA, fC, fE; s32 f10; } sp;
+
+    if (a0 != 0 && *(u16 *)a0 != 0) {
+        sp.f0 = *(u16 *)((s32)a0 + 0x6);
+        sp.f2 = *(u16 *)((s32)a0 + 0xA);
+        sp.f4 = *(u16 *)((s32)a0 + 0xE);
+    } else {
+        sp.f4 = 0;
+        sp.f2 = 0;
+        sp.f0 = 0;
+    }
+    sp.f6 = 0x8E;
+    sp.fE = 0;
+    sp.fA = 0;
+    sp.f8 = 0;
+    sp.f10 = *(s32 *)((s32)a0 + 0xDC);
+    sp.fC = a1;
+    func_8012C51C(&sp, (s32)a0);
+}
+
 
 typedef struct { s16 m[3][3]; s32 t[3]; } MTX_8017D7C0_8017F19C_8018259C_8017E108; /* 0x20 bytes, align 4 */
 typedef struct { short a, b, c; } SV3_80181D44_8017CEF4_8017E108;   /* == the TU's own `SV3` (engine_types.h:612); renamed only because
diff --git a/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c b/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c
index 68a3810a41..c19454f743 100644
--- a/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c
+++ b/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c
@@ -6096,7 +6096,43 @@ INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_80183D0
 
 INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_80183DF8);
 
-INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_80183E20);
+/* §183/§200 DEF+DATA asm-label aliases: the TU prototypes this fn `extern s32
+   func_80183E20(s32);` (L5706) and declares D_801EFD24 `extern s32` (L7727);
+   both spellings conflict with the byte-true body (void(void*), u16 counter),
+   so bind private identifiers to the same symbols -- zero declaration surface. */
+void aF80183E20(void *a0) __asm__("func_80183E20");
+void aF80183E20(void *a0) {
+    extern u16 D_801EFD40;
+    extern u16 aEFD24 __asm__("D_801EFD24");
+    u16 flags;
+    u16 cnt;
+    s32 v0;
+    s32 v1;
+    s32 v1b;
+    flags = D_801EFD40;
+    if (flags & 0x80) {
+        v0 = *(u16 *)((u8 *)a0 + 0x76);
+        v1 = *(u16 *)((u8 *)a0 + 0x60);
+        *(u16 *)((u8 *)a0 + 0x60) = 0;
+        v0 = v0 - v1;
+        *(u16 *)((u8 *)a0 + 0x76) = v0;
+        __asm__("":::"memory");
+        v1b = *(s16 *)((u8 *)a0 + 0x76);
+        D_801EFD40 = flags & 0xFF7F;
+        if (v1b < 0) {
+            *(u16 *)((u8 *)a0 + 0x76) = 0;
+        }
+    }
+    cnt = aEFD24;
+    if (cnt != 0) {
+        cnt = cnt - 1;
+        aEFD24 = cnt;
+        if (cnt == 0) {
+            func_80186AB8();
+        }
+    }
+}
+
 
 INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_80183EA8);