diff --git a/config/overlays.mk b/config/overlays.mk
index 964707790..056fca266 100644
--- a/config/overlays.mk
+++ b/config/overlays.mk
@@ -1590,7 +1590,8 @@ build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o: JTBL_PADS := 0,4  # §8e pads (
 build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o: JTBL_PADS := 0,4  # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
 build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o: JTBL_PADS := 0,0  # §8e pads (jtbl_carve.py) tables=+0x0,+0x20
 build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o: JTBL_PADS := 0,0  # §8e pads (jtbl_carve.py) tables=+0x0,+0x178
-build/src/ov_SC03_015/ov_SC03_015_jr_80185B44.o: JTBL_PADS := 0,0,0  # §8e pads (jtbl_carve.py) tables=+0x0,+0x20,+0x38 (S62 T2a: order re-aligned to the yaml after the 17:43 mk restore)
+build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o: JTBL_PADS := 0,0  # §8e pads (jtbl_carve.py) tables=+0x0,+0x14
+build/src/ov_SC03_015/ov_SC03_015_jr_80185B44.o: JTBL_PADS := 0,0,0  # §8e pads (jtbl_carve.py) tables=+0x0,+0x20,+0x38
 build/src/ov_SC03_015/ov_SC03_015_o0e.o: JTBL_PADS := 0,4,4,4  # §8e pads (jtbl_carve.py) tables=+0x0,+0x38,+0xa8,+0x118
 ov_SC03_015_CHECK_SHA  := config/check.ov_SC03_015.sha
 ov_SC03_015_SYMBOLS    := config/symbols.ov_SC03_015.txt
diff --git a/config/splat.ov_SC03_015.yaml b/config/splat.ov_SC03_015.yaml
index f3c839c6a..d048362ae 100644
--- a/config/splat.ov_SC03_015.yaml
+++ b/config/splat.ov_SC03_015.yaml
@@ -168,7 +168,7 @@ segments:
       - [0xc10e0, .rodata, ov_SC03_015_jr_8017A4AC]  # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
       - [0xc116c, data, tail17]
       - [0xc1170, .rodata, ov_SC03_015_jr_8017AE2C]  # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
-      - [0xc1184, data, tail18]
+      - [0xc1198, data, tail18]
       - [0xc11b0, .rodata, ov_SC03_015_jr_8017EB7C]  # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
       - [0xc11d0, data, tail19]
       - [0xc1308, .rodata, ov_SC03_015_jr_80184F14]  # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py)
diff --git a/phase-ends/CURRENT_PHASE.md b/phase-ends/CURRENT_PHASE.md
index 2f4065048..04eb0c3d6 100644
--- a/phase-ends/CURRENT_PHASE.md
+++ b/phase-ends/CURRENT_PHASE.md
@@ -2299,3 +2299,16 @@ HEAD commit:3078).
   targets — re-judge the 54 carve-refused under the new comparer before the carver spends builds.
 
 **NEXT: T2a** — red surgery ov_SC03_015 (Max, solo).
+
+**T2a DONE (ov_SC03_015 GREEN, red 5 → 4, +7 banks).** Two defects, one cause: the 17:43 (08-25)
+"RESTORE overlays.mk" blanket-restore resurrected the 06:58-era `_JTBL_INTERLEAVE` order (data
+`tail20` wedged BETWEEN the jr_80184F14 and jr_80185B44 carves + a phantom `tail21`) after wave de
+(11:17) had merged the carves in the yaml → `make extract` died (`tail21.data.o` not found) and no
+JTBL_PADS value could ever win the S61 search (the order was wrong, not the pads). Retail words at
+0xc1308–0xc139c read as 12 | 8 | 6 | 11 entries: jr_80184F14's table, then jr_80185B44's three
+(func_80185B44 / func_801874C0 / func_80187884) — exactly the 3 `.align 3` tables the TU now emits.
+Fix: order re-aligned to the yaml, pads `0,0,0` (`commit:3084`); R22 clean rebuild byte-identical
+(`d84b01a2`); then the 7 resolver drafts it held gated 7/7 (the gate's own §8a carve for the new
+switch fns updated yaml+mk; re-verified clean). Lesson for R59: a blanket restore of overlays.mk
+must be diffed against every yaml it describes (order ⇔ subseg sequence) — `tools/`-worthy check.
+**NEXT: T2b** — ov_SC03_024 (+4 rodata shift in jr_8017AE2C.o; Max, solo).
diff --git a/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.c b/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.c
index 04b7843e9..ef44ca375 100644
--- a/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.c
+++ b/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.c
@@ -3392,7 +3392,23 @@ void func_8017C0C8(void *a0) {
 }
 
 
-INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_8017AE2C", func_8017C104);
+
+
+void func_8017C104(a0)
+u8 *a0;
+{
+    s32 frame_pad[10];
+    u16 v1;
+    u16 v0;
+    (void)&frame_pad;
+    v1 = *(u16 *)(a0 + 0x2);
+    v0 = *(u16 *)(a0 + 0xE);
+    v1 += 0x1;
+    v0 += 0x10;
+    *(u16 *)(a0 + 0xE) = v0;
+    *(u16 *)(a0 + 0x2) = v1;
+}
+
 
 extern void func_8017C154();
 void func_8017C12C(void) {
@@ -4432,7 +4448,30 @@ void func_8017D804(s32 param) {
 }
 
 
-INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_8017AE2C", func_8017D890);
+extern u8 D_801EA884;
+extern u8 D_801EA885;
+extern u8 D_801EA886;
+
+void func_8017D890(arg0, a1)
+void *arg0;
+void *a1;
+{
+    s16 var;
+
+    a1 = *(void **)((s32)arg0 + 0x20);
+    var = *(u16 *)((s32)a1 + 0x1A) + 0x200;
+    *(u16 *)((s32)a1 + 0x1A) = var;
+    *(u16 *)((s32)a1 + 0x18) = var;
+    if (var >= 0x1001) {
+        D_801EA884 = 0xFF;
+        D_801EA885 = 0xFF;
+        D_801EA886 = 0xFF;
+        *(u16 *)((s32)a1 + 0x1A) = 0x1000;
+        *(u16 *)((s32)a1 + 0x18) = 0x1000;
+        *(u16 *)((s32)arg0 + 2) = *(u16 *)((s32)arg0 + 2) + 1;
+    }
+}
+
 
 
 /* func_8017D900 — fade the 4-byte colour quad at D_801EA880 one step toward 0
@@ -4585,7 +4624,29 @@ void func_8017DC28(void *a0) {
 
 DEFINE_func_8017DC4C()  /* dedup: shared engine-core @0x8017DC4C (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_8017AE2C", func_8017DCC0);
+extern s16 D_80126B3A;
+extern s16 D_80126B3C;
+extern void func_80171A1C(u8 *a0);
+extern void func_8017C624(void *a0, s32 a1, s32 a2);
+
+void func_8017DCC0(a0)
+u8 *a0;
+{
+    s32 v;
+    if (*(u16 *)(a0 + 0xB8) & 0x8000) {
+        switch ((s16)(*(u16 *)&D_80126B3A - 2)) {
+        case 0: v = 0; break;
+        case 1: v = 1; break;
+        case 2: v = 2; break;
+        case 3: v = 3; break;
+        case 4: v = 4; break;
+        }
+        D_80126B3C = v;
+        func_8017C624(a0, -0x60, v);
+        func_80171A1C(a0);
+    }
+}
+
 
 DEFINE_func_8017DD74()  /* dedup: shared engine-core @0x8017DD74 (src/shared) */
 
diff --git a/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.c b/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.c
index 4ec973005..f509b4c21 100644
--- a/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.c
+++ b/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.c
@@ -3611,7 +3611,21 @@ DEFINE_func_801805BC()  /* dedup: shared engine-core @0x801805BC (src/shared) */
 
 DEFINE_func_801805F8()  /* dedup: shared engine-core @0x801805F8 (src/shared) */
 
-INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_8017EB7C", func_80180638);
+extern s32 func_80171990(u8 *a0);
+extern void func_801466F0(s32 a0, s32 a1, s32 a2, s32 a3, s32 sp5, s32 sp6, s32 sp7, s32 sp8);
+extern void func_80147324(s32 arg0);
+
+void func_80180638(arg0)
+void *arg0;
+{
+    if (*(u16 *)((s32)arg0 + 0xB8) & 0x4000) {
+        *(s32 *)((s32)arg0 + 0x44) |= 0x20000;
+        func_801466F0(0x16, (s32)arg0, 0, -0x80, -0x10, 0, 0, 0);
+        func_80147324(0x7BC);
+        func_80171990((u8 *)arg0);
+    }
+}
+
 
 extern s32 func_8014C088(s32 a0, s32 a1);
 extern s32 func_8014CB58(void);
@@ -3871,7 +3885,38 @@ void func_80180C34(s32 p) {
 }
 
 
-INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_8017EB7C", func_80180CF8);
+extern s32 func_80146E98(s32 a0);
+extern void func_80162CCC(void);
+
+void func_80180CF8(arg0)
+s32 arg0;
+{
+    s32 tbl;
+    s32 obj;
+    u16 t1;
+    u16 t2;
+
+    tbl = *(s32 *)(arg0 + 0x4C);
+    obj = *(s32 *)(arg0 + 0x20);
+    if (func_80146E98(arg0) != 0) {
+        t1 = *(u16 *)(obj + 0x1C) + 0x400;
+        *(s16 *)(obj + 0x1C) = t1;
+        *(s16 *)(obj + 0x18) = t1;
+        if ((s16)t1 >= 0x7001) {
+            *(s16 *)(obj + 0x1C) = 0x7000;
+            *(s16 *)(obj + 0x18) = 0x7000;
+        }
+        t2 = *(u16 *)(obj + 0x1A) + 0x100;
+        *(s16 *)(obj + 0x1A) = t2;
+        if ((s16)t2 >= 0x7001) {
+            *(s16 *)(obj + 0x1A) = 0x7000;
+        }
+    }
+    if (*(u16 *)tbl != 0x16) {
+        ((void (*)(s32))func_80162CCC)(arg0);
+    }
+}
+
 
 
 
diff --git a/src/ov_SC03_015/ov_SC03_015_jr_80185B44.c b/src/ov_SC03_015/ov_SC03_015_jr_80185B44.c
index 94f21b0ff..f2b49832e 100644
--- a/src/ov_SC03_015/ov_SC03_015_jr_80185B44.c
+++ b/src/ov_SC03_015/ov_SC03_015_jr_80185B44.c
@@ -4207,7 +4207,41 @@ void func_80188F28(s32 a0) {
 
 INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_80185B44", func_80188F80);
 
-INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_80185B44", func_80188FB4);
+
+
+int func_80188FB4(int a0, void* a1)
+{
+    s16 stack_buf[8];
+    register s16 *s0 __asm__("$16") = (s16 *)a1;
+    s16 v0;
+    s32 result;
+    s32 ret;
+
+    v0 = s0[2];
+    stack_buf[0] = v0;
+    v0 = s0[3];
+    stack_buf[4] = v0;
+    v0 = s0[5];
+    stack_buf[5] = v0;
+    stack_buf[1] = v0;
+    v0 = s0[6];
+    stack_buf[6] = v0;
+    stack_buf[2] = v0;
+
+    result = func_80189050((s32)a0, (s32)&stack_buf[0], (s32)&stack_buf[4]);
+
+    if (result != 0) {
+        ret = 1;
+    } else {
+        v0 = s0[7];
+        stack_buf[6] = v0;
+        stack_buf[2] = v0;
+        result = func_80189050((s32)a0, (s32)&stack_buf[0], (s32)&stack_buf[4]);
+        ret = (result != 0);
+    }
+    return ret;
+}
+
 
 extern s32 *D_80126B78;
 extern s32 *D_80126B90;
@@ -4324,7 +4358,24 @@ DEFINE_func_801892E4()  /* dedup: shared engine-core @0x801892E4 (src/shared) */
 
 INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_80185B44", func_80189310);
 
-INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_80185B44", func_801893BC);
+extern int func_80178970(void);
+extern s32 func_8012BEE8(s32 a0);
+extern s32 func_8012C658(s32 arg0, s32 arg1, s32 arg2);
+
+void func_801893BC(a0)
+s32 a0;
+{
+    if (func_8012BEE8(a0) == 0) {
+        if ((*(s32 *)(a0 + 0x1C) & 3) == 0) {
+            func_8012C658(0x2b4, 1, a0);
+        }
+    }
+    if (*(s16 *)(a0 + 0x98) == 0) {
+        func_80188C0C(a0);
+    }
+    ((s32 (*)(s32))func_80178970)(a0);
+}
+
 
 DEFINE_func_8018942C()  /* dedup: shared engine-core @0x8018942C (src/shared) */