From c91c9dffeed099b609bade39e462d6c0088a7363 Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Thu, 3 Sep 2026 19:18:12 -0600 Subject: [PATCH] =?UTF-8?q?feat(decomp):=20parallel=20gate=20=E2=80=94=201?= =?UTF-8?q?2=20fns=20across=2012=20binaries=20(8=20workers)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ov_SC03_111 func_80181344 ov_SC01_006 func_8017FBCC ov_SC02_041 func_801832F8 ov_SC03_124 func_8018095C ov_SC01_005 func_8017FBCC ov_SC04_002 func_80182CBC ov_SC03_105 func_8017F018 ov_SC04_005 func_80185CEC ov_SC04_007 func_80182358 ov_SC04_011 func_8018985C ov_SC05_018 func_80181294 ov_SC05_003 func_80181720 --- src/ov_SC01_005/ov_SC01_005_jr_8017ED5C.c | 80 ++++++++++++++++++- src/ov_SC01_006/ov_SC01_006_jr_8017ED5C.c | 80 ++++++++++++++++++- src/ov_SC02_041/ov_SC02_041_jr_8017BEBC.c | 58 +++++++++++++- src/ov_SC03_105/ov_SC03_105_jr_8017C8D0.c | 25 +++++- src/ov_SC03_111/ov_SC03_111_jr_8017EC58.c | 39 +++++++++- src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c | 42 +++++++++- src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c | 15 +++- src/ov_SC04_005/ov_SC04_005_jr_8017BEBC.c | 52 ++++++++++++- src/ov_SC04_007/ov_SC04_007_jr_8017BEBC.c | 52 ++++++++++++- src/ov_SC04_011/ov_SC04_011_jr_8017D494.c | 58 +++++++++++++- src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c | 94 ++++++++++++++++++++++- src/ov_SC05_018/ov_SC05_018_jr_8017D604.c | 30 +++++++- 12 files changed, 613 insertions(+), 12 deletions(-) diff --git a/src/ov_SC01_005/ov_SC01_005_jr_8017ED5C.c b/src/ov_SC01_005/ov_SC01_005_jr_8017ED5C.c index 4ca926f31..f32163f1e 100644 --- a/src/ov_SC01_005/ov_SC01_005_jr_8017ED5C.c +++ b/src/ov_SC01_005/ov_SC01_005_jr_8017ED5C.c @@ -3347,7 +3347,85 @@ s32 func_8017F9F8(s32 a0in) { } -INCLUDE_ASM("asm/ov_SC01_005/nonmatchings/ov_SC01_005_jr_8017ED5C", func_8017FBCC); +extern s32 D_80126B58; +extern void func_8014BB24(s32 a0, s32 a1, s32 a2); +extern void func_8014B944(s32 a0, s32 a1, s32 a2); +extern void func_8014B00C(s32 a0); +extern void func_80029344(void); +extern void func_8014BD24(s32 a0, s32 a1); +extern void func_8017FD50(s32 a0); +extern s32 func_801621CC(s32 a0); +extern void func_801622C4(void); + +void func_8017FBCC(s32 arg0) { + s32 addr; + s32 v0; + s32 v1; + s32 t108; + s32 pad[6]; + + addr = (s32)&D_80126B58; + v0 = *(s16 *)(arg0 + 0x10A); + if (v0 != 0) { + register s32 zr __asm__("$0"); + v1 = v0 + zr; + v0 = v1 - 1; + *(s16 *)(arg0 + 0x10A) = v0; + v1 = (v0 << 0x10) >> 0x10; + if (v1 >= 0x40) { + v1 = *(s16 *)(arg0 + 0x108); + { + register s32 zr2 __asm__("$0"); + t108 = v1 + zr2; + } + v0 = 0xFF; + if (v1 != v0) { + v0 = t108 + 0x11; + *(s16 *)(arg0 + 0x108) = v0; + if (((v0 << 0x10) >> 0x10) >= 0x100) { + v0 = 0xFF; + *(s16 *)(arg0 + 0x108) = v0; + } + } else { + v0 = *(u16 *)(arg0 + 0x106); + v0 += 0x11; + *(u16 *)(arg0 + 0x106) = v0; + if (((v0 << 0x10) >> 0x10) >= 0x100) { + *(u16 *)(arg0 + 0x106) = 0xFF; + } + } + } else if (v1 < 0x20) { + v0 = *(s16 *)(arg0 + 0x106); + if (v0 != 0) { + register s32 zr3 __asm__("$0"); + v1 = v0 + zr3; + v0 = v1 - 0x11; + *(s16 *)(arg0 + 0x106) = v0; + if ((v0 << 0x10) < 0) { + *(s16 *)(arg0 + 0x106) = 0; + } + } else { + v0 = *(u16 *)(arg0 + 0x108); + v0 -= 0x11; + *(u16 *)(arg0 + 0x108) = v0; + if ((v0 << 0x10) < 0) { + *(u16 *)(arg0 + 0x108) = 0; + } + } + } else if (v1 == 0x30) { + func_8014BB24(addr, 0x3E7, 1); + func_8014B944(addr, 0x1000000, 1); + func_8014B00C(8); + func_80029344(); + func_8014BD24(addr, 0x3E7); + } + func_8017FD50(arg0); + if ((*(s16 *)(arg0 + 0x10A) == 0) && (func_801621CC(8) != 0)) { + func_801622C4(); + } + } +} + typedef struct { u32 addr : 24; u32 len : 8; } PTag_8017FD50; typedef struct { u32 *ot; u32 pad[4]; } Env_8017FD50; diff --git a/src/ov_SC01_006/ov_SC01_006_jr_8017ED5C.c b/src/ov_SC01_006/ov_SC01_006_jr_8017ED5C.c index df9907ec2..a262a3614 100644 --- a/src/ov_SC01_006/ov_SC01_006_jr_8017ED5C.c +++ b/src/ov_SC01_006/ov_SC01_006_jr_8017ED5C.c @@ -3346,7 +3346,85 @@ s32 func_8017F9F8(s32 a0in) { } -INCLUDE_ASM("asm/ov_SC01_006/nonmatchings/ov_SC01_006_jr_8017ED5C", func_8017FBCC); +extern s32 D_80126B58; +extern void func_8014BB24(s32 a0, s32 a1, s32 a2); +extern void func_8014B944(s32 a0, s32 a1, s32 a2); +extern void func_8014B00C(s32 a0); +extern void func_80029344(void); +extern void func_8014BD24(s32 a0, s32 a1); +extern void func_8017FD50(s32 a0); +extern s32 func_801621CC(s32 a0); +extern void func_801622C4(void); + +void func_8017FBCC(s32 arg0) { + s32 addr; + s32 v0; + s32 v1; + s32 t108; + s32 pad[6]; + + addr = (s32)&D_80126B58; + v0 = *(s16 *)(arg0 + 0x10A); + if (v0 != 0) { + register s32 zr __asm__("$0"); + v1 = v0 + zr; + v0 = v1 - 1; + *(s16 *)(arg0 + 0x10A) = v0; + v1 = (v0 << 0x10) >> 0x10; + if (v1 >= 0x40) { + v1 = *(s16 *)(arg0 + 0x108); + { + register s32 zr2 __asm__("$0"); + t108 = v1 + zr2; + } + v0 = 0xFF; + if (v1 != v0) { + v0 = t108 + 0x11; + *(s16 *)(arg0 + 0x108) = v0; + if (((v0 << 0x10) >> 0x10) >= 0x100) { + v0 = 0xFF; + *(s16 *)(arg0 + 0x108) = v0; + } + } else { + v0 = *(u16 *)(arg0 + 0x106); + v0 += 0x11; + *(u16 *)(arg0 + 0x106) = v0; + if (((v0 << 0x10) >> 0x10) >= 0x100) { + *(u16 *)(arg0 + 0x106) = 0xFF; + } + } + } else if (v1 < 0x20) { + v0 = *(s16 *)(arg0 + 0x106); + if (v0 != 0) { + register s32 zr3 __asm__("$0"); + v1 = v0 + zr3; + v0 = v1 - 0x11; + *(s16 *)(arg0 + 0x106) = v0; + if ((v0 << 0x10) < 0) { + *(s16 *)(arg0 + 0x106) = 0; + } + } else { + v0 = *(u16 *)(arg0 + 0x108); + v0 -= 0x11; + *(u16 *)(arg0 + 0x108) = v0; + if ((v0 << 0x10) < 0) { + *(u16 *)(arg0 + 0x108) = 0; + } + } + } else if (v1 == 0x30) { + func_8014BB24(addr, 0x3E7, 1); + func_8014B944(addr, 0x1000000, 1); + func_8014B00C(8); + func_80029344(); + func_8014BD24(addr, 0x3E7); + } + func_8017FD50(arg0); + if ((*(s16 *)(arg0 + 0x10A) == 0) && (func_801621CC(8) != 0)) { + func_801622C4(); + } + } +} + typedef struct { u32 addr : 24; u32 len : 8; } PTag_8017FD50; diff --git a/src/ov_SC02_041/ov_SC02_041_jr_8017BEBC.c b/src/ov_SC02_041/ov_SC02_041_jr_8017BEBC.c index 9aff2e2d8..6262f71ee 100644 --- a/src/ov_SC02_041/ov_SC02_041_jr_8017BEBC.c +++ b/src/ov_SC02_041/ov_SC02_041_jr_8017BEBC.c @@ -8031,7 +8031,63 @@ s32 func_8018317C(s32 a0) { } -INCLUDE_ASM("asm/ov_SC02_041/nonmatchings/ov_SC02_041_jr_8017BEBC", func_801832F8); + + + + + + +extern void func_8012EFB8(s32 a0); +extern void func_8002D4C8(s32 a0, s32 a1); +extern s32 func_800132BC(s32 a0, s32 a1); +extern s32 D_80126B58; + +s32 func_801832F8(s32 a0, u16 a1) { + s16 sp10[4]; + s16 sp18[4]; + s16 sp20[4]; + s16 sp28[4]; + s16 pan; + s16 vol; + s32 v; + s32 d; + u16 *p; + + p = (u16 *)&D_80126B58; + pan = 7; + vol = 0x7F; + sp10[0] = *(u16 *)(a0 + 0x6); + sp10[1] = *(u16 *)(a0 + 0xA); + sp10[2] = *(u16 *)(a0 + 0xE); + ((void (*)(s16 *, s16 *))func_8012EFB8)(sp10, sp18); + sp18[2] = 0; + __asm__("" : "=r"(pan) : "0"(pan)); + + v = sp18[0]; + if (v < 0) v = -v; + if (v >= 0xA0) return 0; + + if (sp18[1] >= 0 ? sp18[1] >= 0x78 : -sp18[1] >= 0x78) return 0; + + pan += sp18[0] / 20; + if (pan < 0) pan = 0; + else if (pan >= 0x10) pan = 0xF; + + sp20[0] = p[3]; + sp20[1] = p[5]; + sp20[2] = p[7]; + ((void (*)(s16 *, s16 *))func_8012EFB8)(sp20, sp28); + sp28[2] = 0; + + d = ((s32 (*)(s16 *, s16 *))func_800132BC)(sp18, sp28) - 0x100; + if (d > 0) { + vol -= (d * 127) / 25600; + if (vol < 0) vol = 0; + } + func_8002D4C8(a1, (u16)(vol | ((pan << 8) | 0x3000))); + return 1; +} + extern void (*D_801AD37C[])(void); diff --git a/src/ov_SC03_105/ov_SC03_105_jr_8017C8D0.c b/src/ov_SC03_105/ov_SC03_105_jr_8017C8D0.c index 680ea7c67..0cbd61ba2 100644 --- a/src/ov_SC03_105/ov_SC03_105_jr_8017C8D0.c +++ b/src/ov_SC03_105/ov_SC03_105_jr_8017C8D0.c @@ -4211,7 +4211,30 @@ void func_8017EF94(s32 a0) } -INCLUDE_ASM("asm/ov_SC03_105/nonmatchings/ov_SC03_105_jr_8017C8D0", func_8017F018); +extern void func_8012F14C(s32 a0, s32 a1, s32 a2); +extern s32 func_80135888(s32 a0, s32 a1, s32 a2, s32 a3); +extern void func_8012F568(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4, s32 a5); +extern s32 *D_80126B78; +extern s32 D_8018E138; +extern u8 D_801152A8[]; + +s32 func_8017F018(s32 a0) { + s16 out1[4]; + s16 out2[4]; + s32 iVar1; + + func_8012F14C((s32)D_80126B78 + 0x34, (s32)&D_8018E138, (s32)out1); + func_8012F14C((s32)D_80126B78 + 0x34, (s32)&D_8018E138 + 8, (s32)out2); + + iVar1 = func_80135888(*(s32 *)(a0 + 0x20), *(s32 *)(a0 + 0x58), (s32)out1, (s32)out2); + + if (iVar1 != 0) { + func_8012F568(1, 0x4201, 0, 0x30, (s32)out2, (s32)D_801152A8); + return 1; + } + return 0; +} + void func_8017F0C8(s32 a0, s32 a1) { *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) = *(u16 *)(a0 + 0xFC); diff --git a/src/ov_SC03_111/ov_SC03_111_jr_8017EC58.c b/src/ov_SC03_111/ov_SC03_111_jr_8017EC58.c index c7b2dfb8e..b08f57e01 100644 --- a/src/ov_SC03_111/ov_SC03_111_jr_8017EC58.c +++ b/src/ov_SC03_111/ov_SC03_111_jr_8017EC58.c @@ -4047,7 +4047,44 @@ extern void func_80181344(void); } -INCLUDE_ASM("asm/ov_SC03_111/nonmatchings/ov_SC03_111_jr_8017EC58", func_80181344); +//@EDIT extern s32 func_80181344(void);||extern void func_80181344(void); +extern void func_80181470(void *a0, s32 a1); +extern s32 D_801B9888; +extern s32 D_801B988C; +extern s32 D_801B9AFC; +extern u8 D_801B1114[]; +extern u8 D_801B1174[]; +extern u8 D_801B11D4[]; +extern u8 D_801B1234[]; +extern u8 D_801B1294[]; +extern u8 D_801B12F4[]; +extern u8 D_801B1354[]; + +void func_80181344(void) { + s32 temp; + switch (D_801B9AFC) { + case 0: + D_801B9888 = 1; + D_801B988C = 0; + D_801B9AFC = 1; + break; + case 1: + if (--D_801B9888 == 0) { + D_801B9888 = 4; + temp = D_801B988C * 6; + func_80181470(D_801B1114, temp); + func_80181470(D_801B1174, temp); + func_80181470(D_801B11D4, temp); + func_80181470(D_801B1234, temp); + func_80181470(D_801B1294, temp); + func_80181470(D_801B12F4, temp); + func_80181470(D_801B1354, temp); + D_801B988C = (D_801B988C + 1) & 7; + } + break; + } +} + void func_80181470(void *a0, s32 a1) diff --git a/src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c b/src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c index fb3382a0e..4a8d9999d 100644 --- a/src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c +++ b/src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c @@ -6569,7 +6569,47 @@ void *arg0; } -INCLUDE_ASM("asm/ov_SC03_124/nonmatchings/ov_SC03_124_jr_8017AE2C", func_8018095C); +extern s32 D_80126B58; +extern s32 D_80126B9C; +extern u16 D_80126B5E; +extern u16 D_80126B66; +extern short D_8018FC3C; +extern s32 func_800133E4(s16 *a0, s16 *a1); +extern s32 func_80178BF8(); +extern void func_80172710(void); + +s32 func_8018095C(void *a0) +{ + s16 *p; + s32 r; + + if (*(u16 *)(*(s32 *)((s32)a0 + 0x64) + 0x2) != 1) { + return 0; + } + p = (s16 *)&D_80126B58; + if ((D_80126B9C & 0x8000000) == 0) { + r = 0; + goto chain_fail; + } + p += 2; + if (func_800133E4((s16 *)&D_8018FC3C, p) >= 0x6401) { + r = 0; + goto chain_fail; + } + if (*(s16 *)&D_80126B5E >= 0x281) { + r = 0; + goto chain_fail; + } + r = *(s16 *)&D_80126B66 >= -0x380; +chain_fail: + if (r) { + *(u16 *)(*(s32 *)((s32)a0 + 0x64) + 0x2) = 2; + func_80178BF8(); + return (s32)func_80172710; + } + return 0; +} + extern void (*D_8018FE1C[])(void); diff --git a/src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c b/src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c index dd74dfd03..c41ab7151 100644 --- a/src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c +++ b/src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c @@ -7667,7 +7667,20 @@ void func_80182C5C(void *a0) { } -INCLUDE_ASM("asm/ov_SC04_002/nonmatchings/ov_SC04_002_jr_8017BEBC", func_80182CBC); +extern s32 func_8012B6D4(s16 *a0, s16 *a1); + +void func_80182CBC(s32 a0, void *a1) +{ + if ((*(u16 *)(a1 + 0x5C) & 0x8000) != 0) { + if (*(u16 *)(a1 + 0x5E) != 0x1D) { + *(u16 *)(a1 + 0x5C) = *(u16 *)(a1 + 0x5C) | 1; + *(u16 *)(a1 + 0x60) = 0xa; + *(u16 *)(a1 + 0x62) = func_8012B6D4((s16 *)(a1 + 4), (s16 *)(a0 + 4)); + *(u16 *)(a1 + 0x5E) = 0x1D; + } + } +} + #include "common.h" diff --git a/src/ov_SC04_005/ov_SC04_005_jr_8017BEBC.c b/src/ov_SC04_005/ov_SC04_005_jr_8017BEBC.c index cfc02b174..68fe5c918 100644 --- a/src/ov_SC04_005/ov_SC04_005_jr_8017BEBC.c +++ b/src/ov_SC04_005/ov_SC04_005_jr_8017BEBC.c @@ -9854,7 +9854,57 @@ s32 func_80185B70(s32 a0) { } -INCLUDE_ASM("asm/ov_SC04_005/nonmatchings/ov_SC04_005_jr_8017BEBC", func_80185CEC); +extern void func_8012EFB8(s32 a0); +extern void func_8002D4C8(s32 a0, s32 a1); +extern s32 func_800132BC(s32 a0, s32 a1); +extern s32 D_80126B58; + +s32 func_80185CEC(s32 a0, u16 a1) { + s16 sp10[4]; + s16 sp18[4]; + s16 sp20[4]; + s16 sp28[4]; + s16 pan; + s16 vol; + s32 v; + s32 d; + u16 *p; + + p = (u16 *)&D_80126B58; + pan = 7; + vol = 0x7F; + sp10[0] = *(u16 *)(a0 + 0x6); + sp10[1] = *(u16 *)(a0 + 0xA); + sp10[2] = *(u16 *)(a0 + 0xE); + ((void (*)(s16 *, s16 *))func_8012EFB8)(sp10, sp18); + sp18[2] = 0; + __asm__("" : "=r"(pan) : "0"(pan)); + + v = sp18[0]; + if (v < 0) v = -v; + if (v >= 0xA0) return 0; + + if (sp18[1] >= 0 ? sp18[1] >= 0x78 : -sp18[1] >= 0x78) return 0; + + pan += sp18[0] / 20; + if (pan < 0) pan = 0; + else if (pan >= 0x10) pan = 0xF; + + sp20[0] = p[3]; + sp20[1] = p[5]; + sp20[2] = p[7]; + ((void (*)(s16 *, s16 *))func_8012EFB8)(sp20, sp28); + sp28[2] = 0; + + d = ((s32 (*)(s16 *, s16 *))func_800132BC)(sp18, sp28) - 0x100; + if (d > 0) { + vol -= (d * 127) / 25600; + if (vol < 0) vol = 0; + } + func_8002D4C8(a1, (u16)(vol | ((pan << 8) | 0x3000))); + return 1; +} + extern void (*D_801B5B94[])(void); diff --git a/src/ov_SC04_007/ov_SC04_007_jr_8017BEBC.c b/src/ov_SC04_007/ov_SC04_007_jr_8017BEBC.c index c861036b2..9aef6e2ac 100644 --- a/src/ov_SC04_007/ov_SC04_007_jr_8017BEBC.c +++ b/src/ov_SC04_007/ov_SC04_007_jr_8017BEBC.c @@ -7100,7 +7100,57 @@ s32 func_801821DC(s32 a0) { } -INCLUDE_ASM("asm/ov_SC04_007/nonmatchings/ov_SC04_007_jr_8017BEBC", func_80182358); +extern void func_8012EFB8(s32 a0); +extern void func_8002D4C8(s32 a0, s32 a1); +extern s32 func_800132BC(s32 a0, s32 a1); +extern s32 D_80126B58; + +s32 func_80182358(s32 a0, u16 a1) { + s16 sp10[4]; + s16 sp18[4]; + s16 sp20[4]; + s16 sp28[4]; + s16 pan; + s16 vol; + s32 v; + s32 d; + u16 *p; + + p = (u16 *)&D_80126B58; + pan = 7; + vol = 0x7F; + sp10[0] = *(u16 *)(a0 + 0x6); + sp10[1] = *(u16 *)(a0 + 0xA); + sp10[2] = *(u16 *)(a0 + 0xE); + ((void (*)(s16 *, s16 *))func_8012EFB8)(sp10, sp18); + sp18[2] = 0; + __asm__("" : "=r"(pan) : "0"(pan)); + + v = sp18[0]; + if (v < 0) v = -v; + if (v >= 0xA0) return 0; + + if (sp18[1] >= 0 ? sp18[1] >= 0x78 : -sp18[1] >= 0x78) return 0; + + pan += sp18[0] / 20; + if (pan < 0) pan = 0; + else if (pan >= 0x10) pan = 0xF; + + sp20[0] = p[3]; + sp20[1] = p[5]; + sp20[2] = p[7]; + ((void (*)(s16 *, s16 *))func_8012EFB8)(sp20, sp28); + sp28[2] = 0; + + d = ((s32 (*)(s16 *, s16 *))func_800132BC)(sp18, sp28) - 0x100; + if (d > 0) { + vol -= (d * 127) / 25600; + if (vol < 0) vol = 0; + } + func_8002D4C8(a1, (u16)(vol | ((pan << 8) | 0x3000))); + return 1; +} + extern void (*D_8019823C[])(void); diff --git a/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c b/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c index 1b32956f2..4fa6c8059 100644 --- a/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c +++ b/src/ov_SC04_011/ov_SC04_011_jr_8017D494.c @@ -11660,7 +11660,63 @@ void func_80189764(void *a0) { } -INCLUDE_ASM("asm/ov_SC04_011/nonmatchings/ov_SC04_011_jr_8017D494", func_8018985C); +#define GTE_SMR(r0) __asm__ __volatile__( \ + "lw $12, 0(%0)\n" "lw $13, 4(%0)\n" \ + "ctc2 $12, $0\n" "ctc2 $13, $1\n" \ + "lw $12, 8(%0)\n" "lw $13, 12(%0)\n" "lw $14, 16(%0)\n" \ + "ctc2 $12, $2\n" "ctc2 $13, $3\n" "ctc2 $14, $4\n" \ + : : "r"(r0) : "$12", "$13", "$14", "memory") +#define GTE_LDV0(r0) __asm__ __volatile__( \ + "lwc2 $0, 0(%0)\n" "lwc2 $1, 4(%0)\n" \ + : : "r"(r0) : "memory") +#define GTE_RTV0() __asm__ __volatile__( \ + "nop\n" "nop\n" "mvmva 1, 0, 0, 3, 0\n" : : : "memory") +#define GTE_STSV(r0) __asm__ __volatile__( \ + "mfc2 $12, $9\n" "mfc2 $13, $10\n" "mfc2 $14, $11\n" \ + "sh $12, 0(%0)\n" "sh $13, 2(%0)\n" "sh $14, 4(%0)\n" \ + : : "r"(r0) : "$12", "$13", "$14", "memory") + +typedef struct { s16 m[3][3]; s32 t[3]; } MATRIX_8018985C; +typedef struct { s16 vx, vy, vz, pad; } SVECTOR_8018985C; + +extern u16 D_80126B5E; +extern u16 D_80126B66; +extern s32 func_80017DC4(void *a0, void *a1); +extern void func_8012F568(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4, s32 a5); +extern u8 D_801152A8[]; + +s32 func_8018985C(void *a0, void *a1) +{ + MATRIX_8018985C mtx; + SVECTOR_8018985C sv[4]; + + sv[0].vx = D_80126B5E - *(u16 *)((s32)a0 + 6); + sv[0].vz = D_80126B66 - *(u16 *)((s32)a0 + 0xE); + + func_80017DC4((void *)(*(s32 *)((s32)a0 + 0x20) + 0x18), &mtx); + + sv[1].vx = *(u16 *)((s32)a1 + 4); + sv[2].vx = *(u16 *)((s32)a1 + 6); + sv[1].vz = *(u16 *)((s32)a1 + 0xC); + sv[2].vz = *(u16 *)((s32)a1 + 0xE); + + GTE_SMR(&mtx); + GTE_LDV0(&sv[1]); + GTE_RTV0(); + GTE_STSV(&sv[1]); + GTE_SMR(&mtx); + GTE_LDV0(&sv[2]); + GTE_RTV0(); + GTE_STSV(&sv[2]); + + if (sv[0].vx > sv[1].vx && sv[0].vx < sv[2].vx && + sv[0].vz > sv[1].vz && sv[0].vz < sv[2].vz) { + func_8012F568(1, 0x4001, 0, 0x14, (s32)&sv[3], (s32)D_801152A8); + return 1; + } + return 0; +} + extern void (*D_801949B8[])(void); diff --git a/src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c b/src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c index ed5f62787..ac2cc9611 100644 --- a/src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c +++ b/src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c @@ -6238,7 +6238,99 @@ void func_801816C4(u8 *a0) { } -INCLUDE_ASM("asm/ov_SC05_003/nonmatchings/ov_SC05_003_jr_8017BEBC", func_80181720); +/* func_80181720 (ov_SC05_003, 87 ins) — MATCH. + * Callees / globals spelled from THIS target's own relocation lines (law 1) and + * typed per the destination TU's existing decls (law 2): + * D_801270C0 / D_80126B5E / D_80126B62 / D_80126B66 : extern u16, read via (s16) + * (the TU already declares all four u16 — lines 1129 / 3992 / body of + * func_8017F1AC; the `lh %lo(...)` in the .s is the (s16) cast, not s16 decl) + * func_8012F568 : extern void func_8012F568(s32 x6) (TU line 4650 / 5662) + * VectorNormal : the .s says `jal VectorNormal` (NOT the TU's VectorNormalSS); + * repo idiom is the empty-param `extern void VectorNormal();` + * (src/md_SC07_004/md_SC07_004.c:4167). + * + * Two levers were needed on top of the neighbour shape (func_8017F1AC, §194-E): + * 1. cookbook §197-A — `lh $a1,0x18($v0) ; sra $a1,$a1,7` was coming out as + * `lhu ; sll 16 ; sra 23` (LENGTH-DRIFT +1). The zero-byte asm re-tie + * `__asm__("" : "=r"(h) : "0"(h))` takes the shift's operand out of the + * sign-extension's equivalence class and restores the 2-instruction form. + * 2. §193-C cross-jumping — with plain `return 0;` in both arms of the + * ±10 window test, gcc merged the common `slti ; bnez` suffix (-4 ins). + * Routing the negative arm through `goto ret0;` (the same idiom the in-TU + * neighbour func_8017F1AC uses) splits the two exits and reproduces the + * target's bltz / j / beqz .L80181868 layout exactly. + * Statement order raw[0],raw[1],raw[2],vx,vy,vz is load-bearing: it fixes the + * $a0/$v1 roles of the 0x6 and 0xE halfwords (sched1 birth order). + */ + +extern u16 D_801270C0; +extern u16 D_80126B5E; +extern u16 D_80126B62; +extern u16 D_80126B66; +extern void VectorNormal(); +extern void func_8012F568(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4, s32 a5); + +s32 func_80181720(void *arg0) { + typedef struct { s32 vx, vy, vz; } VEC3L; + VEC3L v; + s16 raw[4]; + s16 buf[4]; + s32 r; + s32 d; + s32 h; + + if (*(s16 *)&D_801270C0 == 2) { + return 0; + } + + h = *(s16 *)(*(s32 *)((s32)arg0 + 0x20) + 0x18); + __asm__("" : "=r"(h) : "0"(h)); /* §197-A re-tie: keeps lh + sra 7 */ + r = h >> 7; + raw[0] = *(u16 *)((s32)arg0 + 0x6); + raw[1] = *(u16 *)((s32)arg0 + 0xA); + raw[2] = *(u16 *)((s32)arg0 + 0xE); + v.vx = (s16)D_80126B5E - raw[0]; + v.vy = 0; + v.vz = (s16)D_80126B66 - raw[2]; + + /* gte SQR on the XZ difference vector (in place) */ + __asm__ volatile ( + "lwc2 $9, 0( %0 );" + "lwc2 $10, 4( %0 );" + "lwc2 $11, 8( %0 );" + "nop;" + "nop;" + "sqr 0;" + "swc2 $25, 0( %0 );" + "swc2 $26, 4( %0 );" + "swc2 $27, 8( %0 )" + : + : "r"(&v) + : "$9", "$10", "$11", "memory"); + + if (r * r <= v.vx + v.vz) { + return 0; + } + + d = (s16)D_80126B62 - *(s16 *)((s32)arg0 + 0xA); + if (d < 0) { + if (9 < *(s16 *)((s32)arg0 + 0xA) - (s16)D_80126B62) { + goto ret0; + } + } else if (9 < d) { + return 0; + } + + VectorNormal(&v, &v); + buf[0] = v.vx; + buf[1] = v.vy; + buf[2] = v.vz; + func_8012F568(1, 0x4014, 0, 0x18, (s32)raw, (s32)buf); + return 1; +ret0: + return 0; +} + extern void (*D_801A47C4[])(void); diff --git a/src/ov_SC05_018/ov_SC05_018_jr_8017D604.c b/src/ov_SC05_018/ov_SC05_018_jr_8017D604.c index f71975e30..45a53e370 100644 --- a/src/ov_SC05_018/ov_SC05_018_jr_8017D604.c +++ b/src/ov_SC05_018/ov_SC05_018_jr_8017D604.c @@ -4995,7 +4995,35 @@ void func_8018124C(void) { } -INCLUDE_ASM("asm/ov_SC05_018/nonmatchings/ov_SC05_018_jr_8017D604", func_80181294); +#include "common.h" + +s32 func_80181294(u16 a0, s32 a1) { + register s32 scale __asm__("$2"); + s32 r; + s32 g; + s32 b; + s32 rp; + s32 gp; + s32 bp; + s32 t; + s32 out; + + r = a0 & 0x1F; + scale = 0x1000 - a1; + rp = r * scale; + g = (a0 >> 5) & 0x1F; + gp = g * scale; + b = (a0 >> 10) & 0x1F; + bp = b * scale; + + r = (rp >> 12) & 0x1F; + g = gp >> 7; + t = (g & 0x3E0) | -0x8000; + out = r | t; + b = bp >> 2; + return (out | (b & 0x7C00)) & 0xFFFF; +} + extern void func_8012A828(void); void func_801812FC(void) {