From cbf0bce26ce5c708771948cb6632f5cf29e501da Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Tue, 4 Aug 2026 09:42:58 -0600 Subject: [PATCH] =?UTF-8?q?feat(phase-30=20S35):=20wave=203=20banks=2013/1?= =?UTF-8?q?3=20=E2=80=94=20the=20flywheel=20paid=20off=20one=20wave=20late?= =?UTF-8?q?r?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fleet 96.24 -> 96.25% fn-count / 94.0% instr / 88.4 -> 88.5% distinct. R22 clean-fleet: 140 passed, 0 failed of 140. dedup 1910/0. 13 targets / 17,644 templatable ins. 14 agents, 2.7M tokens. Claimed 13/13; the whole-binary gate banked 12, the 13th on reconcile (another §37/§124 SELF-axis alias — the TU declares `(void)`, the def takes an s32). Reconcile lane 20/21 lifetime. Sweep: +21 members / 0 failed across 16 overlays. THE FLYWHEEL, MEASURED ACROSS THREE WAVES (same models, same gate): wave 1 baseline prompt 15/17 claimed -> 13 banked (76%) wave 2 + the S33 rules 11/13 -> 10 (77%) wave 3 + S34 magic-grep as STEP 0 13/13 -> 13 (100%) Multiple wave-3 agents report the cross-overlay magic-literal grep landing the answer on the FIRST search. One found a banked twin whose own header comment already documented it as byte-identical to the new target, so the body transferred verbatim with only file-local type suffixes renamed. That is the wave-2 discovery paying off one wave later (R16). Sweep quality also differed for a reason worth keeping: 21/21 here vs 18/165 in wave 2. Wave 2's two big families are the per-location kind I then probed and ruled out (BUILD OK + byte diff = genuine per-member codegen, not plumbing); wave 3's are genuinely templatable. The sweep rate is a property of the FAMILY, not of the wave. TOOLING: an agent left 8 scratch files (test_licm*.c) in the drafts dir and the gate driver died on `int('full', 16)`, taking the whole gate with it. Hardened to treat a non-conforming filename as a NAMED, COUNTED skip rather than a crash (R32) — a drafts dir is agent-writable by design, so it must not be trusted to contain only deliverables. --- docs/backlog.md | 120 +++-- docs/family-hseq.md | 76 ++-- docs/progress.fleet.md | 60 +-- src/ov_SC01_004/ov_SC01_004_jr_8017BE9C.c | 143 +++++- src/ov_SC01_005/ov_SC01_005_jr_8017C340.c | 146 +++++- src/ov_SC01_006/ov_SC01_006_jr_8017C340.c | 146 +++++- src/ov_SC01_008/ov_SC01_008_jr_8017BE9C.c | 146 +++++- src/ov_SC01_009/ov_SC01_009_jr_8017BE9C.c | 146 +++++- src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c | 33 +- src/ov_SC02_026/ov_SC02_026_jr_8017C180.c | 155 ++++++- src/ov_SC02_027/ov_SC02_027_jr_8017D898.c | 38 +- src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c | 56 ++- src/ov_SC02_035/ov_SC02_035_jr_8017BEBC.c | 155 ++++++- src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c | 155 ++++++- src/ov_SC03_002/ov_SC03_002_jr_8017D604.c | 114 ++++- src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c | 64 ++- src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.c | 64 ++- src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.c | 143 +++++- src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.c | 64 ++- src/ov_SC03_090/ov_SC03_090_jr_8017CA80.c | 522 +++++++++++++++++++++- src/ov_SC03_091/ov_SC03_091_jr_80182268.c | 155 ++++++- src/ov_SC03_094/ov_SC03_094_jr_8017BEBC.c | 155 ++++++- src/ov_SC03_098/ov_SC03_098_jr_8017D898.c | 155 ++++++- src/ov_SC03_117/ov_SC03_117_jr_8017BEBC.c | 64 ++- src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c | 64 ++- src/ov_SC03_119/ov_SC03_119_jr_8017AE2C.c | 64 ++- src/ov_SC05_010/ov_SC05_010_jr_8017C8D0.c | 64 ++- src/ov_SC06_013/ov_SC06_013_jr_8017BEBC.c | 223 ++++++++- 28 files changed, 3327 insertions(+), 163 deletions(-) diff --git a/docs/backlog.md b/docs/backlog.md index b1a0f8491f..f0067a355c 100644 --- a/docs/backlog.md +++ b/docs/backlog.md @@ -2,7 +2,7 @@ > Generated by `tools/backlog.py render` from `.run/backlog.jsonl`. These are functions the Phase-21 automation got **close** on but did NOT byte-match. The whole-binary byte-gate is the sole arbiter (G3/P9): **byte-matches bank and are NOT listed here** — only genuine near-misses/blockers are. Ranked by hand-session priority: **reach** (×N propagation leverage) → **closeness** (match_one mismatch count, lower = closer) → **size**. Each row's `best_draft` is the closest C the machine reached — resume from there. -**Open near-misses:** 862 · by status {'near': 824, 'failed': 38} · by class {'schedule': 4, 'plumbing': 6, 'struct': 11, 'regalloc-order': 9, None: 826, 'other': 1, 'WAVE': 3, 'STRUCT': 1, 'loose-typing': 1} +**Open near-misses:** 860 · by status {'near': 822, 'failed': 38} · by class {'schedule': 4, 'plumbing': 6, 'struct': 11, 'regalloc-order': 9, None: 824, 'other': 1, 'WAVE': 3, 'STRUCT': 1, 'loose-typing': 1} | # | addr | reach | class | nins | status | closeness | where it stuck | best draft | |--:|------|------:|-------|-----:|--------|----------:|----------------|------------| @@ -808,63 +808,61 @@ | 800 | func_80184F08 | None | regalloc-order | None | near | 141 | none — MATCH (145/145 ins, match_one confirmed) | `.run/backlog_drafts/func_80184F08.c` | | 801 | func_80185668 | None | | None | near | 142 | residual: 142 mismatch | `.run/backlog_drafts/func_80185668.c` | | 802 | func_8017DB0C | None | | None | near | 142 | residual: 142 mismatch | `.run/backlog_drafts/func_8017DB0C.c` | -| 803 | func_8017FBE8 | None | | None | near | 151 | residual: 151 mismatch | `.run/backlog_drafts/func_8017FBE8.c` | -| 804 | func_8018200C | None | | None | near | 152 | residual: 152 mismatch | `.run/backlog_drafts/func_8018200C.c` | -| 805 | func_80181984 | None | | None | near | 153 | residual: 153 mismatch | `.run/backlog_drafts/func_80181984.c` | -| 806 | func_8017E6EC | None | | None | near | 172 | residual: 172 mismatch | `.run/backlog_drafts/func_8017E6EC.c` | -| 807 | func_8017D5DC | None | | None | near | 173 | residual: 173 mismatch | `.run/backlog_drafts/func_8017D5DC.c` | -| 808 | func_8017D47C | None | | None | near | 173 | residual: 173 mismatch | `.run/backlog_drafts/func_8017D47C.c` | -| 809 | func_80184210 | None | | None | near | 176 | residual: 176 mismatch | `.run/backlog_drafts/func_80184210.c` | -| 810 | func_80180568 | None | | None | near | 185 | residual: 185 mismatch | `.run/backlog_drafts/func_80180568.c` | -| 811 | func_801809C4 | None | | None | near | 190 | residual: 190 mismatch | `.run/backlog_drafts/func_801809C4.c` | -| 812 | func_80183D84 | None | | None | near | 192 | residual: 192 mismatch | `.run/backlog_drafts/func_80183D84.c` | -| 813 | func_80183FEC | None | | None | near | 198 | residual: 198 mismatch | `.run/backlog_drafts/func_80183FEC.c` | -| 814 | func_801823B8 | None | | None | near | 204 | residual: 204 mismatch | `.run/backlog_drafts/func_801823B8.c` | -| 815 | func_801826C4 | None | | None | near | 207 | residual: 207 mismatch | `.run/backlog_drafts/func_801826C4.c` | -| 816 | func_8018C3F8 | None | | None | near | 236 | residual: 236 mismatch | `.run/backlog_drafts/func_8018C3F8.c` | -| 817 | func_8017E7D4 | None | | None | near | 241 | residual: 241 mismatch | `.run/backlog_drafts/func_8017E7D4.c` | -| 818 | func_80183BF8 | None | | None | near | 258 | residual: 258 mismatch | `.run/backlog_drafts/func_80183BF8.c` | -| 819 | func_8017EB30 | None | | None | near | 278 | residual: 278 mismatch | `.run/backlog_drafts/func_8017EB30.c` | -| 820 | func_801804A0 | None | | None | near | 280 | residual: 280 mismatch | `.run/backlog_drafts/func_801804A0.c` | -| 821 | func_8017F554 | None | | None | near | 299 | residual: 299 mismatch | `.run/backlog_drafts/func_8017F554.c` | -| 822 | func_80181670 | None | | None | near | 311 | residual: 311 mismatch | `.run/backlog_drafts/func_80181670.c` | -| 823 | func_8017EA84 | None | | None | near | 578 | residual: 578 mismatch | `.run/backlog_drafts/func_8017EA84.c` | -| 824 | func_8018057C | None | | None | near | 897 | residual: 897 mismatch | `.run/backlog_drafts/func_8018057C.c` | -| 825 | func_80184A68 | 1 | regalloc-order | 33 | failed | | none — MATCH | `.run/backlog_drafts/func_80184A68.c` | -| 826 | func_80180B64 | 1 | struct | 75 | failed | | none — MATCH (75 ins, relocation-masked) | `.run/backlog_drafts/func_80180B64.c` | -| 827 | func_80183DE0 | 1 | regalloc-order | 91 | failed | | testing if(!=1) layout + counter-before-pointer init order | `.run/backlog_drafts/func_80183DE0.c` | -| 828 | func_80182C9C | 1 | schedule | 101 | failed | | none — MATCH (101 ins). Inner-switch break-to-shared-tail must be written as | `.run/backlog_drafts/func_80182C9C.c` | -| 829 | func_80183FB8 | 1 | loose-typing | 101 | failed | | none — MATCH (relocation-masked match_one, 101/101 ins) | `.run/backlog_drafts/func_80183FB8.c` | -| 830 | func_80185BA4 | 1 | WAVE | 177 | failed | | won't compile standalone (loose-typing / missing decl) | | -| 831 | func_8017D8DC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017D8DC.c` | -| 832 | func_8017FFEC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017FFEC.c` | -| 833 | func_8017DC18 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017DC18.c` | -| 834 | func_801853CC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801853CC.c` | -| 835 | func_80181894 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80181894.c` | -| 836 | func_8018BFBC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8018BFBC.c` | -| 837 | func_801807F4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801807F4.c` | -| 838 | func_8017FFC8 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017FFC8.c` | -| 839 | func_8017E99C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017E99C.c` | -| 840 | func_80180294 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80180294.c` | -| 841 | func_8017E76C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017E76C.c` | -| 842 | func_8017F29C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017F29C.c` | -| 843 | func_8017F00C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017F00C.c` | -| 844 | func_801802B0 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801802B0.c` | -| 845 | func_8017DA1C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017DA1C.c` | -| 846 | func_8017FFC4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017FFC4.c` | -| 847 | func_8017E2F0 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017E2F0.c` | -| 848 | func_801841E4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801841E4.c` | -| 849 | func_80181738 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80181738.c` | -| 850 | func_801873D8 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801873D8.c` | -| 851 | func_80185628 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80185628.c` | -| 852 | func_80181A78 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80181A78.c` | -| 853 | func_801805D4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801805D4.c` | -| 854 | func_8017EA1C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017EA1C.c` | -| 855 | func_8017F098 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017F098.c` | -| 856 | func_801822CC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801822CC.c` | -| 857 | func_8017E3F4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017E3F4.c` | -| 858 | func_800D1658 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_800D1658.c` | -| 859 | func_800D1984 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_800D1984.c` | -| 860 | func_800D24A0 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_800D24A0.c` | -| 861 | func_80144B9C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80144B9C.c` | -| 862 | func_8013DD68 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8013DD68.c` | +| 803 | func_80181984 | None | | None | near | 153 | residual: 153 mismatch | `.run/backlog_drafts/func_80181984.c` | +| 804 | func_8017E6EC | None | | None | near | 172 | residual: 172 mismatch | `.run/backlog_drafts/func_8017E6EC.c` | +| 805 | func_8017D5DC | None | | None | near | 173 | residual: 173 mismatch | `.run/backlog_drafts/func_8017D5DC.c` | +| 806 | func_8017D47C | None | | None | near | 173 | residual: 173 mismatch | `.run/backlog_drafts/func_8017D47C.c` | +| 807 | func_80184210 | None | | None | near | 176 | residual: 176 mismatch | `.run/backlog_drafts/func_80184210.c` | +| 808 | func_80180568 | None | | None | near | 185 | residual: 185 mismatch | `.run/backlog_drafts/func_80180568.c` | +| 809 | func_801809C4 | None | | None | near | 190 | residual: 190 mismatch | `.run/backlog_drafts/func_801809C4.c` | +| 810 | func_80183D84 | None | | None | near | 192 | residual: 192 mismatch | `.run/backlog_drafts/func_80183D84.c` | +| 811 | func_80183FEC | None | | None | near | 198 | residual: 198 mismatch | `.run/backlog_drafts/func_80183FEC.c` | +| 812 | func_801823B8 | None | | None | near | 204 | residual: 204 mismatch | `.run/backlog_drafts/func_801823B8.c` | +| 813 | func_801826C4 | None | | None | near | 207 | residual: 207 mismatch | `.run/backlog_drafts/func_801826C4.c` | +| 814 | func_8018C3F8 | None | | None | near | 236 | residual: 236 mismatch | `.run/backlog_drafts/func_8018C3F8.c` | +| 815 | func_8017E7D4 | None | | None | near | 241 | residual: 241 mismatch | `.run/backlog_drafts/func_8017E7D4.c` | +| 816 | func_80183BF8 | None | | None | near | 258 | residual: 258 mismatch | `.run/backlog_drafts/func_80183BF8.c` | +| 817 | func_8017EB30 | None | | None | near | 278 | residual: 278 mismatch | `.run/backlog_drafts/func_8017EB30.c` | +| 818 | func_801804A0 | None | | None | near | 280 | residual: 280 mismatch | `.run/backlog_drafts/func_801804A0.c` | +| 819 | func_8017F554 | None | | None | near | 299 | residual: 299 mismatch | `.run/backlog_drafts/func_8017F554.c` | +| 820 | func_80181670 | None | | None | near | 311 | residual: 311 mismatch | `.run/backlog_drafts/func_80181670.c` | +| 821 | func_8017EA84 | None | | None | near | 578 | residual: 578 mismatch | `.run/backlog_drafts/func_8017EA84.c` | +| 822 | func_8018057C | None | | None | near | 897 | residual: 897 mismatch | `.run/backlog_drafts/func_8018057C.c` | +| 823 | func_80184A68 | 1 | regalloc-order | 33 | failed | | none — MATCH | `.run/backlog_drafts/func_80184A68.c` | +| 824 | func_80180B64 | 1 | struct | 75 | failed | | none — MATCH (75 ins, relocation-masked) | `.run/backlog_drafts/func_80180B64.c` | +| 825 | func_80183DE0 | 1 | regalloc-order | 91 | failed | | testing if(!=1) layout + counter-before-pointer init order | `.run/backlog_drafts/func_80183DE0.c` | +| 826 | func_80182C9C | 1 | schedule | 101 | failed | | none — MATCH (101 ins). Inner-switch break-to-shared-tail must be written as | `.run/backlog_drafts/func_80182C9C.c` | +| 827 | func_80183FB8 | 1 | loose-typing | 101 | failed | | none — MATCH (relocation-masked match_one, 101/101 ins) | `.run/backlog_drafts/func_80183FB8.c` | +| 828 | func_80185BA4 | 1 | WAVE | 177 | failed | | won't compile standalone (loose-typing / missing decl) | | +| 829 | func_8017D8DC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017D8DC.c` | +| 830 | func_8017FFEC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017FFEC.c` | +| 831 | func_8017DC18 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017DC18.c` | +| 832 | func_801853CC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801853CC.c` | +| 833 | func_80181894 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80181894.c` | +| 834 | func_8018BFBC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8018BFBC.c` | +| 835 | func_801807F4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801807F4.c` | +| 836 | func_8017FFC8 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017FFC8.c` | +| 837 | func_8017E99C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017E99C.c` | +| 838 | func_80180294 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80180294.c` | +| 839 | func_8017E76C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017E76C.c` | +| 840 | func_8017F29C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017F29C.c` | +| 841 | func_8017F00C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017F00C.c` | +| 842 | func_801802B0 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801802B0.c` | +| 843 | func_8017DA1C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017DA1C.c` | +| 844 | func_8017FFC4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017FFC4.c` | +| 845 | func_8017E2F0 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017E2F0.c` | +| 846 | func_801841E4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801841E4.c` | +| 847 | func_80181738 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80181738.c` | +| 848 | func_801873D8 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801873D8.c` | +| 849 | func_80185628 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80185628.c` | +| 850 | func_80181A78 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80181A78.c` | +| 851 | func_801805D4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801805D4.c` | +| 852 | func_8017EA1C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017EA1C.c` | +| 853 | func_8017F098 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017F098.c` | +| 854 | func_801822CC | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801822CC.c` | +| 855 | func_8017E3F4 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8017E3F4.c` | +| 856 | func_800D1658 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_800D1658.c` | +| 857 | func_800D1984 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_800D1984.c` | +| 858 | func_800D24A0 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_800D24A0.c` | +| 859 | func_80144B9C | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80144B9C.c` | +| 860 | func_8013DD68 | None | | None | failed | | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8013DD68.c` | diff --git a/docs/family-hseq.md b/docs/family-hseq.md index 2cf8616f06..2663670c4c 100644 --- a/docs/family-hseq.md +++ b/docs/family-hseq.md @@ -2,13 +2,13 @@ > Generated by `tools/family_hseq.py` from the 138 overlay sigs + per-overlay src stubs. Ranked by TEMPLATABLE byte-weight (PURE+IMM members × nins × 4). The byte-gate is the arbiter. > -> **Scope: the 138 OVERLAYS only** (no main, no resident) · generated at HEAD `commit:1387` · stub set derived from `corpus.stubs` — the same oracle `progress.py` counts, so same-tree overlay totals agree by construction; compare digests only at the same HEAD. +> **Scope: the 138 OVERLAYS only** (no main, no resident) · generated at HEAD `commit:1389` · stub set derived from `corpus.stubs` — the same oracle `progress.py` counts, so same-tree overlay totals agree by construction; compare digests only at the same HEAD. -**Fleet (overlays):** 96.5% fn / 94.4% instr / 89.4% distinct-code matched. Unmatched: 12,230 instances / 730,269 ins (9,790 distinct classes). +**Fleet (overlays):** 96.5% fn / 94.5% instr / 89.5% distinct-code matched. Unmatched: 12,196 instances / 724,959 ins (9,760 distinct classes). -**Tail cross-check (Phase-25 close):** 7,867 tail fns / 390,989 ins → 433 h_seq families ≥2, **110 substantial (nins≥80) / 87,350 ins**. +**Tail cross-check (Phase-25 close):** 7,866 tail fns / 390,724 ins → 433 h_seq families ≥2, **110 substantial (nins≥80) / 87,085 ins**. -**Full frontier (all unmatched by h_seq):** 2041 target families (≥2 members or a matched sibling) + 3767 singletons (Step-D residue). Substantial: **378 families / 268,604 templatable ins**, 28 with a matched sibling (zero-crack). Substantial member classes: 1,595 PURE · 28 IMM · 6 STRUCT-excluded. +**Full frontier (all unmatched by h_seq):** 2037 target families (≥2 members or a matched sibling) + 3767 singletons (Step-D residue). Substantial: **374 families / 263,382 templatable ins**, 28 with a matched sibling (zero-crack). Substantial member classes: 1,565 PURE · 26 IMM · 6 STRUCT-excluded. ## Top substantial families (by templatable byte-weight) @@ -23,12 +23,12 @@ | 6 | 491 | 7 (7/0/0) | 6/7 | cross-address | PURE | 0 | Y | 0x801863cc modal | 3,437 | | 7 | 770 | 4 (4/0/0) | 1/4 | per-location | PURE | 134 | · | 0x80144b9c matched-ov077 | 3,080 | | 8 | 611 | 5 (5/0/0) | 4/5 | cross-address | PURE | 0 | · | 0x80186e24 modal | 3,055 | -| 9 | 328 | 9 (9/0/0) | 9/9 | scattered | PURE | 2 | · | 0x801833f0 matched | 2,952 | -| 10 | 557 | 5 (5/0/0) | 4/5 | cross-address | PURE | 0 | Y | 0x80186570 modal | 2,785 | -| 11 | 551 | 5 (5/0/0) | 4/5 | cross-address | PURE | 0 | Y | 0x80189540 modal | 2,755 | -| 12 | 125 | 22 (22/0/0) | 22/22 | scattered | PURE | 0 | Y | 0x80185440 modal | 2,750 | +| 9 | 557 | 5 (5/0/0) | 4/5 | cross-address | PURE | 0 | Y | 0x80186570 modal | 2,785 | +| 10 | 551 | 5 (5/0/0) | 4/5 | cross-address | PURE | 0 | Y | 0x80189540 modal | 2,755 | +| 11 | 125 | 22 (22/0/0) | 22/22 | scattered | PURE | 0 | Y | 0x80185440 modal | 2,750 | +| 12 | 328 | 8 (8/0/0) | 8/8 | cross-address | PURE | 3 | · | 0x801833f0 matched | 2,624 | | 13 | 513 | 5 (5/0/0) | 4/5 | cross-address | PURE | 0 | Y | 0x801878e8 modal | 2,565 | -| 14 | 263 | 9 (9/0/0) | 9/9 | scattered | PURE | 2 | · | 0x80182fd4 matched | 2,367 | +| 14 | 263 | 8 (8/0/0) | 8/8 | cross-address | PURE | 3 | · | 0x80182fd4 matched | 2,104 | | 15 | 137 | 15 (15/0/0) | 15/15 | scattered | PURE | 0 | Y | 0x80183084 modal | 2,055 | | 16 | 438 | 4 (4/0/0) | 1/4 | per-location | PURE | 134 | Y | 0x801380e0 matched-ov077 | 1,752 | | 17 | 579 | 3 (3/0/0) | 2/3 | cross-address | PURE | 0 | Y | 0x8018103c draft-ov077 | 1,737 | @@ -36,32 +36,32 @@ | 19 | 281 | 6 (6/0/0) | 6/6 | cross-address | PURE | 0 | Y | 0x80186270 modal | 1,686 | | 20 | 240 | 7 (7/0/0) | 6/7 | cross-address | PURE | 0 | Y | 0x801872b4 modal | 1,680 | | 21 | 251 | 6 (6/0/0) | 6/6 | cross-address | PURE | 0 | Y | 0x80186994 modal | 1,506 | -| 22 | 143 | 10 (10/0/0) | 9/10 | scattered | PURE | 2 | · | 0x8017df78 matched | 1,430 | -| 23 | 710 | 2 (2/0/0) | 2/2 | cross-address | PURE | 1 | Y | 0x80191c50 matched | 1,420 | -| 24 | 470 | 3 (3/0/0) | 3/3 | cross-address | PURE | 0 | Y | 0x80191320 modal | 1,410 | -| 25 | 279 | 5 (5/0/0) | 4/5 | cross-address | PURE | 0 | Y | 0x8017f2d4 modal | 1,395 | -| 26 | 673 | 2 (2/0/0) | 2/2 | cross-address | PURE | 1 | Y | 0x8019059c matched | 1,346 | -| 27 | 265 | 5 (0/5/0) | 5/5 | cross-address | IMM | 2 | · | 0x80183e04 matched | 1,325 | -| 28 | 254 | 5 (5/0/0) | 4/5 | cross-address | PURE | 0 | Y | 0x80188e1c modal | 1,270 | -| 29 | 198 | 6 (6/0/0) | 6/6 | cross-address | PURE | 0 | Y | 0x80185f58 modal | 1,188 | -| 30 | 385 | 3 (3/0/0) | 3/3 | cross-address | PURE | 0 | Y | 0x8018ff98 modal | 1,155 | -| 31 | 229 | 5 (5/0/0) | 1/5 | per-location | PURE | 2 | · | 0x8017e72c matched | 1,145 | -| 32 | 185 | 6 (6/0/0) | 6/6 | cross-address | PURE | 0 | Y | 0x80187aec modal | 1,110 | -| 33 | 184 | 6 (6/0/0) | 2/6 | cross-address | PURE | 1 | · | 0x8017d318 matched | 1,104 | -| 34 | 203 | 5 (0/5/0) | 4/5 | cross-address | IMM | 5 | · | 0x8017e804 matched | 1,015 | -| 35 | 324 | 3 (3/0/0) | 2/3 | cross-address | PURE | 0 | Y | 0x80183324 draft-ov077 | 972 | -| 36 | 121 | 8 (8/0/0) | 8/8 | cross-address | PURE | 9 | · | 0x8018b76c matched | 968 | -| 37 | 95 | 10 (10/0/0) | 9/10 | scattered | PURE | 0 | Y | 0x80185d70 modal | 950 | -| 38 | 231 | 4 (4/0/0) | 4/4 | cross-address | PURE | 0 | Y | 0x8017f83c modal | 924 | -| 39 | 184 | 5 (5/0/0) | 4/5 | cross-address | PURE | 0 | · | 0x8017e3dc modal | 920 | -| 40 | 115 | 8 (8/0/0) | 6/8 | cross-address | PURE | 0 | · | 0x8018089c modal | 920 | -| 41 | 153 | 6 (6/0/0) | 6/6 | cross-address | PURE | 0 | · | 0x80181d94 modal | 918 | -| 42 | 152 | 6 (6/0/0) | 6/6 | cross-address | PURE | 0 | · | 0x8018200c modal | 912 | -| 43 | 180 | 5 (5/0/0) | 5/5 | cross-address | PURE | 0 | · | 0x80182a78 modal | 900 | -| 44 | 225 | 4 (4/0/0) | 4/4 | cross-address | PURE | 0 | · | 0x801803e0 modal | 900 | -| 45 | 150 | 6 (6/0/0) | 6/6 | cross-address | PURE | 0 | · | 0x8018829c modal | 900 | -| 46 | 175 | 5 (5/0/0) | 4/5 | cross-address | PURE | 0 | · | 0x8017e6bc modal | 875 | -| 47 | 124 | 7 (7/0/0) | 7/7 | cross-address | PURE | 0 | · | 0x80181cf0 modal | 868 | -| 48 | 173 | 5 (5/0/0) | 4/5 | cross-address | PURE | 0 | · | 0x8017dc48 modal | 865 | -| 49 | 214 | 4 (4/0/0) | 4/4 | cross-address | PURE | 0 | · | 0x8017f2e8 modal | 856 | -| 50 | 122 | 7 (7/0/0) | 7/7 | cross-address | PURE | 0 | · | 0x8017f100 modal | 854 | +| 22 | 710 | 2 (2/0/0) | 2/2 | cross-address | PURE | 1 | Y | 0x80191c50 matched | 1,420 | +| 23 | 470 | 3 (3/0/0) | 3/3 | cross-address | PURE | 0 | Y | 0x80191320 modal | 1,410 | +| 24 | 279 | 5 (5/0/0) | 4/5 | cross-address | PURE | 0 | Y | 0x8017f2d4 modal | 1,395 | +| 25 | 673 | 2 (2/0/0) | 2/2 | cross-address | PURE | 1 | Y | 0x8019059c matched | 1,346 | +| 26 | 143 | 9 (9/0/0) | 8/9 | cross-address | PURE | 3 | · | 0x8017df78 matched | 1,287 | +| 27 | 254 | 5 (5/0/0) | 4/5 | cross-address | PURE | 0 | Y | 0x80188e1c modal | 1,270 | +| 28 | 198 | 6 (6/0/0) | 6/6 | cross-address | PURE | 0 | Y | 0x80185f58 modal | 1,188 | +| 29 | 385 | 3 (3/0/0) | 3/3 | cross-address | PURE | 0 | Y | 0x8018ff98 modal | 1,155 | +| 30 | 185 | 6 (6/0/0) | 6/6 | cross-address | PURE | 0 | Y | 0x80187aec modal | 1,110 | +| 31 | 184 | 6 (6/0/0) | 2/6 | cross-address | PURE | 1 | · | 0x8017d318 matched | 1,104 | +| 32 | 265 | 4 (0/4/0) | 4/4 | cross-address | IMM | 3 | · | 0x80183e04 matched | 1,060 | +| 33 | 324 | 3 (3/0/0) | 2/3 | cross-address | PURE | 0 | Y | 0x80183324 draft-ov077 | 972 | +| 34 | 95 | 10 (10/0/0) | 9/10 | scattered | PURE | 0 | Y | 0x80185d70 modal | 950 | +| 35 | 231 | 4 (4/0/0) | 4/4 | cross-address | PURE | 0 | Y | 0x8017f83c modal | 924 | +| 36 | 229 | 4 (4/0/0) | 1/4 | per-location | PURE | 3 | · | 0x8017e72c matched | 916 | +| 37 | 180 | 5 (5/0/0) | 5/5 | cross-address | PURE | 0 | · | 0x80182a78 modal | 900 | +| 38 | 225 | 4 (4/0/0) | 4/4 | cross-address | PURE | 0 | · | 0x801803e0 modal | 900 | +| 39 | 150 | 6 (6/0/0) | 6/6 | cross-address | PURE | 0 | · | 0x8018829c modal | 900 | +| 40 | 175 | 5 (5/0/0) | 4/5 | cross-address | PURE | 0 | · | 0x8017e6bc modal | 875 | +| 41 | 124 | 7 (7/0/0) | 7/7 | cross-address | PURE | 0 | · | 0x80181cf0 modal | 868 | +| 42 | 173 | 5 (5/0/0) | 4/5 | cross-address | PURE | 0 | · | 0x8017dc48 modal | 865 | +| 43 | 214 | 4 (4/0/0) | 4/4 | cross-address | PURE | 0 | · | 0x8017f2e8 modal | 856 | +| 44 | 122 | 7 (7/0/0) | 7/7 | cross-address | PURE | 0 | · | 0x8017f100 modal | 854 | +| 45 | 121 | 7 (7/0/0) | 7/7 | cross-address | PURE | 10 | · | 0x8018b76c matched | 847 | +| 46 | 166 | 5 (5/0/0) | 4/5 | cross-address | PURE | 0 | Y | 0x80188b84 modal | 830 | +| 47 | 165 | 5 (5/0/0) | 5/5 | cross-address | PURE | 0 | Y | 0x801818f0 modal | 825 | +| 48 | 206 | 4 (4/0/0) | 4/4 | cross-address | PURE | 0 | · | 0x801837b0 modal | 824 | +| 49 | 117 | 7 (7/0/0) | 7/7 | cross-address | PURE | 0 | · | 0x8017ed80 modal | 819 | +| 50 | 203 | 4 (0/4/0) | 3/4 | cross-address | IMM | 6 | · | 0x8017e804 matched | 812 | diff --git a/docs/progress.fleet.md b/docs/progress.fleet.md index 1d28cc77dd..24c8437569 100644 --- a/docs/progress.fleet.md +++ b/docs/progress.fleet.md @@ -4,16 +4,16 @@ # cross-binary collapsible-byte leverage: docs/duplicates.cross.md. # THREE progress metrics (all matter — see the labels): -FLEET fn-count byte-ident: 340436 / 353721 = 96.24% (REAL+LINKED+empties; FUNCTION-count, ×134-inflated — one crack counts per overlay) -FLEET instr-weighted : 12350091 / 13141652 = 94.0% (shipped .text across main + resident + 138 overlays; the decomp.dev-DISPLAY number) -FLEET distinct-code(uniq): 4983476 / 5634875 = 88.4% (77655/87459 unique fns; the DISTINCT-RE number) +FLEET fn-count byte-ident: 340470 / 353721 = 96.25% (REAL+LINKED+empties; FUNCTION-count, ×134-inflated — one crack counts per overlay) +FLEET instr-weighted : 12355401 / 13141652 = 94.0% (shipped .text across main + resident + 138 overlays; the decomp.dev-DISPLAY number) +FLEET distinct-code(uniq): 4988143 / 5634875 = 88.5% (77685/87459 unique fns; the DISTINCT-RE number) MAIN game-code weighted : 436 / 60201 = 0.7% (INCLUDED in the fleet numbers above since 2026-07-22 — roadmap §1 metrics contract; LINKED-excluding Ghidra sig dated 2026-06-14; caveat is R34: no independent second oracle for a PS-X EXE, NOT drift) - (fleet EXCLUDING main, for continuity with pre-2026-07-22 readings: 12349655 / 13081451 = 94.4%) + (fleet EXCLUDING main, for continuity with pre-2026-07-22 readings: 12354965 / 13081451 = 94.4%) -FLEET REAL substantive : 338581 (of which dedup-shared 241142 via 1910 groups / 241216 instances) +FLEET REAL substantive : 338615 (of which dedup-shared 241142 via 1910 groups / 241216 instances) FLEET LINKED PsyQ objs : 959 FLEET NON_MATCHING : 7 (0 in any default build — G4) -FLEET INCLUDE_ASM stubs : 13278 +FLEET INCLUDE_ASM stubs : 13244 FLEET matchable : 353721 | binary | REAL | shared | LINKED | byte-ident | matchable | byte-ident % | @@ -22,11 +22,11 @@ FLEET matchable : 353721 | resident | 129 | 0 | 0 | 131 | 145 | 90.3% | | ov_SC01_000 | 2384 | 1753 | 0 | 2384 | 2403 | 99.2% | | ov_SC01_001 | 2390 | 1754 | 0 | 2392 | 2466 | 97.0% | -| ov_SC01_004 | 2384 | 1745 | 0 | 2385 | 2414 | 98.8% | -| ov_SC01_005 | 2414 | 1768 | 0 | 2414 | 2503 | 96.4% | -| ov_SC01_006 | 2414 | 1768 | 0 | 2414 | 2503 | 96.4% | -| ov_SC01_008 | 2384 | 1745 | 0 | 2386 | 2426 | 98.4% | -| ov_SC01_009 | 2410 | 1746 | 0 | 2411 | 2507 | 96.2% | +| ov_SC01_004 | 2385 | 1745 | 0 | 2386 | 2414 | 98.8% | +| ov_SC01_005 | 2415 | 1768 | 0 | 2415 | 2503 | 96.5% | +| ov_SC01_006 | 2415 | 1768 | 0 | 2415 | 2503 | 96.5% | +| ov_SC01_008 | 2385 | 1745 | 0 | 2387 | 2426 | 98.4% | +| ov_SC01_009 | 2411 | 1746 | 0 | 2412 | 2507 | 96.2% | | ov_SC01_074 | 2389 | 1746 | 0 | 2391 | 2425 | 98.6% | | ov_SC01_077 | 2538 | 1711 | 0 | 2540 | 2586 | 98.2% | | ov_SC01_080 | 2417 | 1749 | 0 | 2417 | 2512 | 96.2% | @@ -38,26 +38,26 @@ FLEET matchable : 353721 | ov_SC02_011 | 2616 | 1752 | 0 | 2627 | 2893 | 90.8% | | ov_SC02_015 | 2393 | 1751 | 0 | 2393 | 2414 | 99.1% | | ov_SC02_016 | 2474 | 1751 | 0 | 2477 | 2545 | 97.3% | -| ov_SC02_017 | 2542 | 1751 | 0 | 2550 | 2732 | 93.3% | +| ov_SC02_017 | 2543 | 1751 | 0 | 2551 | 2732 | 93.4% | | ov_SC02_021 | 2398 | 1751 | 0 | 2398 | 2437 | 98.4% | -| ov_SC02_026 | 2490 | 1749 | 0 | 2496 | 2572 | 97.0% | -| ov_SC02_027 | 2546 | 1749 | 0 | 2555 | 2692 | 94.9% | +| ov_SC02_026 | 2492 | 1749 | 0 | 2498 | 2572 | 97.1% | +| ov_SC02_027 | 2548 | 1749 | 0 | 2557 | 2692 | 95.0% | | ov_SC02_028 | 2552 | 1749 | 0 | 2562 | 2701 | 94.9% | -| ov_SC02_031 | 2486 | 1750 | 0 | 2491 | 2562 | 97.2% | -| ov_SC02_035 | 2473 | 1749 | 0 | 2476 | 2520 | 98.3% | +| ov_SC02_031 | 2487 | 1750 | 0 | 2492 | 2562 | 97.3% | +| ov_SC02_035 | 2475 | 1749 | 0 | 2478 | 2520 | 98.3% | | ov_SC02_039 | 2387 | 1749 | 0 | 2387 | 2416 | 98.8% | | ov_SC02_041 | 2464 | 1749 | 0 | 2467 | 2561 | 96.3% | -| ov_SC03_001 | 2651 | 1750 | 0 | 2668 | 2869 | 93.0% | -| ov_SC03_002 | 2526 | 1754 | 0 | 2541 | 2631 | 96.6% | +| ov_SC03_001 | 2652 | 1750 | 0 | 2669 | 2869 | 93.0% | +| ov_SC03_002 | 2527 | 1754 | 0 | 2542 | 2631 | 96.6% | | ov_SC03_003 | 2391 | 1749 | 0 | 2392 | 2423 | 98.7% | -| ov_SC03_006 | 2541 | 1755 | 0 | 2550 | 2767 | 92.2% | +| ov_SC03_006 | 2542 | 1755 | 0 | 2551 | 2767 | 92.2% | | ov_SC03_007 | 2454 | 1749 | 0 | 2458 | 2623 | 93.7% | | ov_SC03_010 | 2407 | 1749 | 0 | 2407 | 2471 | 97.4% | | ov_SC03_011 | 2409 | 1749 | 0 | 2415 | 2527 | 95.6% | | ov_SC03_012 | 2381 | 1749 | 0 | 2382 | 2406 | 99.0% | | ov_SC03_013 | 2413 | 1749 | 0 | 2413 | 2493 | 96.8% | -| ov_SC03_014 | 2563 | 1777 | 0 | 2563 | 2685 | 95.5% | -| ov_SC03_015 | 2562 | 1777 | 0 | 2562 | 2685 | 95.4% | +| ov_SC03_014 | 2564 | 1777 | 0 | 2564 | 2685 | 95.5% | +| ov_SC03_015 | 2564 | 1777 | 0 | 2564 | 2685 | 95.5% | | ov_SC03_023 | 2393 | 1749 | 0 | 2394 | 2435 | 98.3% | | ov_SC03_024 | 2505 | 1754 | 0 | 2512 | 2641 | 95.1% | | ov_SC03_028 | 2452 | 1749 | 0 | 2456 | 2664 | 92.2% | @@ -65,15 +65,15 @@ FLEET matchable : 353721 | ov_SC03_030 | 2411 | 1754 | 0 | 2413 | 2495 | 96.7% | | ov_SC03_031 | 2440 | 1749 | 0 | 2443 | 2514 | 97.2% | | ov_SC03_089 | 2501 | 1754 | 0 | 2508 | 2581 | 97.2% | -| ov_SC03_090 | 2509 | 1754 | 0 | 2517 | 2625 | 95.9% | -| ov_SC03_091 | 2523 | 1749 | 0 | 2531 | 2640 | 95.9% | +| ov_SC03_090 | 2513 | 1754 | 0 | 2521 | 2625 | 96.0% | +| ov_SC03_091 | 2525 | 1749 | 0 | 2533 | 2640 | 95.9% | | ov_SC03_092 | 2492 | 1754 | 0 | 2504 | 2587 | 96.8% | | ov_SC03_093 | 2505 | 1749 | 0 | 2509 | 2563 | 97.9% | -| ov_SC03_094 | 2489 | 1749 | 0 | 2495 | 2577 | 96.8% | +| ov_SC03_094 | 2491 | 1749 | 0 | 2497 | 2577 | 96.9% | | ov_SC03_095 | 2421 | 1749 | 0 | 2424 | 2474 | 98.0% | | ov_SC03_096 | 2418 | 1749 | 0 | 2421 | 2465 | 98.2% | | ov_SC03_097 | 2513 | 1749 | 0 | 2520 | 2603 | 96.8% | -| ov_SC03_098 | 2494 | 1749 | 0 | 2497 | 2541 | 98.3% | +| ov_SC03_098 | 2496 | 1749 | 0 | 2499 | 2541 | 98.3% | | ov_SC03_099 | 2475 | 1749 | 0 | 2478 | 2504 | 99.0% | | ov_SC03_100 | 2510 | 1749 | 0 | 2514 | 2539 | 99.0% | | ov_SC03_101 | 2471 | 1754 | 0 | 2475 | 2528 | 97.9% | @@ -90,9 +90,9 @@ FLEET matchable : 353721 | ov_SC03_114 | 2383 | 1749 | 0 | 2385 | 2415 | 98.8% | | ov_SC03_115 | 2423 | 1749 | 0 | 2425 | 2472 | 98.1% | | ov_SC03_116 | 2390 | 1749 | 0 | 2393 | 2438 | 98.2% | -| ov_SC03_117 | 2458 | 1749 | 0 | 2464 | 2557 | 96.4% | -| ov_SC03_118 | 2531 | 1773 | 0 | 2532 | 2685 | 94.3% | -| ov_SC03_119 | 2527 | 1773 | 0 | 2528 | 2685 | 94.2% | +| ov_SC03_117 | 2459 | 1749 | 0 | 2465 | 2557 | 96.4% | +| ov_SC03_118 | 2532 | 1773 | 0 | 2533 | 2685 | 94.3% | +| ov_SC03_119 | 2528 | 1773 | 0 | 2529 | 2685 | 94.2% | | ov_SC03_121 | 2396 | 1749 | 0 | 2399 | 2459 | 97.6% | | ov_SC03_124 | 2560 | 1745 | 0 | 2580 | 2741 | 94.1% | | ov_SC03_125 | 2514 | 1749 | 0 | 2526 | 2588 | 97.6% | @@ -125,7 +125,7 @@ FLEET matchable : 353721 | ov_SC05_007 | 2422 | 1749 | 0 | 2427 | 2482 | 97.8% | | ov_SC05_008 | 2435 | 1749 | 0 | 2437 | 2543 | 95.8% | | ov_SC05_009 | 2400 | 1749 | 0 | 2404 | 2438 | 98.6% | -| ov_SC05_010 | 2439 | 1749 | 0 | 2443 | 2588 | 94.4% | +| ov_SC05_010 | 2440 | 1749 | 0 | 2444 | 2588 | 94.4% | | ov_SC05_011 | 2389 | 1749 | 0 | 2390 | 2409 | 99.2% | | ov_SC05_017 | 2633 | 1746 | 0 | 2644 | 2842 | 93.0% | | ov_SC05_018 | 2530 | 1749 | 0 | 2543 | 2673 | 95.1% | @@ -135,7 +135,7 @@ FLEET matchable : 353721 | ov_SC06_008 | 2472 | 1751 | 0 | 2478 | 2542 | 97.5% | | ov_SC06_010 | 2446 | 1749 | 0 | 2451 | 2517 | 97.4% | | ov_SC06_011 | 2408 | 1749 | 0 | 2412 | 2468 | 97.7% | -| ov_SC06_013 | 2397 | 1749 | 0 | 2398 | 2425 | 98.9% | +| ov_SC06_013 | 2398 | 1749 | 0 | 2399 | 2425 | 98.9% | | ov_SC06_014 | 2408 | 1749 | 0 | 2410 | 2453 | 98.2% | | ov_SC06_015 | 2402 | 1749 | 0 | 2402 | 2421 | 99.2% | | ov_SC06_016 | 2444 | 1749 | 0 | 2446 | 2549 | 96.0% | diff --git a/src/ov_SC01_004/ov_SC01_004_jr_8017BE9C.c b/src/ov_SC01_004/ov_SC01_004_jr_8017BE9C.c index e057112aea..6b74506da8 100644 --- a/src/ov_SC01_004/ov_SC01_004_jr_8017BE9C.c +++ b/src/ov_SC01_004/ov_SC01_004_jr_8017BE9C.c @@ -3395,7 +3395,148 @@ INCLUDE_ASM("asm/ov_SC01_004/nonmatchings/ov_SC01_004_jr_8017BE9C", func_8017DAB INCLUDE_ASM("asm/ov_SC01_004/nonmatchings/ov_SC01_004_jr_8017BE9C", func_8017DBE0); -INCLUDE_ASM("asm/ov_SC01_004/nonmatchings/ov_SC01_004_jr_8017BE9C", func_8017DC38); +extern u32 D_80190248; +extern u16 D_8011511A; +extern u16 D_80115120; +extern u16 D_80115122; +extern u8 D_80115138[]; +extern u8 D_80115140[]; +extern u8 D_80115142; + +extern s32 func_80014ED4(s32 a0); +extern s32 func_80015018(s32 a0); +extern s16 func_8014168C(s16 a0); +extern s32 func_8017EB30(s32 a0, s32 a1); +extern void func_8017D758(void); + +s32 func_8017DC38(void) { + s32 flags; + s32 val; + u16 *p11a; + register s32 c __asm__("$19"); + s16 ret; + s32 changed; + u8 *pb; + u8 *pe; + s32 d; + s32 nz; + s32 c3; + register s32 off __asm__("$2"); + + changed = 0; + flags = func_80014ED4(0); + if ((flags & 0xFFFF) != 0) { + D_80190248 = 0; + } + val = func_80015018(0); + p11a = &D_8011511A; + ret = func_8014168C(*(s16 *)p11a); + c = D_80115138[*p11a]; + + if ((flags & 0x40) != 0) { + ret = func_8017EB30(c, ret); + nz = ret != 0; + return ret & -nz; + } + + if ((flags & 0x10) != 0) { + __asm__ ("" : "=r"(c3) : "0"(c)); + if (c3 < 6) { + if (c3 != 1) { + return -1; + } + } else { + func_8002D4C8(0x473, 0); + *p11a = *p11a - 1; + } + return 0; + } + + off = (s32)(*p11a) * 2; + { + u8 *base1 = (u8 *)p11a + 0x2E; + pb = base1 + off; + } + { + u8 *base2 = (u8 *)p11a + 0x3E; + pe = base2 + off; + } + + if ((val & 0xFFFF) != 0) { + if ((val & 0xFFFF) == D_80115120) { + D_80115122 = D_80115122 - 1; + if (D_80115122 == 0) { + flags = val & 0xF000; + D_80115122 = 3; + } + } else { + D_80115120 = val; + D_80115122 = 8; + } + } else { + D_80115120 = 0; + D_80115122 = 0xC; + } + + if ((flags & 0x1000) != 0) { + u8 b2 = *pb; + *pb = b2 - 1; + changed = 1; + if ((u8)(b2 - 1) > 0x7F) { + if (c < 6) { + *pb = *pe - 1; + } else { + *pb = 0; + changed = 0; + } + } + } + + if ((flags & 0x4000) != 0) { + u8 b2 = *pb; + u8 b4 = b2 + 1; + *pb = b4; + changed = 1; + if (*pe <= b4) { + if (c < 6) { + *pb = 0; + } else { + *pb = b2; + changed = 0; + } + } + } + + { + u8 b2 = *pb; + s32 result; + d = (s16)((s8)b2 - (s8)D_80115140[D_8011511A]); + if (d >= 6) { + D_80115140[D_8011511A] = b2 - 5; + result = changed; + } else { + if (d < 0) { + D_80115140[D_8011511A] = b2; + } + result = changed; + } + + if (result) { + func_8002D4C8(0x45A, 0); + if (D_8011511A != 1) { + return 0; + } + __asm__ ("" : "=r"(c3) : "0"(c)); + if (c3 == 9) { + D_80115142 = 0; + } + func_8017D758(); + } + } + + return 0; +} + INCLUDE_ASM("asm/ov_SC01_004/nonmatchings/ov_SC01_004_jr_8017BE9C", func_8017DF18); diff --git a/src/ov_SC01_005/ov_SC01_005_jr_8017C340.c b/src/ov_SC01_005/ov_SC01_005_jr_8017C340.c index fcbe5a2dfe..bf95233261 100644 --- a/src/ov_SC01_005/ov_SC01_005_jr_8017C340.c +++ b/src/ov_SC01_005/ov_SC01_005_jr_8017C340.c @@ -3405,7 +3405,151 @@ INCLUDE_ASM("asm/ov_SC01_005/nonmatchings/ov_SC01_005_jr_8017C340", func_8017E25 INCLUDE_ASM("asm/ov_SC01_005/nonmatchings/ov_SC01_005_jr_8017C340", func_8017E384); -INCLUDE_ASM("asm/ov_SC01_005/nonmatchings/ov_SC01_005_jr_8017C340", func_8017E3DC); +extern void func_8002D4C8(s32 a0, s32 a1); + + +extern s32 func_80014ED4(s32 a0); +extern s32 func_80015018(s32 a0); +extern s16 func_8014168C(s16 a0); +extern s32 func_8017F2D4(s32 a0, s32 a1); +extern void func_8017DEFC(void); + +s32 func_8017E3DC(void) { + + extern u32 D_801CD9A8; + extern u16 D_8011511A; + extern u16 D_80115120; + extern u16 D_80115122; + extern u8 D_80115138[]; + extern u8 D_80115140[]; + extern u8 D_80115142; + s32 flags; + s32 val; + u16 *p11a; + register s32 c __asm__("$19"); + s16 ret; + s32 changed; + u8 *pb; + u8 *pe; + s32 d; + s32 nz; + s32 c3; + register s32 off __asm__("$2"); + + changed = 0; + flags = func_80014ED4(0); + if ((flags & 0xFFFF) != 0) { + D_801CD9A8 = 0; + } + val = func_80015018(0); + p11a = &D_8011511A; + ret = func_8014168C(*(s16 *)p11a); + c = D_80115138[*p11a]; + + if ((flags & 0x40) != 0) { + ret = func_8017F2D4(c, ret); + nz = ret != 0; + return ret & -nz; + } + + if ((flags & 0x10) != 0) { + __asm__ ("" : "=r"(c3) : "0"(c)); + if (c3 < 6) { + if (c3 != 1) { + return -1; + } + } else { + func_8002D4C8(0x473, 0); + *p11a = *p11a - 1; + } + return 0; + } + + off = (s32)(*p11a) * 2; + { + u8 *base1 = (u8 *)p11a + 0x2E; + pb = base1 + off; + } + { + u8 *base2 = (u8 *)p11a + 0x3E; + pe = base2 + off; + } + + if ((val & 0xFFFF) != 0) { + if ((val & 0xFFFF) == D_80115120) { + D_80115122 = D_80115122 - 1; + if (D_80115122 == 0) { + flags = val & 0xF000; + D_80115122 = 3; + } + } else { + D_80115120 = val; + D_80115122 = 8; + } + } else { + D_80115120 = 0; + D_80115122 = 0xC; + } + + if ((flags & 0x1000) != 0) { + u8 b2 = *pb; + *pb = b2 - 1; + changed = 1; + if ((u8)(b2 - 1) > 0x7F) { + if (c < 6) { + *pb = *pe - 1; + } else { + *pb = 0; + changed = 0; + } + } + } + + if ((flags & 0x4000) != 0) { + u8 b2 = *pb; + u8 b4 = b2 + 1; + *pb = b4; + changed = 1; + if (*pe <= b4) { + if (c < 6) { + *pb = 0; + } else { + *pb = b2; + changed = 0; + } + } + } + + { + u8 b2 = *pb; + s32 result; + d = (s16)((s8)b2 - (s8)D_80115140[D_8011511A]); + if (d >= 6) { + D_80115140[D_8011511A] = b2 - 5; + result = changed; + } else { + if (d < 0) { + D_80115140[D_8011511A] = b2; + } + result = changed; + } + + if (result) { + func_8002D4C8(0x45A, 0); + if (D_8011511A != 1) { + return 0; + } + __asm__ ("" : "=r"(c3) : "0"(c)); + if (c3 == 9) { + D_80115142 = 0; + } + func_8017DEFC(); + } + } + + return 0; +} + INCLUDE_ASM("asm/ov_SC01_005/nonmatchings/ov_SC01_005_jr_8017C340", func_8017E6BC); diff --git a/src/ov_SC01_006/ov_SC01_006_jr_8017C340.c b/src/ov_SC01_006/ov_SC01_006_jr_8017C340.c index a6d96d1f84..25a54519c7 100644 --- a/src/ov_SC01_006/ov_SC01_006_jr_8017C340.c +++ b/src/ov_SC01_006/ov_SC01_006_jr_8017C340.c @@ -3406,7 +3406,151 @@ INCLUDE_ASM("asm/ov_SC01_006/nonmatchings/ov_SC01_006_jr_8017C340", func_8017E25 INCLUDE_ASM("asm/ov_SC01_006/nonmatchings/ov_SC01_006_jr_8017C340", func_8017E384); -INCLUDE_ASM("asm/ov_SC01_006/nonmatchings/ov_SC01_006_jr_8017C340", func_8017E3DC); +extern void func_8002D4C8(s32 a0, s32 a1); + + +extern s32 func_80014ED4(s32 a0); +extern s32 func_80015018(s32 a0); +extern s16 func_8014168C(s16 a0); +extern s32 func_8017F2D4(s32 a0, s32 a1); +extern void func_8017DEFC(void); + +s32 func_8017E3DC(void) { + + extern u32 D_801CD9A8; + extern u16 D_8011511A; + extern u16 D_80115120; + extern u16 D_80115122; + extern u8 D_80115138[]; + extern u8 D_80115140[]; + extern u8 D_80115142; + s32 flags; + s32 val; + u16 *p11a; + register s32 c __asm__("$19"); + s16 ret; + s32 changed; + u8 *pb; + u8 *pe; + s32 d; + s32 nz; + s32 c3; + register s32 off __asm__("$2"); + + changed = 0; + flags = func_80014ED4(0); + if ((flags & 0xFFFF) != 0) { + D_801CD9A8 = 0; + } + val = func_80015018(0); + p11a = &D_8011511A; + ret = func_8014168C(*(s16 *)p11a); + c = D_80115138[*p11a]; + + if ((flags & 0x40) != 0) { + ret = func_8017F2D4(c, ret); + nz = ret != 0; + return ret & -nz; + } + + if ((flags & 0x10) != 0) { + __asm__ ("" : "=r"(c3) : "0"(c)); + if (c3 < 6) { + if (c3 != 1) { + return -1; + } + } else { + func_8002D4C8(0x473, 0); + *p11a = *p11a - 1; + } + return 0; + } + + off = (s32)(*p11a) * 2; + { + u8 *base1 = (u8 *)p11a + 0x2E; + pb = base1 + off; + } + { + u8 *base2 = (u8 *)p11a + 0x3E; + pe = base2 + off; + } + + if ((val & 0xFFFF) != 0) { + if ((val & 0xFFFF) == D_80115120) { + D_80115122 = D_80115122 - 1; + if (D_80115122 == 0) { + flags = val & 0xF000; + D_80115122 = 3; + } + } else { + D_80115120 = val; + D_80115122 = 8; + } + } else { + D_80115120 = 0; + D_80115122 = 0xC; + } + + if ((flags & 0x1000) != 0) { + u8 b2 = *pb; + *pb = b2 - 1; + changed = 1; + if ((u8)(b2 - 1) > 0x7F) { + if (c < 6) { + *pb = *pe - 1; + } else { + *pb = 0; + changed = 0; + } + } + } + + if ((flags & 0x4000) != 0) { + u8 b2 = *pb; + u8 b4 = b2 + 1; + *pb = b4; + changed = 1; + if (*pe <= b4) { + if (c < 6) { + *pb = 0; + } else { + *pb = b2; + changed = 0; + } + } + } + + { + u8 b2 = *pb; + s32 result; + d = (s16)((s8)b2 - (s8)D_80115140[D_8011511A]); + if (d >= 6) { + D_80115140[D_8011511A] = b2 - 5; + result = changed; + } else { + if (d < 0) { + D_80115140[D_8011511A] = b2; + } + result = changed; + } + + if (result) { + func_8002D4C8(0x45A, 0); + if (D_8011511A != 1) { + return 0; + } + __asm__ ("" : "=r"(c3) : "0"(c)); + if (c3 == 9) { + D_80115142 = 0; + } + func_8017DEFC(); + } + } + + return 0; +} + INCLUDE_ASM("asm/ov_SC01_006/nonmatchings/ov_SC01_006_jr_8017C340", func_8017E6BC); diff --git a/src/ov_SC01_008/ov_SC01_008_jr_8017BE9C.c b/src/ov_SC01_008/ov_SC01_008_jr_8017BE9C.c index a8fb661385..75b0ead4c2 100644 --- a/src/ov_SC01_008/ov_SC01_008_jr_8017BE9C.c +++ b/src/ov_SC01_008/ov_SC01_008_jr_8017BE9C.c @@ -3391,7 +3391,151 @@ INCLUDE_ASM("asm/ov_SC01_008/nonmatchings/ov_SC01_008_jr_8017BE9C", func_8017DBE INCLUDE_ASM("asm/ov_SC01_008/nonmatchings/ov_SC01_008_jr_8017BE9C", func_8017DD18); -INCLUDE_ASM("asm/ov_SC01_008/nonmatchings/ov_SC01_008_jr_8017BE9C", func_8017DD70); +extern void func_8002D4C8(s32 a0, s32 a1); + + +extern s32 func_80014ED4(s32 a0); +extern s32 func_80015018(s32 a0); +extern s16 func_8014168C(s16 a0); +extern s32 func_8017EC68(s32 a0, s32 a1); +extern void func_8017D890(void); + +s32 func_8017DD70(void) { + + extern u32 D_801A3458; + extern u16 D_8011511A; + extern u16 D_80115120; + extern u16 D_80115122; + extern u8 D_80115138[]; + extern u8 D_80115140[]; + extern u8 D_80115142; + s32 flags; + s32 val; + u16 *p11a; + register s32 c __asm__("$19"); + s16 ret; + s32 changed; + u8 *pb; + u8 *pe; + s32 d; + s32 nz; + s32 c3; + register s32 off __asm__("$2"); + + changed = 0; + flags = func_80014ED4(0); + if ((flags & 0xFFFF) != 0) { + D_801A3458 = 0; + } + val = func_80015018(0); + p11a = &D_8011511A; + ret = func_8014168C(*(s16 *)p11a); + c = D_80115138[*p11a]; + + if ((flags & 0x40) != 0) { + ret = func_8017EC68(c, ret); + nz = ret != 0; + return ret & -nz; + } + + if ((flags & 0x10) != 0) { + __asm__ ("" : "=r"(c3) : "0"(c)); + if (c3 < 6) { + if (c3 != 1) { + return -1; + } + } else { + func_8002D4C8(0x473, 0); + *p11a = *p11a - 1; + } + return 0; + } + + off = (s32)(*p11a) * 2; + { + u8 *base1 = (u8 *)p11a + 0x2E; + pb = base1 + off; + } + { + u8 *base2 = (u8 *)p11a + 0x3E; + pe = base2 + off; + } + + if ((val & 0xFFFF) != 0) { + if ((val & 0xFFFF) == D_80115120) { + D_80115122 = D_80115122 - 1; + if (D_80115122 == 0) { + flags = val & 0xF000; + D_80115122 = 3; + } + } else { + D_80115120 = val; + D_80115122 = 8; + } + } else { + D_80115120 = 0; + D_80115122 = 0xC; + } + + if ((flags & 0x1000) != 0) { + u8 b2 = *pb; + *pb = b2 - 1; + changed = 1; + if ((u8)(b2 - 1) > 0x7F) { + if (c < 6) { + *pb = *pe - 1; + } else { + *pb = 0; + changed = 0; + } + } + } + + if ((flags & 0x4000) != 0) { + u8 b2 = *pb; + u8 b4 = b2 + 1; + *pb = b4; + changed = 1; + if (*pe <= b4) { + if (c < 6) { + *pb = 0; + } else { + *pb = b2; + changed = 0; + } + } + } + + { + u8 b2 = *pb; + s32 result; + d = (s16)((s8)b2 - (s8)D_80115140[D_8011511A]); + if (d >= 6) { + D_80115140[D_8011511A] = b2 - 5; + result = changed; + } else { + if (d < 0) { + D_80115140[D_8011511A] = b2; + } + result = changed; + } + + if (result) { + func_8002D4C8(0x45A, 0); + if (D_8011511A != 1) { + return 0; + } + __asm__ ("" : "=r"(c3) : "0"(c)); + if (c3 == 9) { + D_80115142 = 0; + } + func_8017D890(); + } + } + + return 0; +} + INCLUDE_ASM("asm/ov_SC01_008/nonmatchings/ov_SC01_008_jr_8017BE9C", func_8017E050); diff --git a/src/ov_SC01_009/ov_SC01_009_jr_8017BE9C.c b/src/ov_SC01_009/ov_SC01_009_jr_8017BE9C.c index ab7daabab0..ad5bc8a240 100644 --- a/src/ov_SC01_009/ov_SC01_009_jr_8017BE9C.c +++ b/src/ov_SC01_009/ov_SC01_009_jr_8017BE9C.c @@ -3350,7 +3350,151 @@ INCLUDE_ASM("asm/ov_SC01_009/nonmatchings/ov_SC01_009_jr_8017BE9C", func_8017DA8 INCLUDE_ASM("asm/ov_SC01_009/nonmatchings/ov_SC01_009_jr_8017BE9C", func_8017DBB8); -INCLUDE_ASM("asm/ov_SC01_009/nonmatchings/ov_SC01_009_jr_8017BE9C", func_8017DC10); +extern void func_8002D4C8(s32 a0, s32 a1); + + +extern s32 func_80014ED4(s32 a0); +extern s32 func_80015018(s32 a0); +extern s16 func_8014168C(s16 a0); +extern s32 func_8017EB08(s32 a0, s32 a1); +extern void func_8017D730(void); + +s32 func_8017DC10(void) { + + extern u32 D_801F32B8; + extern u16 D_8011511A; + extern u16 D_80115120; + extern u16 D_80115122; + extern u8 D_80115138[]; + extern u8 D_80115140[]; + extern u8 D_80115142; + s32 flags; + s32 val; + u16 *p11a; + register s32 c __asm__("$19"); + s16 ret; + s32 changed; + u8 *pb; + u8 *pe; + s32 d; + s32 nz; + s32 c3; + register s32 off __asm__("$2"); + + changed = 0; + flags = func_80014ED4(0); + if ((flags & 0xFFFF) != 0) { + D_801F32B8 = 0; + } + val = func_80015018(0); + p11a = &D_8011511A; + ret = func_8014168C(*(s16 *)p11a); + c = D_80115138[*p11a]; + + if ((flags & 0x40) != 0) { + ret = func_8017EB08(c, ret); + nz = ret != 0; + return ret & -nz; + } + + if ((flags & 0x10) != 0) { + __asm__ ("" : "=r"(c3) : "0"(c)); + if (c3 < 6) { + if (c3 != 1) { + return -1; + } + } else { + func_8002D4C8(0x473, 0); + *p11a = *p11a - 1; + } + return 0; + } + + off = (s32)(*p11a) * 2; + { + u8 *base1 = (u8 *)p11a + 0x2E; + pb = base1 + off; + } + { + u8 *base2 = (u8 *)p11a + 0x3E; + pe = base2 + off; + } + + if ((val & 0xFFFF) != 0) { + if ((val & 0xFFFF) == D_80115120) { + D_80115122 = D_80115122 - 1; + if (D_80115122 == 0) { + flags = val & 0xF000; + D_80115122 = 3; + } + } else { + D_80115120 = val; + D_80115122 = 8; + } + } else { + D_80115120 = 0; + D_80115122 = 0xC; + } + + if ((flags & 0x1000) != 0) { + u8 b2 = *pb; + *pb = b2 - 1; + changed = 1; + if ((u8)(b2 - 1) > 0x7F) { + if (c < 6) { + *pb = *pe - 1; + } else { + *pb = 0; + changed = 0; + } + } + } + + if ((flags & 0x4000) != 0) { + u8 b2 = *pb; + u8 b4 = b2 + 1; + *pb = b4; + changed = 1; + if (*pe <= b4) { + if (c < 6) { + *pb = 0; + } else { + *pb = b2; + changed = 0; + } + } + } + + { + u8 b2 = *pb; + s32 result; + d = (s16)((s8)b2 - (s8)D_80115140[D_8011511A]); + if (d >= 6) { + D_80115140[D_8011511A] = b2 - 5; + result = changed; + } else { + if (d < 0) { + D_80115140[D_8011511A] = b2; + } + result = changed; + } + + if (result) { + func_8002D4C8(0x45A, 0); + if (D_8011511A != 1) { + return 0; + } + __asm__ ("" : "=r"(c3) : "0"(c)); + if (c3 == 9) { + D_80115142 = 0; + } + func_8017D730(); + } + } + + return 0; +} + INCLUDE_ASM("asm/ov_SC01_009/nonmatchings/ov_SC01_009_jr_8017BE9C", func_8017DEF0); diff --git a/src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c b/src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c index e6192eaf8c..91165f69b0 100644 --- a/src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c +++ b/src/ov_SC02_017/ov_SC02_017_jr_8017DF34.c @@ -5952,7 +5952,38 @@ void func_80189908(s32 param_1, s32 *param_2) } -INCLUDE_ASM("asm/ov_SC02_017/nonmatchings/ov_SC02_017_jr_8017DF34", func_80189A68); +extern s32 func_80189D08(u32 a0v); +extern s16 func_80189C4C(u32 a0); + +void func_80189A68(void *a0, void *a1) +{ + u16 *rot = (u16 *)a0; + s16 *m = (s16 *)a1; + s16 cx, sx, cy, sy, cz, sz; + s32 sxsy, cxcz, cxsz; + + cx = func_80189D08(rot[0] & 0xFFF); + sx = func_80189C4C(rot[0] & 0xFFF); + cy = func_80189D08(rot[1] & 0xFFF); + sy = func_80189C4C(rot[1] & 0xFFF); + cz = func_80189D08(rot[2] & 0xFFF); + sz = func_80189C4C(rot[2] & 0xFFF); + + cxsz = ((s32)cx * (s32)sz) >> 15; + cxcz = ((s32)cx * (s32)cz) >> 15; + sxsy = ((s32)sx * (s32)sy) >> 15; + + m[0] = ((s32)cz * (s32)cy) >> 15; + m[1] = (((s32)sxsy * (s32)cz) >> 15) - cxsz; + m[2] = ((cxcz * (s32)sy) >> 15) + (((s32)sx * (s32)sz) >> 15); + m[3] = ((s32)sz * (s32)cy) >> 15; + m[4] = ((sxsy * (s32)sz) >> 15) + cxcz; + m[5] = ((cxsz * (s32)sy) >> 15) - (((s32)sx * (s32)cz) >> 15); + m[6] = -sy; + m[7] = ((s32)cy * (s32)sx) >> 15; + m[8] = ((s32)cy * (s32)cx) >> 15; +} + /* func_80189C4C — quadrant-folded sine lookup over a 0x400-entry u16 table. diff --git a/src/ov_SC02_026/ov_SC02_026_jr_8017C180.c b/src/ov_SC02_026/ov_SC02_026_jr_8017C180.c index 3fadc16261..090b25f41d 100644 --- a/src/ov_SC02_026/ov_SC02_026_jr_8017C180.c +++ b/src/ov_SC02_026/ov_SC02_026_jr_8017C180.c @@ -4698,11 +4698,162 @@ INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_jr_8017C180", func_80181B1 INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_jr_8017C180", func_80181CC8); -INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_jr_8017C180", func_80181D94); +#include "common.h" + +extern s32 func_80047948(s32 a0); +extern void func_8012CBA4(s32 a0); +extern void func_8012CBF4(s32 a0); +extern void func_8012B23C(void *a0); +extern s32 func_8012BEE8(s32 a0); +extern s32 func_80143B6C(s32 a0, s32 a1); +extern void func_80131C78(s32 a0); +extern void func_80131E00(void *a0, s32 a1); + +void func_80181D94(s32 a0) { + s32 delta; + s32 ret; + + switch (*(u16 *)(a0 + 0x34)) { + case 0: + delta = func_80047948((*(s32 *)(a0 + 0x1C) - 1) << 6) - + func_80047948(*(s32 *)(a0 + 0x1C) << 6); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) + delta; + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) - (delta >> 3); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) + delta; + ret = ((s32(*)(s32))func_8012CBA4)(a0); + if (ret & 0x1000) { + func_80131E00((void *)a0, 0x12); + break; + } + if ((ret & 0x2000) == 0) { + func_8012B23C((void *)a0); + *(u16 *)(a0 + 0x34) = 2; + *(s32 *)(a0 + 0x1C) = 0x3C; + break; + } + if (*(s32 *)(a0 + 0x1C) % 3 == 0) { + func_80143B6C(a0, 1); + } + if (func_8012BEE8(a0) != 0) { + *(u16 *)(a0 + 0x34) = 1; + } + break; + case 1: + delta = func_80047948((*(s32 *)(a0 + 0x1C) + 1) << 6) - + func_80047948(*(s32 *)(a0 + 0x1C) << 6); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) + delta; + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) - (delta >> 3); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) + delta; + *(s32 *)(a0 + 0x1C) = *(s32 *)(a0 + 0x1C) + 1; + if (*(s32 *)(a0 + 0x1C) >= 0x10) { + func_80131C78(a0); + } + break; + case 2: + ret = ((s32(*)(s32))func_8012CBF4)(a0); + if (ret & 0xFF) { + func_8018226C(a0); + } else if (ret & 0x2000) { + func_80131C78(a0); + } else if (func_8012BEE8(a0) != 0) { + func_80131E00((void *)a0, 0xD); + } + break; + } + + if (*(s32 *)(a0 + 0x14) > 0x100000) { + *(s32 *)(a0 + 0x14) = 0x100000; + } +} + INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_jr_8017C180", func_80181FF8); -INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_jr_8017C180", func_8018200C); +extern s32 rand(void); +extern s32 func_801825A4(void *a0, s32 a1, s32 a2, s32 a3); +extern void func_8012E8A8(u8 *a0); +extern void func_8002D4C8(s32 a0, s32 a1); + +void func_8018200C(s32 a0) { + u16 buf[3]; + register s32 angle1 __asm__("$23"); + register s32 angle2 __asm__("$22"); + s32 maskraw; + s32 flags; + register s32 head1 __asm__("$18"); + register s32 head2 __asm__("$17"); + register s32 i __asm__("$19"); + s32 ret1; + s32 ret2; + + buf[0] = *(u16 *)(a0 + 0x6); + buf[1] = *(u16 *)(a0 + 0xA); + buf[2] = *(u16 *)(a0 + 0xE); + head1 = 0; + head2 = 0; + { + register s32 fieldval __asm__("$3") = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12); + angle1 = fieldval + 0x400; + flags = *(u16 *)(a0 + 0x70); + maskraw = flags & 0xF; + angle2 = fieldval - 0x400; + } + + if ((flags & 1) == 0) { + register s32 mask __asm__("$16"); + register s32 negoffset __asm__("$17"); + i = 0; + negoffset = -0x60000; + mask = maskraw; + while (i < 4) { + __asm__ __volatile__("" : "=r"(angle1) : "0"(angle1)); + func_801825A4(buf, angle1 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + negoffset, mask); + __asm__ __volatile__("" : "=r"(angle2) : "0"(angle2)); + func_801825A4(buf, angle2 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + negoffset, mask); + i++; + } + } else { + s32 mask; + i = 0; + mask = maskraw; + for (; i < 4; i++) { + __asm__ __volatile__("" : "=r"(angle1) : "0"(angle1)); + __asm__ __volatile__("" : "=r"(angle2) : "0"(angle2)); + ret1 = func_801825A4(buf, angle1 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + -0x60000, mask); + ret2 = func_801825A4(buf, angle2 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + -0x60000, mask); + if (ret1 != 0) { + if (head1 != 0) { + *(s32 *)(ret1 + 0x2C) = head1; + *(s32 *)(head1 + 0x30) = *(s32 *)(head1 + 0x30) + 1; + } else { + *(s32 *)(ret1 + 0x2C) = -1; + *(s32 *)(ret1 + 0x24) = a0; + head1 = ret1; + } + } + if (ret2 != 0) { + if (head2 != 0) { + *(s32 *)(ret2 + 0x2C) = head2; + *(s32 *)(head2 + 0x30) = *(s32 *)(head2 + 0x30) + 1; + } else { + *(s32 *)(ret2 + 0x2C) = -1; + *(s32 *)(ret2 + 0x24) = a0; + head2 = ret2; + } + } + } + } + + func_8012E8A8((u8 *)a0); + func_8002D4C8(0xA65, 0); +} + INCLUDE_ASM("asm/ov_SC02_026/nonmatchings/ov_SC02_026_jr_8017C180", func_8018226C); diff --git a/src/ov_SC02_027/ov_SC02_027_jr_8017D898.c b/src/ov_SC02_027/ov_SC02_027_jr_8017D898.c index b2f21bd7d6..82a21a86ba 100644 --- a/src/ov_SC02_027/ov_SC02_027_jr_8017D898.c +++ b/src/ov_SC02_027/ov_SC02_027_jr_8017D898.c @@ -7092,11 +7092,45 @@ void func_8018A528(void *a0) { INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_jr_8017D898", func_8018A564); -INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_jr_8017D898", func_8018A758); +/* §71 sibling-first: func_80185634 (ov_SC02_026, same-shape family member, already MATCHed) is the + * exact template. Deltas: record source D_801D6964 (this overlay's own record) instead of + * D_801CCBF8; same *10/4096-5 formula, same offset 0xFE, same slot 2. */ + +struct B16_8018A758 { s32 w[4]; }; + +extern struct B16_8018A758 D_800A5EA8; +extern struct B16_8018A758 D_801D6964; +extern s32 D_800A5EB0; +extern s32 func_8004787C(s32 a0); +extern void func_80028620(s32 a0, void *a1); + +void func_8018A758(void *a0) { + D_800A5EA8 = D_801D6964; + D_800A5EB0 = func_8004787C(*(s16 *)((s32)a0 + 0xFE)) * 10 / 4096 - 5; + *(u16 *)((s32)a0 + 0xFE) = (*(u16 *)((s32)a0 + 0xFE) + 0x71) & 0xFFF; + func_80028620(2, &D_800A5EA8); +} + INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_jr_8017D898", func_8018A808); -INCLUDE_ASM("asm/ov_SC02_027/nonmatchings/ov_SC02_027_jr_8017D898", func_8018A8B8); +typedef struct { s32 w[4]; } Blk16_8018A8B8; + +extern s32 func_8004787C(s32 a0); +extern void func_80028620(s32, void *); +extern s32 D_800A5E90; +extern Blk16_8018A8B8 D_800A5E88; +extern Blk16_8018A8B8 D_801D69B4; + +void func_8018A8B8(s32 a0) { + Blk16_8018A8B8 *s1 = &D_800A5E88; + + *s1 = D_801D69B4; + D_800A5E90 = func_8004787C(*(s16 *)(a0 + 0xFE)) * 20 / 4096 - 10; + *(s16 *)(a0 + 0xFE) = (*(u16 *)(a0 + 0xFE) + 0x71) & 0xFFF; + func_80028620(0, s1); +} + void func_8018A968(void) { } diff --git a/src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c b/src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c index 36a8b8e121..7a30fa43be 100644 --- a/src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c +++ b/src/ov_SC02_031/ov_SC02_031_jr_8017AE2C.c @@ -4823,7 +4823,61 @@ INCLUDE_ASM("asm/ov_SC02_031/nonmatchings/ov_SC02_031_jr_8017AE2C", func_8017DD1 INCLUDE_ASM("asm/ov_SC02_031/nonmatchings/ov_SC02_031_jr_8017AE2C", func_8017DD70); -INCLUDE_ASM("asm/ov_SC02_031/nonmatchings/ov_SC02_031_jr_8017AE2C", func_8017DE3C); +void func_8017DE3C(s32 a0) { + extern u8 D_80188910[]; + extern s32 D_801B473C; + extern s32 D_801888C8; + + s32 iVar1; + s32 iVar2; + s16 sVar1; + + iVar1 = *(s32 *)(a0 + 0x4c); + iVar2 = *(s32 *)(a0 + 0x20); + func_8016325C(a0, 0, 0x20000, 0); + func_80162FC0((s32 *)a0); + if ((*(s16 *)(a0 + 0x60) == 0) && (0 < *(s32 *)(a0 + 0x28))) { + u16 uVar1; + *(u16 *)(iVar2 + 0x10) = 0; + uVar1 = *(u16 *)(a0 + 0x60); + *(u16 *)(a0 + 0x60) = uVar1 + 1; + } + sVar1 = *(s16 *)(iVar1 + 0xA); + if (sVar1 < *(s16 *)(a0 + 0xA)) { + u16 uVar1; + s32 uVar2; + *(s16 *)(a0 + 0xA) = sVar1; + func_8013C9C4(D_80188910); + *(u16 *)(a0 + 0x60) = *(u16 *)(iVar2 + 0x18); + func_8001C810(iVar2, (s32)&D_801B473C); + *(s32 **)(iVar2 + 0x80) = &D_801888C8; + *(u16 *)(iVar2 + 0x2c) = *(u16 *)(iVar2 + 0x2c) | 0xA0; + *(u32 *)(iVar2 + 4) = *(u32 *)(iVar2 + 4) | 0x50000000; + uVar1 = *(u16 *)(a0 + 0x60); + *(u16 *)(iVar2 + 0x1c) = uVar1; + *(u16 *)(iVar2 + 0x1a) = uVar1; + *(u16 *)(iVar2 + 0x18) = uVar1; + if (*(s32 *)(a0 + 0x50) == 0) { + *(u16 *)(iVar2 + 0x2c) = *(u16 *)(iVar2 + 0x2c) | 0x10; + func_801466B4(0x1B, a0, 0, 0, 1); + func_801466B4(0x1B, a0, 1, 0, 1); + func_801466B4(0x1B, a0, 2, 0, 1); + func_801466B4(0x1B, a0, 3, 0, 1); + uVar2 = 0x81D; + } else { + uVar2 = 0xC5E; + } + func_80147324(uVar2); + func_80146CA0((void *)a0); + } else if (*(s16 *)(a0 + 0x60) != 0) { + s16 sVar2; + sVar2 = *(u16 *)(iVar2 + 0x1c) + 0x100; + *(s16 *)(iVar2 + 0x1c) = sVar2; + *(s16 *)(iVar2 + 0x1a) = sVar2; + *(s16 *)(iVar2 + 0x18) = sVar2; + } +} + INCLUDE_ASM("asm/ov_SC02_031/nonmatchings/ov_SC02_031_jr_8017AE2C", func_8017E008); diff --git a/src/ov_SC02_035/ov_SC02_035_jr_8017BEBC.c b/src/ov_SC02_035/ov_SC02_035_jr_8017BEBC.c index 45c1162bae..7149bff854 100644 --- a/src/ov_SC02_035/ov_SC02_035_jr_8017BEBC.c +++ b/src/ov_SC02_035/ov_SC02_035_jr_8017BEBC.c @@ -4599,11 +4599,162 @@ INCLUDE_ASM("asm/ov_SC02_035/nonmatchings/ov_SC02_035_jr_8017BEBC", func_8017F96 INCLUDE_ASM("asm/ov_SC02_035/nonmatchings/ov_SC02_035_jr_8017BEBC", func_8017FB1C); -INCLUDE_ASM("asm/ov_SC02_035/nonmatchings/ov_SC02_035_jr_8017BEBC", func_8017FBE8); + +extern s32 func_80047948(s32 a0); +extern void func_8012CBA4(s32 a0); +extern void func_8012CBF4(s32 a0); +extern void func_8012B23C(void *a0); +extern s32 func_8012BEE8(s32 a0); +extern s32 func_80143B6C(s32 a0, s32 a1); +extern void func_80131C78(s32 a0); +extern void func_80131E00(void *a0, s32 a1); + +void func_8017FBE8(s32 a0) { + s32 delta; + s32 ret; + + switch (*(u16 *)(a0 + 0x34)) { + case 0: + delta = func_80047948((*(s32 *)(a0 + 0x1C) - 1) << 6) - + func_80047948(*(s32 *)(a0 + 0x1C) << 6); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) + delta; + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) - (delta >> 3); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) + delta; + ret = ((s32(*)(s32))func_8012CBA4)(a0); + if (ret & 0x1000) { + func_80131E00((void *)a0, 0x12); + break; + } + if ((ret & 0x2000) == 0) { + func_8012B23C((void *)a0); + *(u16 *)(a0 + 0x34) = 2; + *(s32 *)(a0 + 0x1C) = 0x3C; + break; + } + if (*(s32 *)(a0 + 0x1C) % 3 == 0) { + func_80143B6C(a0, 1); + } + if (func_8012BEE8(a0) != 0) { + *(u16 *)(a0 + 0x34) = 1; + } + break; + case 1: + delta = func_80047948((*(s32 *)(a0 + 0x1C) + 1) << 6) - + func_80047948(*(s32 *)(a0 + 0x1C) << 6); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) + delta; + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) - (delta >> 3); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) + delta; + *(s32 *)(a0 + 0x1C) = *(s32 *)(a0 + 0x1C) + 1; + if (*(s32 *)(a0 + 0x1C) >= 0x10) { + func_80131C78(a0); + } + break; + case 2: + ret = ((s32(*)(s32))func_8012CBF4)(a0); + if (ret & 0xFF) { + func_801800C0(a0); + } else if (ret & 0x2000) { + func_80131C78(a0); + } else if (func_8012BEE8(a0) != 0) { + func_80131E00((void *)a0, 0xD); + } + break; + } + + if (*(s32 *)(a0 + 0x14) > 0x100000) { + *(s32 *)(a0 + 0x14) = 0x100000; + } +} + INCLUDE_ASM("asm/ov_SC02_035/nonmatchings/ov_SC02_035_jr_8017BEBC", func_8017FE4C); -INCLUDE_ASM("asm/ov_SC02_035/nonmatchings/ov_SC02_035_jr_8017BEBC", func_8017FE60); + +extern s32 rand(void); +extern s32 func_801803F8(void *a0, s32 a1, s32 a2, s32 a3); +extern void func_8012E8A8(u8 *a0); +extern void func_8002D4C8(s32 a0, s32 a1); + +void func_8017FE60(s32 a0) { + u16 buf[3]; + register s32 angle1 __asm__("$23"); + register s32 angle2 __asm__("$22"); + s32 maskraw; + s32 flags; + register s32 head1 __asm__("$18"); + register s32 head2 __asm__("$17"); + register s32 i __asm__("$19"); + s32 ret1; + s32 ret2; + + buf[0] = *(u16 *)(a0 + 0x6); + buf[1] = *(u16 *)(a0 + 0xA); + buf[2] = *(u16 *)(a0 + 0xE); + head1 = 0; + head2 = 0; + { + register s32 fieldval __asm__("$3") = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12); + angle1 = fieldval + 0x400; + flags = *(u16 *)(a0 + 0x70); + maskraw = flags & 0xF; + angle2 = fieldval - 0x400; + } + + if ((flags & 1) == 0) { + register s32 mask __asm__("$16"); + register s32 negoffset __asm__("$17"); + i = 0; + negoffset = -0x60000; + mask = maskraw; + while (i < 4) { + __asm__ __volatile__("" : "=r"(angle1) : "0"(angle1)); + func_801803F8(buf, angle1 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + negoffset, mask); + __asm__ __volatile__("" : "=r"(angle2) : "0"(angle2)); + func_801803F8(buf, angle2 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + negoffset, mask); + i++; + } + } else { + s32 mask; + i = 0; + mask = maskraw; + for (; i < 4; i++) { + __asm__ __volatile__("" : "=r"(angle1) : "0"(angle1)); + __asm__ __volatile__("" : "=r"(angle2) : "0"(angle2)); + ret1 = func_801803F8(buf, angle1 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + -0x60000, mask); + ret2 = func_801803F8(buf, angle2 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + -0x60000, mask); + if (ret1 != 0) { + if (head1 != 0) { + *(s32 *)(ret1 + 0x2C) = head1; + *(s32 *)(head1 + 0x30) = *(s32 *)(head1 + 0x30) + 1; + } else { + *(s32 *)(ret1 + 0x2C) = -1; + *(s32 *)(ret1 + 0x24) = a0; + head1 = ret1; + } + } + if (ret2 != 0) { + if (head2 != 0) { + *(s32 *)(ret2 + 0x2C) = head2; + *(s32 *)(head2 + 0x30) = *(s32 *)(head2 + 0x30) + 1; + } else { + *(s32 *)(ret2 + 0x2C) = -1; + *(s32 *)(ret2 + 0x24) = a0; + head2 = ret2; + } + } + } + } + + func_8012E8A8((u8 *)a0); + func_8002D4C8(0xA65, 0); +} + INCLUDE_ASM("asm/ov_SC02_035/nonmatchings/ov_SC02_035_jr_8017BEBC", func_801800C0); diff --git a/src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c b/src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c index 16b6c60b28..3ff00ae6d5 100644 --- a/src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c +++ b/src/ov_SC03_001/ov_SC03_001_jr_8017AE2C.c @@ -9375,7 +9375,160 @@ INCLUDE_ASM("asm/ov_SC03_001/nonmatchings/ov_SC03_001_jr_8017AE2C", func_8018B64 INCLUDE_ASM("asm/ov_SC03_001/nonmatchings/ov_SC03_001_jr_8017AE2C", func_8018B8DC); -INCLUDE_ASM("asm/ov_SC03_001/nonmatchings/ov_SC03_001_jr_8017AE2C", func_8018BCD4); + + + + + + + +/* Duplicate of the TU's own forward decl at ov_SC03_001_jr_8017AE2C.c:9324 (ABOVE the splice + * point, §138) — kept verbatim so the K&R definition below is checked against it. The 3rd + * parameter is `s32` in that prototype and `s16` here: a K&R identifier-list definition is + * compatible with a prototype carrying the DEFAULT-PROMOTED type, and the s16 spelling is what + * produces the target's per-use `sll/sra 16` off the raw $a2 kept in $s4. */ +extern s32 *func_8018BCD4(s32 *, void *, s32, void *, s32); + +s32 *func_8018BCD4(out, src, idx, w, col) + s32 *out; + void *src; + s16 idx; + void *w; + s32 col; +{ + extern short D_800B9A02; /* TU-visible spelling (file scope, line 2448) */ + extern s16 func_8014168C(s16 a0); + extern u16 D_8011511A; + extern u16 D_80115116; + extern u8 D_80115138[]; + extern u8 D_80115140[]; + extern u8 D_80115148[]; + extern u8 D_80115158[]; + extern u16 D_801C11BA; + extern u16 D_801C11CE; + + typedef struct { + u32 *ot; /* 0x00 */ + u32 pad[4]; /* 0x04..0x13 -> 0x14 stride */ + } Env_8018BCD4; + extern Env_8018BCD4 D_800AE7BC[]; + + typedef struct { u32 addr : 24; u32 len : 8; } PTag_8018BCD4; + + /* §37 /s-DEP LATTICE: this store MUST be MEM_IN_STRUCT_P. `out[0] = k` folds `out + 0` + * away and expands as a NON-/s mem, which keeps the true_dependence edge to the incoming + * 5th-arg slot and pins `lw $v1,0x38($sp)` after it. The target has the arg load AFTER + * the out[0] store, i.e. the edge must be DROPPED — sched.c's drop clause needs the store + * /s + varying and the load non-/s + fixed-address. A COMPONENT_REF at offset 0 supplies + * the /s. (This single bit was the last 10 of 203 instructions.) */ + typedef struct { u32 w; } W_8018BCD4; + + s32 c; + s16 t; + u16 *q; + s32 m; + volatile u16 *pbh; + + c = D_80115138[idx]; + + ((W_8018BCD4 *)out)->w = 0x04000000; + *((u8 *)out + 0xC) = 0x30; + *((u8 *)out + 0xD) = 0x48; + *(s16 *)((u8 *)out + 0xE) = 0x4056; + out[1] = col | 0x64000000; + + if (c < 10) { + /* §135 idiom 9/T3: the fleet decl returns s16; cast at the CALL so the return feeds + * `sll $v0,$v0,1` with no `andi`/re-extend. */ + t = ((s32 (*)(s16)) func_8014168C)(idx) * 2; + } else { + t = (D_80115148[idx * 2] - D_80115140[idx]) * 2; + } + + q = (u16 *)(t * 2 + (s32)src); + pbh = (volatile u16 *)&D_800B9A02; + *(s16 *)((u8 *)out + 0x8) = q[0] - 8; + *(s16 *)((u8 *)out + 0xA) = q[1]; + *(s16 *)((u8 *)out + 0x12) = 8; + *(s16 *)((u8 *)out + 0x10) = 8; + + /* §36 BITFIELD STORE = THE MASK-ORDER DECOUPLER. The head materializes 0x00FFFFFF + * (lui+ori) BEFORE 0xFF000000 (lui) while the body ANDs the dest first — the signature of + * expmed.c's store_fixed_bit_field, not of user-mask C. `volatile` on the index read is + * what keeps the SECOND *pbh load alive (a plain read cse-folds and the fn loses 5 ins). */ + ((PTag_8018BCD4 *)out)->addr = + ((PTag_8018BCD4 *)(D_800AE7BC[*pbh].ot + 2))->addr; + ((PTag_8018BCD4 *)(D_800AE7BC[*pbh].ot + 2))->addr = (u32)out; + + out += 5; + if (c < 10) { + return out; + } + + m = D_8011511A; + if (m == idx) { + if ((D_80115116 & 8) != 0) { + s16 j; + s32 k; + s16 y; + s16 eight; + u16 *pb; + /* §137/§36: m24 is a 2-insn constant, but the natural allocno order puts j/k ahead + * of it and rotates $a2/$a3/$t0. Pinning m24 alone restores the whole rotation. */ + register u32 m24 __asm__("$6"); + u32 mhi; + s32 vsum; + + j = 0; + k = m; + eight = 8; + pb = (u16 *)&D_800B9A02; + m24 = 0xFFFFFF; + mhi = 0xFF000000; + /* NOTE: the loop deliberately has NO source pointer of its own. gcc's combine_givs + * folds every `out + K` reference into ONE address giv based at out+0x12; adding a + * `u8 *p = (u8*)out + 0x12` biv makes `*(s16*)p` use the biv directly, which + * survives as a SECOND register (the +1-instruction LENGTH-DRIFT). The giv's base + * is the LAST such reference in source order — hence the +8 (`vsum`) store sits + * before the 0x10/0x12 stores here even though the scheduler sinks it back. */ + for (; j < 2; j++) { + if (j == 0) { + if (D_80115140[k] == 0) { + continue; + } + *((u8 *)out + 0xD) = 0x30; + y = D_801C11BA - 2; + } else { + s32 k2 = k * 2; + if ((((s8 *)D_80115158)[k2] - ((s8 *)D_80115140)[k]) < 7) { + continue; + } + *((u8 *)out + 0xD) = 0x38; + y = D_801C11CE + 1; + } + *(s16 *)((u8 *)out + 0xA) = y; + __asm__("" ::: "memory"); /* keeps the y store ahead of the 0x64808080 pair */ + *(u32 *)out = 0x04000000; + *((u8 *)out + 0xC) = 0x78; + *(u32 *)((u8 *)out + 0x4) = 0x64808080; + *(s16 *)((u8 *)out + 0xE) = 0x4056; + vsum = *(s32 *)((u8 *)w + 8) + *(s32 *)((u8 *)w + 0xC) - 0xC; + *(s16 *)((u8 *)out + 0x8) = vsum; + *(s16 *)((u8 *)out + 0x10) = eight; + *(s16 *)((u8 *)out + 0x12) = eight; + *(u32 *)out = ((*(u32 *)out) & mhi) | (D_800AE7BC[*pb].ot[2] & m24); + { + register u32 *op __asm__("$4"); + op = D_800AE7BC[*pb].ot; + op[2] = (op[2] & mhi) | (((u32)out) & m24); + } + out += 5; + } + } + } + return out; +} + INCLUDE_ASM("asm/ov_SC03_001/nonmatchings/ov_SC03_001_jr_8017AE2C", func_8018C000); diff --git a/src/ov_SC03_002/ov_SC03_002_jr_8017D604.c b/src/ov_SC03_002/ov_SC03_002_jr_8017D604.c index d0b94e4b96..3cee3ae2d1 100644 --- a/src/ov_SC03_002/ov_SC03_002_jr_8017D604.c +++ b/src/ov_SC03_002/ov_SC03_002_jr_8017D604.c @@ -3346,7 +3346,119 @@ void func_8017F5F8(void *arg0) { } -INCLUDE_ASM("asm/ov_SC03_002/nonmatchings/ov_SC03_002_jr_8017D604", func_8017F688); +/* func_8017F688 — byte-verified twin of func_8017D77C (src/ov_SC04_018/ov_SC04_018_jr_8017AE2C.c:4271), + * found via §136e/S34 magic-word grep on the `AAA32294` instruction bytes (the + * D_800AF630+0xA3AA far-offset lhu). This is one of the 10 members of the family + * (all 0x23C bytes / 143 ins; grep the AAA32294 bytes across asm/ to enumerate them) -- + * func_8017D77C is the only one already banked; all others (incl. this one) were + * still nonmatching, so this body was derived by remapping func_8017D77C's symbols: + * func_8017D77C -> func_8017F688 D_801E6F58 -> D_801CB920 + * func_8017D9B8 -> func_8017F8C4 func_8017DAC4 -> func_8017F9D0 + * Ent_8017D6EC -> Ent_8017F688 (own function-suffixed typedef -- same 0x24-stride + * shape as the TU's Ent_8017D6EC_8017F5F8 at TU:3319-3325, but + * given a fresh name/no shared tag so splicing this in below that + * file-scope typedef can't hit the C89 duplicate-typedef error, S33). + * func_8017F9D0 is already banked in THIS TU (TU:3426) as `void (void *arg0)`, + * matching the direct call below with no cast needed. func_8017F8C4 has no + * declaration anywhere but INCLUDE_ASM stubs, so it is declared directly as + * `void (void *)` (no idiom-9 cast needed, unlike the twin's func_8017D9B8 + * which was `void (void)`). + */ + +extern u8 D_80078EB1; +extern u8 D_80078E78[]; +extern u8 D_800AF630[]; +extern s32 func_8004787C(s32 a0); +extern void func_8012AD44(s32 *a0, s16 a1); +extern void func_8017F8C4(void *arg0); +extern void func_8017F9D0(void *arg0); + +/* same shape as the TU's own Ent_8017D6EC_8017F5F8 (TU:3319-3325), own name to avoid + * the C89 duplicate-typedef clash (S33); match_one compiles this file standalone (no + * TU context), so the typedef must be repeated here regardless. */ +typedef struct { + u8 unk00[0x16]; + s16 unk16; + u8 unk18[4]; + s32 unk1C; + u8 unk20[4]; +} Ent_8017F688; + +extern Ent_8017F688 D_801CB920[]; + +void func_8017F688(s32 *arg0) +{ + u8 *m = D_800AF630; + u8 *q = D_80078E78; + Ent_8017F688 *p; + Ent_8017F688 *r; + s32 i; + s32 j; + s32 n; + s32 h; + s32 c; + s32 e; + + if (D_80078EB1 >= 9) { + n = 0; + for (j = 0; j < 4; j++) { + r = &D_801CB920[j]; + if (r->unk1C == 0) { + n++; + } + } + if (n == 0) { + func_8012AD44(arg0, 0); + return; + } + } + + i = 0; + do { + p = (Ent_8017F688 *)((s32)D_801CB920 + i * 0x24); + if (p->unk1C == 0) { + if (*(s16 *)((s32)p + 0xC) > 0x400) { + if (*(s32 *)((s32)p + 0x18) != 0) { + *(s32 *)((s32)p + 0x18) = *(s32 *)((s32)p + 0x18) - 1; + } else { + *(s16 *)((s32)p + 0xC) = *(s16 *)((s32)p + 0xC) + 11; + } + } else { + *(s16 *)((s32)p + 0xC) = *(s16 *)((s32)p + 0xC) + 11; + } + if (*(s16 *)((s32)p + 0xC) > 0x800) { + *(s16 *)((s32)p + 0xC) = 0; + } + c = (func_8004787C(*(s16 *)((s32)p + 0xC)) / 64) & 0xFF; + c = c | ((c << 16) | (c << 8)); + *(s32 *)((s32)p + 0x4) = c; + c = (func_8004787C(*(s16 *)((s32)p + 0xC)) / 256) & 0xFF; + c = c | ((c << 16) | (c << 8)); + *(s32 *)((s32)p + 0x8) = c; + if ((*(u16 *)(m + 0xA3AA) & 1) == 0) { + e = *(u16 *)((s32)p + 0xE) + 1; + *(u16 *)((s32)p + 0xE) = e; + if ((s16)e >= 0x40) { + *(s16 *)((s32)p + 0xE) = 0; + } + } + h = *(s16 *)((s32)p + 0xC); + if (h == 0) { + p->unk1C = 1; + } else if (h > 0x555) { + if (*(s32 *)((s32)p + 0x20) == 0) { + *(s32 *)((s32)p + 0x20) = 1; + if (q[0x39] < 9) { + func_8017F8C4(p); + } + } + } + func_8017F9D0(p); + } + i++; + } while (i < 4); +} + INCLUDE_ASM("asm/ov_SC03_002/nonmatchings/ov_SC03_002_jr_8017D604", func_8017F8C4); diff --git a/src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c b/src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c index 2e7ea688e6..90d4a8c217 100644 --- a/src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c +++ b/src/ov_SC03_006/ov_SC03_006_jr_8017AE2C.c @@ -5589,7 +5589,69 @@ INCLUDE_ASM("asm/ov_SC03_006/nonmatchings/ov_SC03_006_jr_8017AE2C", func_8017EE0 INCLUDE_ASM("asm/ov_SC03_006/nonmatchings/ov_SC03_006_jr_8017AE2C", func_8017EE6C); -INCLUDE_ASM("asm/ov_SC03_006/nonmatchings/ov_SC03_006_jr_8017AE2C", func_8017EF38); +extern void func_8001C810(s32 a0, s32 a1); +extern void func_8013C9C4(void * arg0); +extern void func_801466B4(u16 a0, s32 a1, s32 a2, s32 a3, s32 arg5); +extern void func_80146CA0(void *a0); +extern void func_80147324(s32 a0); +extern void func_80162FC0(s32 *a0); +extern void func_8016325C(s32 a0, s32 a1, s32 a2, s32 a3); + +void func_8017EF38(s32 a0) { + extern u8 D_8019058C[]; + extern s32 D_801F16C0; + extern s32 D_80190544; + + s32 iVar1; + s32 iVar2; + s16 sVar1; + + iVar1 = *(s32 *)(a0 + 0x4c); + iVar2 = *(s32 *)(a0 + 0x20); + func_8016325C(a0, 0, 0x20000, 0); + func_80162FC0((s32 *)a0); + if ((*(s16 *)(a0 + 0x60) == 0) && (0 < *(s32 *)(a0 + 0x28))) { + u16 uVar1; + *(u16 *)(iVar2 + 0x10) = 0; + uVar1 = *(u16 *)(a0 + 0x60); + *(u16 *)(a0 + 0x60) = uVar1 + 1; + } + sVar1 = *(s16 *)(iVar1 + 0xA); + if (sVar1 < *(s16 *)(a0 + 0xA)) { + u16 uVar1; + s32 uVar2; + *(s16 *)(a0 + 0xA) = sVar1; + func_8013C9C4(D_8019058C); + *(u16 *)(a0 + 0x60) = *(u16 *)(iVar2 + 0x18); + func_8001C810(iVar2, (s32)&D_801F16C0); + *(s32 **)(iVar2 + 0x80) = &D_80190544; + *(u16 *)(iVar2 + 0x2c) = *(u16 *)(iVar2 + 0x2c) | 0xA0; + *(u32 *)(iVar2 + 4) = *(u32 *)(iVar2 + 4) | 0x50000000; + uVar1 = *(u16 *)(a0 + 0x60); + *(u16 *)(iVar2 + 0x1c) = uVar1; + *(u16 *)(iVar2 + 0x1a) = uVar1; + *(u16 *)(iVar2 + 0x18) = uVar1; + if (*(s32 *)(a0 + 0x50) == 0) { + *(u16 *)(iVar2 + 0x2c) = *(u16 *)(iVar2 + 0x2c) | 0x10; + func_801466B4(0x1B, a0, 0, 0, 1); + func_801466B4(0x1B, a0, 1, 0, 1); + func_801466B4(0x1B, a0, 2, 0, 1); + func_801466B4(0x1B, a0, 3, 0, 1); + uVar2 = 0x81D; + } else { + uVar2 = 0xC5E; + } + func_80147324(uVar2); + func_80146CA0((void *)a0); + } else if (*(s16 *)(a0 + 0x60) != 0) { + s16 sVar2; + sVar2 = *(u16 *)(iVar2 + 0x1c) + 0x100; + *(s16 *)(iVar2 + 0x1c) = sVar2; + *(s16 *)(iVar2 + 0x1a) = sVar2; + *(s16 *)(iVar2 + 0x18) = sVar2; + } +} + INCLUDE_ASM("asm/ov_SC03_006/nonmatchings/ov_SC03_006_jr_8017AE2C", func_8017F104); diff --git a/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.c b/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.c index 6384f99d5b..5dd9a434c5 100644 --- a/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.c +++ b/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.c @@ -3747,7 +3747,69 @@ INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014_jr_8017EB7C", func_8018077 INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014_jr_8017EB7C", func_801807D0); -INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014_jr_8017EB7C", func_8018089C); +extern void func_8001C810(s32 a0, s32 a1); +extern void func_8013C9C4(void * arg0); +extern void func_801466B4(u16 a0, s32 a1, s32 a2, s32 a3, s32 arg5); +extern void func_80146CA0(void *a0); +extern void func_80147324(s32 a0); +extern void func_80162FC0(s32 *a0); +extern void func_8016325C(s32 a0, s32 a1, s32 a2, s32 a3); + +void func_8018089C(s32 a0) { + extern u8 D_8018F558[]; + extern s32 D_801CF478; + extern s32 D_8018F510; + + s32 iVar1; + s32 iVar2; + s16 sVar1; + + iVar1 = *(s32 *)(a0 + 0x4c); + iVar2 = *(s32 *)(a0 + 0x20); + func_8016325C(a0, 0, 0x20000, 0); + func_80162FC0((s32 *)a0); + if ((*(s16 *)(a0 + 0x60) == 0) && (0 < *(s32 *)(a0 + 0x28))) { + u16 uVar1; + *(u16 *)(iVar2 + 0x10) = 0; + uVar1 = *(u16 *)(a0 + 0x60); + *(u16 *)(a0 + 0x60) = uVar1 + 1; + } + sVar1 = *(s16 *)(iVar1 + 0xA); + if (sVar1 < *(s16 *)(a0 + 0xA)) { + u16 uVar1; + s32 uVar2; + *(s16 *)(a0 + 0xA) = sVar1; + func_8013C9C4(D_8018F558); + *(u16 *)(a0 + 0x60) = *(u16 *)(iVar2 + 0x18); + func_8001C810(iVar2, (s32)&D_801CF478); + *(s32 **)(iVar2 + 0x80) = &D_8018F510; + *(u16 *)(iVar2 + 0x2c) = *(u16 *)(iVar2 + 0x2c) | 0xA0; + *(u32 *)(iVar2 + 4) = *(u32 *)(iVar2 + 4) | 0x50000000; + uVar1 = *(u16 *)(a0 + 0x60); + *(u16 *)(iVar2 + 0x1c) = uVar1; + *(u16 *)(iVar2 + 0x1a) = uVar1; + *(u16 *)(iVar2 + 0x18) = uVar1; + if (*(s32 *)(a0 + 0x50) == 0) { + *(u16 *)(iVar2 + 0x2c) = *(u16 *)(iVar2 + 0x2c) | 0x10; + func_801466B4(0x1B, a0, 0, 0, 1); + func_801466B4(0x1B, a0, 1, 0, 1); + func_801466B4(0x1B, a0, 2, 0, 1); + func_801466B4(0x1B, a0, 3, 0, 1); + uVar2 = 0x81D; + } else { + uVar2 = 0xC5E; + } + func_80147324(uVar2); + func_80146CA0((void *)a0); + } else if (*(s16 *)(a0 + 0x60) != 0) { + s16 sVar2; + sVar2 = *(u16 *)(iVar2 + 0x1c) + 0x100; + *(s16 *)(iVar2 + 0x1c) = sVar2; + *(s16 *)(iVar2 + 0x1a) = sVar2; + *(s16 *)(iVar2 + 0x18) = sVar2; + } +} + INCLUDE_ASM("asm/ov_SC03_014/nonmatchings/ov_SC03_014_jr_8017EB7C", func_80180A68); diff --git a/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.c b/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.c index 0fb24ac3fb..baa441c009 100644 --- a/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.c +++ b/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.c @@ -3395,7 +3395,148 @@ DEFINE_func_8017C14C() /* dedup: shared engine-core @0x8017C14C (src/shared) */ INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_8017AE2C", func_8017C154); -INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_8017AE2C", func_8017C290); +#include "common.h" + +/* func_8017C290 -- ov_SC03_015, TU ov_SC03_015_jr_8017AE2C.c + * + * §136d cross-overlay sibling-first: byte-identical twin already banked as + * func_8017C290 in src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.c (same TU suffix + * jr_8017AE2C -- these overlays share the same runtime load address, so the + * data symbols D_801EA8C0/D_801EA8E0/D_801EA8E4/D_801EA8E8..EE/D_801EA8F0 and + * D_8018EF70 are identical literal addresses in both). Body reused verbatim: + * the MATRIX_8017C290 / SVECTOR_8017C290 / PW8017C290 (packed, align-1, 4 + * byte) type trio, the gte_ldv0/gte_rt/gte_stsv inline-asm macros, and the + * 7-parameter shape (a, b, c, d, e, f, g) with the same register roles + * (a0=a, a1=b, a2=c, a3=d, stack0x10=e, stack0x14=f, stack0x18=g) confirmed + * instruction-by-instruction against the target .s. + */ + +/* MATRIX 0x20: 3x3 short rotation + pad, t[] at 0x14 */ +typedef struct { s16 m[3][3]; s16 pad; s32 t[3]; } MATRIX_8017C290; +/* 8, align 2 -> lwl/lwr/swl/swr struct copy */ +typedef struct { u16 vx, vy, vz, pad; } SVECTOR_8017C290; +/* 4, align 1 -> lwl/lwr/swl/swr */ +struct PW8017C290 { int w; } __attribute__((packed, aligned(1))); + +extern void func_80013F3C(s32 a0); +extern void RotMatrixZ(s32, void *); +extern void func_8004914C(void *a0); +extern void func_800491AC(void *a0); +extern int rand(void); +extern void func_80017714(void *); + +extern SVECTOR_8017C290 D_801EA8C0[4]; +extern struct PW8017C290 D_801EA8E0; +extern struct PW8017C290 D_801EA8E4; +extern u8 D_801EA8E8, D_801EA8E9, D_801EA8EA, D_801EA8EC, D_801EA8ED, D_801EA8EE; +extern int D_801EA8F0; +extern struct PW8017C290 D_8018EF70[]; + +#define gte_ldv0(r0) __asm__ __volatile__( \ + "lwc2 $0, 0(%0)\n" \ + "lwc2 $1, 4(%0)\n" \ + : : "r"(r0) : "memory") + +#define gte_rt() __asm__ __volatile__( \ + "nop\n" \ + "nop\n" \ + "mvmva 1, 0, 0, 0, 0\n" \ + : : : "memory") + +#define gte_stsv(r0) __asm__ __volatile__( \ + "mfc2 $12, $9\n" \ + "mfc2 $13, $10\n" \ + "mfc2 $14, $11\n" \ + "sh $12, 0(%0)\n" \ + "sh $13, 2(%0)\n" \ + "sh $14, 4(%0)\n" \ + : : "r"(r0) : "$12", "$13", "$14", "memory") + +void func_8017C290(int a, s16 *b, SVECTOR_8017C290 *c, SVECTOR_8017C290 *d, + SVECTOR_8017C290 *e, SVECTOR_8017C290 *f, s16 *g) +{ + MATRIX_8017C290 m; + SVECTOR_8017C290 *r0_00; + SVECTOR_8017C290 *pSVar6; + SVECTOR_8017C290 *r0; + int r; + int mask; + + func_80013F3C((s32)&m); + RotMatrixZ(g[0], &m); + m.t[0] = b[0]; + m.t[1] = b[1]; + m.t[2] = 0; + func_8004914C(&m); + func_800491AC(&m); + + r0_00 = &D_801EA8C0[0]; + if (*(s16 *)(a + 0x12) == 0) { + D_801EA8F0 = 0x50000000; + D_801EA8E0 = D_8018EF70[*(s32 *)(a + 0x2C)]; + D_801EA8E4 = D_8018EF70[*(s32 *)(a + 0x2C)]; + D_801EA8E8 = 0; + D_801EA8E9 = 0; + D_801EA8EA = 0; + D_801EA8EC = 0; + D_801EA8ED = 0; + D_801EA8EE = 0; + } + + f->vx = f->vx + c->vx; + f->vy = f->vy + c->vy; + r = rand(); + mask = f->pad & r; + if (*(u16 *)(a + 0x12) & 1) + f->vx = f->vx + mask; + else + f->vx = f->vx - mask; + r = rand(); + { int t = f->vy - 0x10; f->vy = t + (r & 0x1f); } + + gte_ldv0(c); + gte_rt(); + gte_stsv(r0_00); + + gte_ldv0(f); + gte_rt(); + gte_stsv(r0_00 + 1); + + gte_ldv0(d); + gte_rt(); + r0 = r0_00 + 2; + gte_stsv(r0); + + *d = *f; + r = rand(); + d->vx = d->vx - (f->pad & r); + + gte_ldv0(d); + gte_rt(); + pSVar6 = r0_00 + 3; + gte_stsv(pSVar6); + + r0_00->vz = ((u16 *)b)[2]; + func_80017714(r0_00); + + gte_ldv0(e); + gte_rt(); + gte_stsv(r0); + + *e = *f; + r = rand(); + e->vx = e->vx + (f->pad & r); + + gte_ldv0(e); + gte_rt(); + gte_stsv(pSVar6); + + r0_00->vz = ((u16 *)b)[2]; + func_80017714(r0_00); + + *c = *f; +} + INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_8017AE2C", func_8017C624); diff --git a/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.c b/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.c index e7c2d892ea..6b056dc542 100644 --- a/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.c +++ b/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.c @@ -3670,7 +3670,69 @@ INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_8017EB7C", func_8018077 INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_8017EB7C", func_801807D0); -INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_8017EB7C", func_8018089C); +extern void func_8001C810(s32 a0, s32 a1); +extern void func_8013C9C4(void * arg0); +extern void func_801466B4(u16 a0, s32 a1, s32 a2, s32 a3, s32 arg5); +extern void func_80146CA0(void *a0); +extern void func_80147324(s32 a0); +extern void func_80162FC0(s32 *a0); +extern void func_8016325C(s32 a0, s32 a1, s32 a2, s32 a3); + +void func_8018089C(s32 a0) { + extern u8 D_8018F558[]; + extern s32 D_801CF478; + extern s32 D_8018F510; + + s32 iVar1; + s32 iVar2; + s16 sVar1; + + iVar1 = *(s32 *)(a0 + 0x4c); + iVar2 = *(s32 *)(a0 + 0x20); + func_8016325C(a0, 0, 0x20000, 0); + func_80162FC0((s32 *)a0); + if ((*(s16 *)(a0 + 0x60) == 0) && (0 < *(s32 *)(a0 + 0x28))) { + u16 uVar1; + *(u16 *)(iVar2 + 0x10) = 0; + uVar1 = *(u16 *)(a0 + 0x60); + *(u16 *)(a0 + 0x60) = uVar1 + 1; + } + sVar1 = *(s16 *)(iVar1 + 0xA); + if (sVar1 < *(s16 *)(a0 + 0xA)) { + u16 uVar1; + s32 uVar2; + *(s16 *)(a0 + 0xA) = sVar1; + func_8013C9C4(D_8018F558); + *(u16 *)(a0 + 0x60) = *(u16 *)(iVar2 + 0x18); + func_8001C810(iVar2, (s32)&D_801CF478); + *(s32 **)(iVar2 + 0x80) = &D_8018F510; + *(u16 *)(iVar2 + 0x2c) = *(u16 *)(iVar2 + 0x2c) | 0xA0; + *(u32 *)(iVar2 + 4) = *(u32 *)(iVar2 + 4) | 0x50000000; + uVar1 = *(u16 *)(a0 + 0x60); + *(u16 *)(iVar2 + 0x1c) = uVar1; + *(u16 *)(iVar2 + 0x1a) = uVar1; + *(u16 *)(iVar2 + 0x18) = uVar1; + if (*(s32 *)(a0 + 0x50) == 0) { + *(u16 *)(iVar2 + 0x2c) = *(u16 *)(iVar2 + 0x2c) | 0x10; + func_801466B4(0x1B, a0, 0, 0, 1); + func_801466B4(0x1B, a0, 1, 0, 1); + func_801466B4(0x1B, a0, 2, 0, 1); + func_801466B4(0x1B, a0, 3, 0, 1); + uVar2 = 0x81D; + } else { + uVar2 = 0xC5E; + } + func_80147324(uVar2); + func_80146CA0((void *)a0); + } else if (*(s16 *)(a0 + 0x60) != 0) { + s16 sVar2; + sVar2 = *(u16 *)(iVar2 + 0x1c) + 0x100; + *(s16 *)(iVar2 + 0x1c) = sVar2; + *(s16 *)(iVar2 + 0x1a) = sVar2; + *(s16 *)(iVar2 + 0x18) = sVar2; + } +} + INCLUDE_ASM("asm/ov_SC03_015/nonmatchings/ov_SC03_015_jr_8017EB7C", func_80180A68); diff --git a/src/ov_SC03_090/ov_SC03_090_jr_8017CA80.c b/src/ov_SC03_090/ov_SC03_090_jr_8017CA80.c index 5eb982c4f4..a36157d3a1 100644 --- a/src/ov_SC03_090/ov_SC03_090_jr_8017CA80.c +++ b/src/ov_SC03_090/ov_SC03_090_jr_8017CA80.c @@ -5899,11 +5899,162 @@ INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_8018607 INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_80186224); -INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_801862F0); + +extern s32 func_80047948(s32 a0); +extern void func_8012CBA4(s32 a0); +extern void func_8012CBF4(s32 a0); +extern void func_8012B23C(void *a0); +extern s32 func_8012BEE8(s32 a0); +extern s32 func_80143B6C(s32 a0, s32 a1); +extern void func_80131C78(s32 a0); +extern void func_80131E00(void *a0, s32 a1); + +void func_801862F0(s32 a0) { + s32 delta; + s32 ret; + + switch (*(u16 *)(a0 + 0x34)) { + case 0: + delta = func_80047948((*(s32 *)(a0 + 0x1C) - 1) << 6) - + func_80047948(*(s32 *)(a0 + 0x1C) << 6); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) + delta; + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) - (delta >> 3); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) + delta; + ret = ((s32(*)(s32))func_8012CBA4)(a0); + if (ret & 0x1000) { + func_80131E00((void *)a0, 0x12); + break; + } + if ((ret & 0x2000) == 0) { + func_8012B23C((void *)a0); + *(u16 *)(a0 + 0x34) = 2; + *(s32 *)(a0 + 0x1C) = 0x3C; + break; + } + if (*(s32 *)(a0 + 0x1C) % 3 == 0) { + func_80143B6C(a0, 1); + } + if (func_8012BEE8(a0) != 0) { + *(u16 *)(a0 + 0x34) = 1; + } + break; + case 1: + delta = func_80047948((*(s32 *)(a0 + 0x1C) + 1) << 6) - + func_80047948(*(s32 *)(a0 + 0x1C) << 6); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) + delta; + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) - (delta >> 3); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) + delta; + *(s32 *)(a0 + 0x1C) = *(s32 *)(a0 + 0x1C) + 1; + if (*(s32 *)(a0 + 0x1C) >= 0x10) { + func_80131C78(a0); + } + break; + case 2: + ret = ((s32(*)(s32))func_8012CBF4)(a0); + if (ret & 0xFF) { + func_801867C8(a0); + } else if (ret & 0x2000) { + func_80131C78(a0); + } else if (func_8012BEE8(a0) != 0) { + func_80131E00((void *)a0, 0xD); + } + break; + } + + if (*(s32 *)(a0 + 0x14) > 0x100000) { + *(s32 *)(a0 + 0x14) = 0x100000; + } +} + INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_80186554); -INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_80186568); + +extern s32 rand(void); +extern s32 func_80186B00(void *a0, s32 a1, s32 a2, s32 a3); +extern void func_8012E8A8(u8 *a0); +extern void func_8002D4C8(s32 a0, s32 a1); + +void func_80186568(s32 a0) { + u16 buf[3]; + register s32 angle1 __asm__("$23"); + register s32 angle2 __asm__("$22"); + s32 maskraw; + s32 flags; + register s32 head1 __asm__("$18"); + register s32 head2 __asm__("$17"); + register s32 i __asm__("$19"); + s32 ret1; + s32 ret2; + + buf[0] = *(u16 *)(a0 + 0x6); + buf[1] = *(u16 *)(a0 + 0xA); + buf[2] = *(u16 *)(a0 + 0xE); + head1 = 0; + head2 = 0; + { + register s32 fieldval __asm__("$3") = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12); + angle1 = fieldval + 0x400; + flags = *(u16 *)(a0 + 0x70); + maskraw = flags & 0xF; + angle2 = fieldval - 0x400; + } + + if ((flags & 1) == 0) { + register s32 mask __asm__("$16"); + register s32 negoffset __asm__("$17"); + i = 0; + negoffset = -0x60000; + mask = maskraw; + while (i < 4) { + __asm__ __volatile__("" : "=r"(angle1) : "0"(angle1)); + func_80186B00(buf, angle1 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + negoffset, mask); + __asm__ __volatile__("" : "=r"(angle2) : "0"(angle2)); + func_80186B00(buf, angle2 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + negoffset, mask); + i++; + } + } else { + s32 mask; + i = 0; + mask = maskraw; + for (; i < 4; i++) { + __asm__ __volatile__("" : "=r"(angle1) : "0"(angle1)); + __asm__ __volatile__("" : "=r"(angle2) : "0"(angle2)); + ret1 = func_80186B00(buf, angle1 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + -0x60000, mask); + ret2 = func_80186B00(buf, angle2 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + -0x60000, mask); + if (ret1 != 0) { + if (head1 != 0) { + *(s32 *)(ret1 + 0x2C) = head1; + *(s32 *)(head1 + 0x30) = *(s32 *)(head1 + 0x30) + 1; + } else { + *(s32 *)(ret1 + 0x2C) = -1; + *(s32 *)(ret1 + 0x24) = a0; + head1 = ret1; + } + } + if (ret2 != 0) { + if (head2 != 0) { + *(s32 *)(ret2 + 0x2C) = head2; + *(s32 *)(head2 + 0x30) = *(s32 *)(head2 + 0x30) + 1; + } else { + *(s32 *)(ret2 + 0x2C) = -1; + *(s32 *)(ret2 + 0x24) = a0; + head2 = ret2; + } + } + } + } + + func_8012E8A8((u8 *)a0); + func_8002D4C8(0xA65, 0); +} + INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_801867C8); @@ -7952,9 +8103,372 @@ INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_8018AAD INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_8018ABC0); -INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_8018AC0C); +/* func_8018AC0C -- ov_SC03_090, TU src/ov_SC03_090/ov_SC03_090_jr_8017CA80.c + * + * §136d cross-overlay sibling: this is the SAME routine (family of 9) as the + * already-BANKED func_801887E8 in src/ov_SC03_089/ov_SC03_089_jr_8017CA80.c + * -- identical shape confirmed instruction-for-instruction against the + * target .s: + * - offset 0x20: source point-offset table pointer (Src->pt[12], stride 4, + * u16 vx,vy each, table starts at +0x10 within the struct) + * - offset 0x2E/0x30/0x32: base position (u16 vx,vy,vz) + * - offset 0x34: dispatch func_8001E094()/func_8001E378(a0) + * - single-point gte_ldv0/rtps/stsxy(&buf[0]) + gte_stflg + gte_stszotz + * - flag & ~0x1000 early-out + * - offset 0x2C: w; z = otz+1, adjusted by (w&0xC000) 0x4000/0x8000/0xC000 + * cases, clamped >=0, early-out if z>=0x1000 + * - offset 0x1E bit 0x8000: two different traversal orders over pt[], + * both ending in a call taking (a0, a1, &buf[0], ot [+z]). + * Only the callee at the very end differs (func_8018B028 here vs + * func_80188C04 there) and the per-function-scope type/macro suffixes. + * + * D2/whole-TU grep: this TU (ov_SC03_090_jr_8017CA80.c) already establishes + * `extern u8 D_800A6610[];` / `extern short D_800B9A02;` function-scope + * externs and `ot = (u32)&D_800A6610[(*(u16 *)&D_800B9A02) << 14];` in + * func_8017CA80 (:2814-2849) and other sibling functions in this same file + * -- reused verbatim here. The gte_* asm macros are already #defined + * earlier in this TU (first at :2690, redefined identically at :3283) and + * persist file-wide (never #undef'd), so re-#define with identical token + * text is a harmless legal redefinition once spliced in. + */ + +typedef struct { u16 vx, vy; } Pt2_8018AC0C; +typedef struct { u8 pad[0x10]; Pt2_8018AC0C pt[12]; } Src_8018AC0C; +typedef struct { u16 vx, vy, vz, pad; } Vec8_8018AC0C; + +extern void func_8001E094(void); +extern void func_8001E378(void *a0); +extern void func_8018B028(void *a0, void *a1, u32 *a2, u32 *a3); +extern u8 D_800A6610[]; +extern short D_800B9A02; + +#define gte_ldv0(r0) __asm__ volatile ( \ + "lwc2 $0, 0( %0 );" \ + "lwc2 $1, 4( %0 )" \ + : \ + : "r"( r0 ) ) + +#define gte_ldv3(r0, r1, r2) __asm__ volatile ( \ + "lwc2 $0, 0( %0 );" \ + "lwc2 $1, 4( %0 );" \ + "lwc2 $2, 0( %1 );" \ + "lwc2 $3, 4( %1 );" \ + "lwc2 $4, 0( %2 );" \ + "lwc2 $5, 4( %2 )" \ + : \ + : "r"( r0 ), "r"( r1 ), "r"( r2 ) ) + +#define gte_rtps() __asm__ volatile ("nop;nop;rtps") +#define gte_rtpt() __asm__ volatile ("nop;nop;rtpt") + +#define gte_stsxy(r0) __asm__ volatile ( \ + "swc2 $14, 0( %0 )" \ + : \ + : "r"( r0 ) \ + : "memory" ) + +#define gte_stsxy3(r0, r1, r2) __asm__ volatile ( \ + "swc2 $12, 0( %0 );" \ + "swc2 $13, 0( %1 );" \ + "swc2 $14, 0( %2 )" \ + : \ + : "r"( r0 ), "r"( r1 ), "r"( r2 ) \ + : "memory" ) + +#define gte_stszotz(r0) __asm__ volatile ( \ + "mfc2 $12, $19;" \ + "nop;" \ + "sra $12, $12, 2;" \ + "sw $12, 0( %0 )" \ + : \ + : "r"( r0 ) \ + : "$12", "memory" ) + +#define gte_stflg(r0) __asm__ volatile ( \ + "cfc2 $12, $31;" \ + "nop;" \ + "sw $12, 0( %0 )" \ + : \ + : "r"( r0 ) \ + : "$12", "memory" ) + +void func_8018AC0C(void *a0, void *a1) +{ + Vec8_8018AC0C base; + Vec8_8018AC0C v[3]; + u32 buf[19]; + long flag; + long otz; + long flag2; + + Src_8018AC0C *s; + u32 *ot; + s32 z; + s32 i; + u16 w; + + ot = (u32 *)&D_800A6610[(*(u16 *)&D_800B9A02) << 14]; + s = *(Src_8018AC0C **)((s32)a0 + 0x20); + if (s == 0) { + return; + } + + if (*(s32 *)((s32)a0 + 0x34) != 0) { + func_8001E094(); + } else { + func_8001E378(a0); + } + + base.vx = *(u16 *)((s32)a0 + 0x2E); + base.vy = *(u16 *)((s32)a0 + 0x30); + base.vz = *(u16 *)((s32)a0 + 0x32); + + gte_ldv0(&base); + gte_rtps(); + gte_stsxy(&buf[0]); + gte_stflg(&flag); + gte_stszotz(&otz); + + if (flag & ~0x1000) { + return; + } + + w = *(u16 *)((s32)a0 + 0x2C); + z = otz + 1; + if ((w & 0xC000) != 0) { + if ((w & 0xC000) == 0xC000) { + z -= (w & 0xFFF); + if (z < 0) { + z = 0; + } + } else { + z += (w & 0xFFF); + } + } + if (z >= 0x1000) { + return; + } + + if (*(s16 *)((s32)a0 + 0x1E) & 0x8000) { + for (i = 0; i < 12; i += 6) { + v[0].vx = base.vx + s->pt[i].vx; + v[0].vy = base.vy + s->pt[i].vy; + v[0].vz = base.vz; + v[1].vx = base.vx + s->pt[i + 2].vx; + v[1].vy = base.vy + s->pt[i + 2].vy; + v[1].vz = base.vz; + v[2].vx = base.vx + s->pt[i + 4].vx; + v[2].vy = base.vy + s->pt[i + 4].vy; + v[2].vz = base.vz; + gte_ldv3(&v[0], &v[1], &v[2]); + gte_rtpt(); + gte_stsxy3(&buf[i + 1], &buf[i + 3], &buf[i + 5]); + } + for (i = 1; i < 12; i += 2) { + v[0].vx = base.vx + s->pt[i].vx; + v[0].vy = base.vy + s->pt[i].vy; + v[0].vz = base.vz; + gte_ldv0(&v[0]); + gte_rtps(); + gte_stsxy(&buf[i + 1]); + gte_stflg(&flag2); + gte_stszotz(&otz); + buf[13 + (i >> 1)] = otz + 1; + } + func_8018B028(a0, a1, &buf[0], ot); + } else { + for (i = 0; i < 12; i += 3) { + v[0].vx = base.vx + s->pt[i].vx; + v[0].vy = base.vy + s->pt[i].vy; + v[0].vz = base.vz; + v[1].vx = base.vx + s->pt[i + 1].vx; + v[1].vy = base.vy + s->pt[i + 1].vy; + v[1].vz = base.vz; + v[2].vx = base.vx + s->pt[i + 2].vx; + v[2].vy = base.vy + s->pt[i + 2].vy; + v[2].vz = base.vz; + gte_ldv3(&v[0], &v[1], &v[2]); + gte_rtpt(); + gte_stsxy3(&buf[i + 1], &buf[i + 2], &buf[i + 3]); + } + func_8018B028(a0, a1, &buf[0], ot + z); + } +} + + +#include "common.h" + +/* func_8018B028 - ov_SC03_090 (328 ins, frame 0x38, leaf, 9-member family). + * + * SIBLING-FIRST (S34): byte-identical clone of the already-banked + * func_80188C04 in src/ov_SC03_089/ov_SC03_089_jr_8017CA80.c, which in turn + * documents itself as verified byte-identical against THIS function's .s + * (asm/ov_SC03_090/.../func_8018B028.s). Body reused verbatim, only the + * file-local type/macro suffixes renamed to _8018B028. + */ + +typedef struct { + u32 addr : 24; + u32 len : 8; +} PTag_8018B028; + +typedef struct { + PTag_8018B028 tag; + u8 r0, g0, b0, code; + u16 x0, y0; + u8 u0, v0; + u16 clut; + u16 x1, y1; + u8 u1, v1; + u16 tpage; + u16 x2, y2; + u8 u2, v2; + u16 pad2; + u16 x3, y3; + u8 u3, v3; + u16 pad3; +} Ft4_8018B028; + +typedef struct { + PTag_8018B028 tag; + u32 code0; +} Drm_8018B028; + +#define ADDPRIM_8018B028(o, p) \ + (((PTag_8018B028 *)(p))->addr = ((PTag_8018B028 *)(o))->addr, \ + ((PTag_8018B028 *)(o))->addr = (u32)(p)) + +/* lhu / sll 16 / sra 19 : signed 13-bit field held at bit 3 of a u16 */ +#define SR3_8018B028(a) (((s32)(*(u16 *)(a) << 16)) >> 19) + +void func_8018B028(void *ent, void *spr, u32 *q, u32 *ot) +{ + extern u8 *D_800A5E60; + register s32 zr __asm__("$0"); + + Ft4_8018B028 *poly; + Drm_8018B028 *dm; + s32 vtx; + u32 flags; + s32 tp, abr, code, shift; + u16 x; + u32 y; + s32 tpage, clut, cy; + s32 su, sv, uu, vv; + u16 fl; + s32 i, m; + u32 b; + + poly = (Ft4_8018B028 *)D_800A5E60; + fl = *(u16 *)((s32)ent + 0x1E) & 0x8000; + flags = *(u32 *)((s32)ent + 4); + tp = (flags >> 24) & 3; + shift = 2 - tp; + x = *(u16 *)((s32)ent + 0x28) + (*(s16 *)((s32)spr + 4) >> shift); + y = *(u16 *)((s32)ent + 0x2A) + *(u16 *)((s32)spr + 6); + vtx = *(s32 *)((s32)ent + 0x20); + D_800A5E60 += 0xF0; + if (flags & 0x40000000) { + code = 0x2E; + abr = (flags >> 28) & 3; + } else { + code = 0x2C; + abr = 1; + } + tpage = (tp << 7) | (abr << 5) | ((y & 0x100) >> 4) | ((x & 0x3C0) >> 6) | + ((y & 0x200) << 2); + b = *(u8 *)((s32)ent + 0x27); + cy = (b + 0x100) << 6; + if (b < 0xE0) { + clut = cy | 0x16; + } else { + clut = cy | 0x10; + } + { + s32 t = ((x - ((tpage & 0xF) << 6)) << shift) + + (*(u16 *)((s32)spr + 4) & ((1 << shift) - 1)); + su = t + zr; + __asm__ __volatile__("" ::"r"(t + *(u8 *)((s32)spr + 2) - 1)); + __asm__ __volatile__("" ::"r"(t)); + } + y = y & 0xFFFF; + if (tpage & 0x10) { + sv = y - 0x100; + } else { + sv = y + zr; + } + __asm__ __volatile__("" ::"r"(sv + *(u8 *)((s32)spr + 3) - 1)); + + i = 1; + uu = su; + vv = sv; + for (; i < 13; i += 2, poly++) { + s32 k = (i - 1) * 4; + __asm__ __volatile__("" ::"r"(i)); + poly->tag.len = 9; + poly->code = code; + poly->tpage = tpage; + poly->u2 = su; + poly->v2 = sv; + poly->u0 = SR3_8018B028(vtx + k + 0x10) + uu; + poly->v0 = SR3_8018B028(vtx + k + 0x12) + vv; + poly->u1 = SR3_8018B028(vtx + i * 4 + 0x10) + uu; + poly->v1 = SR3_8018B028(vtx + i * 4 + 0x12) + vv; + /* k2 is recorded as a giv HERE, AFTER the u1/v1 mem giv. */ + { + s32 k2 = (i + 1) * 4; + poly->u3 = SR3_8018B028(vtx + k2 + 0x10) + uu; + poly->v3 = SR3_8018B028(vtx + k2 + 0x12) + vv; + } + poly->clut = clut; + __asm__ __volatile__("" ::"r"(i), "r"(i)); + poly->r0 = *(u8 *)((s32)ent + 0x24); + poly->g0 = *(u8 *)((s32)ent + 0x25); + poly->b0 = *(u8 *)((s32)ent + 0x26); + poly->x0 = ((u16 *)q)[i * 2]; + poly->y0 = ((u16 *)q)[i * 2 + 1]; + poly->x1 = ((u16 *)q)[i * 2 + 2]; + poly->y1 = ((u16 *)q)[i * 2 + 3]; + poly->x2 = ((u16 *)q)[0]; + poly->y2 = ((u16 *)q)[1]; + poly->x3 = ((u16 *)q)[i * 2 + 4]; + poly->y3 = ((u16 *)q)[i * 2 + 5]; + if (fl != 0) { + ADDPRIM_8018B028(&ot[*(s32 *)((s32)q + 0x34 + (i >> 1) * 4)], poly); + } else { + ADDPRIM_8018B028(ot, poly); + } + } + poly[-1].x3 = ((u16 *)q)[2]; + poly[-1].y3 = ((u16 *)q)[3]; + poly[-1].u3 = su + SR3_8018B028(vtx + 0x10); + poly[-1].v3 = sv + SR3_8018B028(vtx + 0x12); + + if (flags & 0x40000000) { + dm = (Drm_8018B028 *)poly; + if (fl != 0) { + m = 0; + D_800A5E60 += 0x30; + do { + m++; + dm->tag.len = 1; + dm->code0 = (abr << 5) | 0xE100000A; + ADDPRIM_8018B028(&ot[*(volatile s32 *)((s32)q + 0x34)], dm); + q = (u32 *)((s32)q + 4); + dm++; + } while (m < 6); + } else { + dm->code0 = (abr << 5) | 0xE100000A; + D_800A5E60 += 8; + dm->tag.len = 1; + ADDPRIM_8018B028(ot, dm); + /* Zero-byte live-range stretch: puts vtx's allocno priority inside + * the only admissible window. Placement is load-bearing. */ + __asm__ __volatile__("" ::"r"(vtx)); + } + } +} -INCLUDE_ASM("asm/ov_SC03_090/nonmatchings/ov_SC03_090_jr_8017CA80", func_8018B028); void func_8018B548(void) { } diff --git a/src/ov_SC03_091/ov_SC03_091_jr_80182268.c b/src/ov_SC03_091/ov_SC03_091_jr_80182268.c index 38b28b2d39..889823fdae 100644 --- a/src/ov_SC03_091/ov_SC03_091_jr_80182268.c +++ b/src/ov_SC03_091/ov_SC03_091_jr_80182268.c @@ -4399,11 +4399,162 @@ INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091_jr_80182268", func_80186F1 INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091_jr_80182268", func_801870CC); -INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091_jr_80182268", func_80187198); + +extern s32 func_80047948(s32 a0); +extern void func_8012CBA4(s32 a0); +extern void func_8012CBF4(s32 a0); +extern void func_8012B23C(void *a0); +extern s32 func_8012BEE8(s32 a0); +extern s32 func_80143B6C(s32 a0, s32 a1); +extern void func_80131C78(s32 a0); +extern void func_80131E00(void *a0, s32 a1); + +void func_80187198(s32 a0) { + s32 delta; + s32 ret; + + switch (*(u16 *)(a0 + 0x34)) { + case 0: + delta = func_80047948((*(s32 *)(a0 + 0x1C) - 1) << 6) - + func_80047948(*(s32 *)(a0 + 0x1C) << 6); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) + delta; + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) - (delta >> 3); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) + delta; + ret = ((s32(*)(s32))func_8012CBA4)(a0); + if (ret & 0x1000) { + func_80131E00((void *)a0, 0x12); + break; + } + if ((ret & 0x2000) == 0) { + func_8012B23C((void *)a0); + *(u16 *)(a0 + 0x34) = 2; + *(s32 *)(a0 + 0x1C) = 0x3C; + break; + } + if (*(s32 *)(a0 + 0x1C) % 3 == 0) { + func_80143B6C(a0, 1); + } + if (func_8012BEE8(a0) != 0) { + *(u16 *)(a0 + 0x34) = 1; + } + break; + case 1: + delta = func_80047948((*(s32 *)(a0 + 0x1C) + 1) << 6) - + func_80047948(*(s32 *)(a0 + 0x1C) << 6); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) + delta; + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) - (delta >> 3); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) + delta; + *(s32 *)(a0 + 0x1C) = *(s32 *)(a0 + 0x1C) + 1; + if (*(s32 *)(a0 + 0x1C) >= 0x10) { + func_80131C78(a0); + } + break; + case 2: + ret = ((s32(*)(s32))func_8012CBF4)(a0); + if (ret & 0xFF) { + func_80187670(a0); + } else if (ret & 0x2000) { + func_80131C78(a0); + } else if (func_8012BEE8(a0) != 0) { + func_80131E00((void *)a0, 0xD); + } + break; + } + + if (*(s32 *)(a0 + 0x14) > 0x100000) { + *(s32 *)(a0 + 0x14) = 0x100000; + } +} + INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091_jr_80182268", func_801873FC); -INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091_jr_80182268", func_80187410); + +extern s32 rand(void); +extern s32 func_801879A8(void *a0, s32 a1, s32 a2, s32 a3); +extern void func_8012E8A8(u8 *a0); +extern void func_8002D4C8(s32 a0, s32 a1); + +void func_80187410(s32 a0) { + u16 buf[3]; + register s32 angle1 __asm__("$23"); + register s32 angle2 __asm__("$22"); + s32 maskraw; + s32 flags; + register s32 head1 __asm__("$18"); + register s32 head2 __asm__("$17"); + register s32 i __asm__("$19"); + s32 ret1; + s32 ret2; + + buf[0] = *(u16 *)(a0 + 0x6); + buf[1] = *(u16 *)(a0 + 0xA); + buf[2] = *(u16 *)(a0 + 0xE); + head1 = 0; + head2 = 0; + { + register s32 fieldval __asm__("$3") = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12); + angle1 = fieldval + 0x400; + flags = *(u16 *)(a0 + 0x70); + maskraw = flags & 0xF; + angle2 = fieldval - 0x400; + } + + if ((flags & 1) == 0) { + register s32 mask __asm__("$16"); + register s32 negoffset __asm__("$17"); + i = 0; + negoffset = -0x60000; + mask = maskraw; + while (i < 4) { + __asm__ __volatile__("" : "=r"(angle1) : "0"(angle1)); + func_801879A8(buf, angle1 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + negoffset, mask); + __asm__ __volatile__("" : "=r"(angle2) : "0"(angle2)); + func_801879A8(buf, angle2 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + negoffset, mask); + i++; + } + } else { + s32 mask; + i = 0; + mask = maskraw; + for (; i < 4; i++) { + __asm__ __volatile__("" : "=r"(angle1) : "0"(angle1)); + __asm__ __volatile__("" : "=r"(angle2) : "0"(angle2)); + ret1 = func_801879A8(buf, angle1 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + -0x60000, mask); + ret2 = func_801879A8(buf, angle2 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + -0x60000, mask); + if (ret1 != 0) { + if (head1 != 0) { + *(s32 *)(ret1 + 0x2C) = head1; + *(s32 *)(head1 + 0x30) = *(s32 *)(head1 + 0x30) + 1; + } else { + *(s32 *)(ret1 + 0x2C) = -1; + *(s32 *)(ret1 + 0x24) = a0; + head1 = ret1; + } + } + if (ret2 != 0) { + if (head2 != 0) { + *(s32 *)(ret2 + 0x2C) = head2; + *(s32 *)(head2 + 0x30) = *(s32 *)(head2 + 0x30) + 1; + } else { + *(s32 *)(ret2 + 0x2C) = -1; + *(s32 *)(ret2 + 0x24) = a0; + head2 = ret2; + } + } + } + } + + func_8012E8A8((u8 *)a0); + func_8002D4C8(0xA65, 0); +} + INCLUDE_ASM("asm/ov_SC03_091/nonmatchings/ov_SC03_091_jr_80182268", func_80187670); diff --git a/src/ov_SC03_094/ov_SC03_094_jr_8017BEBC.c b/src/ov_SC03_094/ov_SC03_094_jr_8017BEBC.c index acdb5411ba..94e46b1e34 100644 --- a/src/ov_SC03_094/ov_SC03_094_jr_8017BEBC.c +++ b/src/ov_SC03_094/ov_SC03_094_jr_8017BEBC.c @@ -4756,11 +4756,162 @@ INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094_jr_8017BEBC", func_80180CF INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094_jr_8017BEBC", func_80180EA4); -INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094_jr_8017BEBC", func_80180F70); + +extern s32 func_80047948(s32 a0); +extern void func_8012CBA4(s32 a0); +extern void func_8012CBF4(s32 a0); +extern void func_8012B23C(void *a0); +extern s32 func_8012BEE8(s32 a0); +extern s32 func_80143B6C(s32 a0, s32 a1); +extern void func_80131C78(s32 a0); +extern void func_80131E00(void *a0, s32 a1); + +void func_80180F70(s32 a0) { + s32 delta; + s32 ret; + + switch (*(u16 *)(a0 + 0x34)) { + case 0: + delta = func_80047948((*(s32 *)(a0 + 0x1C) - 1) << 6) - + func_80047948(*(s32 *)(a0 + 0x1C) << 6); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) + delta; + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) - (delta >> 3); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) + delta; + ret = ((s32(*)(s32))func_8012CBA4)(a0); + if (ret & 0x1000) { + func_80131E00((void *)a0, 0x12); + break; + } + if ((ret & 0x2000) == 0) { + func_8012B23C((void *)a0); + *(u16 *)(a0 + 0x34) = 2; + *(s32 *)(a0 + 0x1C) = 0x3C; + break; + } + if (*(s32 *)(a0 + 0x1C) % 3 == 0) { + func_80143B6C(a0, 1); + } + if (func_8012BEE8(a0) != 0) { + *(u16 *)(a0 + 0x34) = 1; + } + break; + case 1: + delta = func_80047948((*(s32 *)(a0 + 0x1C) + 1) << 6) - + func_80047948(*(s32 *)(a0 + 0x1C) << 6); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) + delta; + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) - (delta >> 3); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) + delta; + *(s32 *)(a0 + 0x1C) = *(s32 *)(a0 + 0x1C) + 1; + if (*(s32 *)(a0 + 0x1C) >= 0x10) { + func_80131C78(a0); + } + break; + case 2: + ret = ((s32(*)(s32))func_8012CBF4)(a0); + if (ret & 0xFF) { + func_80181448(a0); + } else if (ret & 0x2000) { + func_80131C78(a0); + } else if (func_8012BEE8(a0) != 0) { + func_80131E00((void *)a0, 0xD); + } + break; + } + + if (*(s32 *)(a0 + 0x14) > 0x100000) { + *(s32 *)(a0 + 0x14) = 0x100000; + } +} + INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094_jr_8017BEBC", func_801811D4); -INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094_jr_8017BEBC", func_801811E8); + +extern s32 rand(void); +extern s32 func_80181780(void *a0, s32 a1, s32 a2, s32 a3); +extern void func_8012E8A8(u8 *a0); +extern void func_8002D4C8(s32 a0, s32 a1); + +void func_801811E8(s32 a0) { + u16 buf[3]; + register s32 angle1 __asm__("$23"); + register s32 angle2 __asm__("$22"); + s32 maskraw; + s32 flags; + register s32 head1 __asm__("$18"); + register s32 head2 __asm__("$17"); + register s32 i __asm__("$19"); + s32 ret1; + s32 ret2; + + buf[0] = *(u16 *)(a0 + 0x6); + buf[1] = *(u16 *)(a0 + 0xA); + buf[2] = *(u16 *)(a0 + 0xE); + head1 = 0; + head2 = 0; + { + register s32 fieldval __asm__("$3") = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12); + angle1 = fieldval + 0x400; + flags = *(u16 *)(a0 + 0x70); + maskraw = flags & 0xF; + angle2 = fieldval - 0x400; + } + + if ((flags & 1) == 0) { + register s32 mask __asm__("$16"); + register s32 negoffset __asm__("$17"); + i = 0; + negoffset = -0x60000; + mask = maskraw; + while (i < 4) { + __asm__ __volatile__("" : "=r"(angle1) : "0"(angle1)); + func_80181780(buf, angle1 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + negoffset, mask); + __asm__ __volatile__("" : "=r"(angle2) : "0"(angle2)); + func_80181780(buf, angle2 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + negoffset, mask); + i++; + } + } else { + s32 mask; + i = 0; + mask = maskraw; + for (; i < 4; i++) { + __asm__ __volatile__("" : "=r"(angle1) : "0"(angle1)); + __asm__ __volatile__("" : "=r"(angle2) : "0"(angle2)); + ret1 = func_80181780(buf, angle1 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + -0x60000, mask); + ret2 = func_80181780(buf, angle2 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + -0x60000, mask); + if (ret1 != 0) { + if (head1 != 0) { + *(s32 *)(ret1 + 0x2C) = head1; + *(s32 *)(head1 + 0x30) = *(s32 *)(head1 + 0x30) + 1; + } else { + *(s32 *)(ret1 + 0x2C) = -1; + *(s32 *)(ret1 + 0x24) = a0; + head1 = ret1; + } + } + if (ret2 != 0) { + if (head2 != 0) { + *(s32 *)(ret2 + 0x2C) = head2; + *(s32 *)(head2 + 0x30) = *(s32 *)(head2 + 0x30) + 1; + } else { + *(s32 *)(ret2 + 0x2C) = -1; + *(s32 *)(ret2 + 0x24) = a0; + head2 = ret2; + } + } + } + } + + func_8012E8A8((u8 *)a0); + func_8002D4C8(0xA65, 0); +} + INCLUDE_ASM("asm/ov_SC03_094/nonmatchings/ov_SC03_094_jr_8017BEBC", func_80181448); diff --git a/src/ov_SC03_098/ov_SC03_098_jr_8017D898.c b/src/ov_SC03_098/ov_SC03_098_jr_8017D898.c index 30ae3a5d36..b071f8f165 100644 --- a/src/ov_SC03_098/ov_SC03_098_jr_8017D898.c +++ b/src/ov_SC03_098/ov_SC03_098_jr_8017D898.c @@ -4692,11 +4692,162 @@ INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098_jr_8017D898", func_801814F INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098_jr_8017D898", func_801816AC); -INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098_jr_8017D898", func_80181778); + +extern s32 func_80047948(s32 a0); +extern void func_8012CBA4(s32 a0); +extern void func_8012CBF4(s32 a0); +extern void func_8012B23C(void *a0); +extern s32 func_8012BEE8(s32 a0); +extern s32 func_80143B6C(s32 a0, s32 a1); +extern void func_80131C78(s32 a0); +extern void func_80131E00(void *a0, s32 a1); + +void func_80181778(s32 a0) { + s32 delta; + s32 ret; + + switch (*(u16 *)(a0 + 0x34)) { + case 0: + delta = func_80047948((*(s32 *)(a0 + 0x1C) - 1) << 6) - + func_80047948(*(s32 *)(a0 + 0x1C) << 6); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) + delta; + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) - (delta >> 3); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) + delta; + ret = ((s32(*)(s32))func_8012CBA4)(a0); + if (ret & 0x1000) { + func_80131E00((void *)a0, 0x12); + break; + } + if ((ret & 0x2000) == 0) { + func_8012B23C((void *)a0); + *(u16 *)(a0 + 0x34) = 2; + *(s32 *)(a0 + 0x1C) = 0x3C; + break; + } + if (*(s32 *)(a0 + 0x1C) % 3 == 0) { + func_80143B6C(a0, 1); + } + if (func_8012BEE8(a0) != 0) { + *(u16 *)(a0 + 0x34) = 1; + } + break; + case 1: + delta = func_80047948((*(s32 *)(a0 + 0x1C) + 1) << 6) - + func_80047948(*(s32 *)(a0 + 0x1C) << 6); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x18) + delta; + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1A) - (delta >> 3); + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) = + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x1C) + delta; + *(s32 *)(a0 + 0x1C) = *(s32 *)(a0 + 0x1C) + 1; + if (*(s32 *)(a0 + 0x1C) >= 0x10) { + func_80131C78(a0); + } + break; + case 2: + ret = ((s32(*)(s32))func_8012CBF4)(a0); + if (ret & 0xFF) { + func_80181C50(a0); + } else if (ret & 0x2000) { + func_80131C78(a0); + } else if (func_8012BEE8(a0) != 0) { + func_80131E00((void *)a0, 0xD); + } + break; + } + + if (*(s32 *)(a0 + 0x14) > 0x100000) { + *(s32 *)(a0 + 0x14) = 0x100000; + } +} + INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098_jr_8017D898", func_801819DC); -INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098_jr_8017D898", func_801819F0); + +extern s32 rand(void); +extern s32 func_80181F88(void *a0, s32 a1, s32 a2, s32 a3); +extern void func_8012E8A8(u8 *a0); +extern void func_8002D4C8(s32 a0, s32 a1); + +void func_801819F0(s32 a0) { + u16 buf[3]; + register s32 angle1 __asm__("$23"); + register s32 angle2 __asm__("$22"); + s32 maskraw; + s32 flags; + register s32 head1 __asm__("$18"); + register s32 head2 __asm__("$17"); + register s32 i __asm__("$19"); + s32 ret1; + s32 ret2; + + buf[0] = *(u16 *)(a0 + 0x6); + buf[1] = *(u16 *)(a0 + 0xA); + buf[2] = *(u16 *)(a0 + 0xE); + head1 = 0; + head2 = 0; + { + register s32 fieldval __asm__("$3") = *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12); + angle1 = fieldval + 0x400; + flags = *(u16 *)(a0 + 0x70); + maskraw = flags & 0xF; + angle2 = fieldval - 0x400; + } + + if ((flags & 1) == 0) { + register s32 mask __asm__("$16"); + register s32 negoffset __asm__("$17"); + i = 0; + negoffset = -0x60000; + mask = maskraw; + while (i < 4) { + __asm__ __volatile__("" : "=r"(angle1) : "0"(angle1)); + func_80181F88(buf, angle1 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + negoffset, mask); + __asm__ __volatile__("" : "=r"(angle2) : "0"(angle2)); + func_80181F88(buf, angle2 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + negoffset, mask); + i++; + } + } else { + s32 mask; + i = 0; + mask = maskraw; + for (; i < 4; i++) { + __asm__ __volatile__("" : "=r"(angle1) : "0"(angle1)); + __asm__ __volatile__("" : "=r"(angle2) : "0"(angle2)); + ret1 = func_80181F88(buf, angle1 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + -0x60000, mask); + ret2 = func_80181F88(buf, angle2 * 0x10000 >> 0x10, rand() % 4 * -0x10000 + -0x60000, mask); + if (ret1 != 0) { + if (head1 != 0) { + *(s32 *)(ret1 + 0x2C) = head1; + *(s32 *)(head1 + 0x30) = *(s32 *)(head1 + 0x30) + 1; + } else { + *(s32 *)(ret1 + 0x2C) = -1; + *(s32 *)(ret1 + 0x24) = a0; + head1 = ret1; + } + } + if (ret2 != 0) { + if (head2 != 0) { + *(s32 *)(ret2 + 0x2C) = head2; + *(s32 *)(head2 + 0x30) = *(s32 *)(head2 + 0x30) + 1; + } else { + *(s32 *)(ret2 + 0x2C) = -1; + *(s32 *)(ret2 + 0x24) = a0; + head2 = ret2; + } + } + } + } + + func_8012E8A8((u8 *)a0); + func_8002D4C8(0xA65, 0); +} + INCLUDE_ASM("asm/ov_SC03_098/nonmatchings/ov_SC03_098_jr_8017D898", func_80181C50); diff --git a/src/ov_SC03_117/ov_SC03_117_jr_8017BEBC.c b/src/ov_SC03_117/ov_SC03_117_jr_8017BEBC.c index 2be93dda51..9441226ae5 100644 --- a/src/ov_SC03_117/ov_SC03_117_jr_8017BEBC.c +++ b/src/ov_SC03_117/ov_SC03_117_jr_8017BEBC.c @@ -3239,7 +3239,69 @@ INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_8017CF5 INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_8017CFB0); -INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_8017D07C); +extern void func_8001C810(s32 a0, s32 a1); +extern void func_8013C9C4(void * arg0); +extern void func_801466B4(u16 a0, s32 a1, s32 a2, s32 a3, s32 arg5); +extern void func_80146CA0(void *a0); +extern void func_80147324(s32 a0); +extern void func_80162FC0(s32 *a0); +extern void func_8016325C(s32 a0, s32 a1, s32 a2, s32 a3); + +void func_8017D07C(s32 a0) { + extern u8 D_801883B0[]; + extern s32 D_801CADEC; + extern s32 D_80188368; + + s32 iVar1; + s32 iVar2; + s16 sVar1; + + iVar1 = *(s32 *)(a0 + 0x4c); + iVar2 = *(s32 *)(a0 + 0x20); + func_8016325C(a0, 0, 0x20000, 0); + func_80162FC0((s32 *)a0); + if ((*(s16 *)(a0 + 0x60) == 0) && (0 < *(s32 *)(a0 + 0x28))) { + u16 uVar1; + *(u16 *)(iVar2 + 0x10) = 0; + uVar1 = *(u16 *)(a0 + 0x60); + *(u16 *)(a0 + 0x60) = uVar1 + 1; + } + sVar1 = *(s16 *)(iVar1 + 0xA); + if (sVar1 < *(s16 *)(a0 + 0xA)) { + u16 uVar1; + s32 uVar2; + *(s16 *)(a0 + 0xA) = sVar1; + func_8013C9C4(D_801883B0); + *(u16 *)(a0 + 0x60) = *(u16 *)(iVar2 + 0x18); + func_8001C810(iVar2, (s32)&D_801CADEC); + *(s32 **)(iVar2 + 0x80) = &D_80188368; + *(u16 *)(iVar2 + 0x2c) = *(u16 *)(iVar2 + 0x2c) | 0xA0; + *(u32 *)(iVar2 + 4) = *(u32 *)(iVar2 + 4) | 0x50000000; + uVar1 = *(u16 *)(a0 + 0x60); + *(u16 *)(iVar2 + 0x1c) = uVar1; + *(u16 *)(iVar2 + 0x1a) = uVar1; + *(u16 *)(iVar2 + 0x18) = uVar1; + if (*(s32 *)(a0 + 0x50) == 0) { + *(u16 *)(iVar2 + 0x2c) = *(u16 *)(iVar2 + 0x2c) | 0x10; + func_801466B4(0x1B, a0, 0, 0, 1); + func_801466B4(0x1B, a0, 1, 0, 1); + func_801466B4(0x1B, a0, 2, 0, 1); + func_801466B4(0x1B, a0, 3, 0, 1); + uVar2 = 0x81D; + } else { + uVar2 = 0xC5E; + } + func_80147324(uVar2); + func_80146CA0((void *)a0); + } else if (*(s16 *)(a0 + 0x60) != 0) { + s16 sVar2; + sVar2 = *(u16 *)(iVar2 + 0x1c) + 0x100; + *(s16 *)(iVar2 + 0x1c) = sVar2; + *(s16 *)(iVar2 + 0x1a) = sVar2; + *(s16 *)(iVar2 + 0x18) = sVar2; + } +} + INCLUDE_ASM("asm/ov_SC03_117/nonmatchings/ov_SC03_117_jr_8017BEBC", func_8017D248); diff --git a/src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c b/src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c index 3e93f3bff3..b1cee506fa 100644 --- a/src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c +++ b/src/ov_SC03_118/ov_SC03_118_jr_8017AE2C.c @@ -4785,7 +4785,69 @@ INCLUDE_ASM("asm/ov_SC03_118/nonmatchings/ov_SC03_118_jr_8017AE2C", func_8017F4F INCLUDE_ASM("asm/ov_SC03_118/nonmatchings/ov_SC03_118_jr_8017AE2C", func_8017F558); -INCLUDE_ASM("asm/ov_SC03_118/nonmatchings/ov_SC03_118_jr_8017AE2C", func_8017F624); +extern void func_8001C810(s32 a0, s32 a1); +extern void func_8013C9C4(void * arg0); +extern void func_801466B4(u16 a0, s32 a1, s32 a2, s32 a3, s32 arg5); +extern void func_80146CA0(void *a0); +extern void func_80147324(s32 a0); +extern void func_80162FC0(s32 *a0); +extern void func_8016325C(s32 a0, s32 a1, s32 a2, s32 a3); + +void func_8017F624(s32 a0) { + extern u8 D_8018DA74[]; + extern s32 D_801D0934; + extern s32 D_8018DA2C; + + s32 iVar1; + s32 iVar2; + s16 sVar1; + + iVar1 = *(s32 *)(a0 + 0x4c); + iVar2 = *(s32 *)(a0 + 0x20); + func_8016325C(a0, 0, 0x20000, 0); + func_80162FC0((s32 *)a0); + if ((*(s16 *)(a0 + 0x60) == 0) && (0 < *(s32 *)(a0 + 0x28))) { + u16 uVar1; + *(u16 *)(iVar2 + 0x10) = 0; + uVar1 = *(u16 *)(a0 + 0x60); + *(u16 *)(a0 + 0x60) = uVar1 + 1; + } + sVar1 = *(s16 *)(iVar1 + 0xA); + if (sVar1 < *(s16 *)(a0 + 0xA)) { + u16 uVar1; + s32 uVar2; + *(s16 *)(a0 + 0xA) = sVar1; + func_8013C9C4(D_8018DA74); + *(u16 *)(a0 + 0x60) = *(u16 *)(iVar2 + 0x18); + func_8001C810(iVar2, (s32)&D_801D0934); + *(s32 **)(iVar2 + 0x80) = &D_8018DA2C; + *(u16 *)(iVar2 + 0x2c) = *(u16 *)(iVar2 + 0x2c) | 0xA0; + *(u32 *)(iVar2 + 4) = *(u32 *)(iVar2 + 4) | 0x50000000; + uVar1 = *(u16 *)(a0 + 0x60); + *(u16 *)(iVar2 + 0x1c) = uVar1; + *(u16 *)(iVar2 + 0x1a) = uVar1; + *(u16 *)(iVar2 + 0x18) = uVar1; + if (*(s32 *)(a0 + 0x50) == 0) { + *(u16 *)(iVar2 + 0x2c) = *(u16 *)(iVar2 + 0x2c) | 0x10; + func_801466B4(0x1B, a0, 0, 0, 1); + func_801466B4(0x1B, a0, 1, 0, 1); + func_801466B4(0x1B, a0, 2, 0, 1); + func_801466B4(0x1B, a0, 3, 0, 1); + uVar2 = 0x81D; + } else { + uVar2 = 0xC5E; + } + func_80147324(uVar2); + func_80146CA0((void *)a0); + } else if (*(s16 *)(a0 + 0x60) != 0) { + s16 sVar2; + sVar2 = *(u16 *)(iVar2 + 0x1c) + 0x100; + *(s16 *)(iVar2 + 0x1c) = sVar2; + *(s16 *)(iVar2 + 0x1a) = sVar2; + *(s16 *)(iVar2 + 0x18) = sVar2; + } +} + INCLUDE_ASM("asm/ov_SC03_118/nonmatchings/ov_SC03_118_jr_8017AE2C", func_8017F7F0); diff --git a/src/ov_SC03_119/ov_SC03_119_jr_8017AE2C.c b/src/ov_SC03_119/ov_SC03_119_jr_8017AE2C.c index c0bc5d2fe7..5e1ecf645a 100644 --- a/src/ov_SC03_119/ov_SC03_119_jr_8017AE2C.c +++ b/src/ov_SC03_119/ov_SC03_119_jr_8017AE2C.c @@ -4778,7 +4778,69 @@ INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017AE2C", func_8017F4F INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017AE2C", func_8017F558); -INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017AE2C", func_8017F624); +extern void func_8001C810(s32 a0, s32 a1); +extern void func_8013C9C4(void * arg0); +extern void func_801466B4(u16 a0, s32 a1, s32 a2, s32 a3, s32 arg5); +extern void func_80146CA0(void *a0); +extern void func_80147324(s32 a0); +extern void func_80162FC0(s32 *a0); +extern void func_8016325C(s32 a0, s32 a1, s32 a2, s32 a3); + +void func_8017F624(s32 a0) { + extern u8 D_8018DA74[]; + extern s32 D_801D0934; + extern s32 D_8018DA2C; + + s32 iVar1; + s32 iVar2; + s16 sVar1; + + iVar1 = *(s32 *)(a0 + 0x4c); + iVar2 = *(s32 *)(a0 + 0x20); + func_8016325C(a0, 0, 0x20000, 0); + func_80162FC0((s32 *)a0); + if ((*(s16 *)(a0 + 0x60) == 0) && (0 < *(s32 *)(a0 + 0x28))) { + u16 uVar1; + *(u16 *)(iVar2 + 0x10) = 0; + uVar1 = *(u16 *)(a0 + 0x60); + *(u16 *)(a0 + 0x60) = uVar1 + 1; + } + sVar1 = *(s16 *)(iVar1 + 0xA); + if (sVar1 < *(s16 *)(a0 + 0xA)) { + u16 uVar1; + s32 uVar2; + *(s16 *)(a0 + 0xA) = sVar1; + func_8013C9C4(D_8018DA74); + *(u16 *)(a0 + 0x60) = *(u16 *)(iVar2 + 0x18); + func_8001C810(iVar2, (s32)&D_801D0934); + *(s32 **)(iVar2 + 0x80) = &D_8018DA2C; + *(u16 *)(iVar2 + 0x2c) = *(u16 *)(iVar2 + 0x2c) | 0xA0; + *(u32 *)(iVar2 + 4) = *(u32 *)(iVar2 + 4) | 0x50000000; + uVar1 = *(u16 *)(a0 + 0x60); + *(u16 *)(iVar2 + 0x1c) = uVar1; + *(u16 *)(iVar2 + 0x1a) = uVar1; + *(u16 *)(iVar2 + 0x18) = uVar1; + if (*(s32 *)(a0 + 0x50) == 0) { + *(u16 *)(iVar2 + 0x2c) = *(u16 *)(iVar2 + 0x2c) | 0x10; + func_801466B4(0x1B, a0, 0, 0, 1); + func_801466B4(0x1B, a0, 1, 0, 1); + func_801466B4(0x1B, a0, 2, 0, 1); + func_801466B4(0x1B, a0, 3, 0, 1); + uVar2 = 0x81D; + } else { + uVar2 = 0xC5E; + } + func_80147324(uVar2); + func_80146CA0((void *)a0); + } else if (*(s16 *)(a0 + 0x60) != 0) { + s16 sVar2; + sVar2 = *(u16 *)(iVar2 + 0x1c) + 0x100; + *(s16 *)(iVar2 + 0x1c) = sVar2; + *(s16 *)(iVar2 + 0x1a) = sVar2; + *(s16 *)(iVar2 + 0x18) = sVar2; + } +} + INCLUDE_ASM("asm/ov_SC03_119/nonmatchings/ov_SC03_119_jr_8017AE2C", func_8017F7F0); diff --git a/src/ov_SC05_010/ov_SC05_010_jr_8017C8D0.c b/src/ov_SC05_010/ov_SC05_010_jr_8017C8D0.c index c5bc6d6991..79be554ca3 100644 --- a/src/ov_SC05_010/ov_SC05_010_jr_8017C8D0.c +++ b/src/ov_SC05_010/ov_SC05_010_jr_8017C8D0.c @@ -3244,7 +3244,69 @@ INCLUDE_ASM("asm/ov_SC05_010/nonmatchings/ov_SC05_010_jr_8017C8D0", func_8017D96 INCLUDE_ASM("asm/ov_SC05_010/nonmatchings/ov_SC05_010_jr_8017C8D0", func_8017D9C4); -INCLUDE_ASM("asm/ov_SC05_010/nonmatchings/ov_SC05_010_jr_8017C8D0", func_8017DA90); +extern void func_8001C810(s32 a0, s32 a1); +extern void func_8013C9C4(void * arg0); +extern void func_801466B4(u16 a0, s32 a1, s32 a2, s32 a3, s32 arg5); +extern void func_80146CA0(void *a0); +extern void func_80147324(s32 a0); +extern void func_80162FC0(s32 *a0); +extern void func_8016325C(s32 a0, s32 a1, s32 a2, s32 a3); + +void func_8017DA90(s32 a0) { + extern u8 D_8018C4F0[]; + extern s32 D_80192200; + extern s32 D_8018C4A8; + + s32 iVar1; + s32 iVar2; + s16 sVar1; + + iVar1 = *(s32 *)(a0 + 0x4c); + iVar2 = *(s32 *)(a0 + 0x20); + func_8016325C(a0, 0, 0x20000, 0); + func_80162FC0((s32 *)a0); + if ((*(s16 *)(a0 + 0x60) == 0) && (0 < *(s32 *)(a0 + 0x28))) { + u16 uVar1; + *(u16 *)(iVar2 + 0x10) = 0; + uVar1 = *(u16 *)(a0 + 0x60); + *(u16 *)(a0 + 0x60) = uVar1 + 1; + } + sVar1 = *(s16 *)(iVar1 + 0xA); + if (sVar1 < *(s16 *)(a0 + 0xA)) { + u16 uVar1; + s32 uVar2; + *(s16 *)(a0 + 0xA) = sVar1; + func_8013C9C4(D_8018C4F0); + *(u16 *)(a0 + 0x60) = *(u16 *)(iVar2 + 0x18); + func_8001C810(iVar2, (s32)&D_80192200); + *(s32 **)(iVar2 + 0x80) = &D_8018C4A8; + *(u16 *)(iVar2 + 0x2c) = *(u16 *)(iVar2 + 0x2c) | 0xA0; + *(u32 *)(iVar2 + 4) = *(u32 *)(iVar2 + 4) | 0x50000000; + uVar1 = *(u16 *)(a0 + 0x60); + *(u16 *)(iVar2 + 0x1c) = uVar1; + *(u16 *)(iVar2 + 0x1a) = uVar1; + *(u16 *)(iVar2 + 0x18) = uVar1; + if (*(s32 *)(a0 + 0x50) == 0) { + *(u16 *)(iVar2 + 0x2c) = *(u16 *)(iVar2 + 0x2c) | 0x10; + func_801466B4(0x1B, a0, 0, 0, 1); + func_801466B4(0x1B, a0, 1, 0, 1); + func_801466B4(0x1B, a0, 2, 0, 1); + func_801466B4(0x1B, a0, 3, 0, 1); + uVar2 = 0x81D; + } else { + uVar2 = 0xC5E; + } + func_80147324(uVar2); + func_80146CA0((void *)a0); + } else if (*(s16 *)(a0 + 0x60) != 0) { + s16 sVar2; + sVar2 = *(u16 *)(iVar2 + 0x1c) + 0x100; + *(s16 *)(iVar2 + 0x1c) = sVar2; + *(s16 *)(iVar2 + 0x1a) = sVar2; + *(s16 *)(iVar2 + 0x18) = sVar2; + } +} + INCLUDE_ASM("asm/ov_SC05_010/nonmatchings/ov_SC05_010_jr_8017C8D0", func_8017DC5C); diff --git a/src/ov_SC06_013/ov_SC06_013_jr_8017BEBC.c b/src/ov_SC06_013/ov_SC06_013_jr_8017BEBC.c index a7d95b2943..8cc8c26787 100644 --- a/src/ov_SC06_013/ov_SC06_013_jr_8017BEBC.c +++ b/src/ov_SC06_013/ov_SC06_013_jr_8017BEBC.c @@ -3487,7 +3487,228 @@ s32 func_8017D9E8(void) { } -INCLUDE_ASM("asm/ov_SC06_013/nonmatchings/ov_SC06_013_jr_8017BEBC", func_8017D9F0); +/* func_8017D9F0 -- ov_SC06_013 (family of 5: also func_8017D8AC/ov_SC06_015, + * func_8017ED54/ov_SC06_014, func_801830B4/ov_SC06_016, func_80181164/ov_SC06_030 -- all + * byte-identical modulo per-overlay local static data addresses). + * + * Builds a 5-pointed symmetric star/cross set of screen coordinates around the projected + * position of the object, then emits 4 Gouraud-shaded quads (POLY_G4, len=8, code=0x3A) whose + * per-vertex colour/x/y are selected from that coordinate set via small per-overlay index + * tables, and finally adds the sprite-header primitive itself to the OT. + */ + +extern s32 D_80126950; +extern s16 D_800B9A02; +extern s32 D_800A651C; + +extern void RotTransSV(void *a0, void *a1, void *a2); +extern void func_8004914C(void *a0); +extern void func_800491AC(void *a0); +extern s32 RotTransPers(s32 a0, s32 a1, s32 *a2, s32 *a3); + +extern void *func_80010A08(s32 a0); +extern s32 GetTPage(s32 a0, s32 a1, s32 a2, s32 a3); +extern s32 func_8005A600(s32 a0, s32 a1, s32 a2, s32 a3, s32 a4); +extern s32 AddPrim(s32 a0, void *a1); + +extern u8 D_800AF648; + +extern s32 D_80195A4C; +extern s32 D_80195A54[]; + +extern u8 D_80195A60[]; +extern u8 D_80195A61[]; +extern u8 D_80195A62[]; +extern u8 D_80195A63[]; +extern u8 D_80195A70[]; +extern u8 D_80195A71[]; +extern u8 D_80195A72[]; +extern u8 D_80195A73[]; +extern u8 D_80195A80[]; +extern u8 D_80195A81[]; +extern u8 D_80195A82[]; +extern u8 D_80195A83[]; + +/* §37/§124 SELF-axis: the TU declares `extern void func_8017D9F0(void);` (L3615) while the + byte-true definition takes an s32. Define under a private C name bound to the real symbol. */ +extern void aF8017D9F0(s32 param_1) __asm__("func_8017D9F0"); +void aF8017D9F0(s32 param_1) { + /* single raw local block; sp+0x18 .. sp+0x5B (verified via the outgoing-arg-area rounded + * to 8 for func_8005A600's 5th argument, matching the sibling family's identical frame). */ + u8 buf[0x44]; + + /* Loop-carried locals pinned to the exact callee-saved registers the target uses -- + * each is reused for TWO logical roles (early-phase / loop-phase), matching the target's + * own register reuse across the two roles (§ "don't conclude unsteerable, try register + * pins" -- these are loop/local values, never the incoming parameter, so S3 is respected). */ + register s32 vVec __asm__("$17"); /* s1: RotTransSV/Pers vector ptr, then loop counter i */ + register s32 vFlag __asm__("$18"); /* s2: RotTransSV/Pers flag ptr, then grid anchor */ + register u8 *p0 __asm__("$16"); /* s0: D_800AF648 ptr, then prim-write pointer */ + register u8 *cur __asm__("$19"); /* s3: walking AddPrim arg (s4object+0xC, +=0x24) */ + register void *s4o __asm__("$20"); /* s4: func_80010A08(0x9C) result */ + register s32 *ctab __asm__("$21"); /* s5: &D_80195A54 colour table */ + register s32 s6 __asm__("$22"); /* s6: OT-base + zcount, the AddPrim OT arg */ + + s32 zcount; + s32 radius, inner; + u16 cx, cy; + s32 tpage; + + { + register s32 *p __asm__("$2") = + (s32 *)(*(s32 *)(param_1 + 0x20) + 0x34); + __asm__ __volatile__( + "lw $12, 0(%0)\n" + "lw $13, 4(%0)\n" + "ctc2 $12, $0\n" + "ctc2 $13, $1\n" + "lw $12, 8(%0)\n" + "lw $13, 12(%0)\n" + "lw $14, 16(%0)\n" + "ctc2 $12, $2\n" + "ctc2 $13, $3\n" + "ctc2 $14, $4\n" + "lw $12, 20(%0)\n" + "lw $13, 24(%0)\n" + "ctc2 $12, $5\n" + "lw $14, 28(%0)\n" + "ctc2 $13, $6\n" + "ctc2 $14, $7\n" + : : "r"(p) : "$12", "$13", "$14", "memory"); + } + + { + /* §gcc-2.7.2-map/sched.md rule 7: a single-SET pseudo gets a "birthing boost" that + * sinks it to just before its first consumer, regardless of source order. A 2nd SET + * that survives CSE (a zero-byte re-tie) disables the boost so it schedules at its + * natural (early) priority instead. */ + void *vecAddr = &D_80195A4C; + void *arg1; + __asm__ __volatile__("" : "=r"(vecAddr) : "0"(vecAddr)); + vVec = (s32)(buf + 0x10); + arg1 = (void *)vVec; + __asm__ __volatile__("" : "=r"(arg1) : "0"(arg1)); + vFlag = (s32)(buf + 0x38); + RotTransSV(vecAddr, arg1, (void *)vFlag); + } + + p0 = &D_800AF648; + func_8004914C(p0); + func_800491AC(p0); + + zcount = RotTransPers(vVec, (s32)(buf + 0x3C), (s32 *)(buf + 0x40), (s32 *)vFlag); + if (zcount <= 0) { + return; + } + if (*(s32 *)vFlag < 0) { + return; + } + zcount = zcount << 2; + + radius = ((D_80126950 + 0x1F4) * 48) / zcount; + + cx = *(u16 *)(buf + 0x3C); + cy = *(u16 *)(buf + 0x3E); + + { + register s32 t1 __asm__("$9") = + *(s32 *)((s8 *)&D_800A651C + (u16)D_800B9A02 * 0x14); + s6 = t1 + zcount; + } + + *(u16 *)(buf + 0x1C) = cx; + *(u16 *)(buf + 0x2C) = cy; + + *(u16 *)(buf + 0x18) = cx - radius; + + inner = (radius * 179) >> 8; + + *(u16 *)(buf + 0x1A) = cx - inner; + *(u16 *)(buf + 0x1E) = cx + inner; + *(u16 *)(buf + 0x20) = cx + radius; + *(u16 *)(buf + 0x28) = cy - radius; + *(u16 *)(buf + 0x2A) = cy - inner; + *(u16 *)(buf + 0x2E) = cy + inner; + *(u16 *)(buf + 0x30) = cy + radius; + + s4o = func_80010A08(0x9C); + if (s4o == 0) { + return; + } + + tpage = GetTPage(0, 1, 0, 0); + func_8005A600((s32)s4o, 0, 0, (u16)tpage, 0); + + { + register s32 t __asm__("$2") = (s32)((u8 *)s4o + 0xC); + cur = (u8 *)t; + ctab = D_80195A54; + vFlag = (s32)buf; + p0 = (u8 *)s4o + 0x2E; + vVec = 0; + + *(s32 *)(buf + 0x04) = (s32)((u8 *)s4o + 0x30); + *(s32 *)(buf + 0x08) = (s32)((u8 *)s4o + 0x54); + *(s32 *)(buf + 0x00) = t; + *(s32 *)(buf + 0x0C) = (s32)((u8 *)s4o + 0x78); + } + + for (; vVec < 0x10;) { + s32 color0, color1, color2, color3; + u16 x0, x1, x2, x3; + u16 y0, y1, y2, y3; + + color0 = ctab[D_80195A80[vVec]]; + *(s32 *)(p0 - 0x1E) = color0; + color1 = ctab[D_80195A81[vVec]]; + *(s32 *)(p0 - 0x16) = color1; + color2 = ctab[D_80195A82[vVec]]; + *(s32 *)(p0 - 0xE) = color2; + color3 = ctab[D_80195A83[vVec]]; + *(u8 *)(p0 - 0x1F) = 8; + *(u8 *)(p0 - 0x1B) = 0x3A; + *(s32 *)(p0 - 0x6) = color3; + + x0 = *(u16 *)(vFlag + D_80195A60[vVec] * 2 + 0x18); + *(u16 *)(p0 - 0x1A) = x0; + x1 = *(u16 *)(vFlag + D_80195A61[vVec] * 2 + 0x18); + *(u16 *)(p0 - 0x12) = x1; + x2 = *(u16 *)(vFlag + D_80195A62[vVec] * 2 + 0x18); + *(u16 *)(p0 - 0xA) = x2; + x3 = *(u16 *)(vFlag + D_80195A63[vVec] * 2 + 0x18); + *(u16 *)(p0 - 0x2) = x3; + + y0 = *(u16 *)(vFlag + D_80195A70[vVec] * 2 + 0x28); + *(u16 *)(p0 - 0x18) = y0; + y1 = *(u16 *)(vFlag + D_80195A71[vVec] * 2 + 0x28); + *(u16 *)(p0 - 0x10) = y1; + { + s32 argA0; + u8 *argA1; + + y2 = *(u16 *)(vFlag + D_80195A72[vVec] * 2 + 0x28); + argA0 = s6; + __asm__ __volatile__("" : "=r"(argA0) : "0"(argA0)); + *(u16 *)(p0 - 0x8) = y2; + argA1 = cur; + __asm__ __volatile__("" : "=r"(argA1) : "0"(argA1)); + { + u8 idx3 = D_80195A73[vVec]; + cur += 0x24; + y3 = *(u16 *)(vFlag + idx3 * 2 + 0x28); + vVec += 4; + } + + *(u16 *)(p0) = y3; + + AddPrim(argA0, argA1); + } + p0 += 0x24; + } + + AddPrim(s6, s4o); +} +