From d5111014d1bda2b150fd4e7de5918c4bb5507fe9 Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Thu, 10 Sep 2026 21:22:44 -0600 Subject: [PATCH] =?UTF-8?q?phase-36:=20S104=20s104=5Fd6=20=E2=80=94=20func?= =?UTF-8?q?=5F8017B614=20banked=20at=200=20through=20the=20whole-object=20?= =?UTF-8?q?gate=20+=20propagated=20=E2=80=94=203=20levers=E2=86=920:=20the?= =?UTF-8?q?=20banked=20ov=5FSC01=5F000=20variant=20ported=20(one-scope=20s?= =?UTF-8?q?rc,=20struct-member=20tail=20reads,=20D=5F8012694C[0]=20store)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../agents/md_SC03_076__func_801F2348/body.c | 29 ++ .../md_SC03_076__func_801F2348/body_free.c | 36 ++ .../md_SC03_076__func_801F2348/body_tree.c | 37 ++ .../md_SC03_076__func_801F2348/history.txt | 16 + .../md_SC03_076__func_801F2348/mechanism.md | 85 ++++ .../md_SC03_076__func_801F2348/neighbours.txt | 1 + .../md_SC03_076__func_801F2348/related.txt | 139 +++++++ .../md_SC03_076__func_801F2348/residual.txt | 11 + .../md_SC03_076__func_801F2348/sites.txt | 3 + .../agents/md_SC03_076__func_801F2348/tu.txt | 2 + .../agents/ov_SC03_091__func_80186440/body.c | 121 ++++++ .../ov_SC03_091__func_80186440/body_free.c | 125 ++++++ .../ov_SC03_091__func_80186440/body_tree.c | 125 ++++++ .../ov_SC03_091__func_80186440/history.txt | 15 + .../ov_SC03_091__func_80186440/mechanism.md | 72 ++++ .../ov_SC03_091__func_80186440/neighbours.txt | 1 + .../ov_SC03_091__func_80186440/related.txt | 138 +++++++ .../ov_SC03_091__func_80186440/residual.txt | 11 + .../ov_SC03_091__func_80186440/sites.txt | 1 + .../agents/ov_SC03_091__func_80186440/tu.txt | 2 + .../agents/ov_SC07_010__func_8017B614/body.c | 51 +++ .../ov_SC07_010__func_8017B614/mechanism.md | 78 ++++ .../ov_SC07_010__func_8017B614/neighbours.txt | 2 +- .../ov_SC07_010__func_8017B614/related.txt | 157 +++++++- .run/P36/delever/calibration.json | 374 +++++++++--------- .run/P36/delever/ledger.jsonl | 8 + src/ov_MAIN_012/ov_MAIN_012_jr_801789AC.c | 55 +-- src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c | 58 ++- src/ov_SC02_037/ov_SC02_037_jr_8017AE2C.c | 55 +-- src/ov_SC03_107/ov_SC03_107_jr_801789AC.c | 55 +-- src/ov_SC07_006/ov_SC07_006_jr_8017AE2C.c | 57 ++- src/ov_SC07_007/ov_SC07_007_jr_8017AE2C.c | 57 ++- src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c | 55 +-- src/ov_SC07_011/ov_SC07_011_jr_8017AE2C.c | 55 +-- 34 files changed, 1612 insertions(+), 475 deletions(-) create mode 100644 .run/P36/agents/md_SC03_076__func_801F2348/body.c create mode 100644 .run/P36/agents/md_SC03_076__func_801F2348/body_free.c create mode 100644 .run/P36/agents/md_SC03_076__func_801F2348/body_tree.c create mode 100644 .run/P36/agents/md_SC03_076__func_801F2348/history.txt create mode 100644 .run/P36/agents/md_SC03_076__func_801F2348/mechanism.md create mode 100644 .run/P36/agents/md_SC03_076__func_801F2348/neighbours.txt create mode 100644 .run/P36/agents/md_SC03_076__func_801F2348/related.txt create mode 100644 .run/P36/agents/md_SC03_076__func_801F2348/residual.txt create mode 100644 .run/P36/agents/md_SC03_076__func_801F2348/sites.txt create mode 100644 .run/P36/agents/md_SC03_076__func_801F2348/tu.txt create mode 100644 .run/P36/agents/ov_SC03_091__func_80186440/body.c create mode 100644 .run/P36/agents/ov_SC03_091__func_80186440/body_free.c create mode 100644 .run/P36/agents/ov_SC03_091__func_80186440/body_tree.c create mode 100644 .run/P36/agents/ov_SC03_091__func_80186440/history.txt create mode 100644 .run/P36/agents/ov_SC03_091__func_80186440/mechanism.md create mode 100644 .run/P36/agents/ov_SC03_091__func_80186440/neighbours.txt create mode 100644 .run/P36/agents/ov_SC03_091__func_80186440/related.txt create mode 100644 .run/P36/agents/ov_SC03_091__func_80186440/residual.txt create mode 100644 .run/P36/agents/ov_SC03_091__func_80186440/sites.txt create mode 100644 .run/P36/agents/ov_SC03_091__func_80186440/tu.txt create mode 100644 .run/P36/agents/ov_SC07_010__func_8017B614/body.c create mode 100644 .run/P36/agents/ov_SC07_010__func_8017B614/mechanism.md diff --git a/.run/P36/agents/md_SC03_076__func_801F2348/body.c b/.run/P36/agents/md_SC03_076__func_801F2348/body.c new file mode 100644 index 000000000..259e0d85c --- /dev/null +++ b/.run/P36/agents/md_SC03_076__func_801F2348/body.c @@ -0,0 +1,29 @@ +s32 func_801F2348(void) { + extern s32 func_80029504(void); + extern s32 func_80029178(s32); + extern u8 D_801F375C[]; + extern u8 D_801F379C[]; + extern s32 D_801EF3EC; + s32 x; + s32 t; + s32 p; + s32 v; + + x = func_80029504(); + if ((u32)(x - 200) < 100) { + t = 0; + } else if (x < 300 || (func_80029178(250) & 0xFF) == 0) { + t = 1; + } else { + t = 0; + } + if (t != 0) { + p = D_801EF3EC; + v = (s32)&D_801F375C; + } else { + p = D_801EF3EC; + v = (s32)&D_801F379C; + } + *(s32 *)(p + 4) = v; + return v; +} diff --git a/.run/P36/agents/md_SC03_076__func_801F2348/body_free.c b/.run/P36/agents/md_SC03_076__func_801F2348/body_free.c new file mode 100644 index 000000000..d26ca71a7 --- /dev/null +++ b/.run/P36/agents/md_SC03_076__func_801F2348/body_free.c @@ -0,0 +1,36 @@ +s32 func_801F2348(void) { + extern s32 func_80029504(void); + extern s32 func_80029178(s32); + extern u8 D_801F375C[]; + extern u8 D_801F379C[]; + extern s32 D_801EF3EC; + s32 x; + s32 t; + s32 p; + s32 v; + + x = func_80029504(); + if ((u32)(x - 200) < 100) { + t = 0; + goto join; + } + if (x < 300) { + t = 1; + goto join; + } + if (func_80029178(250) & 0xFF) { + t = 0; + goto join; + } + t = 1; +join: + if (t != 0) { + p = D_801EF3EC; + v = (s32)&D_801F375C; + } else { + p = D_801EF3EC; + v = (s32)&D_801F379C; + } + *(s32 *)(p + 4) = v; + return v; +} diff --git a/.run/P36/agents/md_SC03_076__func_801F2348/body_tree.c b/.run/P36/agents/md_SC03_076__func_801F2348/body_tree.c new file mode 100644 index 000000000..27eb02559 --- /dev/null +++ b/.run/P36/agents/md_SC03_076__func_801F2348/body_tree.c @@ -0,0 +1,37 @@ +s32 func_801F2348(void) { + extern s32 func_80029504(void); + extern s32 func_80029178(s32); + extern u8 D_801F375C[]; + extern u8 D_801F379C[]; + extern s32 D_801EF3EC; + s32 x; + s32 t; + s32 p; + s32 v; + + x = func_80029504(); + if ((u32)(x - 200) < 100) { + t = 0; + goto join; + } + if (x < 300) { + t = 1; + goto join; + } + if (func_80029178(250) & 0xFF) { + t = 0; + goto join; + } + __asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus9) + t = 1; +join: + if (t != 0) { + p = D_801EF3EC; + v = (s32)&D_801F375C; + } else { + p = D_801EF3EC; + v = (s32)&D_801F379C; + } + *(s32 *)(p + 4) = v; + return v; +} diff --git a/.run/P36/agents/md_SC03_076__func_801F2348/history.txt b/.run/P36/agents/md_SC03_076__func_801F2348/history.txt new file mode 100644 index 000000000..c3aea4202 --- /dev/null +++ b/.run/P36/agents/md_SC03_076__func_801F2348/history.txt @@ -0,0 +1,16 @@ +g6: verdict NO-MATCH start 6 best 6 compiles 289 path +s7: verdict NO-MATCH start 6 best 6 compiles 368 path +s9: verdict NO-MATCH start 6 best 6 compiles 171 path +best-scoring single candidates of the last trace (move -> score [residual class]): + R7 block @189 -> 6 [COUNT] (from 6) + R7 do-while @189 -> 6 [COUNT] (from 6) + R7 block @202 -> 6 [COUNT] (from 6) + R12 width t s32->u16 @185 -> 6 [COUNT] (from 6) + R7 do-while @202 -> 6 [COUNT] (from 6) + R12 width t s32->s16 @185 -> 6 [COUNT] (from 6) + R7 block @195 -> 6 [COUNT] (from 6) + R12 width t s32->u8 @185 -> 6 [COUNT] (from 6) + R7 do-while @195 -> 6 [COUNT] (from 6) + R7 block @191 -> 6 [COUNT] (from 6) + R7 do-while @191 -> 6 [COUNT] (from 6) + R7 block @205 -> 6 [COUNT] (from 6) diff --git a/.run/P36/agents/md_SC03_076__func_801F2348/mechanism.md b/.run/P36/agents/md_SC03_076__func_801F2348/mechanism.md new file mode 100644 index 000000000..2b2fbeeb3 --- /dev/null +++ b/.run/P36/agents/md_SC03_076__func_801F2348/mechanism.md @@ -0,0 +1,85 @@ +# func_801F2348 (md_SC03_076_jr_801F218C.c) — P36 T7 S104 agent d9 + +**Result: score 0, plain C, zero levers** (tree: 1 NEEDED `__asm__("")` barrier → 0). Also scores 0 on all five +copies of the text (see "Family" below) — 6 barriers → 0. + +## (a) The residual +COUNT, 32 vs 34 ins: the third arm (`if (func_80029178(250) & 0xFF) t = 0; else t = 1;`) compiled to a store-flag +`sltiu v0,v0,1` where the target keeps `bnez v0,join / move v0,zero (delay) / li v0,1`. Nothing about registers: an +if/else was converted into straight-line code before cse ran. + +## (b) The pass and the decision (read, and PROVED on the .rtl/.jump dumps of both spellings) +First jump pass, two cooperating transforms in `jump_optimize`: +1. `jump.c:699-795` "Simplify `if (...) x = a; else x = b;` → `x = b; if (...) x = a;`". INSN = the `goto join` after + `t = 0`; TEMP2 = `t = 1` (the next active insn, right before `join`); TEMP = the condjump around `t = 0`. All of + `:727-771` holds, the use scan finds the single use, `no_labels_between_p (p, insn)` (`jump.c:805`) holds, so `t = 1` + is hoisted above the condjump (new insn uid 100 in `free.i.jump`). +2. `jump.c:1015-1300` store-flag case 1 ("x = a; if (...) x = b; and either A or B is zero"): now the condjump is + followed by `t = 0` (`GET_CODE (temp) == INSN`, `jump.c:1019`) and falls into `join`, `reg_set_last` finds `t = 1` + (CONST_INT), so with BRANCH_COST 1 (`config/mips/mips.h:2935`, R3000) it still fires via the A/B-zero test and emits + `t = (r80 == 0)` (`xor`/`ltu` insns 102/104/106) — the `sltiu`. +The tree's `__asm__("")` before `t = 1` worked by making TEMP2 an ASM_INPUT insn (single_set fails, transform 1 dies, +so transform 2 never sees the `x = a; if … x = b` shape). + +## (c) The move that closed it +Rewrite the goto chain as the structured `||` the sibling `func_801F0904` (md_SC05_026, lever-free) uses: + + if ((u32)(x - 200) < 100) { + t = 0; + } else if (x < 300 || (func_80029178(250) & 0xFF) == 0) { + t = 1; + } else { + t = 0; + } + +`x < 300` now jumps INTO the `t = 1` arm, so a code_label sits between the `(f & 0xFF) != 0` condjump and `t = 1`. +In `a.i.jump` the order is `jump 37 → label 40 → t=1 (44) → goto join (46) → label 48 → t=0 (52) → join`: +- transform 1 at jump 46: TEMP (via `prev_active_insn`, which skips label 40) = jump 37, the use scan stops at it, + `p = PREV_INSN (jump 37)`, and `no_labels_between_p (p, insn)` (`jump.c:805`) FAILS on label 40 — no hoist; +- transform 2 at jump 37: `next_nonnote_insn` is label 40, `GET_CODE (temp) == INSN` (`jump.c:1019`) FAILS. +The branch survives; reorg then fills the delay slots exactly as the target (`move v0,zero` / `li v0,1`). +Proved: score 0 on `--try` (34/34 ins), dumps in `scratch/dumps_free/` vs `scratch/dumps_a/`. + +The tail (`p`/`v` loaded per arm) must stay as the tree has it: folding `p` into one `*(s32 *)(D_801EF3EC + 4) = v` +scores 13 (the per-arm `lw` of D_801EF3EC is in the bytes). + +## (d) Generator proposal +When a NEEDED `__asm__("")` barrier sits immediately before a constant store `t = K` that is the fall-through arm of +a `goto join` chain (or a `? : ({ __asm__(""); K; })` ternary), and an EARLIER arm of the chain stores the same `K`, +merge those two arms into one `else if (A || !B) t = K;` so the earlier test enters the K-arm through a label — +the label between the condjump and the store blocks jump.c's if/else hoist (`:805`) and its store-flag conversion +(`:1019`). + +## (e) What did not work (bytes) +- body_free.c and the whole free sweep (R7 blocks/do-while, R12 widths u16/s16/u8): 6 — none touches the jump shape. +- `t = (u32)(x-200) >= 100 && (x < 300 || !(f & 0xFF));` : 15 (TRUTH_ANDIF expansion `t = 0; …; t = 1` keeps t + live across the call → s0 and a frame slot). +- the nested ternary `t = c1 ? 0 : (c2 ? 1 : (!(f & 0xFF) ? 1 : 0));` : 4 (the innermost `?:` is its own if/else with + no incoming label, so the store-flag still fires). +- the `func_801F098C` goto spelling (`else if (x >= 300) { if (f & 0xFF) goto z; t = 1; } else t = 1; … z: t = 0;`) + also scores 0 — a second valid spelling; the `||` one is chosen as the more readable. + +## (f) Where the method fell short +Nothing structural: METHOD step 3's "READ LEVER-FREE BODIES that share your callees" was the whole crack — +`related.txt` did not list `func_801F0904` (another overlay, md_SC05_026), but the R71 grep for +`func_80029178(250|0xFA)` + `+ 4) =` across src/ found it at once. Suggest related.txt search the WHOLE tree for +bodies sharing the same (callee, constant-argument) pair, not only the same overlay. Also: the free sweep has no +generator that re-shapes a goto chain into `||`; all its moves were declaration-level and could not reach a jump.c +decision. + +## (g) Structs question +No. The lever steered a first-jump-pass control-flow decision (`jump.c:727-805`, `:1015-1019`), which looks only at +insn/label adjacency and SET shapes on a pseudo; the global `D_801EF3EC` (a pointer whose +4 field receives a +handler/table address) does not take part — the `t` flag is a scalar computed from call results. Typing +`D_801EF3EC` as `struct { s32 f0; void *f4; } *` would only change the final store `*(s32 *)(p + 4) = v`, which +already matches. Not tested on bytes because the plain-C close made it moot. + +## Family (all `--try` score 0, bodies in `scratch/c/`) +| function | TU | tree lever | candidate file | +|---|---|---|---| +| func_801F2348 | md_SC03_076_jr_801F218C.c | 1 barrier | `body.c` | +| func_801F23D0 | md_SC03_076_jr_801F218C.c | 1 barrier | `scratch/c/sib_23D0.c` (D_801F3830/D_801F3864) | +| func_801EAA7C | md_SC04_027_jr_801EA8C0.c | 1 barrier | `scratch/c/sib_EAA7C.c` (D_801EBD50/D_801EBD90/D_801E7AAC) | +| func_801E5514 | md_SC03_135_jr_801E5358.c | 1 barrier | `scratch/c/sib_E5514.c` (D_801E67E8/D_801E6828/D_801E256C) | +| func_801EAB04 | md_SC04_027_jr_801EA8C0.c | 1 barrier memory (ternary) | `scratch/c/sib_EAB04.c` | +| func_801E559C | md_SC03_135_jr_801E5358.c | 1 barrier (ternary) | `scratch/c/sib_E559C.c` | diff --git a/.run/P36/agents/md_SC03_076__func_801F2348/neighbours.txt b/.run/P36/agents/md_SC03_076__func_801F2348/neighbours.txt new file mode 100644 index 000000000..8b1378917 --- /dev/null +++ b/.run/P36/agents/md_SC03_076__func_801F2348/neighbours.txt @@ -0,0 +1 @@ + diff --git a/.run/P36/agents/md_SC03_076__func_801F2348/related.txt b/.run/P36/agents/md_SC03_076__func_801F2348/related.txt new file mode 100644 index 000000000..a8842cd06 --- /dev/null +++ b/.run/P36/agents/md_SC03_076__func_801F2348/related.txt @@ -0,0 +1,139 @@ +=== lever-free bodies in md_SC03_076 sharing a callee or global with func_801F2348 (5 found; top 6 by shared symbols) — read them for the SHAPE === +--- func_801F24DC (src/md_SC03_076/md_SC03_076_jr_801F218C.c:288) shares 2: func_80029178 func_80029504 --- +void func_801F24DC(s32 a0) { + extern s32 func_80029504(void); + extern s32 func_80029178(s32 arg); + extern s32 func_801877C0(void); + extern s32 func_80187890(void); + extern s32 func_80187904(void); + extern void func_80187960(void); + extern s32 D_801F35EC[]; + extern s32 D_801F3600[]; + extern s32 D_801F361C[]; + extern s32 D_801F3D68; + extern s32 D_801F3DB4; + + s32 v1 = func_80029504(); + if (v1 < 0x258) { + s32 flag; + v1 = func_80029504(); + if ((u32)(v1 - 0xC8) >= 0x64U) { + if (v1 < 0x12C || (func_80029178(0xFA) & 0xFF) == 0) { + flag = 1; + } else { + flag = 0; + } + } else { + flag = 0; + } + if (flag) { + *(s32 *)(a0 + 0xE4) = D_801F35EC[func_801877C0()]; + } else { + if (func_80029504() < 0x12CU) { + *(s32 *)(a0 + 0xE4) = (s32)&D_801F3D68; + } else { + *(s32 *)(a0 + 0xE4) = (s32)&D_801F3DB4; + } + } + } else if (v1 < 0x384) { + *(s32 *)(a0 + 0xE4) = D_801F3600[func_80187890()]; + } else { + *(s32 *)(a0 + 0xE4) = D_801F361C[func_80187904()]; + func_80187960(); + } +} + +--- func_801F2930 (src/md_SC03_076/md_SC03_076_jr_801F218C.c:505) shares 1: func_80029504 --- +void func_801F2930(void) { + func_80029124(0xFD, 0x1); + if (((s32 (*)(void))func_80029504)() == 0x136) { + ((void (*)(s32))func_80029514)(0x140); + } +} + +--- func_801F2970 (src/md_SC03_076/md_SC03_076_jr_801F218C.c:517) shares 1: func_80029504 --- +void func_801F2970(void) { + func_80029124(0xFE, 0x1); + if (((s32 (*)(void))func_80029504)() == 0x136) { + ((void (*)(s32))func_80029514)(0x140); + } +} + +--- func_801EF750 (src/md_SC03_076/md_SC03_076.c:20) shares 1: func_80029504 --- +void func_801EF750(void) { + + extern s16 D_801F96C0; + extern u16 D_801F96B8; + extern s32 func_80029504(void); + extern void func_801EF800(s32, s16); + s32 v; + u16 *p; + + v = func_80029504(); + + if ((u32)(v - 5) >= 0x4B5) { + if (v != 0x6A4) { + D_801F96C0 = 1; + } else { + D_801F96C0 = 2; + } + } else { + D_801F96C0 = 0; + } + + func_801EF800(1, D_801F96C0); + p = &D_801F96B8; + (*p)++; +} + +--- func_801F2690 (src/md_SC03_076/md_SC03_076_jr_801F218C.c:374) shares 1: func_80029504 --- +s32 *func_801F2690(void) { + extern u8 D_80078EB1; + extern u8 D_80078E78[]; + extern u32 D_801F3BDC; + extern u32 D_801F3D00; + extern s32 D_801F9DD4; + extern s32 D_801F9F54; + s32 v; + u8 *p; + + p = D_80078E78; + func_801F28B0(); + v = func_80029504(); + + if (v >= 0xC8) { + if (v < 0x258) { + if (func_801F2850(D_80078EB1, 0xD, 0x18)) { + if ((u32)(v - 0x136) < 0x46) { + func_801F2868(0xA, (s32)&D_801F3BDC, (s32)func_801F2930); + func_80029124(0x112, 1); + } else { + func_801F2868(0xA, 0, 0); + } + } else { + func_801F2868(0xA, 0, 0); + } + if (func_801F2850(p[0x39], 0xD, 0x18)) { + if ((u32)(v - 0x136) < 0x46) { + func_801F2868(0xB, (s32)&D_801F3D00, (s32)func_801F2970); + } else { + func_801F2868(0xB, 0, 0); + } + } else { + func_801F2868(0xB, 0, 0); + } + } else { + func_801F2868(0xA, 0, 0); + func_801F2868(0xB, 0, 0); + } + } else { + func_801F2868(0xA, 0, 0); + func_801F2868(0xB, 0, 0); + } + func_801F28E0(); + if (D_801F9F54 == 0) { + return 0; + } + return &D_801F9DD4; +} + diff --git a/.run/P36/agents/md_SC03_076__func_801F2348/residual.txt b/.run/P36/agents/md_SC03_076__func_801F2348/residual.txt new file mode 100644 index 000000000..717abf870 --- /dev/null +++ b/.run/P36/agents/md_SC03_076__func_801F2348/residual.txt @@ -0,0 +1,11 @@ +src/md_SC03_076/md_SC03_076_jr_801F218C.c:func_801F2348: score 6 (COUNT; mine 32 ins, target 34) — not yet + replace mine[7:8] target[7:8] + 7 bnez v0,1fc | bnez v0,204 + replace mine[10:11] target[10:11] + 10 bnez v0,1fc | bnez v0,204 + replace mine[15:16] target[15:18] + 15 sltiu v0,v0,1 | bnez v0,204 + 16 -- | move v0,zero + 17 -- | li v0,1 + replace mine[22:23] target[24:25] + 22 j 22c | j 234 diff --git a/.run/P36/agents/md_SC03_076__func_801F2348/sites.txt b/.run/P36/agents/md_SC03_076__func_801F2348/sites.txt new file mode 100644 index 000000000..1ab724f13 --- /dev/null +++ b/.run/P36/agents/md_SC03_076__func_801F2348/sites.txt @@ -0,0 +1,3 @@ +REMOVED barrier line 194 +REMOVED barrier line 199 +NEEDED barrier line 204 diff --git a/.run/P36/agents/md_SC03_076__func_801F2348/tu.txt b/.run/P36/agents/md_SC03_076__func_801F2348/tu.txt new file mode 100644 index 000000000..3b79bc323 --- /dev/null +++ b/.run/P36/agents/md_SC03_076__func_801F2348/tu.txt @@ -0,0 +1,2 @@ +src/md_SC03_076/md_SC03_076_jr_801F218C.c +func_801F2348 diff --git a/.run/P36/agents/ov_SC03_091__func_80186440/body.c b/.run/P36/agents/ov_SC03_091__func_80186440/body.c new file mode 100644 index 000000000..52d114e9f --- /dev/null +++ b/.run/P36/agents/ov_SC03_091__func_80186440/body.c @@ -0,0 +1,121 @@ +void func_80186440(s32 param_1) { + + s32 unused[2]; /* dead 8-byte local — frame padding (cookbook idiom 6) */ + s32 obj; + s16 raw; + s32 r; + s32 sgn; + s32 v; + s32 q; + s32 w; + + obj = ((s32 (*)(void))func_8012C1B8)(); + if (obj == 0) { + func_8012CAE4((void *)param_1); + return; + } + *(s32 *)(param_1 + 0x20) = obj; + func_8001C214(obj, 0); + + raw = rand(); + r = raw; + *(u16 *)(obj + 0x2C) = *(u16 *)(obj + 0x2C) | 0x10; + v = r % 384 + 0x400; + *(s16 *)(obj + 0x1C) = v; + *(s16 *)(obj + 0x1A) = v; + *(s16 *)(obj + 0x18) = v; + sgn = -1; + if (raw & 1) { + sgn = 1; + } + *(s16 *)(obj + 0x10) = sgn * (r % 128) - 0x300; + *(s16 *)(obj + 0x12) = r % 4096; + *(u16 *)(obj + 0x14) = 0; + + *(u16 *)(param_1 + 0xA) = *(u16 *)(param_1 + 0xA) - 0x19; + func_8012B2CC(param_1); + func_8012B23C((void *)param_1); + func_8012B178(param_1, -0xC0000 - ((r % 8) << 16)); + + *(s32 *)(param_1 + 0x1C) = 0x5A; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q - 0x10; + } else { + w = q - 0x10; + } + *(s16 *)(param_1 + 0xDC) = w; + *(s16 *)(param_1 + 0xDE) = 0; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q - 0x10; + } else { + w = q - 0x10; + } + *(s16 *)(param_1 + 0xE0) = w; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q + 0x10; + } else { + w = q + 0x10; + } + *(s16 *)(param_1 + 0xE4) = w; + *(s16 *)(param_1 + 0xE6) = 0; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q - 0x10; + } else { + w = q - 0x10; + } + *(s16 *)(param_1 + 0xE8) = w; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q - 0x10; + } else { + w = q - 0x10; + } + *(s16 *)(param_1 + 0xEC) = w; + *(s16 *)(param_1 + 0xEE) = 0; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q + 0x10; + } else { + w = q + 0x10; + } + *(s16 *)(param_1 + 0xF0) = w; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q + 0x10; + } else { + w = q + 0x10; + } + *(s16 *)(param_1 + 0xF4) = w; + *(s16 *)(param_1 + 0xF6) = 0; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q + 0x10; + } else { + w = q + 0x10; + } + *(s16 *)(param_1 + 0xF8) = w; + + *(u8 *)(param_1 + 0xFC) = 0x80; + *(u8 *)(param_1 + 0xFD) = 0x80; + *(u8 *)(param_1 + 0xFE) = 0x80; + *(u32 *)(param_1 + 0x100) = *(u32 *)(param_1 + 0x100) | 0x50000000; + /* A u16 `++` (not `+= 1`): expand_increment adds in HImode through a + * widened SImode add (expr.c:8662), combine rewrites the HImode copy as a + * SUBREG destination (combine.c:4376-4402), and sched1's birthing_insn_p + * (sched.c:2477-2478) no longer boosts the addiu next to the store, so the + * lhu is scheduled ahead of the 0xFC-0xFE byte stores and takes $a0 + * (P36 S104 d8; formerly a `register __asm__("$4")` pin on a s32 local). */ + (*(u16 *)(param_1 + 2))++; +} diff --git a/.run/P36/agents/ov_SC03_091__func_80186440/body_free.c b/.run/P36/agents/ov_SC03_091__func_80186440/body_free.c new file mode 100644 index 000000000..d44a243d2 --- /dev/null +++ b/.run/P36/agents/ov_SC03_091__func_80186440/body_free.c @@ -0,0 +1,125 @@ +void func_80186440(s32 param_1) { + + s32 unused[2]; /* dead 8-byte local — frame padding (cookbook idiom 6) */ + s32 obj; + s16 raw; + s32 r; + s32 sgn; + s32 v; + s32 q; + s32 w; + /* The `register ... __asm__("$4")` pin on the tail's +2-field counter is + * load-bearing (matching-cookbook idiom 9 / L-lever family): unpinned, gcc + * puts the 0x50000000 OR-mask constant in $a0 and the field value in $v1 + * (register-swapped vs. the target) and schedules the field's `lhu` right + * before the `or` instead of hoisting it ahead of the 0xFC/FD/FE `sb` + * stores. Pinning $4/$a0 to this value AND folding the `+1` into the same + * statement as the load (`cnt = *(u16*)(param_1+2) + 1;`, store separate) + * reproduces both the register choice and the exact schedule position. */ + s32 cnt; + + obj = ((s32 (*)(void))func_8012C1B8)(); + if (obj == 0) { + func_8012CAE4((void *)param_1); + return; + } + *(s32 *)(param_1 + 0x20) = obj; + func_8001C214(obj, 0); + + raw = rand(); + r = raw; + *(u16 *)(obj + 0x2C) = *(u16 *)(obj + 0x2C) | 0x10; + v = r % 384 + 0x400; + *(s16 *)(obj + 0x1C) = v; + *(s16 *)(obj + 0x1A) = v; + *(s16 *)(obj + 0x18) = v; + sgn = -1; + if (raw & 1) { + sgn = 1; + } + *(s16 *)(obj + 0x10) = sgn * (r % 128) - 0x300; + *(s16 *)(obj + 0x12) = r % 4096; + *(u16 *)(obj + 0x14) = 0; + + *(u16 *)(param_1 + 0xA) = *(u16 *)(param_1 + 0xA) - 0x19; + func_8012B2CC(param_1); + func_8012B23C((void *)param_1); + func_8012B178(param_1, -0xC0000 - ((r % 8) << 16)); + + *(s32 *)(param_1 + 0x1C) = 0x5A; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q - 0x10; + } else { + w = q - 0x10; + } + *(s16 *)(param_1 + 0xDC) = w; + *(s16 *)(param_1 + 0xDE) = 0; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q - 0x10; + } else { + w = q - 0x10; + } + *(s16 *)(param_1 + 0xE0) = w; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q + 0x10; + } else { + w = q + 0x10; + } + *(s16 *)(param_1 + 0xE4) = w; + *(s16 *)(param_1 + 0xE6) = 0; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q - 0x10; + } else { + w = q - 0x10; + } + *(s16 *)(param_1 + 0xE8) = w; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q - 0x10; + } else { + w = q - 0x10; + } + *(s16 *)(param_1 + 0xEC) = w; + *(s16 *)(param_1 + 0xEE) = 0; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q + 0x10; + } else { + w = q + 0x10; + } + *(s16 *)(param_1 + 0xF0) = w; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q + 0x10; + } else { + w = q + 0x10; + } + *(s16 *)(param_1 + 0xF4) = w; + *(s16 *)(param_1 + 0xF6) = 0; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q + 0x10; + } else { + w = q + 0x10; + } + *(s16 *)(param_1 + 0xF8) = w; + + cnt = *(u16 *)(param_1 + 2) + 1; + *(u8 *)(param_1 + 0xFC) = 0x80; + *(u8 *)(param_1 + 0xFD) = 0x80; + *(u8 *)(param_1 + 0xFE) = 0x80; + *(u32 *)(param_1 + 0x100) = *(u32 *)(param_1 + 0x100) | 0x50000000; + *(u16 *)(param_1 + 2) = cnt; +} diff --git a/.run/P36/agents/ov_SC03_091__func_80186440/body_tree.c b/.run/P36/agents/ov_SC03_091__func_80186440/body_tree.c new file mode 100644 index 000000000..9f4570e73 --- /dev/null +++ b/.run/P36/agents/ov_SC03_091__func_80186440/body_tree.c @@ -0,0 +1,125 @@ +void func_80186440(s32 param_1) { + + s32 unused[2]; /* dead 8-byte local — frame padding (cookbook idiom 6) */ + s32 obj; + s16 raw; + s32 r; + s32 sgn; + s32 v; + s32 q; + s32 w; + /* The `register ... __asm__("$4")` pin on the tail's +2-field counter is + * load-bearing (matching-cookbook idiom 9 / L-lever family): unpinned, gcc + * puts the 0x50000000 OR-mask constant in $a0 and the field value in $v1 + * (register-swapped vs. the target) and schedules the field's `lhu` right + * before the `or` instead of hoisting it ahead of the 0xFC/FD/FE `sb` + * stores. Pinning $4/$a0 to this value AND folding the `+1` into the same + * statement as the load (`cnt = *(u16*)(param_1+2) + 1;`, store separate) + * reproduces both the register choice and the exact schedule position. */ + register s32 cnt __asm__("$4"); // !FAKE: pin $4 — NEEDED DIFFERS (P36 rung B tus9) + + obj = ((s32 (*)(void))func_8012C1B8)(); + if (obj == 0) { + func_8012CAE4((void *)param_1); + return; + } + *(s32 *)(param_1 + 0x20) = obj; + func_8001C214(obj, 0); + + raw = rand(); + r = raw; + *(u16 *)(obj + 0x2C) = *(u16 *)(obj + 0x2C) | 0x10; + v = r % 384 + 0x400; + *(s16 *)(obj + 0x1C) = v; + *(s16 *)(obj + 0x1A) = v; + *(s16 *)(obj + 0x18) = v; + sgn = -1; + if (raw & 1) { + sgn = 1; + } + *(s16 *)(obj + 0x10) = sgn * (r % 128) - 0x300; + *(s16 *)(obj + 0x12) = r % 4096; + *(u16 *)(obj + 0x14) = 0; + + *(u16 *)(param_1 + 0xA) = *(u16 *)(param_1 + 0xA) - 0x19; + func_8012B2CC(param_1); + func_8012B23C((void *)param_1); + func_8012B178(param_1, -0xC0000 - ((r % 8) << 16)); + + *(s32 *)(param_1 + 0x1C) = 0x5A; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q - 0x10; + } else { + w = q - 0x10; + } + *(s16 *)(param_1 + 0xDC) = w; + *(s16 *)(param_1 + 0xDE) = 0; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q - 0x10; + } else { + w = q - 0x10; + } + *(s16 *)(param_1 + 0xE0) = w; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q + 0x10; + } else { + w = q + 0x10; + } + *(s16 *)(param_1 + 0xE4) = w; + *(s16 *)(param_1 + 0xE6) = 0; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q - 0x10; + } else { + w = q - 0x10; + } + *(s16 *)(param_1 + 0xE8) = w; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q - 0x10; + } else { + w = q - 0x10; + } + *(s16 *)(param_1 + 0xEC) = w; + *(s16 *)(param_1 + 0xEE) = 0; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q + 0x10; + } else { + w = q + 0x10; + } + *(s16 *)(param_1 + 0xF0) = w; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q + 0x10; + } else { + w = q + 0x10; + } + *(s16 *)(param_1 + 0xF4) = w; + *(s16 *)(param_1 + 0xF6) = 0; + + q = rand() % 8; + if ((rand() & 1) == 0) { + w = -q + 0x10; + } else { + w = q + 0x10; + } + *(s16 *)(param_1 + 0xF8) = w; + + cnt = *(u16 *)(param_1 + 2) + 1; + *(u8 *)(param_1 + 0xFC) = 0x80; + *(u8 *)(param_1 + 0xFD) = 0x80; + *(u8 *)(param_1 + 0xFE) = 0x80; + *(u32 *)(param_1 + 0x100) = *(u32 *)(param_1 + 0x100) | 0x50000000; + *(u16 *)(param_1 + 2) = cnt; +} diff --git a/.run/P36/agents/ov_SC03_091__func_80186440/history.txt b/.run/P36/agents/ov_SC03_091__func_80186440/history.txt new file mode 100644 index 000000000..345cc69f4 --- /dev/null +++ b/.run/P36/agents/ov_SC03_091__func_80186440/history.txt @@ -0,0 +1,15 @@ +g6: verdict NO-MATCH start 6 best 6 compiles 324 path +s7: verdict NO-MATCH start 6 best 6 compiles 555 path +best-scoring single candidates of the last trace (move -> score [residual class]): + R12 width w s32->u16 @4868 -> 6 [COUNT] (from 6) + R6 inline cnt @4977 -> 6 [COUNT] (from 6) + R8 temp tmp0 @4977 -> 6 [COUNT] (from 6) + R18 bystander @4885->4887 -> 6 [COUNT] (from 6) + R7 block @4977 -> 6 [COUNT] (from 6) + R9 swap-stmts @4977 -> 6 [COUNT] (from 6) + R12 width w s32->s16 @4868 -> 6 [COUNT] (from 6) + R8 base tmp0 @4977 -> 6 [COUNT] (from 6) + R8 base-shared tmp0 @4977 -> 6 [COUNT] (from 6) + R7 block @4979 -> 6 [COUNT] (from 6) + R8 temp tmp0 @4981 -> 6 [COUNT] (from 6) + R9 swap-stmts @4980 -> 6 [COUNT] (from 6) diff --git a/.run/P36/agents/ov_SC03_091__func_80186440/mechanism.md b/.run/P36/agents/ov_SC03_091__func_80186440/mechanism.md new file mode 100644 index 000000000..0d4108b24 --- /dev/null +++ b/.run/P36/agents/ov_SC03_091__func_80186440/mechanism.md @@ -0,0 +1,72 @@ +# func_80186440 (ov_SC03_091_jr_8018326C.c) — P36 S104 agent d8 + +**Result: score 0 in plain C, zero levers** (was 1 NEEDED lever: `register s32 cnt __asm__("$4")`). Levers 1 → 0. +Best body: `PACK/body.c` — the `cnt` local is deleted and the tail's `cnt = *(u16 *)(param_1 + 2) + 1; ... *(u16 *)(param_1 + 2) = cnt;` +becomes a single `(*(u16 *)(param_1 + 2))++;` after the `|= 0x50000000` store. Verified by `--try`: score 0, 231/231 ins, MATCH. + +Equivalent closes, also byte-proven (score 0): keep the local but declare it `u16 cnt;` (or `s16 cnt;`) with the original +statement order; `++*(u16 *)(param_1 + 2);`; a body-local struct with `((struct T *)param_1)->f2++;`. + +## (a) The residual +Same 231 instructions; in the final block the `lhu a0,2(s2)` of the +2 counter must sit ahead of the three `sb` 0x80 stores +(right after `li v0,128`) with the counter in `$a0` and the `0x50000000` in `$v1`; the lever-free s32 body put the `lhu` down +against its `addiu`/`sh` and swapped `$a0`/`$v1`. Counted first: no instruction missing — an ORDER residual that drags a +local-alloc register swap with it. + +## (b) The pass and the decision (read in the dumps, proven on bytes) +sched1 (before local-alloc). The lever-free trace (`scratch/dumps_free/fn.sched`, block ending at insn 579): +`T-2: ... 553 (7f000001)` — the `addiu` (insn 553, `(set (reg:SI 80) (plus (reg:SI 179) 1))`) was raised to +LAUNCH_PRIORITY the moment the `sh` was scheduled, because `adjust_priority` (sched.c:2537-2545) finds +`birthing_insn_p` true: SET_DEST is a REG (sched.c:2477-2478), live below, and `reg_n_sets == 1` (sched.c:2490). It is then +scheduled right above the store, and its `lhu` (insn 551) in turn (also birthing), so both land after `lw 256` — the +sched1 order `sb sb sb lui lw lhu or sw addiu sh`. Local-alloc then numbers the qtys in that order and the constant takes +`$a0`, the counter `$v1`; sched2 keeps it. + +With the u16 spelling the RTL is `(set (reg:HI 178) (mem:HI +2))`, `(set (reg:SI 179) (plus (subreg:SI (reg:HI 178)) 1))`, +`(set (reg:HI 80) (subreg:HI (reg:SI 179)))` — the HImode add has no insn on MIPS and is widened (expand_increment → +expand_binop OPTAB_LIB_WIDEN, expr.c:8662; the same widening for a u16 local's `= x + 1`). combine's simplify_set +(combine.c:4376-4402) rewrites the merged insn as `(set (subreg:SI (reg:HI 80) 0) (plus:SI ...))` — a SUBREG destination, +so `birthing_insn_p` returns 0 at sched.c:2478, the `addiu` keeps priority 2 (`T-2: ... 554 (2)`), the `sw` is taken first, +and the `lhu` floats to the top of the block (`scratch/dumps_u16/fn.sched`, trace identical to the pinned tree's +`scratch/dumps_tree/fn.sched`). Local-alloc then gives lhu/addiu `$a0` and the constant `$v1` exactly as the pin did. +In the `++` body the increment is even textually AFTER the byte stores and sched1 still hoists the `lhu` above them +(`scratch/dumps_pA/fn.sched`) — there is no alias barrier (same base `s2`, disjoint offsets); the placement is pure priority. + +The `+= 1` and `x = x + 1` spellings (both scored 6) are folded by the C front end to `(u16)((int)x + 1)`: the add's +destination is an SImode REG again → birthing → the s32 residual. + +## (c) The move that closed it +`s32 cnt` → `u16 cnt` (width of the counter local = width of the field it copies), or equivalently drop the local and write +the field update as a u16 `++`. One statement / one declaration; no reordering needed. + +## (d) Generator proposal +When the residual is an ORDER/COUNT diff where a 16-bit field's `lhu`→`addiu`→`sh` chain is scheduled against its store in +mine but its `lhu` sits early in the target, re-declare the local that carries `field ± k` to the field's 16-bit width +(R12 must enumerate EVERY local stored to a 16-bit lvalue, not just the loop temps — here it only ever tried `w`), and +also try rewriting `x = F + 1; …; F = x;` / `F += 1` as `F++` at the store's position: both make the add's SET_DEST a +SUBREG, which switches off sched1's birthing boost (sched.c:2477-2545). + +## (e) What did not work (byte evidence) +- `*(u16 *)(param_1 + 2) += 1;` at the end, `= *(u16 *)(param_1 + 2) + 1` at the end, and the s32 local loaded first then + `cnt + 1` stored: all 6, identical residual (SImode REG destination → birthing). +- Reusing `w` for the counter (74) or `q` (38): the multi-set pseudo defeats birthing but becomes a global allocno that + perturbs the `rand() % 8` blocks' registers. +- The history's single moves (R6 inline cnt, R8 temp, R9 swap, R7 block, R12 width on `w`, R18) all stayed at 6 — none + touched the width of `cnt` itself. + +## (f) Where the method fell short +Nothing structural: residual → count (none missing) → sched1 trace in `.sched` → `rank_for_schedule`/`adjust_priority` → +the one bit (REG vs SUBREG destination) that differs between the pinned and free bodies. The `LAUNCH_PRIORITY` +(0x7f000001) marker on a just-readied insn in the `.sched` trace is the tell; worth a row in `residual_moves.md` +("7f000001 on an arithmetic insn that feeds a store = birthing boost; make its dest a SUBREG via a 16-bit local/`++`"). +The tree's own comment attributed the effect to register choice and a pin; the real lever was the local's mode. +The generator gap is R12's candidate set (see (d)). + +## (g) Structs question +Neutral here. Tested on bytes with a body-local `struct T { u8 pad0[2]; u16 f2; u8 pad4[0xF8]; u8 c[3]; u8 pad; u32 flags; }`: +struct field accesses with the s32 local (`cnt = s->f2 + 1; … s->f2 = cnt;`) = 6 (unchanged); `s->f2++` = 0 and the u16 local +with struct accesses = 0 — i.e. the struct changes nothing, only the mode of the incremented value does. The known +struct channel (MEM_IN_STRUCT_P aggregate accesses vs scalar stores, expr.c:4568-4577 / sched.c true_dependence) is not +involved: sched1 already moves the `lhu` freely over the `sb`s (same base register, disjoint offsets). A struct type for +`param_1` (u16 +2 state counter, s16 +0xA, s32 +0x1C/+0x20, s16 array +0xDC..+0xF8, u8 rgb +0xFC..+0xFE, u32 flags +0x100) +would help readability and would make `p->state++` the natural spelling, but it is not what closes the bytes. diff --git a/.run/P36/agents/ov_SC03_091__func_80186440/neighbours.txt b/.run/P36/agents/ov_SC03_091__func_80186440/neighbours.txt new file mode 100644 index 000000000..8b1378917 --- /dev/null +++ b/.run/P36/agents/ov_SC03_091__func_80186440/neighbours.txt @@ -0,0 +1 @@ + diff --git a/.run/P36/agents/ov_SC03_091__func_80186440/related.txt b/.run/P36/agents/ov_SC03_091__func_80186440/related.txt new file mode 100644 index 000000000..1cea48d25 --- /dev/null +++ b/.run/P36/agents/ov_SC03_091__func_80186440/related.txt @@ -0,0 +1,138 @@ +=== lever-free bodies in ov_SC03_091 sharing a callee or global with func_80186440 (54 found; top 6 by shared symbols) — read them for the SHAPE === +--- func_8018B17C (src/ov_SC03_091/ov_SC03_091_jr_8018911C.c:4462) shares 4: func_8012B23C func_8012B2CC func_8012C1B8 func_8012CAE4 --- +void func_8018B17C(s32 param_1) +{ + + extern u8 D_801AEE20[]; + extern u8 D_801AEE38[]; + extern u8 D_801AEE50[]; + s32 v0; + + v0 = ((s32 (*)(void))func_8012C1B8)(); + *(s32 *)(param_1 + 0x20) = v0; + if (v0 == 0) { + ((void (*)(s32))func_8012CAE4)(param_1); + } else { + func_8001CA1C(v0, (s32)D_801AEE20); + func_8012A828(param_1, (s32)D_801AEE38); + *(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12) = + *(u16 *)(*(s32 *)(*(s32 *)(param_1 + 0x64) + 0x20) + 0x12); + func_8012B23C((void *)param_1); + func_8012B2CC(param_1); + func_8012B14C(param_1, (s32)D_801AEE50); + *(s16 *)(param_1 + 2) = 1; + *(s16 *)(param_1 + 0xA) = *(u16 *)(param_1 + 0xA) - 0x90; + *(s16 *)(param_1 + 6) = + *(u16 *)(param_1 + 6) - + (func_8004787C(*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12)) >> 8); + *(s16 *)(param_1 + 0xE) = + *(u16 *)(param_1 + 0xE) - + (func_80047948(*(s16 *)(*(s32 *)(param_1 + 0x20) + 0x12)) >> 8); + } +} + +--- func_8018B2EC (src/ov_SC03_091/ov_SC03_091_jr_8018911C.c:4537) shares 4: func_8012B23C func_8012B2CC func_8012C1B8 func_8012CAE4 --- +void func_8018B2EC(s32 a0) +{ + + extern s32 D_801AEE68; + extern s32 D_801AEF28; + extern s32 D_801AEFB0; + s32 v0; + + v0 = ((s32 (*)(void))func_8012C1B8)(); + *(s32 *)(a0 + 0x20) = v0; + + if (v0 == 0) { + func_8012CAE4((void *)a0); + } else { + func_8001CA1C(v0, (s32)&D_801AEE68); + func_8012A828(a0, (s32)&D_801AEF28); + v0 = rand(); + *(u32 *)(a0 + 0x94) = v0 & 0xF; + + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x12) = + *(u16 *)(*(s32 *)(*(s32 *)(a0 + 0x64) + 0x20) + 0x12); + + func_8012B23C((void *)a0); + func_8012B2CC(a0); + func_8012B14C(a0, (s32)&D_801AEFB0); + + *(u16 *)(a0 + 0x2) = 1; + + *(u16 *)(*(s32 *)(a0 + 0x20) + 0x2C) |= 0x10; + + *(s16 *)(a0 + 0xA) -= 0x90; + + v0 = func_8004787C(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12)); + *(s16 *)(a0 + 0x6) -= (s16)(v0 >> 8); + + v0 = func_80047948(*(s16 *)(*(s32 *)(a0 + 0x20) + 0x12)); + *(s16 *)(a0 + 0xE) -= (s16)(v0 >> 8); + } +} + +--- func_80144A98 (src/shared/ov/func_80144A98.h:6) shares 3: func_8001C214 func_8012C1B8 func_8012CAE4 --- +void func_80144A98(u8 *a0) { + s32 v0; + v0 = ((s32 (*)(void))func_8012C1B8)(); + *(s32 *)(a0 + 0x20) = v0; + if (v0 == 0) { + func_8012CAE4(a0); + } else { + func_8001C214(v0, 0); + *(s16 *)(a0 + 0x2) = 1; + } +} + +--- func_801320D8 (src/ov_SC03_091/ov_SC03_091_jr_8012ACE0.c:1915) shares 3: func_8001C214 func_8012C1B8 func_8012CAE4 --- +void func_801320D8(int param_1) +{ + int v0; + + v0 = ((int (*)(void))func_8012C1B8)(); + *(int *)(param_1 + 0x20) = v0; + if (v0 == 0) { + ((void (*)(int))func_8012CAE4)(param_1); + } else { + func_8001C214(v0, 0); + *(int *)(param_1 + 0x58) = (int)&D_8018CE60; + *(short *)(param_1 + 0x5c) = 0x80; + *(unsigned short *)(param_1 + 2) += 1; + } +} + +--- func_801321B0 (src/ov_SC03_091/ov_SC03_091_jr_8012ACE0.c:1962) shares 3: func_8001C214 func_8012C1B8 func_8012CAE4 --- +void func_801321B0(int param_1) +{ + int v0; + + v0 = ((int (*)(void))func_8012C1B8)(); + *(int *)(param_1 + 0x20) = v0; + if (v0 == 0) { + ((void (*)(int))func_8012CAE4)(param_1); + } else { + func_8001C214(v0, 0); + *(int *)(param_1 + 0x58) = (int)&D_8018CE80; + *(short *)(param_1 + 0x5c) = 0x80; + *(unsigned short *)(param_1 + 2) += 1; + } +} + +--- func_8013221C (src/ov_SC03_091/ov_SC03_091_jr_8012ACE0.c:1988) shares 3: func_8001C214 func_8012C1B8 func_8012CAE4 --- +void func_8013221C(int param_1) +{ + int v0; + + v0 = ((int (*)(void))func_8012C1B8)(); + *(int *)(param_1 + 0x20) = v0; + if (v0 == 0) { + ((void (*)(int))func_8012CAE4)(param_1); + } else { + func_8001C214(v0, 0); + *(int *)(param_1 + 0x58) = (int)&D_8018CE90; + *(short *)(param_1 + 0x5c) = 0x80; + *(unsigned short *)(param_1 + 2) += 1; + } +} + diff --git a/.run/P36/agents/ov_SC03_091__func_80186440/residual.txt b/.run/P36/agents/ov_SC03_091__func_80186440/residual.txt new file mode 100644 index 000000000..5e5995c9e --- /dev/null +++ b/.run/P36/agents/ov_SC03_091__func_80186440/residual.txt @@ -0,0 +1,11 @@ +src/ov_SC03_091/ov_SC03_091_jr_8018326C.c:func_80186440: score 6 (COUNT; mine 231 ins, target 231) — not yet + register pairs (mine -> target, count): v1->a0 x1 + replace mine[214:215] target[214:216] + 214 lui a0,0x5000 | lhu a0,2(s2) + 215 -- | lui v1,0x5000 + replace mine[219:222] target[220:222] + 219 lhu v1,2(s2) | addiu a0,a0,1 + 220 or v0,v0,a0 | or v0,v0,v1 + 221 addiu v1,v1,1 | -- + replace mine[223:224] target[223:224] + 223 sh v1,2(s2) | sh a0,2(s2) diff --git a/.run/P36/agents/ov_SC03_091__func_80186440/sites.txt b/.run/P36/agents/ov_SC03_091__func_80186440/sites.txt new file mode 100644 index 000000000..cf659eac2 --- /dev/null +++ b/.run/P36/agents/ov_SC03_091__func_80186440/sites.txt @@ -0,0 +1 @@ +NEEDED pin $4 line 4985 diff --git a/.run/P36/agents/ov_SC03_091__func_80186440/tu.txt b/.run/P36/agents/ov_SC03_091__func_80186440/tu.txt new file mode 100644 index 000000000..ad522450f --- /dev/null +++ b/.run/P36/agents/ov_SC03_091__func_80186440/tu.txt @@ -0,0 +1,2 @@ +src/ov_SC03_091/ov_SC03_091_jr_8018326C.c +func_80186440 diff --git a/.run/P36/agents/ov_SC07_010__func_8017B614/body.c b/.run/P36/agents/ov_SC07_010__func_8017B614/body.c new file mode 100644 index 000000000..98e172c44 --- /dev/null +++ b/.run/P36/agents/ov_SC07_010__func_8017B614/body.c @@ -0,0 +1,51 @@ +s32 func_8017B614(s32 param_1, s32 param_2) +{ + extern s32 D_80126990; + extern s32 D_80126994; + extern s16 D_801A7C54; + extern s16 D_801A94D0; + extern void func_8012F214(s32 a0, s32 a1, s32 a2); + extern void func_80129CF8(void); + extern s32 func_8017BE60(void *a0); + extern u8 D_80185900[]; + extern s16 D_801A7CCC; + extern s16 D_801A7CCE; + extern s16 D_801A7CD0; + extern s16 D_801A7CC4; + extern s16 D_801A7CC6; + extern s16 D_801A7CC8; + extern u8 D_8012694C[]; + extern s32 D_80126998; + extern s32 D_80126984; + extern s32 D_80126988; + extern s32 D_8012698C; + + u8 buf[16]; + u8 *src; + + if (((u32)param_2) >= 0xB) { + src = (u8 *)((u32)param_2); + *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src; + *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8); + } else { + s32 a2addr; + + src = &D_80185900[((u32)param_2) * 0x10]; + a2addr = (s32)&D_80185900[((u32)param_2) * 0x10 + 8]; + func_8012F214(param_1, (s32)src, (s32)&buf[0]); + func_8012F214(param_1, a2addr, (s32)&buf[8]); + } + *(Blk8_8017B614 *)&D_801A7CCC = *(Blk8_8017B614 *)&buf[0]; + *(Blk8_8017B614 *)&D_801A7CC4 = *(Blk8_8017B614 *)&buf[8]; + func_8012A018((s32)func_8017BE60, 0); + D_8012694C[0] = 0; + D_801A94D0 = 1; + D_801A7C54 = 0x1E; + D_80126990 = ((SV4_8017B368 *)&D_801A7CCC)->a; + D_80126994 = D_801A7CCE; + D_80126998 = D_801A7CD0; + D_80126984 = ((SV4_8017B368 *)&D_801A7CC4)->a; + D_80126988 = D_801A7CC6; + D_8012698C = D_801A7CC8; + func_80129CF8(); +} diff --git a/.run/P36/agents/ov_SC07_010__func_8017B614/mechanism.md b/.run/P36/agents/ov_SC07_010__func_8017B614/mechanism.md new file mode 100644 index 000000000..476c82ae0 --- /dev/null +++ b/.run/P36/agents/ov_SC07_010__func_8017B614/mechanism.md @@ -0,0 +1,78 @@ +# func_8017B614 (ov_SC07_010, 5-copy class) — T7 agent d6 (S104) + +**Result: score 0, lever-free, first `--try`.** No pin, no asm, no added volatile, no do-while, no invented term. +Levers before → after: **3 → 0** (the `$16` pin, the launder, the barrier). + +Whole-object check on the `--try --keep` object (`scratch/cand.o`): `objdump -drz` of the entire object (all 9,004 lines, +every function, relocations included) is identical to `.run/P36/delever/baseline/src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.o` +(`scratch/obj.diff` is empty). `.text`, `.data`, `.rodata`, `.sdata` and `.bss` are `cmp`-equal. The symbol tables differ only in +the `FILE` symbol, which is the scratch path. + +**The other 4 copies (the same text with renamed symbols) also score 0.** `scratch/port.py` pairs the extern lists by +position, and the ports are in `scratch/ports/`: +`src/ov_MAIN_012/ov_MAIN_012_jr_801789AC.c`, `src/ov_SC02_037/ov_SC02_037_jr_8017AE2C.c`, +`src/ov_SC03_107/ov_SC03_107_jr_801789AC.c`, `src/ov_SC07_011/ov_SC07_011_jr_8017AE2C.c`. Each ported body got +`--try` → score 0 (function-level only; I did not run the whole-object check on those four). + +## (a) The residual in one sentence +Two independent defects. (1) `param_2` was kept in `$s0` for the whole function, where the target compares `$a1` and copies +`$a1→$s0` only in the block-move arm (the pin plus the launder were faking that copy). (2) `li 1; sh D_801A94D0` was emitted above +the six tail `lh` loads, where the target has it below them (the barrier was faking that order). + +## (b) Passes and decisions (read in `tools/reference/gcc-2.7.2/`, the same mechanism as S103 c30 on the 126-copy ov_SC04_011 class) +1. **cse canonical register, `make_regs_eqv` (cse.c:849-858).** A new pseudo becomes the class head only if it lives past the + current basic block. A then-arm-local `src` does not, so `param_2` stays canonical, the copy is deleted, and `param_2` lives + across the `movstrsi` scratch clobbers of `$v0-$a1`, which puts it in `$s0`. A function-scope `src` assigned in BOTH arms lives + past the block, becomes canonical, and keeps the copy. Global's `expand_preferences` (global.c:781-821) then hands `src` `$s0` + and leaves `param_2` in `$a1`. +2. **sched1 hoists the store and sched2 repairs it, through `true_dependence` (sched.c:815-836).** sched1's `birthing_insn_p` + priority boost puts the loads after `sh 1` in every spelling. sched2 can sink `sh 1` below the `0(s0)`/`0(s1)` loads only if + they are independent. That needs the loads to be MEM_IN_STRUCT_P at a varying address (COMPONENT_REF, expr.c:4888) and the + store to be scalar at a fixed address. The `sb zero,D_8012694C` must stay ABOVE the loads, so it must itself be an in-struct + access: `extern u8 D_8012694C[]; D_8012694C[0] = 0;`. + +## (c) The source moves (byte ladder in THIS TU, all by `--try`) +- `body_free.c` → 13. +- + one function-scope `u8 *src` assigned in both arms (the arm shape of func_8017B238, which is banked in this TU) → **6** + (`scratch/A2_free_arm.c`; only the `sh 1` order is left). +- + tail loads as `((SV4_8017B368 *)&D_801A7CCC)->a` / `…&D_801A7CC4)->a`, with the scalar `D_8012694C` kept → **4** + (`scratch/B_noarray.c`). +- + `extern u8 D_8012694C[]; D_8012694C[0] = 0;` → **0** (`body.c`; the ported banked ov_SC01_000 sibling, with symbols renamed). +- Controls: keep the array store but drop the member reads → 19 (`scratch/C_nomember.c`). Arm shape plus direct scalar tail reads + (without the `p794`/`v…` temporaries) → 19 (`scratch/A_armonly.c`). Without the member reads, cse re-materialises the + addresses differently. So the member reads and the array store are a JOINT close, the same as in S103. + +Proven on bytes: the ladder above. Not independently re-proven here: the pass attributions (b1) and (b2). They are inherited from +S103 c30's dumps on the ov_SC04_011 copy, and the identical byte ladder (13/6/4/0) is consistent with them. + +## (d) Generator proposal +When a `$16` pin + launder + barrier trio sits on a function whose NAME has a lever-free banked variant in another overlay +(`related.txt`'s first section), port the variant, renaming the extern symbols by position in the extern list +(`scratch/port.py`: pair the two bodies' `extern … D_x` lists in order). Then `--try` every copy of the class. This closed 5/5 +copies with zero search here. A class-wide "port-the-banked-twin" pass should run BEFORE the R2–R26 free sweep, which spent +1,699 compiles on this class and never left 13. + +## (e) What did not work +- The free sweep (history.txt: g6/s1/s2/s4/s7, 1,699 compiles) stayed at 13. None of its moves (block, param-copy, bystander, + do-while, inline, base tmp) touch either of the two real channels: the scope of `src` across the if/else, or the + MEM_IN_STRUCT_P flag on the tail accesses. +- The single-move ablations above (19, 4) show that no one-step move reaches 0. + +## (f) Where the method fell short +Nothing was left to crack. `related.txt` put the lever-free ov_SC01_000 variant first, and the brief's R71 lead said to port it +first. The one compile was the whole job. The shortfall is upstream: the regen sweep does not try the banked cross-overlay +twin before its generators. Also, 5 copies were listed but not named in the pack; `grep -l 'rung B tus9'` over each TU's +func_8017B614 body finds them. + +## (g) Structs question +**Yes, and here it is not "plausibly": struct typing is exactly what replaced the barrier.** The barrier existed only because +sched2's `true_dependence` (sched.c:830-834) could not separate the scalar `sh D_801A94D0` from the `lh 0(s0)` / `lh 0(s1)` +loads. Once those loads are COMPONENT_REFs of an 8-byte `SV4_8017B368` (`{s16 a, b, c, pad}`) laid over `D_801A7CCC` and +`D_801A7CC4`, they are `mem/s`, and the store sinks. The struct types this implies: +- `D_801A7CC4` / `D_801A7CCC`: two `SV4_8017B368` (s16 x,y,z,pad) position vectors (the `D_801A7CC4..CC8` and `D_801A7CCC..CD0` + triples; func_8017B7A8 and func_8017B940 write the same triples field by field). Typing them as one struct global each would + remove the `((SV4_8017B368 *)&…)->a` casts. +- `D_8012694C`: the byte at +4 of the camera object `D_80126948`, whose s32 fields +0x3C..+0x50 are `D_80126984..D_80126998`. + `D_8012694C[0]` is a stand-in for `camera.field_4 = 0`. A real struct type for `D_80126948` would make this store a genuine + COMPONENT_REF (the in-struct flag the bytes need) and turn the seven scalar externs into field accesses. +The `$16` pin plus launder was not a struct issue: it was the scope of `src` (cse.c:849-858). diff --git a/.run/P36/agents/ov_SC07_010__func_8017B614/neighbours.txt b/.run/P36/agents/ov_SC07_010__func_8017B614/neighbours.txt index 86781693f..16b7e4568 100644 --- a/.run/P36/agents/ov_SC07_010__func_8017B614/neighbours.txt +++ b/.run/P36/agents/ov_SC07_010__func_8017B614/neighbours.txt @@ -1,4 +1,4 @@ -=== THIS FUNCTION'S OWN HEADER (func_8017B614, line 2984) — read it in full === +=== THIS FUNCTION'S OWN HEADER (func_8017B614, line 2986) — read it in full === // @class: regalloc-order + T1 memcpy-builtin→call re-crack // @stuck: 0 (iso). Register lever = $16 pin + in-place re-tie on the memcpy-branch src (keeps // param_2 in $a1 until the branch, then $s0 for the loads). Block-moves are align-1 struct-assigns diff --git a/.run/P36/agents/ov_SC07_010__func_8017B614/related.txt b/.run/P36/agents/ov_SC07_010__func_8017B614/related.txt index c6b2f3cd5..888e5eb98 100644 --- a/.run/P36/agents/ov_SC07_010__func_8017B614/related.txt +++ b/.run/P36/agents/ov_SC07_010__func_8017B614/related.txt @@ -1,5 +1,103 @@ -=== lever-free bodies in ov_SC07_010 sharing a callee or global with func_8017B614 (23 found; top 6 by shared symbols) — read them for the SHAPE === ---- func_8017B490 (src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:2925) shares 12: D_80126984 D_80126988 D_8012698C D_80126990 D_80126994 D_80126998 D_80185900 D_801A7C54 D_801A7CC4 D_801A7CCC D_801A94D0 func_8012F214 --- +=== func_8017B614 ALREADY LEVER-FREE in src/ov_SC01_000/ov_SC01_000_jr_8017AE2C.c:2907 — same name, shares symbols and size: PROBABLY a variant; diff it before porting (R71) === +s32 func_8017B614(s32 param_1, s32 param_2) +{ + extern void func_8012F214(s32 a0, s32 a1, s32 a2); + extern void func_80129CF8(void); + extern s32 func_8017BE60(void *a0); + extern u8 D_80182548[]; + extern s16 D_801A56EC; + extern s16 D_801A56EE; + extern s16 D_801A56F0; + extern s16 D_801A56E4; + extern s16 D_801A56E6; + extern s16 D_801A56E8; + extern u8 D_8012694C[]; + extern s32 D_80126998; + extern s32 D_80126984; + extern s32 D_80126988; + extern s32 D_8012698C; + + u8 buf[16]; + u8 *src; + + if (((u32)param_2) >= 0xB) { + src = (u8 *)((u32)param_2); + *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src; + *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8); + } else { + s32 a2addr; + + src = &D_80182548[((u32)param_2) * 0x10]; + a2addr = (s32)&D_80182548[((u32)param_2) * 0x10 + 8]; + func_8012F214(param_1, (s32)src, (s32)&buf[0]); + func_8012F214(param_1, a2addr, (s32)&buf[8]); + } + *(Blk8_8017B614 *)&D_801A56EC = *(Blk8_8017B614 *)&buf[0]; + *(Blk8_8017B614 *)&D_801A56E4 = *(Blk8_8017B614 *)&buf[8]; + func_8012A018((s32)func_8017BE60, 0); + D_8012694C[0] = 0; + D_801A5870 = 1; + D_801A5674 = 0x1E; + D_80126990 = ((SV4_8017B368 *)&D_801A56EC)->a; + D_80126994 = D_801A56EE; + D_80126998 = D_801A56F0; + D_80126984 = ((SV4_8017B368 *)&D_801A56E4)->a; + D_80126988 = D_801A56E6; + D_8012698C = D_801A56E8; + func_80129CF8(); +} + +=== func_8017B614 ALREADY LEVER-FREE in src/ov_SC01_001/ov_SC01_001_jr_8017AE2C.c:2905 — same name, shares symbols and size: PROBABLY a variant; diff it before porting (R71) === +s32 func_8017B614(s32 param_1, s32 param_2) +{ + extern void func_8012F214(s32 a0, s32 a1, s32 a2); + extern void func_80129CF8(void); + extern s32 func_8017BE60(void *a0); + extern u8 D_80187198[]; + extern s16 D_801ED97C; + extern s16 D_801ED97E; + extern s16 D_801ED980; + extern s16 D_801ED974; + extern s16 D_801ED976; + extern s16 D_801ED978; + extern u8 D_8012694C[]; + extern s32 D_80126998; + extern s32 D_80126984; + extern s32 D_80126988; + extern s32 D_8012698C; + + u8 buf[16]; + u8 *src; + + if (((u32)param_2) >= 0xB) { + src = (u8 *)((u32)param_2); + *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src; + *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8); + } else { + s32 a2addr; + + src = &D_80187198[((u32)param_2) * 0x10]; + a2addr = (s32)&D_80187198[((u32)param_2) * 0x10 + 8]; + func_8012F214(param_1, (s32)src, (s32)&buf[0]); + func_8012F214(param_1, a2addr, (s32)&buf[8]); + } + *(Blk8_8017B614 *)&D_801ED97C = *(Blk8_8017B614 *)&buf[0]; + *(Blk8_8017B614 *)&D_801ED974 = *(Blk8_8017B614 *)&buf[8]; + func_8012A018((s32)func_8017BE60, 0); + D_8012694C[0] = 0; + D_801F3150 = 1; + D_801ED904 = 0x1E; + D_80126990 = ((SV4_8017B368 *)&D_801ED97C)->a; + D_80126994 = D_801ED97E; + D_80126998 = D_801ED980; + D_80126984 = ((SV4_8017B368 *)&D_801ED974)->a; + D_80126988 = D_801ED976; + D_8012698C = D_801ED978; + func_80129CF8(); +} + +=== lever-free bodies in ov_SC07_010 sharing a callee or global with func_8017B614 (25 found; top 6 by shared symbols) — read them for the SHAPE === +--- func_8017B490 (src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:2927) shares 12: D_80126984 D_80126988 D_8012698C D_80126990 D_80126994 D_80126998 D_80185900 D_801A7C54 D_801A7CC4 D_801A7CCC D_801A94D0 func_8012F214 --- s32 func_8017B490(s32 param) { extern void func_8017BA3C(s32 param_1, s32 param_2); @@ -46,7 +144,47 @@ s32 func_8017B490(s32 param) D_8012698C = (*(SV4_8017B368 *)&D_801A7CC4).c; } ---- func_8017B7A8 (src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:3057) shares 8: D_8012694C D_801A7C54 D_801A7CC4 D_801A7CC6 D_801A7CC8 D_801A7CCC D_801A7CCE D_801A7CD0 --- +--- func_8017B238 (src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:2840) shares 9: D_8012694C D_80185900 D_801A7C54 D_801A7CC4 D_801A7CCC D_801A94D0 func_8012A018 func_8012F214 func_8017BE60 --- +s32 func_8017B238(s32 param_1, s32 param_2) +{ + + extern s16 D_801A7C54; + extern s16 D_801A94D0; + extern void func_8012F214(s32 a0, s32 a1, s32 a2); + extern s32 func_8017BE60(void *a0); + extern u8 D_80185900[]; + extern s16 D_801A7CCC; + extern s16 D_801A7CC4; + extern u8 D_8012694C; + + u8 buf[16]; + u8 *src; + + if (((u32)param_2) >= 0xB) { + src = (u8 *)((u32)param_2); + *(Blk8_8017B238 *)&buf[0] = *(Blk8_8017B238 *)src; + *(Blk8_8017B238 *)&buf[8] = *(Blk8_8017B238 *)(src + 8); + } else { + s32 a2addr; + + src = &D_80185900[((u32)param_2) * 0x10]; + a2addr = (s32)&D_80185900[((u32)param_2) * 0x10 + 8]; + func_8012F214(param_1, (s32)src, (s32)&buf[0]); + func_8012F214(param_1, a2addr, (s32)&buf[8]); + } + { + s16 *p794 = &D_801A7CCC; + s16 *p78C = &D_801A7CC4; + *(Blk8_8017B238 *)p794 = *(Blk8_8017B238 *)&buf[0]; + *(Blk8_8017B238 *)p78C = *(Blk8_8017B238 *)&buf[8]; + func_8012A018((s32)func_8017BE60, 0); + D_8012694C = 0; + D_801A94D0 = 1; + D_801A7C54 = 0; + } +} + +--- func_8017B7A8 (src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:3059) shares 8: D_8012694C D_801A7C54 D_801A7CC4 D_801A7CC6 D_801A7CC8 D_801A7CCC D_801A7CCE D_801A7CD0 --- void func_8017B7A8(void) { @@ -74,7 +212,7 @@ void func_8017B7A8(void) D_801A7CC8 = (s16) D_80114F2C; } ---- func_8017B940 (src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:3155) shares 8: D_8012694C D_801A7C54 D_801A7CC4 D_801A7CC6 D_801A7CC8 D_801A7CCC D_801A7CCE D_801A7CD0 --- +--- func_8017B940 (src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:3157) shares 8: D_8012694C D_801A7C54 D_801A7CC4 D_801A7CC6 D_801A7CC8 D_801A7CCC D_801A7CCE D_801A7CD0 --- void func_8017B940(void) { @@ -137,7 +275,7 @@ void func_8017B0E4(int param_1, int param_2) *(s32 *)(((s32)param_1) + 0x44) = (s16)func_80012C6C((s32)*(s16 *)(((s32)param_1) + 0x44), (s32)D_801A7CC8, (s32)((s16)param_2)); } ---- func_8017B368 (src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:2887) shares 6: D_80185900 D_801A7C54 D_801A7CC4 D_801A7CCC D_801A94D0 func_8012F214 --- +--- func_8017B368 (src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:2889) shares 6: D_80185900 D_801A7C54 D_801A7CC4 D_801A7CCC D_801A94D0 func_8012F214 --- s32 func_8017B368(s32 param) { @@ -173,12 +311,3 @@ s32 func_8017B368(s32 param) D_801A7C54 = 0; } ---- func_8017B8E8 (src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:3138) shares 2: D_801A7CC4 D_801A7CCC --- -s32 func_8017B8E8(s32 src) { - - extern s16 D_801A7CC4; - extern s16 D_801A7CCC; - (*(S8_8017B8E8 *)&D_801A7CCC) = ((S8_8017B8E8 *)src)[0]; - (*(S8_8017B8E8 *)&D_801A7CC4) = ((S8_8017B8E8 *)src)[1]; -} - diff --git a/.run/P36/delever/calibration.json b/.run/P36/delever/calibration.json index f25880574..d0a2ba5e4 100644 --- a/.run/P36/delever/calibration.json +++ b/.run/P36/delever/calibration.json @@ -1,7 +1,7 @@ { - "head": "f644ecb9d", + "head": "8030518bc", "stamp": "15956e4a96c4", - "generated": "2026-09-10 21:11", + "generated": "2026-09-10 21:21", "aliases": [ "main", "ov_SC03_014", @@ -21,207 +21,207 @@ "main": { "objects": 85, "identical": 85, - "seconds": 10.268000000000004, - "mean_s": 0.121 + "seconds": 8.824000000000003, + "mean_s": 0.104 }, "ov_SC03_014": { "objects": 32, "identical": 32, - "seconds": 6.941000000000002, - "mean_s": 0.217 + "seconds": 6.2299999999999995, + "mean_s": 0.195 }, "ov_SC03_015": { "objects": 32, "identical": 32, - "seconds": 6.563000000000002, - "mean_s": 0.205 + "seconds": 5.5, + "mean_s": 0.172 }, "ov_SC04_011": { "objects": 28, "identical": 28, - "seconds": 6.0840000000000005, - "mean_s": 0.217 + "seconds": 5.965000000000001, + "mean_s": 0.213 } }, "per_object_seconds": { - "build/src/800.o": 0.987, - "build/src/800_b.o": 0.145, - "build/src/800_b_2.o": 0.443, - "build/src/800_b_o0a.o": 0.125, - "build/src/800_c.o": 0.304, - "build/src/800b2.o": 0.099, - "build/src/apicard1.o": 0.115, - "build/src/apicard2.o": 0.101, - "build/src/apicard3.o": 0.074, - "build/src/apicard4.o": 0.081, - "build/src/apicard5.o": 0.096, - "build/src/apicard6.o": 0.092, - "build/src/apicard7.o": 0.105, - "build/src/boot.o": 0.185, - "build/src/gap.o": 0.148, - "build/src/libapi1.o": 0.148, - "build/src/libapi2.o": 0.086, - "build/src/libc2_1.o": 0.089, + "build/src/800.o": 0.674, + "build/src/800_b.o": 0.119, + "build/src/800_b_2.o": 0.303, + "build/src/800_b_o0a.o": 0.147, + "build/src/800_c.o": 0.217, + "build/src/800b2.o": 0.123, + "build/src/apicard1.o": 0.11, + "build/src/apicard2.o": 0.088, + "build/src/apicard3.o": 0.112, + "build/src/apicard4.o": 0.111, + "build/src/apicard5.o": 0.12, + "build/src/apicard6.o": 0.147, + "build/src/apicard7.o": 0.118, + "build/src/boot.o": 0.139, + "build/src/gap.o": 0.115, + "build/src/libapi1.o": 0.124, + "build/src/libapi2.o": 0.082, + "build/src/libc2_1.o": 0.082, "build/src/libc2_2.o": 0.079, - "build/src/libcd1.o": 0.099, - "build/src/libcd2.o": 0.089, - "build/src/libetc.o": 0.09, - "build/src/libgpu.o": 0.109, - "build/src/libgpu2.o": 0.09, - "build/src/libgs1.o": 0.093, - "build/src/libgs2.o": 0.094, - "build/src/libgs3.o": 0.098, - "build/src/libgs4.o": 0.089, - "build/src/libgs5.o": 0.078, - "build/src/libgs6.o": 0.134, - "build/src/libgs7.o": 0.101, - "build/src/libgs8.o": 0.092, - "build/src/libgte1.o": 0.107, - "build/src/libgte10.o": 0.1, - "build/src/libgte11.o": 0.088, - "build/src/libgte12.o": 0.115, - "build/src/libgte13.o": 0.086, - "build/src/libgte14.o": 0.083, - "build/src/libgte15.o": 0.106, - "build/src/libgte16.o": 0.133, - "build/src/libgte17.o": 0.076, - "build/src/libgte18.o": 0.12, - "build/src/libgte19.o": 0.101, - "build/src/libgte2.o": 0.115, - "build/src/libgte20.o": 0.127, - "build/src/libgte21.o": 0.097, - "build/src/libgte22.o": 0.077, - "build/src/libgte23.o": 0.126, - "build/src/libgte24.o": 0.111, - "build/src/libgte25.o": 0.095, - "build/src/libgte26.o": 0.094, - "build/src/libgte27.o": 0.153, - "build/src/libgte28.o": 0.073, - "build/src/libgte29.o": 0.134, - "build/src/libgte3.o": 0.115, - "build/src/libgte30.o": 0.126, - "build/src/libgte4.o": 0.1, - "build/src/libgte5.o": 0.138, - "build/src/libgte6.o": 0.095, - "build/src/libgte7.o": 0.122, - "build/src/libgte8.o": 0.086, - "build/src/libgte9.o": 0.083, - "build/src/libmcrd1.o": 0.101, - "build/src/libmcrd2.o": 0.102, - "build/src/libpad1.o": 0.082, - "build/src/libpad2.o": 0.125, - "build/src/sgap.o": 0.106, - "build/src/sgap_2.o": 0.1, - "build/src/sgap_3.o": 0.117, - "build/src/sgap_4.o": 0.146, - "build/src/sgap_5.o": 0.125, - "build/src/sgap_6.o": 0.101, - "build/src/sgap_8.o": 0.12, - "build/src/snd1.o": 0.132, - "build/src/snd10.o": 0.084, - "build/src/snd11.o": 0.074, - "build/src/snd12.o": 0.075, - "build/src/snd2.o": 0.102, - "build/src/snd3.o": 0.08, - "build/src/snd4.o": 0.077, - "build/src/snd5.o": 0.094, - "build/src/snd6.o": 0.099, - "build/src/snd7.o": 0.079, - "build/src/snd8.o": 0.091, - "build/src/snd9.o": 0.116, - "build/src/ov_SC03_014/ov_SC03_014.o": 0.162, - "build/src/ov_SC03_014/ov_SC03_014_after.o": 0.691, - "build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o": 0.566, - "build/src/ov_SC03_014/ov_SC03_014_jr_80135888.o": 0.139, - "build/src/ov_SC03_014/ov_SC03_014_jr_80135A4C.o": 0.099, - "build/src/ov_SC03_014/ov_SC03_014_jr_80135D20.o": 0.205, - "build/src/ov_SC03_014/ov_SC03_014_jr_801380E0.o": 0.282, - "build/src/ov_SC03_014/ov_SC03_014_jr_8013C98C.o": 0.179, - "build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o": 0.136, - "build/src/ov_SC03_014/ov_SC03_014_jr_8013FFD8.o": 0.132, - "build/src/ov_SC03_014/ov_SC03_014_jr_80140608.o": 0.289, - "build/src/ov_SC03_014/ov_SC03_014_jr_8015444C.o": 0.132, - "build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o": 0.232, - "build/src/ov_SC03_014/ov_SC03_014_jr_801588CC.o": 0.148, - "build/src/ov_SC03_014/ov_SC03_014_jr_80159C84.o": 0.102, - "build/src/ov_SC03_014/ov_SC03_014_jr_8015A3C8.o": 0.125, - "build/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.o": 0.154, - "build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o": 0.634, - "build/src/ov_SC03_014/ov_SC03_014_jr_8016AB6C.o": 0.409, - "build/src/ov_SC03_014/ov_SC03_014_jr_80171B4C.o": 0.168, - "build/src/ov_SC03_014/ov_SC03_014_jr_801734BC.o": 0.317, - "build/src/ov_SC03_014/ov_SC03_014_jr_801789AC.o": 0.09, - "build/src/ov_SC03_014/ov_SC03_014_jr_80178D40.o": 0.15, - "build/src/ov_SC03_014/ov_SC03_014_jr_8017A4AC.o": 0.124, - "build/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.o": 0.256, - "build/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.o": 0.252, - "build/src/ov_SC03_014/ov_SC03_014_jr_80184440.o": 0.068, - "build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o": 0.325, - "build/src/ov_SC03_014/ov_SC03_014_o0b.o": 0.107, - "build/src/ov_SC03_014/ov_SC03_014_o0c.o": 0.078, - "build/src/ov_SC03_014/ov_SC03_014_o0d.o": 0.094, - "build/src/ov_SC03_014/ov_SC03_014_o0e.o": 0.096, - "build/src/ov_SC03_015/ov_SC03_015.o": 0.168, - "build/src/ov_SC03_015/ov_SC03_015_after.o": 0.684, - "build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o": 0.589, - "build/src/ov_SC03_015/ov_SC03_015_jr_80135888.o": 0.079, - "build/src/ov_SC03_015/ov_SC03_015_jr_80135A4C.o": 0.106, - "build/src/ov_SC03_015/ov_SC03_015_jr_80135D20.o": 0.161, - "build/src/ov_SC03_015/ov_SC03_015_jr_801380E0.o": 0.202, - "build/src/ov_SC03_015/ov_SC03_015_jr_8013C98C.o": 0.196, - "build/src/ov_SC03_015/ov_SC03_015_jr_8013F350.o": 0.1, - "build/src/ov_SC03_015/ov_SC03_015_jr_8013FFD8.o": 0.099, - "build/src/ov_SC03_015/ov_SC03_015_jr_80140608.o": 0.3, - "build/src/ov_SC03_015/ov_SC03_015_jr_8015444C.o": 0.103, - "build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o": 0.252, - "build/src/ov_SC03_015/ov_SC03_015_jr_801588CC.o": 0.147, - "build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o": 0.106, - "build/src/ov_SC03_015/ov_SC03_015_jr_8015A3C8.o": 0.124, - "build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o": 0.131, - "build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o": 0.615, - "build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o": 0.341, - "build/src/ov_SC03_015/ov_SC03_015_jr_80171B4C.o": 0.128, - "build/src/ov_SC03_015/ov_SC03_015_jr_801734BC.o": 0.318, - "build/src/ov_SC03_015/ov_SC03_015_jr_801789AC.o": 0.086, - "build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o": 0.135, - "build/src/ov_SC03_015/ov_SC03_015_jr_8017A4AC.o": 0.118, - "build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o": 0.219, - "build/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.o": 0.25, - "build/src/ov_SC03_015/ov_SC03_015_jr_80184440.o": 0.081, - "build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o": 0.356, - "build/src/ov_SC03_015/ov_SC03_015_o0b.o": 0.077, - "build/src/ov_SC03_015/ov_SC03_015_o0c.o": 0.086, - "build/src/ov_SC03_015/ov_SC03_015_o0d.o": 0.105, - "build/src/ov_SC03_015/ov_SC03_015_o0e.o": 0.101, - "build/src/ov_SC04_011/ov_SC04_011.o": 0.162, - "build/src/ov_SC04_011/ov_SC04_011_after.o": 0.654, - "build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o": 0.516, - "build/src/ov_SC04_011/ov_SC04_011_jr_80135888.o": 0.075, - "build/src/ov_SC04_011/ov_SC04_011_jr_80135A4C.o": 0.078, - "build/src/ov_SC04_011/ov_SC04_011_jr_80135D20.o": 0.161, - "build/src/ov_SC04_011/ov_SC04_011_jr_801380E0.o": 0.197, - "build/src/ov_SC04_011/ov_SC04_011_jr_8013C98C.o": 0.152, - "build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o": 0.097, - "build/src/ov_SC04_011/ov_SC04_011_jr_8013FFD8.o": 0.092, - "build/src/ov_SC04_011/ov_SC04_011_jr_80140608.o": 0.256, - "build/src/ov_SC04_011/ov_SC04_011_jr_8015444C.o": 0.083, - "build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o": 0.263, - "build/src/ov_SC04_011/ov_SC04_011_jr_801588CC.o": 0.151, - "build/src/ov_SC04_011/ov_SC04_011_jr_80159C84.o": 0.124, - "build/src/ov_SC04_011/ov_SC04_011_jr_8015A3C8.o": 0.126, - "build/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.o": 0.133, - "build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o": 0.596, - "build/src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.o": 0.329, - "build/src/ov_SC04_011/ov_SC04_011_jr_80171B4C.o": 0.134, - "build/src/ov_SC04_011/ov_SC04_011_jr_801734BC.o": 0.256, - "build/src/ov_SC04_011/ov_SC04_011_jr_801789AC.o": 0.076, - "build/src/ov_SC04_011/ov_SC04_011_jr_80178D40.o": 0.171, - "build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.113, - "build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.161, - "build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.755, - "build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.086, - "build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.087 + "build/src/libcd1.o": 0.089, + "build/src/libcd2.o": 0.09, + "build/src/libetc.o": 0.086, + "build/src/libgpu.o": 0.085, + "build/src/libgpu2.o": 0.078, + "build/src/libgs1.o": 0.094, + "build/src/libgs2.o": 0.069, + "build/src/libgs3.o": 0.074, + "build/src/libgs4.o": 0.095, + "build/src/libgs5.o": 0.077, + "build/src/libgs6.o": 0.155, + "build/src/libgs7.o": 0.102, + "build/src/libgs8.o": 0.104, + "build/src/libgte1.o": 0.153, + "build/src/libgte10.o": 0.124, + "build/src/libgte11.o": 0.119, + "build/src/libgte12.o": 0.123, + "build/src/libgte13.o": 0.095, + "build/src/libgte14.o": 0.106, + "build/src/libgte15.o": 0.152, + "build/src/libgte16.o": 0.085, + "build/src/libgte17.o": 0.152, + "build/src/libgte18.o": 0.093, + "build/src/libgte19.o": 0.082, + "build/src/libgte2.o": 0.133, + "build/src/libgte20.o": 0.142, + "build/src/libgte21.o": 0.115, + "build/src/libgte22.o": 0.094, + "build/src/libgte23.o": 0.111, + "build/src/libgte24.o": 0.117, + "build/src/libgte25.o": 0.074, + "build/src/libgte26.o": 0.079, + "build/src/libgte27.o": 0.078, + "build/src/libgte28.o": 0.109, + "build/src/libgte29.o": 0.073, + "build/src/libgte3.o": 0.09, + "build/src/libgte30.o": 0.101, + "build/src/libgte4.o": 0.089, + "build/src/libgte5.o": 0.086, + "build/src/libgte6.o": 0.074, + "build/src/libgte7.o": 0.067, + "build/src/libgte8.o": 0.043, + "build/src/libgte9.o": 0.061, + "build/src/libmcrd1.o": 0.048, + "build/src/libmcrd2.o": 0.043, + "build/src/libpad1.o": 0.053, + "build/src/libpad2.o": 0.044, + "build/src/sgap.o": 0.038, + "build/src/sgap_2.o": 0.038, + "build/src/sgap_3.o": 0.039, + "build/src/sgap_4.o": 0.038, + "build/src/sgap_5.o": 0.037, + "build/src/sgap_6.o": 0.035, + "build/src/sgap_8.o": 0.038, + "build/src/snd1.o": 0.043, + "build/src/snd10.o": 0.04, + "build/src/snd11.o": 0.038, + "build/src/snd12.o": 0.035, + "build/src/snd2.o": 0.122, + "build/src/snd3.o": 0.119, + "build/src/snd4.o": 0.133, + "build/src/snd5.o": 0.149, + "build/src/snd6.o": 0.115, + "build/src/snd7.o": 0.146, + "build/src/snd8.o": 0.121, + "build/src/snd9.o": 0.084, + "build/src/ov_SC03_014/ov_SC03_014.o": 0.196, + "build/src/ov_SC03_014/ov_SC03_014_after.o": 0.634, + "build/src/ov_SC03_014/ov_SC03_014_jr_8012ACE0.o": 0.534, + "build/src/ov_SC03_014/ov_SC03_014_jr_80135888.o": 0.095, + "build/src/ov_SC03_014/ov_SC03_014_jr_80135A4C.o": 0.081, + "build/src/ov_SC03_014/ov_SC03_014_jr_80135D20.o": 0.194, + "build/src/ov_SC03_014/ov_SC03_014_jr_801380E0.o": 0.248, + "build/src/ov_SC03_014/ov_SC03_014_jr_8013C98C.o": 0.212, + "build/src/ov_SC03_014/ov_SC03_014_jr_8013F350.o": 0.106, + "build/src/ov_SC03_014/ov_SC03_014_jr_8013FFD8.o": 0.12, + "build/src/ov_SC03_014/ov_SC03_014_jr_80140608.o": 0.217, + "build/src/ov_SC03_014/ov_SC03_014_jr_8015444C.o": 0.122, + "build/src/ov_SC03_014/ov_SC03_014_jr_80154C24.o": 0.244, + "build/src/ov_SC03_014/ov_SC03_014_jr_801588CC.o": 0.106, + "build/src/ov_SC03_014/ov_SC03_014_jr_80159C84.o": 0.12, + "build/src/ov_SC03_014/ov_SC03_014_jr_8015A3C8.o": 0.096, + "build/src/ov_SC03_014/ov_SC03_014_jr_8015AE2C.o": 0.122, + "build/src/ov_SC03_014/ov_SC03_014_jr_8015C32C.o": 0.603, + "build/src/ov_SC03_014/ov_SC03_014_jr_8016AB6C.o": 0.306, + "build/src/ov_SC03_014/ov_SC03_014_jr_80171B4C.o": 0.123, + "build/src/ov_SC03_014/ov_SC03_014_jr_801734BC.o": 0.231, + "build/src/ov_SC03_014/ov_SC03_014_jr_801789AC.o": 0.133, + "build/src/ov_SC03_014/ov_SC03_014_jr_80178D40.o": 0.144, + "build/src/ov_SC03_014/ov_SC03_014_jr_8017A4AC.o": 0.12, + "build/src/ov_SC03_014/ov_SC03_014_jr_8017AE2C.o": 0.205, + "build/src/ov_SC03_014/ov_SC03_014_jr_8017EB7C.o": 0.239, + "build/src/ov_SC03_014/ov_SC03_014_jr_80184440.o": 0.069, + "build/src/ov_SC03_014/ov_SC03_014_jr_801848E4.o": 0.315, + "build/src/ov_SC03_014/ov_SC03_014_o0b.o": 0.079, + "build/src/ov_SC03_014/ov_SC03_014_o0c.o": 0.071, + "build/src/ov_SC03_014/ov_SC03_014_o0d.o": 0.066, + "build/src/ov_SC03_014/ov_SC03_014_o0e.o": 0.079, + "build/src/ov_SC03_015/ov_SC03_015.o": 0.082, + "build/src/ov_SC03_015/ov_SC03_015_after.o": 0.326, + "build/src/ov_SC03_015/ov_SC03_015_jr_8012ACE0.o": 0.277, + "build/src/ov_SC03_015/ov_SC03_015_jr_80135888.o": 0.038, + "build/src/ov_SC03_015/ov_SC03_015_jr_80135A4C.o": 0.035, + "build/src/ov_SC03_015/ov_SC03_015_jr_80135D20.o": 0.211, + "build/src/ov_SC03_015/ov_SC03_015_jr_801380E0.o": 0.21, + "build/src/ov_SC03_015/ov_SC03_015_jr_8013C98C.o": 0.221, + "build/src/ov_SC03_015/ov_SC03_015_jr_8013F350.o": 0.188, + "build/src/ov_SC03_015/ov_SC03_015_jr_8013FFD8.o": 0.134, + "build/src/ov_SC03_015/ov_SC03_015_jr_80140608.o": 0.281, + "build/src/ov_SC03_015/ov_SC03_015_jr_8015444C.o": 0.179, + "build/src/ov_SC03_015/ov_SC03_015_jr_80154C24.o": 0.224, + "build/src/ov_SC03_015/ov_SC03_015_jr_801588CC.o": 0.203, + "build/src/ov_SC03_015/ov_SC03_015_jr_80159C84.o": 0.103, + "build/src/ov_SC03_015/ov_SC03_015_jr_8015A3C8.o": 0.108, + "build/src/ov_SC03_015/ov_SC03_015_jr_8015AE2C.o": 0.187, + "build/src/ov_SC03_015/ov_SC03_015_jr_8015C32C.o": 0.46, + "build/src/ov_SC03_015/ov_SC03_015_jr_8016AB6C.o": 0.299, + "build/src/ov_SC03_015/ov_SC03_015_jr_80171B4C.o": 0.21, + "build/src/ov_SC03_015/ov_SC03_015_jr_801734BC.o": 0.265, + "build/src/ov_SC03_015/ov_SC03_015_jr_801789AC.o": 0.076, + "build/src/ov_SC03_015/ov_SC03_015_jr_80178D40.o": 0.118, + "build/src/ov_SC03_015/ov_SC03_015_jr_8017A4AC.o": 0.082, + "build/src/ov_SC03_015/ov_SC03_015_jr_8017AE2C.o": 0.107, + "build/src/ov_SC03_015/ov_SC03_015_jr_8017EB7C.o": 0.221, + "build/src/ov_SC03_015/ov_SC03_015_jr_80184440.o": 0.053, + "build/src/ov_SC03_015/ov_SC03_015_jr_801848E4.o": 0.311, + "build/src/ov_SC03_015/ov_SC03_015_o0b.o": 0.075, + "build/src/ov_SC03_015/ov_SC03_015_o0c.o": 0.067, + "build/src/ov_SC03_015/ov_SC03_015_o0d.o": 0.063, + "build/src/ov_SC03_015/ov_SC03_015_o0e.o": 0.086, + "build/src/ov_SC04_011/ov_SC04_011.o": 0.158, + "build/src/ov_SC04_011/ov_SC04_011_after.o": 0.636, + "build/src/ov_SC04_011/ov_SC04_011_jr_8012ACE0.o": 0.487, + "build/src/ov_SC04_011/ov_SC04_011_jr_80135888.o": 0.064, + "build/src/ov_SC04_011/ov_SC04_011_jr_80135A4C.o": 0.122, + "build/src/ov_SC04_011/ov_SC04_011_jr_80135D20.o": 0.158, + "build/src/ov_SC04_011/ov_SC04_011_jr_801380E0.o": 0.223, + "build/src/ov_SC04_011/ov_SC04_011_jr_8013C98C.o": 0.221, + "build/src/ov_SC04_011/ov_SC04_011_jr_8013F350.o": 0.108, + "build/src/ov_SC04_011/ov_SC04_011_jr_8013FFD8.o": 0.07, + "build/src/ov_SC04_011/ov_SC04_011_jr_80140608.o": 0.245, + "build/src/ov_SC04_011/ov_SC04_011_jr_8015444C.o": 0.113, + "build/src/ov_SC04_011/ov_SC04_011_jr_80154C24.o": 0.214, + "build/src/ov_SC04_011/ov_SC04_011_jr_801588CC.o": 0.126, + "build/src/ov_SC04_011/ov_SC04_011_jr_80159C84.o": 0.1, + "build/src/ov_SC04_011/ov_SC04_011_jr_8015A3C8.o": 0.086, + "build/src/ov_SC04_011/ov_SC04_011_jr_8015AE2C.o": 0.142, + "build/src/ov_SC04_011/ov_SC04_011_jr_8015C32C.o": 0.553, + "build/src/ov_SC04_011/ov_SC04_011_jr_8016AB6C.o": 0.304, + "build/src/ov_SC04_011/ov_SC04_011_jr_80171B4C.o": 0.174, + "build/src/ov_SC04_011/ov_SC04_011_jr_801734BC.o": 0.253, + "build/src/ov_SC04_011/ov_SC04_011_jr_801789AC.o": 0.089, + "build/src/ov_SC04_011/ov_SC04_011_jr_80178D40.o": 0.159, + "build/src/ov_SC04_011/ov_SC04_011_jr_8017A4AC.o": 0.098, + "build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.164, + "build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.721, + "build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.08, + "build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.097 }, "ok": true, - "seconds": 3.8 + "seconds": 24.8 } diff --git a/.run/P36/delever/ledger.jsonl b/.run/P36/delever/ledger.jsonl index ed22ce0ae..ec9e8e099 100644 --- a/.run/P36/delever/ledger.jsonl +++ b/.run/P36/delever/ledger.jsonl @@ -29059,3 +29059,11 @@ {"ts": "2026-09-10 21:12:56", "label": "s104_d5", "rung": "E", "calib": {"head": "f644ecb9d", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_125/ov_SC03_125_jr_8017D604.c", "fn": "func_80180F0C", "addr": 2149060364, "aliases": null, "header": false, "includers": 0, "nhash_before": "e7517d4e13cd1351e8d370f35ec75fe121591d96", "nhash_after": "0f2b8c264acc441d17eb016feede2076816f1699", "source": "propagate:src/ov_SC05_018/ov_SC05_018_jr_8017D604.c:func_801837E8", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.237, "objects": ["build/src/ov_SC03_125/ov_SC03_125_jr_8017D604.o"], "before_text": "void func_80180F0C(s32 a0) {\n s32 state;\n s32 fv;\n\n state = *(u16 *)(a0 + 0x34);\n if (state == 1) {\n goto case1;\n }\n if (state < 2) {\n if (state == 0) {\n goto case0;\n }\n goto tail;\n }\n if (state == 2) {\n goto case2;\n }\n if (state == 3) {\n goto case3;\n }\n goto tail;\n\ncase0: {\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0xFC) = 0;\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n fv = rand();\n fv = (fv & 0x1F) + 0x1E;\n goto store1c;\n}\n\ncase1: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 + 6;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto randtail;\n}\n\ncase2: {\n register s32 p __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n s32 v0;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto tail;\n}\n\ncase3: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 - 3;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (*(s16 *)(a0 + 0xFC) >= 9) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = 0;\n}\n\nrandtail:\n fv = rand();\n fv = (fv & 0x3F) + 0x3C;\n\nstore1c:\n *(s32 *)(a0 + 0x1C) = fv;\n\ntail:\n if (!((u32)func_80029504() < 0x492)) {\n func_8012C218((void *)a0);\n }\n}\n", "after_text": "void func_80180F0C(s32 a0) {\n s32 state;\n s32 fv;\n\n state = *(u16 *)(a0 + 0x34);\n if (state == 1) {\n goto case1;\n }\n if (state < 2) {\n if (state == 0) {\n goto case0;\n }\n goto tail;\n }\n if (state == 2) {\n goto case2;\n }\n if (state == 3) {\n goto case3;\n }\n goto tail;\n\ncase0: {\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0xFC) = 0;\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n fv = rand();\n fv = (fv & 0x1F) + 0x1E;\n goto store1c;\n}\n\ncase1: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 + 6;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto randtail;\n}\n\ncase2: {\n s32 p;\n p = *(s32 *)(a0 + 0x20);\n *(u16 *)(p + 0x12) += *(u16 *)(a0 + 0xFC);\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto tail;\n}\n\ncase3: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 - 3;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (*(s16 *)(a0 + 0xFC) >= 9) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = 0;\n}\n\nrandtail:\n fv = rand();\n fv = (fv & 0x3F) + 0x3C;\n\nstore1c:\n *(s32 *)(a0 + 0x1C) = fv;\n\ntail:\n if (!((u32)func_80029504() < 0x492)) {\n func_8012C218((void *)a0);\n }\n}\n"} {"ts": "2026-09-10 21:12:56", "label": "s104_d5", "rung": "E", "calib": {"head": "f644ecb9d", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC04_020/ov_SC04_020_jr_8017D604.c", "fn": "func_80180BD0", "addr": 2149059536, "aliases": null, "header": false, "includers": 0, "nhash_before": "e7517d4e13cd1351e8d370f35ec75fe121591d96", "nhash_after": "0f2b8c264acc441d17eb016feede2076816f1699", "source": "propagate:src/ov_SC05_018/ov_SC05_018_jr_8017D604.c:func_801837E8", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.228, "objects": ["build/src/ov_SC04_020/ov_SC04_020_jr_8017D604.o"], "before_text": "void func_80180BD0(s32 a0) {\n s32 state;\n s32 fv;\n\n state = *(u16 *)(a0 + 0x34);\n if (state == 1) {\n goto case1;\n }\n if (state < 2) {\n if (state == 0) {\n goto case0;\n }\n goto tail;\n }\n if (state == 2) {\n goto case2;\n }\n if (state == 3) {\n goto case3;\n }\n goto tail;\n\ncase0: {\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0xFC) = 0;\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n fv = rand();\n fv = (fv & 0x1F) + 0x1E;\n goto store1c;\n}\n\ncase1: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 + 6;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto randtail;\n}\n\ncase2: {\n register s32 p __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n s32 v0;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto tail;\n}\n\ncase3: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 - 3;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (*(s16 *)(a0 + 0xFC) >= 9) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = 0;\n}\n\nrandtail:\n fv = rand();\n fv = (fv & 0x3F) + 0x3C;\n\nstore1c:\n *(s32 *)(a0 + 0x1C) = fv;\n\ntail:\n if (!((u32)func_80029504() < 0x492)) {\n func_8012C218((void *)a0);\n }\n}\n", "after_text": "void func_80180BD0(s32 a0) {\n s32 state;\n s32 fv;\n\n state = *(u16 *)(a0 + 0x34);\n if (state == 1) {\n goto case1;\n }\n if (state < 2) {\n if (state == 0) {\n goto case0;\n }\n goto tail;\n }\n if (state == 2) {\n goto case2;\n }\n if (state == 3) {\n goto case3;\n }\n goto tail;\n\ncase0: {\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0xFC) = 0;\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n fv = rand();\n fv = (fv & 0x1F) + 0x1E;\n goto store1c;\n}\n\ncase1: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 + 6;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto randtail;\n}\n\ncase2: {\n s32 p;\n p = *(s32 *)(a0 + 0x20);\n *(u16 *)(p + 0x12) += *(u16 *)(a0 + 0xFC);\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto tail;\n}\n\ncase3: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 - 3;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (*(s16 *)(a0 + 0xFC) >= 9) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = 0;\n}\n\nrandtail:\n fv = rand();\n fv = (fv & 0x3F) + 0x3C;\n\nstore1c:\n *(s32 *)(a0 + 0x1C) = fv;\n\ntail:\n if (!((u32)func_80029504() < 0x492)) {\n func_8012C218((void *)a0);\n }\n}\n"} {"ts": "2026-09-10 21:12:57", "label": "s104_d5", "rung": "E", "calib": {"head": "f644ecb9d", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_002/ov_SC03_002_jr_80181D78.c", "fn": "func_801824DC", "addr": 2149065948, "aliases": null, "header": false, "includers": 0, "nhash_before": "e7517d4e13cd1351e8d370f35ec75fe121591d96", "nhash_after": "0f2b8c264acc441d17eb016feede2076816f1699", "source": "propagate:src/ov_SC05_018/ov_SC05_018_jr_8017D604.c:func_801837E8", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.131, "objects": ["build/src/ov_SC03_002/ov_SC03_002_jr_80181D78.o"], "before_text": "void func_801824DC(s32 a0) {\n s32 state;\n s32 fv;\n\n state = *(u16 *)(a0 + 0x34);\n if (state == 1) {\n goto case1;\n }\n if (state < 2) {\n if (state == 0) {\n goto case0;\n }\n goto tail;\n }\n if (state == 2) {\n goto case2;\n }\n if (state == 3) {\n goto case3;\n }\n goto tail;\n\ncase0: {\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0xFC) = 0;\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n fv = rand();\n fv = (fv & 0x1F) + 0x1E;\n goto store1c;\n}\n\ncase1: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 + 6;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto randtail;\n}\n\ncase2: {\n register s32 p __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 v0;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto tail;\n}\n\ncase3: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 - 3;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (*(s16 *)(a0 + 0xFC) >= 9) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = 0;\n}\n\nrandtail:\n fv = rand();\n fv = (fv & 0x3F) + 0x3C;\n\nstore1c:\n *(s32 *)(a0 + 0x1C) = fv;\n\ntail:\n if (!((u32)func_80029504() < 0x492)) {\n func_8012C218((void *)a0);\n }\n}\n", "after_text": "void func_801824DC(s32 a0) {\n s32 state;\n s32 fv;\n\n state = *(u16 *)(a0 + 0x34);\n if (state == 1) {\n goto case1;\n }\n if (state < 2) {\n if (state == 0) {\n goto case0;\n }\n goto tail;\n }\n if (state == 2) {\n goto case2;\n }\n if (state == 3) {\n goto case3;\n }\n goto tail;\n\ncase0: {\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0xFC) = 0;\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n fv = rand();\n fv = (fv & 0x1F) + 0x1E;\n goto store1c;\n}\n\ncase1: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 + 6;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto randtail;\n}\n\ncase2: {\n s32 p;\n p = *(s32 *)(a0 + 0x20);\n *(u16 *)(p + 0x12) += *(u16 *)(a0 + 0xFC);\n if (func_8012BEE8(a0) == 0) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = *(u16 *)(a0 + 0x34) + 1;\n goto tail;\n}\n\ncase3: {\n s32 v0;\n s32 p;\n v0 = *(u16 *)(a0 + 0xFC);\n p = *(s32 *)(a0 + 0x20);\n v0 = v0 - 3;\n *(u16 *)(a0 + 0xFC) = v0;\n *(u16 *)(p + 0x12) = *(u16 *)(p + 0x12) + v0;\n if (*(s16 *)(a0 + 0xFC) >= 9) {\n goto tail;\n }\n *(u16 *)(a0 + 0x34) = 0;\n}\n\nrandtail:\n fv = rand();\n fv = (fv & 0x3F) + 0x3C;\n\nstore1c:\n *(s32 *)(a0 + 0x1C) = fv;\n\ntail:\n if (!((u32)func_80029504() < 0x492)) {\n func_8012C218((void *)a0);\n }\n}\n"} +{"ts": "2026-09-10 21:22:09", "label": "s104_d6", "rung": "E", "calib": {"head": "8030518bc", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c", "fn": "func_8017B614", "addr": 2149037588, "aliases": null, "header": false, "includers": 0, "nhash_before": "b88960c183ef2998edcde2df50c9df350441c07b", "nhash_after": "f300e1ba88cd17117db287e15306fb81e90de536", "source": ".run/P36/agents/ov_SC07_010__func_8017B614/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.342, "objects": ["build/src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.o"], "before_text": "s32 func_8017B614(s32 param_1, s32 param_2)\n{\n\n extern s32 D_80126990;\n extern s32 D_80126994;\n extern s16 D_801A7C54;\n extern s16 D_801A94D0;\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern void func_80129CF8(void);\n extern s32 func_8017BE60(void *a0);\n extern u8 D_80185900[];\n extern s16 D_801A7CCC;\n extern s16 D_801A7CCE;\n extern s16 D_801A7CD0;\n extern s16 D_801A7CC4;\n extern s16 D_801A7CC6;\n extern s16 D_801A7CC8;\n extern u8 D_8012694C;\n extern s32 D_80126998;\n extern s32 D_80126984;\n extern s32 D_80126988;\n extern s32 D_8012698C;\n\n u8 buf[16];\n\n if (((u32)param_2) >= 0xB) {\n register u8 *src __asm__(\"$16\"); // !FAKE: pin $16 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n __asm__ __volatile__(\"\" : \"=r\"(src) : \"0\"((u8 *)((u32)param_2))); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;\n *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);\n } else {\n s32 a1addr = (s32)&D_80185900[((u32)param_2) * 0x10];\n s32 a2addr = (s32)&D_80185900[((u32)param_2) * 0x10 + 8];\n func_8012F214(param_1, a1addr, (s32)&buf[0]);\n func_8012F214(param_1, a2addr, (s32)&buf[8]);\n }\n {\n s16 *p794 = &D_801A7CCC;\n s16 *p78C = &D_801A7CC4;\n *(Blk8_8017B614 *)p794 = *(Blk8_8017B614 *)&buf[0];\n *(Blk8_8017B614 *)p78C = *(Blk8_8017B614 *)&buf[8];\n func_8012A018((s32)func_8017BE60, 0);\n {\n s32 v794, v796, v798, v78C, v78E, v790;\n D_8012694C = 0;\n v794 = *p794;\n v796 = D_801A7CCE;\n v798 = D_801A7CD0;\n v78C = *p78C;\n v78E = D_801A7CC6;\n v790 = D_801A7CC8;\n __asm__ __volatile__(\"\"); // !FAKE: barrier \u2014 NEEDED DIFFERS (P36 rung B tus9)\n D_801A94D0 = 1;\n D_801A7C54 = 0x1E;\n D_80126990 = v794;\n D_80126994 = v796;\n D_80126998 = v798;\n D_80126984 = v78C;\n D_80126988 = v78E;\n D_8012698C = v790;\n }\n func_80129CF8();\n }\n}\n", "after_text": "s32 func_8017B614(s32 param_1, s32 param_2)\n{\n extern s32 D_80126990;\n extern s32 D_80126994;\n extern s16 D_801A7C54;\n extern s16 D_801A94D0;\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern void func_80129CF8(void);\n extern s32 func_8017BE60(void *a0);\n extern u8 D_80185900[];\n extern s16 D_801A7CCC;\n extern s16 D_801A7CCE;\n extern s16 D_801A7CD0;\n extern s16 D_801A7CC4;\n extern s16 D_801A7CC6;\n extern s16 D_801A7CC8;\n extern u8 D_8012694C[];\n extern s32 D_80126998;\n extern s32 D_80126984;\n extern s32 D_80126988;\n extern s32 D_8012698C;\n\n u8 buf[16];\n u8 *src;\n\n if (((u32)param_2) >= 0xB) {\n src = (u8 *)((u32)param_2);\n *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;\n *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);\n } else {\n s32 a2addr;\n\n src = &D_80185900[((u32)param_2) * 0x10];\n a2addr = (s32)&D_80185900[((u32)param_2) * 0x10 + 8];\n func_8012F214(param_1, (s32)src, (s32)&buf[0]);\n func_8012F214(param_1, a2addr, (s32)&buf[8]);\n }\n *(Blk8_8017B614 *)&D_801A7CCC = *(Blk8_8017B614 *)&buf[0];\n *(Blk8_8017B614 *)&D_801A7CC4 = *(Blk8_8017B614 *)&buf[8];\n func_8012A018((s32)func_8017BE60, 0);\n D_8012694C[0] = 0;\n D_801A94D0 = 1;\n D_801A7C54 = 0x1E;\n D_80126990 = ((SV4_8017B368 *)&D_801A7CCC)->a;\n D_80126994 = D_801A7CCE;\n D_80126998 = D_801A7CD0;\n D_80126984 = ((SV4_8017B368 *)&D_801A7CC4)->a;\n D_80126988 = D_801A7CC6;\n D_8012698C = D_801A7CC8;\n func_80129CF8();\n}\n"} +{"ts": "2026-09-10 21:22:38", "label": "s104_d6", "rung": "E", "calib": {"head": "8030518bc", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC02_037/ov_SC02_037_jr_8017AE2C.c", "fn": "func_8017B614", "addr": 2149037588, "aliases": null, "header": false, "includers": 0, "nhash_before": "b88960c183ef2998edcde2df50c9df350441c07b", "nhash_after": "f300e1ba88cd17117db287e15306fb81e90de536", "source": "propagate:src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:func_8017B614", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.301, "objects": ["build/src/ov_SC02_037/ov_SC02_037_jr_8017AE2C.o"], "before_text": "s32 func_8017B614(s32 param_1, s32 param_2)\n{\n\n extern s32 D_80126990;\n extern s32 D_80126994;\n extern s16 D_801C9644;\n extern s16 D_801C9A70;\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern void func_80129CF8(void);\n extern s32 func_8017BE60(void *a0);\n extern u8 D_8018754C[];\n extern s16 D_801C96BC;\n extern s16 D_801C96BE;\n extern s16 D_801C96C0;\n extern s16 D_801C96B4;\n extern s16 D_801C96B6;\n extern s16 D_801C96B8;\n extern u8 D_8012694C;\n extern s32 D_80126998;\n extern s32 D_80126984;\n extern s32 D_80126988;\n extern s32 D_8012698C;\n\n u8 buf[16];\n\n if (((u32)param_2) >= 0xB) {\n register u8 *src __asm__(\"$16\"); // !FAKE: pin $16 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n __asm__ __volatile__(\"\" : \"=r\"(src) : \"0\"((u8 *)((u32)param_2))); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;\n *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);\n } else {\n s32 a1addr = (s32)&D_8018754C[((u32)param_2) * 0x10];\n s32 a2addr = (s32)&D_8018754C[((u32)param_2) * 0x10 + 8];\n func_8012F214(param_1, a1addr, (s32)&buf[0]);\n func_8012F214(param_1, a2addr, (s32)&buf[8]);\n }\n {\n s16 *p794 = &D_801C96BC;\n s16 *p78C = &D_801C96B4;\n *(Blk8_8017B614 *)p794 = *(Blk8_8017B614 *)&buf[0];\n *(Blk8_8017B614 *)p78C = *(Blk8_8017B614 *)&buf[8];\n func_8012A018((s32)func_8017BE60, 0);\n {\n s32 v794, v796, v798, v78C, v78E, v790;\n D_8012694C = 0;\n v794 = *p794;\n v796 = D_801C96BE;\n v798 = D_801C96C0;\n v78C = *p78C;\n v78E = D_801C96B6;\n v790 = D_801C96B8;\n __asm__ __volatile__(\"\"); // !FAKE: barrier \u2014 NEEDED DIFFERS (P36 rung B tus9)\n D_801C9A70 = 1;\n D_801C9644 = 0x1E;\n D_80126990 = v794;\n D_80126994 = v796;\n D_80126998 = v798;\n D_80126984 = v78C;\n D_80126988 = v78E;\n D_8012698C = v790;\n }\n func_80129CF8();\n }\n}\n", "after_text": "s32 func_8017B614(s32 param_1, s32 param_2)\n{\n extern s32 D_80126990;\n extern s32 D_80126994;\n extern s16 D_801C9644;\n extern s16 D_801C9A70;\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern void func_80129CF8(void);\n extern s32 func_8017BE60(void *a0);\n extern u8 D_8018754C[];\n extern s16 D_801C96BC;\n extern s16 D_801C96BE;\n extern s16 D_801C96C0;\n extern s16 D_801C96B4;\n extern s16 D_801C96B6;\n extern s16 D_801C96B8;\n extern u8 D_8012694C[];\n extern s32 D_80126998;\n extern s32 D_80126984;\n extern s32 D_80126988;\n extern s32 D_8012698C;\n\n u8 buf[16];\n u8 *src;\n\n if (((u32)param_2) >= 0xB) {\n src = (u8 *)((u32)param_2);\n *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;\n *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);\n } else {\n s32 a2addr;\n\n src = &D_8018754C[((u32)param_2) * 0x10];\n a2addr = (s32)&D_8018754C[((u32)param_2) * 0x10 + 8];\n func_8012F214(param_1, (s32)src, (s32)&buf[0]);\n func_8012F214(param_1, a2addr, (s32)&buf[8]);\n }\n *(Blk8_8017B614 *)&D_801C96BC = *(Blk8_8017B614 *)&buf[0];\n *(Blk8_8017B614 *)&D_801C96B4 = *(Blk8_8017B614 *)&buf[8];\n func_8012A018((s32)func_8017BE60, 0);\n D_8012694C[0] = 0;\n D_801C9A70 = 1;\n D_801C9644 = 0x1E;\n D_80126990 = ((SV4_8017B368 *)&D_801C96BC)->a;\n D_80126994 = D_801C96BE;\n D_80126998 = D_801C96C0;\n D_80126984 = ((SV4_8017B368 *)&D_801C96B4)->a;\n D_80126988 = D_801C96B6;\n D_8012698C = D_801C96B8;\n func_80129CF8();\n}\n"} +{"ts": "2026-09-10 21:22:39", "label": "s104_d6", "rung": "E", "calib": {"head": "8030518bc", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_107/ov_SC03_107_jr_801789AC.c", "fn": "func_8017B614", "addr": 2149037588, "aliases": null, "header": false, "includers": 0, "nhash_before": "b88960c183ef2998edcde2df50c9df350441c07b", "nhash_after": "f300e1ba88cd17117db287e15306fb81e90de536", "source": "propagate:src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:func_8017B614", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.319, "objects": ["build/src/ov_SC03_107/ov_SC03_107_jr_801789AC.o"], "before_text": "s32 func_8017B614(s32 param_1, s32 param_2)\n{\n\n extern s32 D_80126990;\n extern s32 D_80126994;\n extern s16 D_8019B9A4;\n extern s16 D_8019BCC8;\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern void func_80129CF8(void);\n extern s32 func_8017BE60(void *a0);\n extern u8 D_80185DE8[];\n extern s16 D_8019BA1C;\n extern s16 D_8019BA1E;\n extern s16 D_8019BA20;\n extern s16 D_8019BA14;\n extern s16 D_8019BA16;\n extern s16 D_8019BA18;\n extern u8 D_8012694C;\n extern s32 D_80126998;\n extern s32 D_80126984;\n extern s32 D_80126988;\n extern s32 D_8012698C;\n\n u8 buf[16];\n\n if (((u32)param_2) >= 0xB) {\n register u8 *src __asm__(\"$16\"); // !FAKE: pin $16 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n __asm__ __volatile__(\"\" : \"=r\"(src) : \"0\"((u8 *)((u32)param_2))); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;\n *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);\n } else {\n s32 a1addr = (s32)&D_80185DE8[((u32)param_2) * 0x10];\n s32 a2addr = (s32)&D_80185DE8[((u32)param_2) * 0x10 + 8];\n func_8012F214(param_1, a1addr, (s32)&buf[0]);\n func_8012F214(param_1, a2addr, (s32)&buf[8]);\n }\n {\n s16 *p794 = &D_8019BA1C;\n s16 *p78C = &D_8019BA14;\n *(Blk8_8017B614 *)p794 = *(Blk8_8017B614 *)&buf[0];\n *(Blk8_8017B614 *)p78C = *(Blk8_8017B614 *)&buf[8];\n func_8012A018((s32)func_8017BE60, 0);\n {\n s32 v794, v796, v798, v78C, v78E, v790;\n D_8012694C = 0;\n v794 = *p794;\n v796 = D_8019BA1E;\n v798 = D_8019BA20;\n v78C = *p78C;\n v78E = D_8019BA16;\n v790 = D_8019BA18;\n __asm__ __volatile__(\"\"); // !FAKE: barrier \u2014 NEEDED DIFFERS (P36 rung B tus9)\n D_8019BCC8 = 1;\n D_8019B9A4 = 0x1E;\n D_80126990 = v794;\n D_80126994 = v796;\n D_80126998 = v798;\n D_80126984 = v78C;\n D_80126988 = v78E;\n D_8012698C = v790;\n }\n func_80129CF8();\n }\n}\n", "after_text": "s32 func_8017B614(s32 param_1, s32 param_2)\n{\n extern s32 D_80126990;\n extern s32 D_80126994;\n extern s16 D_8019B9A4;\n extern s16 D_8019BCC8;\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern void func_80129CF8(void);\n extern s32 func_8017BE60(void *a0);\n extern u8 D_80185DE8[];\n extern s16 D_8019BA1C;\n extern s16 D_8019BA1E;\n extern s16 D_8019BA20;\n extern s16 D_8019BA14;\n extern s16 D_8019BA16;\n extern s16 D_8019BA18;\n extern u8 D_8012694C[];\n extern s32 D_80126998;\n extern s32 D_80126984;\n extern s32 D_80126988;\n extern s32 D_8012698C;\n\n u8 buf[16];\n u8 *src;\n\n if (((u32)param_2) >= 0xB) {\n src = (u8 *)((u32)param_2);\n *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;\n *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);\n } else {\n s32 a2addr;\n\n src = &D_80185DE8[((u32)param_2) * 0x10];\n a2addr = (s32)&D_80185DE8[((u32)param_2) * 0x10 + 8];\n func_8012F214(param_1, (s32)src, (s32)&buf[0]);\n func_8012F214(param_1, a2addr, (s32)&buf[8]);\n }\n *(Blk8_8017B614 *)&D_8019BA1C = *(Blk8_8017B614 *)&buf[0];\n *(Blk8_8017B614 *)&D_8019BA14 = *(Blk8_8017B614 *)&buf[8];\n func_8012A018((s32)func_8017BE60, 0);\n D_8012694C[0] = 0;\n D_8019BCC8 = 1;\n D_8019B9A4 = 0x1E;\n D_80126990 = ((SV4_8017B368 *)&D_8019BA1C)->a;\n D_80126994 = D_8019BA1E;\n D_80126998 = D_8019BA20;\n D_80126984 = ((SV4_8017B368 *)&D_8019BA14)->a;\n D_80126988 = D_8019BA16;\n D_8012698C = D_8019BA18;\n func_80129CF8();\n}\n"} +{"ts": "2026-09-10 21:22:40", "label": "s104_d6", "rung": "E", "calib": {"head": "8030518bc", "stamp": "15956e4a96c4"}, "tu": "src/ov_MAIN_012/ov_MAIN_012_jr_801789AC.c", "fn": "func_8017B614", "addr": 2149037588, "aliases": null, "header": false, "includers": 0, "nhash_before": "b88960c183ef2998edcde2df50c9df350441c07b", "nhash_after": "f300e1ba88cd17117db287e15306fb81e90de536", "source": "propagate:src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:func_8017B614", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.187, "objects": ["build/src/ov_MAIN_012/ov_MAIN_012_jr_801789AC.o"], "before_text": "s32 func_8017B614(s32 param_1, s32 param_2)\n{\n\n extern s32 D_80126990;\n extern s32 D_80126994;\n extern s16 D_8018534C;\n extern s16 D_80185C08;\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern void func_80129CF8(void);\n extern s32 func_8017BE60(void *a0);\n extern u8 D_80181CC0[];\n extern s16 D_801853C4;\n extern s16 D_801853C6;\n extern s16 D_801853C8;\n extern s16 D_801853BC;\n extern s16 D_801853BE;\n extern s16 D_801853C0;\n extern u8 D_8012694C;\n extern s32 D_80126998;\n extern s32 D_80126984;\n extern s32 D_80126988;\n extern s32 D_8012698C;\n\n u8 buf[16];\n\n if (((u32)param_2) >= 0xB) {\n register u8 *src __asm__(\"$16\"); // !FAKE: pin $16 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n __asm__ __volatile__(\"\" : \"=r\"(src) : \"0\"((u8 *)((u32)param_2))); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;\n *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);\n } else {\n s32 a1addr = (s32)&D_80181CC0[((u32)param_2) * 0x10];\n s32 a2addr = (s32)&D_80181CC0[((u32)param_2) * 0x10 + 8];\n func_8012F214(param_1, a1addr, (s32)&buf[0]);\n func_8012F214(param_1, a2addr, (s32)&buf[8]);\n }\n {\n s16 *p794 = &D_801853C4;\n s16 *p78C = &D_801853BC;\n *(Blk8_8017B614 *)p794 = *(Blk8_8017B614 *)&buf[0];\n *(Blk8_8017B614 *)p78C = *(Blk8_8017B614 *)&buf[8];\n func_8012A018((s32)func_8017BE60, 0);\n {\n s32 v794, v796, v798, v78C, v78E, v790;\n D_8012694C = 0;\n v794 = *p794;\n v796 = D_801853C6;\n v798 = D_801853C8;\n v78C = *p78C;\n v78E = D_801853BE;\n v790 = D_801853C0;\n __asm__ __volatile__(\"\"); // !FAKE: barrier \u2014 NEEDED DIFFERS (P36 rung B tus9)\n D_80185C08 = 1;\n D_8018534C = 0x1E;\n D_80126990 = v794;\n D_80126994 = v796;\n D_80126998 = v798;\n D_80126984 = v78C;\n D_80126988 = v78E;\n D_8012698C = v790;\n }\n func_80129CF8();\n }\n}\n", "after_text": "s32 func_8017B614(s32 param_1, s32 param_2)\n{\n extern s32 D_80126990;\n extern s32 D_80126994;\n extern s16 D_8018534C;\n extern s16 D_80185C08;\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern void func_80129CF8(void);\n extern s32 func_8017BE60(void *a0);\n extern u8 D_80181CC0[];\n extern s16 D_801853C4;\n extern s16 D_801853C6;\n extern s16 D_801853C8;\n extern s16 D_801853BC;\n extern s16 D_801853BE;\n extern s16 D_801853C0;\n extern u8 D_8012694C[];\n extern s32 D_80126998;\n extern s32 D_80126984;\n extern s32 D_80126988;\n extern s32 D_8012698C;\n\n u8 buf[16];\n u8 *src;\n\n if (((u32)param_2) >= 0xB) {\n src = (u8 *)((u32)param_2);\n *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;\n *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);\n } else {\n s32 a2addr;\n\n src = &D_80181CC0[((u32)param_2) * 0x10];\n a2addr = (s32)&D_80181CC0[((u32)param_2) * 0x10 + 8];\n func_8012F214(param_1, (s32)src, (s32)&buf[0]);\n func_8012F214(param_1, a2addr, (s32)&buf[8]);\n }\n *(Blk8_8017B614 *)&D_801853C4 = *(Blk8_8017B614 *)&buf[0];\n *(Blk8_8017B614 *)&D_801853BC = *(Blk8_8017B614 *)&buf[8];\n func_8012A018((s32)func_8017BE60, 0);\n D_8012694C[0] = 0;\n D_80185C08 = 1;\n D_8018534C = 0x1E;\n D_80126990 = ((SV4_8017B368 *)&D_801853C4)->a;\n D_80126994 = D_801853C6;\n D_80126998 = D_801853C8;\n D_80126984 = ((SV4_8017B368 *)&D_801853BC)->a;\n D_80126988 = D_801853BE;\n D_8012698C = D_801853C0;\n func_80129CF8();\n}\n"} +{"ts": "2026-09-10 21:22:41", "label": "s104_d6", "rung": "E", "calib": {"head": "8030518bc", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC07_011/ov_SC07_011_jr_8017AE2C.c", "fn": "func_8017B614", "addr": 2149037588, "aliases": null, "header": false, "includers": 0, "nhash_before": "b88960c183ef2998edcde2df50c9df350441c07b", "nhash_after": "f300e1ba88cd17117db287e15306fb81e90de536", "source": "propagate:src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:func_8017B614", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.097, "objects": ["build/src/ov_SC07_011/ov_SC07_011_jr_8017AE2C.o"], "before_text": "s32 func_8017B614(s32 param_1, s32 param_2)\n{\n\n extern s32 D_80126990;\n extern s32 D_80126994;\n extern s16 D_801902EC;\n extern s16 D_80190488;\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern void func_80129CF8(void);\n extern s32 func_8017BE60(void *a0);\n extern u8 D_80181FC0[];\n extern s16 D_80190364;\n extern s16 D_80190366;\n extern s16 D_80190368;\n extern s16 D_8019035C;\n extern s16 D_8019035E;\n extern s16 D_80190360;\n extern u8 D_8012694C;\n extern s32 D_80126998;\n extern s32 D_80126984;\n extern s32 D_80126988;\n extern s32 D_8012698C;\n\n u8 buf[16];\n\n if (((u32)param_2) >= 0xB) {\n register u8 *src __asm__(\"$16\"); // !FAKE: pin $16 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n __asm__ __volatile__(\"\" : \"=r\"(src) : \"0\"((u8 *)((u32)param_2))); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;\n *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);\n } else {\n s32 a1addr = (s32)&D_80181FC0[((u32)param_2) * 0x10];\n s32 a2addr = (s32)&D_80181FC0[((u32)param_2) * 0x10 + 8];\n func_8012F214(param_1, a1addr, (s32)&buf[0]);\n func_8012F214(param_1, a2addr, (s32)&buf[8]);\n }\n {\n s16 *p794 = &D_80190364;\n s16 *p78C = &D_8019035C;\n *(Blk8_8017B614 *)p794 = *(Blk8_8017B614 *)&buf[0];\n *(Blk8_8017B614 *)p78C = *(Blk8_8017B614 *)&buf[8];\n func_8012A018((s32)func_8017BE60, 0);\n {\n s32 v794, v796, v798, v78C, v78E, v790;\n D_8012694C = 0;\n v794 = *p794;\n v796 = D_80190366;\n v798 = D_80190368;\n v78C = *p78C;\n v78E = D_8019035E;\n v790 = D_80190360;\n __asm__ __volatile__(\"\"); // !FAKE: barrier \u2014 NEEDED DIFFERS (P36 rung B tus9)\n D_80190488 = 1;\n D_801902EC = 0x1E;\n D_80126990 = v794;\n D_80126994 = v796;\n D_80126998 = v798;\n D_80126984 = v78C;\n D_80126988 = v78E;\n D_8012698C = v790;\n }\n func_80129CF8();\n }\n}\n", "after_text": "s32 func_8017B614(s32 param_1, s32 param_2)\n{\n extern s32 D_80126990;\n extern s32 D_80126994;\n extern s16 D_801902EC;\n extern s16 D_80190488;\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern void func_80129CF8(void);\n extern s32 func_8017BE60(void *a0);\n extern u8 D_80181FC0[];\n extern s16 D_80190364;\n extern s16 D_80190366;\n extern s16 D_80190368;\n extern s16 D_8019035C;\n extern s16 D_8019035E;\n extern s16 D_80190360;\n extern u8 D_8012694C[];\n extern s32 D_80126998;\n extern s32 D_80126984;\n extern s32 D_80126988;\n extern s32 D_8012698C;\n\n u8 buf[16];\n u8 *src;\n\n if (((u32)param_2) >= 0xB) {\n src = (u8 *)((u32)param_2);\n *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;\n *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);\n } else {\n s32 a2addr;\n\n src = &D_80181FC0[((u32)param_2) * 0x10];\n a2addr = (s32)&D_80181FC0[((u32)param_2) * 0x10 + 8];\n func_8012F214(param_1, (s32)src, (s32)&buf[0]);\n func_8012F214(param_1, a2addr, (s32)&buf[8]);\n }\n *(Blk8_8017B614 *)&D_80190364 = *(Blk8_8017B614 *)&buf[0];\n *(Blk8_8017B614 *)&D_8019035C = *(Blk8_8017B614 *)&buf[8];\n func_8012A018((s32)func_8017BE60, 0);\n D_8012694C[0] = 0;\n D_80190488 = 1;\n D_801902EC = 0x1E;\n D_80126990 = ((SV4_8017B368 *)&D_80190364)->a;\n D_80126994 = D_80190366;\n D_80126998 = D_80190368;\n D_80126984 = ((SV4_8017B368 *)&D_8019035C)->a;\n D_80126988 = D_8019035E;\n D_8012698C = D_80190360;\n func_80129CF8();\n}\n"} +{"ts": "2026-09-10 21:22:42", "label": "s104_d6", "rung": "E", "calib": {"head": "8030518bc", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c", "fn": "func_8017B614", "addr": 2149037588, "aliases": null, "header": false, "includers": 0, "nhash_before": "608d12388b66b61aecd843f587d51ec86594d07b", "nhash_after": "f300e1ba88cd17117db287e15306fb81e90de536", "source": "propagate:src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:func_8017B614", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.247, "objects": ["build/src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.o"], "before_text": "s32 func_8017B614(s32 param_1, s32 param_2)\n{\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern void func_80129CF8(void);\n extern s32 func_8017BE60(void *a0);\n extern u8 D_8018A45C[];\n extern s16 D_801DA794;\n extern s16 D_801DA796;\n extern s16 D_801DA798;\n extern s16 D_801DA78C;\n extern s16 D_801DA78E;\n extern s16 D_801DA790;\n extern u8 D_8012694C;\n extern s32 D_80126998;\n extern s32 D_80126984;\n extern s32 D_80126988;\n extern s32 D_8012698C;\n\n u8 buf[16];\n\n if (((u32)param_2) >= 0xB) {\n register u8 *src __asm__(\"$16\"); // !FAKE: pin $16 \u2014 NEEDED DIFFERS (P36 rung B tus7)\n __asm__ __volatile__(\"\" : \"=r\"(src) : \"0\"((u8 *)((u32)param_2))); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus7)\n *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;\n *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);\n } else {\n s32 a1addr = (s32)&D_8018A45C[((u32)param_2) * 0x10];\n s32 a2addr = (s32)&D_8018A45C[((u32)param_2) * 0x10 + 8];\n func_8012F214(param_1, a1addr, (s32)&buf[0]);\n func_8012F214(param_1, a2addr, (s32)&buf[8]);\n }\n {\n s16 *p794 = &D_801DA794;\n s16 *p78C = &D_801DA78C;\n *(Blk8_8017B614 *)p794 = *(Blk8_8017B614 *)&buf[0];\n *(Blk8_8017B614 *)p78C = *(Blk8_8017B614 *)&buf[8];\n func_8012A018((s32)func_8017BE60, 0);\n {\n s32 v794, v796, v798, v78C, v78E, v790;\n D_8012694C = 0;\n v794 = *p794;\n v796 = D_801DA796;\n v798 = D_801DA798;\n v78C = *p78C;\n v78E = D_801DA78E;\n v790 = D_801DA790;\n __asm__ __volatile__(\"\"); // !FAKE: barrier \u2014 NEEDED DIFFERS (P36 rung B tus7)\n D_801DAAB8 = 1;\n D_801DA71C = 0x1E;\n D_80126990 = v794;\n D_80126994 = v796;\n D_80126998 = v798;\n D_80126984 = v78C;\n D_80126988 = v78E;\n D_8012698C = v790;\n }\n func_80129CF8();\n }\n}\n", "after_text": "s32 func_8017B614(s32 param_1, s32 param_2)\n{\n extern s32 D_80126990;\n extern s32 D_80126994;\n extern s16 D_801DA71C;\n extern s16 D_801DAAB8;\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern void func_80129CF8(void);\n extern s32 func_8017BE60(void *a0);\n extern u8 D_8018A45C[];\n extern s16 D_801DA794;\n extern s16 D_801DA796;\n extern s16 D_801DA798;\n extern s16 D_801DA78C;\n extern s16 D_801DA78E;\n extern s16 D_801DA790;\n extern u8 D_8012694C[];\n extern s32 D_80126998;\n extern s32 D_80126984;\n extern s32 D_80126988;\n extern s32 D_8012698C;\n\n u8 buf[16];\n u8 *src;\n\n if (((u32)param_2) >= 0xB) {\n src = (u8 *)((u32)param_2);\n *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;\n *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);\n } else {\n s32 a2addr;\n\n src = &D_8018A45C[((u32)param_2) * 0x10];\n a2addr = (s32)&D_8018A45C[((u32)param_2) * 0x10 + 8];\n func_8012F214(param_1, (s32)src, (s32)&buf[0]);\n func_8012F214(param_1, a2addr, (s32)&buf[8]);\n }\n *(Blk8_8017B614 *)&D_801DA794 = *(Blk8_8017B614 *)&buf[0];\n *(Blk8_8017B614 *)&D_801DA78C = *(Blk8_8017B614 *)&buf[8];\n func_8012A018((s32)func_8017BE60, 0);\n D_8012694C[0] = 0;\n D_801DAAB8 = 1;\n D_801DA71C = 0x1E;\n D_80126990 = ((SV4_8017B368 *)&D_801DA794)->a;\n D_80126994 = D_801DA796;\n D_80126998 = D_801DA798;\n D_80126984 = ((SV4_8017B368 *)&D_801DA78C)->a;\n D_80126988 = D_801DA78E;\n D_8012698C = D_801DA790;\n func_80129CF8();\n}\n"} +{"ts": "2026-09-10 21:22:42", "label": "s104_d6", "rung": "E", "calib": {"head": "8030518bc", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC07_006/ov_SC07_006_jr_8017AE2C.c", "fn": "func_8017B614", "addr": 2149037588, "aliases": null, "header": false, "includers": 0, "nhash_before": "8e49c9e454cfad4ff7675aa82eda06f1db057406", "nhash_after": "f300e1ba88cd17117db287e15306fb81e90de536", "source": "propagate:src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:func_8017B614", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.097, "objects": ["build/src/ov_SC07_006/ov_SC07_006_jr_8017AE2C.o"], "before_text": "s32 func_8017B614(s32 param_1, s32 param_2)\n{\n\n extern s32 D_80126990;\n extern s32 D_80126994;\n extern s16 D_801F5FF4;\n extern s16 D_801F62F8;\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern void func_80129CF8(void);\n extern void func_8017BE60(void*);\n extern u8 D_8018DD4C[];\n extern s16 D_801F606C;\n extern s16 D_801F606E;\n extern s16 D_801F6070;\n extern s16 D_801F6064;\n extern s16 D_801F6066;\n extern s16 D_801F6068;\n extern u8 D_8012694C;\n extern s32 D_80126998;\n extern s32 D_80126984;\n extern s32 D_80126988;\n extern s32 D_8012698C;\n\n u8 buf[16];\n\n if (((u32)param_2) >= 0xB) {\n register u8 *src __asm__(\"$16\"); // !FAKE: pin $16 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n __asm__ __volatile__(\"\" : \"=r\"(src) : \"0\"((u8 *)((u32)param_2))); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus8)\n *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;\n *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);\n } else {\n s32 a1addr = (s32)&D_8018DD4C[((u32)param_2) * 0x10];\n s32 a2addr = (s32)&D_8018DD4C[((u32)param_2) * 0x10 + 8];\n func_8012F214(param_1, a1addr, (s32)&buf[0]);\n func_8012F214(param_1, a2addr, (s32)&buf[8]);\n }\n {\n s16 *p794 = &D_801F606C;\n s16 *p78C = &D_801F6064;\n *(Blk8_8017B614 *)p794 = *(Blk8_8017B614 *)&buf[0];\n *(Blk8_8017B614 *)p78C = *(Blk8_8017B614 *)&buf[8];\n func_8012A018((s32)func_8017BE60, 0);\n {\n s32 v794, v796, v798, v78C, v78E, v790;\n D_8012694C = 0;\n v794 = *p794;\n v796 = D_801F606E;\n v798 = D_801F6070;\n v78C = *p78C;\n v78E = D_801F6066;\n v790 = D_801F6068;\n __asm__ __volatile__(\"\"); // !FAKE: barrier \u2014 NEEDED DIFFERS (P36 rung B tus8)\n D_801F62F8 = 1;\n D_801F5FF4 = 0x1E;\n D_80126990 = v794;\n D_80126994 = v796;\n D_80126998 = v798;\n D_80126984 = v78C;\n D_80126988 = v78E;\n D_8012698C = v790;\n }\n func_80129CF8();\n }\n}\n", "after_text": "s32 func_8017B614(s32 param_1, s32 param_2)\n{\n extern s32 D_80126990;\n extern s32 D_80126994;\n extern s16 D_801F5FF4;\n extern s16 D_801F62F8;\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern void func_80129CF8(void);\n extern s32 func_8017BE60(void *a0);\n extern u8 D_8018DD4C[];\n extern s16 D_801F606C;\n extern s16 D_801F606E;\n extern s16 D_801F6070;\n extern s16 D_801F6064;\n extern s16 D_801F6066;\n extern s16 D_801F6068;\n extern u8 D_8012694C[];\n extern s32 D_80126998;\n extern s32 D_80126984;\n extern s32 D_80126988;\n extern s32 D_8012698C;\n\n u8 buf[16];\n u8 *src;\n\n if (((u32)param_2) >= 0xB) {\n src = (u8 *)((u32)param_2);\n *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;\n *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);\n } else {\n s32 a2addr;\n\n src = &D_8018DD4C[((u32)param_2) * 0x10];\n a2addr = (s32)&D_8018DD4C[((u32)param_2) * 0x10 + 8];\n func_8012F214(param_1, (s32)src, (s32)&buf[0]);\n func_8012F214(param_1, a2addr, (s32)&buf[8]);\n }\n *(Blk8_8017B614 *)&D_801F606C = *(Blk8_8017B614 *)&buf[0];\n *(Blk8_8017B614 *)&D_801F6064 = *(Blk8_8017B614 *)&buf[8];\n func_8012A018((s32)func_8017BE60, 0);\n D_8012694C[0] = 0;\n D_801F62F8 = 1;\n D_801F5FF4 = 0x1E;\n D_80126990 = ((SV4_8017B368 *)&D_801F606C)->a;\n D_80126994 = D_801F606E;\n D_80126998 = D_801F6070;\n D_80126984 = ((SV4_8017B368 *)&D_801F6064)->a;\n D_80126988 = D_801F6066;\n D_8012698C = D_801F6068;\n func_80129CF8();\n}\n"} +{"ts": "2026-09-10 21:22:43", "label": "s104_d6", "rung": "E", "calib": {"head": "8030518bc", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC07_007/ov_SC07_007_jr_8017AE2C.c", "fn": "func_8017B614", "addr": 2149037588, "aliases": null, "header": false, "includers": 0, "nhash_before": "8e49c9e454cfad4ff7675aa82eda06f1db057406", "nhash_after": "f300e1ba88cd17117db287e15306fb81e90de536", "source": "propagate:src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c:func_8017B614", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.099, "objects": ["build/src/ov_SC07_007/ov_SC07_007_jr_8017AE2C.o"], "before_text": "s32 func_8017B614(s32 param_1, s32 param_2)\n{\n\n extern s32 D_80126990;\n extern s32 D_80126994;\n extern s16 D_801C775C;\n extern s16 D_801C7AC0;\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern void func_80129CF8(void);\n extern void func_8017BE60(void*);\n extern u8 D_80186870[];\n extern s16 D_801C77D4;\n extern s16 D_801C77D6;\n extern s16 D_801C77D8;\n extern s16 D_801C77CC;\n extern s16 D_801C77CE;\n extern s16 D_801C77D0;\n extern u8 D_8012694C;\n extern s32 D_80126998;\n extern s32 D_80126984;\n extern s32 D_80126988;\n extern s32 D_8012698C;\n\n u8 buf[16];\n\n if (((u32)param_2) >= 0xB) {\n register u8 *src __asm__(\"$16\"); // !FAKE: pin $16 \u2014 NEEDED DIFFERS (P36 rung B tus8)\n __asm__ __volatile__(\"\" : \"=r\"(src) : \"0\"((u8 *)((u32)param_2))); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus8)\n *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;\n *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);\n } else {\n s32 a1addr = (s32)&D_80186870[((u32)param_2) * 0x10];\n s32 a2addr = (s32)&D_80186870[((u32)param_2) * 0x10 + 8];\n func_8012F214(param_1, a1addr, (s32)&buf[0]);\n func_8012F214(param_1, a2addr, (s32)&buf[8]);\n }\n {\n s16 *p794 = &D_801C77D4;\n s16 *p78C = &D_801C77CC;\n *(Blk8_8017B614 *)p794 = *(Blk8_8017B614 *)&buf[0];\n *(Blk8_8017B614 *)p78C = *(Blk8_8017B614 *)&buf[8];\n func_8012A018((s32)func_8017BE60, 0);\n {\n s32 v794, v796, v798, v78C, v78E, v790;\n D_8012694C = 0;\n v794 = *p794;\n v796 = D_801C77D6;\n v798 = D_801C77D8;\n v78C = *p78C;\n v78E = D_801C77CE;\n v790 = D_801C77D0;\n __asm__ __volatile__(\"\"); // !FAKE: barrier \u2014 NEEDED DIFFERS (P36 rung B tus8)\n D_801C7AC0 = 1;\n D_801C775C = 0x1E;\n D_80126990 = v794;\n D_80126994 = v796;\n D_80126998 = v798;\n D_80126984 = v78C;\n D_80126988 = v78E;\n D_8012698C = v790;\n }\n func_80129CF8();\n }\n}\n", "after_text": "s32 func_8017B614(s32 param_1, s32 param_2)\n{\n extern s32 D_80126990;\n extern s32 D_80126994;\n extern s16 D_801C775C;\n extern s16 D_801C7AC0;\n extern void func_8012F214(s32 a0, s32 a1, s32 a2);\n extern void func_80129CF8(void);\n extern s32 func_8017BE60(void *a0);\n extern u8 D_80186870[];\n extern s16 D_801C77D4;\n extern s16 D_801C77D6;\n extern s16 D_801C77D8;\n extern s16 D_801C77CC;\n extern s16 D_801C77CE;\n extern s16 D_801C77D0;\n extern u8 D_8012694C[];\n extern s32 D_80126998;\n extern s32 D_80126984;\n extern s32 D_80126988;\n extern s32 D_8012698C;\n\n u8 buf[16];\n u8 *src;\n\n if (((u32)param_2) >= 0xB) {\n src = (u8 *)((u32)param_2);\n *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src;\n *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8);\n } else {\n s32 a2addr;\n\n src = &D_80186870[((u32)param_2) * 0x10];\n a2addr = (s32)&D_80186870[((u32)param_2) * 0x10 + 8];\n func_8012F214(param_1, (s32)src, (s32)&buf[0]);\n func_8012F214(param_1, a2addr, (s32)&buf[8]);\n }\n *(Blk8_8017B614 *)&D_801C77D4 = *(Blk8_8017B614 *)&buf[0];\n *(Blk8_8017B614 *)&D_801C77CC = *(Blk8_8017B614 *)&buf[8];\n func_8012A018((s32)func_8017BE60, 0);\n D_8012694C[0] = 0;\n D_801C7AC0 = 1;\n D_801C775C = 0x1E;\n D_80126990 = ((SV4_8017B368 *)&D_801C77D4)->a;\n D_80126994 = D_801C77D6;\n D_80126998 = D_801C77D8;\n D_80126984 = ((SV4_8017B368 *)&D_801C77CC)->a;\n D_80126988 = D_801C77CE;\n D_8012698C = D_801C77D0;\n func_80129CF8();\n}\n"} diff --git a/src/ov_MAIN_012/ov_MAIN_012_jr_801789AC.c b/src/ov_MAIN_012/ov_MAIN_012_jr_801789AC.c index 5d1560b32..6051e1815 100644 --- a/src/ov_MAIN_012/ov_MAIN_012_jr_801789AC.c +++ b/src/ov_MAIN_012/ov_MAIN_012_jr_801789AC.c @@ -5283,7 +5283,6 @@ extern void func_8012A018(s32 a, s32 b); s32 func_8017B614(s32 param_1, s32 param_2) { - extern s32 D_80126990; extern s32 D_80126994; extern s16 D_8018534C; @@ -5298,52 +5297,40 @@ s32 func_8017B614(s32 param_1, s32 param_2) extern s16 D_801853BC; extern s16 D_801853BE; extern s16 D_801853C0; - extern u8 D_8012694C; + extern u8 D_8012694C[]; extern s32 D_80126998; extern s32 D_80126984; extern s32 D_80126988; extern s32 D_8012698C; u8 buf[16]; + u8 *src; if (((u32)param_2) >= 0xB) { - register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus9) - __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) + src = (u8 *)((u32)param_2); *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src; *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8); } else { - s32 a1addr = (s32)&D_80181CC0[((u32)param_2) * 0x10]; - s32 a2addr = (s32)&D_80181CC0[((u32)param_2) * 0x10 + 8]; - func_8012F214(param_1, a1addr, (s32)&buf[0]); + s32 a2addr; + + src = &D_80181CC0[((u32)param_2) * 0x10]; + a2addr = (s32)&D_80181CC0[((u32)param_2) * 0x10 + 8]; + func_8012F214(param_1, (s32)src, (s32)&buf[0]); func_8012F214(param_1, a2addr, (s32)&buf[8]); } - { - s16 *p794 = &D_801853C4; - s16 *p78C = &D_801853BC; - *(Blk8_8017B614 *)p794 = *(Blk8_8017B614 *)&buf[0]; - *(Blk8_8017B614 *)p78C = *(Blk8_8017B614 *)&buf[8]; - func_8012A018((s32)func_8017BE60, 0); - { - s32 v794, v796, v798, v78C, v78E, v790; - D_8012694C = 0; - v794 = *p794; - v796 = D_801853C6; - v798 = D_801853C8; - v78C = *p78C; - v78E = D_801853BE; - v790 = D_801853C0; - __asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus9) - D_80185C08 = 1; - D_8018534C = 0x1E; - D_80126990 = v794; - D_80126994 = v796; - D_80126998 = v798; - D_80126984 = v78C; - D_80126988 = v78E; - D_8012698C = v790; - } - func_80129CF8(); - } + *(Blk8_8017B614 *)&D_801853C4 = *(Blk8_8017B614 *)&buf[0]; + *(Blk8_8017B614 *)&D_801853BC = *(Blk8_8017B614 *)&buf[8]; + func_8012A018((s32)func_8017BE60, 0); + D_8012694C[0] = 0; + D_80185C08 = 1; + D_8018534C = 0x1E; + D_80126990 = ((SV4_8017B368 *)&D_801853C4)->a; + D_80126994 = D_801853C6; + D_80126998 = D_801853C8; + D_80126984 = ((SV4_8017B368 *)&D_801853BC)->a; + D_80126988 = D_801853BE; + D_8012698C = D_801853C0; + func_80129CF8(); } diff --git a/src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c b/src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c index a1a40f917..22cb40b9d 100644 --- a/src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c +++ b/src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c @@ -3044,6 +3044,10 @@ s32 func_8017B490(s32 param) s32 func_8017B614(s32 param_1, s32 param_2) { + extern s32 D_80126990; + extern s32 D_80126994; + extern s16 D_801DA71C; + extern s16 D_801DAAB8; extern void func_8012F214(s32 a0, s32 a1, s32 a2); extern void func_80129CF8(void); extern s32 func_8017BE60(void *a0); @@ -3054,52 +3058,40 @@ s32 func_8017B614(s32 param_1, s32 param_2) extern s16 D_801DA78C; extern s16 D_801DA78E; extern s16 D_801DA790; - extern u8 D_8012694C; + extern u8 D_8012694C[]; extern s32 D_80126998; extern s32 D_80126984; extern s32 D_80126988; extern s32 D_8012698C; u8 buf[16]; + u8 *src; if (((u32)param_2) >= 0xB) { - register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus7) - __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus7) + src = (u8 *)((u32)param_2); *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src; *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8); } else { - s32 a1addr = (s32)&D_8018A45C[((u32)param_2) * 0x10]; - s32 a2addr = (s32)&D_8018A45C[((u32)param_2) * 0x10 + 8]; - func_8012F214(param_1, a1addr, (s32)&buf[0]); + s32 a2addr; + + src = &D_8018A45C[((u32)param_2) * 0x10]; + a2addr = (s32)&D_8018A45C[((u32)param_2) * 0x10 + 8]; + func_8012F214(param_1, (s32)src, (s32)&buf[0]); func_8012F214(param_1, a2addr, (s32)&buf[8]); } - { - s16 *p794 = &D_801DA794; - s16 *p78C = &D_801DA78C; - *(Blk8_8017B614 *)p794 = *(Blk8_8017B614 *)&buf[0]; - *(Blk8_8017B614 *)p78C = *(Blk8_8017B614 *)&buf[8]; - func_8012A018((s32)func_8017BE60, 0); - { - s32 v794, v796, v798, v78C, v78E, v790; - D_8012694C = 0; - v794 = *p794; - v796 = D_801DA796; - v798 = D_801DA798; - v78C = *p78C; - v78E = D_801DA78E; - v790 = D_801DA790; - __asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7) - D_801DAAB8 = 1; - D_801DA71C = 0x1E; - D_80126990 = v794; - D_80126994 = v796; - D_80126998 = v798; - D_80126984 = v78C; - D_80126988 = v78E; - D_8012698C = v790; - } - func_80129CF8(); - } + *(Blk8_8017B614 *)&D_801DA794 = *(Blk8_8017B614 *)&buf[0]; + *(Blk8_8017B614 *)&D_801DA78C = *(Blk8_8017B614 *)&buf[8]; + func_8012A018((s32)func_8017BE60, 0); + D_8012694C[0] = 0; + D_801DAAB8 = 1; + D_801DA71C = 0x1E; + D_80126990 = ((SV4_8017B368 *)&D_801DA794)->a; + D_80126994 = D_801DA796; + D_80126998 = D_801DA798; + D_80126984 = ((SV4_8017B368 *)&D_801DA78C)->a; + D_80126988 = D_801DA78E; + D_8012698C = D_801DA790; + func_80129CF8(); } diff --git a/src/ov_SC02_037/ov_SC02_037_jr_8017AE2C.c b/src/ov_SC02_037/ov_SC02_037_jr_8017AE2C.c index e126994b1..d1e3f0e2f 100644 --- a/src/ov_SC02_037/ov_SC02_037_jr_8017AE2C.c +++ b/src/ov_SC02_037/ov_SC02_037_jr_8017AE2C.c @@ -3980,7 +3980,6 @@ extern void func_8012A018(s32 a, s32 b); s32 func_8017B614(s32 param_1, s32 param_2) { - extern s32 D_80126990; extern s32 D_80126994; extern s16 D_801C9644; @@ -3995,52 +3994,40 @@ s32 func_8017B614(s32 param_1, s32 param_2) extern s16 D_801C96B4; extern s16 D_801C96B6; extern s16 D_801C96B8; - extern u8 D_8012694C; + extern u8 D_8012694C[]; extern s32 D_80126998; extern s32 D_80126984; extern s32 D_80126988; extern s32 D_8012698C; u8 buf[16]; + u8 *src; if (((u32)param_2) >= 0xB) { - register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus9) - __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) + src = (u8 *)((u32)param_2); *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src; *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8); } else { - s32 a1addr = (s32)&D_8018754C[((u32)param_2) * 0x10]; - s32 a2addr = (s32)&D_8018754C[((u32)param_2) * 0x10 + 8]; - func_8012F214(param_1, a1addr, (s32)&buf[0]); + s32 a2addr; + + src = &D_8018754C[((u32)param_2) * 0x10]; + a2addr = (s32)&D_8018754C[((u32)param_2) * 0x10 + 8]; + func_8012F214(param_1, (s32)src, (s32)&buf[0]); func_8012F214(param_1, a2addr, (s32)&buf[8]); } - { - s16 *p794 = &D_801C96BC; - s16 *p78C = &D_801C96B4; - *(Blk8_8017B614 *)p794 = *(Blk8_8017B614 *)&buf[0]; - *(Blk8_8017B614 *)p78C = *(Blk8_8017B614 *)&buf[8]; - func_8012A018((s32)func_8017BE60, 0); - { - s32 v794, v796, v798, v78C, v78E, v790; - D_8012694C = 0; - v794 = *p794; - v796 = D_801C96BE; - v798 = D_801C96C0; - v78C = *p78C; - v78E = D_801C96B6; - v790 = D_801C96B8; - __asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus9) - D_801C9A70 = 1; - D_801C9644 = 0x1E; - D_80126990 = v794; - D_80126994 = v796; - D_80126998 = v798; - D_80126984 = v78C; - D_80126988 = v78E; - D_8012698C = v790; - } - func_80129CF8(); - } + *(Blk8_8017B614 *)&D_801C96BC = *(Blk8_8017B614 *)&buf[0]; + *(Blk8_8017B614 *)&D_801C96B4 = *(Blk8_8017B614 *)&buf[8]; + func_8012A018((s32)func_8017BE60, 0); + D_8012694C[0] = 0; + D_801C9A70 = 1; + D_801C9644 = 0x1E; + D_80126990 = ((SV4_8017B368 *)&D_801C96BC)->a; + D_80126994 = D_801C96BE; + D_80126998 = D_801C96C0; + D_80126984 = ((SV4_8017B368 *)&D_801C96B4)->a; + D_80126988 = D_801C96B6; + D_8012698C = D_801C96B8; + func_80129CF8(); } diff --git a/src/ov_SC03_107/ov_SC03_107_jr_801789AC.c b/src/ov_SC03_107/ov_SC03_107_jr_801789AC.c index 1afe1ff4c..fe58fbe30 100644 --- a/src/ov_SC03_107/ov_SC03_107_jr_801789AC.c +++ b/src/ov_SC03_107/ov_SC03_107_jr_801789AC.c @@ -5284,7 +5284,6 @@ extern void func_8012A018(s32 a, s32 b); s32 func_8017B614(s32 param_1, s32 param_2) { - extern s32 D_80126990; extern s32 D_80126994; extern s16 D_8019B9A4; @@ -5299,52 +5298,40 @@ s32 func_8017B614(s32 param_1, s32 param_2) extern s16 D_8019BA14; extern s16 D_8019BA16; extern s16 D_8019BA18; - extern u8 D_8012694C; + extern u8 D_8012694C[]; extern s32 D_80126998; extern s32 D_80126984; extern s32 D_80126988; extern s32 D_8012698C; u8 buf[16]; + u8 *src; if (((u32)param_2) >= 0xB) { - register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus9) - __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) + src = (u8 *)((u32)param_2); *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src; *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8); } else { - s32 a1addr = (s32)&D_80185DE8[((u32)param_2) * 0x10]; - s32 a2addr = (s32)&D_80185DE8[((u32)param_2) * 0x10 + 8]; - func_8012F214(param_1, a1addr, (s32)&buf[0]); + s32 a2addr; + + src = &D_80185DE8[((u32)param_2) * 0x10]; + a2addr = (s32)&D_80185DE8[((u32)param_2) * 0x10 + 8]; + func_8012F214(param_1, (s32)src, (s32)&buf[0]); func_8012F214(param_1, a2addr, (s32)&buf[8]); } - { - s16 *p794 = &D_8019BA1C; - s16 *p78C = &D_8019BA14; - *(Blk8_8017B614 *)p794 = *(Blk8_8017B614 *)&buf[0]; - *(Blk8_8017B614 *)p78C = *(Blk8_8017B614 *)&buf[8]; - func_8012A018((s32)func_8017BE60, 0); - { - s32 v794, v796, v798, v78C, v78E, v790; - D_8012694C = 0; - v794 = *p794; - v796 = D_8019BA1E; - v798 = D_8019BA20; - v78C = *p78C; - v78E = D_8019BA16; - v790 = D_8019BA18; - __asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus9) - D_8019BCC8 = 1; - D_8019B9A4 = 0x1E; - D_80126990 = v794; - D_80126994 = v796; - D_80126998 = v798; - D_80126984 = v78C; - D_80126988 = v78E; - D_8012698C = v790; - } - func_80129CF8(); - } + *(Blk8_8017B614 *)&D_8019BA1C = *(Blk8_8017B614 *)&buf[0]; + *(Blk8_8017B614 *)&D_8019BA14 = *(Blk8_8017B614 *)&buf[8]; + func_8012A018((s32)func_8017BE60, 0); + D_8012694C[0] = 0; + D_8019BCC8 = 1; + D_8019B9A4 = 0x1E; + D_80126990 = ((SV4_8017B368 *)&D_8019BA1C)->a; + D_80126994 = D_8019BA1E; + D_80126998 = D_8019BA20; + D_80126984 = ((SV4_8017B368 *)&D_8019BA14)->a; + D_80126988 = D_8019BA16; + D_8012698C = D_8019BA18; + func_80129CF8(); } diff --git a/src/ov_SC07_006/ov_SC07_006_jr_8017AE2C.c b/src/ov_SC07_006/ov_SC07_006_jr_8017AE2C.c index 26a456ed3..9062c0479 100644 --- a/src/ov_SC07_006/ov_SC07_006_jr_8017AE2C.c +++ b/src/ov_SC07_006/ov_SC07_006_jr_8017AE2C.c @@ -3539,14 +3539,13 @@ extern void func_8012A018(s32 a, s32 b); s32 func_8017B614(s32 param_1, s32 param_2) { - extern s32 D_80126990; extern s32 D_80126994; extern s16 D_801F5FF4; extern s16 D_801F62F8; extern void func_8012F214(s32 a0, s32 a1, s32 a2); extern void func_80129CF8(void); - extern void func_8017BE60(void*); + extern s32 func_8017BE60(void *a0); extern u8 D_8018DD4C[]; extern s16 D_801F606C; extern s16 D_801F606E; @@ -3554,52 +3553,40 @@ s32 func_8017B614(s32 param_1, s32 param_2) extern s16 D_801F6064; extern s16 D_801F6066; extern s16 D_801F6068; - extern u8 D_8012694C; + extern u8 D_8012694C[]; extern s32 D_80126998; extern s32 D_80126984; extern s32 D_80126988; extern s32 D_8012698C; u8 buf[16]; + u8 *src; if (((u32)param_2) >= 0xB) { - register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus8) - __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus8) + src = (u8 *)((u32)param_2); *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src; *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8); } else { - s32 a1addr = (s32)&D_8018DD4C[((u32)param_2) * 0x10]; - s32 a2addr = (s32)&D_8018DD4C[((u32)param_2) * 0x10 + 8]; - func_8012F214(param_1, a1addr, (s32)&buf[0]); + s32 a2addr; + + src = &D_8018DD4C[((u32)param_2) * 0x10]; + a2addr = (s32)&D_8018DD4C[((u32)param_2) * 0x10 + 8]; + func_8012F214(param_1, (s32)src, (s32)&buf[0]); func_8012F214(param_1, a2addr, (s32)&buf[8]); } - { - s16 *p794 = &D_801F606C; - s16 *p78C = &D_801F6064; - *(Blk8_8017B614 *)p794 = *(Blk8_8017B614 *)&buf[0]; - *(Blk8_8017B614 *)p78C = *(Blk8_8017B614 *)&buf[8]; - func_8012A018((s32)func_8017BE60, 0); - { - s32 v794, v796, v798, v78C, v78E, v790; - D_8012694C = 0; - v794 = *p794; - v796 = D_801F606E; - v798 = D_801F6070; - v78C = *p78C; - v78E = D_801F6066; - v790 = D_801F6068; - __asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus8) - D_801F62F8 = 1; - D_801F5FF4 = 0x1E; - D_80126990 = v794; - D_80126994 = v796; - D_80126998 = v798; - D_80126984 = v78C; - D_80126988 = v78E; - D_8012698C = v790; - } - func_80129CF8(); - } + *(Blk8_8017B614 *)&D_801F606C = *(Blk8_8017B614 *)&buf[0]; + *(Blk8_8017B614 *)&D_801F6064 = *(Blk8_8017B614 *)&buf[8]; + func_8012A018((s32)func_8017BE60, 0); + D_8012694C[0] = 0; + D_801F62F8 = 1; + D_801F5FF4 = 0x1E; + D_80126990 = ((SV4_8017B368 *)&D_801F606C)->a; + D_80126994 = D_801F606E; + D_80126998 = D_801F6070; + D_80126984 = ((SV4_8017B368 *)&D_801F6064)->a; + D_80126988 = D_801F6066; + D_8012698C = D_801F6068; + func_80129CF8(); } diff --git a/src/ov_SC07_007/ov_SC07_007_jr_8017AE2C.c b/src/ov_SC07_007/ov_SC07_007_jr_8017AE2C.c index d9af98b17..492a267ba 100644 --- a/src/ov_SC07_007/ov_SC07_007_jr_8017AE2C.c +++ b/src/ov_SC07_007/ov_SC07_007_jr_8017AE2C.c @@ -3539,14 +3539,13 @@ extern void func_8012A018(s32 a, s32 b); s32 func_8017B614(s32 param_1, s32 param_2) { - extern s32 D_80126990; extern s32 D_80126994; extern s16 D_801C775C; extern s16 D_801C7AC0; extern void func_8012F214(s32 a0, s32 a1, s32 a2); extern void func_80129CF8(void); - extern void func_8017BE60(void*); + extern s32 func_8017BE60(void *a0); extern u8 D_80186870[]; extern s16 D_801C77D4; extern s16 D_801C77D6; @@ -3554,52 +3553,40 @@ s32 func_8017B614(s32 param_1, s32 param_2) extern s16 D_801C77CC; extern s16 D_801C77CE; extern s16 D_801C77D0; - extern u8 D_8012694C; + extern u8 D_8012694C[]; extern s32 D_80126998; extern s32 D_80126984; extern s32 D_80126988; extern s32 D_8012698C; u8 buf[16]; + u8 *src; if (((u32)param_2) >= 0xB) { - register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus8) - __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus8) + src = (u8 *)((u32)param_2); *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src; *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8); } else { - s32 a1addr = (s32)&D_80186870[((u32)param_2) * 0x10]; - s32 a2addr = (s32)&D_80186870[((u32)param_2) * 0x10 + 8]; - func_8012F214(param_1, a1addr, (s32)&buf[0]); + s32 a2addr; + + src = &D_80186870[((u32)param_2) * 0x10]; + a2addr = (s32)&D_80186870[((u32)param_2) * 0x10 + 8]; + func_8012F214(param_1, (s32)src, (s32)&buf[0]); func_8012F214(param_1, a2addr, (s32)&buf[8]); } - { - s16 *p794 = &D_801C77D4; - s16 *p78C = &D_801C77CC; - *(Blk8_8017B614 *)p794 = *(Blk8_8017B614 *)&buf[0]; - *(Blk8_8017B614 *)p78C = *(Blk8_8017B614 *)&buf[8]; - func_8012A018((s32)func_8017BE60, 0); - { - s32 v794, v796, v798, v78C, v78E, v790; - D_8012694C = 0; - v794 = *p794; - v796 = D_801C77D6; - v798 = D_801C77D8; - v78C = *p78C; - v78E = D_801C77CE; - v790 = D_801C77D0; - __asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus8) - D_801C7AC0 = 1; - D_801C775C = 0x1E; - D_80126990 = v794; - D_80126994 = v796; - D_80126998 = v798; - D_80126984 = v78C; - D_80126988 = v78E; - D_8012698C = v790; - } - func_80129CF8(); - } + *(Blk8_8017B614 *)&D_801C77D4 = *(Blk8_8017B614 *)&buf[0]; + *(Blk8_8017B614 *)&D_801C77CC = *(Blk8_8017B614 *)&buf[8]; + func_8012A018((s32)func_8017BE60, 0); + D_8012694C[0] = 0; + D_801C7AC0 = 1; + D_801C775C = 0x1E; + D_80126990 = ((SV4_8017B368 *)&D_801C77D4)->a; + D_80126994 = D_801C77D6; + D_80126998 = D_801C77D8; + D_80126984 = ((SV4_8017B368 *)&D_801C77CC)->a; + D_80126988 = D_801C77CE; + D_8012698C = D_801C77D0; + func_80129CF8(); } diff --git a/src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c b/src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c index 5eea508c2..9441175d7 100644 --- a/src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c +++ b/src/ov_SC07_010/ov_SC07_010_jr_8017AE2C.c @@ -2985,7 +2985,6 @@ extern void func_8012A018(s32 a, s32 b); s32 func_8017B614(s32 param_1, s32 param_2) { - extern s32 D_80126990; extern s32 D_80126994; extern s16 D_801A7C54; @@ -3000,52 +2999,40 @@ s32 func_8017B614(s32 param_1, s32 param_2) extern s16 D_801A7CC4; extern s16 D_801A7CC6; extern s16 D_801A7CC8; - extern u8 D_8012694C; + extern u8 D_8012694C[]; extern s32 D_80126998; extern s32 D_80126984; extern s32 D_80126988; extern s32 D_8012698C; u8 buf[16]; + u8 *src; if (((u32)param_2) >= 0xB) { - register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus9) - __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) + src = (u8 *)((u32)param_2); *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src; *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8); } else { - s32 a1addr = (s32)&D_80185900[((u32)param_2) * 0x10]; - s32 a2addr = (s32)&D_80185900[((u32)param_2) * 0x10 + 8]; - func_8012F214(param_1, a1addr, (s32)&buf[0]); + s32 a2addr; + + src = &D_80185900[((u32)param_2) * 0x10]; + a2addr = (s32)&D_80185900[((u32)param_2) * 0x10 + 8]; + func_8012F214(param_1, (s32)src, (s32)&buf[0]); func_8012F214(param_1, a2addr, (s32)&buf[8]); } - { - s16 *p794 = &D_801A7CCC; - s16 *p78C = &D_801A7CC4; - *(Blk8_8017B614 *)p794 = *(Blk8_8017B614 *)&buf[0]; - *(Blk8_8017B614 *)p78C = *(Blk8_8017B614 *)&buf[8]; - func_8012A018((s32)func_8017BE60, 0); - { - s32 v794, v796, v798, v78C, v78E, v790; - D_8012694C = 0; - v794 = *p794; - v796 = D_801A7CCE; - v798 = D_801A7CD0; - v78C = *p78C; - v78E = D_801A7CC6; - v790 = D_801A7CC8; - __asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus9) - D_801A94D0 = 1; - D_801A7C54 = 0x1E; - D_80126990 = v794; - D_80126994 = v796; - D_80126998 = v798; - D_80126984 = v78C; - D_80126988 = v78E; - D_8012698C = v790; - } - func_80129CF8(); - } + *(Blk8_8017B614 *)&D_801A7CCC = *(Blk8_8017B614 *)&buf[0]; + *(Blk8_8017B614 *)&D_801A7CC4 = *(Blk8_8017B614 *)&buf[8]; + func_8012A018((s32)func_8017BE60, 0); + D_8012694C[0] = 0; + D_801A94D0 = 1; + D_801A7C54 = 0x1E; + D_80126990 = ((SV4_8017B368 *)&D_801A7CCC)->a; + D_80126994 = D_801A7CCE; + D_80126998 = D_801A7CD0; + D_80126984 = ((SV4_8017B368 *)&D_801A7CC4)->a; + D_80126988 = D_801A7CC6; + D_8012698C = D_801A7CC8; + func_80129CF8(); } diff --git a/src/ov_SC07_011/ov_SC07_011_jr_8017AE2C.c b/src/ov_SC07_011/ov_SC07_011_jr_8017AE2C.c index e7a90aa3e..651f5237b 100644 --- a/src/ov_SC07_011/ov_SC07_011_jr_8017AE2C.c +++ b/src/ov_SC07_011/ov_SC07_011_jr_8017AE2C.c @@ -3541,7 +3541,6 @@ extern void func_8012A018(s32 a, s32 b); s32 func_8017B614(s32 param_1, s32 param_2) { - extern s32 D_80126990; extern s32 D_80126994; extern s16 D_801902EC; @@ -3556,52 +3555,40 @@ s32 func_8017B614(s32 param_1, s32 param_2) extern s16 D_8019035C; extern s16 D_8019035E; extern s16 D_80190360; - extern u8 D_8012694C; + extern u8 D_8012694C[]; extern s32 D_80126998; extern s32 D_80126984; extern s32 D_80126988; extern s32 D_8012698C; u8 buf[16]; + u8 *src; if (((u32)param_2) >= 0xB) { - register u8 *src __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus9) - __asm__ __volatile__("" : "=r"(src) : "0"((u8 *)((u32)param_2))); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) + src = (u8 *)((u32)param_2); *(Blk8_8017B614 *)&buf[0] = *(Blk8_8017B614 *)src; *(Blk8_8017B614 *)&buf[8] = *(Blk8_8017B614 *)(src + 8); } else { - s32 a1addr = (s32)&D_80181FC0[((u32)param_2) * 0x10]; - s32 a2addr = (s32)&D_80181FC0[((u32)param_2) * 0x10 + 8]; - func_8012F214(param_1, a1addr, (s32)&buf[0]); + s32 a2addr; + + src = &D_80181FC0[((u32)param_2) * 0x10]; + a2addr = (s32)&D_80181FC0[((u32)param_2) * 0x10 + 8]; + func_8012F214(param_1, (s32)src, (s32)&buf[0]); func_8012F214(param_1, a2addr, (s32)&buf[8]); } - { - s16 *p794 = &D_80190364; - s16 *p78C = &D_8019035C; - *(Blk8_8017B614 *)p794 = *(Blk8_8017B614 *)&buf[0]; - *(Blk8_8017B614 *)p78C = *(Blk8_8017B614 *)&buf[8]; - func_8012A018((s32)func_8017BE60, 0); - { - s32 v794, v796, v798, v78C, v78E, v790; - D_8012694C = 0; - v794 = *p794; - v796 = D_80190366; - v798 = D_80190368; - v78C = *p78C; - v78E = D_8019035E; - v790 = D_80190360; - __asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus9) - D_80190488 = 1; - D_801902EC = 0x1E; - D_80126990 = v794; - D_80126994 = v796; - D_80126998 = v798; - D_80126984 = v78C; - D_80126988 = v78E; - D_8012698C = v790; - } - func_80129CF8(); - } + *(Blk8_8017B614 *)&D_80190364 = *(Blk8_8017B614 *)&buf[0]; + *(Blk8_8017B614 *)&D_8019035C = *(Blk8_8017B614 *)&buf[8]; + func_8012A018((s32)func_8017BE60, 0); + D_8012694C[0] = 0; + D_80190488 = 1; + D_801902EC = 0x1E; + D_80126990 = ((SV4_8017B368 *)&D_80190364)->a; + D_80126994 = D_80190366; + D_80126998 = D_80190368; + D_80126984 = ((SV4_8017B368 *)&D_8019035C)->a; + D_80126988 = D_8019035E; + D_8012698C = D_80190360; + func_80129CF8(); }