diff --git a/src/800.c b/src/800.c index 0b2f6cd25..e4070d720 100644 --- a/src/800.c +++ b/src/800.c @@ -12640,7 +12640,11 @@ INCLUDE_ASM("asm/nonmatchings/800", func_80028E00); INCLUDE_ASM("asm/nonmatchings/800", func_80028E24); -INCLUDE_ASM("asm/nonmatchings/800", func_80028E44); +extern void func_80029124(s32, s32); + +void func_80028E44(s32 a0) { + func_80029124(0xE, a0 & 0xFF); +} INCLUDE_ASM("asm/nonmatchings/800", func_80028E68); diff --git a/src/800b_5.c b/src/800b_5.c index 3c437741e..d1376a95c 100644 --- a/src/800b_5.c +++ b/src/800b_5.c @@ -6,7 +6,103 @@ INCLUDE_ASM("asm/nonmatchings/800b_5", FGO_01_OBJ_64); INCLUDE_ASM("asm/nonmatchings/800b_5", FGO_01_OBJ_CC); -INCLUDE_ASM("asm/nonmatchings/800b_5", FGO_01_OBJ_160); +/* FGO_01_OBJ_160 (0x800498EC) is NOT a callable function: it is the tail FRAGMENT of one + * larger routine. FGO_01_OBJ_CC (0x80049858) computes $t2/$t5 from D_8006DF1C and tail-jumps + * straight into it (`j FGO_01_OBJ_160`, no jal anywhere in asm/); the live inputs arrive in + * $t0-$t5 with the destination pointer in $a1 -- none of which any C calling convention + * expresses. Banked as a file-scope inline asm blob per the SYS_OBJ_1DC0 idiom (src/800c.c): + * the literal ".ent\t"/".end\t" pair (tab-separated) makes maspsx emit a fresh + * ".set\tnoreorder", keeping every hand-placed delay-slot nop in place; store offsets are + * DECIMAL because maspsx int()-parses them and a hex "0x0($a1)" crashes it + * ("invalid literal for int() with base 10") -- the exact defect that made the previous + * attempt's whole-binary gate reject a COMPILE error, not a byte mismatch. Body transcribed + * 1:1 from asm/nonmatchings/800b_5/FGO_01_OBJ_160.s (oracle MATCH 76/76; the region contains + * ZERO relocations -- no jal/j/lui -- so relocation masking hides nothing). The trailing + * __asm__(".word 0") reproduces the padding nop at 0x80049A18 before RotMatrixYXZ + * (0x80049A1C), matching the banked FGO_02/03_OBJ_160 siblings whose own .s tails carry the + * same post-endlabel pad (0x80049CA8 / 0x80049F38) and whose blobs use this identical form, + * gate-proven twice in this very TU. + */ +__asm__(".text\n.align 2\n.globl FGO_01_OBJ_160\n.ent\tFGO_01_OBJ_160\n" + "FGO_01_OBJ_160:\n.frame $sp,0,$31\n" + ".set\tnoreorder\n" + "multu $t2, $t1\n" + "nop\n" + "nop\n" + "mflo $t7\n" + "sra $t6, $t7, 12\n" + "sh $t6, 0($a1)\n" + "multu $t5, $t1\n" + "nop\n" + "nop\n" + "mflo $t7\n" + "negu $t6, $t7\n" + "sra $t7, $t6, 12\n" + "multu $t2, $t4\n" + "sh $t7, 2($a1)\n" + "nop\n" + "mflo $t7\n" + "sra $t8, $t7, 12\n" + "nop\n" + "multu $t8, $t3\n" + "nop\n" + "nop\n" + "mflo $t7\n" + "sra $t6, $t7, 12\n" + "nop\n" + "multu $t5, $t0\n" + "nop\n" + "nop\n" + "mflo $t7\n" + "sra $t9, $t7, 12\n" + "subu $t7, $t9, $t6\n" + "multu $t8, $t0\n" + "sh $t7, 6($a1)\n" + "nop\n" + "mflo $t6\n" + "sra $t7, $t6, 12\n" + "nop\n" + "multu $t5, $t3\n" + "nop\n" + "nop\n" + "mflo $t6\n" + "sra $t9, $t6, 12\n" + "addu $t6, $t9, $t7\n" + "multu $t5, $t4\n" + "sh $t6, 12($a1)\n" + "nop\n" + "mflo $t7\n" + "sra $t8, $t7, 12\n" + "nop\n" + "multu $t8, $t3\n" + "nop\n" + "nop\n" + "mflo $t7\n" + "sra $t6, $t7, 12\n" + "nop\n" + "multu $t2, $t0\n" + "nop\n" + "nop\n" + "mflo $t7\n" + "sra $t9, $t7, 12\n" + "addu $t7, $t9, $t6\n" + "multu $t8, $t0\n" + "sh $t7, 8($a1)\n" + "nop\n" + "mflo $t6\n" + "sra $t7, $t6, 12\n" + "nop\n" + "multu $t2, $t3\n" + "nop\n" + "nop\n" + "mflo $t6\n" + "sra $t9, $t6, 12\n" + "subu $t6, $t9, $t7\n" + "sh $t6, 14($a1)\n" + "jr $ra\n" + "nop\n" + ".set\treorder\n.end\tFGO_01_OBJ_160\n"); +__asm__(".word 0"); INCLUDE_ASM("asm/nonmatchings/800b_5", RotMatrixYXZ); diff --git a/src/boot.c b/src/boot.c index 1cea8edd4..805248091 100644 --- a/src/boot.c +++ b/src/boot.c @@ -248,7 +248,22 @@ void func_80010BB4(void) { INCLUDE_ASM("asm/nonmatchings/boot", func_80010C7C); -INCLUDE_ASM("asm/nonmatchings/boot", func_80010CEC); +extern u8 D_800AF630[]; +extern void func_800CEDFC(void); +extern void func_8001C044(void); +extern void func_80015310(void); +extern void func_80011818(s32); + +void func_80010CEC(void) { + register u8 *p = D_800AF630; + + func_800CEDFC(); + if (*(u16 *)(p + 0xA3B6) != 0) { + func_8001C044(); + func_80015310(); + func_80011818(3); + } +} INCLUDE_ASM("asm/nonmatchings/boot", func_80010D60); diff --git a/src/gsgap1.c b/src/gsgap1.c index a2c8ece90..9a7f848de 100644 --- a/src/gsgap1.c +++ b/src/gsgap1.c @@ -1,3 +1,31 @@ #include "common.h" -INCLUDE_ASM("asm/nonmatchings/gsgap1", ApplyMatrix); +__asm__( + ".text\n" + ".align 2\n" + ".globl ApplyMatrix\n" + ".ent ApplyMatrix\n" + "ApplyMatrix:\n" + ".set\tnoreorder\n" + "lw $8, 0($4)\n" + "lw $9, 4($4)\n" + "lw $10, 8($4)\n" + "lw $11, 12($4)\n" + "lw $12, 16($4)\n" + "ctc2 $8, $0\n" + "ctc2 $9, $1\n" + "ctc2 $10, $2\n" + "ctc2 $11, $3\n" + "ctc2 $12, $4\n" + "lwc2 $0, 0($5)\n" + "lwc2 $1, 4($5)\n" + "nop\n" + "mvmva 1, 0, 0, 3, 0\n" + "swc2 $25, 0($6)\n" + "swc2 $26, 4($6)\n" + "swc2 $27, 8($6)\n" + "addu $2, $6, $0\n" + "jr $ra\n" + ".set\treorder\n" + ".end ApplyMatrix\n" +); diff --git a/src/gsgap2.c b/src/gsgap2.c index bbea7f48c..e9050aeeb 100644 --- a/src/gsgap2.c +++ b/src/gsgap2.c @@ -1,3 +1,18 @@ #include "common.h" -INCLUDE_ASM("asm/nonmatchings/gsgap2", func_80052430); +__asm__(".text\n.align 2\n.globl func_80052430\n.ent\tfunc_80052430\n" + "func_80052430:\n.frame $sp,0,$31\n.mask 0x00000000,0\n.fmask 0,0\n" + ".set\tnoreorder\n" + "lw $8, 0($5)\n" + "lw $9, 4($5)\n" + "lw $10, 8($5)\n" + "sw $8, 20($4)\n" + "sw $9, 24($4)\n" + "sw $10, 28($4)\n" + "addu $2, $4, $0\n" + "jr $31\n" + "nop\n" + "nop\n" + "nop\n" + "nop\n" + ".set\treorder\n.end\tfunc_80052430\n"); diff --git a/src/gsgap5.c b/src/gsgap5.c index a01857597..c1926e257 100644 --- a/src/gsgap5.c +++ b/src/gsgap5.c @@ -84,7 +84,15 @@ void SetRii() ".set\treorder\n"); } -INCLUDE_ASM("asm/nonmatchings/gsgap5", SetMAC123); +void SetMAC123(long r0, long r1, long r2) +{ + __asm__ __volatile__( + "mtc2 %0, $25\n" + "mtc2 %1, $26\n" + "mtc2 %2, $27" + : + : "r"(r0), "r"(r1), "r"(r2)); +} INCLUDE_ASM("asm/nonmatchings/gsgap5", SetData32);