From f0eea33381f92c83c4428ea1d6e9486c7a8b048a Mon Sep 17 00:00:00 2001
From: Drew T <50529377+Druthulu@users.noreply.github.com>
Date: Thu, 3 Sep 2026 10:44:32 -0600
Subject: [PATCH] =?UTF-8?q?refactor(main):=20convert=2020=20SDK-C-REORDER?=
 =?UTF-8?q?=20verbatim=20bodies=20to=20INCLUDE=5FASM=20stubs=20=E2=80=94?=
 =?UTF-8?q?=20byte-neutral?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

These are libapi/libcard C functions in src/800c3.c that were banked as §265
verbatim __asm__ blocks. The triage (.run/S75/triage/report.md) established they
carry the §188 shape (`jr $ra` with `addiu $sp,$sp,+N` in the slot) and that the
"§332/§188 wall" is the §332b -O2 reorder island, which landed 2026-09-01 --
one day BEFORE four of them were banked as assembly, with the commit itself
recording "6 of 53 at closeness 0" stored drafts.

Converting them to stubs makes them reachable by every gate again (a verbatim
body has no INCLUDE_ASM to substitute, so gate_main drops it as "resolved to NO
stub") and is the honest accounting: a stub counts as OUTSTANDING WORK, a
verbatim body counted as banked.

BYTE-NEUTRAL, PROVEN: make extract + make build BINARY=main ->
143dbb89f34491258bbc27810d0a12ec8b43a8dd BYTE-IDENTICAL. INCLUDE_ASM pastes the
same assembly the block transcribed, so it must be -- but "must" is a claim and
this was gated, not assumed.

Metric moves honestly: VERBATIM __asm__ bodies 173 -> 148, INCLUDE_ASM stubs
34 -> 53.

20 of 24 converted. The 4 refusals are reported, not silent: func_800623A4 /
func_80062434 / func_8006252C (800c2_2) and func_8005D8A0 -- the last being the
row all three of asm_in_c's detectors missed, which is its own finding.

Also fixes verbatim_to_stub to CASE-NORMALISE the address. splat's convention is
func_%08X but analysis artifacts carry lowercase (the triage taxonomy does), and
asking for func_8005ed4c found 0 of 24 blocks that were all sitting right there.
An address is a NUMBER; matching it as a case-sensitive string is R48 in its
case-sensitivity form.
---
 src/800c3.c | 1396 +--------------------------------------------------
 1 file changed, 20 insertions(+), 1376 deletions(-)

diff --git a/src/800c3.c b/src/800c3.c
index a19b318dd..61fbc781c 100644
--- a/src/800c3.c
+++ b/src/800c3.c
@@ -437,282 +437,20 @@ s32 func_8005D244(s32 arg0, s32 arg1, s32 arg2) {
 }
 
 
-__asm__(
-    ".set\tnoreorder\n"
-    ".set noreorder\n"
-    "\t.globl\tfunc_8005D33C\n"
-    "func_8005D33C:\n"
-    "lui $v0, %hi(D_80072970)\n"
-    "lw $v0, %lo(D_80072970)($v0)\n"
-    "addiu $sp, $sp, -32\n"
-    "sw $s0, 16($sp)\n"
-    "addu $s0, $a1, $zero\n"
-    "sw $s1, 20($sp)\n"
-    "sw $ra, 24($sp)\n"
-    "jalr $v0\n"
-    "addu $s1, $a2, $zero\n"
-    "bgez $s0, 1f\n"
-    "addu $v1, $v0, $zero\n"
-    "lbu $v0, 233($v1)\n"
-    "j 4f\n"
-    "nop\n"
-    "1:\n"
-    "lbu $v0, 233($v1)\n"
-    "nop\n"
-    "slt $v0, $s0, $v0\n"
-    "beqz $v0, 3f\n"
-    "sll $v0, $s0, 2\n"
-    "lw $v1, 4($v1)\n"
-    "addu $v0, $v0, $s0\n"
-    "addiu $a2, $s1, -1\n"
-    "addu $v1, $v1, $v0\n"
-    "sltiu $v0, $a2, 5\n"
-    "beqz $v0, 3f\n"
-    "sll $v0, $a2, 2\n"
-    "lui $at, %hi(jtbl_800744A0)\n"
-    "addu $at, $at, $v0\n"
-    "lw $v0, %lo(jtbl_800744A0)($at)\n"
-    "nop\n"
-    "jr $v0\n"
-    "nop\n"
-    "lbu $v0, 0($v1)\n"
-    "j 4f\n"
-    "nop\n"
-    "lbu $v0, 1($v1)\n"
-    "j 4f\n"
-    "nop\n"
-    "lbu $v0, 2($v1)\n"
-    "j 4f\n"
-    "nop\n"
-    "lbu $v0, 3($v1)\n"
-    "j 4f\n"
-    "nop\n"
-    "lbu $v0, 4($v1)\n"
-    "j 4f\n"
-    "nop\n"
-    "3:\n"
-    "addu $v0, $zero, $zero\n"
-    "4:\n"
-    "lw $ra, 24($sp)\n"
-    "lw $s1, 20($sp)\n"
-    "lw $s0, 16($sp)\n"
-    "jr $ra\n"
-    "addiu $sp, $sp, 32\n"
-    ".set reorder\n"
-);
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005D33C);
 
 extern void* (*D_80072970)(void);
 
-__asm__(
-    "\t.set\tnoreorder\n"
-    ".set noreorder\n"
-    "\t.globl\tfunc_8005D410\n"
-    "func_8005D410:\n"
-    "lui $v0, %hi(D_80072970)\n"
-    "lw $v0, %lo(D_80072970)($v0)\n"
-    "addiu $sp, $sp, -32\n"
-    "sw $s0, 16($sp)\n"
-    "addu $s0, $a1, $zero\n"
-    "sw $s1, 20($sp)\n"
-    "sw $ra, 24($sp)\n"
-    "jalr $v0\n"
-    "addu $s1, $a2, $zero\n"
-    "bgez $s0, 1f\n"
-    "addu $v1, $v0, $zero\n"
-    "lbu $v0, 234($v1)\n"
-    "j 4f\n"
-    "nop\n"
-    "1:\n"
-    "lbu $v0, 234($v1)\n"
-    "nop\n"
-    "slt $v0, $s0, $v0\n"
-    "beq $v0, $zero, 3f\n"
-    "sll $v0, $s0, 3\n"
-    "lw $v1, 8($v1)\n"
-    "bgez $s1, 2f\n"
-    "addu $v1, $v1, $v0\n"
-    "lbu $v0, 0($v1)\n"
-    "j 4f\n"
-    "nop\n"
-    "2:\n"
-    "lbu $v0, 0($v1)\n"
-    "nop\n"
-    "slt $v0, $s1, $v0\n"
-    "beq $v0, $zero, 4f\n"
-    "addu $v0, $zero, $zero\n"
-    "lw $v0, 4($v1)\n"
-    "nop\n"
-    "addu $v0, $v0, $s1\n"
-    "lbu $v0, 0($v0)\n"
-    "j 4f\n"
-    "nop\n"
-    "3:\n"
-    "addu $v0, $zero, $zero\n"
-    "4:\n"
-    "lw $ra, 24($sp)\n"
-    "lw $s1, 20($sp)\n"
-    "lw $s0, 16($sp)\n"
-    "jr $ra\n"
-    "addiu $sp, $sp, 32\n"
-    ".set reorder\n"
-);
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005D410);
 
-__asm__(
-    "\t.set\tnoreorder\n"
-    ".set noreorder\n"
-    "\t.globl\tfunc_8005D4B8\n"
-    "func_8005D4B8:\n"
-    "lui $v0, %hi(D_80072970)\n"
-    "lw $v0, %lo(D_80072970)($v0)\n"
-    "addiu $sp, $sp, -24\n"
-    "sw $s0, 16($sp)\n"
-    "sw $ra, 20($sp)\n"
-    "jalr $v0\n"
-    "addu $s0, $a1, $zero\n"
-    "addu $a0, $v0, $zero\n"
-    "jal func_8005E79C\n"
-    "addu $a1, $s0, $zero\n"
-    "lw $ra, 20($sp)\n"
-    "lw $s0, 16($sp)\n"
-    "jr $ra\n"
-    "addiu $sp, $sp, 24\n"
-    ".set reorder\n"
-);
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005D4B8);
 
-__asm__(
-    "\t.set\tnoreorder\n"
-    ".set noreorder\n"
-    "\t.globl\tfunc_8005D4F0\n"
-    "func_8005D4F0:\n"
-    "lui $v0, %hi(D_80072970)\n"
-    "lw $v0, %lo(D_80072970)($v0)\n"
-    "addiu $sp, $sp, -32\n"
-    "sw $s0, 16($sp)\n"
-    "addu $s0, $a1, $zero\n"
-    "sw $s1, 20($sp)\n"
-    "sw $ra, 24($sp)\n"
-    "jalr $v0\n"
-    "addu $s1, $a2, $zero\n"
-    "addu $a0, $v0, $zero\n"
-    "andi $a1, $s0, 255\n"
-    "jal func_8005E8E8\n"
-    "andi $a2, $s1, 255\n"
-    "lw $ra, 24($sp)\n"
-    "lw $s1, 20($sp)\n"
-    "lw $s0, 16($sp)\n"
-    "jr $ra\n"
-    "addiu $sp, $sp, 32\n"
-    ".set reorder\n"
-);
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005D4F0);
 
-__asm__(
-    "\t.set\tnoreorder\n"
-    ".set noreorder\n"
-    "\t.globl\tfunc_8005D538\n"
-    "func_8005D538:\n"
-    "lui $v0, %hi(D_80072970)\n"
-    "lw $v0, %lo(D_80072970)($v0)\n"
-    "addiu $sp, $sp, -32\n"
-    "sw $s0, 16($sp)\n"
-    "addu $s0, $a1, $zero\n"
-    "sw $s1, 20($sp)\n"
-    "sw $ra, 24($sp)\n"
-    "jalr $v0\n"
-    "addu $s1, $a2, $zero\n"
-    "addu $a0, $v0, $zero\n"
-    "addu $a1, $s0, $zero\n"
-    "jal func_8005E188\n"
-    "addu $a2, $s1, $zero\n"
-    "lw $ra, 24($sp)\n"
-    "lw $s1, 20($sp)\n"
-    "lw $s0, 16($sp)\n"
-    "jr $ra\n"
-    "addiu $sp, $sp, 32\n"
-    "nop\n"
-    "nop\n"
-    ".set reorder\n"
-);
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005D538);
 
 
-__asm__(
-    "    .set noat\n"
-    "    .set noreorder\n"
-    "    .section .text\n"
-    "    .globl func_8005D588\n"
-    "func_8005D588:\n"
-    ".word 0x3C038007\n"
-    ".word 0x8C6329B0\n"
-    ".word 0x3C028007\n"
-    ".word 0x8C4229AC\n"
-    ".word 0x27BDFFE0\n"
-    ".word 0xAFB00010\n"
-    ".word 0x00808021\n"
-    ".word 0xAFBF001C\n"
-    ".word 0xAFB20018\n"
-    ".word 0xAFB10014\n"
-    ".word 0x00031840\n"
-    ".word 0x2C420001\n"
-    ".word 0x00628825\n"
-    ".word 0x12300031\n"
-    ".word 0x32020001\n"
-    ".word 0x3C018007\n"
-    ".word 0xAC202994\n"
-    ".word 0x10400012\n"
-    ".word 0x24020001\n"
-    ".word 0x3C128008\n"
-    ".word 0x26528998\n"
-    ".word 0x8E420000\n"
-    ".word 0x3C018007\n"
-    ".word 0xAC2029AC\n"
-    ".word 0x28420096\n"
-    ".word 0x14400008\n"
-    ".word 0x00000000\n"
-    ".word 0x3C048007\n"
-    ".word 0x8C842990\n"
-    ".word 0x3C028007\n"
-    ".word 0x8C422960\n"
-    ".word 0x00000000\n"
-    ".word 0x0040F809\n"
-    ".word 0x00000000\n"
-    ".word 0x08017588\n"
-    ".word 0xAE400000\n"
-    ".word 0x3C018007\n"
-    ".word 0xAC2229AC\n"
-    ".word 0x32020002\n"
-    ".word 0x10400012\n"
-    ".word 0x24030001\n"
-    ".word 0x3C108008\n"
-    ".word 0x2610899C\n"
-    ".word 0x8E020000\n"
-    ".word 0x3C018007\n"
-    ".word 0xAC2329B0\n"
-    ".word 0x28420096\n"
-    ".word 0x14400008\n"
-    ".word 0x00000000\n"
-    ".word 0x3C048007\n"
-    ".word 0x8C842990\n"
-    ".word 0x3C028007\n"
-    ".word 0x8C422960\n"
-    ".word 0x00000000\n"
-    ".word 0x0040F809\n"
-    ".word 0x248400F0\n"
-    ".word 0x0801759E\n"
-    ".word 0xAE000000\n"
-    ".word 0x3C018007\n"
-    ".word 0xAC2029B0\n"
-    ".word 0x24020001\n"
-    ".word 0x3C018007\n"
-    ".word 0xAC222994\n"
-    ".word 0x02201021\n"
-    ".word 0x8FBF001C\n"
-    ".word 0x8FB20018\n"
-    ".word 0x8FB10014\n"
-    ".word 0x8FB00010\n"
-    ".word 0x03E00008\n"
-    ".word 0x27BD0020\n"
-    "    .set reorder\n"
-    "    .set at\n"
-);
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005D588);
 
 void func_8005D6A0(void) {
     extern s32 D_8007898C;
@@ -749,116 +487,7 @@ s32 func_8005D6CC(void) {
  * Byte-equivalent to the INCLUDE_ASM stub by construction; the function is NOT
  * decompiled (§265 ACCOUNTING). Immediates/offsets are decimal for maspsx (§383).
  */
-__asm__(
-    ".text\n"
-    ".align\t2\n"
-    ".globl\tfunc_8005D734\n"
-    ".ent\tfunc_8005D734\n"
-    "func_8005D734:\n"
-    ".frame\t$sp,24,$31\n"
-    ".mask\t0x80000000,-4\n"
-    ".fmask\t0,0\n"
-    ".set\tnoreorder\n"
-    "addiu $sp,$sp,-24\n"
-    "lui $v1,%hi(D_800729AC)\n"
-    "lw $v1,%lo(D_800729AC)($v1)\n"
-    "addiu $v0,$zero,1\n"
-    "sw $ra,16($sp)\n"
-    "lui $at,%hi(D_800729C4)\n"
-    "beqz $v1,.L8005D774\n"
-    " sw $v0,%lo(D_800729C4)($at)\n"
-    "lui $a0,%hi(D_80078998)\n"
-    "addiu $a0,$a0,%lo(D_80078998)\n"
-    "lw $v1,0($a0)\n"
-    "nop\n"
-    "slti $v0,$v1,150\n"
-    "beqz $v0,.L8005D774\n"
-    " addiu $v0,$v1,1\n"
-    "sw $v0,0($a0)\n"
-    ".L8005D774:\n"
-    "lui $v0,%hi(D_800729B0)\n"
-    "lw $v0,%lo(D_800729B0)($v0)\n"
-    "nop\n"
-    "bnez $v0,.L8005D7A8\n"
-    " nop\n"
-    "lui $a0,%hi(D_8007899C)\n"
-    "addiu $a0,$a0,%lo(D_8007899C)\n"
-    "lw $v1,0($a0)\n"
-    "nop\n"
-    "slti $v0,$v1,150\n"
-    "beqz $v0,.L8005D7A8\n"
-    " addiu $v0,$v1,1\n"
-    "sw $v0,0($a0)\n"
-    ".L8005D7A8:\n"
-    "lui $v0,%hi(D_80072994)\n"
-    "lw $v0,%lo(D_80072994)($v0)\n"
-    "nop\n"
-    "beqz $v0,.L8005D890\n"
-    " nop\n"
-    "lui $v1,%hi(D_800729AC)\n"
-    "lw $v1,%lo(D_800729AC)($v1)\n"
-    "lui $v0,%hi(D_800729B0)\n"
-    "lw $v0,%lo(D_800729B0)($v0)\n"
-    "nop\n"
-    "slt $v0,$v0,$v1\n"
-    "bnez $v0,.L8005D890\n"
-    " sll $a0,$v1,4\n"
-    "subu $a0,$a0,$v1\n"
-    "lui $v0,%hi(D_80072990)\n"
-    "lw $v0,%lo(D_80072990)($v0)\n"
-    "sll $a0,$a0,4\n"
-    "lui $at,%hi(D_800729A0)\n"
-    "sw $zero,%lo(D_800729A0)($at)\n"
-    "lui $at,%hi(D_8007299C)\n"
-    "sw $v1,%lo(D_8007299C)($at)\n"
-    "jal func_8005D9C4\n"
-    " addu $a0,$v0,$a0\n"
-    "bnez $v0,.L8005D820\n"
-    " nop\n"
-    "lui $v0,%hi(D_8007295C)\n"
-    "lw $v0,%lo(D_8007295C)($v0)\n"
-    "nop\n"
-    "jalr $v0\n"
-    " ori $a0,$zero,65535\n"
-    ".L8005D820:\n"
-    "lui $v1,%hi(D_8007299C)\n"
-    "lw $v1,%lo(D_8007299C)($v1)\n"
-    "lui $v0,%hi(D_800729B0)\n"
-    "lw $v0,%lo(D_800729B0)($v0)\n"
-    "lui $at,%hi(D_800729A4)\n"
-    "sw $zero,%lo(D_800729A4)($at)\n"
-    "slt $v0,$v0,$v1\n"
-    "bnez $v0,.L8005D880\n"
-    " nop\n"
-    ".L8005D844:\n"
-    "sll $a0,$v1,4\n"
-    "subu $a0,$a0,$v1\n"
-    "lui $v0,%hi(D_80072990)\n"
-    "lw $v0,%lo(D_80072990)($v0)\n"
-    "sll $a0,$a0,4\n"
-    "jal func_8005DBD8\n"
-    " addu $a0,$v0,$a0\n"
-    "lui $v1,%hi(D_8007299C)\n"
-    "lw $v1,%lo(D_8007299C)($v1)\n"
-    "lui $v0,%hi(D_800729B0)\n"
-    "lw $v0,%lo(D_800729B0)($v0)\n"
-    "nop\n"
-    "slt $v0,$v0,$v1\n"
-    "beqz $v0,.L8005D844\n"
-    " nop\n"
-    ".L8005D880:\n"
-    "lui $v1,%hi(D_800729C0)\n"
-    "lw $v1,%lo(D_800729C0)($v1)\n"
-    "addiu $v0,$zero,136\n"
-    "sh $v0,14($v1)\n"
-    ".L8005D890:\n"
-    "lw $ra,16($sp)\n"
-    "addu $v0,$zero,$zero\n"
-    "jr $ra\n"
-    " addiu $sp,$sp,24\n"
-    ".set\treorder\n"
-    ".end\tfunc_8005D734\n"
-);
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005D734);
 
 extern s32 D_800729C4;
 
@@ -876,66 +505,7 @@ asm(
 s32 func_8005D8A0(void);
 
 
-__asm__(
-    ".globl func_8005D8B4\n"
-    "func_8005D8B4:\n"
-    "addiu $sp,$sp,-24\n"
-    "sw $ra,20($sp)\n"
-    "sw $s0,16($sp)\n"
-    "lui $at,%hi(D_80072994)\n"
-    ".reloc ., R_MIPS_26, func_8005CF08\n"
-    ".word 0x0c000000\n"
-    "sw $zero,%lo(D_80072994)($at)\n"
-    "addiu $a0,$zero,2\n"
-    "lui $s0,%hi(D_80078988)\n"
-    "addiu $s0,$s0,%lo(D_80078988)\n"
-    ".reloc ., R_MIPS_26, SysDeqIntRP\n"
-    ".word 0x0c000000\n"
-    "addu $a1,$s0,$zero\n"
-    "addiu $a0,$zero,2\n"
-    ".reloc ., R_MIPS_26, SysEnqIntRP\n"
-    ".word 0x0c000000\n"
-    "addu $a1,$s0,$zero\n"
-    "addiu $a0,$zero,3\n"
-    "lui $v1,%hi(D_800729BC)\n"
-    "lw $v1,%lo(D_800729BC)($v1)\n"
-    "addiu $v0,$zero,-2\n"
-    "sw $v0,0($v1)\n"
-    "lw $v0,4($v1)\n"
-    "addu $a1,$zero,$zero\n"
-    "ori $v0,$v0,1\n"
-    ".reloc ., R_MIPS_26, ChangeClearRCnt\n"
-    ".word 0x0c000000\n"
-    "sw $v0,4($v1)\n"
-    ".reloc ., R_MIPS_26, func_8005CF18\n"
-    ".word 0x0c000000\n"
-    "nop\n"
-    "lui $a0,%hi(D_80072990)\n"
-    "lw $a0,%lo(D_80072990)($a0)\n"
-    "lui $v0,%hi(D_80072960)\n"
-    "lw $v0,%lo(D_80072960)($v0)\n"
-    "nop\n"
-    ".word 0x0040f809\n"
-    "nop\n"
-    "lui $a0,%hi(D_80072990)\n"
-    "lw $a0,%lo(D_80072990)($a0)\n"
-    "lui $v0,%hi(D_80072960)\n"
-    "lw $v0,%lo(D_80072960)($v0)\n"
-    "nop\n"
-    ".word 0x0040f809\n"
-    "addiu $a0,$a0,240\n"
-    "lui $v0,%hi(D_80078998)\n"
-    "addiu $v0,$v0,%lo(D_80078998)\n"
-    "sw $zero,4($v0)\n"
-    "sw $zero,0($v0)\n"
-    "addiu $v0,$zero,1\n"
-    "lui $at,%hi(D_80072994)\n"
-    "sw $v0,%lo(D_80072994)($at)\n"
-    ".word 0x8fbf0014\n"
-    ".word 0x8fb00010\n"
-    ".word 0x03e00008\n"
-    "addiu $sp,$sp,24\n"
-);
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005D8B4);
 
 extern void func_8005CF08(void);
 extern void func_8005CF18(void);
@@ -1095,28 +665,7 @@ s32 func_8005E0AC(void) {
 
 extern s32 *D_800729C0;
 
-__asm__(
-    ".text\n"
-    ".align\t2\n"
-    ".globl\tfunc_8005E13C\n"
-    ".ent\tfunc_8005E13C\n"
-    "func_8005E13C:\n"
-    ".set\tnoreorder\n"
-    "lui   $v1, %hi(D_800729C0)\n"
-    "lw    $v1, %lo(D_800729C0)($v1)\n"
-    "nop\n"
-    "1:\n"
-    "lhu   $v0, 4($v1)\n"
-    "nop\n"
-    "andi  $v0, $v0, 0x2\n"
-    "beqz  $v0, 1b\n"
-    "nop\n"
-    "jr    $ra\n"
-    "nop\n"
-    ".set\treorder\n"
-    ".end\tfunc_8005E13C\n"
-    "nop\n"
-);
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005E13C);
 
 /* §295 kernel-trap trampoline: A/B/C dispatch vector in $t2, syscall # in the jr delay slot;
  * unreachable from C (§179-C) -> file-scope verbatim asm (§265 form 1). Pad nop is load-bearing (stride 0x10). */
@@ -1173,105 +722,7 @@ void func_8005E1A4(void *arg0) {
     }
 }
 
-__asm__(
-    "\t.set\tnoreorder\n"
-    ".set noreorder\n"
-    "\t.globl\tfunc_8005E228\n"
-    "func_8005E228:\n"
-    "addiu $sp, $sp, -24\n"
-    "sw $s0, 16($sp)\n"
-    "addu $s0, $a0, $zero\n"
-    "sw $ra, 20($sp)\n"
-    "lbu $v1, 70($s0)\n"
-    "addiu $v0, $zero, 3\n"
-    "beq $v1, $v0, .L8005E2B4\n"
-    "slti $v0, $v1, 4\n"
-    "beqz $v0, .L8005E260\n"
-    "addiu $v0, $zero, 2\n"
-    "beq $v1, $v0, .L8005E274\n"
-    "addiu $v0, $zero, 1\n"
-    "j .L8005E364\n"
-    "nop\n"
-    ".L8005E260:\n"
-    "addiu $v0, $zero, 4\n"
-    "beq $v1, $v0, .L8005E2D8\n"
-    "addiu $v0, $zero, 1\n"
-    "j .L8005E364\n"
-    "nop\n"
-    ".L8005E274:\n"
-    "lw $v0, 60($s0)\n"
-    "lw $v1, 60($s0)\n"
-    "lbu $v0, 3($v0)\n"
-    "nop\n"
-    "sb $v0, 227($s0)\n"
-    "lbu $v0, 4($v1)\n"
-    "lw $v1, 60($s0)\n"
-    "sh $zero, 230($s0)\n"
-    "sb $v0, 228($s0)\n"
-    "lbu $v0, 5($v1)\n"
-    "lw $v1, 60($s0)\n"
-    "sb $v0, 233($s0)\n"
-    "lbu $v0, 6($v1)\n"
-    "sw $zero, 236($s0)\n"
-    "j .L8005E360\n"
-    "sb $v0, 234($s0)\n"
-    ".L8005E2B4:\n"
-    "lw $v0, 60($s0)\n"
-    "nop\n"
-    "lbu $v1, 4($v0)\n"
-    "lbu $v0, 5($v0)\n"
-    "sb $zero, 71($s0)\n"
-    "sll $v1, $v1, 8\n"
-    "addu $v0, $v0, $v1\n"
-    "j .L8005E360\n"
-    "sh $v0, 230($s0)\n"
-    ".L8005E2D8:\n"
-    "lw $a0, 236($s0)\n"
-    "lbu $v0, 71($s0)\n"
-    "lw $v1, 60($s0)\n"
-    "addiu $v0, $v0, 1\n"
-    "lbu $v1, 4($v1)\n"
-    "addiu $a0, $a0, 8\n"
-    "sb $v0, 71($s0)\n"
-    "addiu $v1, $v1, 3\n"
-    "andi $v1, $v1, 0x1FC\n"
-    "addu $a0, $a0, $v1\n"
-    "lbu $v1, 234($s0)\n"
-    "andi $v0, $v0, 0xFF\n"
-    "sltu $v0,$v0,$v1\n"
-    "beqz $v0, .L8005E31C\n"
-    "sw $a0, 236($s0)\n"
-    ".L8005E314:\n"
-    "j .L8005E364\n"
-    "addu $v0, $zero, $zero\n"
-    ".L8005E31C:\n"
-    "jal func_8005E374\n"
-    "addu $a0, $s0, $zero\n"
-    "slti $v0, $v0, 0x81\n"
-    "bnez $v0, .L8005E344\n"
-    "addu $a0, $s0, $zero\n"
-    "addiu $v0, $zero, 0xFE\n"
-    "sb $v0, 70($s0)\n"
-    "addiu $v0, $zero, 2\n"
-    "j .L8005E314\n"
-    "sb $v0, 73($s0)\n"
-    ".L8005E344:\n"
-    "addiu $v0, $zero, 0xFF\n"
-    "addiu $a1, $s0, 0x63\n"
-    "jal func_8005E3AC\n"
-    "sb $v0, 70($s0)\n"
-    "addiu $v0, $zero, 2\n"
-    "j .L8005E314\n"
-    "sb $v0, 70($s0)\n"
-    ".L8005E360:\n"
-    "addiu $v0, $zero, 1\n"
-    ".L8005E364:\n"
-    "lw $ra, 20($sp)\n"
-    "lw $s0, 16($sp)\n"
-    "jr $ra\n"
-    "addiu $sp, $sp, 24\n"
-    ".set reorder\n"
-);
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005E228);
 
 
 s32 func_8005E374(u8 *a0) {
@@ -1280,69 +731,7 @@ s32 func_8005E374(u8 *a0) {
     return t + m + *(u32 *)(a0 + 0xEC);
 }
 
-__asm__(
-    "\t.set\tnoreorder\n"
-    ".set noreorder\n"
-    "\t.globl\tfunc_8005E3AC\n"
-    "func_8005E3AC:\n"
-    "addiu $sp, $sp, -32\n"
-    "sw $s0, 16($sp)\n"
-    "addu $s0, $a0, $zero\n"
-    "sw $s1, 20($sp)\n"
-    "addu $s1, $a1, $zero\n"
-    "beqz $s1, .L8005E3F4\n"
-    "sw $ra, 24($sp)\n"
-    "lw $v0, 4($s0)\n"
-    "nop\n"
-    "bnez $v0, .L8005E46C\n"
-    "addu $v0, $zero, $zero\n"
-    "lui $v0, %hi(D_80072978)\n"
-    "lw $v0, %lo(D_80072978)($v0)\n"
-    "nop\n"
-    "jalr $v0\n"
-    "nop\n"
-    "beqz $v0, .L8005E3FC\n"
-    "addiu $v0, $zero, 1\n"
-    ".L8005E3F4:\n"
-    "j .L8005E46C\n"
-    "addu $v0, $zero, $zero\n"
-    ".L8005E3FC:\n"
-    "addiu $v1, $zero, 4\n"
-    "addiu $a1, $s1, 3\n"
-    "sra $a1, $a1, 2\n"
-    "sb $v1, 73($s0)\n"
-    "addiu $v1, $zero, 1\n"
-    "sb $v1, 70($s0)\n"
-    "lui $v1, %hi(func_8005E480)\n"
-    "addiu $v1, $v1, %lo(func_8005E480)\n"
-    "sw $v1, 20($s0)\n"
-    "lbu $v1, 227($s0)\n"
-    "lui $a0, %hi(func_8005E528)\n"
-    "addiu $a0, $a0, %lo(func_8005E528)\n"
-    "sw $a0, 24($s0)\n"
-    "lbu $a0, 233($s0)\n"
-    "sll $a1, $a1, 2\n"
-    "sw $a1, 0($s0)\n"
-    "sb $zero, 71($s0)\n"
-    "addiu $v1, $v1, 1\n"
-    "sra $v1, $v1, 1\n"
-    "sll $v1, $v1, 2\n"
-    "addu $a1, $a1, $v1\n"
-    "sll $v1, $a0, 2\n"
-    "addu $v1, $v1, $a0\n"
-    "addiu $v1, $v1, 3\n"
-    "andi $v1, $v1, 0xFFC\n"
-    "sw $a1, 4($s0)\n"
-    "addu $a1, $a1, $v1\n"
-    "sw $a1, 8($s0)\n"
-    ".L8005E46C:\n"
-    "lw $ra, 24($sp)\n"
-    "lw $s1, 20($sp)\n"
-    "lw $s0, 16($sp)\n"
-    "jr $ra\n"
-    "addiu $sp, $sp, 32\n"
-    ".set reorder\n"
-);
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005E3AC);
 
 extern void func_8005EA68(void *arg0, s32 arg1);
 extern void func_8005EA88(void *arg0, s32 arg1);
@@ -1469,40 +858,7 @@ s32 func_8005E528(Ctx *s) {
     return 1;
 }
 
-__asm__(
-    "\t.set\tnoreorder\n"
-    ".set noreorder\n"
-    "\t.globl\tfunc_8005E79C\n"
-    "func_8005E79C:\n"
-    "addiu $sp, $sp, -32\n"
-    "sw $s0, 16($sp)\n"
-    "addu $s0, $a0, $zero\n"
-    "sw $s1, 20($sp)\n"
-    "lui $v0, %hi(D_80072978)\n"
-    "lw $v0, %lo(D_80072978)($v0)\n"
-    "sw $ra, 24($sp)\n"
-    "jalr $v0\n"
-    "addu $s1, $a1, $zero\n"
-    "bnez $v0, 1f\n"
-    "addu $v0, $zero, $zero\n"
-    "addiu $v0, $zero, 1\n"
-    "addiu $v1, $zero, 1\n"
-    "sb $v1, 70($s0)\n"
-    "lui $v1, %hi(func_8005E804)\n"
-    "addiu $v1, $v1, %lo(func_8005E804)\n"
-    "sw $v1, 20($s0)\n"
-    "lui $v1, %hi(func_8005E820)\n"
-    "addiu $v1, $v1, %lo(func_8005E820)\n"
-    "sw $s1, 32($s0)\n"
-    "sw $v1, 24($s0)\n"
-    "1:\n"
-    "lw $ra, 24($sp)\n"
-    "lw $s1, 20($sp)\n"
-    "lw $s0, 16($sp)\n"
-    "jr $ra\n"
-    "addiu $sp, $sp, 32\n"
-    ".set reorder\n"
-);
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005E79C);
 
 void func_8005E804(u8 *arg0) {
     u32 v1;
@@ -1568,52 +924,7 @@ s32 func_8005E820(void *a0)
     return 0;
 }
 
-__asm__(
-    "\t.set\tnoreorder\n"
-    ".set noreorder\n"
-    "\t.globl\tfunc_8005E8E8\n"
-    "func_8005E8E8:\n"
-    "addiu $sp, $sp, -40\n"
-    "sw $s0, 16($sp)\n"
-    "addu $s0, $a0, $zero\n"
-    "sw $s1, 20($sp)\n"
-    "addu $s1, $a1, $zero\n"
-    "sw $s2, 24($sp)\n"
-    "addu $s2, $a2, $zero\n"
-    "sw $s3, 28($sp)\n"
-    "lui $v0, %hi(D_80072978)\n"
-    "lw $v0, %lo(D_80072978)($v0)\n"
-    "sw $ra, 32($sp)\n"
-    "jalr $v0\n"
-    "addu $s3, $s1, $zero\n"
-    "bnez $v0, 1f\n"
-    "addu $v0, $zero, $zero\n"
-    "addiu $v0, $zero, 1\n"
-    "lbu $a0, 228($s0)\n"
-    "addiu $v1, $zero, 1\n"
-    "sb $v1, 70($s0)\n"
-    "lui $v1, %hi(func_8005E980)\n"
-    "addiu $v1, $v1, %lo(func_8005E980)\n"
-    "sw $v1, 20($s0)\n"
-    "lui $v1, %hi(func_8005E9D4)\n"
-    "addiu $v1, $v1, %lo(func_8005E9D4)\n"
-    "sw $v1, 24($s0)\n"
-    "andi $v1, $s3, 0xFF\n"
-    "sb $s1, 81($s0)\n"
-    "sb $s2, 82($s0)\n"
-    "xor $v1, $v1, $a0\n"
-    "sltiu $v1, $v1, 1\n"
-    "sb $v1, 83($s0)\n"
-    "1:\n"
-    "lw $ra, 32($sp)\n"
-    "lw $s3, 28($sp)\n"
-    "lw $s2, 24($sp)\n"
-    "lw $s1, 20($sp)\n"
-    "lw $s0, 16($sp)\n"
-    "jr $ra\n"
-    "addiu $sp, $sp, 40\n"
-    ".set reorder\n"
-);
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005E8E8);
 
 void func_8005E980(void)
 {
@@ -1685,48 +996,9 @@ void func_8005EAA8(void *arg0, s32 arg1) {
     *(u8 *)((u8 *)arg0 + 0x35) = 1;
 }
 
-__asm__(
-    ".text\n"
-    ".align\t2\n"
-    ".globl\tfunc_8005EAC8\n"
-    ".ent\tfunc_8005EAC8\n"
-    "func_8005EAC8:\n"
-    ".set\tnoreorder\n"
-    "addiu $v0, $zero, 75\n"
-    "sb    $v0, 54($a0)\n"
-    "sw    $zero, 44($a0)\n"
-    "jr    $ra\n"
-    "sb    $zero, 53($a0)\n"
-    "nop\n"
-    "nop\n"
-    "nop\n"
-    ".end\tfunc_8005EAC8\n");
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005EAC8);
 
-__asm__(
-    ".text\n"
-    ".align\t2\n"
-    ".globl\tfunc_8005EAE8\n"
-    ".ent\tfunc_8005EAE8\n"
-    "func_8005EAE8:\n"
-        ".set\tnoreorder\n"
-        "addiu $sp, $sp, -24\n"
-        "sw    $s0, 16($sp)\n"
-        "lui   $v0, %hi(D_80072974)\n"
-        "lw    $v0, %lo(D_80072974)($v0)\n"
-        "sw    $ra, 20($sp)\n"
-        "jalr  $v0\n"
-        "addu  $s0, $a0, $zero\n"
-        "addu  $a0, $s0, $zero\n"
-        "lui   $at, %hi(D_800729DC)\n"
-        "sw    $v0, %lo(D_800729DC)($at)\n"
-        "jal   func_8005DCA0\n"
-        "addiu $a1, $zero, -2\n"
-        "lw    $ra, 20($sp)\n"
-        "lw    $s0, 16($sp)\n"
-        "jr    $ra\n"
-        "addiu $sp, $sp, 24\n"
-        ".set\treorder\n"
-    ".end\tfunc_8005EAE8\n");
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005EAE8);
 
 /*
  * func_8005EB28 -- the target's epilogue restores TWO callee-saved registers
@@ -1743,68 +1015,7 @@ __asm__(
  * it through untouched. See src/md_MAIN_003/md_MAIN_003.c:524 (func_800D0440)
  * for the precedent this follows.
  */
-__asm__(".text\n.align 2\n.globl func_8005EB28\n.ent\tfunc_8005EB28\n"
-"func_8005EB28:\n.frame $sp,24,$31\n.mask 0x80010000,-4\n.fmask 0,0\n"
-".set\tnoreorder\n"
-"lui   $v1, %hi(D_8007299C)\n"
-"lw    $v1, %lo(D_8007299C)($v1)\n"
-"lui   $v0, %hi(D_800729AC)\n"
-"lw    $v0, %lo(D_800729AC)($v0)\n"
-"addiu $sp, $sp, -24\n"
-"sw    $s0, 16($sp)\n"
-"addu  $s0, $a0, $zero\n"
-"bne   $v1, $v0, .L8005EB88\n"
-" sw   $ra, 20($sp)\n"
-"lui   $v0, %hi(D_80072998)\n"
-"lw    $v0, %lo(D_80072998)($v0)\n"
-"nop\n"
-"beqz  $v0, .L8005EB88\n"
-" nop\n"
-"lui   $v0, %hi(D_8007298C)\n"
-"lw    $v0, %lo(D_8007298C)($v0)\n"
-"nop\n"
-"jalr  $v0\n"
-" nop\n"
-"lui   $v0, %hi(D_80072988)\n"
-"lw    $v0, %lo(D_80072988)($v0)\n"
-"nop\n"
-"jalr  $v0\n"
-" nop\n"
-".L8005EB88:\n"
-"lui   $v0, %hi(D_800729DC)\n"
-"lw    $v0, %lo(D_800729DC)($v0)\n"
-"nop\n"
-"beqz  $v0, .L8005EBCC\n"
-" nop\n"
-"lw    $a0, 12($s0)\n"
-"lui   $v0, %hi(D_80072974)\n"
-"lw    $v0, %lo(D_80072974)($v0)\n"
-"nop\n"
-"jalr  $v0\n"
-" nop\n"
-"lw    $a0, 12($s0)\n"
-"lui   $v0, %hi(D_80072974)\n"
-"lw    $v0, %lo(D_80072974)($v0)\n"
-"nop\n"
-"jalr  $v0\n"
-" addiu $a0, $a0, 240\n"
-".L8005EBCC:\n"
-"lbu   $v0, 54($s0)\n"
-"nop\n"
-"bnez  $v0, .L8005EBE4\n"
-" addu $a0, $s0, $zero\n"
-"j     .L8005EBE8\n"
-" addiu $a1, $zero, 66\n"
-".L8005EBE4:\n"
-"lbu   $a1, 54($s0)\n"
-".L8005EBE8:\n"
-"jal   func_8005DE78\n"
-" nop\n"
-"lw    $ra, 20($sp)\n"
-"lw    $s0, 16($sp)\n"
-"jr    $ra\n"
-" addiu $sp, $sp, 24\n"
-".set\treorder\n.end\tfunc_8005EB28\n");
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005EB28);
 
 /*
  * func_8005EC00 -- same wall as func_8005EB28 (src/800c3.c:1338): the target
@@ -1845,62 +1056,7 @@ __asm__(".text\n.align 2\n.globl func_8005EB28\n.ent\tfunc_8005EB28\n"
  *       return 0;
  *   }
  */
-__asm__(".text\n.align 2\n.globl func_8005EC00\n.ent\tfunc_8005EC00\n"
-"func_8005EC00:\n.frame $sp,24,$31\n.mask 0x80010000,-4\n.fmask 0,0\n"
-".set\tnoreorder\n"
-"lui   $v0, %hi(D_800729DC)\n"
-"lw    $v0, %lo(D_800729DC)($v0)\n"
-"addiu $sp, $sp, -24\n"
-"sw    $s0, 16($sp)\n"
-"addu  $s0, $a0, $zero\n"
-"beqz  $v0, .L8005EC4C\n"
-" sw   $ra, 20($sp)\n"
-"lw    $a0, 12($s0)\n"
-"lui   $v0, %hi(D_80072974)\n"
-"lw    $v0, %lo(D_80072974)($v0)\n"
-"nop\n"
-"jalr  $v0\n"
-" addiu $a0, $a0, 480\n"
-"lw    $a0, 12($s0)\n"
-"lui   $v0, %hi(D_80072974)\n"
-"lw    $v0, %lo(D_80072974)($v0)\n"
-"nop\n"
-"jalr  $v0\n"
-" addiu $a0, $a0, 720\n"
-".L8005EC4C:\n"
-"lbu   $v0, 54($s0)\n"
-"nop\n"
-"bnez  $v0, .L8005EC64\n"
-" addu $a1, $zero, $zero\n"
-"lui   $a1, %hi(D_800729A8)\n"
-"lw    $a1, %lo(D_800729A8)($a1)\n"
-".L8005EC64:\n"
-"jal   func_8005DE78\n"
-" addu $a0, $s0, $zero\n"
-"addu  $v1, $v0, $zero\n"
-"bltz  $v1, .L8005ECB0\n"
-" nop\n"
-"andi  $v0, $v1, 240\n"
-"bnez  $v0, .L8005EC8C\n"
-" andi $v0, $v1, 15\n"
-"j     .L8005ECB0\n"
-" addiu $v0, $zero, -9\n"
-".L8005EC8C:\n"
-"sll   $v0, $v0, 1\n"
-"lui   $at, %hi(D_800729D4)\n"
-"sw    $v0, %lo(D_800729D4)($at)\n"
-"bnez  $v0, .L8005ECB0\n"
-" addu $v0, $zero, $zero\n"
-"addiu $v0, $zero, 32\n"
-"lui   $at, %hi(D_800729D4)\n"
-"sw    $v0, %lo(D_800729D4)($at)\n"
-"addu  $v0, $zero, $zero\n"
-".L8005ECB0:\n"
-"lw    $ra, 20($sp)\n"
-"lw    $s0, 16($sp)\n"
-"jr    $ra\n"
-" addiu $sp, $sp, 24\n"
-".set\treorder\n.end\tfunc_8005EC00\n");
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005EC00);
 
 INCLUDE_ASM("asm/nonmatchings/800c3", func_8005ECC0);
 
@@ -1909,258 +1065,7 @@ INCLUDE_ASM("asm/nonmatchings/800c3", func_8005ECC0);
  * Byte-equivalent to the INCLUDE_ASM stub by construction; the function is NOT
  * decompiled (§265 ACCOUNTING). Immediates/offsets are decimal for maspsx (§383).
  */
-__asm__(
-    ".text\n"
-    ".align\t2\n"
-    ".globl\tfunc_8005ED4C\n"
-    ".ent\tfunc_8005ED4C\n"
-    "func_8005ED4C:\n"
-    ".frame\t$sp,48,$31\n"
-    ".mask\t0x803F0000,-4\n"
-    ".fmask\t0,0\n"
-    ".set\tnoreorder\n"
-    "addiu $sp,$sp,-48\n"
-    "sw $s1,20($sp)\n"
-    "addu $s1,$a0,$zero\n"
-    "lui $v0,%hi(D_80072968)\n"
-    "lw $v0,%lo(D_80072968)($v0)\n"
-    "sw $ra,40($sp)\n"
-    "sw $s5,36($sp)\n"
-    "sw $s4,32($sp)\n"
-    "sw $s3,28($sp)\n"
-    "sw $s2,24($sp)\n"
-    "jalr $v0\n"
-    " sw $s0,16($sp)\n"
-    "lui $v0,%hi(D_800729A8)\n"
-    "lw $v0,%lo(D_800729A8)($v0)\n"
-    "nop\n"
-    "beqz $v0,.L8005EDB8\n"
-    " addu $s4,$zero,$zero\n"
-    "lw $v0,60($s1)\n"
-    "nop\n"
-    "lbu $v0,0($v0)\n"
-    "addiu $v1,$zero,8\n"
-    "sra $v0,$v0,4\n"
-    "bne $v0,$v1,.L8005EDB8\n"
-    " nop\n"
-    "lbu $v0,54($s1)\n"
-    "nop\n"
-    "sltiu $s4,$v0,1\n"
-    ".L8005EDB8:\n"
-    "beqz $s4,.L8005EE54\n"
-    " nop\n"
-    "addiu $s0,$zero,-1\n"
-    "addiu $s2,$zero,-240\n"
-    ".L8005EDC8:\n"
-    "lui $v0,%hi(D_800729D4)\n"
-    "lw $v0,%lo(D_800729D4)($v0)\n"
-    "nop\n"
-    "addiu $v0,$v0,-1\n"
-    "lui $at,%hi(D_800729D4)\n"
-    "blez $v0,.L8005EE54\n"
-    " sw $v0,%lo(D_800729D4)($at)\n"
-    "bltz $s0,.L8005EE04\n"
-    " nop\n"
-    "lw $a0,12($s1)\n"
-    "lui $v0,%hi(D_80072968)\n"
-    "lw $v0,%lo(D_80072968)($v0)\n"
-    "nop\n"
-    "jalr $v0\n"
-    " addu $a0,$a0,$s2\n"
-    ".L8005EE04:\n"
-    "addu $a0,$s1,$zero\n"
-    "lui $v0,%hi(D_80072964)\n"
-    "lw $v0,%lo(D_80072964)($v0)\n"
-    "nop\n"
-    "jalr $v0\n"
-    " addiu $a1,$zero,1\n"
-    "addu $a0,$s1,$zero\n"
-    "jal func_8005DE78\n"
-    " andi $a1,$v0,255\n"
-    "bltz $v0,.L8005F0A4\n"
-    " nop\n"
-    "jal func_8005FBA8\n"
-    " addiu $a0,$zero,60\n"
-    "jal func_8005E0AC\n"
-    " nop\n"
-    "beqz $v0,.L8005EFC8\n"
-    " addiu $s0,$s0,1\n"
-    "slti $v0,$s0,4\n"
-    "bnez $v0,.L8005EDC8\n"
-    " addiu $s2,$s2,240\n"
-    ".L8005EE54:\n"
-    "lui $v1,%hi(D_8007299C)\n"
-    "lw $v1,%lo(D_8007299C)($v1)\n"
-    "lui $v0,%hi(D_800729D4)\n"
-    "lw $v0,%lo(D_800729D4)($v0)\n"
-    "nop\n"
-    "slti $v0,$v0,2\n"
-    "bnez $v0,.L8005F040\n"
-    " sltiu $a0,$v1,1\n"
-    "lui $v1,%hi(D_800729B4)\n"
-    "addiu $v1,$v1,%lo(D_800729B4)\n"
-    "sll $v0,$a0,2\n"
-    "addu $s0,$v0,$v1\n"
-    "sll $v0,$a0,4\n"
-    "subu $v0,$v0,$a0\n"
-    "sll $s2,$v0,4\n"
-    "addiu $s5,$zero,3\n"
-    ".L8005EE94:\n"
-    "lw $a0,0($s0)\n"
-    "nop\n"
-    "bltz $a0,.L8005F040\n"
-    " nop\n"
-    "blez $a0,.L8005EEE0\n"
-    " sll $v0,$a0,4\n"
-    "lui $v1,%hi(D_80072990)\n"
-    "lw $v1,%lo(D_80072990)($v1)\n"
-    "subu $v0,$v0,$a0\n"
-    "addu $v1,$s2,$v1\n"
-    "lw $v1,12($v1)\n"
-    "sll $v0,$v0,4\n"
-    "addu $v1,$v1,$v0\n"
-    "addiu $s3,$v1,-240\n"
-    "lui $v0,%hi(D_8007297C)\n"
-    "lw $v0,%lo(D_8007297C)($v0)\n"
-    "nop\n"
-    "jalr $v0\n"
-    " addu $a0,$s3,$zero\n"
-    ".L8005EEE0:\n"
-    "lw $v1,0($s0)\n"
-    "nop\n"
-    "beq $v1,$s5,.L8005EF28\n"
-    " nop\n"
-    "slti $v0,$v1,4\n"
-    "beqz $v0,.L8005EF14\n"
-    " slti $v0,$v1,2\n"
-    "beqz $v0,.L8005EF88\n"
-    " addu $a0,$s1,$zero\n"
-    "bltz $v1,.L8005EF88\n"
-    " nop\n"
-    "j .L8005EF44\n"
-    " nop\n"
-    ".L8005EF14:\n"
-    "addiu $v0,$zero,4\n"
-    "bne $v1,$v0,.L8005EF88\n"
-    " addu $a0,$s1,$zero\n"
-    "j .L8005EF88\n"
-    " sw $s5,0($s0)\n"
-    ".L8005EF28:\n"
-    "lui $v0,%hi(D_8007297C)\n"
-    "lw $v0,%lo(D_8007297C)($v0)\n"
-    "nop\n"
-    "jalr $v0\n"
-    " addiu $a0,$s3,-240\n"
-    "j .L8005EF80\n"
-    " addiu $v0,$zero,1\n"
-    ".L8005EF44:\n"
-    "lui $v0,%hi(D_80072990)\n"
-    "lw $v0,%lo(D_80072990)($v0)\n"
-    "nop\n"
-    "addu $s3,$v0,$s2\n"
-    "lui $v0,%hi(D_8007297C)\n"
-    "lw $v0,%lo(D_8007297C)($v0)\n"
-    "nop\n"
-    "jalr $v0\n"
-    " addu $a0,$s3,$zero\n"
-    "lui $v0,%hi(D_80072980)\n"
-    "lw $v0,%lo(D_80072980)($v0)\n"
-    "nop\n"
-    "jalr $v0\n"
-    " addu $a0,$s3,$zero\n"
-    "addiu $v0,$zero,-1\n"
-    ".L8005EF80:\n"
-    "sw $v0,0($s0)\n"
-    "addu $a0,$s1,$zero\n"
-    ".L8005EF88:\n"
-    "lui $v0,%hi(D_80072964)\n"
-    "lw $v0,%lo(D_80072964)($v0)\n"
-    "nop\n"
-    "jalr $v0\n"
-    " addu $a1,$s4,$zero\n"
-    "addu $a0,$s1,$zero\n"
-    "jal func_8005DCA0\n"
-    " andi $a1,$v0,255\n"
-    "bltz $v0,.L8005F0A4\n"
-    " nop\n"
-    "jal func_8005FBA8\n"
-    " addiu $a0,$zero,60\n"
-    "jal func_8005E0AC\n"
-    " nop\n"
-    "bnez $v0,.L8005EFD0\n"
-    " nop\n"
-    ".L8005EFC8:\n"
-    "j .L8005F0A4\n"
-    " addiu $v0,$zero,-3\n"
-    ".L8005EFD0:\n"
-    "lui $v0,%hi(D_800729D4)\n"
-    "lw $v0,%lo(D_800729D4)($v0)\n"
-    "nop\n"
-    "addiu $v0,$v0,-1\n"
-    "lui $at,%hi(D_800729D4)\n"
-    "sw $v0,%lo(D_800729D4)($at)\n"
-    "slti $v0,$v0,2\n"
-    "beqz $v0,.L8005EE94\n"
-    " nop\n"
-    "j .L8005F040\n"
-    " nop\n"
-    ".L8005EFFC:\n"
-    "addu $a0,$s1,$zero\n"
-    "lui $v0,%hi(D_80072964)\n"
-    "lw $v0,%lo(D_80072964)($v0)\n"
-    "nop\n"
-    "jalr $v0\n"
-    " addu $a1,$s4,$zero\n"
-    "addu $a0,$s1,$zero\n"
-    "jal func_8005DCA0\n"
-    " andi $a1,$v0,255\n"
-    "bltz $v0,.L8005F0A4\n"
-    " nop\n"
-    "jal func_8005FBA8\n"
-    " addiu $a0,$zero,60\n"
-    "jal func_8005E0AC\n"
-    " nop\n"
-    "beqz $v0,.L8005F0A4\n"
-    " addiu $v0,$zero,-3\n"
-    ".L8005F040:\n"
-    "lui $v0,%hi(D_800729D4)\n"
-    "lw $v0,%lo(D_800729D4)($v0)\n"
-    "nop\n"
-    "addiu $v0,$v0,-1\n"
-    "lui $at,%hi(D_800729D4)\n"
-    "bgtz $v0,.L8005EFFC\n"
-    " sw $v0,%lo(D_800729D4)($at)\n"
-    "jal func_8005E13C\n"
-    " nop\n"
-    "lbu $v1,68($s1)\n"
-    "nop\n"
-    "addiu $v0,$v1,1\n"
-    "sb $v0,68($s1)\n"
-    "lui $v0,%hi(D_800729D8)\n"
-    "lw $v0,%lo(D_800729D8)($v0)\n"
-    "lw $a0,60($s1)\n"
-    "lbu $v0,0($v0)\n"
-    "addu $v1,$v1,$a0\n"
-    "sb $v0,0($v1)\n"
-    "lui $v0,%hi(D_8007295C)\n"
-    "lw $v0,%lo(D_8007295C)($v0)\n"
-    "nop\n"
-    "jalr $v0\n"
-    " addu $a0,$zero,$zero\n"
-    "addu $v0,$zero,$zero\n"
-    ".L8005F0A4:\n"
-    "lw $ra,40($sp)\n"
-    "lw $s5,36($sp)\n"
-    "lw $s4,32($sp)\n"
-    "lw $s3,28($sp)\n"
-    "lw $s2,24($sp)\n"
-    "lw $s1,20($sp)\n"
-    "lw $s0,16($sp)\n"
-    "jr $ra\n"
-    " addiu $sp,$sp,48\n"
-    ".set\treorder\n"
-    ".end\tfunc_8005ED4C\n"
-);
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005ED4C);
 
 INCLUDE_ASM("asm/nonmatchings/800c3", func_8005F0C8);
 
@@ -2238,196 +1143,7 @@ s32 func_8005F394(u8 *arg0) {
  * Byte-equivalent to the INCLUDE_ASM stub by construction; the function is NOT
  * decompiled (§265 ACCOUNTING). Immediates/offsets are decimal for maspsx (§383).
  */
-__asm__(
-    ".text\n"
-    ".align\t2\n"
-    ".globl\tfunc_8005F450\n"
-    ".ent\tfunc_8005F450\n"
-    "func_8005F450:\n"
-    ".frame\t$sp,24,$31\n"
-    ".mask\t0x80010000,0\n"
-    ".fmask\t0,0\n"
-    ".set\tnoreorder\n"
-    "addiu $sp,$sp,-24\n"
-    "sw $s0,16($sp)\n"
-    "addu $s0,$a0,$zero\n"
-    "addiu $a0,$s0,87\n"
-    "sw $ra,20($sp)\n"
-    "jal func_8005C2C8\n"
-    " addiu $a1,$zero,6\n"
-    "lhu $v0,230($s0)\n"
-    "nop\n"
-    "beqz $v0,.L8005F5C8\n"
-    " nop\n"
-    "lw $v0,40($s0)\n"
-    "nop\n"
-    "beqz $v0,.L8005F5C8\n"
-    " nop\n"
-    "lbu $v0,52($s0)\n"
-    "nop\n"
-    "sltiu $v0,$v0,7\n"
-    "beqz $v0,.L8005F4A4\n"
-    " addiu $t1,$zero,6\n"
-    "lbu $t1,52($s0)\n"
-    ".L8005F4A4:\n"
-    "lbu $v0,233($s0)\n"
-    "nop\n"
-    "beqz $v0,.L8005F6BC\n"
-    " addu $t0,$zero,$zero\n"
-    "addiu $t3,$zero,1\n"
-    "addu $t2,$zero,$zero\n"
-    ".L8005F4BC:\n"
-    "lw $v0,4($s0)\n"
-    "addu $a2,$zero,$zero\n"
-    "addu $v0,$t2,$v0\n"
-    "lbu $v0,2($v0)\n"
-    "nop\n"
-    "beqz $v0,.L8005F4DC\n"
-    " addiu $a3,$zero,1\n"
-    "addiu $a3,$zero,255\n"
-    ".L8005F4DC:\n"
-    "addiu $a1,$s0,93\n"
-    "lw $a0,40($s0)\n"
-    "beqz $t1,.L8005F524\n"
-    " addu $v1,$zero,$zero\n"
-    ".L8005F4EC:\n"
-    "lbu $v0,0($a1)\n"
-    "nop\n"
-    "bne $v0,$t0,.L8005F510\n"
-    " nop\n"
-    "lbu $v0,0($a0)\n"
-    "nop\n"
-    "and $v0,$v0,$a3\n"
-    "bnez $v0,.L8005F564\n"
-    " nop\n"
-    ".L8005F510:\n"
-    "addiu $a1,$a1,1\n"
-    "addiu $v1,$v1,1\n"
-    "slt $v0,$v1,$t1\n"
-    "bnez $v0,.L8005F4EC\n"
-    " addiu $a0,$a0,1\n"
-    ".L8005F524:\n"
-    "beqz $a2,.L8005F5AC\n"
-    " nop\n"
-    "lw $v0,4($s0)\n"
-    "nop\n"
-    "addu $v0,$t2,$v0\n"
-    "lbu $v1,3($v0)\n"
-    "lui $v0,%hi(D_800729A4)\n"
-    "lw $v0,%lo(D_800729A4)($v0)\n"
-    "nop\n"
-    "addu $v1,$v0,$v1\n"
-    "slti $v0,$v1,61\n"
-    "beqz $v0,.L8005F56C\n"
-    " nop\n"
-    "lui $at,%hi(D_800729A4)\n"
-    "j .L8005F570\n"
-    " sw $v1,%lo(D_800729A4)($at)\n"
-    ".L8005F564:\n"
-    "j .L8005F524\n"
-    " addiu $a2,$zero,1\n"
-    ".L8005F56C:\n"
-    "addu $a2,$zero,$zero\n"
-    ".L8005F570:\n"
-    "beqz $a2,.L8005F5AC\n"
-    " nop\n"
-    "addiu $a1,$s0,93\n"
-    "addiu $a0,$s0,87\n"
-    "beqz $t1,.L8005F5AC\n"
-    " addu $v1,$zero,$zero\n"
-    ".L8005F588:\n"
-    "lbu $v0,0($a1)\n"
-    "nop\n"
-    "bne $v0,$t0,.L8005F59C\n"
-    " addiu $a1,$a1,1\n"
-    "sb $t3,0($a0)\n"
-    ".L8005F59C:\n"
-    "addiu $v1,$v1,1\n"
-    "slt $v0,$v1,$t1\n"
-    "bnez $v0,.L8005F588\n"
-    " addiu $a0,$a0,1\n"
-    ".L8005F5AC:\n"
-    "lbu $v0,233($s0)\n"
-    "addiu $t0,$t0,1\n"
-    "slt $v0,$t0,$v0\n"
-    "bnez $v0,.L8005F4BC\n"
-    " addiu $t2,$t2,5\n"
-    "j .L8005F6BC\n"
-    " nop\n"
-    ".L8005F5C8:\n"
-    "lbu $v1,232($s0)\n"
-    "nop\n"
-    "addiu $v0,$v1,-4\n"
-    "sltiu $v0,$v0,2\n"
-    "bnez $v0,.L8005F5E8\n"
-    " addiu $v0,$zero,7\n"
-    "bne $v1,$v0,.L8005F67C\n"
-    " nop\n"
-    ".L8005F5E8:\n"
-    "lhu $v0,230($s0)\n"
-    "nop\n"
-    "bnez $v0,.L8005F67C\n"
-    " nop\n"
-    "lbu $v0,52($s0)\n"
-    "nop\n"
-    "sltiu $v0,$v0,2\n"
-    "bnez $v0,.L8005F67C\n"
-    " addiu $v1,$zero,64\n"
-    "lw $a0,40($s0)\n"
-    "nop\n"
-    "lbu $v0,0($a0)\n"
-    "nop\n"
-    "andi $v0,$v0,192\n"
-    "bne $v0,$v1,.L8005F6BC\n"
-    " nop\n"
-    "lbu $v0,1($a0)\n"
-    "nop\n"
-    "andi $v0,$v0,1\n"
-    "beqz $v0,.L8005F6BC\n"
-    " nop\n"
-    "lui $v0,%hi(D_800729A4)\n"
-    "lw $v0,%lo(D_800729A4)($v0)\n"
-    "nop\n"
-    "addiu $v0,$v0,10\n"
-    "slti $v0,$v0,61\n"
-    "beqz $v0,.L8005F6BC\n"
-    " addiu $v0,$zero,1\n"
-    "sb $v0,88($s0)\n"
-    "sb $v0,87($s0)\n"
-    "lui $v0,%hi(D_800729A4)\n"
-    "lw $v0,%lo(D_800729A4)($v0)\n"
-    "nop\n"
-    "addiu $v0,$v0,10\n"
-    "lui $at,%hi(D_800729A4)\n"
-    "j .L8005F6BC\n"
-    " sw $v0,%lo(D_800729A4)($at)\n"
-    ".L8005F67C:\n"
-    "lbu $v1,232($s0)\n"
-    "addiu $v0,$zero,3\n"
-    "bne $v1,$v0,.L8005F694\n"
-    " addiu $v0,$zero,1\n"
-    "j .L8005F6BC\n"
-    " sb $v0,87($s0)\n"
-    ".L8005F694:\n"
-    "lhu $v0,230($s0)\n"
-    "nop\n"
-    "bnez $v0,.L8005F6BC\n"
-    " addiu $v0,$zero,1\n"
-    "addiu $v1,$zero,5\n"
-    "addiu $a0,$s0,5\n"
-    ".L8005F6AC:\n"
-    "sb $v0,87($a0)\n"
-    "addiu $v1,$v1,-1\n"
-    "bgez $v1,.L8005F6AC\n"
-    " addiu $a0,$a0,-1\n"
-    ".L8005F6BC:\n"
-    "lw $ra,20($sp)\n"
-    "lw $s0,16($sp)\n"
-    "jr $ra\n"
-    " addiu $sp,$sp,24\n"
-    ".set\treorder\n"
-    ".end\tfunc_8005F450\n"
-);
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005F450);
 
 
 extern u8 D_80078A48;
@@ -2557,79 +1273,7 @@ INCLUDE_ASM("asm/nonmatchings/800c3", func_8005F830);
  * Byte-equivalent to the INCLUDE_ASM stub by construction; the function is NOT
  * decompiled (§265 ACCOUNTING). Immediates/offsets are decimal for maspsx (§383).
  */
-__asm__(
-    ".text\n"
-    ".align\t2\n"
-    ".globl\tfunc_8005FA94\n"
-    ".ent\tfunc_8005FA94\n"
-    "func_8005FA94:\n"
-    ".frame\t$sp,24,$31\n"
-    ".mask\t0x80010000,0\n"
-    ".fmask\t0,0\n"
-    ".set\tnoreorder\n"
-    "addiu $sp,$sp,-24\n"
-    "sw $s0,16($sp)\n"
-    "addu $s0,$a0,$zero\n"
-    "sw $ra,20($sp)\n"
-    "lw $v0,76($s0)\n"
-    "lbu $v1,70($s0)\n"
-    "addiu $v0,$v0,1\n"
-    "beqz $v1,.L8005FB2C\n"
-    " sw $v0,76($s0)\n"
-    "addiu $v0,$zero,1\n"
-    "bne $v1,$v0,.L8005FAEC\n"
-    " nop\n"
-    "lbu $v1,74($s0)\n"
-    "nop\n"
-    "sltiu $v0,$v1,2\n"
-    "bnez $v0,.L8005FB00\n"
-    " addiu $v0,$v1,1\n"
-    "addiu $v0,$zero,2\n"
-    "sb $v0,73($s0)\n"
-    "addiu $v0,$zero,255\n"
-    "j .L8005FB60\n"
-    " sb $v0,70($s0)\n"
-    ".L8005FAEC:\n"
-    "lbu $v1,74($s0)\n"
-    "nop\n"
-    "sltiu $v0,$v1,4\n"
-    "beqz $v0,.L8005FB08\n"
-    " addiu $v0,$v1,1\n"
-    ".L8005FB00:\n"
-    "j .L8005FB60\n"
-    " sb $v0,74($s0)\n"
-    ".L8005FB08:\n"
-    "lbu $v0,73($s0)\n"
-    "nop\n"
-    "beqz $v0,.L8005FB2C\n"
-    " nop\n"
-    "lui $v0,%hi(D_80072960)\n"
-    "lw $v0,%lo(D_80072960)($v0)\n"
-    "nop\n"
-    "jalr $v0\n"
-    " addu $a0,$s0,$zero\n"
-    ".L8005FB2C:\n"
-    "lw $v0,60($s0)\n"
-    "nop\n"
-    "lbu $v1,0($v0)\n"
-    "addiu $v0,$zero,243\n"
-    "beq $v1,$v0,.L8005FB60\n"
-    " addiu $v1,$zero,255\n"
-    "lw $v0,48($s0)\n"
-    "nop\n"
-    "sb $v1,0($v0)\n"
-    "lw $v0,48($s0)\n"
-    "nop\n"
-    "sb $zero,1($v0)\n"
-    "sb $zero,232($s0)\n"
-    ".L8005FB60:\n"
-    "lw $ra,20($sp)\n"
-    "lw $s0,16($sp)\n"
-    "jr $ra\n"
-    " addiu $sp,$sp,24\n"
-    ".set\treorder\n"
-    ".end\tfunc_8005FA94\n"
-);
+INCLUDE_ASM("asm/nonmatchings/800c3", func_8005FA94);
 
 s32 func_8005FB70(void *arg0) {
     register s32 ff __asm__("$2");