diff --git a/.run/P36/agents/ORDER.tsv b/.run/P36/agents/ORDER.tsv index 51dae05bc..e943dd19e 100644 --- a/.run/P36/agents/ORDER.tsv +++ b/.run/P36/agents/ORDER.tsv @@ -1,5 +1,13 @@ rank fn alias copies best needed kinds regs tu -92 func_80180598 ov_SC01_080 1 2 2 pin $16,$17 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c -129 func_8018230C ov_SC01_080 1 6 1 pin $3 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c -98 func_801809E4 ov_SC01_080 1 21 1 pin $19 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c -123 func_80181D98 ov_SC01_080 1 21 1 pin $16 src/ov_SC01_080/ov_SC01_080_jr_8017AE2C.c +110 func_80185D44 ov_SC06_029 1 2 1 launder src/ov_SC06_029/ov_SC06_029_jr_8017C954.c +60 func_80181708 ov_SC06_029 1 2 2 barrier,pin $3 src/ov_SC06_029/ov_SC06_029_jr_8017C954.c +210 func_8001A114 main 1 4 2 launder src/800.c +134 func_800168C4 main 1 8 2 barrier,pin $3 src/800.c +257 func_8001C320 main 1 10 2 launder,pin $17 src/800.c +11 func_80036AF8 main 1 11 1 pin $0 src/800_c.c +261 func_8001C5B8 main 1 11 2 launder,pin $17 src/800.c +100 func_80184EFC ov_SC06_029 1 11 2 pin $16,$2 src/ov_SC06_029/ov_SC06_029_jr_8017C954.c +33 func_80037F3C main 1 14 1 pin $16 src/800_c.c +4 func_800359B0 main 1 18 1 barrier src/800_c.c +32 func_80037EA0 main 1 18 1 pin $16 src/800_c.c +3 func_8017C954 ov_SC06_029 1 581 1 barrier src/ov_SC06_029/ov_SC06_029_jr_8017C954.c diff --git a/.run/P36/agents/main__func_800168C4/body_free.c b/.run/P36/agents/main__func_800168C4/body_free.c new file mode 100644 index 000000000..f1e07315a --- /dev/null +++ b/.run/P36/agents/main__func_800168C4/body_free.c @@ -0,0 +1,18 @@ +s32 func_800168C4(s32 arg0) { + s32 t; + u8 *base = D_800AF630; + + arg0 &= 3; + if (arg0 == 0) { + t = D_80062BA0[D_800B9A18]; + } else { + t = D_80062BA0[arg0]; + } + D_800AF7CE += t; + + t = *(u16 *) (base + 0x19E); + if (t >= 0xFFU) { + return *(u16 *) (base + 0x188) != 0; + } + return 0; +} diff --git a/.run/P36/agents/main__func_800168C4/body_tree.c b/.run/P36/agents/main__func_800168C4/body_tree.c new file mode 100644 index 000000000..c72c7b09c --- /dev/null +++ b/.run/P36/agents/main__func_800168C4/body_tree.c @@ -0,0 +1,19 @@ +s32 func_800168C4(s32 arg0) { + register s32 t __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus9) + u8 *base = D_800AF630; + + arg0 &= 3; + if (arg0 == 0) { + t = D_80062BA0[D_800B9A18]; + } else { + t = D_80062BA0[arg0]; + } + D_800AF7CE += t; + __asm__ __volatile__("" : : : "memory"); // !FAKE: barrier memory — NEEDED DIFFERS (P36 rung B tus9) + + t = *(u16 *) (base + 0x19E); + if (t >= 0xFFU) { + return *(u16 *) (base + 0x188) != 0; + } + return 0; +} diff --git a/.run/P36/agents/main__func_800168C4/history.txt b/.run/P36/agents/main__func_800168C4/history.txt new file mode 100644 index 000000000..f78679aeb --- /dev/null +++ b/.run/P36/agents/main__func_800168C4/history.txt @@ -0,0 +1,14 @@ +s5: verdict NO-MATCH start 17 best 8 compiles 86 path R12 width t s32->u16 @3929 +best-scoring single candidates of the last trace (move -> score [residual class]): + R12 width t s32->u16 @3929 -> 8 [COUNT] (from 17) + R12 width t s32->s16 @3929 -> 8 [COUNT] (from 17) + R6 inline t @3940 -> 8 [COUNT] (from 17) + R14 param-width arg0 s32->s16 @3928 -> 8 [COUNT] (from 8) + R8 temp tmp0 @3940 -> 8 [COUNT] (from 8) + R18 bystander @3938->3940 -> 8 [COUNT] (from 8) + R7 block @3938 -> 8 [COUNT] (from 8) + R10 param-copy arg0 @3931 -> 8 [COUNT] (from 8) + R4 decl-move t 0->1 -> 8 [COUNT] (from 8) + R14 param-width arg0 s32->u16 @3928 -> 8 [COUNT] (from 8) + R8 base tmp0 @3940 -> 8 [COUNT] (from 8) + R14 param-width arg0 s32->u8 @3928 -> 8 [COUNT] (from 8) diff --git a/.run/P36/agents/main__func_800168C4/neighbours.txt b/.run/P36/agents/main__func_800168C4/neighbours.txt new file mode 100644 index 000000000..cc55d0948 --- /dev/null +++ b/.run/P36/agents/main__func_800168C4/neighbours.txt @@ -0,0 +1,9 @@ +--- every @class/@stuck/@crack note in this translation unit --- + * @class: MATCH — 120/120 byte-exact under tools/match_one.py AND + * @class: MATCH — 131/131 byte-exact (relocation-masked), and + * @class: (was regalloc-order / sched) + * @stuck: none — MATCH, 122/122 instructions, byte-exact under match_one, and + * @class: was regalloc-order + IOR-tree reassociation + * @stuck: none — MATCH (128 ins), byte-exact under match_one. + * @class: MATCH (was LENGTH-DRIFT/+1 -> ADDRESSING -> MATCH) + * @class: MATCH (was SCHEDULE-REORDER/2) diff --git a/.run/P36/agents/main__func_800168C4/related.txt b/.run/P36/agents/main__func_800168C4/related.txt new file mode 100644 index 000000000..314eef904 --- /dev/null +++ b/.run/P36/agents/main__func_800168C4/related.txt @@ -0,0 +1,38 @@ +=== lever-free bodies in main sharing a callee or global with func_800168C4 (49 found; top 6 by shared symbols) — read them for the SHAPE === +--- func_800168B4 (src/800.c:3833) shares 1: D_800AF7CE --- +void func_800168B4(void) { + D_800AF7CE = 0; +} + +--- GameModeDispatch (src/boot.c:454) shares 1: D_800AF630 --- +void GameModeDispatch(void) { + register u8 *p = D_800AF630; + gameModeHandlerTable[*(u16 *)(p + 0xA3AE)](); +} + +--- func_8001099C (src/boot.c:407) shares 1: D_800AF630 --- +void func_8001099C(void) { + register u8 *p = D_800AF630; + D_800AE810[*(u16 *)(p + 0xA3D2)] = VSync(1); +} + +--- func_80010DA0 (src/boot.c:532) shares 1: D_800AF630 --- +void func_80010DA0(void) { + register u8 *p = D_800AF630; + func_80011778(); +} + +--- func_80011998 (src/boot.c:901) shares 1: D_800AF630 --- +void func_80011998(void) { + register u8 *p = D_800AF630; + (*(u16 *)(p + 0xA3BA))++; + *(u16 *)(p + 0xA3BC) = 0; +} + +--- func_800119F0 (src/boot.c:909) shares 1: D_800AF630 --- +void func_800119F0(u16 arg0) { + register u8 *p = D_800AF630; + *(u16 *)(p + 0xA3BA) = arg0; + *(u16 *)(p + 0xA3BC) = 0; +} + diff --git a/.run/P36/agents/main__func_800168C4/residual.txt b/.run/P36/agents/main__func_800168C4/residual.txt new file mode 100644 index 000000000..f94dcfd60 --- /dev/null +++ b/.run/P36/agents/main__func_800168C4/residual.txt @@ -0,0 +1,24 @@ +src/800.c:func_800168C4: score 17 (COUNT; mine 25 ins, target 31) — not yet + register pairs (mine -> target, count): v1->a1 x4, v0->a0 x1 + replace mine[0:4] target[0:4] + 0 lui v1,0x0 | lui a1,0x0 + 1 addiu v1,v1,0 | addiu a1,a1,0 + 2 andi v0,a0,0x3 | andi a0,a0,0x3 + 3 bnez v0,44f0 | bnez a0,4504 + replace mine[9:10] target[9:15] + 9 lbu a0,0(at) | lbu v1,0(at) + 10 -- | j 4510 + 11 -- | nop + 12 -- | lui at,0x0 + 13 -- | addu at,at,a0 + 14 -- | lbu v1,0(at) + replace mine[13:15] target[18:19] + 13 addu v0,v0,a0 | addu v0,v0,v1 + 14 lhu a0,414(v1) | -- + replace mine[17:19] target[21:25] + 17 sltiu v0,a0,255 | lhu v1,414(a1) + 18 bnez v0,4530 | nop + 19 -- | sltiu v1,v1,255 + 20 -- | bnez v1,4548 + replace mine[20:21] target[26:27] + 20 lhu v0,392(v1) | lhu v0,392(a1) diff --git a/.run/P36/agents/main__func_800168C4/sites.txt b/.run/P36/agents/main__func_800168C4/sites.txt new file mode 100644 index 000000000..cfa4a70d1 --- /dev/null +++ b/.run/P36/agents/main__func_800168C4/sites.txt @@ -0,0 +1,3 @@ +REMOVED register paren line 4038 +NEEDED pin $3 line 4039 +NEEDED barrier memory line 4049 diff --git a/.run/P36/agents/main__func_800168C4/tu.txt b/.run/P36/agents/main__func_800168C4/tu.txt new file mode 100644 index 000000000..df88c6f55 --- /dev/null +++ b/.run/P36/agents/main__func_800168C4/tu.txt @@ -0,0 +1,2 @@ +src/800.c +func_800168C4 diff --git a/.run/P36/agents/main__func_8001A114/body_free.c b/.run/P36/agents/main__func_8001A114/body_free.c new file mode 100644 index 000000000..e64c00cf1 --- /dev/null +++ b/.run/P36/agents/main__func_8001A114/body_free.c @@ -0,0 +1,86 @@ +int func_8001A114(void) { + int ret; + u8 *p; + int r; + int i; + CdlFILE *fp; + int *rp; + s32 *sp; + int c0; + int c1; + + ret = 0; + switch (D_800AE6F4) { + case 0: + func_800434BC(); + c0 = 1; + c1 = 0; + p = &cdReq_cdResult; + func_80043830(c0, (u8 *)c1, p); + if ((*p & 0x10) != 0) { + break; + } + D_800AE6F4 = D_800AE6F4 + 1; + /* fallthrough */ + case 1: + r = func_80046630(0); + if (r == 2) { + goto bump; + } + if (r != 0x10) { + break; + } + reset: + D_800AE6F4 = 0; + break; + case 2: + p = &D_800AE740; + *p = 0x80; + if (func_80043830(0xE, p, p - 8) == 0) { + break; + } + if ((p[-8] & 0x10) != 0) { + goto reset; + } + cdReq_retry = 0; + D_800AE6F4 = D_800AE6F4 + 1; + break; + case 3: + rp = &cdReq_retry; + *rp = *rp + 1; + if (*rp < 3) { + break; + } + *rp = 0; + D_800AE6F4 = D_800AE6F4 + 1; + break; + case 4: + r = func_8004674C(); + if ((r == 1) || (r == 0x10) || (r == 0)) { + D_800AE6F4 = 0; + } + if (r != 2) { + break; + } + bump: + sp = &D_800AE6F4; + *sp = *sp + 1; + break; + case 5: + i = 0; + fp = &D_80063028; + do { + r = (int)CdSearchFile(fp, (char *)fp - 0x14); + if (r != -1) { + break; + } + i = i + 1; + } while (i < 0x10); + if ((u32)(r + 1) < 2) { + goto reset; + } + ret = 1; + break; + } + return ret; +} diff --git a/.run/P36/agents/main__func_8001A114/body_tree.c b/.run/P36/agents/main__func_8001A114/body_tree.c new file mode 100644 index 000000000..5cfd48796 --- /dev/null +++ b/.run/P36/agents/main__func_8001A114/body_tree.c @@ -0,0 +1,88 @@ +int func_8001A114(void) { + int ret; + u8 *p; + int r; + int i; + CdlFILE *fp; + int *rp; + s32 *sp; + int c0; + int c1; + + ret = 0; + switch (D_800AE6F4) { + case 0: + func_800434BC(); + c0 = 1; + __asm__ __volatile__("" : "=r"(c0) : "0"(c0)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) + c1 = 0; + __asm__ __volatile__("" : "=r"(c1) : "0"(c1)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) + p = &cdReq_cdResult; + func_80043830(c0, (u8 *)c1, p); + if ((*p & 0x10) != 0) { + break; + } + D_800AE6F4 = D_800AE6F4 + 1; + /* fallthrough */ + case 1: + r = func_80046630(0); + if (r == 2) { + goto bump; + } + if (r != 0x10) { + break; + } + reset: + D_800AE6F4 = 0; + break; + case 2: + p = &D_800AE740; + *p = 0x80; + if (func_80043830(0xE, p, p - 8) == 0) { + break; + } + if ((p[-8] & 0x10) != 0) { + goto reset; + } + cdReq_retry = 0; + D_800AE6F4 = D_800AE6F4 + 1; + break; + case 3: + rp = &cdReq_retry; + *rp = *rp + 1; + if (*rp < 3) { + break; + } + *rp = 0; + D_800AE6F4 = D_800AE6F4 + 1; + break; + case 4: + r = func_8004674C(); + if ((r == 1) || (r == 0x10) || (r == 0)) { + D_800AE6F4 = 0; + } + if (r != 2) { + break; + } + bump: + sp = &D_800AE6F4; + *sp = *sp + 1; + break; + case 5: + i = 0; + fp = &D_80063028; + do { + r = (int)CdSearchFile(fp, (char *)fp - 0x14); + if (r != -1) { + break; + } + i = i + 1; + } while (i < 0x10); + if ((u32)(r + 1) < 2) { + goto reset; + } + ret = 1; + break; + } + return ret; +} diff --git a/.run/P36/agents/main__func_8001A114/history.txt b/.run/P36/agents/main__func_8001A114/history.txt new file mode 100644 index 000000000..e0aeee327 --- /dev/null +++ b/.run/P36/agents/main__func_8001A114/history.txt @@ -0,0 +1,14 @@ +s5: verdict NO-MATCH start 4 best 4 compiles 178 path +best-scoring single candidates of the last trace (move -> score [residual class]): + R18 bystander @7255->7258 -> 4 [ORDER] (from 4) + R9 swap-stmts @7255 -> 4 [ORDER] (from 4) + R7 block @7255 -> 4 [ORDER] (from 4) + R16 const-holder c0=1 x1 -> 4 [ORDER] (from 4) + R6 inline c0 @7256 -> 4 [ORDER] (from 4) + R12 width c1 int->u16 @7250 -> 4 [ORDER] (from 4) + R18 bystander @7255->7259 -> 4 [ORDER] (from 4) + R9 swap-stmts @7256 -> 4 [ORDER] (from 4) + R7 do-while @7255 -> 4 [ORDER] (from 4) + R16 const-holder c1=0 x1 -> 4 [ORDER] (from 4) + R8 hoist tmp0 @7290 -> 4 [ORDER] (from 4) + R12 width c1 int->s16 @7250 -> 4 [ORDER] (from 4) diff --git a/.run/P36/agents/main__func_8001A114/neighbours.txt b/.run/P36/agents/main__func_8001A114/neighbours.txt new file mode 100644 index 000000000..cc55d0948 --- /dev/null +++ b/.run/P36/agents/main__func_8001A114/neighbours.txt @@ -0,0 +1,9 @@ +--- every @class/@stuck/@crack note in this translation unit --- + * @class: MATCH — 120/120 byte-exact under tools/match_one.py AND + * @class: MATCH — 131/131 byte-exact (relocation-masked), and + * @class: (was regalloc-order / sched) + * @stuck: none — MATCH, 122/122 instructions, byte-exact under match_one, and + * @class: was regalloc-order + IOR-tree reassociation + * @stuck: none — MATCH (128 ins), byte-exact under match_one. + * @class: MATCH (was LENGTH-DRIFT/+1 -> ADDRESSING -> MATCH) + * @class: MATCH (was SCHEDULE-REORDER/2) diff --git a/.run/P36/agents/main__func_8001A114/related.txt b/.run/P36/agents/main__func_8001A114/related.txt new file mode 100644 index 000000000..15cf939e1 --- /dev/null +++ b/.run/P36/agents/main__func_8001A114/related.txt @@ -0,0 +1,621 @@ +=== lever-free bodies in main sharing a callee or global with func_8001A114 (6 found; top 6 by shared symbols) — read them for the SHAPE === +--- func_8001A0FC (src/800.c:7124) shares 1: D_800AE6F4 --- +void func_8001A0FC(void) { + D_800AE6F4 = 0; + D_800AE70C = 0; +} + +--- func_8003602C (src/800_c.c:663) shares 1: func_800434BC --- +void func_8003602C(s32 arg0) { + u8 result[8]; + u8 state; + s32 sync; + + switch (*(u8 *)(arg0 + 3)) { + case 0: + case 1: + default: + *(u8 *)(arg0 + 2) = 0; + break; + case 2: + *(u8 *)(arg0 + 2) = 1; + func_800434BC(); + *(u8 *)(arg0 + 3) += 2; + break; + case 3: + *(u8 *)(arg0 + 2) = 1; + func_800434BC(); + *(u8 *)(arg0 + 3) += 1; + /* fall through */ + case 4: + func_80043704(9, 0); + func_8003621C(); + state = *(u8 *)(arg0 + 3); + *(u8 *)(arg0 + 2) = 1; + *(u8 *)(arg0 + 3) = state + 1; + break; + case 5: + sync = func_8004355C(1, result); + if (sync == 0) { + *(u8 *)(arg0 + 2) = 1; + return; + } + if (sync == 5 && (result[0] & 0x10)) { + D_80076214 = 1; + } + *(u8 *)(arg0 + 2) = 0; + break; + } +} + +--- func_80036260 (src/800_c.c:794) shares 1: func_800434BC --- +int func_80036260(void) { + u8 result[8]; + u16 *flags; + s16 *vabp; + s32 t; + int sync; + + func_80037334(); + D_8006AEF4 &= 0xFD; + flags = &D_800A4E8E; + *flags &= 0xFFDF; + + if (streamLoad_state != 0) { + switch (streamLoad_state) { + case 0: + case 1: + case 2: + break; + case 3: + case 4: + case 5: + case 6: + case 7: + case 8: + case 9: + case 10: + case 11: + case 15: + case 16: + case 17: + func_800434BC(); + break; + case 12: + if (streamLoad_cbActive != 0) { + CdReadyCallback(streamLoad_savedReadyCB); + streamLoad_savedReadyCB = 0; + streamLoad_cbActive = 0; + } + /* fall through */ + case 13: + case 14: + func_800435CC(9, 0, 0); + streamLoad_state = 0; + D_800A6544 = 0x3C; + break; + } + } + + if (D_800A6544 != 0) { + D_800A6544--; + if (D_800A6544 != 0) { + sync = func_8004355C(1, result); + if (sync != 5 && sync != 2) { + return 0; + } + } + } + + vabp = &D_800A46A2; + t = *vabp; + streamLoad_state = 0; + D_800A6544 = 0; + if (t >= 0) { + func_800415A8(t); + *vabp = -1; + D_800A46B0 = 1; + } + return 1; +} + +--- ResourceLoadStateMachine (src/800.c:8396) shares 1: D_800AE6F4 --- +void ResourceLoadStateMachine(void) { + s32 result; + /* The original keeps 8 bytes of frame the emitted code never touches (target frame 0x38, an + * empty-locals build gets 0x30). Reserved as a local so the prologue/epilogue offsets match. */ + s32 sp10[2]; + + result = 0; + switch ((u32)resLoad_state) { + case 0: + if (resLoad_curId == resLoad_lastId) { + resLoad_result = 1; + return; + } + if (RES_FILE[resLoad_curId].v == resLoad_loadedFileIdx && RES_POST[resLoad_curId].v != 0) { + func_8002D4C8((u16)RES_POST[resLoad_curId].v, 0); + resLoad_lastId = resLoad_curId; + resLoad_result = 1; + return; + } + if (CdQueueBusy() != 0) { + break; + } + if (RES_FILE[resLoad_curId].v < 0) { + ((void (*)())func_80036D58)(RES_ARG[resLoad_curId].v); + resLoad_result = 1; + return; + } + if (ResourceGetCdLoc((s16)resLoad_curId) == 0) { + resLoad_result = 1; + return; + } + if (cdReq_curSector != 0 && *(s32 *)(cdFileLocTable + RES_FILE[resLoad_curId].v * 8) != cdReq_curSector) { + break; + } + cdReq_curSector = *(s32 *)(cdFileLocTable + RES_FILE[resLoad_curId].v * 8); + resLoad_state++; + /* fallthrough */ + case 1: + result = StreamLoadStateMachine(RES_ARG[resLoad_curId].v, + &cdFileLocTable[RES_FILE[resLoad_curId].v * 8], 0x10); + if (result == 2) { + resLoad_state++; + result = 0; + } + break; + case 2: + D_800AE6F4 = 0; + D_800AE70C = 0; + resLoad_state = 3; + /* fallthrough */ + case 3: + if (func_8001A114() != 0) { + resLoad_state = 0; + } + break; + } + if (result != 0) { + resLoad_loadedFileIdx = RES_FILE[resLoad_curId].v; + if (RES_POST[resLoad_curId].v > 0) { + func_8002D4C8((u16)RES_POST[resLoad_curId].v, 0); + resLoad_lastId = resLoad_curId; + if (resLoad_curId == 0x3D) { + func_8001B710(); + } + } + resLoad_state = 0; + cdReq_curSector = 0; + } + resLoad_result = result; +} + +--- CdReadStateMachine (src/800.c:6914) shares 1: func_800434BC --- +void CdReadStateMachine(s32 pauseAfterSeek) { + s32 *rp; + s32 *dp; + s32 *sp7; + s32 *sp9; + u8 *p; + u8 *q; + u8 *p2; + u8 *p3; + u8 *p8; + void **fpp; + s32 r; + s32 st; + s32 n; + s32 i; + s32 off; + s32 pad[2]; + + switch (cdReq_state) { + case 0: + p = (u8 *)&cdReq_retry; + *(s32 *)p = 0; + D_800AE71C = 0; + D_800AE70C = 0; + q = p - 0x10; + *q = 0xA0; + func_800435CC(0xE, q, p - 0x18); + if ((p[-0x18] & 0x10) != 0) { + setStateNine: + cdReq_state = 9; + break; + } + cdReq_state++; + /* fallthrough */ + case 1: + r = func_8004355C(1, &cdReq_cdResult); + D_800AE6E8 = r; + if (r == 0) { + break; + } + if (r == 5) { + goto resetState; + } + if (r != 2) { + break; + } + cdReq_retry = 0; + cdReq_state++; + /* fallthrough */ + case 2: + rp = &cdReq_retry; + *rp = *rp + 1; + if (*rp < 3) { + break; + } + *rp = 0; + cdReq_state++; + break; + case 3: + fpp = &cdReq_cdlFile; + func_800435CC(0x15, (u8 *)*fpp, (u8 *)fpp - 0x6C); + if ((*((u8 *)fpp - 0x6C) & 0x10) != 0) { + goto setStateNine; + } + cdReq_timeout = 0; + cdReq_posInt = CdPosToInt((CdlLOC *)*fpp); + cdReq_state++; + /* fallthrough */ + case 4: + p2 = &cdReq_cdResult; + r = func_8004355C(1, p2); + D_800AE6E8 = r; + if (r == 5) { + cdReq_retry++; + flushRetry: + func_800434BC(); + cdReq_state = 3; + break; + } + if (r == 0) { + break; + } + if (r != 2) { + cdReq_result = 0; + cdReq_timeout++; + if (cdReq_timeout < 0xB5) { + return; + } + goto flushRetry; + } + if (pauseAfterSeek != 0) { + func_800435CC(9, 0, p2); + if ((*p2 & 0x10) != 0) { + goto setStateNine; + } + cdReq_state = 8; + D_800AE70C = *(s32 *)cdReq_cdlFile; + break; + } + cdReq_state++; + /* fallthrough */ + case 5: + cdReq_drainPhase = 0; + if (cdReq_size < 1) { + D_800AE6F8 = 0; + } else { + D_800AE6F8 = 3; + cdReq_wordsRemaining = (cdReq_size + 3) / 4; + D_800AE798 = 1; + cdReq_sink = (s32)cdReq_dest; + } + p3 = (u8 *)&cdReq_savedReadyCB; + *(void **)p3 = CdReadyCallback(CdReadSectorReadyCB); + func_800435CC(6, 0, p3 + 4); + if ((p3[4] & 0x10) != 0) { + goto setStateNine; + } + cdReq_retry = 0; + cdReq_state++; + /* fallthrough */ + case 6: + dp = &cdReq_drainPhase; + if (*dp == 1) { + CdReadyCallback(cdReq_savedReadyCB); + func_800435CC(9, 0, (u8 *)dp - 0x14); + if ((*((u8 *)dp - 0x14) & 0x10) != 0) { + goto setStateNine; + } + st = cdReq_state; + n = D_800AE71C; + cdReq_state = st + 1; + if (n == 0) { + cdReq_state = st + 2; + } + break; + } + if (*dp == 2) { + CdReadyCallback(cdReq_savedReadyCB); + goto resetState; + } + cdReq_retry++; + if (cdReq_retry < 0x12C) { + break; + } + CdReadyCallback(cdReq_savedReadyCB); + cdReq_state = 0; + func_800434BC(); + break; + case 7: + i = 0; + if (D_800AE71C > 0) { + do { + off = i * 8; + do { + r = func_8002FD14(*(s32 *)(off + D_800AE724), *(s32 *)(off + D_800AE724 + 4)); + } while (r == 0); + i++; + } while (i < D_800AE71C); + } + sp7 = &cdReq_state; + *sp7 = *sp7 + 1; + break; + case 8: + p8 = &cdReq_cdResult; + r = func_8004355C(1, p8); + D_800AE6E8 = r; + if (r == 2) { + cdReq_sink = 0x80010000; + cdReq_state = 0; + D_800AE6F8 = 0; + D_800AE6FC = 0; + D_800AE700 = 0; + cdReq_wordsRemaining = 1; + cdReq_drainPhase = 0; + D_800AE798 = 0; + D_800AE799 = 0; + D_800AE70C = 0; + cdReq_result = 1; + cdReq_curSector = 0; + return; + } + if (r != 5) { + break; + } + func_800434BC(); + func_800435CC(9, 0, p8); + if ((*p8 & 0x10) == 0) { + break; + } + goto setStateNine; + case 9: + func_8001A0FC(); + sp9 = &cdReq_state; + *sp9 = *sp9 + 1; + /* fallthrough */ + case 10: + D_800AE6E8 = func_8001A114(); + if (D_800AE6E8 == 0) { + break; + } + resetState: + cdReq_state = 0; + break; + } + cdReq_result = 0; +} + +--- StreamLoadStateMachine (src/800_c.c:1145) shares 1: func_800434BC --- +int StreamLoadStateMachine(int arg0, void *loc, int n) { + u8 cmd[8]; + u8 result[8]; + int pos; + int sync; + int resKind; + u8 *pb; + int *p28; + int *p2C; + int *p30; + int *p34; + u16 *flags; + int t; + int idx; + + idx = arg0 - 0x100; + resKind = *(short *)(D_80068B60 + idx * 0x10); + p28 = &D_800A4F28; + *p28 += 1; + switch (streamLoad_state) { + case 0: + D_800A4F30 = n; + *(u8 *)&D_800A4F38 = 0; + D_800A6544 = 0; + func_8002EC10(); + flags = &D_800A4E8E; + *flags &= 0xFFDF; + streamLoad_state++; + break; + case 1: + func_80037334(); + func_80037358(CdPosToInt((CdlLOC *)loc)); + func_80037144(resKind); + streamLoad_state++; + /* fall through */ + case 2: + sync = func_8004355C(1, result); + if (sync != 5 && sync != 2) break; + if ((func_80043420() & 0x80) != 0) { + D_800A4F2C = 0; + } else { + D_800A4F2C = 3; + } + streamLoad_state++; + /* fall through */ + case 3: + cmd[0] = 0xA0; + if (func_800435CC(0x0E, cmd, result) == 0) { /* CdlSetmode */ + if ((result[0] & 0x10) == 0) break; + func_80037334(); + streamLoad_state = 0; + return 2; + } + D_800A4F28 = 0; + streamLoad_state++; + /* fall through */ + case 4: + sync = func_8004355C(1, result); + if (sync == 5) { + streamLoad_state = 3; + break; + } + if (sync != 2) { + if (D_800A4F28 < 0x3D) break; + streamLoad_state = 3; + break; + } + streamLoad_state++; + /* fall through */ + case 5: + p2C = &D_800A4F2C; + if (*p2C != 0) { + *p2C -= 1; + break; + } + streamLoad_state++; + /* fall through */ + case 6: + if (func_80037CD8((void *)func_80036260) == 0) break; + streamLoad_state = 7; + /* fall through */ + case 7: + if (func_8003750C() == 0) break; + streamLoad_state++; + /* fall through */ + case 8: + sync = func_8004355C(1, result); + if (sync != 5 && sync != 2) break; + streamLoad_state++; + /* fall through */ + case 9: + D_800A4F28 = 0; + if (func_800435CC(0x15, loc, result) == 0) break; /* CdlSeekL */ + streamLoad_state++; + /* fall through */ + case 10: + sync = func_8004355C(1, result); + if (sync == 5) { + if (func_800435CC(1, 0, result) == 0) { /* CdlNop */ + streamLoad_state = 9; + break; + } + if ((result[0] & 0x10) == 0) { + streamLoad_state = 9; + break; + } + func_80037334(); + D_8006AEF4 &= 0xFD; + streamLoad_state = 0; + return 2; + } + if (sync != 2) { + if (D_800A4F28 < 0x12D) break; + func_800434BC(); + streamLoad_state = 9; + return 2; + } + streamLoad_state++; + /* fall through */ + case 11: + D_800A4F28 = 0; + if (func_800435CC(6, loc, result) == 0) { /* CdlReadN */ + if ((result[0] & 0x10) == 0) break; + D_8006AEF4 &= 0xFD; + func_80037334(); + streamLoad_state = 0; + return 2; + } + if (streamLoad_cbActive == 0) { + streamLoad_savedReadyCB = ((void *(*)(void *))CdReadyCallback)((void *)func_800377D8); + } else { + CdReadyCallback((void *)func_800377D8); + } + streamLoad_cbActive = 1; + streamLoad_state++; + return 0; /* NOT `break` -- see the header note */ + case 12: + if (func_800374CC(&pos) == 0) { + p34 = &D_800A4F34; + if (pos != *p34) { + *p34 = pos; + D_800A4F28 = 0; + } + if (D_800A4F28 < 0x12D) break; + if (streamLoad_cbActive != 0) { + CdReadyCallback(streamLoad_savedReadyCB); + streamLoad_savedReadyCB = 0; + streamLoad_cbActive = 0; + } + streamLoad_state++; + break; + } + if (streamLoad_cbActive != 0) { + CdReadyCallback(streamLoad_savedReadyCB); + streamLoad_savedReadyCB = 0; + streamLoad_cbActive = 0; + } + streamLoad_state++; + /* fall through */ + case 13: + if (func_8003775C() == 0) break; + func_80037D74(); + streamLoad_state++; + break; + case 14: + pb = (u8 *)func_80037368(&sync); + if (sync != 1) { + streamLoad_state = 0x11; + break; + } + if (*pb == 1) { + streamLoad_state++; + } else if (*pb == 2) { + *(u8 *)&D_800A4F38 = 1; + streamLoad_state = 0x11; + break; + } else { + p30 = &D_800A4F30; + t = *p30; + if (t == 0) { + streamLoad_state = 1; + break; + } + t -= 1; + *p30 = t; + if (t != 0) { + streamLoad_state = 1; + break; + } + streamLoad_state = 0x11; + break; + } + /* fall through */ + case 15: + if (func_800435CC(9, 0, result) == 0) { /* CdlPause */ + if ((result[0] & 0x10) == 0) break; + streamLoad_state = 0; + return 1; + } + streamLoad_state++; + break; + case 16: + sync = func_8004355C(1, result); + if (sync != 5 && sync != 2) break; + pb = (u8 *)&D_800A4F38; + t = *pb; + streamLoad_state = 0; + if (t != 0) { + *pb = 0; + return 2; + } + return 1; + case 17: + if (func_800435CC(9, 0, result) != 0) streamLoad_state = 0x10; + break; + } + return 0; +} + diff --git a/.run/P36/agents/main__func_8001A114/residual.txt b/.run/P36/agents/main__func_8001A114/residual.txt new file mode 100644 index 000000000..d134c732e --- /dev/null +++ b/.run/P36/agents/main__func_8001A114/residual.txt @@ -0,0 +1,7 @@ +src/800.c:func_8001A114: score 4 (ORDER; mine 137 ins, target 137) — not yet + insert mine[20:20] target[20:22] + 20 -- | li a0,1 + 21 -- | move a1,zero + delete mine[22:24] target[24:24] + 22 li a0,1 | -- + 23 move a1,zero | -- diff --git a/.run/P36/agents/main__func_8001A114/sites.txt b/.run/P36/agents/main__func_8001A114/sites.txt new file mode 100644 index 000000000..bdc7eed20 --- /dev/null +++ b/.run/P36/agents/main__func_8001A114/sites.txt @@ -0,0 +1,2 @@ +NEEDED launder line 7512 +NEEDED launder line 7514 diff --git a/.run/P36/agents/main__func_8001A114/tu.txt b/.run/P36/agents/main__func_8001A114/tu.txt new file mode 100644 index 000000000..619fd0a28 --- /dev/null +++ b/.run/P36/agents/main__func_8001A114/tu.txt @@ -0,0 +1,2 @@ +src/800.c +func_8001A114 diff --git a/.run/P36/agents/main__func_8001C320/body_free.c b/.run/P36/agents/main__func_8001C320/body_free.c new file mode 100644 index 000000000..45fc6e28f --- /dev/null +++ b/.run/P36/agents/main__func_8001C320/body_free.c @@ -0,0 +1,49 @@ +void func_8001C320(s32 a0, s32 a1) +{ + extern void func_8001C9D0(void); + extern void func_80052D90(s32 a0, void *a1); + extern void func_80054514(s32 a0, s32 a1); + extern void GsMapModelingData(u32 *p); + extern void GsLinkObject5(); + extern void *GsPresetObject(); + extern u8 D_800AF630[]; + extern u8 D_80063548[]; + extern u16 D_800AF7CC; + extern s32 *D_800AF7C8; + extern u8 D_800A5BD0[]; + + s32 sp10[8]; + s32 obj; + s32 next; + s32 work; + s32 entry; + u16 c2; + + obj = a0; + func_8001C9D0(); + *(u16 *)obj = 1; + *(u16 *)(obj + 2) = 1; + func_80052D90(0, (void *)(obj + 0x30)); + func_80054514(obj + 0x30, (s32)&sp10[0]); + work = (s32)D_800AF630; + *(s32 *)(obj + 0x24) = a1; + if (a1 != 0) { + *(s32 *)(obj + 0x20) = (s32)D_80063548; + next = (s32)D_800AF7C8; + *(u16 *)(obj + 0x2E) = D_800AF7CC; + if (*(s32 *)a1 != 0) { + do { + entry = (*(s32 *)a1 & 0x80FFFFFF) + 4; + a1 += 4; + GsMapModelingData((u32 *)entry); + c2 = *(u16 *)(work + 0x19C); + *(u16 *)(work + 0x19C) = c2 + 1; + GsLinkObject5((u32 *)(entry + 8), + (void *)&D_800A5BD0[(c2 << 2) + c2 << 2], 0); + next = (s32)GsPresetObject( + (void *)&D_800A5BD0[(c2 << 2) + c2 << 2], (void *)next); + } while (*(s32 *)a1 != 0); + } + *(s32 *)(work + 0x198) = next; + } +} diff --git a/.run/P36/agents/main__func_8001C320/body_tree.c b/.run/P36/agents/main__func_8001C320/body_tree.c new file mode 100644 index 000000000..3aefcb289 --- /dev/null +++ b/.run/P36/agents/main__func_8001C320/body_tree.c @@ -0,0 +1,50 @@ +void func_8001C320(s32 a0, s32 a1) +{ + extern void func_8001C9D0(void); + extern void func_80052D90(s32 a0, void *a1); + extern void func_80054514(s32 a0, s32 a1); + extern void GsMapModelingData(u32 *p); + extern void GsLinkObject5(); + extern void *GsPresetObject(); + extern u8 D_800AF630[]; + extern u8 D_80063548[]; + extern u16 D_800AF7CC; + extern s32 *D_800AF7C8; + extern u8 D_800A5BD0[]; + + s32 sp10[8]; + register s32 obj __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus9) + s32 next; + s32 work; + s32 entry; + u16 c2; + + obj = a0; + func_8001C9D0(); + *(u16 *)obj = 1; + *(u16 *)(obj + 2) = 1; + func_80052D90(0, (void *)(obj + 0x30)); + func_80054514(obj + 0x30, (s32)&sp10[0]); + work = (s32)D_800AF630; + *(s32 *)(obj + 0x24) = a1; + if (a1 != 0) { + *(s32 *)(obj + 0x20) = (s32)D_80063548; + next = (s32)D_800AF7C8; + *(u16 *)(obj + 0x2E) = D_800AF7CC; + if (*(s32 *)a1 != 0) { + do { + entry = (*(s32 *)a1 & 0x80FFFFFF) + 4; + a1 += 4; + __asm__ __volatile__("" : "=r"(entry) : "0"(entry)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) + GsMapModelingData((u32 *)entry); + c2 = *(u16 *)(work + 0x19C); + *(u16 *)(work + 0x19C) = c2 + 1; + GsLinkObject5((u32 *)(entry + 8), + (void *)&D_800A5BD0[(c2 << 2) + c2 << 2], 0); + next = (s32)GsPresetObject( + (void *)&D_800A5BD0[(c2 << 2) + c2 << 2], (void *)next); + } while (*(s32 *)a1 != 0); + } + *(s32 *)(work + 0x198) = next; + } +} diff --git a/.run/P36/agents/main__func_8001C320/history.txt b/.run/P36/agents/main__func_8001C320/history.txt new file mode 100644 index 000000000..117a61ecd --- /dev/null +++ b/.run/P36/agents/main__func_8001C320/history.txt @@ -0,0 +1,14 @@ +s5: verdict NO-MATCH start 24 best 10 compiles 184 path R12 width obj s32->u16 @9275 + R9 swap-stmts @9281 +best-scoring single candidates of the last trace (move -> score [residual class]): + R9 swap-stmts @9281 -> 10 [COUNT] (from 12) + R9 swap-stmts @9281 -> 10 [COUNT] (from 12) + R12 width obj s32->s16 @9275 -> 11 [COUNT] (from 24) + R14 param-width a0 s32->s16 @9260 -> 11 [COUNT] (from 11) + R8 temp tmp0 @9298 -> 11 [COUNT] (from 11) + R7 block @9283 -> 11 [COUNT] (from 11) + R10 param-copy a0 @9280 -> 11 [COUNT] (from 11) + R4 decl-move obj 6->0 -> 11 [COUNT] (from 11) + R14 param-width a0 s32->u16 @9260 -> 11 [COUNT] (from 11) + R8 base tmp0 @9298 -> 11 [COUNT] (from 11) + R9 swap-stmts @9287 -> 11 [COUNT] (from 11) + R10 param-copy a1 @9280 -> 11 [COUNT] (from 11) diff --git a/.run/P36/agents/main__func_8001C320/neighbours.txt b/.run/P36/agents/main__func_8001C320/neighbours.txt new file mode 100644 index 000000000..cc55d0948 --- /dev/null +++ b/.run/P36/agents/main__func_8001C320/neighbours.txt @@ -0,0 +1,9 @@ +--- every @class/@stuck/@crack note in this translation unit --- + * @class: MATCH — 120/120 byte-exact under tools/match_one.py AND + * @class: MATCH — 131/131 byte-exact (relocation-masked), and + * @class: (was regalloc-order / sched) + * @stuck: none — MATCH, 122/122 instructions, byte-exact under match_one, and + * @class: was regalloc-order + IOR-tree reassociation + * @stuck: none — MATCH (128 ins), byte-exact under match_one. + * @class: MATCH (was LENGTH-DRIFT/+1 -> ADDRESSING -> MATCH) + * @class: MATCH (was SCHEDULE-REORDER/2) diff --git a/.run/P36/agents/main__func_8001C320/related.txt b/.run/P36/agents/main__func_8001C320/related.txt new file mode 100644 index 000000000..37d976770 --- /dev/null +++ b/.run/P36/agents/main__func_8001C320/related.txt @@ -0,0 +1,122 @@ +=== lever-free bodies in main sharing a callee or global with func_8001C320 (59 found; top 6 by shared symbols) — read them for the SHAPE === +--- func_8001C810 (src/800.c:9407) shares 4: D_80063548 func_8001C9D0 func_80052D90 func_80054514 --- +void func_8001C810(s32 a0, s32 *a1) { + s32 local_buf[8]; + s32 base; + + func_8001C9D0(); + + base = a0 + 0x30; + *(s16 *)(a0 + 0) = 1; + *(s16 *)(a0 + 2) = 5; + func_80052D90(0, (void *)base); + func_80054514(base, (s32)local_buf); + + *(s32 *)(a0 + 0x24) = (s32)a1; + if (a1 != 0) { + *(s32 *)(a0 + 0x20) = (s32)&D_80063548; + if (*a1 != 0) { + do { + GsMapModelingData((unsigned long *)((*a1 & 0x80FFFFFF) + 4)); + a1++; + } while (*a1 != 0); + } + } +} + +--- func_8001C214 (src/800.c:9124) shares 4: D_80063548 func_8001C9D0 func_80052D90 func_80054514 --- +void func_8001C214(s32 a0, s32 a1) +{ + extern void func_8001C9D0(void); + extern void func_80052D90(s32 a0, void *a1); + extern void func_80054514(s32 a0, s32 a1); + extern void GsMapModelingData(u32 *p); + extern u8 D_80063548[]; + + s32 sp10[8]; + + func_8001C9D0(); + *(u16 *)a0 = 1; + *(u16 *)(a0 + 2) = 0; + func_80052D90(0, (void *)(a0 + 0x30)); + func_80054514(a0 + 0x30, (s32)&sp10[0]); + *(s32 *)(a0 + 0x24) = a1; + if (a1 != 0) { + *(s32 *)(a0 + 0x20) = (s32)D_80063548; + if (*(s32 *)a1 != 0) { + do { + GsMapModelingData((u32 *)((*(s32 *)a1 & 0x80FFFFFF) + 4)); + a1 += 4; + } while (*(s32 *)a1 != 0); + } + } +} + +--- func_8001C4A4 (src/800.c:9246) shares 4: D_80063548 func_8001C9D0 func_80052D90 func_80054514 --- +void func_8001C4A4(s32 a0, u32 *a1) +{ + extern void func_8001C9D0(void); + extern void func_80052D90(s32 a0, void *a1); + extern void func_80054514(s32 a0, s32 a1); + extern void GsMapModelingData(u32 *p); + extern u8 D_80063548[]; + + s32 sp10[8]; + + func_8001C9D0(); + *(u16 *)a0 = 1; + *(u16 *)(a0 + 2) = 7; + func_80052D90(0, (void *)(a0 + 0x30)); + func_80054514(a0 + 0x30, (s32)&sp10[0]); + *(s32 *)(a0 + 0x24) = (s32)a1; + if (a1 != 0) { + *(s32 *)(a0 + 0x20) = (s32)D_80063548; + if (*a1 != 0) { + do { + GsMapModelingData((u32 *)((*a1 & 0x80FFFFFF) + 4)); + a1 += 1; + } while (*a1 != 0); + } + } +} + +--- func_8001C558 (src/800.c:9278) shares 3: func_8001C9D0 func_80052D90 func_80054514 --- +void func_8001C558(s32 a0) { + u8 local_var[32]; + + func_8001C9D0(); + *(s16 *)(a0 + 0x0) = 1; + *(s16 *)(a0 + 0x2) = 7; + func_80052D90(0, (void *)(a0 + 0x30)); + func_80054514((s32)(a0 + 0x30), (s32)&local_var[0]); + *(s32 *)(a0 + 0x24) = 0; +} + +--- func_8001C8C4 (src/800.c:9436) shares 3: func_8001C9D0 func_80052D90 func_80054514 --- +void func_8001C8C4(s32 a0) { + s32 local_10[4]; + s32 local_20[4]; + + ((void (*)(s32))func_8001C9D0)(a0); + *(s16 *)(a0 + 0x0) = 1; + *(s16 *)(a0 + 0x2) = 5; + func_80052D90(0, (void *)(a0 + 0x30)); + func_80054514(a0 + 0x30, (s32)local_10); + *(s32 *)(a0 + 0x24) = 0; +} + +--- func_8001C6E4 (src/800.c:9345) shares 3: func_8001C9D0 func_80052D90 func_80054514 --- +void func_8001C6E4(void *a0) { + s32 sp_buf[8]; + + ((void (*)(void *))func_8001C9D0)(a0); + + *(s16 *)a0 = 1; + *(s16 *)((s32)a0 + 2) = 8; + + func_80052D90(0, (void *)((s32)a0 + 0x30)); + func_80054514((s32)a0 + 0x30, (s32)sp_buf); + + *(s32 *)((s32)a0 + 0x24) = 0; +} + diff --git a/.run/P36/agents/main__func_8001C320/residual.txt b/.run/P36/agents/main__func_8001C320/residual.txt new file mode 100644 index 000000000..b1993ab87 --- /dev/null +++ b/.run/P36/agents/main__func_8001C320/residual.txt @@ -0,0 +1,39 @@ +src/800.c:func_8001C320: score 24 (COUNT; mine 73 ins, target 74) — not yet + register pairs (mine -> target, count): s2->s1 x6, s1->s2 x3 + insert mine[1:1] target[1:3] + 1 -- | sw s1,52(sp) + 2 -- | move s1,a0 + replace mine[2:5] target[4:5] + 2 move s2,a0 | move s2,a1 + 3 sw s1,52(sp) | -- + 4 move s1,a1 | -- + replace mine[11:12] target[11:12] + 11 addiu s0,s2,48 | addiu s0,s1,48 + replace mine[14:15] target[14:15] + 14 sh v0,0(s2) | sh v0,0(s1) + replace mine[16:17] target[16:17] + 16 sh v0,2(s2) | sh v0,2(s1) + replace mine[22:24] target[22:24] + 22 beqz s1,a030 | beqz s2,a034 + 23 sw s1,36(s2) | sw s2,36(s1) + replace mine[26:27] target[26:27] + 26 sw v0,32(s2) | sw v0,32(s1) + replace mine[31:33] target[31:33] + 31 sh v0,46(s2) | sh v0,46(s1) + 32 lw v0,0(s1) | lw v0,0(s2) + replace mine[34:35] target[34:35] + 34 beqz v0,a02c | beqz v0,a030 + replace mine[36:41] target[36:42] + 36 lui s2,0x80ff | lui s1,0x80ff + 37 ori s2,s2,0xffff | ori s1,s1,0xffff + 38 lw s0,0(s1) | lw s0,0(s2) + 39 addiu s1,s1,4 | addiu s2,s2,4 + 40 and s0,s0,s2 | and s0,s0,s1 + 41 -- | addiu s0,s0,4 + replace mine[42:44] target[43:45] + 42 addiu a0,s0,4 | move a0,s0 + 43 addiu a0,s0,12 | addiu a0,s0,8 + replace mine[59:60] target[60:61] + 59 lw v1,0(s1) | lw v1,0(s2) + replace mine[61:62] target[62:63] + 61 bnez v1,9fc8 | bnez v1,9fc8 diff --git a/.run/P36/agents/main__func_8001C320/sites.txt b/.run/P36/agents/main__func_8001C320/sites.txt new file mode 100644 index 000000000..0911653b0 --- /dev/null +++ b/.run/P36/agents/main__func_8001C320/sites.txt @@ -0,0 +1,4 @@ +NEEDED pin $17 line 9531 +REMOVED pin $19 line 9532 +REMOVED pin $20 line 9533 +NEEDED launder line 9553 diff --git a/.run/P36/agents/main__func_8001C320/tu.txt b/.run/P36/agents/main__func_8001C320/tu.txt new file mode 100644 index 000000000..aa6ab4781 --- /dev/null +++ b/.run/P36/agents/main__func_8001C320/tu.txt @@ -0,0 +1,2 @@ +src/800.c +func_8001C320 diff --git a/.run/P36/agents/main__func_8001C5B8/body_free.c b/.run/P36/agents/main__func_8001C5B8/body_free.c new file mode 100644 index 000000000..b428baea5 --- /dev/null +++ b/.run/P36/agents/main__func_8001C5B8/body_free.c @@ -0,0 +1,49 @@ +void func_8001C5B8(s32 a0, s32 a1) +{ + extern void func_8001C9D0(void); + extern void func_80052D90(s32 a0, void *a1); + extern void func_80054514(s32 a0, s32 a1); + extern void GsMapModelingData(unsigned long *p); + extern void GsLinkObject5(); + extern void *GsPresetObject(); + extern u8 D_800AF630[]; + extern u8 D_80063548[]; + extern u16 D_800AF7CC; + extern s32 *D_800AF7C8; + extern u8 D_800A5BD0[]; + + s32 sp10[8]; + s32 obj; + s32 next; + s32 work; + s32 entry; + u16 c2; + + obj = a0; + func_8001C9D0(); + *(u16 *)obj = 1; + *(u16 *)(obj + 2) = 8; + func_80052D90(0, (void *)(obj + 0x30)); + func_80054514(obj + 0x30, (s32)&sp10[0]); + work = (s32)D_800AF630; + *(s32 *)(obj + 0x24) = a1; + if (a1 != 0) { + *(s32 *)(obj + 0x20) = (s32)D_80063548; + next = (s32)D_800AF7C8; + *(u16 *)(obj + 0x2E) = D_800AF7CC; + if (*(s32 *)a1 != 0) { + do { + entry = (*(s32 *)a1 & 0x80FFFFFF) + 4; + a1 += 4; + GsMapModelingData((unsigned long *)entry); + c2 = *(u16 *)(work + 0x19C); + *(u16 *)(work + 0x19C) = c2 + 1; + GsLinkObject5((u32 *)(entry + 8), + (void *)&D_800A5BD0[(c2 << 2) + c2 << 2], 0); + next = (s32)GsPresetObject( + (void *)&D_800A5BD0[(c2 << 2) + c2 << 2], (void *)next); + } while (*(s32 *)a1 != 0); + } + *(s32 *)(work + 0x198) = next; + } +} diff --git a/.run/P36/agents/main__func_8001C5B8/body_tree.c b/.run/P36/agents/main__func_8001C5B8/body_tree.c new file mode 100644 index 000000000..6308e01be --- /dev/null +++ b/.run/P36/agents/main__func_8001C5B8/body_tree.c @@ -0,0 +1,50 @@ +void func_8001C5B8(s32 a0, s32 a1) +{ + extern void func_8001C9D0(void); + extern void func_80052D90(s32 a0, void *a1); + extern void func_80054514(s32 a0, s32 a1); + extern void GsMapModelingData(unsigned long *p); + extern void GsLinkObject5(); + extern void *GsPresetObject(); + extern u8 D_800AF630[]; + extern u8 D_80063548[]; + extern u16 D_800AF7CC; + extern s32 *D_800AF7C8; + extern u8 D_800A5BD0[]; + + s32 sp10[8]; + register s32 obj __asm__("$17"); // !FAKE: pin $17 — NEEDED DIFFERS (P36 rung B tus9) + s32 next; + s32 work; + s32 entry; + u16 c2; + + obj = a0; + func_8001C9D0(); + *(u16 *)obj = 1; + *(u16 *)(obj + 2) = 8; + func_80052D90(0, (void *)(obj + 0x30)); + func_80054514(obj + 0x30, (s32)&sp10[0]); + work = (s32)D_800AF630; + *(s32 *)(obj + 0x24) = a1; + if (a1 != 0) { + *(s32 *)(obj + 0x20) = (s32)D_80063548; + next = (s32)D_800AF7C8; + *(u16 *)(obj + 0x2E) = D_800AF7CC; + if (*(s32 *)a1 != 0) { + do { + entry = (*(s32 *)a1 & 0x80FFFFFF) + 4; + a1 += 4; + __asm__ __volatile__("" : "=r"(entry) : "0"(entry)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus9) + GsMapModelingData((unsigned long *)entry); + c2 = *(u16 *)(work + 0x19C); + *(u16 *)(work + 0x19C) = c2 + 1; + GsLinkObject5((u32 *)(entry + 8), + (void *)&D_800A5BD0[(c2 << 2) + c2 << 2], 0); + next = (s32)GsPresetObject( + (void *)&D_800A5BD0[(c2 << 2) + c2 << 2], (void *)next); + } while (*(s32 *)a1 != 0); + } + *(s32 *)(work + 0x198) = next; + } +} diff --git a/.run/P36/agents/main__func_8001C5B8/history.txt b/.run/P36/agents/main__func_8001C5B8/history.txt new file mode 100644 index 000000000..4b9e79ea5 --- /dev/null +++ b/.run/P36/agents/main__func_8001C5B8/history.txt @@ -0,0 +1,14 @@ +s5: verdict NO-MATCH start 24 best 11 compiles 184 path R12 width obj s32->s16 @9391 +best-scoring single candidates of the last trace (move -> score [residual class]): + R12 width obj s32->s16 @9391 -> 11 [COUNT] (from 24) + R14 param-width a0 s32->s16 @9376 -> 11 [COUNT] (from 11) + R8 temp tmp0 @9414 -> 11 [COUNT] (from 11) + R7 block @9404 -> 11 [COUNT] (from 11) + R10 param-copy a0 @9396 -> 11 [COUNT] (from 11) + R4 decl-move obj 6->0 -> 11 [COUNT] (from 11) + R14 param-width a0 s32->u16 @9376 -> 11 [COUNT] (from 11) + R8 base tmp0 @9414 -> 11 [COUNT] (from 11) + R7 do-while @9404 -> 11 [COUNT] (from 11) + R10 param-copy a1 @9396 -> 11 [COUNT] (from 11) + R4 decl-move obj 6->1 -> 11 [COUNT] (from 11) + R8 base-shared tmp0 @9414 -> 11 [COUNT] (from 11) diff --git a/.run/P36/agents/main__func_8001C5B8/neighbours.txt b/.run/P36/agents/main__func_8001C5B8/neighbours.txt new file mode 100644 index 000000000..cc55d0948 --- /dev/null +++ b/.run/P36/agents/main__func_8001C5B8/neighbours.txt @@ -0,0 +1,9 @@ +--- every @class/@stuck/@crack note in this translation unit --- + * @class: MATCH — 120/120 byte-exact under tools/match_one.py AND + * @class: MATCH — 131/131 byte-exact (relocation-masked), and + * @class: (was regalloc-order / sched) + * @stuck: none — MATCH, 122/122 instructions, byte-exact under match_one, and + * @class: was regalloc-order + IOR-tree reassociation + * @stuck: none — MATCH (128 ins), byte-exact under match_one. + * @class: MATCH (was LENGTH-DRIFT/+1 -> ADDRESSING -> MATCH) + * @class: MATCH (was SCHEDULE-REORDER/2) diff --git a/.run/P36/agents/main__func_8001C5B8/related.txt b/.run/P36/agents/main__func_8001C5B8/related.txt new file mode 100644 index 000000000..ab1388829 --- /dev/null +++ b/.run/P36/agents/main__func_8001C5B8/related.txt @@ -0,0 +1,122 @@ +=== lever-free bodies in main sharing a callee or global with func_8001C5B8 (59 found; top 6 by shared symbols) — read them for the SHAPE === +--- func_8001C810 (src/800.c:9407) shares 4: D_80063548 func_8001C9D0 func_80052D90 func_80054514 --- +void func_8001C810(s32 a0, s32 *a1) { + s32 local_buf[8]; + s32 base; + + func_8001C9D0(); + + base = a0 + 0x30; + *(s16 *)(a0 + 0) = 1; + *(s16 *)(a0 + 2) = 5; + func_80052D90(0, (void *)base); + func_80054514(base, (s32)local_buf); + + *(s32 *)(a0 + 0x24) = (s32)a1; + if (a1 != 0) { + *(s32 *)(a0 + 0x20) = (s32)&D_80063548; + if (*a1 != 0) { + do { + GsMapModelingData((unsigned long *)((*a1 & 0x80FFFFFF) + 4)); + a1++; + } while (*a1 != 0); + } + } +} + +--- func_8001C214 (src/800.c:9124) shares 4: D_80063548 func_8001C9D0 func_80052D90 func_80054514 --- +void func_8001C214(s32 a0, s32 a1) +{ + extern void func_8001C9D0(void); + extern void func_80052D90(s32 a0, void *a1); + extern void func_80054514(s32 a0, s32 a1); + extern void GsMapModelingData(u32 *p); + extern u8 D_80063548[]; + + s32 sp10[8]; + + func_8001C9D0(); + *(u16 *)a0 = 1; + *(u16 *)(a0 + 2) = 0; + func_80052D90(0, (void *)(a0 + 0x30)); + func_80054514(a0 + 0x30, (s32)&sp10[0]); + *(s32 *)(a0 + 0x24) = a1; + if (a1 != 0) { + *(s32 *)(a0 + 0x20) = (s32)D_80063548; + if (*(s32 *)a1 != 0) { + do { + GsMapModelingData((u32 *)((*(s32 *)a1 & 0x80FFFFFF) + 4)); + a1 += 4; + } while (*(s32 *)a1 != 0); + } + } +} + +--- func_8001C4A4 (src/800.c:9246) shares 4: D_80063548 func_8001C9D0 func_80052D90 func_80054514 --- +void func_8001C4A4(s32 a0, u32 *a1) +{ + extern void func_8001C9D0(void); + extern void func_80052D90(s32 a0, void *a1); + extern void func_80054514(s32 a0, s32 a1); + extern void GsMapModelingData(u32 *p); + extern u8 D_80063548[]; + + s32 sp10[8]; + + func_8001C9D0(); + *(u16 *)a0 = 1; + *(u16 *)(a0 + 2) = 7; + func_80052D90(0, (void *)(a0 + 0x30)); + func_80054514(a0 + 0x30, (s32)&sp10[0]); + *(s32 *)(a0 + 0x24) = (s32)a1; + if (a1 != 0) { + *(s32 *)(a0 + 0x20) = (s32)D_80063548; + if (*a1 != 0) { + do { + GsMapModelingData((u32 *)((*a1 & 0x80FFFFFF) + 4)); + a1 += 1; + } while (*a1 != 0); + } + } +} + +--- func_8001C558 (src/800.c:9278) shares 3: func_8001C9D0 func_80052D90 func_80054514 --- +void func_8001C558(s32 a0) { + u8 local_var[32]; + + func_8001C9D0(); + *(s16 *)(a0 + 0x0) = 1; + *(s16 *)(a0 + 0x2) = 7; + func_80052D90(0, (void *)(a0 + 0x30)); + func_80054514((s32)(a0 + 0x30), (s32)&local_var[0]); + *(s32 *)(a0 + 0x24) = 0; +} + +--- func_8001C8C4 (src/800.c:9436) shares 3: func_8001C9D0 func_80052D90 func_80054514 --- +void func_8001C8C4(s32 a0) { + s32 local_10[4]; + s32 local_20[4]; + + ((void (*)(s32))func_8001C9D0)(a0); + *(s16 *)(a0 + 0x0) = 1; + *(s16 *)(a0 + 0x2) = 5; + func_80052D90(0, (void *)(a0 + 0x30)); + func_80054514(a0 + 0x30, (s32)local_10); + *(s32 *)(a0 + 0x24) = 0; +} + +--- func_8001C6E4 (src/800.c:9345) shares 3: func_8001C9D0 func_80052D90 func_80054514 --- +void func_8001C6E4(void *a0) { + s32 sp_buf[8]; + + ((void (*)(void *))func_8001C9D0)(a0); + + *(s16 *)a0 = 1; + *(s16 *)((s32)a0 + 2) = 8; + + func_80052D90(0, (void *)((s32)a0 + 0x30)); + func_80054514((s32)a0 + 0x30, (s32)sp_buf); + + *(s32 *)((s32)a0 + 0x24) = 0; +} + diff --git a/.run/P36/agents/main__func_8001C5B8/residual.txt b/.run/P36/agents/main__func_8001C5B8/residual.txt new file mode 100644 index 000000000..8cfad0aa5 --- /dev/null +++ b/.run/P36/agents/main__func_8001C5B8/residual.txt @@ -0,0 +1,39 @@ +src/800.c:func_8001C5B8: score 24 (COUNT; mine 74 ins, target 75) — not yet + register pairs (mine -> target, count): s2->s1 x6, s1->s2 x3 + insert mine[1:1] target[1:3] + 1 -- | sw s1,52(sp) + 2 -- | move s1,a0 + replace mine[2:5] target[4:5] + 2 move s2,a0 | move s2,a1 + 3 sw s1,52(sp) | -- + 4 move s1,a1 | -- + replace mine[11:12] target[11:12] + 11 addiu s0,s2,48 | addiu s0,s1,48 + replace mine[14:15] target[14:15] + 14 sh v0,0(s2) | sh v0,0(s1) + replace mine[17:18] target[17:18] + 17 sh v0,2(s2) | sh v0,2(s1) + replace mine[23:25] target[23:25] + 23 beqz s1,a2cc | beqz s2,a2d0 + 24 sw s1,36(s2) | sw s2,36(s1) + replace mine[27:28] target[27:28] + 27 sw v0,32(s2) | sw v0,32(s1) + replace mine[32:34] target[32:34] + 32 sh v0,46(s2) | sh v0,46(s1) + 33 lw v0,0(s1) | lw v0,0(s2) + replace mine[35:36] target[35:36] + 35 beqz v0,a2c8 | beqz v0,a2cc + replace mine[37:42] target[37:43] + 37 lui s2,0x80ff | lui s1,0x80ff + 38 ori s2,s2,0xffff | ori s1,s1,0xffff + 39 lw s0,0(s1) | lw s0,0(s2) + 40 addiu s1,s1,4 | addiu s2,s2,4 + 41 and s0,s0,s2 | and s0,s0,s1 + 42 -- | addiu s0,s0,4 + replace mine[43:45] target[44:46] + 43 addiu a0,s0,4 | move a0,s0 + 44 addiu a0,s0,12 | addiu a0,s0,8 + replace mine[60:61] target[61:62] + 60 lw v1,0(s1) | lw v1,0(s2) + replace mine[62:63] target[63:64] + 62 bnez v1,a264 | bnez v1,a264 diff --git a/.run/P36/agents/main__func_8001C5B8/sites.txt b/.run/P36/agents/main__func_8001C5B8/sites.txt new file mode 100644 index 000000000..d6ee9a166 --- /dev/null +++ b/.run/P36/agents/main__func_8001C5B8/sites.txt @@ -0,0 +1,4 @@ +NEEDED pin $17 line 9647 +REMOVED pin $19 line 9648 +REMOVED pin $20 line 9649 +NEEDED launder line 9669 diff --git a/.run/P36/agents/main__func_8001C5B8/tu.txt b/.run/P36/agents/main__func_8001C5B8/tu.txt new file mode 100644 index 000000000..d492bf599 --- /dev/null +++ b/.run/P36/agents/main__func_8001C5B8/tu.txt @@ -0,0 +1,2 @@ +src/800.c +func_8001C5B8 diff --git a/.run/P36/agents/main__func_800359B0/body_free.c b/.run/P36/agents/main__func_800359B0/body_free.c new file mode 100644 index 000000000..282469ecd --- /dev/null +++ b/.run/P36/agents/main__func_800359B0/body_free.c @@ -0,0 +1,98 @@ +void func_800359B0(s32 arg0) { + u8 result[8]; + s32 sync; + + switch (*(u8 *)(arg0 + 3)) { + case 1: + case 2: + func_800434BC(); + *(u8 *)(arg0 + 2) = 0; + break; + case 4: + func_800434BC(); + *(u8 *)(arg0 + 2) = 1; + *(u8 *)(arg0 + 3) = 0x10; + break; + case 6: + case 7: + func_8003EDE8(0, (u32)((D_8006AEEC * D_800A4EFA) >> 7 & 0xFF) * 3 >> 2, + (u32)((D_8006AEEC * D_800A4EFA) >> 7 & 0xFF) * 3 >> 2); + *(u8 *)(arg0 + 2) = 1; + D_8007620C = 0; + *(u8 *)(arg0 + 3) = 0xB; + break; + case 5: + func_800434BC(); + *(u8 *)(arg0 + 3) = 8; + /* fall through */ + case 8: + func_8003EDE8(0, 0, 0); + if (func_800435CC(9, 0, 0) == 0) { + *(u8 *)(arg0 + 2) = 1; + *(u8 *)(arg0 + 3) = 0x10; + D_80076104 = 0; + return; + } + D_8007620C = 0; + D_80076104 = 0; + *(u8 *)(arg0 + 3) = 9; + /* fall through */ + case 9: + sync = func_8004355C(1, result); + if (sync == 0) { + D_80076104 = D_80076104 + 1; + if ((s16)D_80076104 >= 0x12D) { + func_800434BC(); + do_flag: + D_80076214 = 1; + *(u8 *)(arg0 + 2) = 0; + return; + } + *(u8 *)(arg0 + 2) = 1; + return; + } + if (sync == 5 && (result[0] & 0x10)) { + D_80076214 = 1; + } + *(u8 *)(arg0 + 2) = 0; + break; + case 11: + func_8003EDE8(0, D_8006AEEC >> 1, D_8006AEEC >> 1); + *(u8 *)(arg0 + 3) = 0xC; + break; + case 12: + func_8003EDE8(0, D_8006AEEC >> 2, D_8006AEEC >> 2); + *(u8 *)(arg0 + 3) = 0xD; + break; + case 13: + func_8003EDE8(0, 0, 0); + if (func_800435CC(9, 0, 0) != 0) { + *(u8 *)(arg0 + 3) = 9; + return; + } + *(u8 *)(arg0 + 3) = 0x10; + D_80076104 = 0; + break; + case 16: + if (func_800435CC(9, 0, 0) == 0) { + D_80076104 = D_80076104 + 1; + if ((s16)D_80076104 >= 0x12D) { + func_800434BC(); + goto do_flag; + } + break; + } + *(u8 *)(arg0 + 3) = 9; + break; + case 0: + case 3: + case 10: + case 14: + case 15: + case 17: + case 18: + default: + *(u8 *)(arg0 + 2) = 0; + break; + } +} diff --git a/.run/P36/agents/main__func_800359B0/body_tree.c b/.run/P36/agents/main__func_800359B0/body_tree.c new file mode 100644 index 000000000..fde9afaa5 --- /dev/null +++ b/.run/P36/agents/main__func_800359B0/body_tree.c @@ -0,0 +1,99 @@ +void func_800359B0(s32 arg0) { + u8 result[8]; + s32 sync; + + switch (*(u8 *)(arg0 + 3)) { + case 1: + case 2: + func_800434BC(); + *(u8 *)(arg0 + 2) = 0; + break; + case 4: + func_800434BC(); + *(u8 *)(arg0 + 2) = 1; + *(u8 *)(arg0 + 3) = 0x10; + break; + case 6: + case 7: + func_8003EDE8(0, (u32)((D_8006AEEC * D_800A4EFA) >> 7 & 0xFF) * 3 >> 2, + (u32)((D_8006AEEC * D_800A4EFA) >> 7 & 0xFF) * 3 >> 2); + *(u8 *)(arg0 + 2) = 1; + D_8007620C = 0; + *(u8 *)(arg0 + 3) = 0xB; + break; + case 5: + func_800434BC(); + *(u8 *)(arg0 + 3) = 8; + /* fall through */ + case 8: + func_8003EDE8(0, 0, 0); + if (func_800435CC(9, 0, 0) == 0) { + *(u8 *)(arg0 + 2) = 1; + *(u8 *)(arg0 + 3) = 0x10; + D_80076104 = 0; + return; + } + D_8007620C = 0; + D_80076104 = 0; + *(u8 *)(arg0 + 3) = 9; + /* fall through */ + case 9: + sync = func_8004355C(1, result); + if (sync == 0) { + D_80076104 = D_80076104 + 1; + if ((s16)D_80076104 >= 0x12D) { + func_800434BC(); + do_flag: + D_80076214 = 1; + *(u8 *)(arg0 + 2) = 0; + return; + } + *(u8 *)(arg0 + 2) = 1; + return; + } + if (sync == 5 && (result[0] & 0x10)) { + D_80076214 = 1; + } + *(u8 *)(arg0 + 2) = 0; + break; + case 11: + func_8003EDE8(0, D_8006AEEC >> 1, D_8006AEEC >> 1); + *(u8 *)(arg0 + 3) = 0xC; + break; + case 12: + func_8003EDE8(0, D_8006AEEC >> 2, D_8006AEEC >> 2); + *(u8 *)(arg0 + 3) = 0xD; + break; + case 13: + func_8003EDE8(0, 0, 0); + if (func_800435CC(9, 0, 0) != 0) { + *(u8 *)(arg0 + 3) = 9; + return; + } + *(u8 *)(arg0 + 3) = 0x10; + D_80076104 = 0; + break; + case 16: + if (func_800435CC(9, 0, 0) == 0) { + D_80076104 = D_80076104 + 1; + if ((s16)D_80076104 >= 0x12D) { + func_800434BC(); + __asm__ __volatile__(""); /* §336 cross-jump fence, zero bytes */ // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus9) + goto do_flag; + } + break; + } + *(u8 *)(arg0 + 3) = 9; + break; + case 0: + case 3: + case 10: + case 14: + case 15: + case 17: + case 18: + default: + *(u8 *)(arg0 + 2) = 0; + break; + } +} diff --git a/.run/P36/agents/main__func_800359B0/history.txt b/.run/P36/agents/main__func_800359B0/history.txt new file mode 100644 index 000000000..2737c55c3 --- /dev/null +++ b/.run/P36/agents/main__func_800359B0/history.txt @@ -0,0 +1,14 @@ +g6b: verdict NO-MATCH start 18 best 18 compiles 329 path +best-scoring single candidates of the last trace (move -> score [residual class]): + R7 block @462 -> 18 [COUNT] (from 18) + R10 param-copy arg0 @405 -> 18 [COUNT] (from 18) + R7 do-while @462 -> 18 [COUNT] (from 18) + R7 block @456 -> 18 [COUNT] (from 18) + R7 do-while @456 -> 18 [COUNT] (from 18) + R7 block @486 -> 18 [COUNT] (from 18) + R7 do-while @486 -> 18 [COUNT] (from 18) + R7 block @479 -> 18 [COUNT] (from 18) + R7 do-while @479 -> 18 [COUNT] (from 18) + R7 block @481 -> 18 [COUNT] (from 18) + R7 do-while @481 -> 18 [COUNT] (from 18) + R7 block @430 -> 18 [COUNT] (from 18) diff --git a/.run/P36/agents/main__func_800359B0/neighbours.txt b/.run/P36/agents/main__func_800359B0/neighbours.txt new file mode 100644 index 000000000..8b1378917 --- /dev/null +++ b/.run/P36/agents/main__func_800359B0/neighbours.txt @@ -0,0 +1 @@ + diff --git a/.run/P36/agents/main__func_800359B0/related.txt b/.run/P36/agents/main__func_800359B0/related.txt new file mode 100644 index 000000000..c173699cd --- /dev/null +++ b/.run/P36/agents/main__func_800359B0/related.txt @@ -0,0 +1,698 @@ +=== lever-free bodies in main sharing a callee or global with func_800359B0 (16 found; top 6 by shared symbols) — read them for the SHAPE === +--- func_80035C4C (src/800_c.c:526) shares 6: D_8006AEEC D_8007620C D_80076214 func_8003EDE8 func_8004355C func_800435CC --- +s32 func_80035C4C(s32 arg0) { + u8 result[8]; + u8 cmd[8]; + s32 trk; + s32 st; + s32 sync; + u32 vol; + + if (*(u8 *)(arg0 + 7) != 0) { + trk = *(s32 *)(arg0 + 0xC); + D_8007620C = 0; + *(u8 *)(arg0 + 7) = 0; + *(u8 *)(arg0 + 3) = 0; + if (D_800A5BC8 < trk) { + return 1; + } + if (trk != 0) { + if ((func_80043420() & 0x80) == 0) { + *(u8 *)(arg0 + 3) = 1; + } + D_80076108 = 0; + cmd[0] = 5; + func_800435CC(0xE, cmd, 0); + D_800A63E8 = *(s32 *)(arg0 + 0xC); + } else { + if (D_800C6D28 == 0) { + return 1; + } + D_800A63E8 = D_800C6D28; + func_80043704(3, 0); + D_800C6D28 = 0; + *(u8 *)(arg0 + 3) = 2; + } + } + + switch (*(u8 *)(arg0 + 3)) { + case 0: + if (++D_80076108 < 3) { + return 0; + } + *(u8 *)(arg0 + 3) += 1; + /* fall through */ + case 1: + vol = ((u32)D_800A4EF8 * 97) >> 7; + D_80076108 = 0; + D_8006AEEC = vol; + func_8003EDE8(0, vol & 0xFF, vol & 0xFF); + func_8003D650(0, 1, 0); + func_80043704(3, (u8 *)&D_800C7D30[*(s32 *)(arg0 + 0xC)]); + func_800361CC(func_80036130); + *(u8 *)(arg0 + 3) += 1; + /* fall through */ + case 2: + if (func_80043410() & 0x40) { + if (D_80076108++ >= 0x12D) { + D_80076214 = 1; + return 1; + } + return 0; + } + sync = func_8004355C(1, result); + if (sync == 2) { + *(u8 *)(arg0 + 3) += 1; + break; + } + if (sync != 5) { + return 0; + } + if (result[0] & 0x10) { + D_80076214 = 1; + return 1; + } + return 1; + case 3: + st = func_80043410(); + if ((st & 0x80) == 0) { + if (st & 0x10) { + D_80076214 = 1; + return 1; + } + return 0; + } + D_800A63E4 = 0xC; + D_8007610C = 0; + D_8007620C |= 0x80; + *(u8 *)(arg0 + 3) += 1; + break; + case 4: + if (D_800A63E4 == 0xD) { + func_8003621C(); + func_8003EDE8(0, 0, 0); + func_80043704(9, 0); + D_8007620C = 0; + D_80078F10 = 0; + } else { + if (D_8007610C == 0) { + return 0; + } + st = func_80043410(); + if (st & 0x80) { + return 0; + } + if (st & 0x10) { + D_80076214 = 1; + } + func_8003621C(); + func_8003EDE8(0, 0, 0); + D_8007620C = 0; + D_80078F10 = 0; + if (D_80076214 != 0) { + return 1; + } + func_80043704(9, 0); + } + *(u8 *)(arg0 + 3) += 1; + return 0; + case 5: + sync = func_8004355C(1, result); + if (sync == 0) { + return 0; + } + if (sync != 5) { + return 1; + } + if (result[0] & 0x10) { + D_80076214 = 1; + } + return 1; + } + return 0; +} + +--- func_8003602C (src/800_c.c:663) shares 3: D_80076214 func_800434BC func_8004355C --- +void func_8003602C(s32 arg0) { + u8 result[8]; + u8 state; + s32 sync; + + switch (*(u8 *)(arg0 + 3)) { + case 0: + case 1: + default: + *(u8 *)(arg0 + 2) = 0; + break; + case 2: + *(u8 *)(arg0 + 2) = 1; + func_800434BC(); + *(u8 *)(arg0 + 3) += 2; + break; + case 3: + *(u8 *)(arg0 + 2) = 1; + func_800434BC(); + *(u8 *)(arg0 + 3) += 1; + /* fall through */ + case 4: + func_80043704(9, 0); + func_8003621C(); + state = *(u8 *)(arg0 + 3); + *(u8 *)(arg0 + 2) = 1; + *(u8 *)(arg0 + 3) = state + 1; + break; + case 5: + sync = func_8004355C(1, result); + if (sync == 0) { + *(u8 *)(arg0 + 2) = 1; + return; + } + if (sync == 5 && (result[0] & 0x10)) { + D_80076214 = 1; + } + *(u8 *)(arg0 + 2) = 0; + break; + } +} + +--- func_80036260 (src/800_c.c:794) shares 3: func_800434BC func_8004355C func_800435CC --- +int func_80036260(void) { + u8 result[8]; + u16 *flags; + s16 *vabp; + s32 t; + int sync; + + func_80037334(); + D_8006AEF4 &= 0xFD; + flags = &D_800A4E8E; + *flags &= 0xFFDF; + + if (streamLoad_state != 0) { + switch (streamLoad_state) { + case 0: + case 1: + case 2: + break; + case 3: + case 4: + case 5: + case 6: + case 7: + case 8: + case 9: + case 10: + case 11: + case 15: + case 16: + case 17: + func_800434BC(); + break; + case 12: + if (streamLoad_cbActive != 0) { + CdReadyCallback(streamLoad_savedReadyCB); + streamLoad_savedReadyCB = 0; + streamLoad_cbActive = 0; + } + /* fall through */ + case 13: + case 14: + func_800435CC(9, 0, 0); + streamLoad_state = 0; + D_800A6544 = 0x3C; + break; + } + } + + if (D_800A6544 != 0) { + D_800A6544--; + if (D_800A6544 != 0) { + sync = func_8004355C(1, result); + if (sync != 5 && sync != 2) { + return 0; + } + } + } + + vabp = &D_800A46A2; + t = *vabp; + streamLoad_state = 0; + D_800A6544 = 0; + if (t >= 0) { + func_800415A8(t); + *vabp = -1; + D_800A46B0 = 1; + } + return 1; +} + +--- CdReadStateMachine (src/800.c:6914) shares 3: func_800434BC func_8004355C func_800435CC --- +void CdReadStateMachine(s32 pauseAfterSeek) { + s32 *rp; + s32 *dp; + s32 *sp7; + s32 *sp9; + u8 *p; + u8 *q; + u8 *p2; + u8 *p3; + u8 *p8; + void **fpp; + s32 r; + s32 st; + s32 n; + s32 i; + s32 off; + s32 pad[2]; + + switch (cdReq_state) { + case 0: + p = (u8 *)&cdReq_retry; + *(s32 *)p = 0; + D_800AE71C = 0; + D_800AE70C = 0; + q = p - 0x10; + *q = 0xA0; + func_800435CC(0xE, q, p - 0x18); + if ((p[-0x18] & 0x10) != 0) { + setStateNine: + cdReq_state = 9; + break; + } + cdReq_state++; + /* fallthrough */ + case 1: + r = func_8004355C(1, &cdReq_cdResult); + D_800AE6E8 = r; + if (r == 0) { + break; + } + if (r == 5) { + goto resetState; + } + if (r != 2) { + break; + } + cdReq_retry = 0; + cdReq_state++; + /* fallthrough */ + case 2: + rp = &cdReq_retry; + *rp = *rp + 1; + if (*rp < 3) { + break; + } + *rp = 0; + cdReq_state++; + break; + case 3: + fpp = &cdReq_cdlFile; + func_800435CC(0x15, (u8 *)*fpp, (u8 *)fpp - 0x6C); + if ((*((u8 *)fpp - 0x6C) & 0x10) != 0) { + goto setStateNine; + } + cdReq_timeout = 0; + cdReq_posInt = CdPosToInt((CdlLOC *)*fpp); + cdReq_state++; + /* fallthrough */ + case 4: + p2 = &cdReq_cdResult; + r = func_8004355C(1, p2); + D_800AE6E8 = r; + if (r == 5) { + cdReq_retry++; + flushRetry: + func_800434BC(); + cdReq_state = 3; + break; + } + if (r == 0) { + break; + } + if (r != 2) { + cdReq_result = 0; + cdReq_timeout++; + if (cdReq_timeout < 0xB5) { + return; + } + goto flushRetry; + } + if (pauseAfterSeek != 0) { + func_800435CC(9, 0, p2); + if ((*p2 & 0x10) != 0) { + goto setStateNine; + } + cdReq_state = 8; + D_800AE70C = *(s32 *)cdReq_cdlFile; + break; + } + cdReq_state++; + /* fallthrough */ + case 5: + cdReq_drainPhase = 0; + if (cdReq_size < 1) { + D_800AE6F8 = 0; + } else { + D_800AE6F8 = 3; + cdReq_wordsRemaining = (cdReq_size + 3) / 4; + D_800AE798 = 1; + cdReq_sink = (s32)cdReq_dest; + } + p3 = (u8 *)&cdReq_savedReadyCB; + *(void **)p3 = CdReadyCallback(CdReadSectorReadyCB); + func_800435CC(6, 0, p3 + 4); + if ((p3[4] & 0x10) != 0) { + goto setStateNine; + } + cdReq_retry = 0; + cdReq_state++; + /* fallthrough */ + case 6: + dp = &cdReq_drainPhase; + if (*dp == 1) { + CdReadyCallback(cdReq_savedReadyCB); + func_800435CC(9, 0, (u8 *)dp - 0x14); + if ((*((u8 *)dp - 0x14) & 0x10) != 0) { + goto setStateNine; + } + st = cdReq_state; + n = D_800AE71C; + cdReq_state = st + 1; + if (n == 0) { + cdReq_state = st + 2; + } + break; + } + if (*dp == 2) { + CdReadyCallback(cdReq_savedReadyCB); + goto resetState; + } + cdReq_retry++; + if (cdReq_retry < 0x12C) { + break; + } + CdReadyCallback(cdReq_savedReadyCB); + cdReq_state = 0; + func_800434BC(); + break; + case 7: + i = 0; + if (D_800AE71C > 0) { + do { + off = i * 8; + do { + r = func_8002FD14(*(s32 *)(off + D_800AE724), *(s32 *)(off + D_800AE724 + 4)); + } while (r == 0); + i++; + } while (i < D_800AE71C); + } + sp7 = &cdReq_state; + *sp7 = *sp7 + 1; + break; + case 8: + p8 = &cdReq_cdResult; + r = func_8004355C(1, p8); + D_800AE6E8 = r; + if (r == 2) { + cdReq_sink = 0x80010000; + cdReq_state = 0; + D_800AE6F8 = 0; + D_800AE6FC = 0; + D_800AE700 = 0; + cdReq_wordsRemaining = 1; + cdReq_drainPhase = 0; + D_800AE798 = 0; + D_800AE799 = 0; + D_800AE70C = 0; + cdReq_result = 1; + cdReq_curSector = 0; + return; + } + if (r != 5) { + break; + } + func_800434BC(); + func_800435CC(9, 0, p8); + if ((*p8 & 0x10) == 0) { + break; + } + goto setStateNine; + case 9: + func_8001A0FC(); + sp9 = &cdReq_state; + *sp9 = *sp9 + 1; + /* fallthrough */ + case 10: + D_800AE6E8 = func_8001A114(); + if (D_800AE6E8 == 0) { + break; + } + resetState: + cdReq_state = 0; + break; + } + cdReq_result = 0; +} + +--- StreamLoadStateMachine (src/800_c.c:1145) shares 3: func_800434BC func_8004355C func_800435CC --- +int StreamLoadStateMachine(int arg0, void *loc, int n) { + u8 cmd[8]; + u8 result[8]; + int pos; + int sync; + int resKind; + u8 *pb; + int *p28; + int *p2C; + int *p30; + int *p34; + u16 *flags; + int t; + int idx; + + idx = arg0 - 0x100; + resKind = *(short *)(D_80068B60 + idx * 0x10); + p28 = &D_800A4F28; + *p28 += 1; + switch (streamLoad_state) { + case 0: + D_800A4F30 = n; + *(u8 *)&D_800A4F38 = 0; + D_800A6544 = 0; + func_8002EC10(); + flags = &D_800A4E8E; + *flags &= 0xFFDF; + streamLoad_state++; + break; + case 1: + func_80037334(); + func_80037358(CdPosToInt((CdlLOC *)loc)); + func_80037144(resKind); + streamLoad_state++; + /* fall through */ + case 2: + sync = func_8004355C(1, result); + if (sync != 5 && sync != 2) break; + if ((func_80043420() & 0x80) != 0) { + D_800A4F2C = 0; + } else { + D_800A4F2C = 3; + } + streamLoad_state++; + /* fall through */ + case 3: + cmd[0] = 0xA0; + if (func_800435CC(0x0E, cmd, result) == 0) { /* CdlSetmode */ + if ((result[0] & 0x10) == 0) break; + func_80037334(); + streamLoad_state = 0; + return 2; + } + D_800A4F28 = 0; + streamLoad_state++; + /* fall through */ + case 4: + sync = func_8004355C(1, result); + if (sync == 5) { + streamLoad_state = 3; + break; + } + if (sync != 2) { + if (D_800A4F28 < 0x3D) break; + streamLoad_state = 3; + break; + } + streamLoad_state++; + /* fall through */ + case 5: + p2C = &D_800A4F2C; + if (*p2C != 0) { + *p2C -= 1; + break; + } + streamLoad_state++; + /* fall through */ + case 6: + if (func_80037CD8((void *)func_80036260) == 0) break; + streamLoad_state = 7; + /* fall through */ + case 7: + if (func_8003750C() == 0) break; + streamLoad_state++; + /* fall through */ + case 8: + sync = func_8004355C(1, result); + if (sync != 5 && sync != 2) break; + streamLoad_state++; + /* fall through */ + case 9: + D_800A4F28 = 0; + if (func_800435CC(0x15, loc, result) == 0) break; /* CdlSeekL */ + streamLoad_state++; + /* fall through */ + case 10: + sync = func_8004355C(1, result); + if (sync == 5) { + if (func_800435CC(1, 0, result) == 0) { /* CdlNop */ + streamLoad_state = 9; + break; + } + if ((result[0] & 0x10) == 0) { + streamLoad_state = 9; + break; + } + func_80037334(); + D_8006AEF4 &= 0xFD; + streamLoad_state = 0; + return 2; + } + if (sync != 2) { + if (D_800A4F28 < 0x12D) break; + func_800434BC(); + streamLoad_state = 9; + return 2; + } + streamLoad_state++; + /* fall through */ + case 11: + D_800A4F28 = 0; + if (func_800435CC(6, loc, result) == 0) { /* CdlReadN */ + if ((result[0] & 0x10) == 0) break; + D_8006AEF4 &= 0xFD; + func_80037334(); + streamLoad_state = 0; + return 2; + } + if (streamLoad_cbActive == 0) { + streamLoad_savedReadyCB = ((void *(*)(void *))CdReadyCallback)((void *)func_800377D8); + } else { + CdReadyCallback((void *)func_800377D8); + } + streamLoad_cbActive = 1; + streamLoad_state++; + return 0; /* NOT `break` -- see the header note */ + case 12: + if (func_800374CC(&pos) == 0) { + p34 = &D_800A4F34; + if (pos != *p34) { + *p34 = pos; + D_800A4F28 = 0; + } + if (D_800A4F28 < 0x12D) break; + if (streamLoad_cbActive != 0) { + CdReadyCallback(streamLoad_savedReadyCB); + streamLoad_savedReadyCB = 0; + streamLoad_cbActive = 0; + } + streamLoad_state++; + break; + } + if (streamLoad_cbActive != 0) { + CdReadyCallback(streamLoad_savedReadyCB); + streamLoad_savedReadyCB = 0; + streamLoad_cbActive = 0; + } + streamLoad_state++; + /* fall through */ + case 13: + if (func_8003775C() == 0) break; + func_80037D74(); + streamLoad_state++; + break; + case 14: + pb = (u8 *)func_80037368(&sync); + if (sync != 1) { + streamLoad_state = 0x11; + break; + } + if (*pb == 1) { + streamLoad_state++; + } else if (*pb == 2) { + *(u8 *)&D_800A4F38 = 1; + streamLoad_state = 0x11; + break; + } else { + p30 = &D_800A4F30; + t = *p30; + if (t == 0) { + streamLoad_state = 1; + break; + } + t -= 1; + *p30 = t; + if (t != 0) { + streamLoad_state = 1; + break; + } + streamLoad_state = 0x11; + break; + } + /* fall through */ + case 15: + if (func_800435CC(9, 0, result) == 0) { /* CdlPause */ + if ((result[0] & 0x10) == 0) break; + streamLoad_state = 0; + return 1; + } + streamLoad_state++; + break; + case 16: + sync = func_8004355C(1, result); + if (sync != 5 && sync != 2) break; + pb = (u8 *)&D_800A4F38; + t = *pb; + streamLoad_state = 0; + if (t != 0) { + *pb = 0; + return 2; + } + return 1; + case 17: + if (func_800435CC(9, 0, result) != 0) streamLoad_state = 0x10; + break; + } + return 0; +} + +--- CdQueueBusy (src/800_b_2.c:7204) shares 2: D_8007620C D_80076214 --- +s32 CdQueueBusy(void) { + if (D_8006AEF8 != D_8006AEFC) { + if (D_80076214 == 0) { + if (D_8007620C & 0x80) { + return 2; + } + if (D_8007620C & 0x20) { + return 4; + } + return 1; + } + } else { + D_8007620C = 0; + if (D_80076214 == 0) { + return 0; + } + } + D_80076214 = 0; + return 8; +} + diff --git a/.run/P36/agents/main__func_800359B0/residual.txt b/.run/P36/agents/main__func_800359B0/residual.txt new file mode 100644 index 000000000..71d5bb593 --- /dev/null +++ b/.run/P36/agents/main__func_800359B0/residual.txt @@ -0,0 +1,35 @@ +src/800_c.c:func_800359B0: score 18 (COUNT; mine 165 ins, target 167) — not yet + replace mine[7:8] target[7:8] + 7 beqz v0,9bc | beqz v0,9c4 + replace mine[17:18] target[17:18] + 17 j 9c0 | j 9c8 + replace mine[24:25] target[24:25] + 24 j 9c0 | j 9c8 + replace mine[46:47] target[46:47] + 46 j 9c0 | j 9c8 + replace mine[91:92] target[91:92] + 91 j 9c0 | j 9c8 + replace mine[93:94] target[93:94] + 93 bne v1,v0,9bc | bne v1,v0,9c4 + replace mine[98:99] target[98:99] + 98 beqz v0,9bc | beqz v0,9c4 + replace mine[102:103] target[102:103] + 102 j 9c0 | j 9c8 + replace mine[111:112] target[111:112] + 111 j 9c0 | j 9c8 + replace mine[120:121] target[120:121] + 120 j 9c0 | j 9c8 + replace mine[130:131] target[130:131] + 130 bnez v0,9b4 | bnez v0,9bc + replace mine[136:137] target[136:137] + 136 j 9c0 | j 9c8 + replace mine[142:143] target[142:143] + 142 bnez v0,9b4 | bnez v0,9bc + replace mine[153:154] target[153:154] + 153 beqz v0,89c | bnez v0,9c8 + replace mine[155:156] target[155:156] + 155 j 9c0 | jal 0 + replace mine[157:158] target[157:160] + 157 j 9c0 | j 8d0 + 158 -- | li v0,1 + 159 -- | j 9c8 diff --git a/.run/P36/agents/main__func_800359B0/sites.txt b/.run/P36/agents/main__func_800359B0/sites.txt new file mode 100644 index 000000000..23f1c3de8 --- /dev/null +++ b/.run/P36/agents/main__func_800359B0/sites.txt @@ -0,0 +1 @@ +NEEDED barrier line 482 diff --git a/.run/P36/agents/main__func_800359B0/tu.txt b/.run/P36/agents/main__func_800359B0/tu.txt new file mode 100644 index 000000000..0cd9946a1 --- /dev/null +++ b/.run/P36/agents/main__func_800359B0/tu.txt @@ -0,0 +1,2 @@ +src/800_c.c +func_800359B0 diff --git a/.run/P36/agents/main__func_80036AF8/body_free.c b/.run/P36/agents/main__func_80036AF8/body_free.c new file mode 100644 index 000000000..3fc9615fc --- /dev/null +++ b/.run/P36/agents/main__func_80036AF8/body_free.c @@ -0,0 +1,79 @@ +void func_80036AF8(CdlLOC *loc, s32 flags) { + CdReq req; + s32 mode; + s32 n; + s32 idx; + s32 lo; + s16 h; + s32 drv; + s32 hi; + u8 b; + s32 i; + s32 ret; + u8 *rec; + u8 *rec2; + u8 *tbl; + s32 hoff; + + mode = flags + 0; + if (!(flags & 0x4000)) { + return; + } + + n = flags & 0xF; + idx = n + 0; + lo = (s32)(flags << 16) >> 20; + drv = ((s32)(flags << 16) >> 25) & 0x1F; + hi = drv + 0; + h = lo & 0x1F; + if (lo & 1) { + if (*(u8 *)((u8 *)&D_8006A6A0 + drv * 0x48) != 0) { + idx = n + 4; + } else { + idx = n + 8; + } + } + + h = h >> 1; + rec = (u8 *)*(s32 *)((u8 *)&D_8006A69C + hi * 0x48); + rec2 = rec + (h << 6); + b = *(u8 *)(rec2 + (idx << 2) + 1); + if ((b & 0xF0) == 0) { + return; + } + + if (D_8006AEE8 != 0) { + if ((b & 0xF) == 0) { + return; + } + if ((b & 0xF) == 1) { + for (i = 0; i < D_8006AEE8; i++) { + func_80034DFC(*(short *)(&D_80078F10 + i)); + (&D_80078F10)[i] = 0; + } + D_8006AEE8 = 0; + } + } + + req.f08 = (s32)func_80035270; + D_800A46BA = 0; + if (h != 0) { + ret = CdPosToInt(loc); + hoff = hi * 0x48; + tbl = (u8 *)&D_8006A6A4; + req.f0c = ret + *(s32 *)(tbl + hoff + h * 4); + } else { + req.f0c = CdPosToInt(loc); + } + req.f10 = (s16)mode; + req.f1c = (s32)func_80036D24; + req.f24 = (s32)func_800359B0; + req.f20 = 0; + req.f28 = (s32)func_80036FB0; + ret = func_80034CF0((u8 *)&req); + if (ret != 0) { + (&D_80078F10)[D_8006AEE8] = ret; + D_8006AEE8 = D_8006AEE8 + 1; + } + D_800A4F1A = 1; +} diff --git a/.run/P36/agents/main__func_80036AF8/body_tree.c b/.run/P36/agents/main__func_80036AF8/body_tree.c new file mode 100644 index 000000000..e00a698c2 --- /dev/null +++ b/.run/P36/agents/main__func_80036AF8/body_tree.c @@ -0,0 +1,80 @@ +void func_80036AF8(CdlLOC *loc, s32 flags) { + register s32 zr __asm__("$0"); // !FAKE: pin $0 — NEEDED DIFFERS (P36 rung B tus9) + CdReq req; + s32 mode; + s32 n; + s32 idx; + s32 lo; + s16 h; + s32 drv; + s32 hi; + u8 b; + s32 i; + s32 ret; + u8 *rec; + u8 *rec2; + u8 *tbl; + s32 hoff; + + mode = flags + zr; + if (!(flags & 0x4000)) { + return; + } + + n = flags & 0xF; + idx = n + zr; + lo = (s32)(flags << 16) >> 20; + drv = ((s32)(flags << 16) >> 25) & 0x1F; + hi = drv + zr; + h = lo & 0x1F; + if (lo & 1) { + if (*(u8 *)((u8 *)&D_8006A6A0 + drv * 0x48) != 0) { + idx = n + 4; + } else { + idx = n + 8; + } + } + + h = h >> 1; + rec = (u8 *)*(s32 *)((u8 *)&D_8006A69C + hi * 0x48); + rec2 = rec + (h << 6); + b = *(u8 *)(rec2 + (idx << 2) + 1); + if ((b & 0xF0) == 0) { + return; + } + + if (D_8006AEE8 != 0) { + if ((b & 0xF) == 0) { + return; + } + if ((b & 0xF) == 1) { + for (i = 0; i < D_8006AEE8; i++) { + func_80034DFC(*(short *)(&D_80078F10 + i)); + (&D_80078F10)[i] = 0; + } + D_8006AEE8 = 0; + } + } + + req.f08 = (s32)func_80035270; + D_800A46BA = 0; + if (h != 0) { + ret = CdPosToInt(loc); + hoff = hi * 0x48; + tbl = (u8 *)&D_8006A6A4; + req.f0c = ret + *(s32 *)(tbl + hoff + h * 4); + } else { + req.f0c = CdPosToInt(loc); + } + req.f10 = (s16)mode; + req.f1c = (s32)func_80036D24; + req.f24 = (s32)func_800359B0; + req.f20 = 0; + req.f28 = (s32)func_80036FB0; + ret = func_80034CF0((u8 *)&req); + if (ret != 0) { + (&D_80078F10)[D_8006AEE8] = ret; + D_8006AEE8 = D_8006AEE8 + 1; + } + D_800A4F1A = 1; +} diff --git a/.run/P36/agents/main__func_80036AF8/history.txt b/.run/P36/agents/main__func_80036AF8/history.txt new file mode 100644 index 000000000..cd2fbbeeb --- /dev/null +++ b/.run/P36/agents/main__func_80036AF8/history.txt @@ -0,0 +1,14 @@ +g6b: verdict NO-MATCH start 31 best 11 compiles 322 path R14 param-width flags s32->u16 @1395 + R7 do-while @1422 + R9 swap-stmts @1417 +best-scoring single candidates of the last trace (move -> score [residual class]): + R9 swap-stmts @1417 -> 11 [COUNT] (from 16) + R9 swap-stmts @1417 -> 13 [COUNT] (from 18) + R6 inline mode @1412 -> 15 [COUNT] (from 16) + R7 do-while @1422 -> 16 [COUNT] (from 23) + R12 width b u8->s32 @1404 -> 16 [COUNT] (from 16) + R8 hoist tmp0 @1419 -> 16 [COUNT] (from 16) + R7 block @1412 -> 16 [COUNT] (from 16) + R10 param-copy loc @1411 -> 16 [COUNT] (from 16) + R12 width b u8->u16 @1404 -> 16 [COUNT] (from 16) + R8 hoist tmp0 @1420 -> 16 [COUNT] (from 16) + R9 swap-stmts @1418 -> 16 [COUNT] (from 16) + R10 param-copy flags @1411 -> 16 [COUNT] (from 16) diff --git a/.run/P36/agents/main__func_80036AF8/neighbours.txt b/.run/P36/agents/main__func_80036AF8/neighbours.txt new file mode 100644 index 000000000..8b1378917 --- /dev/null +++ b/.run/P36/agents/main__func_80036AF8/neighbours.txt @@ -0,0 +1 @@ + diff --git a/.run/P36/agents/main__func_80036AF8/related.txt b/.run/P36/agents/main__func_80036AF8/related.txt new file mode 100644 index 000000000..6c9c3308e --- /dev/null +++ b/.run/P36/agents/main__func_80036AF8/related.txt @@ -0,0 +1,118 @@ +=== lever-free bodies in main sharing a callee or global with func_80036AF8 (14 found; top 6 by shared symbols) — read them for the SHAPE === +--- func_80036D58 (src/800_c.c:1513) shares 7: D_8006AEE8 D_80078F10 D_800A46BA D_800A4F1A func_80034CF0 func_80034DFC func_80036FB0 --- +void func_80036D58(s16 arg0) +{ + CdReq req; + s32 pad[2]; + s32 i; + s16 *p; + s32 r; + s32 n; + s32 cnt; + + if (arg0 != 0 || D_800C6D28 != 0) { + D_800A46BA = 0; + if (D_8006AEE8 != 0) { + i = 0; + if (D_8006AEE8 > 0) { + p = (s16 *)&D_80078F10; + do { + func_80034DFC(*p); + i++; + cnt = D_8006AEE8; + *(s32 *)p = 0; + p += 2; + } while (i < cnt); + } + D_8006AEE8 = 0; + } + req.f08 = (s32)func_80035C4C; + req.f0c = arg0; + req.f1c = (s32)func_80036F98; + req.f20 = 0; + req.f24 = (s32)func_8003602C; + req.f28 = (s32)func_80036FB0; + r = func_80034CF0((u8 *)&req); + n = D_8006AEE8; + (&D_80078F10)[n] = r; + if (r != 0) { + D_8006AEE8 = n + 1; + } + D_800A4F1A = 0; + if (arg0 != 0) { + D_800C6D28 = 0; + } + func_8003EDE8(0, ((u32)D_800A4EF8 * 97) >> 7 & 0xFF, ((u32)D_800A4EF8 * 97) >> 7 & 0xFF); + } +} + +--- func_80036D24 (src/800_c.c:1480) shares 3: D_8006AEE8 D_80078F10 D_800A4F1A --- +void func_80036D24(void) { + s32 v0 = D_8006AEE8; + D_80078F10 = 0; + if (v0 < 2) { + D_8006AEE8 = 0; + D_800A4F1A = 0; + } +} + +--- func_80036F18 (src/800_c.c:1589) shares 3: D_8006AEE8 D_80078F10 func_80034DFC --- +void func_80036F18(void) { + s32 i; + + if (D_8006AEE8 != 0) { + D_800C6D28 = D_800A63E8; + for (i = 0; i < D_8006AEE8; i++) { + func_80034DFC(*(short *)(&D_80078F10 + i)); + (&D_80078F10)[i] = 0; + } + D_8006AEE8 = 0; + } +} + +--- func_80036F98 (src/800_c.c:1605) shares 2: D_8006AEE8 D_80078F10 --- +void func_80036F98(void) { + D_80078F10 = 0; + D_8006AEE8 = 0; +} + +--- func_80036FB0 (src/800_c.c:1610) shares 2: D_8006AEE8 D_80078F10 --- +void func_80036FB0(s32 arg0, s32 arg1) { + s32 i; + + for (i = 0; i < D_8006AEE8; i++) { + if ((&D_80078F10)[i] == arg0) { + (&D_80078F10)[i] = arg1; + } + } +} + +--- func_80034C24 (src/800_b_2.c:7247) shares 2: D_8006AEE8 D_80078F10 --- +void func_80034C24(void) { + s32 *p = &D_80078F10; + s32 i; + + D_8006AEF8 = 0; + D_8006AEFC = 0; + D_8006AEF4 = 0; + D_800A63E4 = 0; + streamLoad_savedReadyCB = 0; + streamLoad_cbActive = 0; + streamLoad_state = 0; + D_800A6544 = 0; + D_8006AEE8 = 0; + D_800A63E8 = 0; + D_8007610C = 0; + D_8006AEF5 = 0; + D_8007620C = 0; + D_80076114 = 0; + D_80076214 = 0; + + for (i = 0; i < 5; i++) { + p[i] = 0; + } + + D_800A5BC8 = CdGetToc(D_800C7D30); + D_800C6D28 = 0; +} + diff --git a/.run/P36/agents/main__func_80036AF8/residual.txt b/.run/P36/agents/main__func_80036AF8/residual.txt new file mode 100644 index 000000000..e3818178a --- /dev/null +++ b/.run/P36/agents/main__func_80036AF8/residual.txt @@ -0,0 +1,47 @@ +src/800_c.c:func_80036AF8: score 31 (COUNT; mine 139 ins, target 139) — not yet + register pairs (mine -> target, count): s2->s3 x4, s3->s2 x3, s2->a0 x2, s5->s4 x2, a1->a3 x1, s4->s5 x1 + insert mine[1:1] target[1:3] + 1 -- | sw s4,88(sp) + 2 -- | move s4,a0 + replace mine[2:6] target[4:6] + 2 move s5,a0 | move s5,a1 + 3 sw s4,88(sp) | andi v0,a1,0x4000 + 4 move s4,a1 | -- + 5 andi v0,s4,0x4000 | -- + replace mine[12:14] target[12:15] + 12 andi a1,s4,0xf | andi a2,a1,0xf + 13 sll v0,s4,0x10 | move a3,a2 + 14 -- | sll v0,a1,0x10 + replace mine[15:16] target[16:17] + 15 andi s3,v1,0x1f | andi s2,v1,0x1f + insert mine[17:17] target[18:19] + 17 -- | andi a0,v0,0x1f + replace mine[18:22] target[20:24] + 18 beqz v1,1908 | beqz v1,1908 + 19 andi s2,v0,0x1f | move s3,a0 + 20 sll v0,s2,0x3 | sll v0,a0,0x3 + 21 addu v0,v0,s2 | addu v0,v0,a0 + replace mine[27:33] target[29:33] + 27 beqz v0,1904 | bnez v0,1908 + 28 nop | addiu a3,a2,4 + 29 j 1908 | addiu a3,a2,8 + 30 addiu a1,a1,4 | sll a0,s2,0x10 + 31 addiu a1,a1,8 | -- + 32 sll a0,s3,0x10 | -- + replace mine[34:36] target[34:36] + 34 sll v0,s2,0x3 | sll v0,s3,0x3 + 35 addu v0,v0,s2 | addu v0,v0,s3 + replace mine[42:43] target[42:43] + 42 sll v1,a1,0x2 | sll v1,a3,0x2 + replace mine[48:49] target[48:49] + 48 move s3,a0 | move s2,a0 + replace mine[76:77] target[76:77] + 76 sll v0,s3,0x10 | sll v0,s2,0x10 + replace mine[83:86] target[83:86] + 83 move a0,s5 | move a0,s4 + 84 sll v1,s2,0x3 | sll v1,s3,0x3 + 85 addu v1,v1,s2 | addu v1,v1,s3 + replace mine[96:97] target[96:97] + 96 move a0,s5 | move a0,s4 + replace mine[99:100] target[99:100] + 99 sll v0,s4,0x10 | sll v0,s5,0x10 diff --git a/.run/P36/agents/main__func_80036AF8/sites.txt b/.run/P36/agents/main__func_80036AF8/sites.txt new file mode 100644 index 000000000..c709ee67c --- /dev/null +++ b/.run/P36/agents/main__func_80036AF8/sites.txt @@ -0,0 +1 @@ +NEEDED pin $0 line 1396 diff --git a/.run/P36/agents/main__func_80036AF8/tu.txt b/.run/P36/agents/main__func_80036AF8/tu.txt new file mode 100644 index 000000000..eede2872d --- /dev/null +++ b/.run/P36/agents/main__func_80036AF8/tu.txt @@ -0,0 +1,2 @@ +src/800_c.c +func_80036AF8 diff --git a/.run/P36/agents/main__func_80037EA0/body_free.c b/.run/P36/agents/main__func_80037EA0/body_free.c new file mode 100644 index 000000000..c5aff9760 --- /dev/null +++ b/.run/P36/agents/main__func_80037EA0/body_free.c @@ -0,0 +1,20 @@ +void func_80037EA0(void) +{ + extern void func_8003D3B4(s32, s32); + u8 *p; + s32 i; + u32 mask; + + i = 0; + mask = 0xFFF9FFFF; + p = D_800C6E2E; + do { + if (p[-4] != 0 && p[-1] == 0 && p[0] != 0) { + func_8003D3B4(i, 8); + *(u32 *)(p - 0x4A) &= mask; + p[0] = 0; + } + i++; + p += 0x60; + } while (i < 0x10); +} diff --git a/.run/P36/agents/main__func_80037EA0/body_tree.c b/.run/P36/agents/main__func_80037EA0/body_tree.c new file mode 100644 index 000000000..961f7982c --- /dev/null +++ b/.run/P36/agents/main__func_80037EA0/body_tree.c @@ -0,0 +1,20 @@ +void func_80037EA0(void) +{ + extern void func_8003D3B4(s32, s32); + register u8 *p __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus9) + s32 i; + u32 mask; + + i = 0; + mask = 0xFFF9FFFF; + p = D_800C6E2E; + do { + if (p[-4] != 0 && p[-1] == 0 && p[0] != 0) { + func_8003D3B4(i, 8); + *(u32 *)(p - 0x4A) &= mask; + p[0] = 0; + } + i++; + p += 0x60; + } while (i < 0x10); +} diff --git a/.run/P36/agents/main__func_80037EA0/history.txt b/.run/P36/agents/main__func_80037EA0/history.txt new file mode 100644 index 000000000..6a033a5fe --- /dev/null +++ b/.run/P36/agents/main__func_80037EA0/history.txt @@ -0,0 +1,14 @@ +g6b: verdict NO-MATCH start 33 best 18 compiles 239 path R8 temp tmp0 @2348 +best-scoring single candidates of the last trace (move -> score [residual class]): + R8 temp tmp0 @2348 -> 18 [COUNT] (from 33) + R12 width i s32->u16 @2339 -> 18 [COUNT] (from 18) + R8 temp tmp1 @2349 -> 18 [COUNT] (from 18) + R7 block @2349 -> 18 [COUNT] (from 18) + R9 swap-stmts @2349 -> 18 [COUNT] (from 18) + R4 decl-move p 0->1 -> 18 [COUNT] (from 18) + R6 inline mask @2344 -> 18 [COUNT] (from 18) + R8 base tmp1 @2349 -> 18 [COUNT] (from 18) + R7 do-while @2349 -> 18 [COUNT] (from 18) + R9 swap-stmts @2350 -> 18 [COUNT] (from 18) + R4 decl-move p 0->2 -> 18 [COUNT] (from 18) + R12 width i s32->u8 @2339 -> 18 [COUNT] (from 18) diff --git a/.run/P36/agents/main__func_80037EA0/neighbours.txt b/.run/P36/agents/main__func_80037EA0/neighbours.txt new file mode 100644 index 000000000..8b1378917 --- /dev/null +++ b/.run/P36/agents/main__func_80037EA0/neighbours.txt @@ -0,0 +1 @@ + diff --git a/.run/P36/agents/main__func_80037EA0/related.txt b/.run/P36/agents/main__func_80037EA0/related.txt new file mode 100644 index 000000000..579c7143b --- /dev/null +++ b/.run/P36/agents/main__func_80037EA0/related.txt @@ -0,0 +1,76 @@ +=== lever-free bodies in main sharing a callee or global with func_80037EA0 (2 found; top 6 by shared symbols) — read them for the SHAPE === +--- func_8002CCD8 (src/800_b_2.c:362) shares 1: func_8003D3B4 --- +void func_8002CCD8(void) +{ + s16 buf[4]; + s32 i; + s32 depth; + s32 mode; + s32 *p; + + func_80042610(0); + VSync(0); + for (i = 0; i < 0x18; i++) { + func_8003D3B4(i, 8); + } + func_8003C23C(0, 0xFFFFFF); + func_8003D434(&buf[0], &buf[1]); + i = 15; + p = &D_800A4EA4; + mode = 3; + depth = 0x3BF1; + while (i != 0) { + VSync(0); + buf[1] = buf[0] * i >> 4; + SpuSetReverbModeDepth(buf[1], buf[1]); + *p = mode; + *(s16 *)((s16 *)p + 3) = *(s16 *)((s16 *)p + 2) = depth; + func_8003C598(p); + depth -= 0x3FF; + i--; + } + SsEnd(); + func_8003D630(); + SpuQuit(); +} + +--- func_80037D98 (src/800_c.c:2280) shares 1: D_800C6E2E --- +void func_80037D98(void) { + s32 i; + s32 offset; + s32 val; + s32 *table; + + D_800762B0 = D_800A4EFE; + + i = 0; + table = (s32 *)D_80073140; + offset = 0; + while (i < 0x10) { + val = *table; + table++; + i++; + D_800C6E2A[offset] = 0; + D_800C6E2B[offset] = 0; + D_800C6E2C[offset] = 0; + D_800C6E2D[offset] = 0; + *(s16 *)&D_800C6DEC[offset] = 0; + *(s16 *)&D_800C6DEE[offset] = 0; + *(s32 *)&D_800C6DE4[offset] = 0; + D_800C6E2E[offset] = 0; + *(s32 *)&D_800C6DE0[offset] = val; + offset += 0x60; + } + + i = 0; + offset = 0; + for (; i < 2; i++) { + D_800B9ED3[offset] = 0; + D_800B9ED2[offset] = 0; + *(s16 *)&D_800B9EC8[offset] = i; + offset += 0x1FC; + } + + func_8003D424(&D_80079A68); +} + diff --git a/.run/P36/agents/main__func_80037EA0/residual.txt b/.run/P36/agents/main__func_80037EA0/residual.txt new file mode 100644 index 000000000..0c016943e --- /dev/null +++ b/.run/P36/agents/main__func_80037EA0/residual.txt @@ -0,0 +1,46 @@ +src/800_c.c:func_80037EA0: score 33 (COUNT; mine 44 ins, target 39) — not yet + register pairs (mine -> target, count): s1->s0 x1, s2->s1 x1 + replace mine[0:1] target[0:3] + 0 addiu sp,sp,-40 | addiu sp,sp,-32 + 1 -- | sw s1,20(sp) + 2 -- | move s1,zero + replace mine[2:9] target[4:6] + 2 move s2,zero | lui s2,0xfff9 + 3 sw s3,28(sp) | ori s2,s2,0xffff + 4 lui s3,0xfff9 | -- + 5 ori s3,s3,0xffff | -- + 6 sw s1,20(sp) | -- + 7 lui s1,0x0 | -- + 8 addiu s1,s1,0 | -- + replace mine[10:13] target[7:11] + 10 addiu s0,s1,-74 | lui s0,0x0 + 11 sw ra,32(sp) | addiu s0,s0,0 + 12 lbu v0,70(s0) | sw ra,28(sp) + 13 -- | lbu v0,-4(s0) + replace mine[14:15] target[12:13] + 14 beqz v0,2cac | beqz v0,2ca0 + replace mine[16:17] target[14:15] + 16 lbu v0,73(s0) | lbu v0,-1(s0) + replace mine[18:19] target[16:17] + 18 bnez v0,2cac | bnez v0,2ca0 + replace mine[20:21] target[18:19] + 20 lbu v0,0(s1) | lbu v0,0(s0) + replace mine[22:24] target[20:22] + 22 beqz v0,2cac | beqz v0,2ca0 + 23 move a0,s2 | move a0,s1 + replace mine[26:32] target[24:31] + 26 lw v0,0(s0) | lw v0,-74(s0) + 27 nop | sb zero,0(s0) + 28 and v0,v0,s3 | and v0,v0,s2 + 29 sw v0,0(s0) | sw v0,-74(s0) + 30 sb zero,0(s1) | addiu s1,s1,1 + 31 addiu s2,s2,1 | slti v0,s1,16 + 32 -- | bnez v0,2c58 + replace mine[33:38] target[32:33] + 33 slti v0,s2,16 | lw ra,28(sp) + 34 bnez v0,2c60 | -- + 35 addiu s1,s1,96 | -- + 36 lw ra,32(sp) | -- + 37 lw s3,28(sp) | -- + replace mine[41:42] target[36:37] + 41 addiu sp,sp,40 | addiu sp,sp,32 diff --git a/.run/P36/agents/main__func_80037EA0/sites.txt b/.run/P36/agents/main__func_80037EA0/sites.txt new file mode 100644 index 000000000..50cd5cb5e --- /dev/null +++ b/.run/P36/agents/main__func_80037EA0/sites.txt @@ -0,0 +1,3 @@ +NEEDED pin $16 line 2338 +REMOVED pin $17 line 2339 +REMOVED pin $18 line 2340 diff --git a/.run/P36/agents/main__func_80037EA0/tu.txt b/.run/P36/agents/main__func_80037EA0/tu.txt new file mode 100644 index 000000000..d35c55c04 --- /dev/null +++ b/.run/P36/agents/main__func_80037EA0/tu.txt @@ -0,0 +1,2 @@ +src/800_c.c +func_80037EA0 diff --git a/.run/P36/agents/main__func_80037F3C/body_free.c b/.run/P36/agents/main__func_80037F3C/body_free.c new file mode 100644 index 000000000..2d336b083 --- /dev/null +++ b/.run/P36/agents/main__func_80037F3C/body_free.c @@ -0,0 +1,25 @@ +void func_80037F3C(void) +{ + /* TU-absent names, block scope */ + extern u8 D_800C6DD0[]; + extern void func_8003B250(s32, void *); + + u8 *p; + s32 i; + u8 *base; + + base = D_800C6DD0; + i = 0; + p = base + 0x5E; + do { + if (p[-4] != 0 && p[-1] != 0) { + func_8003B250(i, base + 0x10); + *(u32 *)(p - 0x4A) = 0; + p[-1] = 0; + p[0] = 0; + } + i++; + p += 0x60; + base += 0x60; + } while (i < 0x10); +} diff --git a/.run/P36/agents/main__func_80037F3C/body_tree.c b/.run/P36/agents/main__func_80037F3C/body_tree.c new file mode 100644 index 000000000..5b1e35e51 --- /dev/null +++ b/.run/P36/agents/main__func_80037F3C/body_tree.c @@ -0,0 +1,25 @@ +void func_80037F3C(void) +{ + /* TU-absent names, block scope */ + extern u8 D_800C6DD0[]; + extern void func_8003B250(s32, void *); + + register u8 *p __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus9) + s32 i; + u8 *base; + + base = D_800C6DD0; + i = 0; + p = base + 0x5E; + do { + if (p[-4] != 0 && p[-1] != 0) { + func_8003B250(i, base + 0x10); + *(u32 *)(p - 0x4A) = 0; + p[-1] = 0; + p[0] = 0; + } + i++; + p += 0x60; + base += 0x60; + } while (i < 0x10); +} diff --git a/.run/P36/agents/main__func_80037F3C/history.txt b/.run/P36/agents/main__func_80037F3C/history.txt new file mode 100644 index 000000000..2d78e51ea --- /dev/null +++ b/.run/P36/agents/main__func_80037F3C/history.txt @@ -0,0 +1,14 @@ +g6b: verdict NO-MATCH start 15 best 14 compiles 217 path R9 swap-stmts @2373 +best-scoring single candidates of the last trace (move -> score [residual class]): + R9 swap-stmts @2373 -> 14 [COUNT] (from 15) + R7 block @2378 -> 14 [COUNT] (from 14) + R9 swap-stmts @2372 -> 14 [COUNT] (from 14) + R4 decl-move p 1->0 -> 14 [COUNT] (from 14) + R4 decl-move p 1->2 -> 14 [COUNT] (from 14) + R7 block @2374 -> 14 [COUNT] (from 14) + R4 decl-move p 1->3 -> 14 [COUNT] (from 14) + R7 do-while @2374 -> 14 [COUNT] (from 14) + R7 block @2372 -> 14 [COUNT] (from 14) + R7 do-while @2372 -> 14 [COUNT] (from 14) + R7 block @2376 -> 14 [COUNT] (from 14) + R9 swap-stmts @2367 -> 14 [COUNT] (from 14) diff --git a/.run/P36/agents/main__func_80037F3C/neighbours.txt b/.run/P36/agents/main__func_80037F3C/neighbours.txt new file mode 100644 index 000000000..8b1378917 --- /dev/null +++ b/.run/P36/agents/main__func_80037F3C/neighbours.txt @@ -0,0 +1 @@ + diff --git a/.run/P36/agents/main__func_80037F3C/related.txt b/.run/P36/agents/main__func_80037F3C/related.txt new file mode 100644 index 000000000..8ebb81f56 --- /dev/null +++ b/.run/P36/agents/main__func_80037F3C/related.txt @@ -0,0 +1,334 @@ +=== lever-free bodies in main sharing a callee or global with func_80037F3C (3 found; top 6 by shared symbols) — read them for the SHAPE === +--- func_8003916C (src/800_c.c:3341) shares 1: D_800C6DD0 --- +void func_8003916C(s16 arg0) +{ + extern u8 D_800C6DD0[]; + u8 *a1; + s32 off; + + a1 = &D_800C6DD0[arg0 * 0x60]; + if (a1[0x5A] != 0) { + off = *(s16 *)&a1[6] * 26; + *(u8 *)(*(u32 *)&a1[0x50] + off + arg0 + 0x23) = 0; + a1[0x5A] = 0; + } +} + +--- func_8003A0E4 (src/800_c.c:3990) shares 1: D_800C6DD0 --- +void func_8003A0E4(void *arg0, s16 arg1) { + u8 *src; + u8 *t2; + u8 *t1; + u8 *a2; + u8 *a1; + s32 i; + s32 pan; + u32 vol; + u32 tmp; + u32 prod; + + t2 = (u8 *)arg0 + (arg1 * 26 + 26); + t1 = t2 + 9; + src = *(u8 **)arg0; + *(u32 *)arg0 = (u32)src + 1; + *(s16 *)(t2 + 2) = src[0] & 0x7F; + for (i = 0; i < 16; i++) { + if (*t1++ != 0) { + a2 = D_800C6DD0 + i * 0x60; + vol = *(s16 *)(a2 + 4) << 8; + pan = *(s16 *)(t2 + 2); + if (pan >= 65) { + vol += (u32)((pan - 64) * a2[0x59] * 4); + } else if (pan < 64) { + vol -= (u32)((64 - pan) * a2[0x58] * 4); + } + tmp = *(s32 *)(a2 + 0x54) - 0x3C00; + vol -= tmp; + a1 = a2 + 0x10; + if (vol >= 0x5301) { + *(s16 *)(a2 + 0x24) = 0x3FFF; + } else { + prod = D_8006AB30[vol >> 8]; + prod *= D_8006ABD8[(vol & 0xFE) / 2]; + *(s16 *)(a2 + 0x24) = prod >> 15; + } + *(u32 *)(a1 + 4) |= 0x10; + a2[0x5D] = 1; + } + } +} + +--- func_80039308 (src/800_c.c:3468) shares 1: D_800C6DD0 --- +void func_80039308(u8 **arg0, s16 arg1) { + u8 *src; + u8 *s0; + u8 *t9; + u8 *a3; + u8 *t1; + u8 *a1p; + u8 *a0p; + u8 *p; + u8 *q; + u8 *r; + u8 *tb; + s32 b2; + s32 b3; + s16 b4; + s32 bb; + u8 t3; + u8 t5; + s16 t7; + s16 cc; + s32 i; + s32 cnt; + s32 a2; + s32 t0; + s32 v1; + s32 res; + s32 idx1; + u8 *cb; + s32 *mm; + s32 *mp; + s32 mv2; + s32 two; + s32 tmp; + s32 pan; + s32 pan1; + s32 x; + s32 s17; + s32 s18; + s32 v; + s32 u26; + s32 n; + s32 off; + u32 t2; + u16 vol; + u32 vv; + u32 prod; + s32 k2; + u8 *tbl; + s32 tmp2; + s32 coff; + s32 xoff; + s32 mv; + s32 j; + s32 ax; + s32 ax2; + u8 *pb; + s32 c7; + u32 gx; + + src = *arg0; + *arg0 = src + 1; + b2 = src[0]; + *arg0 = src + 2; + b3 = src[1]; + + if (b3 != 0) { + if ((((u8 *)arg0 + arg1)[0x1BA] & 1) == 0) { + s0 = (u8 *)arg0 + (arg1 * 26 + 26); + i = 0; + b4 = *s0; + n = b4; + v = n * 0x10; + t9 = *(u8 **)((u8 *)arg0 + 0x1E0) + n * 0x200; + cnt = *(*(u8 **)((u8 *)arg0 + 0x1DC) + v); + if (cnt != 0) { + u26 = b2; + do { + if (u26 >= t9[6] && u26 <= t9[7]) { + t2 = 0x100; + t3 = 0; + t5 = 0; + t7 = -1; + t0 = 0; + a3 = D_800C6DDD; + a2 = 1; + t1 = D_800762B0; + do { + if (a3[0x4E] != 0) { + bb = a3[0]; + if ((u8)bb < (t2 & 0xFF)) { + t3 = a2; + t2 = bb & 0xFF; + } else if ((u8)bb == (t2 & 0xFF)) { + if (D_800762B3[a2] == 0 && *t1 == 2) { + t3 = a2; + } + } + } else { + t5 = 1; + t7 = t0; + break; + } + a2++; + t1++; + t0++; + a3 += 0x60; + } while (t0 < 0x10); + if (t5 == 0) { + if (*t9 >= t2) { + t7 = t3 - 1; + } else { + a1p = D_800762B0; + a0p = D_800762B4; + v1 = 0; + while (v1 < 0x10) { + if (*a1p == 2 && *a0p == 0) { + res = v1; + goto found; + } + v1++; + a1p++; + a0p++; + } + res = -1; + found: + t7 = res; + } + } + if (t7 >= 0) { + p = &D_800C6DD0[t7 * 0x60]; + q = p + 0x10; + p[0xD] = *t9; + if (p[0x5C] != 0 && *(s16 *)(p + 8) == b4 && p[0xC] == i && + *(s16 *)(*(u32 *)(p + 0x50) + 0x1EC) == *(s16 *)((u8 *)arg0 + 0x1EC)) { + *(s32 *)(p + 0x14) = 0x13; + } else { + tmp = *(s16 *)(t9 + 0x16) - 1; + tbl = *(u8 **)((u8 *)arg0 + 0x1DC) + (tmp >> 1) * 0x10; + if (tmp & 1) { + x = *(s16 *)(tbl + 0xE) << 3; + } else { + x = *(s16 *)(tbl + 0xC) << 3; + } + *(s32 *)(q + 0x1C) = x; + *(u16 *)(q + 0x3A) = *(u16 *)(t9 + 0x10); + *(u16 *)(q + 0x3C) = *(u16 *)(t9 + 0x12); + *(s32 *)(q + 4) = 0x6009F; + } + gx = s0[1]; + gx -= 0x100; + v = b3 * (u8)gx; + v >>= 7; + v = v * t9[2]; + v >>= 7; + v = D_8006ACD8[v]; + v = v * *(s16 *)((u8 *)arg0 + 0x1F2); + v >>= 7; + if (D_800A4F19 != 0) { + bb = s0[4]; + pan1 = bb + t9[3]; pan1 -= 0x40; + cc = pan1; + if (pan1 < 0) { + cc = 0; + } else if (pan1 >= 0x80) { + cc = 0x7F; + } + if (cc > 0) { + s17 = v * D_8006AF08[0x80 - cc] * 4 >> 16; + } else { + s17 = (s16)v; + } + s18 = v * D_8006AF08[cc] * 4 >> 16; + } else { + s17 = s18 = v * 0x2D41 >> 14; + } + *(s16 *)(q + 8) = (u32)((s16)s17 * *(s16 *)((u8 *)arg0 + 0x10)) >> 14; + *(s16 *)(q + 0xA) = (u32)((s16)s18 * *(s16 *)((u8 *)arg0 + 0x10)) >> 14; + pan = *(s16 *)(s0 + 2); + vol = b2 * 0x100; + if (pan >= 0x41) { + vol = (b2 * 0x100) + (u32)((pan - 0x40) * t9[0xD] * 4); + } else if (pan < 0x40) { + vol = (b2 * 0x100) - (u32)((0x40 - pan) * t9[0xC] * 4); + } + tmp2 = t9[4] * 0x100 - t9[5]; + *(s32 *)(p + 0x54) = tmp2; + tmp2 -= 0x3C00; + vol -= (u32)tmp2; + p[0x58] = t9[0xC]; + p[0x59] = t9[0xD]; + vv = (u16)vol; + if (vv >= 0x5301) { + *(s16 *)(q + 0x14) = 0x3FFF; + } else { + prod = D_8006AB30[vv >> 8]; + prod *= D_8006ABD8[(vv & 0xFE) / 2]; + *(s16 *)(q + 0x14) = prod >> 15; + } + p[0x5D] = 1; + D_800A2B98 &= ~((VMask *)q)->w; + D_800C7D20 |= ((VMask *)q)->w; + D_800762B4[t7] = 1; + if (t9[1] & 4) { + D_800A2BA0 &= ~((VMask *)q)->w; + D_800C7D2C |= ((VMask *)q)->w; + } else { + D_800C7D2C &= ~((VMask *)q)->w; + D_800A2BA0 |= ((VMask *)q)->w; + } + idx1 = t7; + r = &D_800C6DD0[idx1 * 0x60]; + p = r; + if (r[0x5A] != 0) { + coff = *(s16 *)&r[6] * 26; + *(u8 *)(*(u32 *)&r[0x50] + coff + idx1 + 0x23) = 0; + r[0x5A] = 0; + } + r = 0; + *(s0 + idx1 + 9) = 1; + *(s16 *)(p + 4) = b2; + *(s16 *)(p + 8) = b4; + p[0xC] = i; + p[0x5C] = 1; + *(s16 *)(p + 0) = s17; + *(s16 *)(p + 2) = s18; + *(s16 *)(p + 6) = arg1; + *(u32 *)(p + 0x50) = (u32)arg0; + p[0x5B] = 1; + if (*((u8 *)arg0 + 0x1F4) != 0) { + p[0x5A] = 2; + } else { + p[0x5A] = 1; + } + } + } + i++; + t9 += 0x20; + } while (i < cnt); + } + } + } else { + j = 0; + s17 = (s32)((u8 *)arg0 + arg1 * 26); + s18 = b2; + off = 0; + do { + if (((u8 *)s17 + j)[0x23] != 0 && *(s16 *)&D_800C6DD4[off] == s18) { + idx1 = (s16)j; + xoff = idx1 * 0x60; + cb = D_800C6DD0; + r = cb + xoff; + if (r[0x5A] != 0) { + coff = *(s16 *)&r[6] * 26; + *(u8 *)(*(u32 *)&r[0x50] + coff + idx1 + 0x23) = 0; + r[0x5A] = 0; + } + mm = (s32 *)D_80073140; + D_800C7D20 &= ~mm[j]; + D_800A2B98 |= mm[j]; + pb = D_800762B0 + j; + two = 2; + *pb = two; + D_800762B4[j] = 0; + } + cb = 0; + mm = 0; + two = 0; + j++; + off += 0x60; + } while (j < 0x10); + } +} + diff --git a/.run/P36/agents/main__func_80037F3C/residual.txt b/.run/P36/agents/main__func_80037F3C/residual.txt new file mode 100644 index 000000000..c9f1d013c --- /dev/null +++ b/.run/P36/agents/main__func_80037F3C/residual.txt @@ -0,0 +1,26 @@ +src/800_c.c:func_80037F3C: score 15 (COUNT; mine 38 ins, target 34) — not yet + replace mine[0:1] target[0:1] + 0 addiu sp,sp,-40 | addiu sp,sp,-32 + delete mine[6:8] target[6:6] + 6 sw s3,28(sp) | -- + 7 addiu s3,s2,94 | -- + replace mine[9:12] target[7:10] + 9 addiu s0,s2,93 | addiu s0,s2,94 + 10 sw ra,32(sp) | sw ra,28(sp) + 11 lbu v0,-3(s0) | lbu v0,-4(s0) + replace mine[15:16] target[13:14] + 15 lbu v0,0(s0) | lbu v0,-1(s0) + replace mine[21:22] target[19:21] + 21 sw zero,-73(s0) | sw zero,-74(s0) + 22 -- | sb zero,-1(s0) + delete mine[23:24] target[22:22] + 23 sb zero,0(s3) | -- + delete mine[26:27] target[24:24] + 26 addiu s3,s3,96 | -- + replace mine[28:29] target[25:26] + 28 bnez v0,2cf8 | bnez v0,2cf0 + replace mine[30:32] target[27:28] + 30 lw ra,32(sp) | lw ra,28(sp) + 31 lw s3,28(sp) | -- + replace mine[35:36] target[31:32] + 35 addiu sp,sp,40 | addiu sp,sp,32 diff --git a/.run/P36/agents/main__func_80037F3C/sites.txt b/.run/P36/agents/main__func_80037F3C/sites.txt new file mode 100644 index 000000000..9d763f7e8 --- /dev/null +++ b/.run/P36/agents/main__func_80037F3C/sites.txt @@ -0,0 +1,2 @@ +NEEDED pin $16 line 2362 +REMOVED pin $17 line 2363 diff --git a/.run/P36/agents/main__func_80037F3C/tu.txt b/.run/P36/agents/main__func_80037F3C/tu.txt new file mode 100644 index 000000000..e0d5a9551 --- /dev/null +++ b/.run/P36/agents/main__func_80037F3C/tu.txt @@ -0,0 +1,2 @@ +src/800_c.c +func_80037F3C diff --git a/.run/P36/agents/ov_SC06_029__func_8017C954/body_free.c b/.run/P36/agents/ov_SC06_029__func_8017C954/body_free.c new file mode 100644 index 000000000..ae148af0f --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_8017C954/body_free.c @@ -0,0 +1,445 @@ +void func_8017C954(s32 arg0) +{ + typedef struct { u32 w0, w1, w2; } Prim; + + extern s32 func_800491EC(void); + extern void func_800547D8(s32, MATRIX2 *); + extern void func_80052E38(MATRIX2 *); + extern u8 *D_800A5E60; + extern u8 D_800A6610[]; + extern short D_800B9A02; /* TU-visible spelling (engine_core.h + ov_SC01_000.c col-0); unsigned access forced at use — §8d sub-class (b) */ + extern s32 D_801DCCA0; /* fade/flash level driving both overlay colours */ + + DVECTOR2 tmpxy[4]; + SVECTOR2 box[8]; + SVECTOR2 sxy[8]; + SVECTOR2 vv[4]; /* 0xA0..0xBF; only vv[3] is used (arm E vertex copy) */ + MATRIX2 mtx; + struct { long otz, flag, opz, sz0, sz1, sz2, sz3; } g; + + s32 lim; + u32 colA; + u32 colB; + u32 nprim; + s32 nparts; + s32 j; + u32 i; + Part *part; + Prim *prim; + u8 *pkt; + u32 ot; + u8 *vtx; + u8 *va, *vb, *vc, *vd; + u32 w, code; + u32 wx, wy, wz; + s32 xa32, xb32, t32; + s32 xmn1, xmx1, xmn2, xmx2; + s32 mnc, mxc; + s16 my, mny, mx, mn; + s32 d; + u32 e; + + lim = func_800491EC() + *(s32 *)(arg0 + 0x64); + func_800547D8(arg0 + 0x10, &mtx); + func_80052E38(&mtx); + + pkt = D_800A5E60; + ot = (u32)&D_800A6610[(*(u16 *)&D_800B9A02) << 14]; + d = D_801DCCA0; + colA = (d << 16) | (d << 8) | d; + e = d * 2; + if (e > 0xFF) e = 0xFF; + colB = (e << 16) | (e << 8) | e; + part = *(Part **)(arg0 + 0xC); + nparts = *(s32 *)(*(s32 *)(arg0 + 8) + 8); + vtx = *(u8 **)(*(s32 *)(arg0 + 8) + 0x10); + + for (j = 0; j < nparts; j++, part++) { + wx = part->xx; + mn = wx; + mx = wx >> 16; + wy = part->yy; + mny = wy; + my = wy >> 16; + wz = part->zz; + box[0].vx = mn; box[0].vy = mny; + box[1].vx = mx; box[1].vy = mny; + box[2].vx = mn; box[2].vy = mny; + box[3].vx = mx; box[3].vy = mny; + box[4].vx = mn; box[4].vy = my; + box[5].vx = mx; box[5].vy = my; + box[6].vx = mn; box[6].vy = my; + box[7].vx = mx; box[7].vy = my; + wy = wz >> 16; + box[0].vz = wz; + box[1].vz = wz; + box[4].vz = wz; + box[5].vz = wz; + box[2].vz = wy; + box[3].vz = wy; + box[6].vz = wy; + box[7].vz = wy; + + gte_ldv3c(&box[0]); + gte_rtpt(); + gte_stsxy3(&sxy[0], &sxy[1], &sxy[2]); + gte_ldv0(&box[3]); + gte_rtps(); + gte_stsxy(&sxy[3]); + gte_ldv3c(&box[4]); + gte_rtpt(); + gte_stsxy3(&sxy[4], &sxy[5], &sxy[6]); + gte_ldv0(&box[7]); + gte_rtps(); + gte_stsxy(&sxy[7]); + gte_stszotz(&g.otz); + + if (lim >= g.otz) { + xa32 = sxy[0].vx; + xb32 = sxy[1].vx; + if (xb32 < xa32) { xmx1 = xa32; xmn1 = xb32; } else { xmn1 = xa32; xmx1 = xb32; } + t32 = sxy[2].vx; + if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32; + t32 = sxy[3].vx; + if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32; + xa32 = sxy[4].vx; + xb32 = sxy[5].vx; + if (xb32 < xa32) { xmx2 = xa32; xmn2 = xb32; } else { xmn2 = xa32; xmx2 = xb32; } + t32 = sxy[6].vx; + if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32; + t32 = sxy[7].vx; + if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32; + mnc = xmn1; + if (xmn2 < xmn1) mnc = xmn2; + mxc = xmx1; + if (mxc < xmx2) mxc = xmx2; + if ((s16)mxc >= -0xA0 && (s16)mnc < 0xA1) { + xa32 = sxy[0].vy; + xb32 = sxy[1].vy; + if (xb32 < xa32) { xmx1 = xa32; xmn1 = xb32; } else { xmn1 = xa32; xmx1 = xb32; } + t32 = sxy[2].vy; + if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32; + t32 = sxy[3].vy; + if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32; + xa32 = sxy[4].vy; + xb32 = sxy[5].vy; + if (xb32 < xa32) { xmx2 = xa32; xmn2 = xb32; } else { xmn2 = xa32; xmx2 = xb32; } + t32 = sxy[6].vy; + if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32; + t32 = sxy[7].vy; + if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32; + mnc = xmn1; + if (xmn2 < xmn1) mnc = xmn2; + mxc = xmx1; + if (mxc < xmx2) mxc = xmx2; + if ((s16)mxc >= -0x78 && (s16)mnc < 0x79) { + prim = (Prim *)part->prim; + nprim = part->nprim; + for (i = 0; i < nprim; i++, prim++) { + w = prim->w1; + va = vtx + (w & 0xFFFF); + vb = vtx + (w >> 16); + w = prim->w2; + vc = vtx + (w & 0xFFFF); + w = w >> 16; + gte_ldv3(va, vb, vc); + gte_rtpt(); + gte_stflg(&g.flag); + if (!(g.flag & 0x7F85E000)) { + gte_nclip(); + code = w & 7; + vd = vtx + (w & 0xFFF8); + gte_stopz(&g.opz); + if (g.opz > 0) { + switch (code) { + case 4: + case 5: + gte_stsxy3_f3(pkt); + gte_stsz3(&g.sz0, &g.sz1, &g.sz2); + if (((PolyF3 *)pkt)->x0 > ((PolyF3 *)pkt)->x1) { + mx = ((PolyF3 *)pkt)->x0; + mn = ((PolyF3 *)pkt)->x1; + } else { + mn = ((PolyF3 *)pkt)->x0; + mx = ((PolyF3 *)pkt)->x1; + } + if (((PolyF3 *)pkt)->x2 > mx) mx = ((PolyF3 *)pkt)->x2; + else if (((PolyF3 *)pkt)->x2 < mn) mn = ((PolyF3 *)pkt)->x2; + if (mx >= -0xA0 && mn < 0xA1) { + if (((PolyF3 *)pkt)->y0 > ((PolyF3 *)pkt)->y1) { + my = ((PolyF3 *)pkt)->y0; + mny = ((PolyF3 *)pkt)->y1; + } else { + mny = ((PolyF3 *)pkt)->y0; + my = ((PolyF3 *)pkt)->y1; + } + if (((PolyF3 *)pkt)->y2 > my) my = ((PolyF3 *)pkt)->y2; + else if (((PolyF3 *)pkt)->y2 < mny) mny = ((PolyF3 *)pkt)->y2; + if (my >= -0x78 && mny < 0x79) { + s32 za, zb; + u32 *otp; + if (g.sz0 > g.sz1) { + za = g.sz0; + if (za < g.sz2) za = g.sz2; + } else { + za = g.sz1; + if (za < g.sz2) za = g.sz2; + } + g.opz = za; + if (code != 4) g.opz = za + 0x200; + ((PolyF3 *)pkt)->rgbc = prim->w0; + otp = (u32 *)(((g.opz >> 2) << 2) + ot); + *(u32 *)pkt = (*otp & 0xFFFFFF) | 0x4000000; + *otp = (*otp & 0xFF000000) | ((u32)pkt & 0xFFFFFF); + pkt += 0x14; + } + } + break; + case 6: + case 7: + gte_stsxy3_ft3(pkt); + gte_stsz3(&g.sz0, &g.sz1, &g.sz2); + if (((PolyFT3 *)pkt)->x0 > ((PolyFT3 *)pkt)->x1) { + mx = ((PolyFT3 *)pkt)->x0; + mn = ((PolyFT3 *)pkt)->x1; + } else { + mn = ((PolyFT3 *)pkt)->x0; + mx = ((PolyFT3 *)pkt)->x1; + } + if (((PolyFT3 *)pkt)->x2 > mx) mx = ((PolyFT3 *)pkt)->x2; + else if (((PolyFT3 *)pkt)->x2 < mn) mn = ((PolyFT3 *)pkt)->x2; + if (mx >= -0xA0 && mn < 0xA1) { + if (((PolyFT3 *)pkt)->y0 > ((PolyFT3 *)pkt)->y1) { + my = ((PolyFT3 *)pkt)->y0; + mny = ((PolyFT3 *)pkt)->y1; + } else { + mny = ((PolyFT3 *)pkt)->y0; + my = ((PolyFT3 *)pkt)->y1; + } + if (((PolyFT3 *)pkt)->y2 > my) my = ((PolyFT3 *)pkt)->y2; + else if (((PolyFT3 *)pkt)->y2 < mny) mny = ((PolyFT3 *)pkt)->y2; + if (my >= -0x78 && mny < 0x79) { + s32 za, zb; + u32 *otp; + u32 *tp; + if (g.sz0 > g.sz1) { + za = g.sz0; + if (za < g.sz2) za = g.sz2; + } else { + za = g.sz1; + if (za < g.sz2) za = g.sz2; + } + g.opz = za; + if (code == 7) g.opz = za + 0x200; + tp = (u32 *)prim->w0; + ((PolyFT3 *)pkt)->rgbc = tp[0]; + ((PolyFT3 *)pkt)->uvc0 = tp[1]; + ((PolyFT3 *)pkt)->uvp1 = tp[2]; + ((PolyFT3 *)pkt)->uv2 = tp[3]; + otp = (u32 *)(((g.opz >> 2) << 2) + ot); + *(u32 *)pkt = (*otp & 0xFFFFFF) | 0x7000000; + *otp = (*otp & 0xFF000000) | ((u32)pkt & 0xFFFFFF); + pkt += 0x20; + } + } + break; + case 0: + case 1: + gte_stsxy3_f3(pkt); + gte_ldv0(vd); + gte_rtps(); + if (((PolyF4 *)pkt)->x0 > ((PolyF4 *)pkt)->x1) { + mx = ((PolyF4 *)pkt)->x0; + mn = ((PolyF4 *)pkt)->x1; + } else { + mn = ((PolyF4 *)pkt)->x0; + mx = ((PolyF4 *)pkt)->x1; + } + if (((PolyF4 *)pkt)->x2 > mx) mx = ((PolyF4 *)pkt)->x2; + else if (((PolyF4 *)pkt)->x2 < mn) mn = ((PolyF4 *)pkt)->x2; + if (((PolyF4 *)pkt)->y0 > ((PolyF4 *)pkt)->y1) { + my = ((PolyF4 *)pkt)->y0; + mny = ((PolyF4 *)pkt)->y1; + } else { + mny = ((PolyF4 *)pkt)->y0; + my = ((PolyF4 *)pkt)->y1; + } + if (((PolyF4 *)pkt)->y2 > my) my = ((PolyF4 *)pkt)->y2; + else if (((PolyF4 *)pkt)->y2 < mny) mny = ((PolyF4 *)pkt)->y2; + gte_stflg(&g.flag); + if (!(g.flag & 0x7F85E000)) { + gte_stsz4(&g.sz0, &g.sz1, &g.sz2, &g.sz3); + gte_stsxy((long *)&((PolyF4 *)pkt)->x3); + if (((PolyF4 *)pkt)->x3 < mn) mn = ((PolyF4 *)pkt)->x3; + else if (mx < ((PolyF4 *)pkt)->x3) mx = ((PolyF4 *)pkt)->x3; + if (mx >= -0xA0 && mn < 0xA1) { + if (((PolyF4 *)pkt)->y3 < mny) mny = ((PolyF4 *)pkt)->y3; + else if (my < ((PolyF4 *)pkt)->y3) my = ((PolyF4 *)pkt)->y3; + if (my >= -0x78 && mny < 0x79) { + s32 za, zb; + u32 *otp; + zb = g.sz2; + if (zb < g.sz3) zb = g.sz3; + za = g.sz0; + if (za < g.sz1) za = g.sz1; + if (za < zb) za = zb; + g.opz = za; + ((PolyF4 *)pkt)->rgbc = prim->w0; + otp = (u32 *)(((za >> 2) << 2) + ot); + *(u32 *)pkt = (*otp & 0xFFFFFF) | 0x5000000; + *otp = (*otp & 0xFF000000) | ((u32)pkt & 0xFFFFFF); + pkt += 0x18; + } + } + } + break; + case 2: + gte_stsxy3c(&tmpxy[0]); + gte_ldv0(vd); + gte_rtps(); + if (tmpxy[0].vx > tmpxy[1].vx) { + mx = tmpxy[0].vx; + mn = tmpxy[1].vx; + } else { + mn = tmpxy[0].vx; + mx = tmpxy[1].vx; + } + if (tmpxy[2].vx > mx) mx = tmpxy[2].vx; + else if (tmpxy[2].vx < mn) mn = tmpxy[2].vx; + if (tmpxy[0].vy > tmpxy[1].vy) { + my = tmpxy[0].vy; + mny = tmpxy[1].vy; + } else { + mny = tmpxy[0].vy; + my = tmpxy[1].vy; + } + if (tmpxy[2].vy > my) my = tmpxy[2].vy; + else if (tmpxy[2].vy < mny) mny = tmpxy[2].vy; + gte_stflg(&g.flag); + if (!(g.flag & 0x7F85E000)) { + gte_stsz4(&g.sz0, &g.sz1, &g.sz2, &g.sz3); + gte_stsxy((long *)&((PolyFT4 *)pkt)->x3); + if (((PolyFT4 *)pkt)->x3 < mn) mn = ((PolyFT4 *)pkt)->x3; + else if (mx < ((PolyFT4 *)pkt)->x3) mx = ((PolyFT4 *)pkt)->x3; + if (mx >= -0xA0 && mn < 0xA1) { + if (((PolyFT4 *)pkt)->y3 < mny) mny = ((PolyFT4 *)pkt)->y3; + else if (my < ((PolyFT4 *)pkt)->y3) my = ((PolyFT4 *)pkt)->y3; + if (my >= -0x78 && mny < 0x79) { + s32 za, zb; + u32 *otp; + u32 *tp; + u32 uvw; + zb = g.sz2; + if (zb < g.sz3) zb = g.sz3; + za = g.sz0; + if (za < g.sz1) za = g.sz1; + if (za < zb) za = zb; + g.opz = za; + if (code == 3) g.opz = za + 0x200; + *(u32 *)&((PolyFT4 *)pkt)->x0 = *(u32 *)&tmpxy[0]; + *(u32 *)&((PolyFT4 *)pkt)->x1 = *(u32 *)&tmpxy[1]; + *(u32 *)&((PolyFT4 *)pkt)->x2 = *(u32 *)&tmpxy[2]; + tp = (u32 *)prim->w0; + ((PolyFT4 *)pkt)->rgbc = tp[0]; + ((PolyFT4 *)pkt)->uvc0 = tp[1]; + ((PolyFT4 *)pkt)->uvp1 = tp[2]; + uvw = tp[3]; + ((PolyFT4 *)pkt)->uv2 = uvw; + ((PolyFT4 *)pkt)->uv3 = uvw >> 16; + otp = (u32 *)(((g.opz >> 2) << 2) + ot); + *(u32 *)pkt = (*otp & 0xFFFFFF) | 0x9000000; + *otp = (*otp & 0xFF000000) | ((u32)pkt & 0xFFFFFF); + pkt += 0x28; + } + } + } + break; + case 3: + gte_stsxy3c(&tmpxy[0]); + vv[3] = *(SVECTOR2 *)vd; + gte_ldv0(&vv[3]); + gte_rtps(); + if (tmpxy[0].vx > tmpxy[1].vx) { + mx = tmpxy[0].vx; + mn = tmpxy[1].vx; + } else { + mn = tmpxy[0].vx; + mx = tmpxy[1].vx; + } + if (tmpxy[2].vx > mx) mx = tmpxy[2].vx; + else if (tmpxy[2].vx < mn) mn = tmpxy[2].vx; + if (tmpxy[0].vy > tmpxy[1].vy) { + my = tmpxy[0].vy; + mny = tmpxy[1].vy; + } else { + mny = tmpxy[0].vy; + my = tmpxy[1].vy; + } + if (tmpxy[2].vy > my) my = tmpxy[2].vy; + else if (tmpxy[2].vy < mny) mny = tmpxy[2].vy; + /* L1: zero-byte $v1 conflict dial -- keeps my/mny off $v1 so the + * my/mny/mx/mn quad lands on $a2/$a3/$t0/$t1 (see header). */ + gte_stflg(&g.flag); + if (!(g.flag & 0x7F85E000)) { + gte_stsz4(&g.sz0, &g.sz1, &g.sz2, &g.sz3); + gte_stsxy((long *)&tmpxy[3]); + if (tmpxy[3].vx < mn) mn = tmpxy[3].vx; + else if (mx < tmpxy[3].vx) mx = tmpxy[3].vx; + if (mx >= -0xA0 && mn < 0xA1) { + if (tmpxy[3].vy < mny) mny = tmpxy[3].vy; + else if (my < tmpxy[3].vy) my = tmpxy[3].vy; + if (my >= -0x78 && mny < 0x79) { + s32 za, zb; + u32 *otp; + u32 *tp; + u32 uvw; + zb = g.sz2; + if (zb < g.sz3) zb = g.sz3; + za = g.sz0; + if (za < g.sz1) za = g.sz1; + if (za < zb) za = zb; + g.opz = za; + *(u32 *)&((PolyFT4 *)pkt)->x0 = *(u32 *)&tmpxy[0]; + *(u32 *)&((PolyFT4 *)pkt)->x1 = *(u32 *)&tmpxy[1]; + *(u32 *)&((PolyFT4 *)pkt)->x2 = *(u32 *)&tmpxy[2]; + *(u32 *)&((PolyFT4 *)pkt)->x3 = *(u32 *)&tmpxy[3]; + tp = (u32 *)prim->w0; + ((PolyFT4 *)pkt)->rgbc = colA | 0x2E000000; + ((PolyFT4 *)pkt)->uvc0 = tp[1]; + ((PolyFT4 *)pkt)->uvp1 = tp[2]; + uvw = tp[3]; + ((PolyFT4 *)pkt)->uv2 = uvw; + ((PolyFT4 *)pkt)->uv3 = uvw >> 16; + { + u32 *op1 = (u32 *)(((za >> 2) << 2) + ot); + *(u32 *)pkt = (*op1 & 0xFFFFFF) | 0x9000000; + *op1 = (*op1 & 0xFF000000) | ((u32)pkt & 0xFFFFFF); + } + pkt += 0x28; + pkt[3] = 6; + *(u32 *)(pkt + 8) = colB | 0x2A000000; + *(u32 *)(pkt + 0xC) = *(u32 *)&tmpxy[0]; + *(u32 *)(pkt + 4) = 0xE1000040; + *(u32 *)(pkt + 0x10) = *(u32 *)&tmpxy[1]; + *(u32 *)(pkt + 0x14) = *(u32 *)&tmpxy[2]; + *(u32 *)(pkt + 0x18) = *(u32 *)&tmpxy[3]; + { + u32 *op2 = (u32 *)(((g.opz >> 2) << 2) + ot); + *(u32 *)pkt = (*op2 & 0xFFFFFF) | 0x6000000; + *op2 = (*op2 & 0xFF000000) | ((u32)pkt & 0xFFFFFF); + } + pkt += 0x1C; + } + } + } + break; + } + } + } + } + } + } + } + } + D_800A5E60 = pkt; +} diff --git a/.run/P36/agents/ov_SC06_029__func_8017C954/body_tree.c b/.run/P36/agents/ov_SC06_029__func_8017C954/body_tree.c new file mode 100644 index 000000000..9e1f84bb8 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_8017C954/body_tree.c @@ -0,0 +1,446 @@ +void func_8017C954(s32 arg0) +{ + typedef struct { u32 w0, w1, w2; } Prim; + + extern s32 func_800491EC(void); + extern void func_800547D8(s32, MATRIX2 *); + extern void func_80052E38(MATRIX2 *); + extern u8 *D_800A5E60; + extern u8 D_800A6610[]; + extern short D_800B9A02; /* TU-visible spelling (engine_core.h + ov_SC01_000.c col-0); unsigned access forced at use — §8d sub-class (b) */ + extern s32 D_801DCCA0; /* fade/flash level driving both overlay colours */ + + DVECTOR2 tmpxy[4]; + SVECTOR2 box[8]; + SVECTOR2 sxy[8]; + SVECTOR2 vv[4]; /* 0xA0..0xBF; only vv[3] is used (arm E vertex copy) */ + MATRIX2 mtx; + struct { long otz, flag, opz, sz0, sz1, sz2, sz3; } g; + + s32 lim; + u32 colA; + u32 colB; + u32 nprim; + s32 nparts; + s32 j; + u32 i; + Part *part; + Prim *prim; + u8 *pkt; + u32 ot; + u8 *vtx; + u8 *va, *vb, *vc, *vd; + u32 w, code; + u32 wx, wy, wz; + s32 xa32, xb32, t32; + s32 xmn1, xmx1, xmn2, xmx2; + s32 mnc, mxc; + s16 my, mny, mx, mn; + s32 d; + u32 e; + + lim = func_800491EC() + *(s32 *)(arg0 + 0x64); + func_800547D8(arg0 + 0x10, &mtx); + func_80052E38(&mtx); + + pkt = D_800A5E60; + ot = (u32)&D_800A6610[(*(u16 *)&D_800B9A02) << 14]; + d = D_801DCCA0; + colA = (d << 16) | (d << 8) | d; + e = d * 2; + if (e > 0xFF) e = 0xFF; + colB = (e << 16) | (e << 8) | e; + part = *(Part **)(arg0 + 0xC); + nparts = *(s32 *)(*(s32 *)(arg0 + 8) + 8); + vtx = *(u8 **)(*(s32 *)(arg0 + 8) + 0x10); + + for (j = 0; j < nparts; j++, part++) { + wx = part->xx; + mn = wx; + mx = wx >> 16; + wy = part->yy; + mny = wy; + my = wy >> 16; + wz = part->zz; + box[0].vx = mn; box[0].vy = mny; + box[1].vx = mx; box[1].vy = mny; + box[2].vx = mn; box[2].vy = mny; + box[3].vx = mx; box[3].vy = mny; + box[4].vx = mn; box[4].vy = my; + box[5].vx = mx; box[5].vy = my; + box[6].vx = mn; box[6].vy = my; + box[7].vx = mx; box[7].vy = my; + wy = wz >> 16; + box[0].vz = wz; + box[1].vz = wz; + box[4].vz = wz; + box[5].vz = wz; + box[2].vz = wy; + box[3].vz = wy; + box[6].vz = wy; + box[7].vz = wy; + + gte_ldv3c(&box[0]); + gte_rtpt(); + gte_stsxy3(&sxy[0], &sxy[1], &sxy[2]); + gte_ldv0(&box[3]); + gte_rtps(); + gte_stsxy(&sxy[3]); + gte_ldv3c(&box[4]); + gte_rtpt(); + gte_stsxy3(&sxy[4], &sxy[5], &sxy[6]); + gte_ldv0(&box[7]); + gte_rtps(); + gte_stsxy(&sxy[7]); + gte_stszotz(&g.otz); + + if (lim >= g.otz) { + xa32 = sxy[0].vx; + xb32 = sxy[1].vx; + if (xb32 < xa32) { xmx1 = xa32; xmn1 = xb32; } else { xmn1 = xa32; xmx1 = xb32; } + t32 = sxy[2].vx; + if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32; + t32 = sxy[3].vx; + if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32; + xa32 = sxy[4].vx; + xb32 = sxy[5].vx; + if (xb32 < xa32) { xmx2 = xa32; xmn2 = xb32; } else { xmn2 = xa32; xmx2 = xb32; } + t32 = sxy[6].vx; + if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32; + t32 = sxy[7].vx; + if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32; + mnc = xmn1; + if (xmn2 < xmn1) mnc = xmn2; + mxc = xmx1; + if (mxc < xmx2) mxc = xmx2; + if ((s16)mxc >= -0xA0 && (s16)mnc < 0xA1) { + xa32 = sxy[0].vy; + xb32 = sxy[1].vy; + if (xb32 < xa32) { xmx1 = xa32; xmn1 = xb32; } else { xmn1 = xa32; xmx1 = xb32; } + t32 = sxy[2].vy; + if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32; + t32 = sxy[3].vy; + if (xmx1 < t32) xmx1 = t32; else if (t32 < xmn1) xmn1 = t32; + xa32 = sxy[4].vy; + xb32 = sxy[5].vy; + if (xb32 < xa32) { xmx2 = xa32; xmn2 = xb32; } else { xmn2 = xa32; xmx2 = xb32; } + t32 = sxy[6].vy; + if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32; + t32 = sxy[7].vy; + if (xmx2 < t32) xmx2 = t32; else if (t32 < xmn2) xmn2 = t32; + mnc = xmn1; + if (xmn2 < xmn1) mnc = xmn2; + mxc = xmx1; + if (mxc < xmx2) mxc = xmx2; + if ((s16)mxc >= -0x78 && (s16)mnc < 0x79) { + prim = (Prim *)part->prim; + nprim = part->nprim; + for (i = 0; i < nprim; i++, prim++) { + w = prim->w1; + va = vtx + (w & 0xFFFF); + vb = vtx + (w >> 16); + w = prim->w2; + vc = vtx + (w & 0xFFFF); + w = w >> 16; + gte_ldv3(va, vb, vc); + gte_rtpt(); + gte_stflg(&g.flag); + if (!(g.flag & 0x7F85E000)) { + gte_nclip(); + code = w & 7; + vd = vtx + (w & 0xFFF8); + gte_stopz(&g.opz); + if (g.opz > 0) { + switch (code) { + case 4: + case 5: + gte_stsxy3_f3(pkt); + gte_stsz3(&g.sz0, &g.sz1, &g.sz2); + if (((PolyF3 *)pkt)->x0 > ((PolyF3 *)pkt)->x1) { + mx = ((PolyF3 *)pkt)->x0; + mn = ((PolyF3 *)pkt)->x1; + } else { + mn = ((PolyF3 *)pkt)->x0; + mx = ((PolyF3 *)pkt)->x1; + } + if (((PolyF3 *)pkt)->x2 > mx) mx = ((PolyF3 *)pkt)->x2; + else if (((PolyF3 *)pkt)->x2 < mn) mn = ((PolyF3 *)pkt)->x2; + if (mx >= -0xA0 && mn < 0xA1) { + if (((PolyF3 *)pkt)->y0 > ((PolyF3 *)pkt)->y1) { + my = ((PolyF3 *)pkt)->y0; + mny = ((PolyF3 *)pkt)->y1; + } else { + mny = ((PolyF3 *)pkt)->y0; + my = ((PolyF3 *)pkt)->y1; + } + if (((PolyF3 *)pkt)->y2 > my) my = ((PolyF3 *)pkt)->y2; + else if (((PolyF3 *)pkt)->y2 < mny) mny = ((PolyF3 *)pkt)->y2; + if (my >= -0x78 && mny < 0x79) { + s32 za, zb; + u32 *otp; + if (g.sz0 > g.sz1) { + za = g.sz0; + if (za < g.sz2) za = g.sz2; + } else { + za = g.sz1; + if (za < g.sz2) za = g.sz2; + } + g.opz = za; + if (code != 4) g.opz = za + 0x200; + ((PolyF3 *)pkt)->rgbc = prim->w0; + otp = (u32 *)(((g.opz >> 2) << 2) + ot); + *(u32 *)pkt = (*otp & 0xFFFFFF) | 0x4000000; + *otp = (*otp & 0xFF000000) | ((u32)pkt & 0xFFFFFF); + pkt += 0x14; + } + } + break; + case 6: + case 7: + gte_stsxy3_ft3(pkt); + gte_stsz3(&g.sz0, &g.sz1, &g.sz2); + if (((PolyFT3 *)pkt)->x0 > ((PolyFT3 *)pkt)->x1) { + mx = ((PolyFT3 *)pkt)->x0; + mn = ((PolyFT3 *)pkt)->x1; + } else { + mn = ((PolyFT3 *)pkt)->x0; + mx = ((PolyFT3 *)pkt)->x1; + } + if (((PolyFT3 *)pkt)->x2 > mx) mx = ((PolyFT3 *)pkt)->x2; + else if (((PolyFT3 *)pkt)->x2 < mn) mn = ((PolyFT3 *)pkt)->x2; + if (mx >= -0xA0 && mn < 0xA1) { + if (((PolyFT3 *)pkt)->y0 > ((PolyFT3 *)pkt)->y1) { + my = ((PolyFT3 *)pkt)->y0; + mny = ((PolyFT3 *)pkt)->y1; + } else { + mny = ((PolyFT3 *)pkt)->y0; + my = ((PolyFT3 *)pkt)->y1; + } + if (((PolyFT3 *)pkt)->y2 > my) my = ((PolyFT3 *)pkt)->y2; + else if (((PolyFT3 *)pkt)->y2 < mny) mny = ((PolyFT3 *)pkt)->y2; + if (my >= -0x78 && mny < 0x79) { + s32 za, zb; + u32 *otp; + u32 *tp; + if (g.sz0 > g.sz1) { + za = g.sz0; + if (za < g.sz2) za = g.sz2; + } else { + za = g.sz1; + if (za < g.sz2) za = g.sz2; + } + g.opz = za; + if (code == 7) g.opz = za + 0x200; + tp = (u32 *)prim->w0; + ((PolyFT3 *)pkt)->rgbc = tp[0]; + ((PolyFT3 *)pkt)->uvc0 = tp[1]; + ((PolyFT3 *)pkt)->uvp1 = tp[2]; + ((PolyFT3 *)pkt)->uv2 = tp[3]; + otp = (u32 *)(((g.opz >> 2) << 2) + ot); + *(u32 *)pkt = (*otp & 0xFFFFFF) | 0x7000000; + *otp = (*otp & 0xFF000000) | ((u32)pkt & 0xFFFFFF); + pkt += 0x20; + } + } + break; + case 0: + case 1: + gte_stsxy3_f3(pkt); + gte_ldv0(vd); + gte_rtps(); + if (((PolyF4 *)pkt)->x0 > ((PolyF4 *)pkt)->x1) { + mx = ((PolyF4 *)pkt)->x0; + mn = ((PolyF4 *)pkt)->x1; + } else { + mn = ((PolyF4 *)pkt)->x0; + mx = ((PolyF4 *)pkt)->x1; + } + if (((PolyF4 *)pkt)->x2 > mx) mx = ((PolyF4 *)pkt)->x2; + else if (((PolyF4 *)pkt)->x2 < mn) mn = ((PolyF4 *)pkt)->x2; + if (((PolyF4 *)pkt)->y0 > ((PolyF4 *)pkt)->y1) { + my = ((PolyF4 *)pkt)->y0; + mny = ((PolyF4 *)pkt)->y1; + } else { + mny = ((PolyF4 *)pkt)->y0; + my = ((PolyF4 *)pkt)->y1; + } + if (((PolyF4 *)pkt)->y2 > my) my = ((PolyF4 *)pkt)->y2; + else if (((PolyF4 *)pkt)->y2 < mny) mny = ((PolyF4 *)pkt)->y2; + gte_stflg(&g.flag); + if (!(g.flag & 0x7F85E000)) { + gte_stsz4(&g.sz0, &g.sz1, &g.sz2, &g.sz3); + gte_stsxy((long *)&((PolyF4 *)pkt)->x3); + if (((PolyF4 *)pkt)->x3 < mn) mn = ((PolyF4 *)pkt)->x3; + else if (mx < ((PolyF4 *)pkt)->x3) mx = ((PolyF4 *)pkt)->x3; + if (mx >= -0xA0 && mn < 0xA1) { + if (((PolyF4 *)pkt)->y3 < mny) mny = ((PolyF4 *)pkt)->y3; + else if (my < ((PolyF4 *)pkt)->y3) my = ((PolyF4 *)pkt)->y3; + if (my >= -0x78 && mny < 0x79) { + s32 za, zb; + u32 *otp; + zb = g.sz2; + if (zb < g.sz3) zb = g.sz3; + za = g.sz0; + if (za < g.sz1) za = g.sz1; + if (za < zb) za = zb; + g.opz = za; + ((PolyF4 *)pkt)->rgbc = prim->w0; + otp = (u32 *)(((za >> 2) << 2) + ot); + *(u32 *)pkt = (*otp & 0xFFFFFF) | 0x5000000; + *otp = (*otp & 0xFF000000) | ((u32)pkt & 0xFFFFFF); + pkt += 0x18; + } + } + } + break; + case 2: + gte_stsxy3c(&tmpxy[0]); + gte_ldv0(vd); + gte_rtps(); + if (tmpxy[0].vx > tmpxy[1].vx) { + mx = tmpxy[0].vx; + mn = tmpxy[1].vx; + } else { + mn = tmpxy[0].vx; + mx = tmpxy[1].vx; + } + if (tmpxy[2].vx > mx) mx = tmpxy[2].vx; + else if (tmpxy[2].vx < mn) mn = tmpxy[2].vx; + if (tmpxy[0].vy > tmpxy[1].vy) { + my = tmpxy[0].vy; + mny = tmpxy[1].vy; + } else { + mny = tmpxy[0].vy; + my = tmpxy[1].vy; + } + if (tmpxy[2].vy > my) my = tmpxy[2].vy; + else if (tmpxy[2].vy < mny) mny = tmpxy[2].vy; + gte_stflg(&g.flag); + if (!(g.flag & 0x7F85E000)) { + gte_stsz4(&g.sz0, &g.sz1, &g.sz2, &g.sz3); + gte_stsxy((long *)&((PolyFT4 *)pkt)->x3); + if (((PolyFT4 *)pkt)->x3 < mn) mn = ((PolyFT4 *)pkt)->x3; + else if (mx < ((PolyFT4 *)pkt)->x3) mx = ((PolyFT4 *)pkt)->x3; + if (mx >= -0xA0 && mn < 0xA1) { + if (((PolyFT4 *)pkt)->y3 < mny) mny = ((PolyFT4 *)pkt)->y3; + else if (my < ((PolyFT4 *)pkt)->y3) my = ((PolyFT4 *)pkt)->y3; + if (my >= -0x78 && mny < 0x79) { + s32 za, zb; + u32 *otp; + u32 *tp; + u32 uvw; + zb = g.sz2; + if (zb < g.sz3) zb = g.sz3; + za = g.sz0; + if (za < g.sz1) za = g.sz1; + if (za < zb) za = zb; + g.opz = za; + if (code == 3) g.opz = za + 0x200; + *(u32 *)&((PolyFT4 *)pkt)->x0 = *(u32 *)&tmpxy[0]; + *(u32 *)&((PolyFT4 *)pkt)->x1 = *(u32 *)&tmpxy[1]; + *(u32 *)&((PolyFT4 *)pkt)->x2 = *(u32 *)&tmpxy[2]; + tp = (u32 *)prim->w0; + ((PolyFT4 *)pkt)->rgbc = tp[0]; + ((PolyFT4 *)pkt)->uvc0 = tp[1]; + ((PolyFT4 *)pkt)->uvp1 = tp[2]; + uvw = tp[3]; + ((PolyFT4 *)pkt)->uv2 = uvw; + ((PolyFT4 *)pkt)->uv3 = uvw >> 16; + otp = (u32 *)(((g.opz >> 2) << 2) + ot); + *(u32 *)pkt = (*otp & 0xFFFFFF) | 0x9000000; + *otp = (*otp & 0xFF000000) | ((u32)pkt & 0xFFFFFF); + pkt += 0x28; + } + } + } + break; + case 3: + gte_stsxy3c(&tmpxy[0]); + vv[3] = *(SVECTOR2 *)vd; + gte_ldv0(&vv[3]); + gte_rtps(); + if (tmpxy[0].vx > tmpxy[1].vx) { + mx = tmpxy[0].vx; + mn = tmpxy[1].vx; + } else { + mn = tmpxy[0].vx; + mx = tmpxy[1].vx; + } + if (tmpxy[2].vx > mx) mx = tmpxy[2].vx; + else if (tmpxy[2].vx < mn) mn = tmpxy[2].vx; + if (tmpxy[0].vy > tmpxy[1].vy) { + my = tmpxy[0].vy; + mny = tmpxy[1].vy; + } else { + mny = tmpxy[0].vy; + my = tmpxy[1].vy; + } + if (tmpxy[2].vy > my) my = tmpxy[2].vy; + else if (tmpxy[2].vy < mny) mny = tmpxy[2].vy; + /* L1: zero-byte $v1 conflict dial -- keeps my/mny off $v1 so the + * my/mny/mx/mn quad lands on $a2/$a3/$t0/$t1 (see header). */ + __asm__ __volatile__ ("" ::: "$3"); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus10) + gte_stflg(&g.flag); + if (!(g.flag & 0x7F85E000)) { + gte_stsz4(&g.sz0, &g.sz1, &g.sz2, &g.sz3); + gte_stsxy((long *)&tmpxy[3]); + if (tmpxy[3].vx < mn) mn = tmpxy[3].vx; + else if (mx < tmpxy[3].vx) mx = tmpxy[3].vx; + if (mx >= -0xA0 && mn < 0xA1) { + if (tmpxy[3].vy < mny) mny = tmpxy[3].vy; + else if (my < tmpxy[3].vy) my = tmpxy[3].vy; + if (my >= -0x78 && mny < 0x79) { + s32 za, zb; + u32 *otp; + u32 *tp; + u32 uvw; + zb = g.sz2; + if (zb < g.sz3) zb = g.sz3; + za = g.sz0; + if (za < g.sz1) za = g.sz1; + if (za < zb) za = zb; + g.opz = za; + *(u32 *)&((PolyFT4 *)pkt)->x0 = *(u32 *)&tmpxy[0]; + *(u32 *)&((PolyFT4 *)pkt)->x1 = *(u32 *)&tmpxy[1]; + *(u32 *)&((PolyFT4 *)pkt)->x2 = *(u32 *)&tmpxy[2]; + *(u32 *)&((PolyFT4 *)pkt)->x3 = *(u32 *)&tmpxy[3]; + tp = (u32 *)prim->w0; + ((PolyFT4 *)pkt)->rgbc = colA | 0x2E000000; + ((PolyFT4 *)pkt)->uvc0 = tp[1]; + ((PolyFT4 *)pkt)->uvp1 = tp[2]; + uvw = tp[3]; + ((PolyFT4 *)pkt)->uv2 = uvw; + ((PolyFT4 *)pkt)->uv3 = uvw >> 16; + { + u32 *op1 = (u32 *)(((za >> 2) << 2) + ot); + *(u32 *)pkt = (*op1 & 0xFFFFFF) | 0x9000000; + *op1 = (*op1 & 0xFF000000) | ((u32)pkt & 0xFFFFFF); + } + pkt += 0x28; + pkt[3] = 6; + *(u32 *)(pkt + 8) = colB | 0x2A000000; + *(u32 *)(pkt + 0xC) = *(u32 *)&tmpxy[0]; + *(u32 *)(pkt + 4) = 0xE1000040; + *(u32 *)(pkt + 0x10) = *(u32 *)&tmpxy[1]; + *(u32 *)(pkt + 0x14) = *(u32 *)&tmpxy[2]; + *(u32 *)(pkt + 0x18) = *(u32 *)&tmpxy[3]; + { + u32 *op2 = (u32 *)(((g.opz >> 2) << 2) + ot); + *(u32 *)pkt = (*op2 & 0xFFFFFF) | 0x6000000; + *op2 = (*op2 & 0xFF000000) | ((u32)pkt & 0xFFFFFF); + } + pkt += 0x1C; + } + } + } + break; + } + } + } + } + } + } + } + } + D_800A5E60 = pkt; +} diff --git a/.run/P36/agents/ov_SC06_029__func_8017C954/history.txt b/.run/P36/agents/ov_SC06_029__func_8017C954/history.txt new file mode 100644 index 000000000..c03a16f17 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_8017C954/history.txt @@ -0,0 +1,14 @@ +s5: verdict NO-MATCH start 632 best 581 compiles 188 path R18 bystander @2907->2913 + R14 param-width arg0 s32->s16 @2864 +best-scoring single candidates of the last trace (move -> score [residual class]): + R14 param-width arg0 s32->s16 @2864 -> 581 [COUNT] (from 591) + R10 param-copy arg0 @2904 -> 587 [COUNT] (from 591) + R18 bystander @2907->2913 -> 591 [COUNT] (from 632) + R18 bystander @2906->2908 -> 591 [COUNT] (from 591) + R7 block @2905 -> 591 [COUNT] (from 591) + R8 base tmp0 @2905 -> 591 [COUNT] (from 591) + R9 swap-stmts @2908 -> 591 [COUNT] (from 591) + R8 hoist tmp0 @2905 -> 591 [COUNT] (from 591) + R7 block @2906 -> 591 [COUNT] (from 591) + R5 swap + @3003 -> 591 [COUNT] (from 591) + R9 swap-stmts @2909 -> 591 [COUNT] (from 591) + R5 swap + @3004 -> 591 [COUNT] (from 591) diff --git a/.run/P36/agents/ov_SC06_029__func_8017C954/neighbours.txt b/.run/P36/agents/ov_SC06_029__func_8017C954/neighbours.txt new file mode 100644 index 000000000..f80be56f4 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_8017C954/neighbours.txt @@ -0,0 +1,102 @@ +=== THIS FUNCTION'S OWN HEADER (func_8017C954, line 2864) — read it in full === + * L1 ONE ZERO-BYTE $v1 CONFLICT DIAL, first statement after arm E's y min/max: + * __asm__ __volatile__ ("" ::: "$3"); + * 62.6% -> 94.9% kept. THE dominant lever; everything else is small. + * WHY (this is the reusable finding): + * my/mny/mx/mn are four s16 GLOBAL allocnos (pseudos 103..106, refs 103, + * live length 245..282). In the target they are granted + * my=$a2 mny=$a3 mx=$t0 mn=$t1 -- exactly what the MATCHED 952-ins base + * compiles to. Adding the 5th arm makes `my` and `mny` LOSE their hard-reg + * conflict with $v1 and instead acquire a COPY PREFERENCE for it + * (`;; 103 conflicts: ... 2 12 29` / `;; 103 preferences: 3`, greg dump), + * so `my` takes $v1 and the whole quad slides one slot down the + * reg_alloc_order (v1,a2,a3,t0 instead of a2,a3,t0,t1). That single slide + * renames ~40% of every switch arm. + * Bisected to the instruction: with arm E truncated after its y min/max + * the conflict is present; adding ANY block after it (even + * `if (!(g.flag & 0x7F85E000)) pkt += 4;`) removes it. A 5th arm that is + * *small* (or a verbatim duplicate of arm D) does not break it -- so it is + * the SIZE/shape of arm E, not the arm count. + * Only "$3" works: a bare `__asm__ volatile("")`, a "$2"/"$4" clobber or a + * "memory" clobber are all no-ops here (measured). Six "natural" spellings + * were tried and all failed (see the report's do-not-re-buy list), so this + * dial stands in for whatever the original source did to keep $v1 busy. + * + * L2 `u32 nprim;` DECLARED BEFORE `s32 nparts;` -> +3 structural ins, + * 94.9% -> 95.2% kept. Sec.79: spill slots are handed out in pseudo-number + * (= declaration) order, and the target has nprim at 0x118, nparts at 0x120. + * + * L3 ARM E's PACKET-1 STORE ORDER: the four xy words, then `tp`, then rgbc, + * then the three uv words. 95.2% -> 95.5% kept. + * + * L4 TWO SEPARATELY-SCOPED `otp`s IN ARM E (one per OT insert), not one + * function-scope-style `otp` assigned twice. 95.5% -> 97.3% kept AND + * 1202 -> 1194 ins (the whole remaining LENGTH DRIFT). + * This is the family's L1 lever (Sec.76) applied inside one arm: + * `local-alloc.c:472` accepts an allocno only if REG_BASIC_BLOCK >= 0 && + * REG_N_DEATHS == 1. One `otp` with two OT inserts has 2 deaths -> GLOBAL + * allocno -> `combine_regs` (local-alloc.c:1825) cannot tie the + * `(za>>2)<<2` shift chain into it, so the chain needs a separate $v0 scratch + * -- and $v0 is exactly the register the four `lw/sw` xy pairs are using, so + * the scheduler can no longer slot `sra/sll/addu` into their load-delay slots + * and maspsx emits three `nop`s instead. Per-insert scoping makes each a + * 1-death, 1-block pseudo, the chain ties in place in $a0, and the three nops + * turn back into the target's `sra $a0 / sll $a0 / addu $a0,$a0,$s0`. + * (The first insert also has to read `za`, not `g.opz`: `g` has its address + * taken by the gte macros, so `g.opz` would have to be RE-LOADED after the + * aliasing `pkt` stores and could not be hoisted at all.) + * + * L5 ARM E's PACKET-2 STORE ORDER: len byte, +0x08 colour word, +0x0C xy0, + * +0x04 0xE1000040, then +0x10/+0x14/+0x18. 37 -> 28 mismatched. + * The odd interleave is what keeps the two-insn 0xE1000040 constant from + * being materialised early: with the store any earlier, `lui $a1` gets + * scheduled into the packet-1 load-delay slot at tgt[1093] where the target + * has a real `nop` (Sec.78 -- a nop the target has and you lack is a + * register-liveness fact). + * + * L6 ZERO `__asm__ volatile ("")` LIVE-LENGTH SLIDERS. The matched 952-ins base + * ships ONE (Sec.47, to split the &g.sz1 / &g.sz2 allocno tie). Here the + * correct count is NONE: 0 -> MATCH, 2 -> 28, 3 -> 10, 1 and 5 -> length -1. + * Same mechanism, opposite sign: `allocno_compare` (global.c:594) gives the + * three &g.szN pointers refs 16 and lengths within 2 of each other, so + * int(4*16*10000/L) puts them 1 apart and every static instruction added + * anywhere in the outer loop re-ranks them. The last 28 mismatched + * instructions were exactly this: a 3-cycle on {vtx, &g.flag, 0x7F85E000} + * ($s7/$s5/$s6 -> $s6/$s7/$s5) plus a swap on {&g.sz1, &g.sz2} ($s1/$t8). + * + * ===== TRIED AND REJECTED (byte-measured; scoped to the base named) ===== + * On the 1129 base: all 24 permutations of `s16 my, mny, mx, mn` (ALL exactly + * neutral -- the four are not tied); 9 positions for that declaration in the + * decl list (all neutral); colA/colB declared first / last / next to d,e; + * `ot` hoisted before the 3 calls (worse) or moved after the clamp (-1 ins, + * much worse); `e = d << 1`; reading nprim before prim; dedicated arm-E + * min/max variables (function-scope, block-scope, x-only, y-only -- all + * neutral or worse); a reversed y comparison; a `t32` temp for tmpxy[2]; + * `gte_ldv0(vd)` instead of the vv[3] block copy (much worse -- and it loses + * the target's lwl/lwr). Arm E's y-block BEFORE its x-block reaches the right + * REGISTERS (a2,a3,t0,t1) but with x and y swapped, and costs +7 ins: it was + * the diagnostic that proved the residual was one allocno-slide, not 40 bugs. + * On the MATCH base: removing the "$3" dial, or replacing it with "" / "$2" / + * "memory", drops to 1182 ins / ~1085 mismatched. + * =========================================================================== */ + +--- func_8017DDE0 (line 3399) --- +/* func_8017DDE0 (ov_SC06_029) — particle-group tick. + * §193-A twin remap of the byte-matched ov_SC03_028:func_8017F278 + * (src/ov_SC03_028/ov_SC03_028_jr_8017DF98.c:3385), symbol-for-symbol re-spelled + * from THIS target's own relocation lines: D_801EB5C8->D_801DCCA8, + * func_8017F40C->func_8017DF74, func_80146C3C unchanged. + * + * The two register pins ($2 for the %hi/%lo symbol temp, $5 for the group base) + * are what make gcc-2.7.2 keep the base pointer in $a1 and reload the address + * each outer iteration (cookbook: register __asm__ allocation pins). + * + * NOTE FOR BANKING: SubRec_/GroupRec_801EB5C8_8017DC38 are ALREADY defined at file + * scope in the destination TU (ov_SC06_029_jr_8017C954.c, above func_8017DC38). + * They are repeated here at BLOCK scope only so this draft compiles standalone; + * block scope means they shadow rather than collide, so the file banks as-is. + * Delete the two inner typedefs if a file-scope-only form is preferred. + */ +--- every @class/@stuck/@crack note in this translation unit --- +// @class: struct +// @stuck: none — MATCH (fn-ptr table %lo-fold via extern array of code ptrs) diff --git a/.run/P36/agents/ov_SC06_029__func_8017C954/related.txt b/.run/P36/agents/ov_SC06_029__func_8017C954/related.txt new file mode 100644 index 000000000..b25903cc8 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_8017C954/related.txt @@ -0,0 +1,221 @@ +=== lever-free bodies in ov_SC06_029 sharing a callee or global with func_8017C954 (33 found; top 6 by shared symbols) — read them for the SHAPE === +--- func_80184C68 (src/ov_SC06_029/ov_SC06_029_jr_8017C954.c:7732) shares 3: D_800A5E60 D_800A6610 D_800B9A02 --- +void func_80184C68(u8 *v, s32 idx) +{ + /* BANK NOTE: P_TAG is already `typedef struct { u32 addr : 24; u32 len : 8; + * u8 r0, g0, b0, code; } P_TAG;` in src/shared/engine_types.h (pulled in by + * this TU's ../shared/engine_core.h). This block-scope copy exists only so + * the draft compiles standalone under match_one -- DELETE IT when banking. + * Byte-neutral either way (only ->addr is used, and it is bits 0..23 of + * word 0 in both spellings). */ + typedef struct { u32 addr : 24; u32 len : 8; u8 r0, g0, b0, code; } P_TAG; + + extern u8 *D_800A5E60; + extern u8 D_800A6610[]; + extern short D_800B9A02; + extern u16 D_800B99DA; + extern u32 D_801909F0[]; + + u8 *pkt; + u32 *ot; + u32 *otp; + u8 *q; + u32 col; + s32 flag, flag2, otz; + s32 z; + + col = D_801909F0[idx * 2 + (D_800B99DA & 1)]; + pkt = D_800A5E60; + D_800A5E60 = pkt + 0x24; + ot = (u32 *)&D_800A6610[(*(u16 *)&D_800B9A02) << 14]; + pkt[3] = 8; + *(u32 *)(pkt + 4) = col; + pkt[7] = 0x38; + *(u32 *)(pkt + 0xC) = col; + *(u32 *)(pkt + 0x14) = col; + *(u32 *)(pkt + 0x1C) = col; + + gte_ldv3(v, v + 8, v + 0x10); + gte_rtpt(); + gte_stflg(&flag); + gte_stsxy3(pkt + 8, pkt + 0x10, pkt + 0x18); + gte_ldv0(v + 0x18); + gte_rtps(); + gte_stflg(&flag2); + flag |= flag2; + gte_stsxy(pkt + 0x20); + gte_avsz4(); + gte_stotz(&otz); + + if ((flag & ~0x1000) == 0) { + z = otz - 3; + if (z < 0) { + z = 0; + } else if (z > 0xFFF) { + z = 0xFFF; + } + otp = (u32 *)(z * 4 + (u32)ot); + pkt[7] |= 2; + q = D_800A5E60; + ((P_TAG *)pkt)->addr = ((P_TAG *)otp)->addr; + D_800A5E60 = q + 8; + ((P_TAG *)otp)->addr = (u32)pkt; + q[3] = 1; + *(u32 *)(q + 4) = 0xE100012A; + ((P_TAG *)q)->addr = ((P_TAG *)otp)->addr; + ((P_TAG *)otp)->addr = (u32)q; + } +} + +--- func_80189440 (src/ov_SC06_029/ov_SC06_029_jr_801867D0.c:4805) shares 3: D_800A5E60 D_800A6610 D_800B9A02 --- +void func_80189440(s32 arg0, SV_189440 *v) +{ + /* block-scope copies so the draft compiles standalone under match_one; the + * TU's ../shared/engine_core.h already provides both -- delete when banking. */ + typedef struct { u32 addr : 24; u32 len : 8; u8 r0, g0, b0, code; } P_TAG; + typedef struct { s16 m[3][3]; s16 pad; s32 t[3]; } MTX; + typedef struct { s32 w[8]; } Blk20; + + extern u8 *D_800A5E60; + extern u8 D_800A6610[]; + + MTX m; + s32 flag, flag2, otz; + SV_189440 *p; + u32 *ot; + u32 *otp; + u8 *pkt; + u8 *q; + s32 col; + u32 dr; + s32 i, j, x, z; + + for (i = 0x32, p = &v[0x32]; i >= 2; i -= 2) { + *(u16 *)&p[0].vx = *(u16 *)&p[-2].vx; + *(u16 *)&p[1].vx = *(u16 *)&p[-1].vx; + p -= 2; + } + + j = func_80047948(v[0x34].vy); + x = (v[0x34].vx * j) >> 12; + *(u16 *)&v[0x34].vy = *(u16 *)&v[0x34].vy + *(s32 *)&v[0x35].vz; + v[0].vx = x - *(u16 *)&v[0x35].vy; + v[1].vx = *(u16 *)&v[0x35].vy + x; + + col = *(s32 *)(arg0 + 0xE0); + m = *(MTX *)&D_800AE620; + ot = (u32 *)&D_800A6610[(*(u16 *)&D_800B9A02) << 14]; + RotMatrixZ(v[0x35].vx, &m); + m.t[0] = v[0x34].vz; + m.t[1] = -0xF2; + m.t[2] = v[0x34].pad; + + gte_SetRotMatrix(&D_800AF648); + gte_ldclmv(&m.m[0][0]); + gte_rtir(); + gte_stclmv(&m.m[0][0]); + gte_ldclmv(&m.m[0][1]); + gte_rtir(); + gte_stclmv(&m.m[0][1]); + gte_ldclmv(&m.m[0][2]); + gte_rtir(); + gte_stclmv(&m.m[0][2]); + gte_SetTransMatrix(&D_800AF648); + gte_ldlv0(&m.t[0]); + gte_rtv0tr(); + gte_stlvnl(&m.t[0]); + gte_SetRotMatrix(&m); + gte_SetTransMatrix(&m); + + for (i = 0, p = v; i < 0x19; ) { + pkt = D_800A5E60; + D_800A5E60 = pkt + 0x24; + pkt[3] = 8; + *(u32 *)(pkt + 4) = col; + pkt[7] = 0x3A; + *(u32 *)(pkt + 0xC) = col; + *(u32 *)(pkt + 0x14) = col; + *(u32 *)(pkt + 0x1C) = col; + + gte_ldv3(p, p + 1, p + 2); + gte_rtpt(); + gte_stflg(&flag); + gte_stsxy3(pkt + 8, pkt + 0x10, pkt + 0x18); + gte_ldv0(p + 3); + gte_rtps(); + gte_stflg(&flag2); + flag |= flag2; + gte_stsxy(pkt + 0x20); + gte_avsz4(); + gte_stotz(&otz); + + if ((flag & ~0x1000) == 0) { + z = otz + 1; + if (z >= 0x1000) { + z = 0xFFF; + } + otp = (u32 *)(z * 4 + (u32)ot); + q = D_800A5E60; + ((P_TAG *)pkt)->addr = ((P_TAG *)otp)->addr; + /* LEVER 1 (cookbook §193-F / §148-A2, the loop.c hoist arithmetic). + * The target hoists ALL THREE loop constants into the preheader + * ($t0=0xFFFFFF, $t2=0xFF000000, $t3=0xE100004A). Written inline at + * its store, 0xE100004A is a movable of `life 1, savings 1`, and + * `-dL` reads `Loop from 202 to 420: 85 real insns` with the + * threshold already decayed to 52 by the two mask hoists: + * 52*1*1 = 52 < 85 -> "not desirable", so it stayed in the body and + * the whole $a3/$t0../$t3 file shifted down one register. + * Materialising it HERE and consuming it at the store below widens + * `lifetime` to >=2 (52*1*2 = 104 >= 85) and loop.c moves it -- and + * because loop.c emits its hoists immediately before loop_start, in + * movable order, it lands AFTER the two masks, exactly as in the + * target. A source-level `dr = 0xE100004A;` in the PREHEADER does + * not work: it would emit BEFORE the i/p inits and the hoists. */ + dr = 0xE100004A; + D_800A5E60 = q + 8; + ((P_TAG *)otp)->addr = (u32)pkt; + q[3] = 1; + *(u32 *)(q + 4) = dr; + ((P_TAG *)q)->addr = ((P_TAG *)otp)->addr; + ((P_TAG *)otp)->addr = (u32)q; + } + /* LEVER 2: `i++` must be written HERE, ahead of the colour step, not + * left to the `for` increment. The tail block ties on priority -- + * lw->addu and addiu->slti->bnez are both chains of 3 -- so + * `rank_for_schedule` falls through to INSN_LUID (source order). With + * the increment last, sched1 issues the `lw` first and fills the load + * delay with it; the target issues `addiu $t1,$t1,1` first and leaves a + * real `nop` in the load-delay slot (the -1 instruction). */ + i++; + col += *(s32 *)(arg0 + 0xE0); + p += 2; + } +} + +--- func_80175668 (src/shared/ov/func_80175668.h:5) shares 1: D_800B9A02 --- +void func_80175668(void) { + func_801757E0(D_800B9A02); +} + +--- func_8017C8D0 (src/ov_SC06_029/ov_SC06_029_jr_8017AE2C.c:3735) shares 1: D_801DCCA0 --- + void func_8017C8D0(void) { + D_801DCCA0 = 0x80; + } + +--- func_80175624 (src/shared/ov/func_80175624.h:5) shares 1: D_800B9A02 --- +void func_80175624(void *a0) { + func_801757A0(D_800B9A02); + *((u8 *)a0 + 1) = *((u8 *)a0 + 1) + 1; +} + +--- func_801417F8 (src/shared/ov/func_801417F8.h:9) shares 1: D_800B9A02 --- +void func_801417F8(void) { + if (D_800B9A15 == 0 || D_800B9A16 != 0) { + if (D_80115114 == (u16)(D_800B9A02 ^ 1)) { + func_800D2624(); + } else { + D_80115112 += 1; + } + } +} + diff --git a/.run/P36/agents/ov_SC06_029__func_8017C954/residual.txt b/.run/P36/agents/ov_SC06_029__func_8017C954/residual.txt new file mode 100644 index 000000000..ac2847e42 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_8017C954/residual.txt @@ -0,0 +1,825 @@ +src/ov_SC06_029/ov_SC06_029_jr_8017C954.c:func_8017C954: score 632 (COUNT; mine 1182 ins, target 1194) — not yet + register pairs (mine -> target, count): t1->t2 x53, t2->t3 x36, t0->t1 x17, a3->t0 x15, t3->t5 x13, a2->a3 x10, a0->v1 x9, t6->t7 x8 + replace mine[0:2] target[0:2] + 0 addiu sp,sp,-656 | addiu sp,sp,-664 + 1 sw s1,620(sp) | sw s1,628(sp) + replace mine[3:11] target[3:11] + 3 sw ra,652(sp) | sw ra,660(sp) + 4 sw s8,648(sp) | sw s8,656(sp) + 5 sw s7,644(sp) | sw s7,652(sp) + 6 sw s6,640(sp) | sw s6,648(sp) + 7 sw s5,636(sp) | sw s5,644(sp) + 8 sw s4,632(sp) | sw s4,640(sp) + 9 sw s3,628(sp) | sw s3,636(sp) + 10 sw s2,624(sp) | sw s2,632(sp) + replace mine[12:13] target[12:13] + 12 sw s0,616(sp) | sw s0,624(sp) + replace mine[24:26] target[24:26] + 24 lui t2,0x0 | lui t3,0x0 + 25 lw t2,0(t2) | lw t3,0(t3) + replace mine[32:33] target[32:33] + 32 addu t7,v0,v1 | addu s0,v0,v1 + insert mine[44:44] target[44:45] + 44 -- | lw s3,12(s1) + replace mine[45:47] target[46:47] + 45 sw zero,600(sp) | sw s3,296(sp) + 46 lw s8,12(s1) | -- + replace mine[50:51] target[50:51] + 50 lw s2,8(v1) | lw s4,8(v1) + replace mine[52:53] target[52:53] + 52 sw s2,288(sp) | sw s4,288(sp) + replace mine[54:57] target[54:57] + 54 blez s2,123c | blez s4,126c + 55 nop | move s8,zero + 56 addiu s4,sp,228 | addiu s7,sp,228 + replace mine[59:61] target[59:61] + 59 addiu t8,sp,236 | addiu t9,sp,236 + 60 addiu s0,sp,240 | addiu t8,sp,240 + replace mine[62:68] target[62:71] + 62 addiu s3,s8,12 | addiu s3,s3,12 + 63 lw v0,0(s8) | sw s3,616(sp) + 64 lw a0,-8(s3) | lw s4,296(sp) + 65 move t0,v0 | lw s3,616(sp) + 66 srl a3,v0,0x10 | lw v0,0(s4) + 67 move a2,a0 | lw v1,-8(s3) + 68 -- | move t1,v0 + 69 -- | srl t0,v0,0x10 + 70 -- | move a3,v1 + replace mine[69:87] target[72:90] + 69 srl v1,a0,0x10 | srl a2,v1,0x10 + 70 sh t0,32(sp) | sh t1,32(sp) + 71 sh a2,34(sp) | sh a3,34(sp) + 72 sh a3,40(sp) | sh t0,40(sp) + 73 sh a2,42(sp) | sh a3,42(sp) + 74 sh t0,48(sp) | sh t1,48(sp) + 75 sh a2,50(sp) | sh a3,50(sp) + 76 sh a3,56(sp) | sh t0,56(sp) + 77 sh a2,58(sp) | sh a3,58(sp) + 78 sh t0,64(sp) | sh t1,64(sp) + 79 sh v1,66(sp) | sh a2,66(sp) + 80 sh a3,72(sp) | sh t0,72(sp) + 81 sh v1,74(sp) | sh a2,74(sp) + 82 sh t0,80(sp) | sh t1,80(sp) + 83 sh v1,82(sp) | sh a2,82(sp) + 84 sh a3,88(sp) | sh t0,88(sp) + 85 sh v1,90(sp) | sh a2,90(sp) + 86 srl a0,v0,0x10 | srl v1,v0,0x10 + replace mine[92:96] target[95:99] + 92 sh a0,52(sp) | sh v1,52(sp) + 93 sh a0,60(sp) | sh v1,60(sp) + 94 sh a0,84(sp) | sh v1,84(sp) + 95 sh a0,92(sp) | sh v1,92(sp) + replace mine[149:150] target[152:153] + 149 lw s7,256(sp) | lw s4,256(sp) + replace mine[151:153] target[154:156] + 151 slt v0,s7,v0 | slt v0,s4,v0 + 152 bnez v0,121c | bnez v0,1244 + replace mine[160:161] target[163:164] + 160 j 290 | j 29c + replace mine[169:170] target[172:173] + 169 j 2b8 | j 2c4 + replace mine[179:180] target[182:183] + 179 j 2e0 | j 2ec + replace mine[190:191] target[193:194] + 190 j 308 | j 314 + replace mine[199:200] target[202:203] + 199 j 330 | j 33c + replace mine[209:210] target[212:213] + 209 j 358 | j 364 + replace mine[226:227] target[229:230] + 226 bnez v0,121c | bnez v0,1244 + replace mine[230:231] target[233:234] + 230 beqz v0,121c | beqz v0,1244 + replace mine[238:239] target[241:242] + 238 j 3c8 | j 3d4 + replace mine[247:248] target[250:251] + 247 j 3f0 | j 3fc + replace mine[257:258] target[260:261] + 257 j 418 | j 424 + replace mine[268:269] target[271:272] + 268 j 440 | j 44c + replace mine[277:278] target[280:281] + 277 j 468 | j 474 + replace mine[287:288] target[290:291] + 287 j 490 | j 49c + replace mine[304:305] target[307:308] + 304 bnez v0,121c | bnez v0,1244 + replace mine[308:309] target[311:312] + 308 beqz v0,121c | beqz v0,1244 + insert mine[310:310] target[313:315] + 310 -- | lw s3,616(sp) + 311 -- | lw s4,616(sp) + replace mine[311:312] target[316:317] + 311 lw s2,0(s3) | lw s3,0(s3) + replace mine[313:316] target[318:321] + 313 sw s2,280(sp) | sw s3,280(sp) + 314 lw t6,4(s3) | lw t7,4(s4) + 315 beqz s2,121c | beqz s3,1244 + replace mine[317:322] target[322:327] + 317 lui t3,0xff | lui t5,0xff + 318 ori t3,t3,0xffff | ori t5,t5,0xffff + 319 lui t9,0xff00 | lui s2,0xff00 + 320 addiu t1,t2,24 | addiu t2,t3,24 + 321 lw a1,4(t6) | lw a1,4(t7) + replace mine[326:327] target[331:332] + 326 lw a1,8(t6) | lw a1,8(t7) + replace mine[342:343] target[347:348] + 342 sw t4,0(s4) | sw t4,0(s7) + replace mine[346:347] target[351:352] + 346 bnez v0,1200 | bnez v0,1228 + replace mine[351:352] target[356:357] + 351 andi t5,a1,0x7 | andi t6,a1,0x7 + replace mine[358:362] target[363:367] + 358 blez v0,1200 | blez v0,1228 + 359 sltiu v0,t5,8 | sltiu v0,t6,8 + 360 beqz v0,1200 | beqz v0,1228 + 361 sll v0,t5,0x2 | sll v0,t6,0x2 + replace mine[368:373] target[373:378] + 368 swc2 $12,8(t2) | swc2 $12,8(t3) + 369 swc2 $13,12(t2) | swc2 $13,12(t3) + 370 swc2 $14,16(t2) | swc2 $14,16(t3) + 371 swc2 $17,0(t8) | swc2 $17,0(t9) + 372 swc2 $18,0(s0) | swc2 $18,0(t8) + replace mine[374:376] target[379:381] + 374 lh v1,-16(t1) | lh v1,-16(t2) + 375 lh v0,-12(t1) | lh v0,-12(t2) + replace mine[381:383] target[386:390] + 381 move a3,a0 | move t0,a0 + 382 j 608 | j 61c + 383 -- | move t1,a1 + 384 -- | move t1,a0 + replace mine[384:388] target[391:393] + 384 move t0,a0 | lh a0,-8(t2) + 385 move a3,a1 | sll v0,t0,0x10 + 386 lh a0,-8(t1) | -- + 387 sll v0,a3,0x10 | -- + replace mine[392:395] target[397:400] + 392 j 640 | j 654 + 393 move a3,v1 | move t0,v1 + 394 sll v0,t0,0x10 | sll v0,t1,0x10 + replace mine[398:401] target[403:406] + 398 sll v0,a3,0x10 | sll v0,t0,0x10 + 399 move t0,v1 | move t1,v1 + 400 sll v0,a3,0x10 | sll v0,t0,0x10 + replace mine[403:405] target[408:410] + 403 bnez v0,1200 | bnez v0,1228 + 404 sll v0,t0,0x10 | sll v0,t1,0x10 + replace mine[407:408] target[412:413] + 407 beqz v0,1200 | beqz v0,1228 + replace mine[409:411] target[414:416] + 409 lh v1,-14(t1) | lh v1,-14(t2) + 410 lh v0,-10(t1) | lh v0,-10(t2) + replace mine[414:415] target[419:420] + 414 beqz v0,688 | beqz v0,6a0 + replace mine[416:417] target[421:425] + 416 j 690 | move a2,a0 + 417 -- | j 6a8 + 418 -- | move a3,a1 + 419 -- | move a3,a0 + replace mine[418:428] target[426:427] + 418 move a2,a0 | lh a0,-6(t2) + 419 move v1,a1 | -- + 420 lh a1,-6(t1) | -- + 421 sll v0,v1,0x10 | -- + 422 sra v0,v0,0x10 | -- + 423 slt v0,v0,a1 | -- + 424 beqz v0,6b0 | -- + 425 move a0,a1 | -- + 426 j 6c8 | -- + 427 move v1,a0 | -- + replace mine[430:431] target[429:430] + 430 slt v0,a1,v0 | slt v0,v0,a0 + replace mine[432:435] target[431:441] + 432 sll v0,v1,0x10 | move v1,a0 + 433 move a2,a0 | j 6e0 + 434 sll v0,v1,0x10 | move a2,v1 + 435 -- | sll v0,a3,0x10 + 436 -- | sra v0,v0,0x10 + 437 -- | slt v0,a0,v0 + 438 -- | beqz v0,6e4 + 439 -- | sll v0,a2,0x10 + 440 -- | move a3,v1 + 441 -- | sll v0,a2,0x10 + replace mine[437:439] target[443:445] + 437 bnez v0,1200 | bnez v0,1228 + 438 sll v0,a2,0x10 | sll v0,a3,0x10 + replace mine[441:442] target[447:448] + 441 beqz v0,1200 | beqz v0,1228 + replace mine[450:451] target[456:457] + 450 j 714 | j 72c + replace mine[458:459] target[464:465] + 458 beq t5,v0,738 | beq t6,v0,750 + replace mine[462:463] target[468:469] + 462 lw v0,0(t6) | lw v0,0(t7) + replace mine[464:465] target[470:471] + 464 sw v0,-20(t1) | sw v0,-20(t2) + replace mine[469:470] target[475:476] + 469 addu a0,a0,t7 | addu a0,a0,s0 + replace mine[471:473] target[477:479] + 471 addiu t1,t1,20 | addiu t2,t2,20 + 472 and v0,v0,t3 | and v0,v0,t5 + replace mine[474:476] target[480:482] + 474 and v1,t2,t3 | and v1,t3,t5 + 475 sw v0,0(t2) | sw v0,0(t3) + replace mine[477:484] target[483:490] + 477 j 11f4 | j 121c + 478 addiu t2,t2,20 | addiu t3,t3,20 + 479 swc2 $12,8(t2) | swc2 $12,8(t3) + 480 swc2 $13,16(t2) | swc2 $13,16(t3) + 481 swc2 $14,24(t2) | swc2 $14,24(t3) + 482 swc2 $17,0(t8) | swc2 $17,0(t9) + 483 swc2 $18,0(s0) | swc2 $18,0(t8) + replace mine[485:487] target[491:493] + 485 lh v1,-16(t1) | lh v1,-16(t2) + 486 lh v0,-8(t1) | lh v0,-8(t2) + replace mine[492:494] target[498:502] + 492 move a3,a0 | move t0,a0 + 493 j 7c4 | j 7dc + 494 -- | move t1,a1 + 495 -- | move t1,a0 + replace mine[495:499] target[503:505] + 495 move t0,a0 | lh a0,0(t2) + 496 move a3,a1 | sll v0,t0,0x10 + 497 lh a0,0(t1) | -- + 498 sll v0,a3,0x10 | -- + replace mine[503:506] target[509:512] + 503 j 7fc | j 814 + 504 move a3,v1 | move t0,v1 + 505 sll v0,t0,0x10 | sll v0,t1,0x10 + replace mine[509:512] target[515:518] + 509 sll v0,a3,0x10 | sll v0,t0,0x10 + 510 move t0,v1 | move t1,v1 + 511 sll v0,a3,0x10 | sll v0,t0,0x10 + replace mine[514:516] target[520:522] + 514 bnez v0,1200 | bnez v0,1228 + 515 sll v0,t0,0x10 | sll v0,t1,0x10 + replace mine[518:519] target[524:525] + 518 beqz v0,1200 | beqz v0,1228 + replace mine[520:522] target[526:528] + 520 lh v1,-14(t1) | lh v1,-14(t2) + 521 lh v0,-6(t1) | lh v0,-6(t2) + replace mine[525:526] target[531:532] + 525 beqz v0,844 | beqz v0,860 + replace mine[527:528] target[533:537] + 527 j 84c | move a2,a0 + 528 -- | j 868 + 529 -- | move a3,a1 + 530 -- | move a3,a0 + replace mine[529:539] target[538:539] + 529 move a2,a0 | lh a0,2(t2) + 530 move v1,a1 | -- + 531 lh a1,2(t1) | -- + 532 sll v0,v1,0x10 | -- + 533 sra v0,v0,0x10 | -- + 534 slt v0,v0,a1 | -- + 535 beqz v0,86c | -- + 536 move a0,a1 | -- + 537 j 884 | -- + 538 move v1,a0 | -- + replace mine[541:542] target[541:542] + 541 slt v0,a1,v0 | slt v0,v0,a0 + replace mine[543:546] target[543:553] + 543 sll v0,v1,0x10 | move v1,a0 + 544 move a2,a0 | j 8a0 + 545 sll v0,v1,0x10 | move a2,v1 + 546 -- | sll v0,a3,0x10 + 547 -- | sra v0,v0,0x10 + 548 -- | slt v0,a0,v0 + 549 -- | beqz v0,8a4 + 550 -- | sll v0,a2,0x10 + 551 -- | move a3,v1 + 552 -- | sll v0,a2,0x10 + replace mine[548:550] target[555:557] + 548 bnez v0,1200 | bnez v0,1228 + 549 sll v0,a2,0x10 | sll v0,a3,0x10 + replace mine[552:553] target[559:560] + 552 beqz v0,1200 | beqz v0,1228 + replace mine[561:562] target[568:569] + 561 j 8d0 | j 8ec + replace mine[569:570] target[576:577] + 569 bne t5,v0,8f4 | bne t6,v0,910 + replace mine[573:574] target[580:581] + 573 lw v1,0(t6) | lw v1,0(t7) + replace mine[577:578] target[584:585] + 577 sw v0,-20(t1) | sw v0,-20(t2) + replace mine[580:581] target[587:588] + 580 sw v0,-12(t1) | sw v0,-12(t2) + replace mine[583:584] target[590:591] + 583 sw v0,-4(t1) | sw v0,-4(t2) + replace mine[586:587] target[593:594] + 586 sh v0,4(t1) | sh v0,4(t2) + replace mine[591:592] target[598:599] + 591 addu a0,a0,t7 | addu a0,a0,s0 + replace mine[593:595] target[600:602] + 593 addiu t1,t1,32 | addiu t2,t2,32 + 594 and v0,v0,t3 | and v0,v0,t5 + replace mine[596:598] target[603:605] + 596 and v1,t2,t3 | and v1,t3,t5 + 597 sw v0,0(t2) | sw v0,0(t3) + replace mine[599:604] target[606:611] + 599 j 11f4 | j 121c + 600 addiu t2,t2,32 | addiu t3,t3,32 + 601 swc2 $12,8(t2) | swc2 $12,8(t3) + 602 swc2 $13,12(t2) | swc2 $13,12(t3) + 603 swc2 $14,16(t2) | swc2 $14,16(t3) + replace mine[609:611] target[616:618] + 609 lh v1,-16(t1) | lh v1,-16(t2) + 610 lh v0,-12(t1) | lh v0,-12(t2) + replace mine[616:618] target[623:627] + 616 move a3,a0 | move t0,a0 + 617 j 9b4 | j 9d0 + 618 -- | move t1,a1 + 619 -- | move t1,a0 + replace mine[619:623] target[628:630] + 619 move t0,a0 | lh a0,-8(t2) + 620 move a3,a1 | sll v0,t0,0x10 + 621 lh a0,-8(t1) | -- + 622 sll v0,a3,0x10 | -- + replace mine[627:630] target[634:637] + 627 j 9ec | j a08 + 628 move a3,v1 | move t0,v1 + 629 sll v0,t0,0x10 | sll v0,t1,0x10 + replace mine[634:637] target[641:644] + 634 move t0,v1 | move t1,v1 + 635 lh v1,-14(t1) | lh v1,-14(t2) + 636 lh v0,-10(t1) | lh v0,-10(t2) + replace mine[640:641] target[647:648] + 640 beqz v0,a10 | beqz v0,a30 + replace mine[642:643] target[649:653] + 642 j a18 | move a2,a0 + 643 -- | j a38 + 644 -- | move a3,a1 + 645 -- | move a3,a0 + replace mine[644:654] target[654:655] + 644 move a2,a0 | lh a0,-6(t2) + 645 move v1,a1 | -- + 646 lh a1,-6(t1) | -- + 647 sll v0,v1,0x10 | -- + 648 sra v0,v0,0x10 | -- + 649 slt v0,v0,a1 | -- + 650 beqz v0,a38 | -- + 651 move a0,a1 | -- + 652 j a50 | -- + 653 move v1,a0 | -- + replace mine[656:657] target[657:665] + 656 slt v0,a1,v0 | slt v0,v0,a0 + 657 -- | beqz v0,a58 + 658 -- | move v1,a0 + 659 -- | j a70 + 660 -- | move a2,v1 + 661 -- | sll v0,a3,0x10 + 662 -- | sra v0,v0,0x10 + 663 -- | slt v0,a0,v0 + replace mine[659:660] target[667:668] + 659 move a2,a0 | move a3,v1 + replace mine[662:663] target[670:671] + 662 sw t4,0(s4) | sw t4,0(s7) + replace mine[666:667] target[674:675] + 666 bnez v0,1200 | bnez v0,1228 + replace mine[668:670] target[676:678] + 668 swc2 $16,0(t8) | swc2 $16,0(t9) + 669 swc2 $17,0(s0) | swc2 $17,0(t8) + replace mine[672:673] target[680:681] + 672 addiu v0,t2,20 | addiu v0,t3,20 + replace mine[674:675] target[682:690] + 674 lh a1,-4(t1) | lh a0,-4(t2) + 675 -- | sll v0,t1,0x10 + 676 -- | sra v0,v0,0x10 + 677 -- | slt v0,a0,v0 + 678 -- | beqz v0,ac8 + 679 -- | move v1,a0 + 680 -- | j ae0 + 681 -- | move t1,v1 + replace mine[677:678] target[692:693] + 677 slt v0,a1,v0 | slt v0,v0,a0 + replace mine[679:682] target[694:722] + 679 move a0,a1 | sll v0,t0,0x10 + 680 j ac0 | move t0,v1 + 681 move t0,a0 | sll v0,t0,0x10 + 682 -- | sra v0,v0,0x10 + 683 -- | slti v0,v0,-160 + 684 -- | bnez v0,1228 + 685 -- | sll v0,t1,0x10 + 686 -- | sra v0,v0,0x10 + 687 -- | slti v0,v0,161 + 688 -- | beqz v0,1228 + 689 -- | sll v0,a3,0x10 + 690 -- | lh a0,-2(t2) + 691 -- | sra v0,v0,0x10 + 692 -- | slt v0,a0,v0 + 693 -- | beqz v0,b20 + 694 -- | move v1,a0 + 695 -- | j b38 + 696 -- | move a3,v1 + 697 -- | sll v0,a2,0x10 + 698 -- | sra v0,v0,0x10 + 699 -- | slt v0,v0,a0 + 700 -- | beqz v0,b3c + 701 -- | sll v0,a2,0x10 + 702 -- | move a2,v1 + 703 -- | sll v0,a2,0x10 + 704 -- | sra v0,v0,0x10 + 705 -- | slti v0,v0,-120 + 706 -- | bnez v0,1228 + delete mine[684:716] target[724:724] + 684 slt v0,v0,a1 | -- + 685 beqz v0,ac4 | -- + 686 sll v0,a3,0x10 | -- + 687 move a3,a0 | -- + 688 sll v0,a3,0x10 | -- + 689 sra v0,v0,0x10 | -- + 690 slti v0,v0,-160 | -- + 691 bnez v0,1200 | -- + 692 sll v0,t0,0x10 | -- + 693 sra v0,v0,0x10 | -- + 694 slti v0,v0,161 | -- + 695 beqz v0,1200 | -- + 696 sll v0,a2,0x10 | -- + 697 lh a1,-2(t1) | -- + 698 sra v0,v0,0x10 | -- + 699 slt v0,a1,v0 | -- + 700 beqz v0,b00 | -- + 701 move a0,a1 | -- + 702 j b18 | -- + 703 move a2,a0 | -- + 704 sll v0,v1,0x10 | -- + 705 sra v0,v0,0x10 | -- + 706 slt v0,v0,a1 | -- + 707 beqz v0,b1c | -- + 708 sll v0,v1,0x10 | -- + 709 move v1,a0 | -- + 710 sll v0,v1,0x10 | -- + 711 sra v0,v0,0x10 | -- + 712 slti v0,v0,-120 | -- + 713 bnez v0,1200 | -- + 714 sll v0,a2,0x10 | -- + 715 sra v0,v0,0x10 | -- + replace mine[717:718] target[725:726] + 717 beqz v0,1200 | beqz v0,1228 + replace mine[740:742] target[748:750] + 740 addu a0,a0,t7 | addu a0,a0,s0 + 741 lw v0,0(t6) | lw v0,0(t7) + replace mine[743:744] target[751:752] + 743 sw v0,-20(t1) | sw v0,-20(t2) + replace mine[745:747] target[753:755] + 745 addiu t1,t1,24 | addiu t2,t2,24 + 746 and v0,v0,t3 | and v0,v0,t5 + replace mine[748:750] target[756:758] + 748 and v1,t2,t3 | and v1,t3,t5 + 749 sw v0,0(t2) | sw v0,0(t3) + replace mine[751:753] target[759:761] + 751 j 11f4 | j 121c + 752 addiu t2,t2,24 | addiu t3,t3,24 + replace mine[769:771] target[777:781] + 769 move a3,a0 | move t0,a0 + 770 j c18 | j c38 + 771 -- | move t1,a1 + 772 -- | move t1,a0 + delete mine[772:774] target[782:782] + 772 move t0,a0 | -- + 773 move a3,a1 | -- + replace mine[775:776] target[783:784] + 775 sll v0,a3,0x10 | sll v0,t0,0x10 + replace mine[780:783] target[788:791] + 780 j c50 | j c70 + 781 move a3,v1 | move t0,v1 + 782 sll v0,t0,0x10 | sll v0,t1,0x10 + replace mine[787:788] target[795:796] + 787 move t0,v1 | move t1,v1 + replace mine[793:794] target[801:802] + 793 beqz v0,c74 | beqz v0,c98 + replace mine[795:796] target[803:807] + 795 j c7c | move a2,a0 + 796 -- | j ca0 + 797 -- | move a3,a1 + 798 -- | move a3,a0 + replace mine[797:807] target[808:809] + 797 move a2,a0 | lh a0,26(sp) + 798 move v1,a1 | -- + 799 lh a1,26(sp) | -- + 800 sll v0,v1,0x10 | -- + 801 sra v0,v0,0x10 | -- + 802 slt v0,v0,a1 | -- + 803 beqz v0,c9c | -- + 804 move a0,a1 | -- + 805 j cb4 | -- + 806 move v1,a0 | -- + replace mine[809:810] target[811:819] + 809 slt v0,a1,v0 | slt v0,v0,a0 + 810 -- | beqz v0,cc0 + 811 -- | move v1,a0 + 812 -- | j cd8 + 813 -- | move a2,v1 + 814 -- | sll v0,a3,0x10 + 815 -- | sra v0,v0,0x10 + 816 -- | slt v0,a0,v0 + replace mine[812:813] target[821:822] + 812 move a2,a0 | move a3,v1 + replace mine[815:816] target[824:825] + 815 sw t4,0(s4) | sw t4,0(s7) + replace mine[819:820] target[828:829] + 819 bnez v0,1200 | bnez v0,1228 + replace mine[821:823] target[830:832] + 821 swc2 $16,0(t8) | swc2 $16,0(t9) + 822 swc2 $17,0(s0) | swc2 $17,0(t8) + replace mine[825:826] target[834:835] + 825 addiu v0,t2,32 | addiu v0,t3,32 + replace mine[827:828] target[836:844] + 827 lh a1,8(t1) | lh a0,8(t2) + 828 -- | sll v0,t1,0x10 + 829 -- | sra v0,v0,0x10 + 830 -- | slt v0,a0,v0 + 831 -- | beqz v0,d30 + 832 -- | move v1,a0 + 833 -- | j d48 + 834 -- | move t1,v1 + replace mine[830:831] target[846:847] + 830 slt v0,a1,v0 | slt v0,v0,a0 + replace mine[832:835] target[848:876] + 832 move a0,a1 | sll v0,t0,0x10 + 833 j d24 | move t0,v1 + 834 move t0,a0 | sll v0,t0,0x10 + 835 -- | sra v0,v0,0x10 + 836 -- | slti v0,v0,-160 + 837 -- | bnez v0,1228 + 838 -- | sll v0,t1,0x10 + 839 -- | sra v0,v0,0x10 + 840 -- | slti v0,v0,161 + 841 -- | beqz v0,1228 + 842 -- | sll v0,a3,0x10 + 843 -- | lh a0,10(t2) + 844 -- | sra v0,v0,0x10 + 845 -- | slt v0,a0,v0 + 846 -- | beqz v0,d88 + 847 -- | move v1,a0 + 848 -- | j da0 + 849 -- | move a3,v1 + 850 -- | sll v0,a2,0x10 + 851 -- | sra v0,v0,0x10 + 852 -- | slt v0,v0,a0 + 853 -- | beqz v0,da4 + 854 -- | sll v0,a2,0x10 + 855 -- | move a2,v1 + 856 -- | sll v0,a2,0x10 + 857 -- | sra v0,v0,0x10 + 858 -- | slti v0,v0,-120 + 859 -- | bnez v0,1228 + delete mine[837:869] target[878:878] + 837 slt v0,v0,a1 | -- + 838 beqz v0,d28 | -- + 839 sll v0,a3,0x10 | -- + 840 move a3,a0 | -- + 841 sll v0,a3,0x10 | -- + 842 sra v0,v0,0x10 | -- + 843 slti v0,v0,-160 | -- + 844 bnez v0,1200 | -- + 845 sll v0,t0,0x10 | -- + 846 sra v0,v0,0x10 | -- + 847 slti v0,v0,161 | -- + 848 beqz v0,1200 | -- + 849 sll v0,a2,0x10 | -- + 850 lh a1,10(t1) | -- + 851 sra v0,v0,0x10 | -- + 852 slt v0,a1,v0 | -- + 853 beqz v0,d64 | -- + 854 move a0,a1 | -- + 855 j d7c | -- + 856 move a2,a0 | -- + 857 sll v0,v1,0x10 | -- + 858 sra v0,v0,0x10 | -- + 859 slt v0,v0,a1 | -- + 860 beqz v0,d80 | -- + 861 sll v0,v1,0x10 | -- + 862 move v1,a0 | -- + 863 sll v0,v1,0x10 | -- + 864 sra v0,v0,0x10 | -- + 865 slti v0,v0,-120 | -- + 866 bnez v0,1200 | -- + 867 sll v0,a2,0x10 | -- + 868 sra v0,v0,0x10 | -- + replace mine[870:871] target[879:880] + 870 beqz v0,1200 | beqz v0,1228 + replace mine[890:891] target[899:900] + 890 bne t5,v0,df8 | bne t6,v0,e1c + replace mine[896:897] target[905:906] + 896 sw v0,-16(t1) | sw v0,-16(t2) + replace mine[899:900] target[908:909] + 899 sw v0,-8(t1) | sw v0,-8(t2) + replace mine[902:904] target[911:913] + 902 sw v0,0(t1) | sw v0,0(t2) + 903 lw v1,0(t6) | lw v1,0(t7) + replace mine[907:908] target[916:917] + 907 sw v0,-20(t1) | sw v0,-20(t2) + replace mine[910:911] target[919:920] + 910 sw v0,-12(t1) | sw v0,-12(t2) + replace mine[913:914] target[922:923] + 913 sw v0,-4(t1) | sw v0,-4(t2) + replace mine[916:917] target[925:926] + 916 sh v0,4(t1) | sh v0,4(t2) + replace mine[918:919] target[927:928] + 918 sh v0,12(t1) | sh v0,12(t2) + replace mine[923:924] target[932:933] + 923 addu a0,a0,t7 | addu a0,a0,s0 + replace mine[925:927] target[934:936] + 925 addiu t1,t1,40 | addiu t2,t2,40 + 926 and v0,v0,t3 | and v0,v0,t5 + replace mine[928:930] target[937:939] + 928 and v1,t2,t3 | and v1,t3,t5 + 929 sw v0,0(t2) | sw v0,0(t3) + replace mine[931:933] target[940:942] + 931 j 11f4 | j 121c + 932 addiu t2,t2,40 | addiu t3,t3,40 + replace mine[958:960] target[967:971] + 958 move a3,a0 | move t0,a0 + 959 j f0c | j f30 + 960 -- | move t1,a1 + 961 -- | move t1,a0 + delete mine[961:963] target[972:972] + 961 move t0,a0 | -- + 962 move a3,a1 | -- + replace mine[964:965] target[973:974] + 964 sll v0,a3,0x10 | sll v0,t0,0x10 + replace mine[969:972] target[978:981] + 969 j f44 | j f68 + 970 move a3,v1 | move t0,v1 + 971 sll v0,t0,0x10 | sll v0,t1,0x10 + replace mine[976:977] target[985:986] + 976 move t0,v1 | move t1,v1 + replace mine[982:983] target[991:992] + 982 beqz v0,f68 | beqz v0,f90 + replace mine[984:985] target[993:997] + 984 j f70 | move a2,a0 + 985 -- | j f98 + 986 -- | move a3,a1 + 987 -- | move a3,a0 + replace mine[986:996] target[998:999] + 986 move a2,a0 | lh a0,26(sp) + 987 move v1,a1 | -- + 988 lh a1,26(sp) | -- + 989 sll v0,v1,0x10 | -- + 990 sra v0,v0,0x10 | -- + 991 slt v0,v0,a1 | -- + 992 beqz v0,f90 | -- + 993 move a0,a1 | -- + 994 j fa8 | -- + 995 move v1,a0 | -- + replace mine[998:999] target[1001:1009] + 998 slt v0,a1,v0 | slt v0,v0,a0 + 999 -- | beqz v0,fb8 + 1000 -- | move v1,a0 + 1001 -- | j fd0 + 1002 -- | move a2,v1 + 1003 -- | sll v0,a3,0x10 + 1004 -- | sra v0,v0,0x10 + 1005 -- | slt v0,a0,v0 + replace mine[1001:1002] target[1011:1012] + 1001 move a2,a0 | move a3,v1 + replace mine[1004:1005] target[1014:1015] + 1004 sw t4,0(s4) | sw t4,0(s7) + replace mine[1010:1012] target[1020:1022] + 1010 swc2 $16,0(t8) | swc2 $16,0(t9) + 1011 swc2 $17,0(s0) | swc2 $17,0(t8) + replace mine[1016:1017] target[1026:1034] + 1016 lh a1,28(sp) | lh a0,28(sp) + 1017 -- | sll v0,t1,0x10 + 1018 -- | sra v0,v0,0x10 + 1019 -- | slt v0,a0,v0 + 1020 -- | beqz v0,1028 + 1021 -- | move v1,a0 + 1022 -- | j 1040 + 1023 -- | move t1,v1 + replace mine[1019:1020] target[1036:1037] + 1019 slt v0,a1,v0 | slt v0,v0,a0 + replace mine[1021:1031] target[1038:1041] + 1021 move a0,a1 | sll v0,t0,0x10 + 1022 j 1018 | move t0,v1 + 1023 move t0,a0 | sll v0,t0,0x10 + 1024 sll v0,a3,0x10 | -- + 1025 sra v0,v0,0x10 | -- + 1026 slt v0,v0,a1 | -- + 1027 beqz v0,101c | -- + 1028 sll v0,a3,0x10 | -- + 1029 move a3,a0 | -- + 1030 sll v0,a3,0x10 | -- + replace mine[1034:1035] target[1044:1045] + 1034 sll v0,t0,0x10 | sll v0,t1,0x10 + insert mine[1038:1038] target[1048:1056] + 1038 -- | sll v0,a3,0x10 + 1039 -- | lh a0,30(sp) + 1040 -- | sra v0,v0,0x10 + 1041 -- | slt v0,a0,v0 + 1042 -- | beqz v0,1080 + 1043 -- | move v1,a0 + 1044 -- | j 1098 + 1045 -- | move a3,v1 + delete mine[1039:1040] target[1057:1057] + 1039 lh a1,30(sp) | -- + replace mine[1041:1042] target[1058:1059] + 1041 slt v0,a1,v0 | slt v0,v0,a0 + replace mine[1043:1053] target[1060:1063] + 1043 move a0,a1 | sll v0,a2,0x10 + 1044 j 1070 | move a2,v1 + 1045 move a2,a0 | sll v0,a2,0x10 + 1046 sll v0,v1,0x10 | -- + 1047 sra v0,v0,0x10 | -- + 1048 slt v0,v0,a1 | -- + 1049 beqz v0,1074 | -- + 1050 sll v0,v1,0x10 | -- + 1051 move v1,a0 | -- + 1052 sll v0,v1,0x10 | -- + replace mine[1056:1057] target[1066:1067] + 1056 sll v0,a2,0x10 | sll v0,a3,0x10 + replace mine[1081:1082] target[1091:1092] + 1081 sw v0,-16(t1) | sw v0,-16(t2) + replace mine[1084:1085] target[1094:1095] + 1084 sw v0,-8(t1) | sw v0,-8(t2) + replace mine[1087:1088] target[1097:1098] + 1087 sw v0,0(t1) | sw v0,0(t2) + replace mine[1090:1091] target[1100:1101] + 1090 sw v0,8(t1) | sw v0,8(t2) + replace mine[1092:1096] target[1102:1106] + 1092 lw s7,264(sp) | lw s3,264(sp) + 1093 lw v1,0(t6) | lw v1,0(t7) + 1094 or v0,s7,v0 | or v0,s3,v0 + 1095 sw v0,-20(t1) | sw v0,-20(t2) + replace mine[1097:1099] target[1107:1109] + 1097 addu a0,a0,t7 | addu a0,a0,s0 + 1098 sw v0,-12(t1) | sw v0,-12(t2) + replace mine[1101:1102] target[1111:1112] + 1101 sw v0,-4(t1) | sw v0,-4(t2) + replace mine[1104:1105] target[1114:1115] + 1104 sh v0,4(t1) | sh v0,4(t2) + replace mine[1106:1107] target[1116:1117] + 1106 sh v0,12(t1) | sh v0,12(t2) + replace mine[1108:1110] target[1118:1120] + 1108 addiu t1,t1,40 | addiu t2,t2,40 + 1109 and v0,v0,t3 | and v0,v0,t5 + replace mine[1111:1112] target[1121:1122] + 1111 sw v0,0(t2) | sw v0,0(t3) + replace mine[1113:1115] target[1123:1125] + 1113 and v1,t2,t3 | and v1,t3,t5 + 1114 and v0,v0,t9 | and v0,v0,s2 + replace mine[1118:1120] target[1128:1130] + 1118 sb v0,-21(t1) | sb v0,-21(t2) + 1119 lw s2,272(sp) | lw s4,272(sp) + replace mine[1121:1123] target[1131:1133] + 1121 or v0,s2,v0 | or v0,s4,v0 + 1122 sw v0,-16(t1) | sw v0,-16(t2) + replace mine[1125:1127] target[1135:1137] + 1125 sw a1,-20(t1) | sw a1,-20(t2) + 1126 sw v0,-12(t1) | sw v0,-12(t2) + replace mine[1129:1130] target[1139:1140] + 1129 sw v0,-8(t1) | sw v0,-8(t2) + replace mine[1132:1133] target[1142:1143] + 1132 sw v0,-4(t1) | sw v0,-4(t2) + replace mine[1134:1136] target[1144:1146] + 1134 addiu t2,t2,40 | addiu t3,t3,40 + 1135 sw v0,0(t1) | sw v0,0(t2) + replace mine[1140:1147] target[1150:1151] + 1140 addu a0,a0,t7 | addu a0,a0,s0 + 1141 lw v0,0(a0) | -- + 1142 addiu t1,t1,28 | -- + 1143 and v0,v0,t3 | -- + 1144 or v0,v0,v1 | -- + 1145 and v1,t2,t3 | -- + 1146 sw v0,0(t2) | -- + replace mine[1149:1150] target[1153:1160] + 1149 and v0,v0,t9 | and v0,v0,t5 + 1150 -- | or v0,v0,v1 + 1151 -- | and v1,t3,t5 + 1152 -- | sw v0,0(t3) + 1153 -- | lw v0,0(a0) + 1154 -- | addiu t3,t3,28 + 1155 -- | and v0,v0,s2 + replace mine[1152:1159] target[1162:1172] + 1152 addiu t6,t6,12 | addiu t7,t7,12 + 1153 lw s7,608(sp) | lw s3,608(sp) + 1154 lw s2,280(sp) | lw s4,280(sp) + 1155 addiu s7,s7,1 | addiu s3,s3,1 + 1156 sltu v0,s7,s2 | sltu v0,s3,s4 + 1157 bnez v0,504 | bnez v0,518 + 1158 sw s7,608(sp) | sw s3,608(sp) + 1159 -- | addiu s8,s8,1 + 1160 -- | lw s3,616(sp) + 1161 -- | lw s4,296(sp) + replace mine[1160:1167] target[1173:1179] + 1160 addiu s8,s8,20 | sw s3,616(sp) + 1161 lw s7,600(sp) | lw s3,288(sp) + 1162 lw s2,288(sp) | addiu s4,s4,20 + 1163 addiu s7,s7,1 | slt v0,s8,s3 + 1164 slt v0,s7,s2 | bnez v0,100 + 1165 bnez v0,fc | sw s4,296(sp) + 1166 sw s7,600(sp) | -- + replace mine[1168:1180] target[1180:1192] + 1168 sw t2,0(at) | sw t3,0(at) + 1169 lw ra,652(sp) | lw ra,660(sp) + 1170 lw s8,648(sp) | lw s8,656(sp) + 1171 lw s7,644(sp) | lw s7,652(sp) + 1172 lw s6,640(sp) | lw s6,648(sp) + 1173 lw s5,636(sp) | lw s5,644(sp) + 1174 lw s4,632(sp) | lw s4,640(sp) + 1175 lw s3,628(sp) | lw s3,636(sp) + 1176 lw s2,624(sp) | lw s2,632(sp) + 1177 lw s1,620(sp) | lw s1,628(sp) + 1178 lw s0,616(sp) | lw s0,624(sp) + 1179 addiu sp,sp,656 | addiu sp,sp,664 diff --git a/.run/P36/agents/ov_SC06_029__func_8017C954/sites.txt b/.run/P36/agents/ov_SC06_029__func_8017C954/sites.txt new file mode 100644 index 000000000..b62aa67db --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_8017C954/sites.txt @@ -0,0 +1 @@ +NEEDED barrier line 3346 diff --git a/.run/P36/agents/ov_SC06_029__func_8017C954/tu.txt b/.run/P36/agents/ov_SC06_029__func_8017C954/tu.txt new file mode 100644 index 000000000..ac4cec042 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_8017C954/tu.txt @@ -0,0 +1,2 @@ +src/ov_SC06_029/ov_SC06_029_jr_8017C954.c +func_8017C954 diff --git a/.run/P36/agents/ov_SC06_029__func_80181708/body_free.c b/.run/P36/agents/ov_SC06_029__func_80181708/body_free.c new file mode 100644 index 000000000..206a89add --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80181708/body_free.c @@ -0,0 +1,26 @@ +void func_80181708(int param_1) { + s16 *psVar1; + s16 *psVar2; + s16 *psVar5; + s16 sVar4; + s32 t; + s32 acc; + + psVar1 = (s16 *)D_801DFD8C; + psVar2 = (s16 *)D_801DFD90; + *(s32 *)(param_1 + 0x48) = psVar1[0]; + *(s32 *)(param_1 + 0x50) = psVar1[2]; + *(s32 *)(param_1 + 0x3C) = psVar2[0]; + *(s32 *)(param_1 + 0x44) = psVar2[2]; + sVar4 = func_80012CB8(D_801904C6, psVar1[1], 0xC0); + acc = *(s32 *)(param_1 + 0x4C) + sVar4; + t = D_801DFD90; + *(s32 *)(param_1 + 0x4C) = acc; + sVar4 = func_80012CB8(D_801904CE, *(s16 *)(t + 2), 0xC0); + psVar5 = (s16 *)D_801DFD8C; + *(s32 *)(param_1 + 0x40) += sVar4; + if (*(s32 *)(param_1 + 0x4C) < psVar5[1]) + *(s32 *)(param_1 + 0x4C) = psVar5[1]; + if (*(s32 *)(param_1 + 0x40) < *(s16 *)(D_801DFD90 + 2)) + *(s32 *)(param_1 + 0x40) = *(s16 *)(D_801DFD90 + 2); +} diff --git a/.run/P36/agents/ov_SC06_029__func_80181708/body_tree.c b/.run/P36/agents/ov_SC06_029__func_80181708/body_tree.c new file mode 100644 index 000000000..b6e758866 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80181708/body_tree.c @@ -0,0 +1,27 @@ +void func_80181708(int param_1) { + s16 *psVar1; + register s16 *psVar2 __asm__("$3"); // !FAKE: pin $3 — NEEDED DIFFERS (P36 rung B tus10) + s16 *psVar5; + s16 sVar4; + s32 t; + s32 acc; + + psVar1 = (s16 *)D_801DFD8C; + psVar2 = (s16 *)D_801DFD90; + *(s32 *)(param_1 + 0x48) = psVar1[0]; + *(s32 *)(param_1 + 0x50) = psVar1[2]; + *(s32 *)(param_1 + 0x3C) = psVar2[0]; + *(s32 *)(param_1 + 0x44) = psVar2[2]; + sVar4 = func_80012CB8(D_801904C6, psVar1[1], 0xC0); + acc = *(s32 *)(param_1 + 0x4C) + sVar4; + __asm__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus10) + t = D_801DFD90; + *(s32 *)(param_1 + 0x4C) = acc; + sVar4 = func_80012CB8(D_801904CE, *(s16 *)(t + 2), 0xC0); + psVar5 = (s16 *)D_801DFD8C; + *(s32 *)(param_1 + 0x40) += sVar4; + if (*(s32 *)(param_1 + 0x4C) < psVar5[1]) + *(s32 *)(param_1 + 0x4C) = psVar5[1]; + if (*(s32 *)(param_1 + 0x40) < *(s16 *)(D_801DFD90 + 2)) + *(s32 *)(param_1 + 0x40) = *(s16 *)(D_801DFD90 + 2); +} diff --git a/.run/P36/agents/ov_SC06_029__func_80181708/history.txt b/.run/P36/agents/ov_SC06_029__func_80181708/history.txt new file mode 100644 index 000000000..9b7416854 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80181708/history.txt @@ -0,0 +1,14 @@ +s6: verdict NO-MATCH start 26 best 2 compiles 188 path R7 do-while @5676 + R6 inline t @5679 +best-scoring single candidates of the last trace (move -> score [residual class]): + R6 inline t @5679 -> 2 [ORDER] (from 7) + R12 width acc s32->u8 @5669 -> 3 [COUNT] (from 7) + R6 inline sVar4 @5677 -> 6 [COUNT] (from 7) + R6 inline t @5679 -> 6 [COUNT] (from 11) + R7 do-while @5676 -> 7 [COUNT] (from 26) + R7 block @5673 -> 7 [COUNT] (from 7) + R5 swap + @5678 -> 7 [COUNT] (from 7) + R10 param-copy param_1 @5670 -> 7 [COUNT] (from 7) + R4 decl-move psVar2 1->0 -> 7 [COUNT] (from 7) + R6 inline acc @5678 -> 7 [COUNT] (from 7) + R8 temp tmp0 @5678 -> 7 [COUNT] (from 7) + R4 decl-move psVar2 1->2 -> 7 [COUNT] (from 7) diff --git a/.run/P36/agents/ov_SC06_029__func_80181708/neighbours.txt b/.run/P36/agents/ov_SC06_029__func_80181708/neighbours.txt new file mode 100644 index 000000000..55ff441e1 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80181708/neighbours.txt @@ -0,0 +1,3 @@ +--- every @class/@stuck/@crack note in this translation unit --- +// @class: struct +// @stuck: none — MATCH (fn-ptr table %lo-fold via extern array of code ptrs) diff --git a/.run/P36/agents/ov_SC06_029__func_80181708/related.txt b/.run/P36/agents/ov_SC06_029__func_80181708/related.txt new file mode 100644 index 000000000..f22f336d7 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80181708/related.txt @@ -0,0 +1,67 @@ +=== lever-free bodies in ov_SC06_029 sharing a callee or global with func_80181708 (3 found; top 6 by shared symbols) — read them for the SHAPE === +--- func_80180F08 (src/ov_SC06_029/ov_SC06_029_jr_8017C954.c:5317) shares 2: D_801DFD8C D_801DFD90 --- +void func_80180F08(void) { + D_801DFD8C = (s32)D_801904D4; + D_801DFD90 = (s32)&D_801904D4[2]; + func_8012A018((s32)&func_8018180C, 0); +} + +--- func_80188A90 (src/ov_SC06_029/ov_SC06_029_jr_801867D0.c:4531) shares 1: func_80012CB8 --- +void func_80188A90(int param_1) { + s16 *psVar1; + s16 *psVar2; + s16 *psVar5; + s16 sVar4; + + psVar2 = (s16 *)D_801DFFE4; + psVar1 = (s16 *)D_801DFFE0; + *(s32 *)(param_1 + 0x48) = psVar1[0]; + *(s32 *)(param_1 + 0x50) = psVar1[2]; + *(s32 *)(param_1 + 0x3C) = psVar2[0]; + D_801DFFE8 = (s32)&D_801913E4; + *(s32 *)(param_1 + 0x44) = psVar2[2]; + D_801DFFEC = (s32)&D_801913E4 + 8; + sVar4 = func_80012CB8((s16)D_801913E4[1], psVar1[1], 0x80); + ((struct { s32 f; } *)(param_1 + 0x4C))->f += sVar4; + sVar4 = func_80012CB8(*(s16 *)(D_801DFFEC + 2), *(s16 *)(D_801DFFE4 + 2), 0x80); + psVar5 = (s16 *)D_801DFFE0; + *(s32 *)(param_1 + 0x40) += sVar4; + if (*(s32 *)(param_1 + 0x4C) < psVar5[1]) + *(s32 *)(param_1 + 0x4C) = psVar5[1]; + if (*(s32 *)(param_1 + 0x40) < *(s16 *)(D_801DFFE4 + 2)) + *(s32 *)(param_1 + 0x40) = *(s16 *)(D_801DFFE4 + 2); +} + +--- func_80188988 (src/ov_SC06_029/ov_SC06_029_jr_801867D0.c:4490) shares 1: func_80012CB8 --- +void func_80188988(int param_1) { + extern s32 D_801DFFE0; + extern s32 D_801DFFE4; + extern s32 D_801DFFE8; + extern s32 D_801DFFEC; + extern s32 func_80012CB8(s32 a0, s32 a1, s32 a2); + s16 *psVar1; + s16 *psVar2; + s16 *psVar3; + s16 *psVar5; + s16 sVar4; + + psVar1 = (s16 *)D_801DFFE0; + psVar2 = (s16 *)D_801DFFE4; + *(s32 *)(param_1 + 0x4C) = psVar1[1]; + *(s32 *)(param_1 + 0x50) = psVar1[2]; + *(s32 *)(param_1 + 0x40) = psVar2[1]; + psVar3 = (s16 *)D_801DFFE8; + *(s32 *)(param_1 + 0x44) = psVar2[2]; + sVar4 = func_80012CB8(*psVar3, *psVar1, 0x80); + ((struct { s32 f; } *)(param_1 + 0x48))->f += sVar4; + sVar4 = func_80012CB8(*(s16 *)D_801DFFEC, *(s16 *)D_801DFFE4, 0x80); + psVar5 = (s16 *)D_801DFFE0; + *(s32 *)(param_1 + 0x3C) += sVar4; + if (psVar5[0] < *(s32 *)(param_1 + 0x48)) { + *(s32 *)(param_1 + 0x48) = psVar5[0]; + } + if (*(s16 *)D_801DFFE4 < *(s32 *)(param_1 + 0x3C)) { + *(s32 *)(param_1 + 0x3C) = *(s16 *)D_801DFFE4; + } +} + diff --git a/.run/P36/agents/ov_SC06_029__func_80181708/residual.txt b/.run/P36/agents/ov_SC06_029__func_80181708/residual.txt new file mode 100644 index 000000000..3962c8d93 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80181708/residual.txt @@ -0,0 +1,39 @@ +src/ov_SC06_029/ov_SC06_029_jr_8017C954.c:func_80181708: score 26 (COUNT; mine 66 ins, target 65) — not yet + register pairs (mine -> target, count): v1->a1 x1, a1->v0 x1 + insert mine[0:0] target[0:4] + 0 -- | lui a1,0x0 + 1 -- | lw a1,0(a1) + 2 -- | lui v1,0x0 + 3 -- | lw v1,0(v1) + insert mine[1:1] target[5:6] + 1 -- | sw ra,20(sp) + insert mine[2:2] target[7:8] + 2 -- | lh v0,0(a1) + replace mine[3:8] target[9:13] + 3 lui v1,0x0 | sw v0,72(s0) + 4 lw v1,0(v1) | lh v0,4(a1) + 5 lui a0,0x0 | nop + 6 lw a0,0(a0) | sw v0,80(s0) + 7 sw ra,20(sp) | -- + replace mine[10:11] target[15:16] + 10 sw v0,72(s0) | sw v0,60(s0) + delete mine[12:18] target[17:17] + 12 nop | -- + 13 sw v0,80(s0) | -- + 14 lh v0,0(a0) | -- + 15 nop | -- + 16 sw v0,60(s0) | -- + 17 lh v0,4(a0) | -- + replace mine[22:23] target[21:22] + 22 lh a1,2(v1) | lh a1,2(a1) + insert mine[26:26] target[25:26] + 26 -- | lw v1,76(s0) + delete mine[27:30] target[27:27] + 27 lw v1,76(s0) | -- + 28 lui a1,0x0 | -- + 29 lw a1,0(a1) | -- + insert mine[31:31] target[28:30] + 31 -- | lui v0,0x0 + 32 -- | lw v0,0(v0) + replace mine[34:35] target[33:34] + 34 lh a1,2(a1) | lh a1,2(v0) diff --git a/.run/P36/agents/ov_SC06_029__func_80181708/sites.txt b/.run/P36/agents/ov_SC06_029__func_80181708/sites.txt new file mode 100644 index 000000000..d3fe7ae77 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80181708/sites.txt @@ -0,0 +1,3 @@ +REMOVED pin $5 line 5766 +NEEDED pin $3 line 5767 +NEEDED barrier line 5781 diff --git a/.run/P36/agents/ov_SC06_029__func_80181708/tu.txt b/.run/P36/agents/ov_SC06_029__func_80181708/tu.txt new file mode 100644 index 000000000..ae4b8671d --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80181708/tu.txt @@ -0,0 +1,2 @@ +src/ov_SC06_029/ov_SC06_029_jr_8017C954.c +func_80181708 diff --git a/.run/P36/agents/ov_SC06_029__func_80184EFC/body_free.c b/.run/P36/agents/ov_SC06_029__func_80184EFC/body_free.c new file mode 100644 index 000000000..adf41c9c3 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80184EFC/body_free.c @@ -0,0 +1,55 @@ +void func_80184EFC(s32 a0) { + extern s32 D_80190A08; + extern u16 D_80190810[]; + s32 s0; + s32 tmp; + s32 ret; + s32 sub; + u16 nib; + s32 p20; + s32 val; + s32 sub2; + + s0 = a0; + ret = ((s32 (*)(void))func_8012C1B8)(); + *(s32 *)(s0 + 0x20) = ret; + if (ret == 0) { + func_8012CAE4((void *)s0); + return; + } + + func_8001C214(ret, 0); + + /* §164-29: ONE shared pseudo for the flags temp and the tag accumulator. + * The WAR edge from `sh tmp` to the tag chain's first def is what pins the + * whole D_80190A08|0x70000000 build BELOW the flags store (target leaves the + * `lw 0x20(s0)` load-delay slot a real nop). Split temps let sched1 hoist + * the tag chain into that slot. The $2 pin fixes the resulting + * $v0>$v1>$a0 local-alloc rotation. */ + sub = *(s32 *)(s0 + 0x20); + tmp = *(u16 *)(sub + 0x2C); + tmp = tmp | 0x10; + *(u16 *)(sub + 0x2C) = tmp; + + tmp = (s32)&D_80190A08; + tmp = tmp | 0x10000000; + tmp = tmp | 0x20000000; + tmp = tmp | 0x40000000; + *(s32 *)(s0 + 0x58) = tmp; + if (*(s16 *)(s0 + 0x70) & 0x8000) { + *(s16 *)(s0 + 0x34) = 1; + } + + nib = *(u16 *)(s0 + 0x70) & 0xF; + p20 = *(s32 *)(*(s32 *)(s0 + 0x64) + 0x20); + val = *(u16 *)(p20 + 0x12) + *(u16 *)((u8 *)D_80190810 + nib * 12); + val = val + 0xE00; + sub2 = *(s32 *)(s0 + 0x20); + *(u16 *)(sub2 + 0x12) = val; + func_8012B2CC(s0); + + func_8012B178(s0, (s32)0xFFFC0000); + + *(s32 *)(s0 + 0x1C) = 0x20; + *(u16 *)(s0 + 0x2) = *(u16 *)(s0 + 0x2) + 1; +} diff --git a/.run/P36/agents/ov_SC06_029__func_80184EFC/body_tree.c b/.run/P36/agents/ov_SC06_029__func_80184EFC/body_tree.c new file mode 100644 index 000000000..114e30cf6 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80184EFC/body_tree.c @@ -0,0 +1,55 @@ +void func_80184EFC(s32 a0) { + extern s32 D_80190A08; + extern u16 D_80190810[]; + register s32 s0 __asm__("$16"); // !FAKE: pin $16 — NEEDED DIFFERS (P36 rung B tus10) + register s32 tmp __asm__("$2"); // !FAKE: pin $2 — NEEDED DIFFERS (P36 rung B tus10) + s32 ret; + s32 sub; + u16 nib; + s32 p20; + s32 val; + s32 sub2; + + s0 = a0; + ret = ((s32 (*)(void))func_8012C1B8)(); + *(s32 *)(s0 + 0x20) = ret; + if (ret == 0) { + func_8012CAE4((void *)s0); + return; + } + + func_8001C214(ret, 0); + + /* §164-29: ONE shared pseudo for the flags temp and the tag accumulator. + * The WAR edge from `sh tmp` to the tag chain's first def is what pins the + * whole D_80190A08|0x70000000 build BELOW the flags store (target leaves the + * `lw 0x20(s0)` load-delay slot a real nop). Split temps let sched1 hoist + * the tag chain into that slot. The $2 pin fixes the resulting + * $v0>$v1>$a0 local-alloc rotation. */ + sub = *(s32 *)(s0 + 0x20); + tmp = *(u16 *)(sub + 0x2C); + tmp = tmp | 0x10; + *(u16 *)(sub + 0x2C) = tmp; + + tmp = (s32)&D_80190A08; + tmp = tmp | 0x10000000; + tmp = tmp | 0x20000000; + tmp = tmp | 0x40000000; + *(s32 *)(s0 + 0x58) = tmp; + if (*(s16 *)(s0 + 0x70) & 0x8000) { + *(s16 *)(s0 + 0x34) = 1; + } + + nib = *(u16 *)(s0 + 0x70) & 0xF; + p20 = *(s32 *)(*(s32 *)(s0 + 0x64) + 0x20); + val = *(u16 *)(p20 + 0x12) + *(u16 *)((u8 *)D_80190810 + nib * 12); + val = val + 0xE00; + sub2 = *(s32 *)(s0 + 0x20); + *(u16 *)(sub2 + 0x12) = val; + func_8012B2CC(s0); + + func_8012B178(s0, (s32)0xFFFC0000); + + *(s32 *)(s0 + 0x1C) = 0x20; + *(u16 *)(s0 + 0x2) = *(u16 *)(s0 + 0x2) + 1; +} diff --git a/.run/P36/agents/ov_SC06_029__func_80184EFC/history.txt b/.run/P36/agents/ov_SC06_029__func_80184EFC/history.txt new file mode 100644 index 000000000..c833090a5 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80184EFC/history.txt @@ -0,0 +1,15 @@ +s6: verdict NO-MATCH start 35 best 11 compiles 191 path R10 param-alias s0->a0 @7848 + R6 inline tmp @7864 +s8: verdict NO-MATCH start 35 best 11 compiles 255 path R10 param-alias s0->a0 @7848 + R6 inline tmp @7864 +best-scoring single candidates of the last trace (move -> score [residual class]): + R6 inline tmp @7864 -> 11 [COUNT] (from 16) + R6 inline tmp @7865 -> 11 [COUNT] (from 16) + R6 inline tmp @7867 -> 11 [COUNT] (from 16) + R6 inline tmp @7868 -> 13 [COUNT] (from 16) + R6 inline tmp @7869 -> 13 [COUNT] (from 16) + R6 inline tmp @7871 -> 13 [COUNT] (from 16) + R6 inline tmp @7869 -> 14 [COUNT] (from 16) + R6 inline tmp @7870 -> 14 [COUNT] (from 16) + R6 inline tmp @7871 -> 14 [COUNT] (from 16) + R6 inline tmp @7870 -> 14 [COUNT] (from 16) + R6 inline tmp @7871 -> 14 [COUNT] (from 16) + R6 inline tmp @7872 -> 14 [COUNT] (from 16) diff --git a/.run/P36/agents/ov_SC06_029__func_80184EFC/neighbours.txt b/.run/P36/agents/ov_SC06_029__func_80184EFC/neighbours.txt new file mode 100644 index 000000000..55ff441e1 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80184EFC/neighbours.txt @@ -0,0 +1,3 @@ +--- every @class/@stuck/@crack note in this translation unit --- +// @class: struct +// @stuck: none — MATCH (fn-ptr table %lo-fold via extern array of code ptrs) diff --git a/.run/P36/agents/ov_SC06_029__func_80184EFC/related.txt b/.run/P36/agents/ov_SC06_029__func_80184EFC/related.txt new file mode 100644 index 000000000..75e0f5acd --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80184EFC/related.txt @@ -0,0 +1,192 @@ +=== lever-free bodies in ov_SC06_029 sharing a callee or global with func_80184EFC (46 found; top 6 by shared symbols) — read them for the SHAPE === +--- func_80189BB4 (src/ov_SC06_029/ov_SC06_029_jr_801898CC.c:3452) shares 5: func_8001C214 func_8012B178 func_8012B2CC func_8012C1B8 func_8012CAE4 --- +void func_80189BB4(void *a0) { + Blk20 mtx; + s32 v0; + + mtx = D_800AE620; + v0 = func_8012C1B8(); + *(s32 *)((s32)a0 + 0x20) = v0; + if (v0 == 0) { + func_8012CAE4(a0); + } else { + s32 vec[3]; + + func_8001C214(v0, (s32)&D_801B5EC8); + func_8012A828((s32)a0, &D_801B90F4); + *(s16 *)(*(s32 *)((s32)a0 + 0x20) + 0x12) = 0xA00; + func_8012E8A8((u8 *)a0); + RotMatrixY(0x200, &mtx); + vec[0] = 0; + vec[1] = (s32)0xFE000000; + vec[2] = (s32)0xFC800000; + func_800484EC((s32)&mtx, (s32)vec, (s32)a0 + 4); + func_8012B2CC((s32)a0); + *(s32 *)((s32)a0 + 0x6C) = func_8012C588(0x382, (s32)a0); + func_8012B178((s32)a0, (s32)0xFFFC0000); + *(u16 *)((s32)a0 + 2) += 1; + } +} + +--- func_80189F58 (src/ov_SC06_029/ov_SC06_029_jr_801898CC.c:3611) shares 5: func_8001C214 func_8012B178 func_8012B2CC func_8012C1B8 func_8012CAE4 --- +void func_80189F58(s32 param_1) +{ + Blk20 localMatrix; + VECTOR localVec; + s32 v0; + + localMatrix = D_800AE620; + v0 = func_8012C1B8(); + *(s32 *)((u8 *)param_1 + 0x20) = v0; + if (v0 == 0) { + func_8012CAE4((void *)param_1); + } else { + func_8001C214(v0, (s32)&D_801CBE14); + func_8012A828(param_1, (void *)&D_801CEE2C); + *(u16 *)(*(s32 *)((u8 *)param_1 + 0x20) + 0x12) = 0xA00; + func_8012E8A8((u8 *)param_1); + RotMatrixY(0x200, &localMatrix); + localVec.vx = 0; + localVec.vy = 0xFE000000; + localVec.vz = 0xFC800000; + func_800484EC((s32)&localMatrix, (s32)&localVec, param_1 + 4); + func_8012B2CC(param_1); + func_8012B178(param_1, 0xFFFC0000); + *(s32 *)((u8 *)param_1 + 0x1c) = 0x20; + *(u16 *)((u8 *)param_1 + 2) += 1; + } +} + +--- func_80189CEC (src/ov_SC06_029/ov_SC06_029_jr_801898CC.c:3501) shares 5: func_8001C214 func_8012B178 func_8012B2CC func_8012C1B8 func_8012CAE4 --- +void func_80189CEC(void *a0) +{ + Blk20 blk; + s32 v0; + s32 v1; + s32 arr[3]; + + blk = D_800AE620; + v0 = func_8012C1B8(); + *(s32 *)((u8 *)a0 + 0x20) = v0; + if (v0 == 0) { + func_8012CAE4(a0); + return; + } + + func_8001C214(v0, (s32)&D_801BF2BC); + func_8012A828((s32)a0, &D_801C2994); + v1 = *(s32 *)((u8 *)a0 + 0x20); + *(u16 *)(v1 + 0x12) = 0x600; + func_8012E8A8((u8 *)a0); + RotMatrixY(-0x200, &blk); + arr[0] = 0x00280000; + arr[1] = (s32)0xFE000000; + arr[2] = (s32)0xFC800000; + func_800484EC((s32)&blk, (s32)arr, (s32)((u8 *)a0 + 4)); + func_8012B2CC((s32)a0); + func_8012B178((s32)a0, (s32)0xFFFC0000); + *(u16 *)((u8 *)a0 + 2) = *(u16 *)((u8 *)a0 + 2) + 1; +} + +--- func_8018A41C (src/ov_SC06_029/ov_SC06_029_jr_801898CC.c:3883) shares 5: func_8001C214 func_8012B178 func_8012B2CC func_8012C1B8 func_8012CAE4 --- +void func_8018A41C(void *a0) { + Blk20 mtx; + s32 v0; + s32 vec[3]; + + mtx = D_800AE620; + + v0 = ((s32 (*)(void))func_8012C1B8)(); + *(s32 *)((u8 *)a0 + 0x20) = v0; + if (v0 == 0) { + func_8012CAE4(a0); + return; + } + + func_8001C214(v0, (s32)&D_801D4F0C); + func_8001D0E8(*(s32 *)((u8 *)a0 + 0x20), 0x7FFF, 0x7FFF); + + if (*(s16 *)((u8 *)a0 + 0x70) == 0) { + RotMatrixY(0x200, &mtx); + *(s16 *)(*(s32 *)((u8 *)a0 + 0x20) + 0x12) = 0xA00; + } else { + RotMatrixY(-0x200, &mtx); + *(s16 *)(*(s32 *)((u8 *)a0 + 0x20) + 0x12) = 0x600; + } + + vec[0] = 0; + vec[1] = -0x1E00000; + vec[2] = -0x4200000; + func_800484EC((s32)&mtx, (s32)vec, (s32)((u8 *)a0 + 4)); + func_8012B2CC((s32)a0); + func_8012E8A8((u8 *)a0); + func_8012B178((s32)a0, 0xFFFC0000); + + *(u16 *)((u8 *)a0 + 2) = *(u16 *)((u8 *)a0 + 2) + 1; +} + +--- func_80189E18 (src/ov_SC06_029/ov_SC06_029_jr_801898CC.c:3553) shares 5: func_8001C214 func_8012B178 func_8012B2CC func_8012C1B8 func_8012CAE4 --- +void func_80189E18(s32 param_1) +{ + Mtx8_80189E18 mtx; + s32 sp30[3]; + s32 v0; + + mtx = (*(Mtx8_80189E18 *)&D_800AE620); + + v0 = func_8012C1B8(); + *(s32 *)(param_1 + 0x20) = v0; + if (v0 == 0) { + func_8012CAE4((void *)param_1); + return; + } + + func_8001C214(v0, (s32)D_801C5C70); + func_8012A828(param_1, D_801C8E38); + + *(u16 *)(*(s32 *)(param_1 + 0x20) + 0x12) = 0x600; + *(u16 *)(*(s32 *)(param_1 + 0x20) + 0x2C) = + *(u16 *)(*(s32 *)(param_1 + 0x20) + 0x2C) | 0x10; + func_8012E8A8((u8 *)param_1); + + RotMatrixY(-0x200, &mtx); + + sp30[0] = -0x280000; + sp30[1] = -0x2000000; + sp30[2] = -0x3800000; + func_800484EC((s32)&mtx, (s32)sp30, param_1 + 4); + + func_8012B2CC(param_1); + + func_8012B178(param_1, -0x40000); + + *(u16 *)(param_1 + 2) += 1; +} + +--- func_80185C88 (src/ov_SC06_029/ov_SC06_029_jr_8017C954.c:8590) shares 4: func_8001C214 func_8012B2CC func_8012C1B8 func_8012CAE4 --- +void func_80185C88(void *arg0) { + s32 v0 = func_8012C1B8(); + s32 v1; + + *(s32 *)((u8 *)arg0 + 0x20) = v0; + if (v0 == 0) { + func_8012CAE4(arg0); + return; + } + + func_8001C214(v0, 0); + + *(s32 *)((u8 *)arg0 + 8) = *(s32 *)((u8 *)arg0 + 8) + *(s32 *)(*(s32 *)((u8 *)arg0 + 0x64) + 8); + *(u16 *)(*(s32 *)((u8 *)arg0 + 0x20) + 0x12) = *(u16 *)((u8 *)arg0 + 0xFC); + func_8012B2CC(arg0); + + *(s32 *)((u8 *)arg0 + 0x1C) = 0x90; + v1 = rand(); + *(s16 *)((u8 *)arg0 + 0xFE) = (v1 % 64) + 0x40; + { + u16 x = *(u16 *)(*(s32 *)((u8 *)arg0 + 0x64) + 0x36); + *(u16 *)((u8 *)arg0 + 2) = *(u16 *)((u8 *)arg0 + 2) + 1; + *(u16 *)((u8 *)arg0 + 0x100) = x; + } +} + diff --git a/.run/P36/agents/ov_SC06_029__func_80184EFC/residual.txt b/.run/P36/agents/ov_SC06_029__func_80184EFC/residual.txt new file mode 100644 index 000000000..0e8afb2cb --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80184EFC/residual.txt @@ -0,0 +1,51 @@ +src/ov_SC06_029/ov_SC06_029_jr_8017C954.c:func_80184EFC: score 35 (COUNT; mine 66 ins, target 63) — not yet + register pairs (mine -> target, count): a0->v0 x14, v0->v1 x11, s1->s0 x7, v1->a0 x2 + replace mine[0:1] target[0:1] + 0 addiu sp,sp,-32 | addiu sp,sp,-24 + insert mine[2:2] target[2:4] + 2 -- | sw ra,20(sp) + 3 -- | jal 0 + delete mine[3:7] target[5:5] + 3 sw ra,24(sp) | -- + 4 jal 0 | -- + 5 sw s1,20(sp) | -- + 6 move s1,s0 | -- + replace mine[11:12] target[9:10] + 11 j 8698 | j 8690 + replace mine[16:17] target[14:15] + 16 lw v0,32(s0) | lw v1,32(s0) + replace mine[18:33] target[16:31] + 18 lhu a0,44(v0) | lhu v0,44(v1) + 19 lui v1,0x4000 | lui a0,0x4000 + 20 ori a0,a0,0x10 | ori v0,v0,0x10 + 21 sh a0,44(v0) | sh v0,44(v1) + 22 lui a0,0x0 | lui v0,0x0 + 23 addiu a0,a0,0 | addiu v0,v0,0 + 24 lui v0,0x1000 | lui v1,0x1000 + 25 or a0,a0,v0 | or v0,v0,v1 + 26 lui v0,0x2000 | lui v1,0x2000 + 27 or a0,a0,v0 | or v0,v0,v1 + 28 lh v0,112(s0) | lh v1,112(s0) + 29 or a0,a0,v1 | or v0,v0,a0 + 30 andi v0,v0,0x8000 | andi v1,v1,0x8000 + 31 beqz v0,8634 | beqz v1,862c + 32 sw a0,88(s0) | sw v0,88(s0) + replace mine[35:37] target[33:35] + 35 lhu v0,112(s1) | lhu v0,112(s0) + 36 lw a0,100(s1) | lw a0,100(s0) + replace mine[46:47] target[44:45] + 46 move a0,s1 | move a0,s0 + replace mine[48:49] target[46:47] + 48 lw v1,32(s1) | lw v1,32(s0) + replace mine[52:53] target[50:51] + 52 move a0,s1 | move a0,s0 + replace mine[55:56] target[53:54] + 55 lhu v0,2(s1) | lhu v0,2(s0) + replace mine[57:58] target[55:56] + 57 sw v1,28(s1) | sw v1,28(s0) + replace mine[59:62] target[57:59] + 59 sh v0,2(s1) | sh v0,2(s0) + 60 lw ra,24(sp) | lw ra,20(sp) + 61 lw s1,20(sp) | -- + replace mine[63:64] target[60:61] + 63 addiu sp,sp,32 | addiu sp,sp,24 diff --git a/.run/P36/agents/ov_SC06_029__func_80184EFC/sites.txt b/.run/P36/agents/ov_SC06_029__func_80184EFC/sites.txt new file mode 100644 index 000000000..1c576529b --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80184EFC/sites.txt @@ -0,0 +1,2 @@ +NEEDED pin $16 line 8210 +NEEDED pin $2 line 8211 diff --git a/.run/P36/agents/ov_SC06_029__func_80184EFC/tu.txt b/.run/P36/agents/ov_SC06_029__func_80184EFC/tu.txt new file mode 100644 index 000000000..226d9fbeb --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80184EFC/tu.txt @@ -0,0 +1,2 @@ +src/ov_SC06_029/ov_SC06_029_jr_8017C954.c +func_80184EFC diff --git a/.run/P36/agents/ov_SC06_029__func_80185D44/body_free.c b/.run/P36/agents/ov_SC06_029__func_80185D44/body_free.c new file mode 100644 index 000000000..251a41bce --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80185D44/body_free.c @@ -0,0 +1,32 @@ +void func_80185D44(void *a0) { + s32 v0; + s32 v1; + s32 m; + s16 t; + u8 *p; + + v0 = func_8012C1B8(); + *(s32 *)((s32)a0 + 0x20) = v0; + if (v0 == 0) { + func_8012CAE4(a0); + return; + } + func_8001C214(v0, (s32)D_801A0734); + m = 0x7FFF0000; + t = 0x80; + *(s16 *)((s32)a0 + 0xE0) = t; + *(s16 *)((s32)a0 + 0xDE) = t; + *(s16 *)((s32)a0 + 0xDC) = t; + t = -2; + *(s16 *)((s32)a0 + 0xE2) = t; + p = (u8 *)D_801DDBF4; + v1 = *(s32 *)((s32)a0 + 0x20); + *(u16 *)(v1 + 0x2C) |= 0x80; + v1 = *(s32 *)((s32)a0 + 0x20); + *(s32 *)(v1 + 0x80) = (s32)a0 + 0xDC; + *(s16 *)(p + 0x1A) = 0x800; + *(s16 *)(p + 0x18) = 0x800; + m |= 0xFFFF; + *(s32 *)(p + 4) &= m; + *(u16 *)((s32)a0 + 2) = *(u16 *)((s32)a0 + 2) + 1; +} diff --git a/.run/P36/agents/ov_SC06_029__func_80185D44/body_tree.c b/.run/P36/agents/ov_SC06_029__func_80185D44/body_tree.c new file mode 100644 index 000000000..31d5e6289 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80185D44/body_tree.c @@ -0,0 +1,33 @@ +void func_80185D44(void *a0) { + s32 v0; + s32 v1; + s32 m; + s16 t; + u8 *p; + + v0 = func_8012C1B8(); + *(s32 *)((s32)a0 + 0x20) = v0; + if (v0 == 0) { + func_8012CAE4(a0); + return; + } + func_8001C214(v0, (s32)D_801A0734); + m = 0x7FFF0000; + __asm__("" : "=r"(m) : "0"(m)); // !FAKE: launder — NEEDED DIFFERS (P36 rung B tus10) + t = 0x80; + *(s16 *)((s32)a0 + 0xE0) = t; + *(s16 *)((s32)a0 + 0xDE) = t; + *(s16 *)((s32)a0 + 0xDC) = t; + t = -2; + *(s16 *)((s32)a0 + 0xE2) = t; + p = (u8 *)D_801DDBF4; + v1 = *(s32 *)((s32)a0 + 0x20); + *(u16 *)(v1 + 0x2C) |= 0x80; + v1 = *(s32 *)((s32)a0 + 0x20); + *(s32 *)(v1 + 0x80) = (s32)a0 + 0xDC; + *(s16 *)(p + 0x1A) = 0x800; + *(s16 *)(p + 0x18) = 0x800; + m |= 0xFFFF; + *(s32 *)(p + 4) &= m; + *(u16 *)((s32)a0 + 2) = *(u16 *)((s32)a0 + 2) + 1; +} diff --git a/.run/P36/agents/ov_SC06_029__func_80185D44/history.txt b/.run/P36/agents/ov_SC06_029__func_80185D44/history.txt new file mode 100644 index 000000000..a4df35143 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80185D44/history.txt @@ -0,0 +1,14 @@ +s5: verdict NO-MATCH start 2 best 2 compiles 177 path +best-scoring single candidates of the last trace (move -> score [residual class]): + R18 bystander @8659->8662 -> 2 [ORDER] (from 2) + R9 swap-stmts @8658 -> 2 [ORDER] (from 2) + R7 block @8655 -> 2 [ORDER] (from 2) + R8 base-shared tmp0 @8653 -> 2 [ORDER] (from 2) + R12 width t s16->s32 @8649 -> 2 [ORDER] (from 2) + R18 bystander @8659->8663 -> 2 [ORDER] (from 2) + R9 swap-stmts @8659 -> 2 [ORDER] (from 2) + R7 do-while @8655 -> 2 [ORDER] (from 2) + R6 inline v1 @8667 -> 2 [ORDER] (from 2) + R8 temp tmp0 @8667 -> 2 [ORDER] (from 2) + R18 bystander @8659->8664 -> 2 [ORDER] (from 2) + R7 block @8658 -> 2 [ORDER] (from 2) diff --git a/.run/P36/agents/ov_SC06_029__func_80185D44/neighbours.txt b/.run/P36/agents/ov_SC06_029__func_80185D44/neighbours.txt new file mode 100644 index 000000000..202fa597c --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80185D44/neighbours.txt @@ -0,0 +1,19 @@ +=== THIS FUNCTION'S OWN HEADER (func_80185D44, line 8640) — read it in full === +/* The `m` split + zero-byte re-tie is a SCHEDULING lever, not semantics. + * sched1 is a BACKWARD list scheduler: picked-first == placed-last, and at equal + * INSN_PRIORITY the tie-break is INSN_LUID with the HIGHER luid picked first + * (sched.c rank_for_schedule:2428, ready[0] taken at :3747). The mask's + * `lui`/`ori` normally arrive as ONE insn that sched1's own try_split (:4830) + * splits into two LUID-ADJACENT halves, so no source order can put the `lui` + * dead-last in the pick order (block position 0) while the `ori` still wins the + * contest against `t = -2` seven picks earlier — the target needs + * luid(lui) < luid(t=0x80) < luid(t=-2) < luid(ori), which adjacency forbids. + * Writing the two halves as two statements with a non-volatile re-tie between + * them (§30#3) keeps cse/combine from re-folding the constant, breaks the + * adjacency, and gives each half its own luid. `t` is deliberately ONE 2-set + * s16 (§49-variant / §199-A): that kills the birthing boost on both constants, + * so `t = -2` is picked after the `ori` instead of the instant it is ready. */ + +--- every @class/@stuck/@crack note in this translation unit --- +// @class: struct +// @stuck: none — MATCH (fn-ptr table %lo-fold via extern array of code ptrs) diff --git a/.run/P36/agents/ov_SC06_029__func_80185D44/related.txt b/.run/P36/agents/ov_SC06_029__func_80185D44/related.txt new file mode 100644 index 000000000..c1636a37e --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80185D44/related.txt @@ -0,0 +1,144 @@ +=== lever-free bodies in ov_SC06_029 sharing a callee or global with func_80185D44 (40 found; top 6 by shared symbols) — read them for the SHAPE === +--- func_8017EBC4 (src/ov_SC06_029/ov_SC06_029_jr_8017C954.c:4024) shares 4: D_801DDBF4 func_8001C214 func_8012C1B8 func_8012CAE4 --- +void func_8017EBC4(Obj8017EBC4 *a0) { + Obj8017EBC4 *ent; + Obj8017EBC4 *ent2; + u8 *p; + s32 *q; + Sub8017EBC4 *sp; + s16 t; + s32 i; + + sp = (Sub8017EBC4 *)func_8012C1B8(); + a0->unk_020 = sp; + if (sp == NULL) { + func_8012CAE4(a0); + return; + } + + func_8001C214((s32)sp, (s32)D_801A0720); + func_8001D0E8((s32)a0->unk_020, 0x7FFF, 0x7FFF); + func_8001C97C(D_8019EA38); + + for (i = 0; i < 5; i++) { + ent = (Obj8017EBC4 *)func_8012C658(0x294, i, (s32)a0); + t = (s16)((i & 1) << 9); + D_801DDB2C[i] = (s32)ent; + ent->unk_00A -= i << 8; + ent2 = (Obj8017EBC4 *)D_801DDB2C[i]; + ent2->unk_020->unk_012 = t; + ent2->unk_0FC = t; + D_801DFD38[i] = 0; + } + + D_801DDBF4 = (void *)func_8012C194(); + if (D_801DDBF4 != 0) { + p = &D_80190450; + func_8001CD9C((int)D_801DDBF4, p); + *(u16 *)((s32)D_801DDBF4 + 0x2C) = 0xC010; + *(s32 *)((s32)D_801DDBF4 + 0x4) |= 0xD0000000; + *p = 0; + D_80190451 = 0; + D_80190452 = 0; + } + + a0->unk_01C = 0x100; + D_801DDBF0 = NULL; + a0->unk_076 = 0x1E0; + StoreImage(D_80190490, D_801DDBF8); + StoreImage(&D_80190490[4], D_801DEBF8); + + q = &D_801DFD4C; + func_800233CC(q, 0xD0); + *q = 0xFFFFFF; + a0->unk_002 = 1; + D_801DFD50 = 0; + D_801DDB28 = (s32)a0; + a0->unk_10A = 0xFF; + func_80016450(0xFF, 0); + a0->unk_100 = 2; +} + +--- func_80144A98 (src/shared/ov/func_80144A98.h:6) shares 3: func_8001C214 func_8012C1B8 func_8012CAE4 --- +void func_80144A98(u8 *a0) { + s32 v0; + v0 = ((s32 (*)(void))func_8012C1B8)(); + *(s32 *)(a0 + 0x20) = v0; + if (v0 == 0) { + func_8012CAE4(a0); + } else { + func_8001C214(v0, 0); + *(s16 *)(a0 + 0x2) = 1; + } +} + +--- func_801320D8 (src/ov_SC06_029/ov_SC06_029_jr_8012ACE0.c:1915) shares 3: func_8001C214 func_8012C1B8 func_8012CAE4 --- +void func_801320D8(int param_1) +{ + int v0; + + v0 = ((int (*)(void))func_8012C1B8)(); + *(int *)(param_1 + 0x20) = v0; + if (v0 == 0) { + ((void (*)(int))func_8012CAE4)(param_1); + } else { + func_8001C214(v0, 0); + *(int *)(param_1 + 0x58) = (int)&D_8018CA98; + *(short *)(param_1 + 0x5c) = 0x80; + *(unsigned short *)(param_1 + 2) += 1; + } +} + +--- func_801321B0 (src/ov_SC06_029/ov_SC06_029_jr_8012ACE0.c:1962) shares 3: func_8001C214 func_8012C1B8 func_8012CAE4 --- +void func_801321B0(int param_1) +{ + int v0; + + v0 = ((int (*)(void))func_8012C1B8)(); + *(int *)(param_1 + 0x20) = v0; + if (v0 == 0) { + ((void (*)(int))func_8012CAE4)(param_1); + } else { + func_8001C214(v0, 0); + *(int *)(param_1 + 0x58) = (int)&D_8018CAB8; + *(short *)(param_1 + 0x5c) = 0x80; + *(unsigned short *)(param_1 + 2) += 1; + } +} + +--- func_8013221C (src/ov_SC06_029/ov_SC06_029_jr_8012ACE0.c:1988) shares 3: func_8001C214 func_8012C1B8 func_8012CAE4 --- +void func_8013221C(int param_1) +{ + int v0; + + v0 = ((int (*)(void))func_8012C1B8)(); + *(int *)(param_1 + 0x20) = v0; + if (v0 == 0) { + ((void (*)(int))func_8012CAE4)(param_1); + } else { + func_8001C214(v0, 0); + *(int *)(param_1 + 0x58) = (int)&D_8018CAC8; + *(short *)(param_1 + 0x5c) = 0x80; + *(unsigned short *)(param_1 + 2) += 1; + } +} + +--- func_80132144 (src/ov_SC06_029/ov_SC06_029_jr_8012ACE0.c:1933) shares 3: func_8001C214 func_8012C1B8 func_8012CAE4 --- +s32 func_80132144(s32 param_1) +{ + extern int D_8018CAA8; + + int v0; + + v0 = ((int (*)(void))func_8012C1B8)(); + *(int *)(((int)param_1) + 0x20) = v0; + if (v0 == 0) { + ((void (*)(int))func_8012CAE4)(((int)param_1)); + } else { + ((void(*)(int, int))func_8001C214)(v0, 0); + *(int *)(((int)param_1) + 0x58) = (int)&D_8018CAA8; + *(short *)(((int)param_1) + 0x5c) = 0x80; + *(unsigned short *)(((int)param_1) + 2) += 1; + } +} + diff --git a/.run/P36/agents/ov_SC06_029__func_80185D44/residual.txt b/.run/P36/agents/ov_SC06_029__func_80185D44/residual.txt new file mode 100644 index 000000000..2876e2ef3 --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80185D44/residual.txt @@ -0,0 +1,5 @@ +src/ov_SC06_029/ov_SC06_029_jr_8017C954.c:func_80185D44: score 2 (ORDER; mine 47 ins, target 47) — not yet + insert mine[15:15] target[15:16] + 15 -- | lui a1,0x7fff + delete mine[20:21] target[21:21] + 20 lui a1,0x7fff | -- diff --git a/.run/P36/agents/ov_SC06_029__func_80185D44/sites.txt b/.run/P36/agents/ov_SC06_029__func_80185D44/sites.txt new file mode 100644 index 000000000..50310cffe --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80185D44/sites.txt @@ -0,0 +1 @@ +NEEDED launder line 9122 diff --git a/.run/P36/agents/ov_SC06_029__func_80185D44/tu.txt b/.run/P36/agents/ov_SC06_029__func_80185D44/tu.txt new file mode 100644 index 000000000..6c622535d --- /dev/null +++ b/.run/P36/agents/ov_SC06_029__func_80185D44/tu.txt @@ -0,0 +1,2 @@ +src/ov_SC06_029/ov_SC06_029_jr_8017C954.c +func_80185D44 diff --git a/.run/P36/census/lever_census.json b/.run/P36/census/lever_census.json index 8feecf192..daf7db3e5 100644 --- a/.run/P36/census/lever_census.json +++ b/.run/P36/census/lever_census.json @@ -3,22 +3,22 @@ "gte_header": "include/gte_inline.h", "gte_header_sites": 0, "gte_mnemonics": { - "gte_SetRotMatrix": 251, + "gte_SetRotMatrix": 252, "gte_SetTransMatrix": 231, "gte_avsz4": 56, "gte_dpcl": 134, - "gte_ldclmv": 72, + "gte_ldclmv": 75, "gte_ldrgb": 30, "gte_ldv0": 758, "gte_ldv3": 177, "gte_ldv3c": 184, "gte_nccs": 25, "gte_nclip": 108, - "gte_rtir": 75, + "gte_rtir": 78, "gte_rtps": 439, "gte_rtpt": 352, "gte_rtv0tr": 228, - "gte_stclmv": 108, + "gte_stclmv": 111, "gte_stflg": 415, "gte_stlvnl": 593, "gte_stopz": 108, @@ -53,17 +53,17 @@ }, "kinds": { "asm-body/direct": 13, - "barrier/direct": 326, + "barrier/direct": 318, "barrier/via-macro": 2, "gte-lever/direct": 357, "gte-lever/via-macro": 94, "gte-unsigned/direct": 270, - "gte/direct": 199, - "gte/via-macro": 6138, + "gte/direct": 198, + "gte/via-macro": 6148, "instruction/direct": 207, "instruction/via-macro": 22, "keepalive/direct": 340, - "launder/direct": 653, + "launder/direct": 652, "launder/via-macro": 42, "verbatim-body/direct": 2682 } @@ -72,7 +72,7 @@ "cfake_markers": { "count": 44, "sample": [ - "src/800.c:12732", + "src/800.c:12654", "src/md_SC07_003/md_SC07_003.c:3577", "src/md_SC07_004/md_SC07_004.c:280", "src/ov_SC01_000/ov_SC01_000_jr_8017BEBC.c:3570", @@ -90,13 +90,13 @@ "src/ov_SC03_118/ov_SC03_118_jr_8017FB84.c:3796", "src/ov_SC03_118/ov_SC03_118_jr_8017FB84.c:4112", "src/ov_SC03_121/ov_SC03_121_jr_8017E1D0.c:4568", - "src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:6575", + "src/ov_SC03_124/ov_SC03_124_jr_8017AE2C.c:6576", "src/ov_SC03_124/ov_SC03_124_jr_80188544.c:4422", "src/ov_SC04_002/ov_SC04_002_jr_8017BEBC.c:10069", "src/ov_SC04_005/ov_SC04_005_jr_8017BEBC.c:9323", "src/ov_SC04_007/ov_SC04_007_jr_8017BEBC.c:6630", - "src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:7487", - "src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:10291", + "src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:7484", + "src/ov_SC04_011/ov_SC04_011_jr_8017D494.c:10288", "src/ov_SC05_001/ov_SC05_001_jr_8017BEBC.c:5814", "src/ov_SC05_003/ov_SC05_003_jr_8017BEBC.c:4815", "src/ov_SC05_005/ov_SC05_005_jr_8017D898.c:4026", @@ -111,43 +111,43 @@ "src/ov_SC06_022/ov_SC06_022_jr_80184A28.c:3757", "src/ov_SC06_024/ov_SC06_024_jr_80186F00.c:3771", "src/ov_SC06_024/ov_SC06_024_jr_80186F00.c:5414", - "src/ov_SC06_029/ov_SC06_029_jr_8017C954.c:6669" + "src/ov_SC06_029/ov_SC06_029_jr_8017C954.c:6666" ] }, "classes": { "A": { - "bodies": 1473, - "distinct_bodies": 637, + "bodies": 1458, + "distinct_bodies": 622, "file_scope": 0, - "in_bodies": 2365, + "in_bodies": 2343, "kinds": { - "pin": 2365 + "pin": 2343 }, - "marked": 2365, - "sites": 2365, - "tus": 1083, + "marked": 2343, + "sites": 2343, + "tus": 1082, "unmarked": 0 }, "B": { - "bodies": 4705, - "distinct_bodies": 764, + "bodies": 4702, + "distinct_bodies": 761, "file_scope": 13, "in_bodies": 11332, "kinds": { "asm-body": 13, - "barrier": 328, - "gte": 6337, + "barrier": 320, + "gte": 6346, "gte-lever": 451, "gte-unsigned": 270, "instruction": 229, "keepalive": 340, - "launder": 695, + "launder": 694, "verbatim-body": 2682 }, - "marked": 2545, + "marked": 2532, "sites": 11345, "tus": 1428, - "unmarked": 8800 + "unmarked": 8813 }, "C": { "bodies": 495, @@ -251,9 +251,9 @@ "coverage": { "asm": { "comment_dead": 6782, - "live": 15362, + "live": 15330, "macro_block": 194, - "raw": 22338 + "raw": 22306 }, "attribute": { "comment_dead": 0, @@ -269,19 +269,19 @@ }, "register": { "comment_dead": 8575, - "live": 2415, + "live": 2393, "macro_block": 18, - "raw": 11008 + "raw": 10986 }, "volatile": { - "comment_dead": 2606, - "live": 1690, + "comment_dead": 2605, + "live": 1685, "macro_block": 82, - "raw": 4378 + "raw": 4372 } }, "coverage_ok": true, - "elapsed_s": 25.4, + "elapsed_s": 24.5, "generated": "2026-09-11", "gte_levers": { "direct": 357, @@ -292,15 +292,15 @@ "via_macro": 94, "what": "GTE ops whose clobbers exceed the canonical macro's (a scheduling steer): class-B levers INSIDE the headline number since T5 (2026-09-09), marked, 0 at the close" }, - "head": "bd6fc3c5c", + "head": "03b8ee400", "headers": 3181, "levers_AB": { - "asm": 2056, - "bodies": 2173, - "distinct_bodies": 859, - "marked": 4421, - "pins": 2365, - "sites": 4421, + "asm": 2047, + "bodies": 2151, + "distinct_bodies": 837, + "marked": 4390, + "pins": 2343, + "sites": 4390, "unmarked": 0, "what": "register pins + asm statements excluding GTE ops: the classes the phase drives to 0" }, @@ -369,11 +369,6 @@ 2, 1 ], - [ - "COPY_TO_FAAC", - 1, - 1 - ], [ "gte_rt", 1, @@ -389,6 +384,11 @@ 1, 1 ], + [ + "COPY_TO_FAAC", + 1, + 1 + ], [ "LAUNDER_8018A180", 1, @@ -434,7 +434,7 @@ }, "pins": { "bare_name": 15, - "init": 220, + "init": 214, "registers": { "$0": 64, "$10": 10, @@ -447,16 +447,16 @@ "$17": 40, "$18": 31, "$19": 21, - "$2": 814, + "$2": 803, "$20": 7, - "$21": 6, + "$21": 5, "$22": 3, "$23": 6, "$25": 1, "$29": 13, - "$3": 188, + "$3": 184, "$4": 504, - "$5": 386, + "$5": 380, "$6": 62, "$7": 26, "$8": 24, @@ -467,29 +467,29 @@ "v0": 2, "v1": 3 }, - "sites": 2365, + "sites": 2343, "sp": 13, "spelling": { - "__asm__": 2335, - "asm": 30 + "__asm__": 2314, + "asm": 29 }, "volatile_qualified": 0, "zero": 64 }, - "src_stamp": "9e41fd0c13185e75", + "src_stamp": "d7b619281fe55523", "tus": 4121, "unclassified": 0, "union_AD": { - "bodies": 5926, + "bodies": 5910, "by_kind": { - "main": 157, + "main": 151, "md": 117, - "ov": 5481, + "ov": 5471, "resident": 10, "shared": 161 }, "copies_in_multi": 4865, - "distinct_bodies": 1179, + "distinct_bodies": 1163, "multi_copy_classes": 118 }, "verbatim_excluded": { diff --git a/.run/P36/census/lever_census.txt b/.run/P36/census/lever_census.txt index 1a9be86b2..1be1ec60c 100644 --- a/.run/P36/census/lever_census.txt +++ b/.run/P36/census/lever_census.txt @@ -1,32 +1,32 @@ lever_census: 218 binaries · 4,121 TUs + 3,181 headers · coverage OK · unclassified 0 · verbatim excluded 13 fn / 14 sites (manifest 13) - coverage asm raw 22338 = live 15362 + macro-block 194 + comment/dead 6782 - coverage register raw 11008 = live 2415 + macro-block 18 + comment/dead 8575 - coverage volatile raw 4378 = live 1690 + macro-block 82 + comment/dead 2606 + coverage asm raw 22306 = live 15330 + macro-block 194 + comment/dead 6782 + coverage register raw 10986 = live 2393 + macro-block 18 + comment/dead 8575 + coverage volatile raw 4372 = live 1685 + macro-block 82 + comment/dead 2605 coverage builtin raw 599 = live 445 + macro-block 0 + comment/dead 154 coverage attribute raw 76 = live 76 + macro-block 0 + comment/dead 0 class sites in-bodies file-scope bodies distinct TUs marked unmarked kinds - A pins 2365 2365 0 1473 637 1083 2365 0 {'pin': 2365} - B asm 11345 11332 13 4705 764 1428 2545 8800 {'launder': 695, 'barrier': 328, 'gte': 6337, 'instruction': 229, 'gte-lever': 451, 'gte-unsigned': 270, 'asm-body': 13, 'keepalive': 340, 'verbatim-body': 2682} - C volatile 1589 1437 152 495 94 609 14 1575 {'cast': 1377, 'decl-body': 58, 'decl-file': 152, 'param': 2} + A pins 2343 2343 0 1458 622 1082 2343 0 {'pin': 2343} + B asm 11345 11332 13 4702 761 1428 2532 8813 {'gte': 6346, 'gte-lever': 451, 'barrier': 320, 'gte-unsigned': 270, 'launder': 694, 'instruction': 229, 'asm-body': 13, 'keepalive': 340, 'verbatim-body': 2682} + C volatile 1589 1437 152 495 94 609 14 1575 {'decl-body': 58, 'decl-file': 152, 'cast': 1377, 'param': 2} D register 50 50 0 47 47 6 0 50 {'register': 50} E asm-label 7788 1364 6424 1096 157 2090 0 7788 {'asm-label': 7788} F builtin 445 445 0 428 27 302 0 445 {'builtin': 445} G attribute 76 1 75 1 1 40 0 76 {'attribute': 76} - UNION A–D: 5,926 bodies · 1,179 distinct (addresses normalized) · 118 multi-copy classes holding 4,865 bodies · by kind {'ov': 5481, 'main': 157, 'md': 117, 'shared': 161, 'resident': 10} - THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 4,421 sites in 2,173 bodies (859 distinct) · marked !FAKE 4,421 · UNMARKED 0 + UNION A–D: 5,910 bodies · 1,163 distinct (addresses normalized) · 118 multi-copy classes holding 4,865 bodies · by kind {'ov': 5471, 'main': 151, 'md': 117, 'shared': 161, 'resident': 10} + THE PHASE'S NUMBER (pins + asm statements, GTE excluded): 4,390 sites in 2,151 bodies (837 distinct) · marked !FAKE 4,390 · UNMARKED 0 orphan !FAKE markers (no pin/asm site on the line nor below): 0 marked ordinary-C fakes kept by Drew's S104 ruling (a) (`do { } while (0)`, dead initialisers; NOT levers): 44 GTE levers (clobbers beyond the canonical macro's): 451 sites (94 via a variant macro, 357 direct) · marked 451 · UNMARKED 0 · unsigned GTE statements 270 - per-TU asm macro definitions outside the GTE header: 314 {'barrier': 1, 'instruction': 9, 'gte': 150, 'launder': 154} (GTE variants 64) - pins: 2,365 · $0 64 · $sp 13 · with initializer 220 · volatile-qualified 0 · bare-name 15 · spellings {'__asm__': 2335, 'asm': 30} + per-TU asm macro definitions outside the GTE header: 314 {'gte': 150, 'launder': 154, 'instruction': 9, 'barrier': 1} (GTE variants 64) + pins: 2,343 · $0 64 · $sp 13 · with initializer 214 · volatile-qualified 0 · bare-name 15 · spellings {'__asm__': 2314, 'asm': 29} whole-body asm routines in C shells, manifest PERMANENT (hand asm, NOT levers): 22 routines · 2,682 sites (2,660 private copies + 22 shared headers); asm-bodies NOT permanent (levers): 13 site(s) ['func_8001E378:DECOMPILE-NOW', 'func_80020F34:DECOMPILE-NOW', 'func_800249F0:DECOMPILE-NOW', 'func_80025CBC:DECOMPILE-NOW', 'func_80026514:UNCERTAIN', 'func_800268D0:UNCERTAIN', 'func_80027058:DECOMPILE-NOW', 'func_80027200:DECOMPILE-NOW', 'func_800CBA44:DECOMPILE-NOW', 'func_8017D810:DECOMPILE-NOW', 'func_8017E26C:UNCERTAIN', 'func_80184440:DECOMPILE-NOW', 'func_801A3BCC:DECOMPILE-NOW'] - asm kinds: {'asm-body/direct': 13, 'barrier/direct': 326, 'barrier/via-macro': 2, 'gte/direct': 199, 'gte/via-macro': 6138, 'gte-lever/direct': 357, 'gte-lever/via-macro': 94, 'gte-unsigned/direct': 270, 'instruction/direct': 207, 'instruction/via-macro': 22, 'keepalive/direct': 340, 'launder/direct': 653, 'launder/via-macro': 42, 'verbatim-body/direct': 2682} - instruction mnemonics: {'la': 139, 'addu': 23, 'RTP_SND': 22, 'addiu': 22, '.section': 7, 'lui': 4, 'lh': 3, 'and': 2, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1} - gte mnemonics: {'gte_ldv0': 758, 'gte_stlvnl': 593, 'gte_stsxy': 448, 'gte_rtps': 439, 'gte_stflg': 415, 'gte_rtpt': 352, 'gte_SetRotMatrix': 251, 'gte_stsxy3': 236, 'gte_SetTransMatrix': 231, 'gte_rtv0tr': 228, 'gte_ldv3c': 184, 'gte_ldv3': 177, 'gte_stsv': 161, 'lwc2': 158, 'gte_stsz4': 149, 'gte_stsz3': 147, 'gte_stszotz': 134, 'gte_dpcl': 134, 'gte_stsxy3_f3': 111, 'gte_nclip': 108, 'gte_stopz': 108, 'gte_stsxy3c': 108, 'gte_stclmv': 108, 'gte_stsxy3_ft3': 79, 'gte_rtir': 75, 'gte_ldclmv': 72, 'gte_avsz4': 56, 'gte_stotz': 52, 'gte_ldrgb': 30, 'gte_nccs': 25} - asm-bearing macro definitions: 314 (20 names, 3 with >1 text) kinds {'barrier': 1, 'instruction': 9, 'gte': 150, 'launder': 154} + asm kinds: {'asm-body/direct': 13, 'barrier/direct': 318, 'barrier/via-macro': 2, 'gte/direct': 198, 'gte/via-macro': 6148, 'gte-lever/direct': 357, 'gte-lever/via-macro': 94, 'gte-unsigned/direct': 270, 'instruction/direct': 207, 'instruction/via-macro': 22, 'keepalive/direct': 340, 'launder/direct': 652, 'launder/via-macro': 42, 'verbatim-body/direct': 2682} + instruction mnemonics: {'la': 139, 'addu': 23, 'addiu': 22, 'RTP_SND': 22, '.section': 7, 'lui': 4, 'lh': 3, 'and': 2, 'mult': 1, 'mfhi': 1, 'sll': 1, 'li': 1, 'lw': 1, 'nop': 1, 'srl': 1} + gte mnemonics: {'gte_ldv0': 758, 'gte_stlvnl': 593, 'gte_stsxy': 448, 'gte_rtps': 439, 'gte_stflg': 415, 'gte_rtpt': 352, 'gte_SetRotMatrix': 252, 'gte_stsxy3': 236, 'gte_SetTransMatrix': 231, 'gte_rtv0tr': 228, 'gte_ldv3c': 184, 'gte_ldv3': 177, 'gte_stsv': 161, 'lwc2': 158, 'gte_stsz4': 149, 'gte_stsz3': 147, 'gte_stszotz': 134, 'gte_dpcl': 134, 'gte_stclmv': 111, 'gte_stsxy3_f3': 111, 'gte_nclip': 108, 'gte_stopz': 108, 'gte_stsxy3c': 108, 'gte_stsxy3_ft3': 79, 'gte_rtir': 78, 'gte_ldclmv': 75, 'gte_avsz4': 56, 'gte_stotz': 52, 'gte_ldrgb': 30, 'gte_nccs': 25} + asm-bearing macro definitions: 314 (20 names, 3 with >1 text) kinds {'gte': 150, 'launder': 154, 'instruction': 9, 'barrier': 1} controls (R39): src/800.c func_800226C0 pins got 14 expected 45 N-A src/shared/ov/func_80178004.h pins got 8 expected 26 N-A ov_SC03_006 func_80184034 bare-name pins got 0 expected 3 N-A engine_prelude.h asm sites (a macro definition only) got 0 expected 0 OK - elapsed 25.4 s + elapsed 24.5 s diff --git a/.run/P36/delever/calibration.json b/.run/P36/delever/calibration.json index 8f2df2d2e..d1757d787 100644 --- a/.run/P36/delever/calibration.json +++ b/.run/P36/delever/calibration.json @@ -1,7 +1,7 @@ { - "head": "c4834ca81", + "head": "03b8ee400", "stamp": "15956e4a96c4", - "generated": "2026-09-11 02:41", + "generated": "2026-09-11 02:43", "aliases": [ "main", "ov_SC03_014", @@ -21,206 +21,206 @@ "main": { "objects": 85, "identical": 85, - "seconds": 6.444999999999999, - "mean_s": 0.076 + "seconds": 6.337999999999998, + "mean_s": 0.075 }, "ov_SC03_014": { "objects": 32, "identical": 32, - "seconds": 4.469999999999999, - "mean_s": 0.14 + "seconds": 4.382, + "mean_s": 0.137 }, "ov_SC03_015": { "objects": 32, "identical": 32, - "seconds": 4.205, - "mean_s": 0.131 + "seconds": 4.265, + "mean_s": 0.133 }, "ov_SC04_011": { "objects": 28, "identical": 28, - "seconds": 3.653000000000001, + "seconds": 3.6460000000000004, "mean_s": 0.13 } }, "per_object_seconds": { - "build/src/800.o": 0.711, - "build/src/800_b.o": 0.107, - "build/src/800_b_2.o": 0.286, - "build/src/800_b_o0a.o": 0.07, - "build/src/800_c.o": 0.177, - "build/src/800b2.o": 0.077, - "build/src/apicard1.o": 0.064, - "build/src/apicard2.o": 0.063, - "build/src/apicard3.o": 0.063, - "build/src/apicard4.o": 0.077, - "build/src/apicard5.o": 0.066, - "build/src/apicard6.o": 0.063, - "build/src/apicard7.o": 0.061, - "build/src/boot.o": 0.092, - "build/src/gap.o": 0.055, - "build/src/libapi1.o": 0.079, - "build/src/libapi2.o": 0.06, - "build/src/libc2_1.o": 0.063, - "build/src/libc2_2.o": 0.055, - "build/src/libcd1.o": 0.072, + "build/src/800.o": 0.69, + "build/src/800_b.o": 0.067, + "build/src/800_b_2.o": 0.281, + "build/src/800_b_o0a.o": 0.068, + "build/src/800_c.o": 0.175, + "build/src/800b2.o": 0.071, + "build/src/apicard1.o": 0.07, + "build/src/apicard2.o": 0.067, + "build/src/apicard3.o": 0.066, + "build/src/apicard4.o": 0.072, + "build/src/apicard5.o": 0.071, + "build/src/apicard6.o": 0.077, + "build/src/apicard7.o": 0.066, + "build/src/boot.o": 0.091, + "build/src/gap.o": 0.073, + "build/src/libapi1.o": 0.06, + "build/src/libapi2.o": 0.055, + "build/src/libc2_1.o": 0.057, + "build/src/libc2_2.o": 0.061, + "build/src/libcd1.o": 0.066, "build/src/libcd2.o": 0.062, - "build/src/libetc.o": 0.062, - "build/src/libgpu.o": 0.064, - "build/src/libgpu2.o": 0.065, - "build/src/libgs1.o": 0.064, - "build/src/libgs2.o": 0.045, - "build/src/libgs3.o": 0.062, - "build/src/libgs4.o": 0.059, - "build/src/libgs5.o": 0.064, - "build/src/libgs6.o": 0.081, - "build/src/libgs7.o": 0.067, - "build/src/libgs8.o": 0.062, - "build/src/libgte1.o": 0.064, - "build/src/libgte10.o": 0.056, - "build/src/libgte11.o": 0.053, - "build/src/libgte12.o": 0.058, - "build/src/libgte13.o": 0.063, - "build/src/libgte14.o": 0.057, - "build/src/libgte15.o": 0.061, - "build/src/libgte16.o": 0.069, - "build/src/libgte17.o": 0.049, - "build/src/libgte18.o": 0.064, - "build/src/libgte19.o": 0.061, - "build/src/libgte2.o": 0.062, - "build/src/libgte20.o": 0.058, - "build/src/libgte21.o": 0.057, - "build/src/libgte22.o": 0.066, - "build/src/libgte23.o": 0.06, - "build/src/libgte24.o": 0.063, - "build/src/libgte25.o": 0.061, - "build/src/libgte26.o": 0.059, - "build/src/libgte27.o": 0.06, - "build/src/libgte28.o": 0.068, - "build/src/libgte29.o": 0.054, - "build/src/libgte3.o": 0.057, - "build/src/libgte30.o": 0.064, + "build/src/libetc.o": 0.064, + "build/src/libgpu.o": 0.065, + "build/src/libgpu2.o": 0.071, + "build/src/libgs1.o": 0.061, + "build/src/libgs2.o": 0.062, + "build/src/libgs3.o": 0.061, + "build/src/libgs4.o": 0.063, + "build/src/libgs5.o": 0.059, + "build/src/libgs6.o": 0.069, + "build/src/libgs7.o": 0.057, + "build/src/libgs8.o": 0.058, + "build/src/libgte1.o": 0.062, + "build/src/libgte10.o": 0.052, + "build/src/libgte11.o": 0.061, + "build/src/libgte12.o": 0.062, + "build/src/libgte13.o": 0.056, + "build/src/libgte14.o": 0.067, + "build/src/libgte15.o": 0.07, + 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"build/src/ov_SC04_011/ov_SC04_011_jr_8017AE2C.o": 0.088, + "build/src/ov_SC04_011/ov_SC04_011_jr_8017D494.o": 0.412, + "build/src/ov_SC04_011/ov_SC04_011_o0b.o": 0.043, + "build/src/ov_SC04_011/ov_SC04_011_o0c.o": 0.047 }, "ok": true, "seconds": 2.1 diff --git a/.run/P36/delever/ledger.jsonl b/.run/P36/delever/ledger.jsonl index 805d0cb1f..4bd10f775 100644 --- a/.run/P36/delever/ledger.jsonl +++ b/.run/P36/delever/ledger.jsonl @@ -29455,3 +29455,5 @@ {"ts": "2026-09-11 02:41:35", "label": "s104_e15", "rung": "E", "calib": {"head": "26aea2813", "stamp": "15956e4a96c4"}, "tu": "src/800.c", "fn": "func_800166E8", "addr": 2147575528, "aliases": null, "header": false, "includers": 0, "nhash_before": "017de17b52075ae906815ec90105512df46b82ed", "nhash_after": "d2a3aeb6b6c551fc52a394e04a0461934e261622", "source": ".run/P36/agents/main__func_800166E8/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.427, "objects": ["build/src/800.o"], "before_text": "void func_800166E8(void *a0, s32 a1) {\n s32 local_buffer[2];\n register s32 v0 __asm__(\"$2\"); // !FAKE: pin $2 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 v1;\n\n __asm__ volatile(\"\"); // Barrier to force stack allocation first // !FAKE: barrier \u2014 NEEDED DIFFERS (P36 rung B tus9)\n\n if (a1 == 0)\n goto skip;\n\n v0 = a1 - 1;\n v1 = -1;\n\n do {\n *(u8 *)a0 = 0;\n v0--;\n a0 = (void *)((s32)a0 + 1);\n } while (v0 != v1);\n\nskip:\n return;\n}\n", "after_text": "void func_800166E8(void *a0, int a1) {\n u8 *p = a0;\n\n /* `int`, not the `s32` typedef: `a1-- != 0` is folded to `--a1 != -1` (fold-const.c:4399) only when the\n * decrement is not wrapped in a type conversion, and the s32 typedef variant gets one against the literal. */\n while (a1-- != 0) {\n *p++ = 0;\n }\n}\n"} {"ts": "2026-09-11 02:41:55", "label": "s104_e15", "rung": "E", "calib": {"head": "bd6c98069", "stamp": "15956e4a96c4"}, "tu": "src/800.c", "fn": "func_80015760", "addr": 2147571552, "aliases": null, "header": false, "includers": 0, "nhash_before": "daff8ee0cd4c8bb5a0e8c4ab5aab034ef0004882", "nhash_after": "02a9f27b4fd6fa4141a16d8611340fb927c8342c", "source": ".run/P36/agents/main__func_80015760/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.426, "objects": ["build/src/800.o"], "before_text": "void func_80015760(Obj_80015760 *obj, s32 *ot)\n{\n s32 x0;\nu32 tx;\n s32 y0;\n s32 flags;\n u32 value;\n u32 digits;\ns32 count;\n u8 digitCount;\n u8 width;\n u32 tagHi;\n u32 color;\n u32 yWord;\nregister u32 tagCode __asm__(\"$21\"); // !FAKE: pin $21 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n s32 *pkt;\n tx = obj->x;\n x0 = ((s32) tx) - (D_800AF7BC >> 1);\n flags = obj->flags;\n y0 = ((s32) obj->y) - (D_800AF7BE >> 1);\n value = (u32) obj->value;\n count = flags & 0xF;\n digitCount = count;\n if (count == 0)\n {\n digitCount = 8;\n }\n if (flags & 0x40)\n {\n digits = func_80015A74(value);\n }\n else\n {\n digits = value;\n }\n width = 8;\n if (flags & 0x80)\n {\n y0++;\n y0--;\n width = 0x10;\n }\n tagHi = width;\n if (tagHi == 8)\n {\n tagHi = 0x74000000;\n }\n else\n {\n tagHi = 0x7C000000;\n }\n tagCode = 0x03000000;\n pkt = (s32 *) D_800A5E60;\n if (digitCount != 0)\n {\n color = tagHi | 0x00808080;\n yWord = (u32) (y0 << 16);\n do\n {\n u32 xLow;\n u32 idx;\n s32 tile;\n u16 *uvPtr;\n u32 uvc;\nregister u32 mask __asm__(\"$3\"); // !FAKE: pin $3 \u2014 NEEDED DIFFERS (P36 rung B tus9)\n xLow = (u16) x0;\n x0 = width + x0;\n idx = (digits >> ((digitCount - 1) << 2)) & 0xF;\n tile = D_80062B78[idx];\n pkt[1] = (s32) color;\n digitCount--;\n pkt[2] = (s32) (xLow | yWord);\n uvPtr = func_80015908(tile, (u16) flags); /* the caller's original prototype took u16: the target masks (andi) before the call */\n uvc = 0x40560000;\n pkt[3] = (s32) ((*uvPtr) | uvc);\n mask = 0x00FFFFFF;\n pkt[0] = (s32) (((*ot) & mask) | tagCode);\n *ot = (s32) (((u32) pkt) & mask);\n pkt += 4;\n }\n while (digitCount != 0);\n }\n D_800A5E60 = (u8 *) pkt;\n}\n", "after_text": "void func_80015760(Obj_80015760 *obj, s32 *ot)\n{\n s32 x0;\n s16 y0;\n s32 flags;\n u32 value;\n u32 digits;\n s32 count;\n u8 digitCount;\n u8 width;\n u32 code;\n u32 len;\n u32 color;\n u32 yWord;\n s32 *pkt;\n\n x0 = obj->x - (D_800AF7BC >> 1);\n flags = obj->flags;\n y0 = obj->y - (D_800AF7BE >> 1);\n value = obj->value;\n count = flags & 0xF;\n digitCount = count;\n if (count == 0) {\n digitCount = 8;\n }\n if (flags & 0x40) {\n digits = func_80015A74(value);\n } else {\n digits = value;\n }\n width = 8;\n if (flags & 0x80) {\n width = 0x10;\n }\n if (width == 8) {\n code = 0x74000000;\n len = 0x03000000;\n } else {\n code = 0x7C000000;\n len = 0x03000000;\n }\n pkt = (s32 *)D_800A5E60;\n if (digitCount != 0) {\n color = code | 0x00808080;\n yWord = y0 << 16;\n do {\n u32 xLow;\n u32 idx;\n s32 tile;\n u16 *uv;\n u32 clut;\n u32 mask;\n u32 tag;\n\n xLow = (u16)x0;\n x0 = width + x0;\n idx = (digits >> ((digitCount - 1) << 2)) & 0xF;\n tile = D_80062B78[idx];\n pkt[1] = color;\n digitCount--;\n pkt[2] = xLow | yWord;\n uv = func_80015908(tile, (u16)flags);\n clut = 0x40560000;\n pkt[3] = *uv | clut;\n mask = 0x00FFFFFF;\n tag = *ot & mask;\n tag |= len;\n pkt[0] = tag;\n mask &= (u32)pkt;\n *ot = mask;\n pkt += 4;\n } while (digitCount != 0);\n }\n D_800A5E60 = (u8 *)pkt;\n}\n"} {"ts": "2026-09-11 02:42:15", "label": "s104_e15", "rung": "E", "calib": {"head": "c4834ca81", "stamp": "15956e4a96c4"}, "tu": "src/800.c", "fn": "func_80025818", "addr": 2147637272, "aliases": null, "header": false, "includers": 0, "nhash_before": "851cb5dae478368518db4fe519e331b0ca6f961f", "nhash_after": "172cdeeb17ba1aeccb99a2a5cb7d65a553b281af", "source": ".run/P36/agents/main__func_80025818/body.c", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.423, "objects": ["build/src/800.o"], "before_text": "PG3 *func_80025818(TPRIM_80025818 *prim, SVEC8_80025818 *vtx, SVEC8_80025818 *nrm, PG3 *poly,\n s32 n, s32 shift, u32 *ot)\n{\n s32 otz;\n s32 flag;\n u32 *otp;\n\n if (n != 0) {\n /* Zero-instruction launder of the `poly` biv's initial value.\n * Without it, loop.c's record_initial (loop.c:3454-3511) takes the biv's\n * initial value straight from the parameter copy `poly = $a3`, so the GIV\n * preheader init is emitted as `giv = (hard $a3) + 4`. That keeps hard\n * $a3 live to the preheader, which makes the `poly` pseudo CONFLICT with\n * $a3 (dump: `75 conflicts: ... 7`), so $a3 goes to the GIV and `poly`\n * needs an extra `move`. An asm_operands SET_SRC fails\n * valid_initial_value_p, so bl->initial_value stays the pseudo and $a3\n * stays free for `poly` -- byte-exact, 135 -> 134 instructions.\n * It MUST sit below the `n != 0` guard: above it the #APP/#NO_APP pair\n * blocks the `prim` parameter copy from hopping into the beqz delay slot\n * (cookbook RC-11). */\n __asm__ (\"\" : \"=r\"(poly) : \"0\"(poly)); // !FAKE: launder \u2014 NEEDED DIFFERS (P36 rung B tus9)\n do {\n gte_ldv3(&vtx[prim->v0], &vtx[prim->v1], &vtx[prim->v2]);\n gte_rtpt();\n gte_stflg(&flag);\n if ((flag & ~0x1000) == 0) {\n gte_nclip();\n gte_stopz(&otz);\n if (otz > 0) {\n gte_stsxy3_ft3(poly);\n gte_avsz3();\n gte_stotz(&otz);\n gte_ldv0(&nrm[prim->n0]);\n gte_ldrgb(&prim->rgb0);\n gte_nccs();\n gte_strgb(&poly->r0);\n gte_ldrgb(&prim->rgb1);\n gte_nccs();\n gte_strgb(&poly->r1);\n gte_ldrgb(&prim->rgb2);\n gte_nccs();\n gte_strgb(&poly->r2);\n poly->code = (poly->code & 2) | 0x30;\n otp = ot + (otz >> shift);\n *(u32 *)poly = (*otp & 0xFFFFFF) | 0x06000000;\n *otp = (u32)poly & 0xFFFFFF;\n poly++;\n if (D_800A2B78 != 0) {\n if (poly[-1].code & 2) {\n /* 2-word DR_MODE packet chained in front of the G3 */\n otp = ot + (otz >> shift);\n *((u8 *)poly + 3) = 1;\n *(u32 *)((u8 *)poly + 4) =\n 0xE100000A | ((D_800A2B78 & 3) << 5);\n *(u32 *)poly = (*otp & 0xFFFFFF) | 0x01000000;\n *otp = (u32)poly & 0xFFFFFF;\n poly = (PG3 *)((u8 *)poly + 8);\n }\n }\n }\n }\n n--;\n prim++;\n } while (n != 0);\n }\n return poly;\n}\n", "after_text": "PG3 *func_80025818(TPRIM_80025818 *prim, SVEC8_80025818 *vtx, SVEC8_80025818 *nrm, PG3 *poly,\n s32 n, s32 shift, u32 *ot)\n{\n s32 otz;\n s32 flag;\n u32 *otp;\n PG3 *p;\n\n p = poly;\n if (n != 0) {\n do {\n gte_ldv3(&vtx[prim->v0], &vtx[prim->v1], &vtx[prim->v2]);\n gte_rtpt();\n gte_stflg(&flag);\n if ((flag & ~0x1000) == 0) {\n gte_nclip();\n gte_stopz(&otz);\n if (otz > 0) {\n gte_stsxy3_ft3(p);\n gte_avsz3();\n gte_stotz(&otz);\n gte_ldv0(&nrm[prim->n0]);\n gte_ldrgb(&prim->rgb0);\n gte_nccs();\n gte_strgb(&p->r0);\n gte_ldrgb(&prim->rgb1);\n gte_nccs();\n gte_strgb(&p->r1);\n gte_ldrgb(&prim->rgb2);\n gte_nccs();\n gte_strgb(&p->r2);\n p->code = (p->code & 2) | 0x30;\n otp = ot + (otz >> shift);\n *(u32 *)p = (*otp & 0xFFFFFF) | 0x06000000;\n *otp = (u32)p & 0xFFFFFF;\n p++;\n if (D_800A2B78 != 0) {\n if (p[-1].code & 2) {\n /* 2-word DR_MODE packet chained in front of the G3 */\n otp = ot + (otz >> shift);\n *((u8 *)p + 3) = 1;\n *(u32 *)((u8 *)p + 4) =\n 0xE100000A | ((D_800A2B78 & 3) << 5);\n *(u32 *)p = (*otp & 0xFFFFFF) | 0x01000000;\n *otp = (u32)p & 0xFFFFFF;\n p = (PG3 *)((u8 *)p + 8);\n }\n }\n }\n }\n n--;\n prim++;\n } while (n != 0);\n }\n return p;\n}\n"} +{"ts": "2026-09-11 02:43:43", "label": "s104_r40r41", "rung": "E", "calib": {"head": "03b8ee400", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c", "fn": "func_8017E8A4", "addr": 2149050532, "aliases": null, "header": false, "includers": 0, "nhash_before": "7d0c8b6c71a962827363b73eae238d9f4be9a616", "nhash_after": "dd06d47076d5eb96d86a5ebe3dd74c3757ff5715", "source": "delever_regen R41 swap-arms @6", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.142, "objects": ["build/src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.o"], "before_text": "void func_8017E8A4(u16 *param_1)\n{\n s32 cVar1;\n\n if (1 < (u16)(*param_1 - 0x19)) {\n if (D_801270D4 < 0x1e) {\n __asm__ __volatile__(\"\" ::: \"$4\"); // !FAKE: barrier \u2014 NEEDED DIFFERS (P36 rung B tus7)\n if (((s32 (*)(u16 *))func_80172658)(param_1) == 0) {\n return;\n }\n *(u16 *)(*(s32 *)(param_1 + 0x10) + 0x12) = 0;\n ((void (*)(u16 *))func_80171B44)(param_1);\n cVar1 = *(u8 *)(param_1 + 0x10a) + 1;\n } else {\n cVar1 = 4;\n }\n *(s8 *)(param_1 + 0x10a) = cVar1;\n }\n}\n", "after_text": "void func_8017E8A4(u16 *param_1)\n{\n s32 cVar1;\n\n if (1 < (u16)(*param_1 - 0x19)) {\n if (D_801270D4 >= 0x1e) {\n cVar1 = 4;\n } else {\n if (((s32 (*)(u16 *))func_80172658)(param_1) == 0) {\n return;\n }\n *(u16 *)(*(s32 *)(param_1 + 0x10) + 0x12) = 0;\n ((void (*)(u16 *))func_80171B44)(param_1);\n cVar1 = *(u8 *)(param_1 + 0x10a) + 1;\n }\n *(s8 *)(param_1 + 0x10a) = cVar1;\n }\n}\n"} +{"ts": "2026-09-11 02:43:45", "label": "s104_r40r41", "rung": "E", "calib": {"head": "03b8ee400", "stamp": "15956e4a96c4"}, "tu": "src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c", "fn": "func_8017E044", "addr": 2149048388, "aliases": null, "header": false, "includers": 0, "nhash_before": "48c7d548024004e9a04eadb84c130e1d4fac0cee", "nhash_after": "9e14a3e77954ec14e877dac89ee93a549fffe1f1", "source": "delever_regen R41 swap-arms @37", "verdict": "LEVER-FREE", "sites": [], "compiles": 1, "seconds": 0.124, "objects": ["build/src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.o"], "before_text": "void func_8017E044(s32 param_1) {\n Blk8 sp10;\n s32 *g = &D_80126B58;\n s32 flag;\n s32 v;\n s32 x;\n\n sp10 = D_80126940;\n if (((s16 *)&sp10)[1] >= -0xBF) {\n ((s16 *)&sp10)[1] = -0xC0;\n }\n flag = 0;\n if (func_8017E524((s16 *)&sp10, (s16 *)&D_801889B8[0])) {\n func_8017E580(param_1, (short *)&sp10, (short *)&D_801889B8[0]);\n flag = 1;\n } else if (func_8017E524((s16 *)&sp10, (s16 *)&D_801889B8[8])) {\n func_8017E580(param_1, (short *)&sp10, (short *)&D_801889B8[8]);\n flag = 1;\n } else if (func_8017E524((s16 *)&sp10, (s16 *)&D_801889B8[0x10])) {\n func_8017E60C(param_1, (s32)&sp10, (s32)&D_801889B8[0x10]);\n flag = 1;\n } else if (func_8017E524((s16 *)&sp10, (s16 *)&D_801889B8[0x18])) {\n func_8017E60C(param_1, (s32)&sp10, (s32)&D_801889B8[0x18]);\n flag = 1;\n } else if (func_8017E524((s16 *)&sp10, (s16 *)&D_801889B8[0x20])) {\n func_8017E60C(param_1, (s32)&sp10, (s32)&D_801889B8[0x20]);\n flag = 1;\n } else if (func_8017E524((s16 *)&sp10, (s16 *)&D_801889B8[0x28])) {\n func_8017E60C(param_1, (s32)&sp10, (s32)&D_801889B8[0x28]);\n flag = 1;\n }\n if ((flag << 16) != 0) {\n v = func_80012DBC((s32)*(s16 *)(param_1 + 0x1A), (s32)*(s16 *)(param_1 + 0xA0), 4, 1);\n *(s16 *)(param_1 + 0x22) = v;\n *(s16 *)(param_1 + 0x1A) = v;\n } else {\n if (((s16 *)&sp10)[2] < 0x601) {\n if (func_8016F1AC() != 0) goto L250;\n if (func_80161A30((s32)g) != 0) goto L250;\n if (*(u16 *)g == 0x11) goto L250;\n if ((s16)func_80012A60((s32)*(s16 *)(g[8] + 0x12),\n (*(u16 *)(param_1 + 0x1A) + 0x800) & 0xFFF) < 0xE4) goto L250;\n x = *(u16 *)(g[8] + 0x12);\n } else {\n x = 0x800;\n }\n /* Zero-byte reorg fence: without it, gcc fills the then-arm's `j` with a stolen\n copy of the shared `sh` (+1 ins). A volatile asm at the join blocks the steal,\n the `j` becomes a jump-to-next and is deleted, leaving the load-delay nop the\n target has at .L8017E248 (byte-gate). */\n __asm__ __volatile__(\"\"); // !FAKE: barrier \u2014 NEEDED DIFFERS (P36 rung B tus7)\n *(s16 *)(param_1 + 0xA0) = x;\n L250:\n v = func_80012ABC((s32)*(s16 *)(param_1 + 0x1A), (s32)*(s16 *)(param_1 + 0xA0), 0x14);\n *(s16 *)(param_1 + 0x22) = v;\n *(s16 *)(param_1 + 0x1A) = v;\n }\n *(s16 *)&D_801274E8 = func_80012F74((s32)*(s16 *)&D_801274E8, (s32)((s16 *)&sp10)[0], 0xA, 1);\n D_801274EA = func_80012F74((s32)D_801274EA, (s32)((s16 *)&sp10)[1], 0xA, 1);\n D_801274EC = func_80012F74((s32)D_801274EC, (s32)((s16 *)&sp10)[2], 0xA, 1);\n func_8017E2FC(param_1, (s16 *)&D_801274E8);\n}\n", "after_text": "void func_8017E044(s32 param_1) {\n Blk8 sp10;\n s32 *g = &D_80126B58;\n s32 flag;\n s32 v;\n s32 x;\n\n sp10 = D_80126940;\n if (((s16 *)&sp10)[1] >= -0xBF) {\n ((s16 *)&sp10)[1] = -0xC0;\n }\n flag = 0;\n if (func_8017E524((s16 *)&sp10, (s16 *)&D_801889B8[0])) {\n func_8017E580(param_1, (short *)&sp10, (short *)&D_801889B8[0]);\n flag = 1;\n } else if (func_8017E524((s16 *)&sp10, (s16 *)&D_801889B8[8])) {\n func_8017E580(param_1, (short *)&sp10, (short *)&D_801889B8[8]);\n flag = 1;\n } else if (func_8017E524((s16 *)&sp10, (s16 *)&D_801889B8[0x10])) {\n func_8017E60C(param_1, (s32)&sp10, (s32)&D_801889B8[0x10]);\n flag = 1;\n } else if (func_8017E524((s16 *)&sp10, (s16 *)&D_801889B8[0x18])) {\n func_8017E60C(param_1, (s32)&sp10, (s32)&D_801889B8[0x18]);\n flag = 1;\n } else if (func_8017E524((s16 *)&sp10, (s16 *)&D_801889B8[0x20])) {\n func_8017E60C(param_1, (s32)&sp10, (s32)&D_801889B8[0x20]);\n flag = 1;\n } else if (func_8017E524((s16 *)&sp10, (s16 *)&D_801889B8[0x28])) {\n func_8017E60C(param_1, (s32)&sp10, (s32)&D_801889B8[0x28]);\n flag = 1;\n }\n if ((flag << 16) != 0) {\n v = func_80012DBC((s32)*(s16 *)(param_1 + 0x1A), (s32)*(s16 *)(param_1 + 0xA0), 4, 1);\n *(s16 *)(param_1 + 0x22) = v;\n *(s16 *)(param_1 + 0x1A) = v;\n } else {\n if (((s16 *)&sp10)[2] >= 0x601) {\n x = 0x800;\n } else {\n if (func_8016F1AC() != 0) goto L250;\n if (func_80161A30((s32)g) != 0) goto L250;\n if (*(u16 *)g == 0x11) goto L250;\n if ((s16)func_80012A60((s32)*(s16 *)(g[8] + 0x12),\n (*(u16 *)(param_1 + 0x1A) + 0x800) & 0xFFF) < 0xE4) goto L250;\n x = *(u16 *)(g[8] + 0x12);\n }\n /* Zero-byte reorg fence: without it, gcc fills the then-arm's `j` with a stolen\n copy of the shared `sh` (+1 ins). A volatile asm at the join blocks the steal,\n the `j` becomes a jump-to-next and is deleted, leaving the load-delay nop the\n target has at .L8017E248 (byte-gate). */\n *(s16 *)(param_1 + 0xA0) = x;\n L250:\n v = func_80012ABC((s32)*(s16 *)(param_1 + 0x1A), (s32)*(s16 *)(param_1 + 0xA0), 0x14);\n *(s16 *)(param_1 + 0x22) = v;\n *(s16 *)(param_1 + 0x1A) = v;\n }\n *(s16 *)&D_801274E8 = func_80012F74((s32)*(s16 *)&D_801274E8, (s32)((s16 *)&sp10)[0], 0xA, 1);\n D_801274EA = func_80012F74((s32)D_801274EA, (s32)((s16 *)&sp10)[1], 0xA, 1);\n D_801274EC = func_80012F74((s32)D_801274EC, (s32)((s16 *)&sp10)[2], 0xA, 1);\n func_8017E2FC(param_1, (s16 *)&D_801274E8);\n}\n"} diff --git a/src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c b/src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c index 3751eba91..1b00179eb 100644 --- a/src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c +++ b/src/ov_SC01_077/ov_SC01_077_jr_8017AE2C.c @@ -4730,16 +4730,15 @@ void func_8017E8A4(u16 *param_1) s32 cVar1; if (1 < (u16)(*param_1 - 0x19)) { - if (D_801270D4 < 0x1e) { - __asm__ __volatile__("" ::: "$4"); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7) + if (D_801270D4 >= 0x1e) { + cVar1 = 4; + } else { if (((s32 (*)(u16 *))func_80172658)(param_1) == 0) { return; } *(u16 *)(*(s32 *)(param_1 + 0x10) + 0x12) = 0; ((void (*)(u16 *))func_80171B44)(param_1); cVar1 = *(u8 *)(param_1 + 0x10a) + 1; - } else { - cVar1 = 4; } *(s8 *)(param_1 + 0x10a) = cVar1; } diff --git a/src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c b/src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c index 94328500b..c3a2579fc 100644 --- a/src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c +++ b/src/ov_SC03_092/ov_SC03_092_jr_8017AE2C.c @@ -4516,21 +4516,20 @@ void func_8017E044(s32 param_1) { *(s16 *)(param_1 + 0x22) = v; *(s16 *)(param_1 + 0x1A) = v; } else { - if (((s16 *)&sp10)[2] < 0x601) { + if (((s16 *)&sp10)[2] >= 0x601) { + x = 0x800; + } else { if (func_8016F1AC() != 0) goto L250; if (func_80161A30((s32)g) != 0) goto L250; if (*(u16 *)g == 0x11) goto L250; if ((s16)func_80012A60((s32)*(s16 *)(g[8] + 0x12), (*(u16 *)(param_1 + 0x1A) + 0x800) & 0xFFF) < 0xE4) goto L250; x = *(u16 *)(g[8] + 0x12); - } else { - x = 0x800; } /* Zero-byte reorg fence: without it, gcc fills the then-arm's `j` with a stolen copy of the shared `sh` (+1 ins). A volatile asm at the join blocks the steal, the `j` becomes a jump-to-next and is deleted, leaving the load-delay nop the target has at .L8017E248 (byte-gate). */ - __asm__ __volatile__(""); // !FAKE: barrier — NEEDED DIFFERS (P36 rung B tus7) *(s16 *)(param_1 + 0xA0) = x; L250: v = func_80012ABC((s32)*(s16 *)(param_1 + 0x1A), (s32)*(s16 *)(param_1 + 0xA0), 0x14);