From f930be4167eaa34370267b43cae8b12cbddbd3b8 Mon Sep 17 00:00:00 2001 From: Drew T <50529377+Druthulu@users.noreply.github.com> Date: Sun, 30 Aug 2026 21:54:28 -0600 Subject: [PATCH] =?UTF-8?q?feat(decomp):=20worker=20gate=20=E2=80=94=20+1?= =?UTF-8?q?=20fns=20x0=20propagated=20(fleet=2099.1%)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- config/overlays.mk | 4 +-- config/splat.ov_SC03_024.yaml | 5 ++- src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c | 44 ++++++++++++++++++++++- 3 files changed, 47 insertions(+), 6 deletions(-) diff --git a/config/overlays.mk b/config/overlays.mk index 8a8ebf677b..7a1a2cb9fd 100644 --- a/config/overlays.mk +++ b/config/overlays.mk @@ -1652,7 +1652,7 @@ ov_SC03_024_ELF := $(ov_SC03_024_OUT).elf ov_SC03_024_MAPFILE := $(ov_SC03_024_OUT).map ov_SC03_024_LD_SCRIPT := $(ov_SC03_024_OUT).ld ov_SC03_024_SPLAT_YAML := config/splat.ov_SC03_024.yaml -ov_SC03_024_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_024.o,ov_SC03_024_jr_8012ACE0.o,tail2.data.o,ov_SC03_024_jr_80135888.o,tail3.data.o,ov_SC03_024_jr_80135A4C.o,tail4.data.o,ov_SC03_024_jr_80135D20.o,tail5.data.o,ov_SC03_024_jr_801380E0.o,ov_SC03_024_o0c.o,tail6.data.o,ov_SC03_024_jr_8013F350.o,tail7.data.o,ov_SC03_024_jr_8013FFD8.o,tail8.data.o,ov_SC03_024_jr_80140608.o,tail9.data.o,ov_SC03_024_jr_8015444C.o,ov_SC03_024_jr_80154C24.o,ov_SC03_024_jr_801588CC.o,ov_SC03_024_jr_80159C84.o,tail10.data.o,ov_SC03_024_jr_8015A3C8.o,tail11.data.o,ov_SC03_024_jr_8015AE2C.o,tail12.data.o,ov_SC03_024_jr_8015C32C.o,tail13.data.o,ov_SC03_024_jr_8016AB6C.o,tail14.data.o,ov_SC03_024_jr_80171B4C.o,ov_SC03_024_jr_801734BC.o,tail15.data.o,ov_SC03_024_jr_801789AC.o,ov_SC03_024_jr_80178D40.o,tail16.data.o,ov_SC03_024_jr_8017A4AC.o,tail17.data.o,ov_SC03_024_jr_8017AE2C.o,tail18.data.o,ov_SC03_024_jr_8017DF84.o,tail19.data.o,ov_SC03_024_jr_80183BF8.o,tail20.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve +ov_SC03_024_JTBL_INTERLEAVE := --order tail.data.o,ov_SC03_024.o,ov_SC03_024_jr_8012ACE0.o,tail2.data.o,ov_SC03_024_jr_80135888.o,tail3.data.o,ov_SC03_024_jr_80135A4C.o,tail4.data.o,ov_SC03_024_jr_80135D20.o,tail5.data.o,ov_SC03_024_jr_801380E0.o,ov_SC03_024_o0c.o,tail6.data.o,ov_SC03_024_jr_8013F350.o,tail7.data.o,ov_SC03_024_jr_8013FFD8.o,tail8.data.o,ov_SC03_024_jr_80140608.o,tail9.data.o,ov_SC03_024_jr_8015444C.o,ov_SC03_024_jr_80154C24.o,ov_SC03_024_jr_801588CC.o,ov_SC03_024_jr_80159C84.o,tail10.data.o,ov_SC03_024_jr_8015A3C8.o,tail11.data.o,ov_SC03_024_jr_8015AE2C.o,tail12.data.o,ov_SC03_024_jr_8015C32C.o,tail13.data.o,ov_SC03_024_jr_8016AB6C.o,tail14.data.o,ov_SC03_024_jr_80171B4C.o,ov_SC03_024_jr_801734BC.o,tail15.data.o,ov_SC03_024_jr_801789AC.o,ov_SC03_024_jr_80178D40.o,tail16.data.o,ov_SC03_024_jr_8017A4AC.o,tail17.data.o,ov_SC03_024_jr_8017AE2C.o,ov_SC03_024_jr_8017DF84.o,tail18.data.o,ov_SC03_024_jr_80183BF8.o,tail19.data.o,trailing.o # Phase-26 §8 jtbl-rodata carve build/src/ov_SC03_024/ov_SC03_024.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14 build/src/ov_SC03_024/ov_SC03_024_jr_8012ACE0.o: JTBL_PADS := 0,0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0xcc,+0xe0 build/src/ov_SC03_024/ov_SC03_024_jr_80135D20.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x18 @@ -1665,8 +1665,8 @@ build/src/ov_SC03_024/ov_SC03_024_jr_80159C84.o: JTBL_PADS := 0,4 # §8e pads ( build/src/ov_SC03_024/ov_SC03_024_jr_8015AE2C.o: JTBL_PADS := 0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_024/ov_SC03_024_jr_8016AB6C.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x20 build/src/ov_SC03_024/ov_SC03_024_jr_80178D40.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x178 +build/src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.o: JTBL_PADS := 0,0,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14,+0x2c build/src/ov_SC03_024/ov_SC03_024_o0c.o: JTBL_PADS := 0,4,4,4 # §8e pads (jtbl_carve.py) tables=+0x0,+0x38,+0xa8,+0x118 -build/src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.o: JTBL_PADS := 0,0 # §8e pads (jtbl_carve.py) tables=+0x0,+0x14 (S62 T2b: retail tables back-to-back; the missing spec let the default .align 3 insert the +4 pad) ov_SC03_024_CHECK_SHA := config/check.ov_SC03_024.sha ov_SC03_024_SYMBOLS := config/symbols.ov_SC03_024.txt ov_SC03_024_SIG := .run/sig.ov_SC03_024.jsonl diff --git a/config/splat.ov_SC03_024.yaml b/config/splat.ov_SC03_024.yaml index 51063a88a5..6269f35cf5 100644 --- a/config/splat.ov_SC03_024.yaml +++ b/config/splat.ov_SC03_024.yaml @@ -163,11 +163,10 @@ segments: - [0x97b40, .rodata, ov_SC03_024_jr_8017A4AC] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - [0x97bcc, data, tail17] - [0x97bd0, .rodata, ov_SC03_024_jr_8017AE2C] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97bf8, data, tail18] - [0x97c10, .rodata, ov_SC03_024_jr_8017DF84] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97c30, data, tail19] + - [0x97c30, data, tail18] - [0x97ccc, .rodata, ov_SC03_024_jr_80183BF8] # Phase-26 §8 jtbl-rodata carve (jtbl_carve.py) - - [0x97d14, data, tail20] + - [0x97d14, data, tail19] - [0x996F4, bin, trailing] # final 3 bytes (EOF not 4-aligned; spimdisasm drops a partial word) - [0x996F7] # EOF marker = the 0.4.dec byte length # @TRAILING@ (above) is replaced by tools/new_overlay.sh: for a non-4-aligned overlay it becomes diff --git a/src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c b/src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c index fc93f10b43..cff0c4d593 100644 --- a/src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c +++ b/src/ov_SC03_024/ov_SC03_024_jr_8017AE2C.c @@ -4805,7 +4805,49 @@ void func_8017DE24(s32 *a0) { } -INCLUDE_ASM("asm/ov_SC03_024/nonmatchings/ov_SC03_024_jr_8017AE2C", func_8017DE8C); +extern void func_80147324(s32 a0); +extern void func_80147060(u8 *a0); +extern void func_80029124(s32 a0, s32 a1); +extern void func_80029514(s32 a0); +extern s32 func_80174650(s32 a0); +extern void func_80171A1C(u8 *a0); +extern s16 D_80126B3A; +extern s16 D_8011F9C8; + +void func_8017DE8C(u8 *a0) { + u16 flags = *(u16 *)(a0 + 0xB8); + + if (flags & 0x4000) { + func_80147324(0x445); + return; + } + if (!(flags & 0x8000)) { + return; + } + func_80147060(a0); + switch ((s16)(*(u16 *)&D_80126B3A - 2)) { + case 0: + func_80029124(0x16, 1); + func_80029514(0x85); + break; + case 1: + func_80029124(0x17, 1); + break; + case 2: + func_80029124(0x18, 1); + break; + case 3: + func_80029124(0x19, 1); + break; + case 4: + func_80029124(0x1A, 1); + break; + } + (*(s32 *)&D_8011F9C8) = 1; + func_80174650((s32)a0); + func_80171A1C(a0); +} + DEFINE_func_8017DF7C() /* dedup: shared engine-core @0x8017DF7C (src/shared) */