# Backlog — automation near-misses for hand-finishing

> Generated by `tools/backlog.py render` from `.run/backlog.jsonl`. These are functions the Phase-21 automation got **close** on but did NOT byte-match. The whole-binary byte-gate is the sole arbiter (G3/P9): **byte-matches bank and are NOT listed here** — only genuine near-misses/blockers are. Ranked by hand-session priority: **reach** (×N propagation leverage) → **closeness** (match_one mismatch count, lower = closer) → **size**. Each row's `best_draft` is the closest C the machine reached — resume from there.

**Open near-misses:** 15  ·  by status {'near': 14, 'failed': 1}  ·  by class {None: 6, 'REGALLOC-PERM': 2, 'SCHED': 4, 'REGALLOC': 1, 'ALIAS': 1, 'FRAME': 1}

| # | addr | reach | class | nins | status | closeness | where it stuck | best draft |
|--:|------|------:|-------|-----:|--------|----------:|----------------|------------|
| 1 | func_80032A74 | None |  | None | near | 1 | 422/422 instructions, frame 0x78 exact, every immediate/stack offset/branch target exact, all 27 symbols audited against the target's own relocation lines (law 1c). Sole residual is idx 244 `lh` vs `lhu`. I proved WHY it is a wall rather than re-grinding it: `extendhisi2` is a force_not_mem EXPAND, so an orphan (the 8 bytes the 0x78 frame needs at sp+0x48) can only be minted by a 3-way movhi+ashl+ | `/home/musashi/bfm-decomp/.run/S79w/opus/func_80032A74.c` |
| 2 | func_800CD674 | None | REGALLOC-PERM | 174 | near | 2 | $a3<->$t1 across two masked prim pointers (one shared local can be only one; splitting = +1 pseudo displacing two hoisted constants, 31); SPRT-with-tpage family, §364 mirror (non-struct field stores). Inert: pin order (8 perms), assignment placement (6), volatile index, p+=0x18 spellings, u8* cursor, every pin subset. NEXT: permuter_ils on the pinned seed (§494 recipe) | `.run/P32/t3/opus/func_800CD674.c` |
| 3 | func_80020DA4 | None |  | None | near | 2 | Q12 3x3 rotation-matrix build (twin shape of ov_SC02_011:func_8018B76C). Prior 51->20->14->8; NEW lever: an address-taken s32 frame_pad[3] local induces the target's phantom 16-byte frame -> 2. Residual: mflo destination $t0 vs target $a2 (REGALLOC-PERM); pinning regresses to 79. Handed to permuter_ils. | `.run/S79w/sonnet/func_80020DA4.c` |
| 4 | func_80039DEC | None |  | None | near | 2 | S80 permuter_ils best 2 (seed 9); 74/74 exact length match, OPCODE-MIXED. Key levers that moved the residual from the seed's 74-vs-72-length structural failure down to 9: (1) K&R old-style definition for a2 (s16 a2 in the identifier-declaration form) reproduces the target's in-place sll/sra-16 arg-register cast + its addu $a3,$a2,zero raw-preserve, which no ANSI (s16)-cast or s32-typed spelling ever produced; (2) forward-goto bloc | `/home/musashi/bfm-decomp/.run/S79w/sonnet/func_80039DEC.c` |
| 5 | func_8017DF28 | None |  | None | near | 2 | S80 permuter_ils 8x150s: waypoint '1' replaced the addiu $s2,$sp,0x10 with sw zero,48(sp) (semantically divergent, R14) -> closeness stays 2; 119/119; single SCHEDULE residual: addiu $s2,sp,0x10 sits in the jal's delay slot vs the target's bnez slot — expand_block_move's copy_addr_to_reg pseudo for mtx=D_800AE620 is cse-reused for both later &mtx args (gcc-2.7.2-map cse_expr.md [A23-2]/§H). Field-wise copy regresses to 117 (a real loop); the §H diamond cse-reset is a byte-identical no-op (no 2-predecessor merge to exploit). Fifth RTL-ve | `.run/S79w/sonnet/func_8017DF28.c` |
| 6 | func_800391D4 | None |  | None | near | 3 | 75/75 instructions (exact length), only residual is a 3-insn SCHEDULE-REORDER (off=0 vs arg1's sll/sra pair rotated) classified bucket=permuter. Cracked the 4-prior-attempt wall (best prior closeness 64, LENGTH-DRIFT+1) via register-pin i=$7 to kill combine_givs on D_80073140[i], a 2D-array decl D_80073140[][1] (cookbook SS164-26) to stop move_movables hoisting the address instead of folding it in | `/home/musashi/bfm-decomp/.run/S79w/sonnet/func_800391D4.c` |
| 7 | func_8001BC6C | None | REGALLOC-PERM | 69 | near | 6 | $v0<->$v1 swap across the six OT-chain insns: local-alloc qty_compare priority one span unit (base 2/2=1.0 > index 8/9=0.889); needs one fewer insn between the lhu and addu at sched1; color must stay pinned $5 (-18 without). 28->6 via P_TAG bitfield RMW + named inner term + emitted-order statements. NEXT: permuter_ils on the pinned seed (§494) | `.run/P32/t3/opus/func_8001BC6C.c` |
| 8 | func_800CD92C | None | SCHED | 247 | near | 15 | map §S7 prologue WEAVE: the {sw,lui,ori} groups for 0xE100008D/8F land after the 9-insn li block instead of before — the §17 pins reproduce the ALLOCATION but the hoist happens in sched2. Same SPRT family as func_800CD674 (§364 mirror levers applied) | `.run/P32/t3/opus/func_800CD92C.c` |
| 9 | func_80039308 | None | REGALLOC | 518 | near | 17 | sched2 + cross-block regalloc: preheader 49/50 swap, un-spellable addu $a2,$a0,$zero (every p=r form cse-propagated), a temp on $t0 vs $s7, and 11 insns of one alias fact (2nd D_80073140[j] load cannot schedule above the D_800C7D20 store from C; /s unlock costs the address allocation, net 20-24). 34->17 via s16 b4 widening copy + dead-local identity sweep (.run/P32/t3/restored/sweep_func_80039308.py) + $2 pin. permuter_ils --klass REGALLOC 2x150s: no gain | `.run/P32/t3/opus/func_80039308.c` |
| 10 | func_800CF3E8 | None | ALIAS | 469 | near | 27 | ONE cause: the pinned-base alias basin (§500-D1) in the p5/p6 tail; blocks 1-2 byte-exact (idx 0-361). 54->27 via blk2 constant birth order + birthing-boost local w60 + §194-A fence relocation. Inert: all 9 pins load-bearing (+5..+1409), asm position x7, h6 hoist 32x2, tag reshape, P_TAG ADDPRIM, array p6 stores, ~92k annealed variants. Untested: an unpinned alias of p6 for the tag load alone (ONE Opus second look allowed) | `.run/P32/t3/opus/func_800CF3E8.c` |
| 11 | func_80185810 | None | SCHED | 489 | near | 35 | [permuter] 4 emission windows (see report .run/P32/t3/reports/func_80185810__opus__*.md); exact length, rtu-clean | `.run/P32/t3/opus/func_80185810.c` |
| 12 | func_8017DC80 | None | FRAME | 346 | near | 46 | the historic -33 LENGTH wall CLOSED (GTE macros must be REAL macros — the TU house block; the splat Handwritten tag is wrong): 346/346, exact 0x70 frame + 9 callee-saved. Residual: reload-slot frame + the la $a0 slot; cse1 unifies OT index and n<4 across func_80010A08(8) (§500-D2 zero-byte asm retire) | `.run/P32/t3/opus/func_8017DC80.c` |
| 13 | func_800CF408 | None | SCHED | 178 | near | 49 | [permuter] 3 hunks: two prologue sched2 slots, an mlo/mhi allocno tie, a 3-insn block-2 head hoist. Two LENGTH-bearing pins found (tp $17 shared by 0xE1000087/97 = the 6th callee-saved; ob $10 fixes the $t1/$t2/$t3 rotation, 56->49). §351 family (func_8001212C -O0 / func_8017DD04 -O2 exemplars) | `.run/P32/t3/opus/func_800CF408.c` |
| 14 | func_800CF6D0 | None | SCHED | 249 | near | 137 | sched1 rank_for_schedule last-insn-CLASS tie (every store priority 2, equal refs; QImode stores grouped, loads floated, HImode after — 5 of 6 blocks) + $t1<->$t3 local-alloc swap of the two masks. 249/249 exact length only with tpage-before-len field order (19 swept). Inert at 137: pins on tpage constants/masks, asm re-ties, volatile/memory fences, /s-denial on any store subset, *0x4000 vs <<14, p++ vs p+0x18, / swap. decomp-permuter 122 was semantically wrong (R63) | `.run/P32/t3/opus/func_800CF6D0.c` |
| 15 | func_80062144 | None |  | None | failed |  | won't compile standalone (loose-typing / missing decl) |  |