# Backlog — automation near-misses for hand-finishing

> Generated by `tools/backlog.py render` from `.run/backlog.jsonl`. These are functions the Phase-21 automation got **close** on but did NOT byte-match. The whole-binary byte-gate is the sole arbiter (G3/P9): **byte-matches bank and are NOT listed here** — only genuine near-misses/blockers are. Ranked by hand-session priority: **reach** (×N propagation leverage) → **closeness** (match_one mismatch count, lower = closer) → **size**. Each row's `best_draft` is the closest C the machine reached — resume from there.

**Open near-misses:** 100  ·  by status {'near': 62, 'failed': 38}  ·  by class {'WAVE': 24, 'struct': 13, 'schedule': 22, 'plumbing': 12, 'regalloc-order': 22, 'remat': 2, 'other': 2, 'iv-combine': 3}

| # | addr | reach | class | nins | status | closeness | where it stuck | best draft |
|--:|------|------:|-------|-----:|--------|----------:|----------------|------------|
| 1 | func_80174684 | 134 | WAVE | 8 | near | 0 | match_one MATCH but gate rejected (declaration/TU plumbing) | `.run/backlog_drafts/func_80174684.c` |
| 2 | func_801733FC | 134 | struct | 25 | near | 0 | none — modeled on sibling func_80173460 (packed 8-byte struct copy + two s16=1 stores) | `.run/backlog_drafts/func_801733FC.c` |
| 3 | func_8014A51C | 134 | schedule | 32 | near | 0 | none — MATCH (32 ins, relocation-masked) | `.run/backlog_drafts/func_8014A51C.c` |
| 4 | func_80151664 | 134 | plumbing | 35 | near | 0 | none — MATCH (35 ins, relocation-masked); canonical externs kept, call-site casts only | `.run/backlog_drafts/func_80151664.c` |
| 5 | func_801522CC | 134 | plumbing | 41 | near | 0 | TBD — first compile; func_80153C18 canonical is (void) but target sets $a0=$s0 in its delay slot (call-site cast) | `.run/backlog_drafts/func_801522CC.c` |
| 6 | func_801497A8 | 134 | regalloc-order | 47 | near | 0 | none — MATCH. $s1 pinned to D_80078E78 base; result accumulator + masked | `.run/backlog_drafts/func_801497A8.c` |
| 7 | func_801483E8 | 134 | struct | 50 | near | 0 | none — MATCH | `.run/backlog_drafts/func_801483E8.c` |
| 8 | func_8015F380 | 134 | plumbing | 50 | near | 0 | none — expect MATCH (single call-crossing local pinned to $s0) | `.run/backlog_drafts/func_8015F380.c` |
| 9 | func_8016EFC8 | 134 | schedule | 51 | near | 0 | none — MATCH (51 ins). Temp `u32 v = *a0 / 0x4000000;` hoists the load to ins 0 and | `.run/backlog_drafts/func_8016EFC8.c` |
| 10 | func_80156ECC | 134 | plumbing | 55 | near | 0 | none — MATCH (clean reconstruction; 3 call-crossing structs in s1/s2/s4, lh/lhu pair) | `.run/backlog_drafts/func_80156ECC.c` |
| 11 | func_801758FC | 134 | schedule | 55 | near | 0 | none — MATCH (55 ins) | `.run/backlog_drafts/func_801758FC.c` |
| 12 | func_801759D8 | 134 | schedule | 56 | near | 0 | none — MATCH (56 ins) | `.run/backlog_drafts/func_801759D8.c` |
| 13 | func_80147E44 | 134 | regalloc-order | 67 | near | 0 | none -- MATCH (67 ins). $s1/$s0/$s3/$s2 pins ($17/$16/$19/$18) + 3-pointer reload | `.run/backlog_drafts/func_80147E44.c` |
| 14 | func_80164418 | 134 | struct | 70 | near | 0 | none — MATCH (s16 stack array forces the spill; 2nd ratan2 reuses /dy/ in $a1) | `.run/backlog_drafts/func_80164418.c` |
| 15 | func_80166054 | 134 | regalloc-order | 94 | near | 0 | none — MATCH (94 ins). Pins: param_1->$s2, angle->$s0, shift->$s1, r0->$s3, | `.run/backlog_drafts/func_80166054.c` |
| 16 | func_801463A0 | 134 | struct | 101 | near | 0 | none — MATCH (101 ins, match_one); real symbol names; misaligned 8B copy + s16 stores + masked B9C last | `.run/backlog_drafts/func_801463A0.c` |
| 17 | func_80167714 | 134 | regalloc-order | 104 | near | 0 | none — MATCH (104 ins) | `.run/backlog_drafts/func_80167714.c` |
| 18 | func_80169228 | 134 | regalloc-order | 105 | near | 0 | none — MATCH (105 ins, relocation-masked). Key levers: arg0/p pinned $s1/$s0, | `.run/backlog_drafts/func_80169228.c` |
| 19 | func_80174CB0 | 134 | regalloc-order | 123 | near | 0 | none — MATCH (match_one 123/123). Levers: (1) §21 one combined stack struct {s32 a[5]; ...} | `.run/backlog_drafts/func_80174CB0.c` |
| 20 | func_80171C64 | 134 | regalloc-order | 24 | near | 1 | unknown — first draft, param_1 must land in $s1 and (param_2 & 0xFF) in $s0 across the func_80171EC8 call | `.run/backlog_drafts/func_80171C64.c` |
| 21 | func_8016F0E4 | 134 | plumbing | 26 | near | 1 | none — MATCH (26 ins); natural C form, param_1 auto-allocated to $s0 | `.run/backlog_drafts/func_8016F0E4.c` |
| 22 | func_8014F3E8 | 134 | WAVE | 32 | near | 1 | WAVE: 1 mismatch | `.run/backlog_drafts/func_8014F3E8.c` |
| 23 | func_801775E0 | 134 | regalloc-order | 67 | near | 1 | 1 ins — target `sb $v0,0x6($s0)` vs mine `sb $v0,26($s1)` (same store P1+0x1a; gcc address-CSE picks $s1 base not the recomputed $s0); all else byte-identical | `.run/backlog_drafts/func_801775E0.c` |
| 24 | func_8014FFDC | 134 | struct | 93 | near | 1 | none — MATCH | `.run/backlog_drafts/func_8014FFDC.c` |
| 25 | func_80171FFC | 134 | regalloc-order | 40 | near | 3 | none — MATCH (40 ins). Key: func_8017248C takes (a0,a1); calling it with | `.run/backlog_drafts/func_80171FFC.c` |
| 26 | func_801466F0 | 134 | plumbing | 24 | near | 4 | none — MATCH (struct param-spill + branch-polarity) | `.run/backlog_drafts/func_801466F0.c` |
| 27 | func_80147364 | 134 | remat | 30 | near | 4 | none — MATCH (30 ins). Lever: hoist &D_80126B58 into a local ptr `u8 *p=&D_80126B58;` so gcc | `.run/backlog_drafts/func_80147364.c` |
| 28 | func_80140D68 | 134 | schedule | 65 | near | 5 | 5-ins near-miss — gcc hoists `lui 0xff00` (the 0xFF000000 mask) one slot too early in the first AddPrim block, so the D_800B9A02 index value lands in $v1 instead of $a1 and *param_1 is read late (idx 35-43). Structure + regs otherwise byte-exact (frame eliminated via struct-array D_800AE7BC, &D_800B9A02 held in $a2 via the pB $6 pin, param_1+8 grouping fixes the rest). Pure sched1 list-order residual -> permuter candidate (try reg-hint + reorder around the lui 0xff00 / lw 0($a0) pair). | `.run/backlog_drafts/func_80140D68.c` |
| 29 | func_80175820 | 134 | schedule | 55 | near | 6 | body byte-IDENTICAL; only residual is the phantom 0x10 leaf frame — target schedules `addiu $sp,-0x10` into the load-delay slot at insn 26 (after the D_8011F7C0 load) and `addiu $sp,0x10` before `jr ra`. With the frame forced (reserved local + anchor) gcc emits the prologue adjust at insn 0 instead of the delay slot (§5 frame-scheduling class); pins block the permuter, no C lever found to move it. Frameless form left here = body byte-exact, 2 frame insns short. | `.run/backlog_drafts/func_80175820.c` |
| 30 | func_8016130C | 134 | WAVE | 26 | near | 9 | WAVE: 9 mismatch | `.run/backlog_drafts/func_8016130C.c` |
| 31 | func_801495C4 | 134 | regalloc-order | 34 | near | 10 | 10-mismatch near-miss, ALL pure stack-slot offset immediates. Instruction sequence, opcodes, | `.run/backlog_drafts/func_801495C4.c` |
| 32 | func_80161374 | 134 | schedule | 41 | near | 10 | none — MATCH (41/41 relocation-masked) | `.run/backlog_drafts/func_80161374.c` |
| 33 | func_80163764 | 134 | regalloc-order | 42 | near | 10 | none — MATCH (42 ins). pins $s2/$s1/$s0/$s3 + u32 counter (sltiu) + init order s2,s3,i,p | `.run/backlog_drafts/func_80163764.c` |
| 34 | func_80149374 | 134 | remat | 23 | near | 11 | gcc -O2 CSEs &sp18 into freed callee-saved $s0 (1 addu + 2 move); target rematerializes addiu $sp,0x18 twice. Single-buffer straight-line address reused across 2 calls -> CSE wins; no clean C (cast/type/union/ptr-var/$8-pin) flips it; two-distinct-locals remats but grows frame +8 (gcc-2.7.2 won't coalesce slots back to 0x18). Frame/regs/params all match; only this 1 insn differs. | `.run/backlog_drafts/func_80149374.c` |
| 35 | func_80150528 | 134 | schedule | 53 | near | 12 | none — MATCH (53 ins). Modeled on banked sibling DEFINE_func_80163950 (same D_801202A0 stride-0x10C loop + func_80135A4C call); single-pointer for-loop reproduces gcc's two-IV (p, p+0x20) schedule exactly. NB: §20 had flagged this "unsteerable" pre-sibling-exemplar. | `.run/backlog_drafts/func_80150528.c` |
| 36 | func_80146AFC | 134 | schedule | 40 | near | 13 | none — MATCH | `.run/backlog_drafts/func_80146AFC.c` |
| 37 | func_8016BF50 | 134 | WAVE | 22 | near | 14 | WAVE: 14 mismatch | `.run/backlog_drafts/func_8016BF50.c` |
| 38 | func_80146A6C | 134 | WAVE | 18 | near | 17 | WAVE: 17 mismatch | `.run/backlog_drafts/func_80146A6C.c` |
| 39 | func_8016E778 | 134 | WAVE | 20 | near | 17 | WAVE: 17 mismatch | `.run/backlog_drafts/func_8016E778.c` |
| 40 | func_8015C030 | 134 | WAVE | 23 | near | 17 | WAVE: 17 mismatch | `.run/backlog_drafts/func_8015C030.c` |
| 41 | func_8014ADE0 | 134 | schedule | 139 | near | 19 | 16 ins off — all compiler-internal ties: (1) 0xAAA8 const lands $v0 vs target $v1; | `.run/backlog_drafts/func_8014ADE0.c` |
| 42 | func_8016191C | 134 | plumbing | 24 | near | 20 | none — MATCH (24 ins). early-return-per-arm: each arm sets $v0 directly + j-tail merges | `.run/backlog_drafts/func_8016191C.c` |
| 43 | func_8014FE60 | 134 | regalloc-order | 95 | near | 20 | none — MATCH (permuter closed the final bothzero-block regalloc/schedule residual: moving `a = in[2]` before the +0x7E read-modify-write flips the 0x7FFF constant into $v1 and computes return-0 in $v0) | `.run/backlog_drafts/func_8014FE60.c` |
| 44 | func_80172C50 | 134 | WAVE | 20 | near | 23 | WAVE: 23 mismatch | `.run/backlog_drafts/func_80172C50.c` |
| 45 | func_8017248C | 134 | WAVE | 24 | near | 23 | WAVE: 23 mismatch | `.run/backlog_drafts/func_8017248C.c` |
| 46 | func_8014E5B4 | 134 | regalloc-order | 59 | near | 23 | none — MATCH | `.run/backlog_drafts/func_8014E5B4.c` |
| 47 | func_80141B90 | 134 | struct | 29 | near | 24 | none — MATCH (29 ins); array-of-int %lo-fold + call + u16 if-block; volatile-double reserves the target's 8-byte frame slot | `.run/backlog_drafts/func_80141B90.c` |
| 48 | func_801719A4 | 134 | struct | 24 | near | 25 | none — MATCH (24 ins, relocation-masked) | `.run/backlog_drafts/func_801719A4.c` |
| 49 | func_8016706C | 134 | WAVE | 30 | near | 27 | WAVE: 27 mismatch | `.run/backlog_drafts/func_8016706C.c` |
| 50 | func_8014D2A0 | 134 | other | 80 | near | 27 | none — MATCH (80 ins, relocation-masked); loop-guard idiom per engine_core DEFINE_func_80164ACC | `.run/backlog_drafts/func_8014D2A0.c` |
| 51 | func_80177AD4 | 134 | iv-combine | 34 | near | 28 | cc1 combine_givs will NOT fold the halfword RMW (lhu;sh) into the byte-store biv. Target uses ONE IV at p+0x20 (byte at 0, halfword RMW at -2); our cc1 either (a) merges into ONE IV but bases it at the LOWEST offset = the halfword (+0x1e), so every load/store offset is shifted (0/2 vs -2/0) and byte-differs; or (b, this draft) keeps the byte biv at the correct +0x20 base but SPAWNS a 2nd IV (+0x1e) for the RMW halfword -> +1 addiu + schedule shift (28 mismatched, mostly the 2nd-IV addiu and a 1-row delay-slot schedule shift). Probe-confirmed: even with both fields as forward non-negative struct members, the halfword RMW never folds into the byte biv (a non-RMW byte/halfword pair DOES merge). Genuine gcc-2.7.2 giv-combination divergence, not source-typeable. Matches the Phase-20 §20 verdict (independently re-derived). STUB. | `.run/backlog_drafts/func_80177AD4.c` |
| 52 | func_801777BC | 134 | schedule | 59 | near | 29 | body byte-matches; residual ~3 ins = prologue instruction-scheduling (final `sll t8,16` / `lw param_7` / `addu t0,a0,0xC` ordering around the blez guard) + the loop-counter copy `addu t3,v0` — pure gcc sched/regalloc tie-break, permuter-blocked by the register __asm__ pins | `.run/backlog_drafts/func_801777BC.c` |
| 53 | func_80161888 | 134 | schedule | 37 | near | 30 | none — MATCH (proxy verified) | `.run/backlog_drafts/func_80161888.c` |
| 54 | func_80144B14 | 134 | schedule | 34 | near | 31 | none — MATCH (34 ins). Two stack structs (s16[3] each) passed by addr to | `.run/backlog_drafts/func_80144B14.c` |
| 55 | func_801778A8 | 134 | iv-combine | 38 | near | 38 | gcc spawns 2 IVs (byte giv @+0xc, halfword RMW giv @+0xa); target combines both into ONE IV at +0xc reaching the halfword at -2($a3). A struct collapses to 1 IV but anchors at the struct base (+0xa) not +0xc; raw byte+halfword RMW never combines. Same combine_givs-refuses-halfword-RMW wall as sibling func_80177AD4 (§20, stubbed). Floor 33-off; not source-steerable (combine runs pre-regalloc, pins/order don't move it). | `.run/backlog_drafts/func_801778A8.c` |
| 56 | func_80177EA4 | 134 | regalloc-order | 56 | near | 45 | structure/branch-polarity/block-order/IV all match (56=56 ins); residual is gcc loop-invariant HOISTING — move_movables threshold=62 vs my loop insn_count=46 hoists 5 constants (0x3000000,0x74808080,6,1) to prologue regs while the target re-materializes them INLINE each iteration (only the 0xFFFFFF mask is hoisted in both). To match, the loop-pass insn_count would need >=60 so threshold*1*1 < insn_count after the first hoist; clean C producing the identical final logic yields 46. Pins free regs (more hoisting), barriers/volatile/for-vs-do-while don't raise insn_count. ~45 masked-mismatches all cascade from the 5 hoisted-vs-inline constants + their register reassignment. | `.run/backlog_drafts/func_80177EA4.c` |
| 57 | func_80176144 | 134 | regalloc-order | 53 | near | 50 | none — MATCH | `.run/backlog_drafts/func_80176144.c` |
| 58 | func_8016163C | 134 | plumbing | 78 | near | 50 | none — MATCH (78 ins). First arm calls func_801599A4 with NO arg (asm nop delay slot) via fn-ptr cast ((void(*)(void))func_801599A4)(). | `.run/backlog_drafts/func_8016163C.c` |
| 59 | func_8014F2E0 | 134 | schedule | 66 | near | 51 | §10 IV-init placement (piVar3 setup not sunk past loop guard) + store-vs-load (D_801150D8=0 schedules between the two arg-loads) — both CONFIRMED-unsteerable per cookbook §20; 11-off | `.run/backlog_drafts/func_8014F2E0.c` |
| 60 | func_80161774 | 134 | plumbing | 69 | near | 53 | none — MATCH (69 ins, match_one verified; clean nested-if; param_1 -> $s0 call-crossing) | `.run/backlog_drafts/func_80161774.c` |
| 61 | func_80177940 | 134 | iv-combine | 101 | near | 65 | prologue+setup (35 ins) byte-match exactly; loop body diverges on gcc loop-invariant hoist ORDERING (scheduler tie-break), the conditional 0x74808080 recompute-vs-hoist, and the tail IV final-value double-move (addu s3,a0,zero; addu v0,s3,zero) + pd+=5 increment placement -- same loop-IV-combine class S20 flags as stub for sibling func_80177AD4. | `.run/backlog_drafts/func_80177940.c` |
| 62 | func_8014DD8C | 134 | WAVE | 108 | near | 83 | WAVE: 83 mismatch | `.run/backlog_drafts/func_8014DD8C.c` |
| 63 | func_801705C0 | 134 | WAVE | 14 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801705C0.c` |
| 64 | func_8016B91C | 134 | WAVE | 18 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8016B91C.c` |
| 65 | func_801718AC | 134 | WAVE | 22 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801718AC.c` |
| 66 | func_80168B70 | 134 | WAVE | 27 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80168B70.c` |
| 67 | func_801494CC | 134 | WAVE | 30 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801494CC.c` |
| 68 | func_801708B0 | 134 | WAVE | 30 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_801708B0.c` |
| 69 | func_80170CF0 | 134 | schedule | 30 | failed |  | 4-ins PROLOGUE-ORDER residual (body insns 4-29 byte-identical). My cc1 hoists the funcptr lui/lw ABOVE the frame setup (lui,lw,addiu sp,sw s0); target keeps frame setup first (addiu sp,sw s0,lui,lw). Same prologue-order class as func_80177F84 (cookbook L1332) — no C lever found (intermediate var/cast/void*-vs-funcptr/pin/early-ptr all reproduce the hoist; barriers/empty-asm/volatile-local regress). KEY WIN: `case 0: break;` forces emit_case_nodes' slti<2;bnez→default lower-bound prune, exactly matching the target dispatch tree (a bare 2-case switch omits it). | `.run/backlog_drafts/func_80170CF0.c` |
| 70 | func_80149450 | 134 | WAVE | 31 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80149450.c` |
| 71 | func_80149F2C | 134 | WAVE | 31 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80149F2C.c` |
| 72 | func_80152C80 | 134 | plumbing | 41 | failed |  | none — MATCH expected (linear call/store sequence, no regalloc tension) | `.run/backlog_drafts/func_80152C80.c` |
| 73 | func_8014C1C8 | 134 | regalloc-order | 44 | failed |  | none — MATCH (match_one 44/44 ins, relocation-masked) | `.run/backlog_drafts/func_8014C1C8.c` |
| 74 | func_80146750 | 134 | regalloc-order | 47 | failed |  | none — MATCH (match_one 47/47; psVar4->$a3 / psVar3->$v1 pins forced the init order) | `.run/backlog_drafts/func_80146750.c` |
| 75 | func_8014680C | 134 | struct | 47 | failed |  | none — MATCH (47 ins, relocation-masked) | `.run/backlog_drafts/func_8014680C.c` |
| 76 | func_8014C4AC | 134 | other | 47 | failed |  | none — MATCH (shared-ret0 goto §16 flips final branch polarity + schedules ret=0 into delay slot; memcpy(t0+0x7C,a3,8) inlines the lwl/lwr/swl/swr 8-byte block §21; param_1 = unsigned short* for the lhu reads) | `.run/backlog_drafts/func_8014C4AC.c` |
| 77 | func_80151B98 | 134 | regalloc-order | 47 | failed |  | none — MATCH | `.run/backlog_drafts/func_80151B98.c` |
| 78 | func_80147F78 | 134 | schedule | 48 | failed |  | TWO residuals remain. (1) FRAME: target frame is 0x60 = exactly 64 bytes (16 words) of LIVE local vars on top of the 4 saved regs (s0,s1,s2,ra) + 0x10 arg area; my body has no locals so frame is 0x20. Reproducing 64B of live local needs an address-escaped local buffer, but the target has only the 3 visible jals (no 4th call to receive &buf), so I cannot make a 16-word local survive -O2 dead-store-elim without emitting an extra instruction. (2) RELOAD SCHEDULE: target reloads D_80127090/94/98 from memory (folded lui%hi;lw%lo) with the FIRST reload HOISTED up between store90 and store94 (free non-volatile scheduling); a "memory" clobber barrier (below) forces the folded reloads but pins them strictly AFTER all three stores. The natural source is almost certainly a 16-word local buffer that ALIASES the globals (non-volatile reloads, freely scheduled) — same construct that also explains the 0x60 frame. Closest faithful body kept below; folded reload bytes are correct, frame + hoist are the gap. | `.run/backlog_drafts/func_80147F78.c` |
| 79 | func_80151C54 | 134 | plumbing | 52 | failed |  | none — MATCH (52 ins). Branch-polarity §3-T4: BD60 arm is fall-through (if !=1 && ==0x11), BC44 is else. | `.run/backlog_drafts/func_80151C54.c` |
| 80 | func_8017129C | 134 | struct | 58 | failed |  | none — MATCH (58 ins); three aligned 16-byte block-copies via struct assignment (cookbook §21) | `.run/backlog_drafts/func_8017129C.c` |
| 81 | func_80173A60 | 134 | regalloc-order | 59 | failed |  | none — MATCH (59 ins) | `.run/backlog_drafts/func_80173A60.c` |
| 82 | func_8014A738 | 134 | regalloc-order | 62 | failed |  | none — MATCH | `.run/backlog_drafts/func_8014A738.c` |
| 83 | func_80175308 | 134 | struct | 67 | failed |  | none — MATCH (67 ins, relocation-masked) | `.run/backlog_drafts/func_80175308.c` |
| 84 | func_8014D610 | 134 | plumbing | 74 | failed |  | none — MATCH (74 ins). for-loop + continue, single IV pointer p; gcc derives the $s0 = p+0x75 second induction var. Template: DEFINE_func_80163950 (sibling, same D_801202A0 loop + func_80135A4C). | `.run/backlog_drafts/func_8014D610.c` |
| 85 | func_80163534 | 134 | schedule | 76 | failed |  | mismatch=13, a single 1-position scheduling tie. Instrs 1-30 byte-perfect; all registers correct | `.run/backlog_drafts/func_80163534.c` |
| 86 | func_8014CF04 | 134 | struct | 82 | failed |  | none — MATCH (82 ins; array-of-struct scan, for-loop over Ent D_801202A0[96], stride 0x10C) | `.run/backlog_drafts/func_8014CF04.c` |
| 87 | func_80156670 | 134 | schedule | 83 | failed |  | none — MATCH (83 ins). Key: hoist `iVar1 = uVar3*4;` as its OWN statement before the if so gcc schedules `sll v1,s1,2` into the bnez delay slot (computed unconditionally) and reuses v1 index-first (`iVar1 + (s32)&D_801150E0` → `addu v0,v1,v0`). 13-arg call to func_80157158 (a0-a3 + 9 stack args at 0x10..0x30); param_2/param_3 cast (u16) → andi; param_6 incoming as lhu(u16). Address args = integer math `iVar2 + (s32)&D_x` (index-first → lui;addiu;addu, index added first). | `.run/backlog_drafts/func_80156670.c` |
| 88 | func_8014D4C0 | 134 | schedule | 84 | failed |  | none — MATCH (goto forces if-body out-of-line/last; `>=` fixes slt operand order) | `.run/backlog_drafts/func_8014D4C0.c` |
| 89 | func_8016A73C | 134 | struct | 85 | failed |  | none — MATCH (85 ins, relocation-masked) | `.run/backlog_drafts/func_8016A73C.c` |
| 90 | func_80173CB4 | 134 | schedule | 90 | failed |  | none — MATCH (switch form keeps cases unmerged; final block: reuse one temp for the D_8012750C test + the func_8013767C result -> $a0 alloc; invert if to !=0 for branch polarity + store order) | `.run/backlog_drafts/func_80173CB4.c` |
| 91 | func_8014C6F4 | 134 | regalloc-order | 91 | failed |  | 19-off loop tie-break — target compiles the search as a while/for (pre-guard sltu;beqz present) with the found pointer snapshotted to $v0 split from the IV in $a0 and the +4 sunk into both call-arg delay slots; do-while is instruction-count-exact (91=91) but lacks the pre-guard, while every for/while form costs +4 ins (merge stays in $a0). §10 schedule/regalloc residual. | `.run/backlog_drafts/func_8014C6F4.c` |
| 92 | func_8014D12C | 134 | schedule | 93 | failed |  | none — MATCH (93 ins). Block-order lever: success-continuation (return 1) | `.run/backlog_drafts/func_8014D12C.c` |
| 93 | func_801502EC | 134 | schedule | 93 | failed |  | none — MATCH (93 ins). 8-byte block copy via alignment-1 struct (Blk8{u8 b[8]}) assignment reproduces the lwl/lwr/swl/swr; ret=0 hoisted before the block copy to fix the s3-vs-ra prologue save order. | `.run/backlog_drafts/func_801502EC.c` |
| 94 | func_80150170 | 134 | struct | 95 | failed |  | none — MATCH (95/95). Keys: (1) two parallel 3-halfword groups via chained assign `sp10.x = sp18.x = v` (sp18 inner so 0x18 stores first); (2) align-1 blk8 struct copy for the lwl/lwr/swl/swr 8-byte copy into actor+0x80 (src = sp buf from func_801502EC, or u8[] D_801152A8); (3) f0/f2 = u16 (lhu), f1 = s16 (lh for the slt); (4) `(iVar5/iVar6)!=0` single-OR test + branch-polarity invert (not-both-zero is fall-through); (5) both-zero tail register pins: 0x7fff -> $v1 (`register s32 __asm__("$3")`), sp10.f0/f2 -> reused $a0 (`register u32 __asm__("$4")` written twice) to force gcc's hoist-load + reg reuse schedule. | `.run/backlog_drafts/func_80150170.c` |
| 95 | func_8014CD80 | 134 | regalloc-order | 97 | failed |  | none — MATCH (97 ins). iVar3 pinned to $v1 (register __asm__("$3")) so | `.run/backlog_drafts/func_8014CD80.c` |
| 96 | func_8014E284 | 134 | WAVE | 108 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8014E284.c` |
| 97 | func_80167540 | 134 | WAVE | 117 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80167540.c` |
| 98 | func_8014F4C0 | 134 | WAVE | 141 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8014F4C0.c` |
| 99 | func_8014E048 | 134 | WAVE | 143 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_8014E048.c` |
| 100 | func_80155800 | 134 | WAVE | 145 | failed |  | won't compile standalone (loose-typing / missing decl) | `.run/backlog_drafts/func_80155800.c` |