Drew T
8.3 KiB
§NNN — REFUTED: A CODE BLOCK SHARED BY TWO DIFFERENT SWITCH STATEMENTS IS ORDINARY FORWARD cross_jump, NOT A SHAPE C CANNOT REACH — §164-11 ALREADY BANKS IT FROM PLAIN NESTED SWITCHES (P31 S66 round3, func_8001B0D4; ⚠ UNPROVEN — gate-REFUSED draft, closeness 68→45, never MATCHed)
The claim. That func_8001B0D4's persistent ADDRESSING/j!=lui profile=cse residual at nins 86=86 comes from a cross-switch shared tail — the same physical block reached from two separate switch statements' jump tables — and that "ordinary case A: switch(t){…} case B: switch(t){…} nesting, however ordered, keeps each inner switch's codegen self-contained in gcc-2.7.2's normal (non-cross-switch) path." The observation is real and the ground truth is quoted correctly; the negative half is refuted, and the mechanism is already law.
What is true (and re-verified here). asm/data/6324C.data.s does hold the overlap: jtbl_80072B24 (outer) slot 4 = 0x8001B208 reappears as jtbl_80072B64 slots 0 and 8; 0x8001B1D8 is jtbl_80072B3C slot 1 and jtbl_80072B64 slots 1/2/4; 0x8001B218 is in both inner tables. All confirmed byte-for-byte.
REFUTATION 1 — §164-11 is exactly this, byte-proven and banked. §164-11's exemplar func_80183324 (ov_SC01_077, 324 ins, banked, src/ov_SC01_077/ov_SC01_077_jr_80183324.c:3115) spells the inner switch four separate times in outer cases 0/1/2/4 as ordinary nested switches; cc1 emits five tables and $L34/$L48/$L63 — three different inner switches — all point at one copy of the code living inside case 4's arm. That is a cross-switch shared body produced by plain nesting, whole-binary gated. §164-11 even states the prescription: k tables sharing entries ⇒ write the body out k times and let cross_jump merge; do NOT collapse them into one switch reached by goto.
REFUTATION 2 — the target's own bytes show a plain SUFFIX merge, and §162g predicts every survivor's position. In asm/nonmatchings/800/func_8001B0D4.s, case 0 keeps its own lui/lw %hi/%lo(D_800747E4) at 8001B114/B118 and its own addiu $v1,$zero,1 in the j delay slot, and joins only at .L8001B18C — cross_jump merged the common suffix (D_800747E8=$v1; D_800747E4=…+1; return 0) and nothing else, exactly §193-C/§224. And every survivor is the later-emitted copy, exactly §162g: B1D8 (case-1-inner t==1 merged into case-2's region), B208 (case-2-inner t==0/8 merged into outer case 4, the last arm), B184/B18C (case 0's tail merged forward into case 1's arm).
What to do instead. Read the tables element-wise across tables, not just vector-vs-vector: any address appearing in ≥2 tables — or in an outer table and an inner one — names an arm whose statements must be written longhand in every arm that reaches it, with the merged copy landing in the last-emitted arm. Here that means case 0 gets D_800747E8 = 1; D_800747E4 = D_800747E4 + 1; return 0; written out in full (not factored, not goto-ed), case-2's inner t==0/t==8 get outer case 4's body written out in full, and case-1-inner t==1 gets case-2-inner t==1/2/4's body. The transcript never tried this; it only permuted outer case-label order, which moves which single-switch pairing wins and can never mint a duplicate that was not written.
Status: UNPROVEN lever, REFUTED mechanism. No byte-exact match was reached (best closeness 45 of 86 ins). The two levers that did move the number — register s32 t __asm__("$3") for CdQueueBusy()'s return and outer arm reordering — are §249/§268 and §222.1 verbatim; nothing new. Do not re-bank the "cross-switch merge is unreachable from C" reading: §164-11's banked counter-example already exists.
Why refuted: Checked §164-11 (L12111 — THE JUMP TABLE IS PER-SWITCH AND SURVIVES TAIL-MERGE), §162g (L11300 — cross-jump direction / survivor is the LATER copy), §162h (L11336 — the CALL veto is a COUNT law), §193-C (L18588 — scheduled common SUFFIX only, no head merge), §224 (L22939 — CROSS-JUMP: write the duplicate), §225 (L22975 — three control-flow shapes no structured spelling reaches, incl. the goto-landing-mid-flow case the distiller says is untested), §298 (L29542 — shared-tail position diagnostic), §222 (L22835 — arm order in source IS arm order in asm), §223, §249 (L23931), §268 (L25285 — register pin honored when the pinned range crosses no call), §88a, §50-B, §163c, §165-28, §206, §8/§8a-pad/§8e, §163z (L11868, which flags this exact func_80183324 tell), plus a cookbook-index.md grep of the "jump tables & switches (46)" cluster and "cross-jump / tail merge / shared tail". VERDICT REFUTED, on two independent grounds. (1) The claim's distinguishing content — "gcc-2.7.2's normal path keeps each inner switch's codegen self-contained; no ordinary nesting aliases one inner switch's arm onto a sibling outer case's inner switch arm" — is contradicted by a byte-proven, whole-binary-gated §: §164-11's exemplar func_80183324 spells the inner switch FOUR times as plain nested switches in cases 0/1/2/4, and cc1's $L34/$L48/$L63 — three DIFFERENT switches — all point at ONE copy of the code inside case 4's arm. Cross-switch sharing from ordinary source is already banked, and §164-11 already gives the cure (write the body out k times; never collapse to one switch reached by goto). (2) The target's own bytes show a textbook §193-C suffix merge, not an exotic shape: I read asm/nonmatchings/800/func_8001B0D4.s (0x158 = 86 ins) and case 0 keeps its OWN lui/lw of D_800747E4 at 8001B114/B118 and its own addiu $v1,$zero,1 in the j delay slot, joining only at .L8001B18C — i.e. only the common suffix merged, exactly §224's "write the duplicate". I also verified every survivor's position against §162g's LATER-copy law from the real tables in asm/data/6324C.data.s (jtbl_80072B24 slot4=0x8001B208; jtbl_80072B3C = B154,B1D8,B184,B218,B184,B218,B218,B218,B168; jtbl_80072B64 = B208,B1D8,B1D8,B218,B1D8,B218,B218,B218,B208): B1D8 survives in case 2's region (later than case-1's copy), B208 in case 4 (the last arm), B184/B18C in case 1 (later than case 0). Three for three forward merges into the last-emitted copy — §162g exactly, no new pass behaviour. Weighing the UNPROVEN gate: the draft never reached 0, so the residual's cause is inferred, not measured; the only measured facts are that a §249/§268 pin took 68→45 and a §222.1 arm reorder took nins 84→86 — both already banked levers. The genuinely new observable — element-wise entry overlap ACROSS sibling tables, including an outer table's entry reappearing inside a sibling case's inner table — is a real sharpening of §164-11's identical-vector tell, and I folded it into the entry as the corrective prescription rather than as a new law, because §164-11's mechanism (expand_end_case emits one vector per switch; do_cross_jump only redirects and deletes insns) already predicts it and the transcript never tested the prescription it implies (duplicate the statements longhand in each arm). Banking this as written would have told future agents that a shape we have already matched and gated is unreachable from C.
RETRIEVAL FAILURES this round (not new knowledge — a RETRIEVAL defect)
These transcripts re-derived a law the book ALREADY states, by grinding rather than by grepping. Per the book's own standing guidance, a high COVERED count is the signal to fix RETRIEVAL, not to write more prose:
- Standalone bitmask statement scrambles register-copy/move order around a call —
func_800CDBA8. Covered by: §165-19 (primary — THE BIRTHING BOOST IS A REGISTER LEVER TOO, L14191) + §162d1 (THE ANONYMOUS TEMP IS A SINGLE-SET PSEUDO, L11135) + §30 #3 (THE "BIRTHING-BO. Refs the agent actually grepped: NONE — ground it out empirically - Block-scope callee decl defuses a later-in-TU definition (order-dependent solven —
func_800CB00C. Covered by: §41 point 3 (L2806-2812) — the lever verbatim; with §55a (L4150-4154) + §56 tactics 2/3 (L4244-4258) for the order half, and §136f-1 (L9220-9231) + §56 tactic 4. Refs the agent actually grepped: NONE — ground it out empirically
S66 HARVEST, ROUND 4 (P31, 2026-08-30) — the O31 overlay lane (hardest band, first auto-bucket wave)
1 NEW, 5 ADDENDUM, 1 COVERED from 9 mechanism-advertising transcripts of 19.