BFM-decomp/cookbook/C0366.md

§326 — DEFEATING ADDRESS-CSE: SPELL TWO READS OF THE SAME HALFWORD DIFFERENTLY AND GCC CANNOT SHARE THE ADDRESS (P31 S67; byte-proven ov_SC01_077/func_8017FAAC, 154 ins)

The target keeps three separate lui/addu/l* $at groups where gcc wanted one shared base. Writing one read as D_8018A9B2[i] and the other as *(s16*)(D_8018A9B0 + i*4 + 2) yields DIFFERENT address rtx for the same location, so address-CSE cannot merge them and each keeps its own %hi/%lo pair. Same function also needed §186: moving the 0x1A += before the 0x16 -= 0x40 put the if-arm's last store in $v1 vs the else-arm's $v0, blocking the jump2 tail-merge that was costing 2 instructions (cross-jump runs AFTER scheduling, so only a post-schedule register difference blocks it).