BFM-decomp/docs/backlog.md

Backlog — automation near-misses for hand-finishing

Generated by tools/backlog.py render from .run/backlog.jsonl. These are functions the Phase-21 automation got close on but did NOT byte-match. The whole-binary byte-gate is the sole arbiter (G3/P9): byte-matches bank and are NOT listed here — only genuine near-misses/blockers are. Ranked by hand-session priority: reach (×N propagation leverage) → closeness (match_one mismatch count, lower = closer) → size. Each row's best_draft is the closest C the machine reached — resume from there.

Open near-misses: 61 · by status {'near': 36, 'failed': 25} · by class {'WAVE': 34, 'struct': 5, 'regalloc-order': 8, 'schedule': 10, 'other': 1, 'iv-combine': 1, 'plumbing': 2}

#	addr	reach	class	nins	status	closeness	where it stuck	best draft
1	func_80174684	134	WAVE	8	near	0	match_one MATCH but gate rejected (declaration/TU plumbing)	.run/backlog_drafts/func_80174684.c
2	func_801463A0	134	struct	101	near	0	none — MATCH (101 ins, match_one); real symbol names; misaligned 8B copy + s16 stores + masked B9C last	.run/backlog_drafts/func_801463A0.c
3	func_80167714	134	regalloc-order	104	near	0	none — MATCH (104 ins)	.run/backlog_drafts/func_80167714.c
4	func_80169228	134	regalloc-order	105	near	0	none — MATCH (105 ins, relocation-masked). Key levers: arg0/p pinned $s1/$s0,	.run/backlog_drafts/func_80169228.c
5	func_80174CB0	134	regalloc-order	123	near	0	none — MATCH (match_one 123/123). Levers: (1) §21 one combined stack struct {s32 a[5]; ...}	.run/backlog_drafts/func_80174CB0.c
6	func_8014F3E8	134	WAVE	32	near	1	WAVE: 1 mismatch	.run/backlog_drafts/func_8014F3E8.c
7	func_8014FFDC	134	struct	93	near	1	none — MATCH	.run/backlog_drafts/func_8014FFDC.c
8	func_8014B944	134	WAVE	114	near	2	WAVE: 2 mismatch	.run/backlog_drafts/func_8014B944.c
9	func_80166054	134	regalloc-order	94	near	3	3-off — local uVar1 (the 0x18/0x1a store value) lands in $a1 (coalesced w/ the func_80128EA8 2nd arg) vs target $v0 (time-shares $v0 w/ the OR-load + cmp-const); pinning uVar1=$v0 reserves $v0 function-wide so the OR-load is forced off $v0 and r cascades off $a0 -> breaks more than it fixes. Pure regalloc-order tie, no clean C lever.	.run/backlog_drafts/func_80166054.c
10	func_8016130C	134	WAVE	26	near	9	WAVE: 9 mismatch	.run/backlog_drafts/func_8016130C.c
11	func_8017849C	134	schedule	91	near	9	9/91 — gcc keeps the Blk12 block-move's 3 stores grouped; target list-scheduler hoists lbu 0x6C between store1/store2 and SINKS store3 into the beqz 0x6C delay slot (movstrsi is atomic to reorg, so store3 can't fill the slot). Structure/count/branch-polarity all match; pure instruction-scheduler residual (cookbook §3/§17 block-copy-vs-store-sink tension). Separate-copy form floors worse (11-13, wrong load order).	.run/backlog_drafts/func_8017849C.c
12	func_8013EA54	134	regalloc-order	74	near	11	B00 block (D_8011511A != 4 / -1 < 2): target keeps the lhu value as a $a0 MASTER, derives the equality via a redundant andi $v1,$a0,0xFFFF and schedules dec=$v0=$a0-1 into the beq delay slot; my C allocs raw->$v1 + dec->$a0 with no master/andi (11 ins differ, count matches 74=74). gcc-2.7.2 folds every explicit (u16)/&0xFFFF mask (lhu known zero-ext); register asm pins force destructive reuse so they regress to 73. §10/§20 regalloc+delay-slot tie-break.	.run/backlog_drafts/func_8013EA54.c
13	func_801493D0	134	WAVE	23	near	12	WAVE: 12 mismatch	.run/backlog_drafts/func_801493D0.c
14	func_8016BF50	134	WAVE	22	near	14	WAVE: 14 mismatch	.run/backlog_drafts/func_8016BF50.c
15	func_80149374	134	WAVE	23	near	15	WAVE: 15 mismatch	.run/backlog_drafts/func_80149374.c
16	func_80146A6C	134	WAVE	18	near	17	WAVE: 17 mismatch	.run/backlog_drafts/func_80146A6C.c
17	func_8016E778	134	WAVE	20	near	17	WAVE: 17 mismatch	.run/backlog_drafts/func_8016E778.c
18	func_8015C030	134	WAVE	23	near	17	WAVE: 17 mismatch	.run/backlog_drafts/func_8015C030.c
19	func_8013E448	134	WAVE	27	near	17	WAVE: 17 mismatch	.run/backlog_drafts/func_8013E448.c
20	func_8014ADE0	134	schedule	139	near	19	16 ins off — all compiler-internal ties: (1) 0xAAA8 const lands $v0 vs target $v1;	.run/backlog_drafts/func_8014ADE0.c
21	func_8014FE60	134	regalloc-order	95	near	20	none — MATCH (permuter closed the final bothzero-block regalloc/schedule residual: moving a = in[2] before the +0x7E read-modify-write flips the 0x7FFF constant into $v1 and computes return-0 in $v0)	.run/backlog_drafts/func_8014FE60.c
22	func_801466F0	134	WAVE	24	near	21	WAVE: 21 mismatch	.run/backlog_drafts/func_801466F0.c
23	func_8016191C	134	WAVE	24	near	21	WAVE: 21 mismatch	.run/backlog_drafts/func_8016191C.c
24	func_801439FC	134	schedule	77	near	22	none — MATCH (77 ins). Keys: 3-short stack block as a struct passed by &b	.run/backlog_drafts/func_801439FC.c
25	func_80172C50	134	WAVE	20	near	23	WAVE: 23 mismatch	.run/backlog_drafts/func_80172C50.c
26	func_8017248C	134	WAVE	24	near	23	WAVE: 23 mismatch	.run/backlog_drafts/func_8017248C.c
27	func_80147364	134	WAVE	30	near	25	WAVE: 25 mismatch	.run/backlog_drafts/func_80147364.c
28	func_8016706C	134	WAVE	30	near	27	WAVE: 27 mismatch	.run/backlog_drafts/func_8016706C.c
29	func_8014D2A0	134	other	80	near	27	none — MATCH (80 ins, relocation-masked); loop-guard idiom per engine_core DEFINE_func_80164ACC	.run/backlog_drafts/func_8014D2A0.c
30	func_80177F84	134	WAVE	32	near	30	WAVE: 30 mismatch	.run/backlog_drafts/func_80177F84.c
31	func_8014A51C	134	WAVE	32	near	33	WAVE: 33 mismatch	.run/backlog_drafts/func_8014A51C.c
32	func_80144B14	134	WAVE	34	near	33	WAVE: 33 mismatch	.run/backlog_drafts/func_80144B14.c
33	func_80168BDC	134	iv-combine	95	near	45	none — MATCH (95/95); loop counter declared s16 so the i+1 increment is	.run/backlog_drafts/func_80168BDC.c
34	func_8016163C	134	plumbing	78	near	60	none — MATCH (78/78 ins; key: func_801599A4(arg0) leaves $a0 untouched in &1 branch -> nop delay slot; 0x16C is lhu not lh)	.run/backlog_drafts/func_8016163C.c
35	func_80177940	134	schedule	101	near	75	75/101 (cascade-inflated; ~3 distinct residuals). Dominant: our cc1 CSE-shares	.run/backlog_drafts/func_80177940.c
36	func_8014DD8C	134	WAVE	108	near	83	WAVE: 83 mismatch	.run/backlog_drafts/func_8014DD8C.c
37	func_801705C0	134	WAVE	14	failed		won't compile standalone (loose-typing / missing decl)	.run/backlog_drafts/func_801705C0.c
38	func_8016B91C	134	WAVE	18	failed		won't compile standalone (loose-typing / missing decl)	.run/backlog_drafts/func_8016B91C.c
39	func_801718AC	134	WAVE	22	failed		won't compile standalone (loose-typing / missing decl)	.run/backlog_drafts/func_801718AC.c
40	func_80168B70	134	WAVE	27	failed		won't compile standalone (loose-typing / missing decl)	.run/backlog_drafts/func_80168B70.c
41	func_801494CC	134	WAVE	30	failed		won't compile standalone (loose-typing / missing decl)	.run/backlog_drafts/func_801494CC.c
42	func_801708B0	134	WAVE	30	failed		won't compile standalone (loose-typing / missing decl)	.run/backlog_drafts/func_801708B0.c
43	func_80149450	134	WAVE	31	failed		won't compile standalone (loose-typing / missing decl)	.run/backlog_drafts/func_80149450.c
44	func_80149F2C	134	WAVE	31	failed		won't compile standalone (loose-typing / missing decl)	.run/backlog_drafts/func_80149F2C.c
45	func_8014D610	134	plumbing	74	failed		none — MATCH (74 ins). for-loop + continue, single IV pointer p; gcc derives the $s0 = p+0x75 second induction var. Template: DEFINE_func_80163950 (sibling, same D_801202A0 loop + func_80135A4C).	.run/backlog_drafts/func_8014D610.c
46	func_80163534	134	schedule	76	failed		mismatch=13, a single 1-position scheduling tie. Instrs 1-30 byte-perfect; all registers correct	.run/backlog_drafts/func_80163534.c
47	func_8014CF04	134	struct	82	failed		none — MATCH (82 ins; array-of-struct scan, for-loop over Ent D_801202A0[96], stride 0x10C)	.run/backlog_drafts/func_8014CF04.c
48	func_80156670	134	schedule	83	failed		none — MATCH (83 ins). Key: hoist iVar1 = uVar3*4; as its OWN statement before the if so gcc schedules sll v1,s1,2 into the bnez delay slot (computed unconditionally) and reuses v1 index-first (iVar1 + (s32)&D_801150E0 → addu v0,v1,v0). 13-arg call to func_80157158 (a0-a3 + 9 stack args at 0x10..0x30); param_2/param_3 cast (u16) → andi; param_6 incoming as lhu(u16). Address args = integer math iVar2 + (s32)&D_x (index-first → lui;addiu;addu, index added first).	.run/backlog_drafts/func_80156670.c
49	func_8014D4C0	134	schedule	84	failed		none — MATCH (goto forces if-body out-of-line/last; >= fixes slt operand order)	.run/backlog_drafts/func_8014D4C0.c
50	func_8016A73C	134	struct	85	failed		none — MATCH (85 ins, relocation-masked)	.run/backlog_drafts/func_8016A73C.c
51	func_80173CB4	134	schedule	90	failed		none — MATCH (switch form keeps cases unmerged; final block: reuse one temp for the D_8012750C test + the func_8013767C result -> $a0 alloc; invert if to !=0 for branch polarity + store order)	.run/backlog_drafts/func_80173CB4.c
52	func_8014C6F4	134	regalloc-order	91	failed		19-off loop tie-break — target compiles the search as a while/for (pre-guard sltu;beqz present) with the found pointer snapshotted to $v0 split from the IV in $a0 and the +4 sunk into both call-arg delay slots; do-while is instruction-count-exact (91=91) but lacks the pre-guard, while every for/while form costs +4 ins (merge stays in $a0). §10 schedule/regalloc residual.	.run/backlog_drafts/func_8014C6F4.c
53	func_8014D12C	134	schedule	93	failed		none — MATCH (93 ins). Block-order lever: success-continuation (return 1)	.run/backlog_drafts/func_8014D12C.c
54	func_801502EC	134	schedule	93	failed		none — MATCH (93 ins). 8-byte block copy via alignment-1 struct (Blk8{u8 b[8]}) assignment reproduces the lwl/lwr/swl/swr; ret=0 hoisted before the block copy to fix the s3-vs-ra prologue save order.	.run/backlog_drafts/func_801502EC.c
55	func_80150170	134	struct	95	failed		none — MATCH (95/95). Keys: (1) two parallel 3-halfword groups via chained assign sp10.x = sp18.x = v (sp18 inner so 0x18 stores first); (2) align-1 blk8 struct copy for the lwl/lwr/swl/swr 8-byte copy into actor+0x80 (src = sp buf from func_801502EC, or u8[] D_801152A8); (3) f0/f2 = u16 (lhu), f1 = s16 (lh for the slt); (4) (iVar5/iVar6)!=0 single-OR test + branch-polarity invert (not-both-zero is fall-through); (5) both-zero tail register pins: 0x7fff -> $v1 (register s32 __asm__("$3")), sp10.f0/f2 -> reused $a0 (register u32 __asm__("$4") written twice) to force gcc's hoist-load + reg reuse schedule.	.run/backlog_drafts/func_80150170.c
56	func_8014CD80	134	regalloc-order	97	failed		none — MATCH (97 ins). iVar3 pinned to $v1 (register asm("$3")) so	.run/backlog_drafts/func_8014CD80.c
57	func_8014E284	134	WAVE	108	failed		won't compile standalone (loose-typing / missing decl)	.run/backlog_drafts/func_8014E284.c
58	func_80167540	134	WAVE	117	failed		won't compile standalone (loose-typing / missing decl)	.run/backlog_drafts/func_80167540.c
59	func_8014F4C0	134	WAVE	141	failed		won't compile standalone (loose-typing / missing decl)	.run/backlog_drafts/func_8014F4C0.c
60	func_8014E048	134	WAVE	143	failed		won't compile standalone (loose-typing / missing decl)	.run/backlog_drafts/func_8014E048.c
61	func_80155800	134	WAVE	145	failed		won't compile standalone (loose-typing / missing decl)	.run/backlog_drafts/func_80155800.c