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From main/func_8002DC68 (MATCH 198/198). The target masks one value twice (a compare, plus a second andi that reorg steals for a beqz delay slot). Written as param_2 & 0x7F on both sides, cse merges the two (and:SI) and the delay slot comes out EMPTY. Spelling ONE as (param_2 << 25) >> 25 hides it from cse — different RTX — and combine's simplify_shift_const folds it back to andi. Two masks in the RTL, one instruction each out. Byte-verified on either side. The inverse of the usual advice: normally you make two expressions identical so cse merges them; here you make them different to cse and identical to combine, exploiting pass order. Any x & ((1<<n)-1) has a shift-pair twin with this property.