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BFM-decomp/docs/backlog.md
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Drew T e7679b51ff docs(phase-32): T4b hand pass — row (c) func_80039308 PLATEAU at 4 (§501-O phantom-slot census for a leaf; ledger row); 🛑 CHECKPOINT refreshed for the pause: (a) PROVED · (b) BANKED commit:4001 · (c) PLATEAU 4 · (d) NEXT (sibling search first), then T4b close and T5
- (c): cnt's slot is spill_stack_slot[23] (evicted from $s7), so the phantom @0x8 must be an initial-loop no-traffic slot; every producer refuted on dump facts (leaf: no save area; LO spilled after GR and products alternate to GR_REGS — C3 measured; no unallocated single-block equiv pseudo; expand-time locals precede; 13 lh single-use, no lb). Rows 49/50 = two move_movables hoists in body order.
- row (d) read only (rtu DIFF 13 re-verified); brief + step 0 (§501-N banked-sibling search on its symbol set) in the checkpoint
- no src/ change in this commit; fleet R22 owed at the T4b close (last check-all 218/218 before the (b) bank)
2026-09-06 12:31:08 -06:00

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Backlog — automation near-misses for hand-finishing

Generated by tools/backlog.py render from .run/backlog.jsonl. These are functions the Phase-21 automation got close on but did NOT byte-match. The whole-binary byte-gate is the sole arbiter (G3/P9): byte-matches bank and are NOT listed here — only genuine near-misses/blockers are. Ranked by hand-session priority: reach (×N propagation leverage) → closeness (match_one mismatch count, lower = closer) → size. Each row's best_draft is the closest C the machine reached — resume from there.

Open near-misses: 4 · by status {'near': 3, 'failed': 1} · by class {'WALL-PROVED': 1, 'FRAME+SCHED': 1, 'SCHED': 1, None: 1}

# addr reach class nins status closeness where it stuck best draft
1 func_80032A74 None WALL-PROVED 422 near 1 T4b HAND PASS S84 (2026-09-06, Fable Max): PROVED at 1 by producer census. Residual = ONE reload-time slot at sp+0x48 (the u16 lhu draft is 422/422 with DIFF 22 = frame rows only; the s16 lh draft is DIFF 1 at idx 244 with the frame exact). The four post-parameter slot producers (reload1.c:658 ghost alter_reg / caller-save.c:249 area / reload1.c:879 invalid-equiv address / reload1.c:3499 spill_stack_slot) each refuted on the bytes: the site loads lhu and the function has no lb and no double load (combine newi2pat ghosts re-derive a narrow load); no register-only insn shares a block with a call (no sched.c:4962 staleness, so no save area without sw/lw); no unallocated single-block equiv pseudo; $t0 holds no pseudo (else $t1 would be the spill reg) and LO mult results retry into GR_REGS. NEW mechanism measured: optimize_reg_copy_2 ghosts (tmp = x; tmp op= c; x = tmp) are minted AFTER regclass -> GR_REGS, allocated, vars=0 (P14). 18 isolated reproducers, 0 draft variants; cookbook §501-M; notes .run/P32/t4c/func_80032A74/NOTES.md .run/P32/t4/drafts/func_80032A74_tuclean.c
2 func_80039308 None FRAME+SCHED 518 near 4 T4b HAND PASS S84 (2026-09-06): PLATEAU at 4. Rows 412/415: Fable Y4 (direct (s16)(p+6)=arg1) is register-exact (lhu/sh $s7 = the spilled HImode parameter reloaded through the spill register) and natural; the residual is the frame: target [arg1 @0][8-byte no-traffic slot @8][cnt @0x10]. Producer census (§501-M/§501-O): cnt slot = spill_stack_slot[23] (cnt evicted from $s7, retry fails), so the phantom is an INITIAL-LOOP slot with no traffic — caller-save area dead (leaf), LO eviction lands after cnt (GR spilled first; products alternate to GR_REGS, C3), no unallocated single-block equiv pseudo ($t0 free at the k2 site), expand-time locals precede (Y1/Y3/Y4), all 13 lh single-use + no lb (no combine ghost). Rows 49/50: both preheader insns are move_movables hoists in body order (vol = b2*0x100 in the body); X2 measured 495 — a hoisted vbase needs §501-E steering to $s2 without the pin. Notes .run/P32/t4c/func_80039308/NOTES.md .run/P32/t5x/fable/func_80039308.c
3 func_80185810 None SCHED 489 near 13 S83 Fable: 35 -> 13 at exact length; 3 of 4 windows closed (P_TAG bitfield OT link + integer add for the addu operand order; sched1 flush_pending_lists at the 33rd memory op explains the load order -> HI temps; hard-reg destinations are not birthing-boosted -> pins uu $4 / mode $5 / ot16 $6 give the LUID order; shf pin $3). Residual ONE cause idx 363-380: cl &= 0xFFFF is an unboosted 2nd set — the fence after p[7]/= is needed (else its two reads float to the block head, 43/51) yet it blocks sched2 fillers crossing into the tpage/code window. NEXT: a spelling in which cl is single-set (its high half cleared at birth: cl = (u16)... or the shift form) so no fence is needed, or the two cl reads consume a fresh single-set copy that combine cannot fold (nonzero_bits defeats a plain andi copy; try a subreg/HI-mode temp) .run/P32/t5x/fable/func_80185810.c
4 func_80062144 None None failed won't compile standalone (loose-typing / missing decl)