Commit Graph

14 Commits

Author SHA1 Message Date
WerWolv c33d53b728 feat: Add support for Capstone 6, drop support for Capstone 4 2025-11-30 19:49:07 +01:00
WerWolv 9ae233a41c feat: Integrate the interactive help option and add a help text for every view 2025-11-30 16:42:01 +01:00
WerWolv 48af5eb10a impr: Modernize disassembler view 2025-08-16 11:49:35 +02:00
WerWolv fbde2942de build: Refactor ContentRegistry into multiple separate files 2025-08-14 21:22:03 +02:00
WerWolv b1867aac92 build: Fixed precompiled header build 2025-08-08 17:47:48 +02:00
paxcut 6f42c4b3b3
fix: fixes for pattern language dissassembler support (#2314)
Following the documentation (which is not being updated for this type)
on using `hex::type::Instruction` fails to produce any patterns
regardless of how you format the string that is passed to capstone to
select architecture and options.

The error is traced back to mishandling the input string so that the
correct parts are not selected properly. Rather than manually selecting
the parts of the input string from the result of find it is much simpler
to use splitString() (which uses find internally) and does all the work
for us with fewer chances for errors.

There are still problems. The resulting string for the formatter doesn't
return the disassembled instruction and prints the variable name with
the @ used to place it. To view the instruction you need to unseal the
pattern and open the child which then shows the instruction. That only
happens after this fix has been applied.
2025-06-25 03:53:17 -07:00
WerWolv 180f4926f8 impr: Make disassembly view contain data per-provider 2024-12-31 21:16:27 +01:00
WerWolv bf44a1cce6 feat: Added initial support for custom disassemblers 2024-12-26 20:04:45 +01:00
WerWolv a76c6c653d impr: Refactor disassembler system to make it more modular 2024-12-26 18:41:34 +01:00
Nik 040a606b39
feat: Added various custom built-in types to the pattern language (#1991) 2024-12-14 16:52:36 +01:00
WerWolv 21b315b97e impr: Added image load and image base address to disassembler
#1994
2024-12-10 20:33:28 +01:00
BioTheWolff 1b9f4f33de
feat: Added export disassembler results to ASM file (#1987)
### Problem description
<!-- Describe the bug that you fixed/feature request that you
implemented, or link to an existing issue describing it -->
This PR implements the feature request #1781, that suggests adding a
button to export disassembled instructions into an ASM file.

### Implementation description
This adds a button to export the current disassembled instructions to an
ASM file. Said file is suffixed by an `.asm` extension if not specified
at file creation.

*Note: the file is written to for every `Disassembly` item in the
vector, as it was the easiest and most memory-conservative way of doing
it.*

The file creation task is implemented based on IPS patch exports, so it
fits the same pattern.
A `ToastError` is raised when the ASM export could not complete
successfully.

Translations have been implemented for both `en_US` and `de_DE` for the
two new keys:
- `hex.disassembler.view.disassembler.export`: file export button
- `hex.disassembler.view.disassembler.export.popup.error`: error popup
text

### Screenshots
The button is disabled when the disassembler is working, or when the
disassembly vector is empty.

Here is a complete breakdown of the visual changes:

![image](https://github.com/user-attachments/assets/af0ce701-9d77-45f1-9a5a-90d68d00bb0d)

### Additional things
As expected, the exporter writes every item's `mnemonic` and `operators`
to the file, producing an output like this:

`example.asm`
```asm
.byte 0x7f, 0x45, 0x4c, 0x46
andeq r0, r1, r2, lsl #2
andeq r0, r0, r0
andeq r0, r0, r0
eorseq r0, lr, r3
andeq r0, r0, r1
andeq r1, r0, r0, asr #32
andeq r0, r0, r0
andeq r0, r0, r0, asr #32
```

---------

Signed-off-by: BioTheWolff <47079795+BioTheWolff@users.noreply.github.com>
2024-12-05 23:04:38 +01:00
WerWolv dd62bee264 build: Added precompiled headers 2024-02-29 19:57:20 +01:00
Nik 61bfe10bc2
refactor: Rework features that use external libraries into optional plugins (#1470) 2023-12-23 21:09:41 +01:00