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https://github.com/ran-j/PS2Recomp.git
synced 2026-10-03 02:56:41 -04:00
refactor: refactor runtime and recompile for better workflow and correct generating code and analyze output
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@@ -7,6 +7,7 @@
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#include <string>
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#include <functional>
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#include <immintrin.h> // For SSE/AVX instructions
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#include <atomic>
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#include <filesystem>
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#include <iostream>
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@@ -34,6 +35,7 @@ constexpr uint32_t PS2_VU1_DATA_BASE = 0x1100C000;
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constexpr uint32_t PS2_GS_BASE = 0x12000000;
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constexpr uint32_t PS2_GS_PRIV_REG_BASE = 0x12000000; // GS Privileged Registers
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constexpr uint32_t PS2_GS_PRIV_REG_SIZE = 0x2000;
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constexpr size_t PS2_GS_VRAM_SIZE = 4 * 1024 * 1024; // 4MB GS VRAM
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#define PS2_FIO_O_RDONLY 0x0001
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#define PS2_FIO_O_WRONLY 0x0002
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@@ -351,6 +353,10 @@ public:
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uint8_t *getRDRAM() { return m_rdram; }
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uint8_t *getScratchpad() { return m_scratchpad; }
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uint8_t *getIOPRAM() { return iop_ram; }
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uint64_t dmaStartCount() const { return m_dmaStartCount.load(std::memory_order_relaxed); }
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uint64_t gifCopyCount() const { return m_gifCopyCount.load(std::memory_order_relaxed); }
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uint64_t gsWriteCount() const { return m_gsWriteCount.load(std::memory_order_relaxed); }
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uint64_t vifWriteCount() const { return m_vifWriteCount.load(std::memory_order_relaxed); }
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// Read/write memory
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uint8_t read8(uint32_t address);
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@@ -377,7 +383,12 @@ public:
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bool isCodeModified(uint32_t address, uint32_t size);
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void clearModifiedFlag(uint32_t address, uint32_t size);
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private:
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// GS register accessors
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GSRegisters &gs() { return gs_regs; }
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const GSRegisters &gs() const { return gs_regs; }
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uint8_t *getGSVRAM() { return m_gsVRAM; }
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const uint8_t *getGSVRAM() const { return m_gsVRAM; }
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bool hasSeenGifCopy() const { return m_seenGifCopy; }
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// Main RAM (32MB)
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uint8_t *m_rdram;
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@@ -387,11 +398,17 @@ private:
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// IOP RAM (2MB)
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uint8_t *iop_ram;
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bool m_seenGifCopy;
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std::atomic<uint64_t> m_dmaStartCount{0};
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std::atomic<uint64_t> m_gifCopyCount{0};
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std::atomic<uint64_t> m_gsWriteCount{0};
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std::atomic<uint64_t> m_vifWriteCount{0};
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// I/O registers
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std::unordered_map<uint32_t, uint32_t> m_ioRegisters;
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// Registers
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GSRegisters gs_regs;
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uint8_t *m_gsVRAM;
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VIFRegisters vif0_regs;
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VIFRegisters vif1_regs;
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DMARegisters dma_regs[10]; // 10 DMA channels
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@@ -434,6 +451,7 @@ public:
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void registerFunction(uint32_t address, RecompiledFunction func);
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RecompiledFunction lookupFunction(uint32_t address);
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bool hasFunction(uint32_t address) const;
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void SignalException(R5900Context *ctx, PS2Exception exception);
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@@ -90,6 +90,9 @@ namespace ps2_syscalls
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void SifSetRpcQueue(uint8_t *rdram, R5900Context *ctx, PS2Runtime *runtime);
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void SifRemoveRpcQueue(uint8_t *rdram, R5900Context *ctx, PS2Runtime *runtime);
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void SifRemoveRpc(uint8_t *rdram, R5900Context *ctx, PS2Runtime *runtime);
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void sceSifCallRpc(uint8_t *rdram, R5900Context *ctx, PS2Runtime *runtime);
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void sceSifSendCmd(uint8_t *rdram, R5900Context *ctx, PS2Runtime *runtime);
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void _sceRpcGetPacket(uint8_t *rdram, R5900Context *ctx, PS2Runtime *runtime);
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void fioOpen(uint8_t *rdram, R5900Context *ctx, PS2Runtime *runtime);
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void fioClose(uint8_t *rdram, R5900Context *ctx, PS2Runtime *runtime);
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@@ -116,4 +119,4 @@ namespace ps2_syscalls
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void TODO(uint8_t *rdram, R5900Context *ctx, PS2Runtime *runtime);
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}
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#endif // PS2_SYSCALLS_H
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#endif // PS2_SYSCALLS_H
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