From c05d8f1809a58a8d5d8321700c5a626760199844 Mon Sep 17 00:00:00 2001
From: Ran-j <ran-junior@hotmail.com>
Date: Sat, 29 Nov 2025 18:19:36 -0300
Subject: [PATCH] feat: misc fixes

---
 ps2xRecomp/src/ps2_recompiler.cpp | 2 +-
 ps2xRuntime/include/ps2_runtime.h | 6 ++++--
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/ps2xRecomp/src/ps2_recompiler.cpp b/ps2xRecomp/src/ps2_recompiler.cpp
index 40566c8..38f3652 100644
--- a/ps2xRecomp/src/ps2_recompiler.cpp
+++ b/ps2xRecomp/src/ps2_recompiler.cpp
@@ -222,7 +222,7 @@ namespace ps2recomp
             // ss << "namespace ps2recomp {\n";
             // ss << "namespace stubs {\n\n";
 
-            for (const auto &funcName : m_config.stubImplementations)
+            for (const auto &funcName : m_config.skipFunctions)
             {
                 ss << "void " << funcName << "(uint8_t* rdram, R5900Context* ctx, PS2Runtime* runtime) { ps2_syscalls::TODO(rdram, ctx, runtime); }\n";
             }
diff --git a/ps2xRuntime/include/ps2_runtime.h b/ps2xRuntime/include/ps2_runtime.h
index 5537d67..a1dcf54 100644
--- a/ps2xRuntime/include/ps2_runtime.h
+++ b/ps2xRuntime/include/ps2_runtime.h
@@ -93,6 +93,7 @@ struct alignas(16) R5900Context
     uint32_t vu0_fbrst;     // VIF/VU reset register
     uint32_t vu0_fbrst2;    // FBRST2
     uint32_t vu0_fbrst3;    // FBRST3
+    uint32_t vu0_fbrst4;    // FBRST4
     uint32_t vu0_itop;
     uint32_t vu0_info;
 
@@ -164,6 +165,9 @@ struct alignas(16) R5900Context
         vu0_clip_flags = 0;
         vu0_cmsar0 = 0;
         vu0_fbrst = 0;
+        vu0_fbrst2 = 0;
+        vu0_fbrst3 = 0;
+        vu0_fbrst4 = 0;
 
         // Reset COP0 registers
         cop0_index = 0;
@@ -193,10 +197,8 @@ struct alignas(16) R5900Context
         vu0_vpu_stat2 = 0;
         vu0_tpc2 = 0;
         vu0_cmsar1 = 0;
-        vu0_fbrst2 = 0;
         vu0_vpu_stat3 = 0;
         vu0_cmsar2 = 0;
-        vu0_fbrst3 = 0;
         vu0_vpu_stat4 = 0;
         vu0_itop = 0;
         vu0_info = 0;