mirror of
https://github.com/ran-j/PS2Recomp.git
synced 2026-09-26 16:59:35 -04:00
669114f3f6
* feat: small fixes on code gen * feat: added code gen test * feat: rename IOP * fix: fix special case on JR feat: added code generator test * feat: ps2 logs now need special macros * feat: a lot of regressions test feat: use test to fix bugs on runtime fix: fix incorrect instructions on code generator feat: added missing decode on r5900 decoder feat: added scissor on rasterizer * feat: better ghidra plugin analyzer fix: fix real bug on function finding on elf analyzer * feat: some logs on GS feat: added more syscalls stubs feat: added more ps2 stubs * feat: added missing stub
540 lines
19 KiB
C++
540 lines
19 KiB
C++
#ifndef PS2_RUNTIME_H
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#define PS2_RUNTIME_H
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#include <cstring>
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#include <cstdint>
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#include <vector>
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#include <unordered_map>
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#include <string>
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#include <functional>
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#if defined(_MSC_VER)
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#include <intrin.h>
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#elif defined(USE_SSE2NEON)
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#include "sse2neon.h"
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#else
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#include <immintrin.h> // For SSE/AVX instructions
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#include <smmintrin.h> // For SSE4.1 instructions
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#endif
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#include <atomic>
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#include <mutex>
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#include <filesystem>
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#include <iostream>
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#include <iomanip>
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#include "ps2_gif_arbiter.h"
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#include "ps2_memory.h"
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#include "ps2_gs_gpu.h"
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#include "ps2_iop.h"
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#include "ps2_vu1.h"
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#include "ps2_audio.h"
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#include "ps2_pad.h"
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enum PS2Exception
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{
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EXCEPTION_TLB_REFILL = 0x02, // TLB refill/load exception
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EXCEPTION_ADDRESS_ERROR_LOAD = 0x04, // Address error on load
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EXCEPTION_ADDRESS_ERROR_STORE = 0x05, // Address error on store
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EXCEPTION_SYSCALL = 0x08, // SYSCALL instruction
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EXCEPTION_BREAKPOINT = 0x09, // BREAK instruction
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EXCEPTION_RESERVED_INSTRUCTION = 0x0A,
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EXCEPTION_INTEGER_OVERFLOW = 0x0C, // From MIPS spec
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EXCEPTION_TRAP = 0x0D, // Trap instruction condition met
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};
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// PS2 CPU context (R5900)
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struct alignas(16) R5900Context
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{
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// General Purpose Registers (128-bit)
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__m128i r[32]; // Main registers
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// Control registers
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uint32_t pc; // Program counter
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uint64_t insn_count; // Instruction counter
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uint64_t hi, lo; // HI/LO registers for mult/div results
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uint64_t hi1, lo1; // Secondary HI/LO registers for MULT1/DIV1
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uint32_t sa; // Shift amount register
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// VU0 registers (when used in macro mode)
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__m128 vu0_vf[32]; // VU0 vector float registers
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uint16_t vi[16]; // VU0 vector integer registers
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float vu0_q; // VU0 Q register (quotient)
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float vu0_p; // VU0 P register (EFU result)
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float vu0_i; // VU0 I register (integer value)
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__m128 vu0_r; // VU0 R register
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__m128 vu0_acc; // VU0 ACC accumulator register
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uint16_t vu0_status; // VU0 status register
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uint32_t vu0_mac_flags; // VU0 MAC flags
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uint32_t vu0_clip_flags; // VU0 clipping flags
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uint32_t vu0_clip_flags2; // VU0 clipping flags
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uint32_t vu0_cmsar0; // VU0 microprogram start address
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uint32_t vu0_cmsar1; // VU0 microprogram start address
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uint32_t vu0_cmsar2; // VU0 microprogram start address
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uint32_t vu0_cmsar3; // VU0 microprogram start address
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uint32_t vu0_vpu_stat;
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uint32_t vu0_vpu_stat2; // extra VPU status (used by CR_VPU_STAT2)
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uint32_t vu0_vpu_stat3; // extra VPU status 3
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uint32_t vu0_vpu_stat4; // extra VPU status 4
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uint32_t vu0_tpc; // TPC (VU0 PC)
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uint32_t vu0_tpc2; // second TPC
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uint32_t vu0_fbrst; // VIF/VU reset register
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uint32_t vu0_fbrst2; // FBRST2
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uint32_t vu0_fbrst3; // FBRST3
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uint32_t vu0_fbrst4; // FBRST4
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uint32_t vu0_itop;
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uint32_t vu0_top;
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uint32_t vu0_info;
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uint32_t vu0_xitop; // VU0 XITOP - input ITOP for VIF/VU sync
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uint32_t vu0_pc;
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float vu0_cf[4]; // VU0 FMAC control floating-point registers
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// COP0 System control registers
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uint32_t cop0_index;
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uint32_t cop0_random;
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uint32_t cop0_entrylo0;
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uint32_t cop0_entrylo1;
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uint32_t cop0_context;
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uint32_t cop0_pagemask;
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uint32_t cop0_wired;
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uint32_t cop0_badvaddr;
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uint32_t cop0_count;
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uint32_t cop0_entryhi;
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uint32_t cop0_compare;
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uint32_t cop0_status;
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uint32_t cop0_cause;
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uint32_t cop0_epc;
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uint32_t cop0_prid;
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uint32_t cop0_config;
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uint32_t cop0_badpaddr;
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uint32_t cop0_debug;
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uint32_t cop0_perf;
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uint32_t cop0_taglo;
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uint32_t cop0_taghi;
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uint32_t cop0_errorepc;
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// LL/SC reservation state (not part of COP0 Status bits).
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uint32_t llbit;
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uint32_t lladdr;
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// Delay slot state tracking
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bool in_delay_slot;
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uint32_t branch_pc;
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// COP2 control registers (VU0 integer + control)
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uint32_t cop2_ccr[32];
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// FPU registers (COP1)
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float f[32];
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uint32_t fcr31; // Control/status register
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R5900Context()
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{
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std::memset(this, 0, sizeof(*this));
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// Initialize VU0 registers
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vu0_q = 1.0f; // Q register usually initialized to 1.0
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// Reset COP0 registers
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cop0_random = 47; // Start at maximum value
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// cop0_status = 0x400000; // BEV set, ERL clear, kernel mode
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// 0x00400000 = BEV (Boot Exception Vectors).
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// 0x00000000 = Normal mode (after BIOS handoff).
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cop0_status = 0x00000000;
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cop0_prid = 0x00002e20; // CPU ID for R5900
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in_delay_slot = false;
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branch_pc = 0;
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}
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void dump() const
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{
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std::ios_base::fmtflags flags = std::cout.flags();
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std::cout << std::hex << std::setfill('0');
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std::cout << "--- R5900 Context Dump ---\n";
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std::cout << "PC: 0x" << std::setw(8) << pc << "\n";
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std::cout << "HI: 0x" << std::setw(8) << hi << " LO: 0x" << std::setw(8) << lo << "\n";
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std::cout << "HI1:0x" << std::setw(8) << hi1 << " LO1:0x" << std::setw(8) << lo1 << "\n";
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std::cout << "SA: 0x" << std::setw(8) << sa << "\n";
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for (int i = 0; i < 32; ++i)
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{
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std::cout << "R" << std::setw(2) << std::dec << i << ": 0x" << std::hex
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<< std::setw(8) << static_cast<uint32_t>(_mm_extract_epi32(r[i], 3))
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<< std::setw(8) << static_cast<uint32_t>(_mm_extract_epi32(r[i], 2)) << "_"
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<< std::setw(8) << static_cast<uint32_t>(_mm_extract_epi32(r[i], 1))
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<< std::setw(8) << static_cast<uint32_t>(_mm_extract_epi32(r[i], 0)) << "\n";
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}
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std::cout << "Status: 0x" << std::setw(8) << cop0_status
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<< " Cause: 0x" << std::setw(8) << cop0_cause
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<< " EPC: 0x" << std::setw(8) << cop0_epc << "\n";
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std::cout << "--- End Context Dump ---\n";
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std::cout.flags(flags); // Restore format flags
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}
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~R5900Context() = default;
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};
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inline uint32_t getRegU32(const R5900Context *ctx, int reg)
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{
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// Check if reg is valid (0-31)
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if (reg < 0 || reg > 31)
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return 0;
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if (reg == 0)
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return 0;
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return static_cast<uint32_t>(_mm_extract_epi32(ctx->r[reg], 0));
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}
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inline void setReturnU32(R5900Context *ctx, uint32_t value)
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{
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// R5900 sign-extends 32-bit results into 64-bit GPR, even for unsigned values.
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ctx->r[2] = _mm_set_epi64x(0, static_cast<int64_t>(static_cast<int32_t>(value))); // $v0
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}
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inline void setReturnS32(R5900Context *ctx, int32_t value)
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{
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// Signed 32-bit return should be sign-extended when observed as 64-bit.
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ctx->r[2] = _mm_set_epi64x(0, static_cast<int64_t>(value)); // $v0
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}
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inline void setReturnU64(R5900Context *ctx, uint64_t value)
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{
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// Keep both conventions: full 64-bit value in $v0 and high 32-bit in $v1.
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ctx->r[2] = _mm_set_epi64x(0, static_cast<int64_t>(value));
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ctx->r[3] = _mm_set_epi64x(0, static_cast<int64_t>(static_cast<uint32_t>(value >> 32)));
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}
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inline constexpr uint32_t PS2_PATH_WATCH_ADDR = 0x01EFFFA0u;
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inline constexpr uint32_t PS2_PATH_WATCH_BYTES = 0x200u;
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inline constexpr uint32_t PS2_PATH_WATCH_MAX_LOGS = 4096u;
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inline std::atomic<uint32_t> g_ps2PathWatchLogCount{0};
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inline uint32_t ps2PathWatchPhysAddr()
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{
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return PS2_PATH_WATCH_ADDR & PS2_RAM_MASK;
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}
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inline bool ps2PathWatchIntersects(uint32_t writeAddr, uint32_t writeSize)
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{
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const uint64_t writeStart = writeAddr;
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const uint64_t writeEnd = writeStart + static_cast<uint64_t>(writeSize);
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const uint64_t watchStart = ps2PathWatchPhysAddr();
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const uint64_t watchEnd = watchStart + static_cast<uint64_t>(PS2_PATH_WATCH_BYTES);
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return writeEnd > watchStart && writeStart < watchEnd;
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}
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inline void ps2PathWatchDumpPrefix(const uint8_t *rdram)
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{
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if (!rdram)
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{
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return;
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}
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const uint32_t base = ps2PathWatchPhysAddr();
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auto flags = std::cout.flags();
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std::cout << " buf=" << std::hex;
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for (uint32_t i = 0; i < 16u; ++i)
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{
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const uint32_t addr = (base + i) & PS2_RAM_MASK;
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std::cout << static_cast<uint32_t>(rdram[addr]);
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if (i + 1u < 16u)
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{
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std::cout << '.';
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}
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}
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std::cout.flags(flags);
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}
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inline uint8_t ps2PathWatchExtractByteFromWrite(uint32_t writeAddr, uint32_t watchAddr, uint64_t valueLo, uint64_t valueHi)
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{
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const uint32_t byteIndex = watchAddr - writeAddr;
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if (byteIndex < 8u)
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{
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return static_cast<uint8_t>((valueLo >> (byteIndex * 8u)) & 0xFFu);
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}
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return static_cast<uint8_t>((valueHi >> ((byteIndex - 8u) * 8u)) & 0xFFu);
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}
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inline void ps2TraceGuestWrite(uint8_t *rdram,
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uint32_t guestAddr,
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uint32_t size,
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uint64_t valueLo,
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uint64_t valueHi,
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const char *op,
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const R5900Context *ctx)
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{
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if (!rdram || size == 0u)
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{
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return;
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}
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const uint32_t writeAddr = guestAddr & PS2_RAM_MASK;
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if (!ps2PathWatchIntersects(writeAddr, size))
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{
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return;
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}
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const uint32_t logIndex = g_ps2PathWatchLogCount.fetch_add(1, std::memory_order_relaxed);
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if (logIndex >= PS2_PATH_WATCH_MAX_LOGS)
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{
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return;
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}
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const uint32_t watchAddr = ps2PathWatchPhysAddr();
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const bool touchesFirstByte = (watchAddr >= writeAddr) && (watchAddr < writeAddr + size);
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const uint8_t oldByte = rdram[watchAddr];
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const uint8_t newByte = touchesFirstByte ? ps2PathWatchExtractByteFromWrite(writeAddr, watchAddr, valueLo, valueHi) : oldByte;
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const uint32_t pc = ctx ? ctx->pc : 0u;
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const uint32_t ra = ctx ? static_cast<uint32_t>(_mm_extract_epi32(ctx->r[31], 0)) : 0u;
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const uint32_t sp = ctx ? static_cast<uint32_t>(_mm_extract_epi32(ctx->r[29], 0)) : 0u;
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auto flags = std::cout.flags();
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std::cout << "[watch:path-write] #" << (logIndex + 1u)
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<< " op=" << op
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<< " addr=0x" << std::hex << writeAddr
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<< " size=0x" << size
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<< " pc=0x" << pc
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<< " ra=0x" << ra
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<< " sp=0x" << sp
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<< " vLo=0x" << valueLo;
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if (size > 8u)
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{
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std::cout << " vHi=0x" << valueHi;
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}
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if (touchesFirstByte)
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{
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std::cout << " firstByte:" << static_cast<uint32_t>(oldByte)
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<< "->" << static_cast<uint32_t>(newByte);
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if (oldByte != 0u && newByte == 0u)
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{
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std::cout << " (ZEROED)";
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}
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}
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ps2PathWatchDumpPrefix(rdram);
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std::cout.flags(flags);
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std::cout << std::endl;
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}
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inline void ps2TraceGuestRangeWrite(uint8_t *rdram,
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uint32_t guestAddr,
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uint32_t size,
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const char *op,
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const R5900Context *ctx)
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{
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if (!rdram || size == 0u)
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{
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return;
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}
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const uint32_t writeAddr = guestAddr & PS2_RAM_MASK;
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if (!ps2PathWatchIntersects(writeAddr, size))
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{
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return;
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}
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const uint32_t logIndex = g_ps2PathWatchLogCount.fetch_add(1, std::memory_order_relaxed);
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if (logIndex >= PS2_PATH_WATCH_MAX_LOGS)
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{
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return;
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}
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const uint32_t pc = ctx ? ctx->pc : 0u;
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const uint32_t ra = ctx ? static_cast<uint32_t>(_mm_extract_epi32(ctx->r[31], 0)) : 0u;
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const uint32_t sp = ctx ? static_cast<uint32_t>(_mm_extract_epi32(ctx->r[29], 0)) : 0u;
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const uint8_t firstByte = rdram[ps2PathWatchPhysAddr()];
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auto flags = std::cout.flags();
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std::cout << "[watch:path-range] #" << (logIndex + 1u)
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<< " op=" << op
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<< " addr=0x" << std::hex << writeAddr
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<< " size=0x" << size
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<< " pc=0x" << pc
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<< " ra=0x" << ra
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<< " sp=0x" << sp
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<< " firstByte=" << static_cast<uint32_t>(firstByte);
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ps2PathWatchDumpPrefix(rdram);
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std::cout.flags(flags);
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std::cout << std::endl;
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}
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class PS2Runtime
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{
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public:
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struct IoPaths
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{
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std::filesystem::path elfPath;
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std::filesystem::path elfDirectory;
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std::filesystem::path hostRoot;
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std::filesystem::path cdRoot;
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std::filesystem::path mcRoot;
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std::filesystem::path cdImage;
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};
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PS2Runtime();
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~PS2Runtime();
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bool initialize(const char *title = "PS2 Game");
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bool loadELF(const std::string &elfPath);
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void run();
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using RecompiledFunction = void (*)(uint8_t *, R5900Context *, PS2Runtime *);
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void registerFunction(uint32_t address, RecompiledFunction func);
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RecompiledFunction lookupFunction(uint32_t address);
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bool hasFunction(uint32_t address) const;
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static const IoPaths &getIoPaths();
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static void setIoPaths(const IoPaths &paths);
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static void configureIoPathsFromElf(const std::string &elfPath);
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void SignalException(R5900Context *ctx, PS2Exception exception);
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void executeVU0Microprogram(uint8_t *rdram, R5900Context *ctx, uint32_t address);
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void vu0StartMicroProgram(uint8_t *rdram, R5900Context *ctx, uint32_t address);
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public:
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void handleSyscall(uint8_t *rdram, R5900Context *ctx);
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void handleSyscall(uint8_t *rdram, R5900Context *ctx, uint32_t encodedSyscallId);
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void handleBreak(uint8_t *rdram, R5900Context *ctx);
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void handleTrap(uint8_t *rdram, R5900Context *ctx);
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void handleTLBR(uint8_t *rdram, R5900Context *ctx);
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void handleTLBWI(uint8_t *rdram, R5900Context *ctx);
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void handleTLBWR(uint8_t *rdram, R5900Context *ctx);
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void handleTLBP(uint8_t *rdram, R5900Context *ctx);
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void clearLLBit(R5900Context *ctx);
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void configureGuestHeap(uint32_t guestBase, uint32_t guestLimit = PS2_RAM_SIZE);
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uint32_t guestMalloc(uint32_t size, uint32_t alignment = 16u);
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uint32_t guestCalloc(uint32_t count, uint32_t size, uint32_t alignment = 16u);
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uint32_t guestRealloc(uint32_t guestAddr, uint32_t newSize, uint32_t alignment = 16u);
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void guestFree(uint32_t guestAddr);
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uint32_t guestHeapBase() const;
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uint32_t guestHeapEnd() const;
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void dispatchLoop(uint8_t *rdram, R5900Context *ctx);
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void requestStop();
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bool isStopRequested() const;
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uint8_t Load8(uint8_t *rdram, R5900Context *ctx, uint32_t vaddr);
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uint16_t Load16(uint8_t *rdram, R5900Context *ctx, uint32_t vaddr);
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uint32_t Load32(uint8_t *rdram, R5900Context *ctx, uint32_t vaddr);
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uint64_t Load64(uint8_t *rdram, R5900Context *ctx, uint32_t vaddr);
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__m128i Load128(uint8_t *rdram, R5900Context *ctx, uint32_t vaddr);
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void Store8(uint8_t *rdram, R5900Context *ctx, uint32_t vaddr, uint8_t value);
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void Store16(uint8_t *rdram, R5900Context *ctx, uint32_t vaddr, uint16_t value);
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void Store32(uint8_t *rdram, R5900Context *ctx, uint32_t vaddr, uint32_t value);
|
|
void Store64(uint8_t *rdram, R5900Context *ctx, uint32_t vaddr, uint64_t value);
|
|
void Store128(uint8_t *rdram, R5900Context *ctx, uint32_t vaddr, __m128i value);
|
|
|
|
static inline bool isSpecialAddress(uint32_t addr)
|
|
{
|
|
auto inRange = [](uint32_t value, uint32_t base, uint32_t size) -> bool
|
|
{
|
|
return (value - base) < size;
|
|
};
|
|
|
|
auto isPhysicalSpecial = [&](uint32_t physAddr) -> bool
|
|
{
|
|
if (inRange(physAddr, PS2_BIOS_BASE, PS2_BIOS_SIZE))
|
|
return true;
|
|
if (inRange(physAddr, PS2_SCRATCHPAD_BASE, PS2_SCRATCHPAD_SIZE))
|
|
return true;
|
|
if (inRange(physAddr, PS2_IO_BASE, PS2_IO_SIZE))
|
|
return true;
|
|
if (inRange(physAddr, PS2_GS_PRIV_REG_BASE, PS2_GS_PRIV_REG_SIZE))
|
|
return true;
|
|
if (physAddr >= PS2_VU0_CODE_BASE && physAddr < (PS2_VU1_DATA_BASE + PS2_VU1_DATA_SIZE))
|
|
return true;
|
|
return false;
|
|
};
|
|
|
|
// KSEG2/KSEG3 (TLB mapped)
|
|
if (addr >= 0xC0000000u)
|
|
return true;
|
|
|
|
// KSEG0/KSEG1 aliases → physical
|
|
const uint32_t physAddr = (addr >= 0x80000000u) ? (addr & 0x1FFFFFFFu) : addr;
|
|
return isPhysicalSpecial(physAddr);
|
|
}
|
|
|
|
public:
|
|
inline R5900Context &cpu() { return m_cpuContext; }
|
|
inline const R5900Context &cpu() const { return m_cpuContext; }
|
|
|
|
inline PS2Memory &memory() { return m_memory; }
|
|
inline const PS2Memory &memory() const { return m_memory; }
|
|
|
|
inline GS &gs() { return m_gs; }
|
|
inline const GS &gs() const { return m_gs; }
|
|
inline GifArbiter &gifArbiter() { return m_gifArbiter; }
|
|
inline const GifArbiter &gifArbiter() const { return m_gifArbiter; }
|
|
inline VU1Interpreter &vu1() { return m_vu1; }
|
|
inline const VU1Interpreter &vu1() const { return m_vu1; }
|
|
|
|
inline ps2_iop &iop() { return m_iop; }
|
|
inline const ps2_iop &iop() const { return m_iop; }
|
|
inline PS2AudioBackend &audioBackend() { return m_audioBackend; }
|
|
inline const PS2AudioBackend &audioBackend() const { return m_audioBackend; }
|
|
inline PSPadBackend &padBackend() { return m_padBackend; }
|
|
inline const PSPadBackend &padBackend() const { return m_padBackend; }
|
|
|
|
private:
|
|
struct GuestHeapBlock
|
|
{
|
|
uint32_t addr = 0;
|
|
uint32_t size = 0;
|
|
bool free = true;
|
|
};
|
|
|
|
static uint32_t alignGuestHeapValue(uint32_t value, uint32_t alignment);
|
|
static bool isGuestHeapAlignmentValid(uint32_t alignment);
|
|
static uint32_t normalizeGuestHeapAlignment(uint32_t alignment);
|
|
uint32_t clampGuestHeapBase(uint32_t guestBase) const;
|
|
uint32_t clampGuestHeapLimit(uint32_t guestLimit) const;
|
|
void resetGuestHeapLocked(uint32_t guestBase, uint32_t guestLimit);
|
|
void ensureGuestHeapInitializedLocked();
|
|
int32_t findGuestHeapBlockIndexLocked(uint32_t guestAddr) const;
|
|
uint32_t allocateGuestBlockLocked(uint32_t size, uint32_t alignment);
|
|
void freeGuestBlockLocked(uint32_t guestAddr);
|
|
void coalesceGuestHeapLocked();
|
|
|
|
void HandleIntegerOverflow(R5900Context *ctx);
|
|
|
|
private:
|
|
PS2Memory m_memory;
|
|
GifArbiter m_gifArbiter;
|
|
GS m_gs;
|
|
ps2_iop m_iop;
|
|
PS2AudioBackend m_audioBackend;
|
|
PSPadBackend m_padBackend;
|
|
VU1Interpreter m_vu1;
|
|
R5900Context m_cpuContext;
|
|
mutable std::mutex m_guestHeapMutex;
|
|
std::vector<GuestHeapBlock> m_guestHeapBlocks;
|
|
uint32_t m_guestHeapBase = 0x00100000u;
|
|
uint32_t m_guestHeapEnd = 0x00100000u;
|
|
uint32_t m_guestHeapLimit = PS2_RAM_SIZE;
|
|
uint32_t m_guestHeapSuggestedBase = 0x00100000u;
|
|
bool m_guestHeapConfigured = false;
|
|
|
|
std::unordered_map<uint32_t, RecompiledFunction> m_functionTable;
|
|
std::atomic<bool> m_stopRequested{false};
|
|
|
|
// TODO remove this later
|
|
std::atomic<uint32_t> m_debugPc{0};
|
|
std::atomic<uint32_t> m_debugRa{0};
|
|
std::atomic<uint32_t> m_debugSp{0};
|
|
std::atomic<uint32_t> m_debugGp{0};
|
|
|
|
struct LoadedModule
|
|
{
|
|
std::string name;
|
|
uint32_t baseAddress;
|
|
size_t size;
|
|
bool active;
|
|
};
|
|
|
|
std::vector<LoadedModule> m_loadedModules;
|
|
};
|
|
|
|
#endif // PS2_RUNTIME_H
|