#include "psprecomp/runtime.hpp" #include "generated_units.hpp" #include "vcs_resident_regions.hpp" #include #include #include #include namespace psprecomp { // PSPRECOMP_V811_COMPACT_DISPATCH: 64-slot occupancy masks + per-group base id. static constexpr std::uint64_t kEntryMasks_recomp_unit_0020[64] = { 0x828282C104026095ull, 0x5202428282828282ull, 0x60820122828282C1ull, 0x4141414141414141ull, 0x4141416082012141ull, 0x0121414141414141ull, 0x54809141414160A9ull, 0x60824048A0A0A0B0ull, 0xA0B0410091414141ull, 0xA0A0A0A0A0A0A0A0ull, 0xA0A0A0A0B0410090ull, 0xB0410090A0A0A0A0ull, 0xA0A0A0A0A0A0A0A0ull, 0xA0A0A0B0410090A0ull, 0x0090A0A0A0A0A0A0ull, 0xA0A0A0A0A0A0B041ull, 0xA0B0410090A0A0A0ull, 0xA0A0A0A0A0A0A0A0ull, 0xA0A0A0A0B0410090ull, 0x410090A0A0A0A0A0ull, 0xA0A0A0A0A0A0A0B0ull, 0xA0A0B0410090A0A0ull, 0x90A0A0A0A0A0A0A0ull, 0xA0A0A0A0A0B04100ull, 0xB0410090A0A0A0A0ull, 0xA0A0A0A0A0A0A0A0ull, 0xA0A0A0B0410090A0ull, 0x0090A0A0A0A0A0A0ull, 0xA0A0A0A0A0A0B041ull, 0xA0A0B0548090A0A0ull, 0x505050582A4048A0ull, 0x122828282C152024ull, 0x1414141414160820ull, 0x1608201214141414ull, 0x1414141414141414ull, 0x1414141608201214ull, 0x2012141414141414ull, 0x1414141414141608ull, 0x1414160820121414ull, 0x1214141414141414ull, 0x1414141414160820ull, 0x1608201214141414ull, 0x1414141414141414ull, 0x1414141608201214ull, 0x2012141414141414ull, 0x1414141414141608ull, 0x14160A9012141414ull, 0x0A0A0B0548091414ull, 0x4505050582A4048Aull, 0x0122828282C15202ull, 0x4141414141416082ull, 0x4160820121414141ull, 0x4141414141414141ull, 0x9141414160A90121ull, 0xA0A0A0A0A0B04100ull, 0xB0410090A0A0A0A0ull, 0xA0A0A0A0A0A0A0A0ull, 0xA0A0A0B0548090A0ull, 0x5050505058208048ull, 0x2080485050505050ull, 0x5050505050505058ull, 0x505050582A404850ull, 0x282828282C104024ull, 0x1040242828282828ull, }; static constexpr std::uint16_t kEntryBases_recomp_unit_0020[64] = { 1u, 18u, 34u, 50u, 66u, 81u, 96u, 115u, 131u, 147u, 163u, 178u, 193u, 209u, 224u, 238u, 255u, 270u, 286u, 301u, 315u, 332u, 347u, 363u, 378u, 393u, 409u, 424u, 438u, 455u, 472u, 489u, 506u, 521u, 536u, 552u, 567u, 582u, 598u, 613u, 629u, 644u, 659u, 675u, 690u, 705u, 721u, 738u, 755u, 773u, 789u, 805u, 820u, 836u, 854u, 869u, 884u, 900u, 917u, 932u, 946u, 963u, 980u, 995u, }; void recomp_unit_0020_entry(Runtime &rt, AllegrexContext &ctx, std::uint16_t direct_entry_id, GuestMemory::AotFastView &aot_mem) { // PSPRECOMP_AOT_REGCACHE_BEGIN // PSPRECOMP_AOT_REGCACHE_META gprs=5,4,6,7,31,8 fprs= gpr_occ=6789 fpr_occ=0 gpr_total=9324 fpr_total=0 std::uint32_t aot_gpr_5 = ctx.gpr[5]; std::uint32_t aot_gpr_4 = ctx.gpr[4]; std::uint32_t aot_gpr_6 = ctx.gpr[6]; std::uint32_t aot_gpr_7 = ctx.gpr[7]; std::uint32_t aot_gpr_31 = ctx.gpr[31]; std::uint32_t aot_gpr_8 = ctx.gpr[8]; bool aot_regcache_valid = true; #define AOT_REGCACHE_SYNC_OUT() do { if (aot_regcache_valid) { ctx.gpr[5] = aot_gpr_5; ctx.gpr[4] = aot_gpr_4; ctx.gpr[6] = aot_gpr_6; ctx.gpr[7] = aot_gpr_7; ctx.gpr[31] = aot_gpr_31; ctx.gpr[8] = aot_gpr_8; } } while (false) #define AOT_REGCACHE_SYNC_IN() do { if (aot_regcache_valid) { aot_gpr_5 = ctx.gpr[5]; aot_gpr_4 = ctx.gpr[4]; aot_gpr_6 = ctx.gpr[6]; aot_gpr_7 = ctx.gpr[7]; aot_gpr_31 = ctx.gpr[31]; aot_gpr_8 = ctx.gpr[8]; } } while (false) // PSPRECOMP_AOT_REGCACHE_END std::uint32_t jump_target = 0u; std::uint32_t local_transfers = 0u; std::uint32_t local_redispatch_rounds = 0u; std::uint32_t local_pc = ctx.pc; std::uint32_t entry_id = direct_entry_id; LOCAL_DISPATCH: { if (entry_id == 0u) { const std::uint32_t entry_delta = local_pc - 0x08854000u; entry_id = 0u; if (entry_delta < 16372u && (entry_delta & 3u) == 0u) { const std::uint32_t entry_slot = entry_delta >> 2u; const std::uint32_t entry_group = entry_slot >> 6u; const std::uint64_t entry_mask = kEntryMasks_recomp_unit_0020[entry_group]; const std::uint64_t entry_bit = 1ull << (entry_slot & 63u); if ((entry_mask & entry_bit) != 0u) { entry_id = static_cast( kEntryBases_recomp_unit_0020[entry_group] + std::popcount(entry_mask & (entry_bit - 1ull))); } } } switch (entry_id) { case 1u: goto L_08854000; case 2u: goto L_08854008; case 3u: goto L_08854010; case 4u: goto L_0885401C; case 5u: goto L_08854034; case 6u: goto L_08854038; case 7u: goto L_08854044; case 8u: goto L_08854068; case 9u: goto L_08854080; case 10u: goto L_08854098; case 11u: goto L_0885409C; case 12u: goto L_088540A4; case 13u: goto L_088540BC; case 14u: goto L_088540C4; case 15u: goto L_088540DC; case 16u: goto L_088540E4; case 17u: goto L_088540FC; case 18u: goto L_08854104; case 19u: goto L_0885411C; case 20u: goto L_08854124; case 21u: goto L_0885413C; case 22u: goto L_08854144; case 23u: goto L_0885415C; case 24u: goto L_08854164; case 25u: goto L_0885417C; case 26u: goto L_08854184; case 27u: goto L_0885419C; case 28u: goto L_088541A4; case 29u: goto L_088541B8; case 30u: goto L_088541C4; case 31u: goto L_088541E4; case 32u: goto L_088541F0; case 33u: goto L_088541F8; case 34u: goto L_08854200; case 35u: goto L_08854218; case 36u: goto L_0885421C; case 37u: goto L_08854224; case 38u: goto L_0885423C; case 39u: goto L_08854244; case 40u: goto L_0885425C; case 41u: goto L_08854264; case 42u: goto L_0885427C; case 43u: goto L_08854284; case 44u: goto L_08854294; case 45u: goto L_088542A0; case 46u: goto L_088542C4; case 47u: goto L_088542DC; case 48u: goto L_088542F4; case 49u: goto L_088542F8; case 50u: goto L_08854300; case 51u: goto L_08854318; case 52u: goto L_08854320; case 53u: goto L_08854338; case 54u: goto L_08854340; case 55u: goto L_08854358; case 56u: goto L_08854360; case 57u: goto L_08854378; case 58u: goto L_08854380; case 59u: goto L_08854398; case 60u: goto L_088543A0; case 61u: goto L_088543B8; case 62u: goto L_088543C0; case 63u: goto L_088543D8; case 64u: goto L_088543E0; case 65u: goto L_088543F8; case 66u: goto L_08854400; case 67u: goto L_08854418; case 68u: goto L_08854420; case 69u: goto L_08854434; case 70u: goto L_08854440; case 71u: goto L_08854464; case 72u: goto L_0885447C; case 73u: goto L_08854494; case 74u: goto L_08854498; case 75u: goto L_088544A0; case 76u: goto L_088544B8; case 77u: goto L_088544C0; case 78u: goto L_088544D8; case 79u: goto L_088544E0; case 80u: goto L_088544F8; case 81u: goto L_08854500; case 82u: goto L_08854518; case 83u: goto L_08854520; case 84u: goto L_08854538; case 85u: goto L_08854540; case 86u: goto L_08854558; case 87u: goto L_08854560; case 88u: goto L_08854578; case 89u: goto L_08854580; case 90u: goto L_08854598; case 91u: goto L_088545A0; case 92u: goto L_088545B8; case 93u: goto L_088545C0; case 94u: goto L_088545D4; case 95u: goto L_088545E0; case 96u: goto L_08854600; case 97u: goto L_0885460C; case 98u: goto L_08854614; case 99u: goto L_0885461C; case 100u: goto L_08854634; case 101u: goto L_08854638; case 102u: goto L_08854640; case 103u: goto L_08854658; case 104u: goto L_08854660; case 105u: goto L_08854678; case 106u: goto L_08854680; case 107u: goto L_08854698; case 108u: goto L_088546A0; case 109u: goto L_088546B0; case 110u: goto L_088546BC; case 111u: goto L_088546DC; case 112u: goto L_088546E8; case 113u: goto L_088546F0; case 114u: goto L_088546F8; case 115u: goto L_08854710; case 116u: goto L_08854714; case 117u: goto L_0885471C; case 118u: goto L_08854734; case 119u: goto L_0885473C; case 120u: goto L_08854754; case 121u: goto L_0885475C; case 122u: goto L_08854774; case 123u: goto L_0885477C; case 124u: goto L_0885478C; case 125u: goto L_08854798; case 126u: goto L_088547B8; case 127u: goto L_088547C4; case 128u: goto L_088547DC; case 129u: goto L_088547F4; case 130u: goto L_088547F8; case 131u: goto L_08854800; case 132u: goto L_08854818; case 133u: goto L_08854820; case 134u: goto L_08854838; case 135u: goto L_08854840; case 136u: goto L_08854858; case 137u: goto L_08854860; case 138u: goto L_08854870; case 139u: goto L_0885487C; case 140u: goto L_088548A0; case 141u: goto L_088548B8; case 142u: goto L_088548D0; case 143u: goto L_088548D4; case 144u: goto L_088548DC; case 145u: goto L_088548F4; case 146u: goto L_088548FC; case 147u: goto L_08854914; case 148u: goto L_0885491C; case 149u: goto L_08854934; case 150u: goto L_0885493C; case 151u: goto L_08854954; case 152u: goto L_0885495C; case 153u: goto L_08854974; case 154u: goto L_0885497C; case 155u: goto L_08854994; case 156u: goto L_0885499C; case 157u: goto L_088549B4; case 158u: goto L_088549BC; case 159u: goto L_088549D4; case 160u: goto L_088549DC; case 161u: goto L_088549F4; case 162u: goto L_088549FC; case 163u: goto L_08854A10; case 164u: goto L_08854A1C; case 165u: goto L_08854A40; case 166u: goto L_08854A58; case 167u: goto L_08854A70; case 168u: goto L_08854A74; case 169u: goto L_08854A7C; case 170u: goto L_08854A94; case 171u: goto L_08854A9C; case 172u: goto L_08854AB4; case 173u: goto L_08854ABC; case 174u: goto L_08854AD4; case 175u: goto L_08854ADC; case 176u: goto L_08854AF4; case 177u: goto L_08854AFC; case 178u: goto L_08854B14; case 179u: goto L_08854B1C; case 180u: goto L_08854B34; case 181u: goto L_08854B3C; case 182u: goto L_08854B54; case 183u: goto L_08854B5C; case 184u: goto L_08854B74; case 185u: goto L_08854B7C; case 186u: goto L_08854B90; case 187u: goto L_08854B9C; case 188u: goto L_08854BC0; case 189u: goto L_08854BD8; case 190u: goto L_08854BF0; case 191u: goto L_08854BF4; case 192u: goto L_08854BFC; case 193u: goto L_08854C14; case 194u: goto L_08854C1C; case 195u: goto L_08854C34; case 196u: goto L_08854C3C; case 197u: goto L_08854C54; case 198u: goto L_08854C5C; case 199u: goto L_08854C74; case 200u: goto L_08854C7C; case 201u: goto L_08854C94; case 202u: goto L_08854C9C; case 203u: goto L_08854CB4; case 204u: goto L_08854CBC; case 205u: goto L_08854CD4; case 206u: goto L_08854CDC; case 207u: goto L_08854CF4; case 208u: goto L_08854CFC; case 209u: goto L_08854D14; case 210u: goto L_08854D1C; case 211u: goto L_08854D30; case 212u: goto L_08854D3C; case 213u: goto L_08854D60; case 214u: goto L_08854D78; case 215u: goto L_08854D90; case 216u: goto L_08854D94; case 217u: goto L_08854D9C; case 218u: goto L_08854DB4; case 219u: goto L_08854DBC; case 220u: goto L_08854DD4; case 221u: goto L_08854DDC; case 222u: goto L_08854DF4; case 223u: goto L_08854DFC; case 224u: goto L_08854E14; case 225u: goto L_08854E1C; case 226u: goto L_08854E34; case 227u: goto L_08854E3C; case 228u: goto L_08854E54; case 229u: goto L_08854E5C; case 230u: goto L_08854E74; case 231u: goto L_08854E7C; case 232u: goto L_08854E94; case 233u: goto L_08854E9C; case 234u: goto L_08854EB4; case 235u: goto L_08854EBC; case 236u: goto L_08854ED0; case 237u: goto L_08854EDC; case 238u: goto L_08854F00; case 239u: goto L_08854F18; case 240u: goto L_08854F30; case 241u: goto L_08854F34; case 242u: goto L_08854F3C; case 243u: goto L_08854F54; case 244u: goto L_08854F5C; case 245u: goto L_08854F74; case 246u: goto L_08854F7C; case 247u: goto L_08854F94; case 248u: goto L_08854F9C; case 249u: goto L_08854FB4; case 250u: goto L_08854FBC; case 251u: goto L_08854FD4; case 252u: goto L_08854FDC; case 253u: goto L_08854FF4; case 254u: goto L_08854FFC; case 255u: goto L_08855014; case 256u: goto L_0885501C; case 257u: goto L_08855034; case 258u: goto L_0885503C; case 259u: goto L_08855054; case 260u: goto L_0885505C; case 261u: goto L_08855070; case 262u: goto L_0885507C; case 263u: goto L_088550A0; case 264u: goto L_088550B8; case 265u: goto L_088550D0; case 266u: goto L_088550D4; case 267u: goto L_088550DC; case 268u: goto L_088550F4; case 269u: goto L_088550FC; case 270u: goto L_08855114; case 271u: goto L_0885511C; case 272u: goto L_08855134; case 273u: goto L_0885513C; case 274u: goto L_08855154; case 275u: goto L_0885515C; case 276u: goto L_08855174; case 277u: goto L_0885517C; case 278u: goto L_08855194; case 279u: goto L_0885519C; case 280u: goto L_088551B4; case 281u: goto L_088551BC; case 282u: goto L_088551D4; case 283u: goto L_088551DC; case 284u: goto L_088551F4; case 285u: goto L_088551FC; case 286u: goto L_08855210; case 287u: goto L_0885521C; case 288u: goto L_08855240; case 289u: goto L_08855258; case 290u: goto L_08855270; case 291u: goto L_08855274; case 292u: goto L_0885527C; case 293u: goto L_08855294; case 294u: goto L_0885529C; case 295u: goto L_088552B4; case 296u: goto L_088552BC; case 297u: goto L_088552D4; case 298u: goto L_088552DC; case 299u: goto L_088552F4; case 300u: goto L_088552FC; case 301u: goto L_08855314; case 302u: goto L_0885531C; case 303u: goto L_08855334; case 304u: goto L_0885533C; case 305u: goto L_08855354; case 306u: goto L_0885535C; case 307u: goto L_08855374; case 308u: goto L_0885537C; case 309u: goto L_08855394; case 310u: goto L_0885539C; case 311u: goto L_088553B0; case 312u: goto L_088553BC; case 313u: goto L_088553E0; case 314u: goto L_088553F8; case 315u: goto L_08855410; case 316u: goto L_08855414; case 317u: goto L_0885541C; case 318u: goto L_08855434; case 319u: goto L_0885543C; case 320u: goto L_08855454; case 321u: goto L_0885545C; case 322u: goto L_08855474; case 323u: goto L_0885547C; case 324u: goto L_08855494; case 325u: goto L_0885549C; case 326u: goto L_088554B4; case 327u: goto L_088554BC; case 328u: goto L_088554D4; case 329u: goto L_088554DC; case 330u: goto L_088554F4; case 331u: goto L_088554FC; case 332u: goto L_08855514; case 333u: goto L_0885551C; case 334u: goto L_08855534; case 335u: goto L_0885553C; case 336u: goto L_08855550; case 337u: goto L_0885555C; case 338u: goto L_08855580; case 339u: goto L_08855598; case 340u: goto L_088555B0; case 341u: goto L_088555B4; case 342u: goto L_088555BC; case 343u: goto L_088555D4; case 344u: goto L_088555DC; case 345u: goto L_088555F4; case 346u: goto L_088555FC; case 347u: goto L_08855614; case 348u: goto L_0885561C; case 349u: goto L_08855634; case 350u: goto L_0885563C; case 351u: goto L_08855654; case 352u: goto L_0885565C; case 353u: goto L_08855674; case 354u: goto L_0885567C; case 355u: goto L_08855694; case 356u: goto L_0885569C; case 357u: goto L_088556B4; case 358u: goto L_088556BC; case 359u: goto L_088556D4; case 360u: goto L_088556DC; case 361u: goto L_088556F0; case 362u: goto L_088556FC; case 363u: goto L_08855720; case 364u: goto L_08855738; case 365u: goto L_08855750; case 366u: goto L_08855754; case 367u: goto L_0885575C; case 368u: goto L_08855774; case 369u: goto L_0885577C; case 370u: goto L_08855794; case 371u: goto L_0885579C; case 372u: goto L_088557B4; case 373u: goto L_088557BC; case 374u: goto L_088557D4; case 375u: goto L_088557DC; case 376u: goto L_088557F4; case 377u: goto L_088557FC; case 378u: goto L_08855814; case 379u: goto L_0885581C; case 380u: goto L_08855834; case 381u: goto L_0885583C; case 382u: goto L_08855854; case 383u: goto L_0885585C; case 384u: goto L_08855874; case 385u: goto L_0885587C; case 386u: goto L_08855890; case 387u: goto L_0885589C; case 388u: goto L_088558C0; case 389u: goto L_088558D8; case 390u: goto L_088558F0; case 391u: goto L_088558F4; case 392u: goto L_088558FC; case 393u: goto L_08855914; case 394u: goto L_0885591C; case 395u: goto L_08855934; case 396u: goto L_0885593C; case 397u: goto L_08855954; case 398u: goto L_0885595C; case 399u: goto L_08855974; case 400u: goto L_0885597C; case 401u: goto L_08855994; case 402u: goto L_0885599C; case 403u: goto L_088559B4; case 404u: goto L_088559BC; case 405u: goto L_088559D4; case 406u: goto L_088559DC; case 407u: goto L_088559F4; case 408u: goto L_088559FC; case 409u: goto L_08855A14; case 410u: goto L_08855A1C; case 411u: goto L_08855A30; case 412u: goto L_08855A3C; case 413u: goto L_08855A60; case 414u: goto L_08855A78; case 415u: goto L_08855A90; case 416u: goto L_08855A94; case 417u: goto L_08855A9C; case 418u: goto L_08855AB4; case 419u: goto L_08855ABC; case 420u: goto L_08855AD4; case 421u: goto L_08855ADC; case 422u: goto L_08855AF4; case 423u: goto L_08855AFC; case 424u: goto L_08855B14; case 425u: goto L_08855B1C; case 426u: goto L_08855B34; case 427u: goto L_08855B3C; case 428u: goto L_08855B54; case 429u: goto L_08855B5C; case 430u: goto L_08855B74; case 431u: goto L_08855B7C; case 432u: goto L_08855B94; case 433u: goto L_08855B9C; case 434u: goto L_08855BB4; case 435u: goto L_08855BBC; case 436u: goto L_08855BD0; case 437u: goto L_08855BDC; case 438u: goto L_08855C00; case 439u: goto L_08855C18; case 440u: goto L_08855C30; case 441u: goto L_08855C34; case 442u: goto L_08855C3C; case 443u: goto L_08855C54; case 444u: goto L_08855C5C; case 445u: goto L_08855C74; case 446u: goto L_08855C7C; case 447u: goto L_08855C94; case 448u: goto L_08855C9C; case 449u: goto L_08855CB4; case 450u: goto L_08855CBC; case 451u: goto L_08855CD4; case 452u: goto L_08855CDC; case 453u: goto L_08855CF4; case 454u: goto L_08855CFC; case 455u: goto L_08855D14; case 456u: goto L_08855D1C; case 457u: goto L_08855D34; case 458u: goto L_08855D3C; case 459u: goto L_08855D50; case 460u: goto L_08855D5C; case 461u: goto L_08855D7C; case 462u: goto L_08855D88; case 463u: goto L_08855D90; case 464u: goto L_08855D98; case 465u: goto L_08855DB0; case 466u: goto L_08855DB4; case 467u: goto L_08855DBC; case 468u: goto L_08855DD4; case 469u: goto L_08855DDC; case 470u: goto L_08855DF4; case 471u: goto L_08855DFC; case 472u: goto L_08855E14; case 473u: goto L_08855E1C; case 474u: goto L_08855E2C; case 475u: goto L_08855E38; case 476u: goto L_08855E58; case 477u: goto L_08855E64; case 478u: goto L_08855E6C; case 479u: goto L_08855E74; case 480u: goto L_08855E8C; case 481u: goto L_08855E90; case 482u: goto L_08855E98; case 483u: goto L_08855EB0; case 484u: goto L_08855EB8; case 485u: goto L_08855ED0; case 486u: goto L_08855ED8; case 487u: goto L_08855EF0; case 488u: goto L_08855EF8; case 489u: goto L_08855F08; case 490u: goto L_08855F14; case 491u: goto L_08855F34; case 492u: goto L_08855F40; case 493u: goto L_08855F48; case 494u: goto L_08855F50; case 495u: goto L_08855F68; case 496u: goto L_08855F6C; case 497u: goto L_08855F74; case 498u: goto L_08855F8C; case 499u: goto L_08855F94; case 500u: goto L_08855FAC; case 501u: goto L_08855FB4; case 502u: goto L_08855FCC; case 503u: goto L_08855FD4; case 504u: goto L_08855FE4; case 505u: goto L_08855FF0; case 506u: goto L_08856014; case 507u: goto L_0885602C; case 508u: goto L_08856044; case 509u: goto L_08856048; case 510u: goto L_08856050; case 511u: goto L_08856068; case 512u: goto L_08856070; case 513u: goto L_08856088; case 514u: goto L_08856090; case 515u: goto L_088560A8; case 516u: goto L_088560B0; case 517u: goto L_088560C8; case 518u: goto L_088560D0; case 519u: goto L_088560E8; case 520u: goto L_088560F0; case 521u: goto L_08856108; case 522u: goto L_08856110; case 523u: goto L_08856128; case 524u: goto L_08856130; case 525u: goto L_08856148; case 526u: goto L_08856150; case 527u: goto L_08856168; case 528u: goto L_08856170; case 529u: goto L_08856184; case 530u: goto L_08856190; case 531u: goto L_088561B4; case 532u: goto L_088561CC; case 533u: goto L_088561E4; case 534u: goto L_088561E8; case 535u: goto L_088561F0; case 536u: goto L_08856208; case 537u: goto L_08856210; case 538u: goto L_08856228; case 539u: goto L_08856230; case 540u: goto L_08856248; case 541u: goto L_08856250; case 542u: goto L_08856268; case 543u: goto L_08856270; case 544u: goto L_08856288; case 545u: goto L_08856290; case 546u: goto L_088562A8; case 547u: goto L_088562B0; case 548u: goto L_088562C8; case 549u: goto L_088562D0; case 550u: goto L_088562E8; case 551u: goto L_088562F0; case 552u: goto L_08856308; case 553u: goto L_08856310; case 554u: goto L_08856324; case 555u: goto L_08856330; case 556u: goto L_08856354; case 557u: goto L_0885636C; case 558u: goto L_08856384; case 559u: goto L_08856388; case 560u: goto L_08856390; case 561u: goto L_088563A8; case 562u: goto L_088563B0; case 563u: goto L_088563C8; case 564u: goto L_088563D0; case 565u: goto L_088563E8; case 566u: goto L_088563F0; case 567u: goto L_08856408; case 568u: goto L_08856410; case 569u: goto L_08856428; case 570u: goto L_08856430; case 571u: goto L_08856448; case 572u: goto L_08856450; case 573u: goto L_08856468; case 574u: goto L_08856470; case 575u: goto L_08856488; case 576u: goto L_08856490; case 577u: goto L_088564A8; case 578u: goto L_088564B0; case 579u: goto L_088564C4; case 580u: goto L_088564D0; case 581u: goto L_088564F4; case 582u: goto L_0885650C; case 583u: goto L_08856524; case 584u: goto L_08856528; case 585u: goto L_08856530; case 586u: goto L_08856548; case 587u: goto L_08856550; case 588u: goto L_08856568; case 589u: goto L_08856570; case 590u: goto L_08856588; case 591u: goto L_08856590; case 592u: goto L_088565A8; case 593u: goto L_088565B0; case 594u: goto L_088565C8; case 595u: goto L_088565D0; case 596u: goto L_088565E8; case 597u: goto L_088565F0; case 598u: goto L_08856608; case 599u: goto L_08856610; case 600u: goto L_08856628; case 601u: goto L_08856630; case 602u: goto L_08856644; case 603u: goto L_08856650; case 604u: goto L_08856674; case 605u: goto L_0885668C; case 606u: goto L_088566A4; case 607u: goto L_088566A8; case 608u: goto L_088566B0; case 609u: goto L_088566C8; case 610u: goto L_088566D0; case 611u: goto L_088566E8; case 612u: goto L_088566F0; case 613u: goto L_08856708; case 614u: goto L_08856710; case 615u: goto L_08856728; case 616u: goto L_08856730; case 617u: goto L_08856748; case 618u: goto L_08856750; case 619u: goto L_08856768; case 620u: goto L_08856770; case 621u: goto L_08856788; case 622u: goto L_08856790; case 623u: goto L_088567A8; case 624u: goto L_088567B0; case 625u: goto L_088567C8; case 626u: goto L_088567D0; case 627u: goto L_088567E4; case 628u: goto L_088567F0; case 629u: goto L_08856814; case 630u: goto L_0885682C; case 631u: goto L_08856844; case 632u: goto L_08856848; case 633u: goto L_08856850; case 634u: goto L_08856868; case 635u: goto L_08856870; case 636u: goto L_08856888; case 637u: goto L_08856890; case 638u: goto L_088568A8; case 639u: goto L_088568B0; case 640u: goto L_088568C8; case 641u: goto L_088568D0; case 642u: goto L_088568E8; case 643u: goto L_088568F0; case 644u: goto L_08856908; case 645u: goto L_08856910; case 646u: goto L_08856928; case 647u: goto L_08856930; case 648u: goto L_08856948; case 649u: goto L_08856950; case 650u: goto L_08856968; case 651u: goto L_08856970; case 652u: goto L_08856984; case 653u: goto L_08856990; case 654u: goto L_088569B4; case 655u: goto L_088569CC; case 656u: goto L_088569E4; case 657u: goto L_088569E8; case 658u: goto L_088569F0; case 659u: goto L_08856A08; case 660u: goto L_08856A10; case 661u: goto L_08856A28; case 662u: goto L_08856A30; case 663u: goto L_08856A48; case 664u: goto L_08856A50; case 665u: goto L_08856A68; case 666u: goto L_08856A70; case 667u: goto L_08856A88; case 668u: goto L_08856A90; case 669u: goto L_08856AA8; case 670u: goto L_08856AB0; case 671u: goto L_08856AC8; case 672u: goto L_08856AD0; case 673u: goto L_08856AE8; case 674u: goto L_08856AF0; case 675u: goto L_08856B08; case 676u: goto L_08856B10; case 677u: goto L_08856B24; case 678u: goto L_08856B30; case 679u: goto L_08856B54; case 680u: goto L_08856B6C; case 681u: goto L_08856B84; case 682u: goto L_08856B88; case 683u: goto L_08856B90; case 684u: goto L_08856BA8; case 685u: goto L_08856BB0; case 686u: goto L_08856BC8; case 687u: goto L_08856BD0; case 688u: goto L_08856BE8; case 689u: goto L_08856BF0; case 690u: goto L_08856C08; case 691u: goto L_08856C10; case 692u: goto L_08856C28; case 693u: goto L_08856C30; case 694u: goto L_08856C48; case 695u: goto L_08856C50; case 696u: goto L_08856C68; case 697u: goto L_08856C70; case 698u: goto L_08856C88; case 699u: goto L_08856C90; case 700u: goto L_08856CA8; case 701u: goto L_08856CB0; case 702u: goto L_08856CC4; case 703u: goto L_08856CD0; case 704u: goto L_08856CF4; case 705u: goto L_08856D0C; case 706u: goto L_08856D24; case 707u: goto L_08856D28; case 708u: goto L_08856D30; case 709u: goto L_08856D48; case 710u: goto L_08856D50; case 711u: goto L_08856D68; case 712u: goto L_08856D70; case 713u: goto L_08856D88; case 714u: goto L_08856D90; case 715u: goto L_08856DA8; case 716u: goto L_08856DB0; case 717u: goto L_08856DC8; case 718u: goto L_08856DD0; case 719u: goto L_08856DE8; case 720u: goto L_08856DF0; case 721u: goto L_08856E08; case 722u: goto L_08856E10; case 723u: goto L_08856E28; case 724u: goto L_08856E30; case 725u: goto L_08856E48; case 726u: goto L_08856E50; case 727u: goto L_08856E64; case 728u: goto L_08856E70; case 729u: goto L_08856E90; case 730u: goto L_08856E9C; case 731u: goto L_08856EA4; case 732u: goto L_08856EAC; case 733u: goto L_08856EC4; case 734u: goto L_08856EC8; case 735u: goto L_08856ED0; case 736u: goto L_08856EE8; case 737u: goto L_08856EF0; case 738u: goto L_08856F08; case 739u: goto L_08856F10; case 740u: goto L_08856F28; case 741u: goto L_08856F30; case 742u: goto L_08856F40; case 743u: goto L_08856F4C; case 744u: goto L_08856F6C; case 745u: goto L_08856F78; case 746u: goto L_08856F80; case 747u: goto L_08856F88; case 748u: goto L_08856FA0; case 749u: goto L_08856FA4; case 750u: goto L_08856FAC; case 751u: goto L_08856FC4; case 752u: goto L_08856FCC; case 753u: goto L_08856FE4; case 754u: goto L_08856FEC; case 755u: goto L_08857004; case 756u: goto L_0885700C; case 757u: goto L_0885701C; case 758u: goto L_08857028; case 759u: goto L_08857048; case 760u: goto L_08857054; case 761u: goto L_0885705C; case 762u: goto L_08857064; case 763u: goto L_0885707C; case 764u: goto L_08857080; case 765u: goto L_08857088; case 766u: goto L_088570A0; case 767u: goto L_088570A8; case 768u: goto L_088570C0; case 769u: goto L_088570C8; case 770u: goto L_088570E0; case 771u: goto L_088570E8; case 772u: goto L_088570F8; case 773u: goto L_08857104; case 774u: goto L_08857124; case 775u: goto L_08857130; case 776u: goto L_08857138; case 777u: goto L_08857140; case 778u: goto L_08857158; case 779u: goto L_0885715C; case 780u: goto L_08857164; case 781u: goto L_0885717C; case 782u: goto L_08857184; case 783u: goto L_0885719C; case 784u: goto L_088571A4; case 785u: goto L_088571BC; case 786u: goto L_088571C4; case 787u: goto L_088571D4; case 788u: goto L_088571E0; case 789u: goto L_08857204; case 790u: goto L_0885721C; case 791u: goto L_08857234; case 792u: goto L_08857238; case 793u: goto L_08857240; case 794u: goto L_08857258; case 795u: goto L_08857260; case 796u: goto L_08857278; case 797u: goto L_08857280; case 798u: goto L_08857298; case 799u: goto L_088572A0; case 800u: goto L_088572B8; case 801u: goto L_088572C0; case 802u: goto L_088572D8; case 803u: goto L_088572E0; case 804u: goto L_088572F8; case 805u: goto L_08857300; case 806u: goto L_08857318; case 807u: goto L_08857320; case 808u: goto L_08857338; case 809u: goto L_08857340; case 810u: goto L_08857358; case 811u: goto L_08857360; case 812u: goto L_08857374; case 813u: goto L_08857380; case 814u: goto L_088573A4; case 815u: goto L_088573BC; case 816u: goto L_088573D4; case 817u: goto L_088573D8; case 818u: goto L_088573E0; case 819u: goto L_088573F8; case 820u: goto L_08857400; case 821u: goto L_08857418; case 822u: goto L_08857420; case 823u: goto L_08857438; case 824u: goto L_08857440; case 825u: goto L_08857458; case 826u: goto L_08857460; case 827u: goto L_08857478; case 828u: goto L_08857480; case 829u: goto L_08857498; case 830u: goto L_088574A0; case 831u: goto L_088574B8; case 832u: goto L_088574C0; case 833u: goto L_088574D8; case 834u: goto L_088574E0; case 835u: goto L_088574F8; case 836u: goto L_08857500; case 837u: goto L_08857514; case 838u: goto L_08857520; case 839u: goto L_08857540; case 840u: goto L_0885754C; case 841u: goto L_08857554; case 842u: goto L_0885755C; case 843u: goto L_08857574; case 844u: goto L_08857578; case 845u: goto L_08857580; case 846u: goto L_08857598; case 847u: goto L_088575A0; case 848u: goto L_088575B8; case 849u: goto L_088575C0; case 850u: goto L_088575D8; case 851u: goto L_088575E0; case 852u: goto L_088575F0; case 853u: goto L_088575FC; case 854u: goto L_08857620; case 855u: goto L_08857638; case 856u: goto L_08857650; case 857u: goto L_08857654; case 858u: goto L_0885765C; case 859u: goto L_08857674; case 860u: goto L_0885767C; case 861u: goto L_08857694; case 862u: goto L_0885769C; case 863u: goto L_088576B4; case 864u: goto L_088576BC; case 865u: goto L_088576D4; case 866u: goto L_088576DC; case 867u: goto L_088576F4; case 868u: goto L_088576FC; case 869u: goto L_08857714; case 870u: goto L_0885771C; case 871u: goto L_08857734; case 872u: goto L_0885773C; case 873u: goto L_08857754; case 874u: goto L_0885775C; case 875u: goto L_08857774; case 876u: goto L_0885777C; case 877u: goto L_08857790; case 878u: goto L_0885779C; case 879u: goto L_088577C0; case 880u: goto L_088577D8; case 881u: goto L_088577F0; case 882u: goto L_088577F4; case 883u: goto L_088577FC; case 884u: goto L_08857814; case 885u: goto L_0885781C; case 886u: goto L_08857834; case 887u: goto L_0885783C; case 888u: goto L_08857854; case 889u: goto L_0885785C; case 890u: goto L_08857874; case 891u: goto L_0885787C; case 892u: goto L_08857894; case 893u: goto L_0885789C; case 894u: goto L_088578B4; case 895u: goto L_088578BC; case 896u: goto L_088578D4; case 897u: goto L_088578DC; case 898u: goto L_088578F4; case 899u: goto L_088578FC; case 900u: goto L_08857914; case 901u: goto L_0885791C; case 902u: goto L_08857930; case 903u: goto L_0885793C; case 904u: goto L_0885795C; case 905u: goto L_08857968; case 906u: goto L_08857970; case 907u: goto L_08857978; case 908u: goto L_08857990; case 909u: goto L_08857994; case 910u: goto L_0885799C; case 911u: goto L_088579B4; case 912u: goto L_088579BC; case 913u: goto L_088579D4; case 914u: goto L_088579DC; case 915u: goto L_088579F4; case 916u: goto L_088579FC; case 917u: goto L_08857A0C; case 918u: goto L_08857A18; case 919u: goto L_08857A3C; case 920u: goto L_08857A54; case 921u: goto L_08857A6C; case 922u: goto L_08857A70; case 923u: goto L_08857A78; case 924u: goto L_08857A90; case 925u: goto L_08857A98; case 926u: goto L_08857AB0; case 927u: goto L_08857AB8; case 928u: goto L_08857AD0; case 929u: goto L_08857AD8; case 930u: goto L_08857AF0; case 931u: goto L_08857AF8; case 932u: goto L_08857B10; case 933u: goto L_08857B18; case 934u: goto L_08857B30; case 935u: goto L_08857B38; case 936u: goto L_08857B50; case 937u: goto L_08857B58; case 938u: goto L_08857B70; case 939u: goto L_08857B78; case 940u: goto L_08857B90; case 941u: goto L_08857B98; case 942u: goto L_08857BAC; case 943u: goto L_08857BB8; case 944u: goto L_08857BDC; case 945u: goto L_08857BF4; case 946u: goto L_08857C0C; case 947u: goto L_08857C10; case 948u: goto L_08857C18; case 949u: goto L_08857C30; case 950u: goto L_08857C38; case 951u: goto L_08857C50; case 952u: goto L_08857C58; case 953u: goto L_08857C70; case 954u: goto L_08857C78; case 955u: goto L_08857C90; case 956u: goto L_08857C98; case 957u: goto L_08857CB0; case 958u: goto L_08857CB8; case 959u: goto L_08857CD0; case 960u: goto L_08857CD8; case 961u: goto L_08857CF0; case 962u: goto L_08857CF8; case 963u: goto L_08857D10; case 964u: goto L_08857D18; case 965u: goto L_08857D2C; case 966u: goto L_08857D38; case 967u: goto L_08857D58; case 968u: goto L_08857D64; case 969u: goto L_08857D6C; case 970u: goto L_08857D74; case 971u: goto L_08857D8C; case 972u: goto L_08857D90; case 973u: goto L_08857D98; case 974u: goto L_08857DB0; case 975u: goto L_08857DB8; case 976u: goto L_08857DD0; case 977u: goto L_08857DD8; case 978u: goto L_08857DF0; case 979u: goto L_08857DF8; case 980u: goto L_08857E08; case 981u: goto L_08857E14; case 982u: goto L_08857E38; case 983u: goto L_08857E50; case 984u: goto L_08857E68; case 985u: goto L_08857E6C; case 986u: goto L_08857E74; case 987u: goto L_08857E8C; case 988u: goto L_08857E94; case 989u: goto L_08857EAC; case 990u: goto L_08857EB4; case 991u: goto L_08857ECC; case 992u: goto L_08857ED4; case 993u: goto L_08857EEC; case 994u: goto L_08857EF4; case 995u: goto L_08857F0C; case 996u: goto L_08857F14; case 997u: goto L_08857F2C; case 998u: goto L_08857F34; case 999u: goto L_08857F4C; case 1000u: goto L_08857F54; case 1001u: goto L_08857F6C; case 1002u: goto L_08857F74; case 1003u: goto L_08857F8C; case 1004u: goto L_08857F94; case 1005u: goto L_08857FA8; case 1006u: goto L_08857FB4; case 1007u: goto L_08857FD8; case 1008u: goto L_08857FF0; default: if (local_transfers == 0u) rt.unsupported(ctx.pc, 0u, "invalid internal function entry"); else ctx.pc = local_pc; AOT_REGCACHE_SYNC_OUT(); return; } } // PSPRECOMP_V813_SHARED_JR_DISPATCH: one dynamic-JR reject/redispatch path per unit. LOCAL_JR_DISPATCH: { const std::uint32_t local_delta_v813 = jump_target - 0x08854000u; if (local_delta_v813 >= 16372u || (local_delta_v813 & 3u) != 0u) { ctx.pc = jump_target; AOT_REGCACHE_SYNC_OUT(); // PSPRECOMP_V814_CONTINUATION_RETURN Runtime::AotTailContinuation aot_cont_v814{}; if (rt.take_aot_tail_continuation(jump_target, aot_cont_v814)) { #if defined(__clang__) && defined(PSPRECOMP_AOT_PRODUCTION_FASTPATHS) [[clang::musttail]] return aot_cont_v814.function( rt, ctx, aot_cont_v814.entry_id, aot_mem); #else aot_cont_v814.function(rt, ctx, aot_cont_v814.entry_id, aot_mem); return; #endif } return; } } local_pc = jump_target; entry_id = 0u; goto LOCAL_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_BLOCK: one scheduler-exact slow boundary per unit. LOCAL_SCHED_BOUNDARY: ctx.pc = jump_target; AOT_REGCACHE_SYNC_OUT(); if (local_redispatch_rounds < 7u && rt.continue_generated_local_dispatch(ctx)) { ++local_redispatch_rounds; AOT_REGCACHE_SYNC_IN(); local_transfers = 0u; local_pc = ctx.pc; entry_id = 0u; goto LOCAL_DISPATCH; } return; L_08854000: aot_gpr_31 = (0x08854008u); aot_gpr_5 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854008u) goto L_08854008; AOT_REGCACHE_SYNC_OUT(); return; L_08854008: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08854038; } goto L_08854010; } L_08854010: aot_gpr_7 = (0u | 140u); { const bool branch_taken = aot_gpr_6 != aot_gpr_7; if (branch_taken) { (void)([&]() { AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_chained_trusted_direct<&recomp_unit_0019_entry, 19u, 1016u, 0x08853FF8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()); AOT_REGCACHE_SYNC_OUT(); return; } goto L_0885401C; } L_0885401C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1556u); aot_gpr_31 = (0x08854034u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854034u) goto L_08854034; AOT_REGCACHE_SYNC_OUT(); return; L_08854034: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08854038; L_08854038: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08854044: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_088541A4; } goto L_08854068; } L_08854068: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(25048))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08854080: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1659u); aot_gpr_31 = (0x08854098u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854098u) goto L_08854098; AOT_REGCACHE_SYNC_OUT(); return; L_08854098: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_0885409C; L_0885409C: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_088541B8; } goto L_088540A4; } L_088540A4: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1661u); aot_gpr_31 = (0x088540BCu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088540BCu) goto L_088540BC; AOT_REGCACHE_SYNC_OUT(); return; L_088540BC: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_0885409C; } goto L_088540C4; } L_088540C4: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1653u); aot_gpr_31 = (0x088540DCu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088540DCu) goto L_088540DC; AOT_REGCACHE_SYNC_OUT(); return; L_088540DC: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_0885409C; } goto L_088540E4; } L_088540E4: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1648u); aot_gpr_31 = (0x088540FCu); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088540FCu) goto L_088540FC; AOT_REGCACHE_SYNC_OUT(); return; L_088540FC: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_0885409C; } goto L_08854104; } L_08854104: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1646u); aot_gpr_31 = (0x0885411Cu); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x0885411Cu) goto L_0885411C; AOT_REGCACHE_SYNC_OUT(); return; L_0885411C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_0885409C; } goto L_08854124; } L_08854124: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1650u); aot_gpr_31 = (0x0885413Cu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x0885413Cu) goto L_0885413C; AOT_REGCACHE_SYNC_OUT(); return; L_0885413C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_0885409C; } goto L_08854144; } L_08854144: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1664u); aot_gpr_31 = (0x0885415Cu); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x0885415Cu) goto L_0885415C; AOT_REGCACHE_SYNC_OUT(); return; L_0885415C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_0885409C; } goto L_08854164; } L_08854164: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1643u); aot_gpr_31 = (0x0885417Cu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x0885417Cu) goto L_0885417C; AOT_REGCACHE_SYNC_OUT(); return; L_0885417C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_0885409C; } goto L_08854184; } L_08854184: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1656u); aot_gpr_31 = (0x0885419Cu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x0885419Cu) goto L_0885419C; AOT_REGCACHE_SYNC_OUT(); return; L_0885419C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_0885409C; } goto L_088541A4; } L_088541A4: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x088541B8u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088541B8u) goto L_088541B8; AOT_REGCACHE_SYNC_OUT(); return; L_088541B8: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088541C4: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (2237u << 16u); aot_gpr_6 = (aot_gpr_6 & 65535u); aot_gpr_7 = (0u | 159u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08854264; } goto L_088541E4; } L_088541E4: aot_gpr_7 = (0u | 143u); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 137u); if (branch_taken) { goto L_08854244; } goto L_088541F0; } L_088541F0: { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 119u); if (branch_taken) { goto L_08854224; } goto L_088541F8; } L_088541F8: { const bool branch_taken = aot_gpr_6 != aot_gpr_7; if (branch_taken) { goto L_08854284; } goto L_08854200; } L_08854200: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1669u); aot_gpr_31 = (0x08854218u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854218u) goto L_08854218; AOT_REGCACHE_SYNC_OUT(); return; L_08854218: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_0885421C; L_0885421C: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08854294; } goto L_08854224; } L_08854224: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1667u); aot_gpr_31 = (0x0885423Cu); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x0885423Cu) goto L_0885423C; AOT_REGCACHE_SYNC_OUT(); return; L_0885423C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_0885421C; } goto L_08854244; } L_08854244: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1665u); aot_gpr_31 = (0x0885425Cu); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x0885425Cu) goto L_0885425C; AOT_REGCACHE_SYNC_OUT(); return; L_0885425C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_0885421C; } goto L_08854264; } L_08854264: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1671u); aot_gpr_31 = (0x0885427Cu); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x0885427Cu) goto L_0885427C; AOT_REGCACHE_SYNC_OUT(); return; L_0885427C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_0885421C; } goto L_08854284; } L_08854284: aot_gpr_7 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_31 = (0x08854294u); aot_gpr_5 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854294u) goto L_08854294; AOT_REGCACHE_SYNC_OUT(); return; L_08854294: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088542A0: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08854420; } goto L_088542C4; } L_088542C4: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(25216))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088542DC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1692u); aot_gpr_31 = (0x088542F4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088542F4u) goto L_088542F4; AOT_REGCACHE_SYNC_OUT(); return; L_088542F4: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_088542F8; L_088542F8: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08854434; } goto L_08854300; } L_08854300: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1694u); aot_gpr_31 = (0x08854318u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854318u) goto L_08854318; AOT_REGCACHE_SYNC_OUT(); return; L_08854318: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088542F8; } goto L_08854320; } L_08854320: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1686u); aot_gpr_31 = (0x08854338u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854338u) goto L_08854338; AOT_REGCACHE_SYNC_OUT(); return; L_08854338: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088542F8; } goto L_08854340; } L_08854340: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1682u); aot_gpr_31 = (0x08854358u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854358u) goto L_08854358; AOT_REGCACHE_SYNC_OUT(); return; L_08854358: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088542F8; } goto L_08854360; } L_08854360: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1680u); aot_gpr_31 = (0x08854378u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854378u) goto L_08854378; AOT_REGCACHE_SYNC_OUT(); return; L_08854378: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088542F8; } goto L_08854380; } L_08854380: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1684u); aot_gpr_31 = (0x08854398u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854398u) goto L_08854398; AOT_REGCACHE_SYNC_OUT(); return; L_08854398: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088542F8; } goto L_088543A0; } L_088543A0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1697u); aot_gpr_31 = (0x088543B8u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088543B8u) goto L_088543B8; AOT_REGCACHE_SYNC_OUT(); return; L_088543B8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088542F8; } goto L_088543C0; } L_088543C0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1673u); aot_gpr_31 = (0x088543D8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088543D8u) goto L_088543D8; AOT_REGCACHE_SYNC_OUT(); return; L_088543D8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088542F8; } goto L_088543E0; } L_088543E0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1676u); aot_gpr_31 = (0x088543F8u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088543F8u) goto L_088543F8; AOT_REGCACHE_SYNC_OUT(); return; L_088543F8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088542F8; } goto L_08854400; } L_08854400: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1689u); aot_gpr_31 = (0x08854418u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854418u) goto L_08854418; AOT_REGCACHE_SYNC_OUT(); return; L_08854418: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088542F8; } goto L_08854420; } L_08854420: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08854434u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854434u) goto L_08854434; AOT_REGCACHE_SYNC_OUT(); return; L_08854434: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08854440: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_088545C0; } goto L_08854464; } L_08854464: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(25384))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_0885447C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1719u); aot_gpr_31 = (0x08854494u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854494u) goto L_08854494; AOT_REGCACHE_SYNC_OUT(); return; L_08854494: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08854498; L_08854498: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_088545D4; } goto L_088544A0; } L_088544A0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1721u); aot_gpr_31 = (0x088544B8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088544B8u) goto L_088544B8; AOT_REGCACHE_SYNC_OUT(); return; L_088544B8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854498; } goto L_088544C0; } L_088544C0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1713u); aot_gpr_31 = (0x088544D8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088544D8u) goto L_088544D8; AOT_REGCACHE_SYNC_OUT(); return; L_088544D8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854498; } goto L_088544E0; } L_088544E0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1709u); aot_gpr_31 = (0x088544F8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088544F8u) goto L_088544F8; AOT_REGCACHE_SYNC_OUT(); return; L_088544F8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854498; } goto L_08854500; } L_08854500: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1706u); aot_gpr_31 = (0x08854518u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854518u) goto L_08854518; AOT_REGCACHE_SYNC_OUT(); return; L_08854518: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854498; } goto L_08854520; } L_08854520: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1711u); aot_gpr_31 = (0x08854538u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854538u) goto L_08854538; AOT_REGCACHE_SYNC_OUT(); return; L_08854538: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854498; } goto L_08854540; } L_08854540: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1724u); aot_gpr_31 = (0x08854558u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854558u) goto L_08854558; AOT_REGCACHE_SYNC_OUT(); return; L_08854558: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854498; } goto L_08854560; } L_08854560: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1698u); aot_gpr_31 = (0x08854578u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854578u) goto L_08854578; AOT_REGCACHE_SYNC_OUT(); return; L_08854578: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854498; } goto L_08854580; } L_08854580: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1702u); aot_gpr_31 = (0x08854598u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854598u) goto L_08854598; AOT_REGCACHE_SYNC_OUT(); return; L_08854598: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854498; } goto L_088545A0; } L_088545A0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1716u); aot_gpr_31 = (0x088545B8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088545B8u) goto L_088545B8; AOT_REGCACHE_SYNC_OUT(); return; L_088545B8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854498; } goto L_088545C0; } L_088545C0: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x088545D4u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088545D4u) goto L_088545D4; AOT_REGCACHE_SYNC_OUT(); return; L_088545D4: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088545E0: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (2237u << 16u); aot_gpr_6 = (aot_gpr_6 & 65535u); aot_gpr_7 = (0u | 159u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08854680; } goto L_08854600; } L_08854600: aot_gpr_7 = (0u | 143u); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 137u); if (branch_taken) { goto L_08854660; } goto L_0885460C; } L_0885460C: { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 119u); if (branch_taken) { goto L_08854640; } goto L_08854614; } L_08854614: { const bool branch_taken = aot_gpr_6 != aot_gpr_7; if (branch_taken) { goto L_088546A0; } goto L_0885461C; } L_0885461C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1755u); aot_gpr_31 = (0x08854634u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854634u) goto L_08854634; AOT_REGCACHE_SYNC_OUT(); return; L_08854634: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08854638; L_08854638: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_088546B0; } goto L_08854640; } L_08854640: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1752u); aot_gpr_31 = (0x08854658u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854658u) goto L_08854658; AOT_REGCACHE_SYNC_OUT(); return; L_08854658: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854638; } goto L_08854660; } L_08854660: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1749u); aot_gpr_31 = (0x08854678u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854678u) goto L_08854678; AOT_REGCACHE_SYNC_OUT(); return; L_08854678: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854638; } goto L_08854680; } L_08854680: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1758u); aot_gpr_31 = (0x08854698u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854698u) goto L_08854698; AOT_REGCACHE_SYNC_OUT(); return; L_08854698: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854638; } goto L_088546A0; } L_088546A0: aot_gpr_7 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_31 = (0x088546B0u); aot_gpr_5 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088546B0u) goto L_088546B0; AOT_REGCACHE_SYNC_OUT(); return; L_088546B0: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088546BC: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (2237u << 16u); aot_gpr_6 = (aot_gpr_6 & 65535u); aot_gpr_7 = (0u | 159u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_0885475C; } goto L_088546DC; } L_088546DC: aot_gpr_7 = (0u | 143u); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 137u); if (branch_taken) { goto L_0885473C; } goto L_088546E8; } L_088546E8: { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 119u); if (branch_taken) { goto L_0885471C; } goto L_088546F0; } L_088546F0: { const bool branch_taken = aot_gpr_6 != aot_gpr_7; if (branch_taken) { goto L_0885477C; } goto L_088546F8; } L_088546F8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1767u); aot_gpr_31 = (0x08854710u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854710u) goto L_08854710; AOT_REGCACHE_SYNC_OUT(); return; L_08854710: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08854714; L_08854714: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_0885478C; } goto L_0885471C; } L_0885471C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1764u); aot_gpr_31 = (0x08854734u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854734u) goto L_08854734; AOT_REGCACHE_SYNC_OUT(); return; L_08854734: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854714; } goto L_0885473C; } L_0885473C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1761u); aot_gpr_31 = (0x08854754u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854754u) goto L_08854754; AOT_REGCACHE_SYNC_OUT(); return; L_08854754: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854714; } goto L_0885475C; } L_0885475C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1770u); aot_gpr_31 = (0x08854774u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854774u) goto L_08854774; AOT_REGCACHE_SYNC_OUT(); return; L_08854774: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854714; } goto L_0885477C; } L_0885477C: aot_gpr_7 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_31 = (0x0885478Cu); aot_gpr_5 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x0885478Cu) goto L_0885478C; AOT_REGCACHE_SYNC_OUT(); return; L_0885478C: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08854798: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_6 & 65535u); aot_gpr_5 = (2237u << 16u); aot_gpr_7 = (static_cast(aot_gpr_6) < 115 ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_7 != 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08854860; } goto L_088547B8; } L_088547B8: aot_gpr_7 = (static_cast(aot_gpr_6) < 155 ? 1u : 0u); { const bool branch_taken = aot_gpr_7 == 0u; aot_gpr_7 = (aot_gpr_6 + static_cast(-115)); if (branch_taken) { goto L_08854860; } goto L_088547C4; } L_088547C4: aot_gpr_7 = (aot_gpr_7 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_7); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(25560))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088547DC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1792u); aot_gpr_31 = (0x088547F4u); aot_gpr_8 = (0u | 6u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088547F4u) goto L_088547F4; AOT_REGCACHE_SYNC_OUT(); return; L_088547F4: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_088547F8; L_088547F8: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08854870; } goto L_08854800; } L_08854800: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1787u); aot_gpr_31 = (0x08854818u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854818u) goto L_08854818; AOT_REGCACHE_SYNC_OUT(); return; L_08854818: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088547F8; } goto L_08854820; } L_08854820: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1784u); aot_gpr_31 = (0x08854838u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854838u) goto L_08854838; AOT_REGCACHE_SYNC_OUT(); return; L_08854838: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088547F8; } goto L_08854840; } L_08854840: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1790u); aot_gpr_31 = (0x08854858u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854858u) goto L_08854858; AOT_REGCACHE_SYNC_OUT(); return; L_08854858: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088547F8; } goto L_08854860; } L_08854860: aot_gpr_7 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_31 = (0x08854870u); aot_gpr_5 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854870u) goto L_08854870; AOT_REGCACHE_SYNC_OUT(); return; L_08854870: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_0885487C: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_088549FC; } goto L_088548A0; } L_088548A0: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(25720))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088548B8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1817u); aot_gpr_31 = (0x088548D0u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088548D0u) goto L_088548D0; AOT_REGCACHE_SYNC_OUT(); return; L_088548D0: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_088548D4; L_088548D4: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08854A10; } goto L_088548DC; } L_088548DC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1819u); aot_gpr_31 = (0x088548F4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088548F4u) goto L_088548F4; AOT_REGCACHE_SYNC_OUT(); return; L_088548F4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088548D4; } goto L_088548FC; } L_088548FC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1811u); aot_gpr_31 = (0x08854914u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854914u) goto L_08854914; AOT_REGCACHE_SYNC_OUT(); return; L_08854914: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088548D4; } goto L_0885491C; } L_0885491C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1807u); aot_gpr_31 = (0x08854934u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854934u) goto L_08854934; AOT_REGCACHE_SYNC_OUT(); return; L_08854934: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088548D4; } goto L_0885493C; } L_0885493C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1805u); aot_gpr_31 = (0x08854954u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854954u) goto L_08854954; AOT_REGCACHE_SYNC_OUT(); return; L_08854954: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088548D4; } goto L_0885495C; } L_0885495C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1809u); aot_gpr_31 = (0x08854974u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854974u) goto L_08854974; AOT_REGCACHE_SYNC_OUT(); return; L_08854974: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088548D4; } goto L_0885497C; } L_0885497C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1822u); aot_gpr_31 = (0x08854994u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854994u) goto L_08854994; AOT_REGCACHE_SYNC_OUT(); return; L_08854994: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088548D4; } goto L_0885499C; } L_0885499C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1798u); aot_gpr_31 = (0x088549B4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088549B4u) goto L_088549B4; AOT_REGCACHE_SYNC_OUT(); return; L_088549B4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088548D4; } goto L_088549BC; } L_088549BC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1801u); aot_gpr_31 = (0x088549D4u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088549D4u) goto L_088549D4; AOT_REGCACHE_SYNC_OUT(); return; L_088549D4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088548D4; } goto L_088549DC; } L_088549DC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1814u); aot_gpr_31 = (0x088549F4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088549F4u) goto L_088549F4; AOT_REGCACHE_SYNC_OUT(); return; L_088549F4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088548D4; } goto L_088549FC; } L_088549FC: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08854A10u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C971C, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854A10u) goto L_08854A10; AOT_REGCACHE_SYNC_OUT(); return; L_08854A10: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08854A1C: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(39) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08854B7C; } goto L_08854A40; } L_08854A40: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(25888))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08854A58: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1839u); aot_gpr_31 = (0x08854A70u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854A70u) goto L_08854A70; AOT_REGCACHE_SYNC_OUT(); return; L_08854A70: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08854A74; L_08854A74: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08854B90; } goto L_08854A7C; } L_08854A7C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1841u); aot_gpr_31 = (0x08854A94u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854A94u) goto L_08854A94; AOT_REGCACHE_SYNC_OUT(); return; L_08854A94: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854A74; } goto L_08854A9C; } L_08854A9C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1836u); aot_gpr_31 = (0x08854AB4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854AB4u) goto L_08854AB4; AOT_REGCACHE_SYNC_OUT(); return; L_08854AB4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854A74; } goto L_08854ABC; } L_08854ABC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1832u); aot_gpr_31 = (0x08854AD4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854AD4u) goto L_08854AD4; AOT_REGCACHE_SYNC_OUT(); return; L_08854AD4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854A74; } goto L_08854ADC; } L_08854ADC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1830u); aot_gpr_31 = (0x08854AF4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854AF4u) goto L_08854AF4; AOT_REGCACHE_SYNC_OUT(); return; L_08854AF4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854A74; } goto L_08854AFC; } L_08854AFC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1834u); aot_gpr_31 = (0x08854B14u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854B14u) goto L_08854B14; AOT_REGCACHE_SYNC_OUT(); return; L_08854B14: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854A74; } goto L_08854B1C; } L_08854B1C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1844u); aot_gpr_31 = (0x08854B34u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854B34u) goto L_08854B34; AOT_REGCACHE_SYNC_OUT(); return; L_08854B34: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854A74; } goto L_08854B3C; } L_08854B3C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1823u); aot_gpr_31 = (0x08854B54u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854B54u) goto L_08854B54; AOT_REGCACHE_SYNC_OUT(); return; L_08854B54: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854A74; } goto L_08854B5C; } L_08854B5C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1826u); aot_gpr_31 = (0x08854B74u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854B74u) goto L_08854B74; AOT_REGCACHE_SYNC_OUT(); return; L_08854B74: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854A74; } goto L_08854B7C; } L_08854B7C: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08854B90u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C971C, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854B90u) goto L_08854B90; AOT_REGCACHE_SYNC_OUT(); return; L_08854B90: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08854B9C: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08854D1C; } goto L_08854BC0; } L_08854BC0: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(26048))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08854BD8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1863u); aot_gpr_31 = (0x08854BF0u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854BF0u) goto L_08854BF0; AOT_REGCACHE_SYNC_OUT(); return; L_08854BF0: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08854BF4; L_08854BF4: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08854D30; } goto L_08854BFC; } L_08854BFC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1865u); aot_gpr_31 = (0x08854C14u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854C14u) goto L_08854C14; AOT_REGCACHE_SYNC_OUT(); return; L_08854C14: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854BF4; } goto L_08854C1C; } L_08854C1C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1858u); aot_gpr_31 = (0x08854C34u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854C34u) goto L_08854C34; AOT_REGCACHE_SYNC_OUT(); return; L_08854C34: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854BF4; } goto L_08854C3C; } L_08854C3C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1854u); aot_gpr_31 = (0x08854C54u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854C54u) goto L_08854C54; AOT_REGCACHE_SYNC_OUT(); return; L_08854C54: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854BF4; } goto L_08854C5C; } L_08854C5C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1852u); aot_gpr_31 = (0x08854C74u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854C74u) goto L_08854C74; AOT_REGCACHE_SYNC_OUT(); return; L_08854C74: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854BF4; } goto L_08854C7C; } L_08854C7C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1856u); aot_gpr_31 = (0x08854C94u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854C94u) goto L_08854C94; AOT_REGCACHE_SYNC_OUT(); return; L_08854C94: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854BF4; } goto L_08854C9C; } L_08854C9C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1868u); aot_gpr_31 = (0x08854CB4u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854CB4u) goto L_08854CB4; AOT_REGCACHE_SYNC_OUT(); return; L_08854CB4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854BF4; } goto L_08854CBC; } L_08854CBC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1845u); aot_gpr_31 = (0x08854CD4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854CD4u) goto L_08854CD4; AOT_REGCACHE_SYNC_OUT(); return; L_08854CD4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854BF4; } goto L_08854CDC; } L_08854CDC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1848u); aot_gpr_31 = (0x08854CF4u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854CF4u) goto L_08854CF4; AOT_REGCACHE_SYNC_OUT(); return; L_08854CF4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854BF4; } goto L_08854CFC; } L_08854CFC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1860u); aot_gpr_31 = (0x08854D14u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854D14u) goto L_08854D14; AOT_REGCACHE_SYNC_OUT(); return; L_08854D14: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854BF4; } goto L_08854D1C; } L_08854D1C: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08854D30u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C971C, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854D30u) goto L_08854D30; AOT_REGCACHE_SYNC_OUT(); return; L_08854D30: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08854D3C: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08854EBC; } goto L_08854D60; } L_08854D60: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(26216))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08854D78: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1888u); aot_gpr_31 = (0x08854D90u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854D90u) goto L_08854D90; AOT_REGCACHE_SYNC_OUT(); return; L_08854D90: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08854D94; L_08854D94: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08854ED0; } goto L_08854D9C; } L_08854D9C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1890u); aot_gpr_31 = (0x08854DB4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854DB4u) goto L_08854DB4; AOT_REGCACHE_SYNC_OUT(); return; L_08854DB4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854D94; } goto L_08854DBC; } L_08854DBC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1882u); aot_gpr_31 = (0x08854DD4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854DD4u) goto L_08854DD4; AOT_REGCACHE_SYNC_OUT(); return; L_08854DD4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854D94; } goto L_08854DDC; } L_08854DDC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1878u); aot_gpr_31 = (0x08854DF4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854DF4u) goto L_08854DF4; AOT_REGCACHE_SYNC_OUT(); return; L_08854DF4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854D94; } goto L_08854DFC; } L_08854DFC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1876u); aot_gpr_31 = (0x08854E14u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854E14u) goto L_08854E14; AOT_REGCACHE_SYNC_OUT(); return; L_08854E14: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854D94; } goto L_08854E1C; } L_08854E1C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1880u); aot_gpr_31 = (0x08854E34u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854E34u) goto L_08854E34; AOT_REGCACHE_SYNC_OUT(); return; L_08854E34: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854D94; } goto L_08854E3C; } L_08854E3C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1893u); aot_gpr_31 = (0x08854E54u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854E54u) goto L_08854E54; AOT_REGCACHE_SYNC_OUT(); return; L_08854E54: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854D94; } goto L_08854E5C; } L_08854E5C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1869u); aot_gpr_31 = (0x08854E74u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854E74u) goto L_08854E74; AOT_REGCACHE_SYNC_OUT(); return; L_08854E74: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854D94; } goto L_08854E7C; } L_08854E7C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1872u); aot_gpr_31 = (0x08854E94u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854E94u) goto L_08854E94; AOT_REGCACHE_SYNC_OUT(); return; L_08854E94: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854D94; } goto L_08854E9C; } L_08854E9C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1885u); aot_gpr_31 = (0x08854EB4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854EB4u) goto L_08854EB4; AOT_REGCACHE_SYNC_OUT(); return; L_08854EB4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854D94; } goto L_08854EBC; } L_08854EBC: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08854ED0u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C971C, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854ED0u) goto L_08854ED0; AOT_REGCACHE_SYNC_OUT(); return; L_08854ED0: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08854EDC: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_0885505C; } goto L_08854F00; } L_08854F00: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(26384))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08854F18: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1913u); aot_gpr_31 = (0x08854F30u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854F30u) goto L_08854F30; AOT_REGCACHE_SYNC_OUT(); return; L_08854F30: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08854F34; L_08854F34: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08855070; } goto L_08854F3C; } L_08854F3C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1915u); aot_gpr_31 = (0x08854F54u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854F54u) goto L_08854F54; AOT_REGCACHE_SYNC_OUT(); return; L_08854F54: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854F34; } goto L_08854F5C; } L_08854F5C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1907u); aot_gpr_31 = (0x08854F74u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854F74u) goto L_08854F74; AOT_REGCACHE_SYNC_OUT(); return; L_08854F74: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854F34; } goto L_08854F7C; } L_08854F7C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1903u); aot_gpr_31 = (0x08854F94u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854F94u) goto L_08854F94; AOT_REGCACHE_SYNC_OUT(); return; L_08854F94: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854F34; } goto L_08854F9C; } L_08854F9C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1901u); aot_gpr_31 = (0x08854FB4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854FB4u) goto L_08854FB4; AOT_REGCACHE_SYNC_OUT(); return; L_08854FB4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854F34; } goto L_08854FBC; } L_08854FBC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1905u); aot_gpr_31 = (0x08854FD4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854FD4u) goto L_08854FD4; AOT_REGCACHE_SYNC_OUT(); return; L_08854FD4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854F34; } goto L_08854FDC; } L_08854FDC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1918u); aot_gpr_31 = (0x08854FF4u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08854FF4u) goto L_08854FF4; AOT_REGCACHE_SYNC_OUT(); return; L_08854FF4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854F34; } goto L_08854FFC; } L_08854FFC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1894u); aot_gpr_31 = (0x08855014u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855014u) goto L_08855014; AOT_REGCACHE_SYNC_OUT(); return; L_08855014: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854F34; } goto L_0885501C; } L_0885501C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1897u); aot_gpr_31 = (0x08855034u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855034u) goto L_08855034; AOT_REGCACHE_SYNC_OUT(); return; L_08855034: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854F34; } goto L_0885503C; } L_0885503C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1910u); aot_gpr_31 = (0x08855054u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855054u) goto L_08855054; AOT_REGCACHE_SYNC_OUT(); return; L_08855054: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08854F34; } goto L_0885505C; } L_0885505C: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08855070u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C971C, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855070u) goto L_08855070; AOT_REGCACHE_SYNC_OUT(); return; L_08855070: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_0885507C: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_088551FC; } goto L_088550A0; } L_088550A0: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(26552))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088550B8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1938u); aot_gpr_31 = (0x088550D0u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088550D0u) goto L_088550D0; AOT_REGCACHE_SYNC_OUT(); return; L_088550D0: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_088550D4; L_088550D4: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08855210; } goto L_088550DC; } L_088550DC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1940u); aot_gpr_31 = (0x088550F4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088550F4u) goto L_088550F4; AOT_REGCACHE_SYNC_OUT(); return; L_088550F4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088550D4; } goto L_088550FC; } L_088550FC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1932u); aot_gpr_31 = (0x08855114u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855114u) goto L_08855114; AOT_REGCACHE_SYNC_OUT(); return; L_08855114: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088550D4; } goto L_0885511C; } L_0885511C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1928u); aot_gpr_31 = (0x08855134u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855134u) goto L_08855134; AOT_REGCACHE_SYNC_OUT(); return; L_08855134: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088550D4; } goto L_0885513C; } L_0885513C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1926u); aot_gpr_31 = (0x08855154u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855154u) goto L_08855154; AOT_REGCACHE_SYNC_OUT(); return; L_08855154: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088550D4; } goto L_0885515C; } L_0885515C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1930u); aot_gpr_31 = (0x08855174u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855174u) goto L_08855174; AOT_REGCACHE_SYNC_OUT(); return; L_08855174: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088550D4; } goto L_0885517C; } L_0885517C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1943u); aot_gpr_31 = (0x08855194u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855194u) goto L_08855194; AOT_REGCACHE_SYNC_OUT(); return; L_08855194: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088550D4; } goto L_0885519C; } L_0885519C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1919u); aot_gpr_31 = (0x088551B4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088551B4u) goto L_088551B4; AOT_REGCACHE_SYNC_OUT(); return; L_088551B4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088550D4; } goto L_088551BC; } L_088551BC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1922u); aot_gpr_31 = (0x088551D4u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088551D4u) goto L_088551D4; AOT_REGCACHE_SYNC_OUT(); return; L_088551D4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088550D4; } goto L_088551DC; } L_088551DC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1935u); aot_gpr_31 = (0x088551F4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088551F4u) goto L_088551F4; AOT_REGCACHE_SYNC_OUT(); return; L_088551F4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088550D4; } goto L_088551FC; } L_088551FC: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08855210u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C971C, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855210u) goto L_08855210; AOT_REGCACHE_SYNC_OUT(); return; L_08855210: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_0885521C: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_0885539C; } goto L_08855240; } L_08855240: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(26720))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08855258: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1964u); aot_gpr_31 = (0x08855270u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855270u) goto L_08855270; AOT_REGCACHE_SYNC_OUT(); return; L_08855270: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08855274; L_08855274: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_088553B0; } goto L_0885527C; } L_0885527C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1966u); aot_gpr_31 = (0x08855294u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855294u) goto L_08855294; AOT_REGCACHE_SYNC_OUT(); return; L_08855294: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855274; } goto L_0885529C; } L_0885529C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1958u); aot_gpr_31 = (0x088552B4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088552B4u) goto L_088552B4; AOT_REGCACHE_SYNC_OUT(); return; L_088552B4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855274; } goto L_088552BC; } L_088552BC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1954u); aot_gpr_31 = (0x088552D4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088552D4u) goto L_088552D4; AOT_REGCACHE_SYNC_OUT(); return; L_088552D4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855274; } goto L_088552DC; } L_088552DC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1951u); aot_gpr_31 = (0x088552F4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088552F4u) goto L_088552F4; AOT_REGCACHE_SYNC_OUT(); return; L_088552F4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855274; } goto L_088552FC; } L_088552FC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1956u); aot_gpr_31 = (0x08855314u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855314u) goto L_08855314; AOT_REGCACHE_SYNC_OUT(); return; L_08855314: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855274; } goto L_0885531C; } L_0885531C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1969u); aot_gpr_31 = (0x08855334u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855334u) goto L_08855334; AOT_REGCACHE_SYNC_OUT(); return; L_08855334: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855274; } goto L_0885533C; } L_0885533C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1944u); aot_gpr_31 = (0x08855354u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855354u) goto L_08855354; AOT_REGCACHE_SYNC_OUT(); return; L_08855354: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855274; } goto L_0885535C; } L_0885535C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1947u); aot_gpr_31 = (0x08855374u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855374u) goto L_08855374; AOT_REGCACHE_SYNC_OUT(); return; L_08855374: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855274; } goto L_0885537C; } L_0885537C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1961u); aot_gpr_31 = (0x08855394u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855394u) goto L_08855394; AOT_REGCACHE_SYNC_OUT(); return; L_08855394: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855274; } goto L_0885539C; } L_0885539C: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x088553B0u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C971C, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088553B0u) goto L_088553B0; AOT_REGCACHE_SYNC_OUT(); return; L_088553B0: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088553BC: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_0885553C; } goto L_088553E0; } L_088553E0: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(26888))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088553F8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1988u); aot_gpr_31 = (0x08855410u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855410u) goto L_08855410; AOT_REGCACHE_SYNC_OUT(); return; L_08855410: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08855414; L_08855414: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08855550; } goto L_0885541C; } L_0885541C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1990u); aot_gpr_31 = (0x08855434u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855434u) goto L_08855434; AOT_REGCACHE_SYNC_OUT(); return; L_08855434: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855414; } goto L_0885543C; } L_0885543C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1983u); aot_gpr_31 = (0x08855454u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855454u) goto L_08855454; AOT_REGCACHE_SYNC_OUT(); return; L_08855454: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855414; } goto L_0885545C; } L_0885545C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1979u); aot_gpr_31 = (0x08855474u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855474u) goto L_08855474; AOT_REGCACHE_SYNC_OUT(); return; L_08855474: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855414; } goto L_0885547C; } L_0885547C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1977u); aot_gpr_31 = (0x08855494u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855494u) goto L_08855494; AOT_REGCACHE_SYNC_OUT(); return; L_08855494: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855414; } goto L_0885549C; } L_0885549C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1981u); aot_gpr_31 = (0x088554B4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088554B4u) goto L_088554B4; AOT_REGCACHE_SYNC_OUT(); return; L_088554B4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855414; } goto L_088554BC; } L_088554BC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1993u); aot_gpr_31 = (0x088554D4u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088554D4u) goto L_088554D4; AOT_REGCACHE_SYNC_OUT(); return; L_088554D4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855414; } goto L_088554DC; } L_088554DC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1970u); aot_gpr_31 = (0x088554F4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088554F4u) goto L_088554F4; AOT_REGCACHE_SYNC_OUT(); return; L_088554F4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855414; } goto L_088554FC; } L_088554FC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1973u); aot_gpr_31 = (0x08855514u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855514u) goto L_08855514; AOT_REGCACHE_SYNC_OUT(); return; L_08855514: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855414; } goto L_0885551C; } L_0885551C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1985u); aot_gpr_31 = (0x08855534u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855534u) goto L_08855534; AOT_REGCACHE_SYNC_OUT(); return; L_08855534: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855414; } goto L_0885553C; } L_0885553C: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08855550u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C971C, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855550u) goto L_08855550; AOT_REGCACHE_SYNC_OUT(); return; L_08855550: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_0885555C: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_088556DC; } goto L_08855580; } L_08855580: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(27056))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08855598: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2013u); aot_gpr_31 = (0x088555B0u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088555B0u) goto L_088555B0; AOT_REGCACHE_SYNC_OUT(); return; L_088555B0: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_088555B4; L_088555B4: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_088556F0; } goto L_088555BC; } L_088555BC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2015u); aot_gpr_31 = (0x088555D4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088555D4u) goto L_088555D4; AOT_REGCACHE_SYNC_OUT(); return; L_088555D4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088555B4; } goto L_088555DC; } L_088555DC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2007u); aot_gpr_31 = (0x088555F4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088555F4u) goto L_088555F4; AOT_REGCACHE_SYNC_OUT(); return; L_088555F4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088555B4; } goto L_088555FC; } L_088555FC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2003u); aot_gpr_31 = (0x08855614u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855614u) goto L_08855614; AOT_REGCACHE_SYNC_OUT(); return; L_08855614: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088555B4; } goto L_0885561C; } L_0885561C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2001u); aot_gpr_31 = (0x08855634u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855634u) goto L_08855634; AOT_REGCACHE_SYNC_OUT(); return; L_08855634: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088555B4; } goto L_0885563C; } L_0885563C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2005u); aot_gpr_31 = (0x08855654u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855654u) goto L_08855654; AOT_REGCACHE_SYNC_OUT(); return; L_08855654: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088555B4; } goto L_0885565C; } L_0885565C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2018u); aot_gpr_31 = (0x08855674u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855674u) goto L_08855674; AOT_REGCACHE_SYNC_OUT(); return; L_08855674: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088555B4; } goto L_0885567C; } L_0885567C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1994u); aot_gpr_31 = (0x08855694u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855694u) goto L_08855694; AOT_REGCACHE_SYNC_OUT(); return; L_08855694: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088555B4; } goto L_0885569C; } L_0885569C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 1997u); aot_gpr_31 = (0x088556B4u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088556B4u) goto L_088556B4; AOT_REGCACHE_SYNC_OUT(); return; L_088556B4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088555B4; } goto L_088556BC; } L_088556BC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2010u); aot_gpr_31 = (0x088556D4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088556D4u) goto L_088556D4; AOT_REGCACHE_SYNC_OUT(); return; L_088556D4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088555B4; } goto L_088556DC; } L_088556DC: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x088556F0u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C971C, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088556F0u) goto L_088556F0; AOT_REGCACHE_SYNC_OUT(); return; L_088556F0: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088556FC: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_0885587C; } goto L_08855720; } L_08855720: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(27224))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08855738: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2038u); aot_gpr_31 = (0x08855750u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855750u) goto L_08855750; AOT_REGCACHE_SYNC_OUT(); return; L_08855750: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08855754; L_08855754: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08855890; } goto L_0885575C; } L_0885575C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2040u); aot_gpr_31 = (0x08855774u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855774u) goto L_08855774; AOT_REGCACHE_SYNC_OUT(); return; L_08855774: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855754; } goto L_0885577C; } L_0885577C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2032u); aot_gpr_31 = (0x08855794u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855794u) goto L_08855794; AOT_REGCACHE_SYNC_OUT(); return; L_08855794: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855754; } goto L_0885579C; } L_0885579C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2028u); aot_gpr_31 = (0x088557B4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088557B4u) goto L_088557B4; AOT_REGCACHE_SYNC_OUT(); return; L_088557B4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855754; } goto L_088557BC; } L_088557BC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2026u); aot_gpr_31 = (0x088557D4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088557D4u) goto L_088557D4; AOT_REGCACHE_SYNC_OUT(); return; L_088557D4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855754; } goto L_088557DC; } L_088557DC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2030u); aot_gpr_31 = (0x088557F4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088557F4u) goto L_088557F4; AOT_REGCACHE_SYNC_OUT(); return; L_088557F4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855754; } goto L_088557FC; } L_088557FC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2043u); aot_gpr_31 = (0x08855814u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855814u) goto L_08855814; AOT_REGCACHE_SYNC_OUT(); return; L_08855814: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855754; } goto L_0885581C; } L_0885581C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2019u); aot_gpr_31 = (0x08855834u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855834u) goto L_08855834; AOT_REGCACHE_SYNC_OUT(); return; L_08855834: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855754; } goto L_0885583C; } L_0885583C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2022u); aot_gpr_31 = (0x08855854u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855854u) goto L_08855854; AOT_REGCACHE_SYNC_OUT(); return; L_08855854: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855754; } goto L_0885585C; } L_0885585C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2035u); aot_gpr_31 = (0x08855874u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855874u) goto L_08855874; AOT_REGCACHE_SYNC_OUT(); return; L_08855874: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855754; } goto L_0885587C; } L_0885587C: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08855890u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C971C, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855890u) goto L_08855890; AOT_REGCACHE_SYNC_OUT(); return; L_08855890: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_0885589C: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08855A1C; } goto L_088558C0; } L_088558C0: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(27392))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088558D8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2063u); aot_gpr_31 = (0x088558F0u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088558F0u) goto L_088558F0; AOT_REGCACHE_SYNC_OUT(); return; L_088558F0: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_088558F4; L_088558F4: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08855A30; } goto L_088558FC; } L_088558FC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2065u); aot_gpr_31 = (0x08855914u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855914u) goto L_08855914; AOT_REGCACHE_SYNC_OUT(); return; L_08855914: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088558F4; } goto L_0885591C; } L_0885591C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2057u); aot_gpr_31 = (0x08855934u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855934u) goto L_08855934; AOT_REGCACHE_SYNC_OUT(); return; L_08855934: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088558F4; } goto L_0885593C; } L_0885593C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2053u); aot_gpr_31 = (0x08855954u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855954u) goto L_08855954; AOT_REGCACHE_SYNC_OUT(); return; L_08855954: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088558F4; } goto L_0885595C; } L_0885595C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2051u); aot_gpr_31 = (0x08855974u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855974u) goto L_08855974; AOT_REGCACHE_SYNC_OUT(); return; L_08855974: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088558F4; } goto L_0885597C; } L_0885597C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2055u); aot_gpr_31 = (0x08855994u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855994u) goto L_08855994; AOT_REGCACHE_SYNC_OUT(); return; L_08855994: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088558F4; } goto L_0885599C; } L_0885599C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2068u); aot_gpr_31 = (0x088559B4u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088559B4u) goto L_088559B4; AOT_REGCACHE_SYNC_OUT(); return; L_088559B4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088558F4; } goto L_088559BC; } L_088559BC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2044u); aot_gpr_31 = (0x088559D4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088559D4u) goto L_088559D4; AOT_REGCACHE_SYNC_OUT(); return; L_088559D4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088558F4; } goto L_088559DC; } L_088559DC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2047u); aot_gpr_31 = (0x088559F4u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088559F4u) goto L_088559F4; AOT_REGCACHE_SYNC_OUT(); return; L_088559F4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088558F4; } goto L_088559FC; } L_088559FC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2060u); aot_gpr_31 = (0x08855A14u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855A14u) goto L_08855A14; AOT_REGCACHE_SYNC_OUT(); return; L_08855A14: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088558F4; } goto L_08855A1C; } L_08855A1C: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08855A30u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C971C, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855A30u) goto L_08855A30; AOT_REGCACHE_SYNC_OUT(); return; L_08855A30: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08855A3C: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08855BBC; } goto L_08855A60; } L_08855A60: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(27560))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08855A78: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2088u); aot_gpr_31 = (0x08855A90u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855A90u) goto L_08855A90; AOT_REGCACHE_SYNC_OUT(); return; L_08855A90: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08855A94; L_08855A94: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08855BD0; } goto L_08855A9C; } L_08855A9C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2090u); aot_gpr_31 = (0x08855AB4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855AB4u) goto L_08855AB4; AOT_REGCACHE_SYNC_OUT(); return; L_08855AB4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855A94; } goto L_08855ABC; } L_08855ABC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2082u); aot_gpr_31 = (0x08855AD4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855AD4u) goto L_08855AD4; AOT_REGCACHE_SYNC_OUT(); return; L_08855AD4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855A94; } goto L_08855ADC; } L_08855ADC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2078u); aot_gpr_31 = (0x08855AF4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855AF4u) goto L_08855AF4; AOT_REGCACHE_SYNC_OUT(); return; L_08855AF4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855A94; } goto L_08855AFC; } L_08855AFC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2076u); aot_gpr_31 = (0x08855B14u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855B14u) goto L_08855B14; AOT_REGCACHE_SYNC_OUT(); return; L_08855B14: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855A94; } goto L_08855B1C; } L_08855B1C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2080u); aot_gpr_31 = (0x08855B34u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855B34u) goto L_08855B34; AOT_REGCACHE_SYNC_OUT(); return; L_08855B34: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855A94; } goto L_08855B3C; } L_08855B3C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2093u); aot_gpr_31 = (0x08855B54u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855B54u) goto L_08855B54; AOT_REGCACHE_SYNC_OUT(); return; L_08855B54: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855A94; } goto L_08855B5C; } L_08855B5C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2069u); aot_gpr_31 = (0x08855B74u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855B74u) goto L_08855B74; AOT_REGCACHE_SYNC_OUT(); return; L_08855B74: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855A94; } goto L_08855B7C; } L_08855B7C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2072u); aot_gpr_31 = (0x08855B94u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855B94u) goto L_08855B94; AOT_REGCACHE_SYNC_OUT(); return; L_08855B94: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855A94; } goto L_08855B9C; } L_08855B9C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2085u); aot_gpr_31 = (0x08855BB4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855BB4u) goto L_08855BB4; AOT_REGCACHE_SYNC_OUT(); return; L_08855BB4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855A94; } goto L_08855BBC; } L_08855BBC: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08855BD0u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855BD0u) goto L_08855BD0; AOT_REGCACHE_SYNC_OUT(); return; L_08855BD0: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08855BDC: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(39) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08855D3C; } goto L_08855C00; } L_08855C00: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(27728))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08855C18: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2110u); aot_gpr_31 = (0x08855C30u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855C30u) goto L_08855C30; AOT_REGCACHE_SYNC_OUT(); return; L_08855C30: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08855C34; L_08855C34: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08855D50; } goto L_08855C3C; } L_08855C3C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2112u); aot_gpr_31 = (0x08855C54u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855C54u) goto L_08855C54; AOT_REGCACHE_SYNC_OUT(); return; L_08855C54: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855C34; } goto L_08855C5C; } L_08855C5C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2107u); aot_gpr_31 = (0x08855C74u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855C74u) goto L_08855C74; AOT_REGCACHE_SYNC_OUT(); return; L_08855C74: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855C34; } goto L_08855C7C; } L_08855C7C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2103u); aot_gpr_31 = (0x08855C94u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855C94u) goto L_08855C94; AOT_REGCACHE_SYNC_OUT(); return; L_08855C94: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855C34; } goto L_08855C9C; } L_08855C9C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2101u); aot_gpr_31 = (0x08855CB4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855CB4u) goto L_08855CB4; AOT_REGCACHE_SYNC_OUT(); return; L_08855CB4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855C34; } goto L_08855CBC; } L_08855CBC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2105u); aot_gpr_31 = (0x08855CD4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855CD4u) goto L_08855CD4; AOT_REGCACHE_SYNC_OUT(); return; L_08855CD4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855C34; } goto L_08855CDC; } L_08855CDC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2115u); aot_gpr_31 = (0x08855CF4u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855CF4u) goto L_08855CF4; AOT_REGCACHE_SYNC_OUT(); return; L_08855CF4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855C34; } goto L_08855CFC; } L_08855CFC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2094u); aot_gpr_31 = (0x08855D14u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855D14u) goto L_08855D14; AOT_REGCACHE_SYNC_OUT(); return; L_08855D14: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855C34; } goto L_08855D1C; } L_08855D1C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2097u); aot_gpr_31 = (0x08855D34u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855D34u) goto L_08855D34; AOT_REGCACHE_SYNC_OUT(); return; L_08855D34: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855C34; } goto L_08855D3C; } L_08855D3C: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08855D50u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855D50u) goto L_08855D50; AOT_REGCACHE_SYNC_OUT(); return; L_08855D50: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08855D5C: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (2237u << 16u); aot_gpr_6 = (aot_gpr_6 & 65535u); aot_gpr_7 = (0u | 159u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08855DFC; } goto L_08855D7C; } L_08855D7C: aot_gpr_7 = (0u | 143u); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 137u); if (branch_taken) { goto L_08855DDC; } goto L_08855D88; } L_08855D88: { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 119u); if (branch_taken) { goto L_08855DBC; } goto L_08855D90; } L_08855D90: { const bool branch_taken = aot_gpr_6 != aot_gpr_7; if (branch_taken) { goto L_08855E1C; } goto L_08855D98; } L_08855D98: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2122u); aot_gpr_31 = (0x08855DB0u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855DB0u) goto L_08855DB0; AOT_REGCACHE_SYNC_OUT(); return; L_08855DB0: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08855DB4; L_08855DB4: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08855E2C; } goto L_08855DBC; } L_08855DBC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2119u); aot_gpr_31 = (0x08855DD4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855DD4u) goto L_08855DD4; AOT_REGCACHE_SYNC_OUT(); return; L_08855DD4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855DB4; } goto L_08855DDC; } L_08855DDC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2116u); aot_gpr_31 = (0x08855DF4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855DF4u) goto L_08855DF4; AOT_REGCACHE_SYNC_OUT(); return; L_08855DF4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855DB4; } goto L_08855DFC; } L_08855DFC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2125u); aot_gpr_31 = (0x08855E14u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855E14u) goto L_08855E14; AOT_REGCACHE_SYNC_OUT(); return; L_08855E14: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855DB4; } goto L_08855E1C; } L_08855E1C: aot_gpr_7 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_31 = (0x08855E2Cu); aot_gpr_5 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855E2Cu) goto L_08855E2C; AOT_REGCACHE_SYNC_OUT(); return; L_08855E2C: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08855E38: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (2237u << 16u); aot_gpr_6 = (aot_gpr_6 & 65535u); aot_gpr_7 = (0u | 159u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08855ED8; } goto L_08855E58; } L_08855E58: aot_gpr_7 = (0u | 143u); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 137u); if (branch_taken) { goto L_08855EB8; } goto L_08855E64; } L_08855E64: { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 119u); if (branch_taken) { goto L_08855E98; } goto L_08855E6C; } L_08855E6C: { const bool branch_taken = aot_gpr_6 != aot_gpr_7; if (branch_taken) { goto L_08855EF8; } goto L_08855E74; } L_08855E74: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2134u); aot_gpr_31 = (0x08855E8Cu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855E8Cu) goto L_08855E8C; AOT_REGCACHE_SYNC_OUT(); return; L_08855E8C: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08855E90; L_08855E90: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08855F08; } goto L_08855E98; } L_08855E98: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2131u); aot_gpr_31 = (0x08855EB0u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855EB0u) goto L_08855EB0; AOT_REGCACHE_SYNC_OUT(); return; L_08855EB0: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855E90; } goto L_08855EB8; } L_08855EB8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2128u); aot_gpr_31 = (0x08855ED0u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855ED0u) goto L_08855ED0; AOT_REGCACHE_SYNC_OUT(); return; L_08855ED0: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855E90; } goto L_08855ED8; } L_08855ED8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2137u); aot_gpr_31 = (0x08855EF0u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855EF0u) goto L_08855EF0; AOT_REGCACHE_SYNC_OUT(); return; L_08855EF0: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855E90; } goto L_08855EF8; } L_08855EF8: aot_gpr_7 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_31 = (0x08855F08u); aot_gpr_5 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855F08u) goto L_08855F08; AOT_REGCACHE_SYNC_OUT(); return; L_08855F08: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08855F14: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (2237u << 16u); aot_gpr_6 = (aot_gpr_6 & 65535u); aot_gpr_7 = (0u | 159u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08855FB4; } goto L_08855F34; } L_08855F34: aot_gpr_7 = (0u | 143u); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 137u); if (branch_taken) { goto L_08855F94; } goto L_08855F40; } L_08855F40: { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 119u); if (branch_taken) { goto L_08855F74; } goto L_08855F48; } L_08855F48: { const bool branch_taken = aot_gpr_6 != aot_gpr_7; if (branch_taken) { goto L_08855FD4; } goto L_08855F50; } L_08855F50: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2146u); aot_gpr_31 = (0x08855F68u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855F68u) goto L_08855F68; AOT_REGCACHE_SYNC_OUT(); return; L_08855F68: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08855F6C; L_08855F6C: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08855FE4; } goto L_08855F74; } L_08855F74: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2143u); aot_gpr_31 = (0x08855F8Cu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855F8Cu) goto L_08855F8C; AOT_REGCACHE_SYNC_OUT(); return; L_08855F8C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855F6C; } goto L_08855F94; } L_08855F94: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2140u); aot_gpr_31 = (0x08855FACu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855FACu) goto L_08855FAC; AOT_REGCACHE_SYNC_OUT(); return; L_08855FAC: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855F6C; } goto L_08855FB4; } L_08855FB4: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2148u); aot_gpr_31 = (0x08855FCCu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855FCCu) goto L_08855FCC; AOT_REGCACHE_SYNC_OUT(); return; L_08855FCC: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08855F6C; } goto L_08855FD4; } L_08855FD4: aot_gpr_7 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_31 = (0x08855FE4u); aot_gpr_5 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08855FE4u) goto L_08855FE4; AOT_REGCACHE_SYNC_OUT(); return; L_08855FE4: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08855FF0: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08856170; } goto L_08856014; } L_08856014: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(27888))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_0885602C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2170u); aot_gpr_31 = (0x08856044u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856044u) goto L_08856044; AOT_REGCACHE_SYNC_OUT(); return; L_08856044: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08856048; L_08856048: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08856184; } goto L_08856050; } L_08856050: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2173u); aot_gpr_31 = (0x08856068u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856068u) goto L_08856068; AOT_REGCACHE_SYNC_OUT(); return; L_08856068: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856048; } goto L_08856070; } L_08856070: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2164u); aot_gpr_31 = (0x08856088u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856088u) goto L_08856088; AOT_REGCACHE_SYNC_OUT(); return; L_08856088: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856048; } goto L_08856090; } L_08856090: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2160u); aot_gpr_31 = (0x088560A8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088560A8u) goto L_088560A8; AOT_REGCACHE_SYNC_OUT(); return; L_088560A8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856048; } goto L_088560B0; } L_088560B0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2158u); aot_gpr_31 = (0x088560C8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088560C8u) goto L_088560C8; AOT_REGCACHE_SYNC_OUT(); return; L_088560C8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856048; } goto L_088560D0; } L_088560D0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2162u); aot_gpr_31 = (0x088560E8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088560E8u) goto L_088560E8; AOT_REGCACHE_SYNC_OUT(); return; L_088560E8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856048; } goto L_088560F0; } L_088560F0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2176u); aot_gpr_31 = (0x08856108u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856108u) goto L_08856108; AOT_REGCACHE_SYNC_OUT(); return; L_08856108: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856048; } goto L_08856110; } L_08856110: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2151u); aot_gpr_31 = (0x08856128u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856128u) goto L_08856128; AOT_REGCACHE_SYNC_OUT(); return; L_08856128: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856048; } goto L_08856130; } L_08856130: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2154u); aot_gpr_31 = (0x08856148u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856148u) goto L_08856148; AOT_REGCACHE_SYNC_OUT(); return; L_08856148: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856048; } goto L_08856150; } L_08856150: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2167u); aot_gpr_31 = (0x08856168u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856168u) goto L_08856168; AOT_REGCACHE_SYNC_OUT(); return; L_08856168: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856048; } goto L_08856170; } L_08856170: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08856184u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856184u) goto L_08856184; AOT_REGCACHE_SYNC_OUT(); return; L_08856184: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08856190: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08856310; } goto L_088561B4; } L_088561B4: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(28056))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088561CC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2196u); aot_gpr_31 = (0x088561E4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088561E4u) goto L_088561E4; AOT_REGCACHE_SYNC_OUT(); return; L_088561E4: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_088561E8; L_088561E8: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08856324; } goto L_088561F0; } L_088561F0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2198u); aot_gpr_31 = (0x08856208u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856208u) goto L_08856208; AOT_REGCACHE_SYNC_OUT(); return; L_08856208: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088561E8; } goto L_08856210; } L_08856210: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2190u); aot_gpr_31 = (0x08856228u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856228u) goto L_08856228; AOT_REGCACHE_SYNC_OUT(); return; L_08856228: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088561E8; } goto L_08856230; } L_08856230: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2186u); aot_gpr_31 = (0x08856248u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856248u) goto L_08856248; AOT_REGCACHE_SYNC_OUT(); return; L_08856248: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088561E8; } goto L_08856250; } L_08856250: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2184u); aot_gpr_31 = (0x08856268u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856268u) goto L_08856268; AOT_REGCACHE_SYNC_OUT(); return; L_08856268: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088561E8; } goto L_08856270; } L_08856270: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2188u); aot_gpr_31 = (0x08856288u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856288u) goto L_08856288; AOT_REGCACHE_SYNC_OUT(); return; L_08856288: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088561E8; } goto L_08856290; } L_08856290: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2201u); aot_gpr_31 = (0x088562A8u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088562A8u) goto L_088562A8; AOT_REGCACHE_SYNC_OUT(); return; L_088562A8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088561E8; } goto L_088562B0; } L_088562B0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2177u); aot_gpr_31 = (0x088562C8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088562C8u) goto L_088562C8; AOT_REGCACHE_SYNC_OUT(); return; L_088562C8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088561E8; } goto L_088562D0; } L_088562D0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2180u); aot_gpr_31 = (0x088562E8u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088562E8u) goto L_088562E8; AOT_REGCACHE_SYNC_OUT(); return; L_088562E8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088561E8; } goto L_088562F0; } L_088562F0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2193u); aot_gpr_31 = (0x08856308u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856308u) goto L_08856308; AOT_REGCACHE_SYNC_OUT(); return; L_08856308: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088561E8; } goto L_08856310; } L_08856310: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08856324u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856324u) goto L_08856324; AOT_REGCACHE_SYNC_OUT(); return; L_08856324: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08856330: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_088564B0; } goto L_08856354; } L_08856354: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(28224))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_0885636C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2222u); aot_gpr_31 = (0x08856384u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856384u) goto L_08856384; AOT_REGCACHE_SYNC_OUT(); return; L_08856384: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08856388; L_08856388: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_088564C4; } goto L_08856390; } L_08856390: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2224u); aot_gpr_31 = (0x088563A8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088563A8u) goto L_088563A8; AOT_REGCACHE_SYNC_OUT(); return; L_088563A8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856388; } goto L_088563B0; } L_088563B0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2215u); aot_gpr_31 = (0x088563C8u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088563C8u) goto L_088563C8; AOT_REGCACHE_SYNC_OUT(); return; L_088563C8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856388; } goto L_088563D0; } L_088563D0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2211u); aot_gpr_31 = (0x088563E8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088563E8u) goto L_088563E8; AOT_REGCACHE_SYNC_OUT(); return; L_088563E8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856388; } goto L_088563F0; } L_088563F0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2209u); aot_gpr_31 = (0x08856408u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856408u) goto L_08856408; AOT_REGCACHE_SYNC_OUT(); return; L_08856408: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856388; } goto L_08856410; } L_08856410: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2213u); aot_gpr_31 = (0x08856428u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856428u) goto L_08856428; AOT_REGCACHE_SYNC_OUT(); return; L_08856428: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856388; } goto L_08856430; } L_08856430: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2226u); aot_gpr_31 = (0x08856448u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856448u) goto L_08856448; AOT_REGCACHE_SYNC_OUT(); return; L_08856448: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856388; } goto L_08856450; } L_08856450: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2202u); aot_gpr_31 = (0x08856468u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856468u) goto L_08856468; AOT_REGCACHE_SYNC_OUT(); return; L_08856468: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856388; } goto L_08856470; } L_08856470: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2205u); aot_gpr_31 = (0x08856488u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856488u) goto L_08856488; AOT_REGCACHE_SYNC_OUT(); return; L_08856488: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856388; } goto L_08856490; } L_08856490: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2219u); aot_gpr_31 = (0x088564A8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088564A8u) goto L_088564A8; AOT_REGCACHE_SYNC_OUT(); return; L_088564A8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856388; } goto L_088564B0; } L_088564B0: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x088564C4u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088564C4u) goto L_088564C4; AOT_REGCACHE_SYNC_OUT(); return; L_088564C4: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088564D0: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08856630; } goto L_088564F4; } L_088564F4: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(28392))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_0885650C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2246u); aot_gpr_31 = (0x08856524u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856524u) goto L_08856524; AOT_REGCACHE_SYNC_OUT(); return; L_08856524: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08856528; L_08856528: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08856644; } goto L_08856530; } L_08856530: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2249u); aot_gpr_31 = (0x08856548u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856548u) goto L_08856548; AOT_REGCACHE_SYNC_OUT(); return; L_08856548: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856528; } goto L_08856550; } L_08856550: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2240u); aot_gpr_31 = (0x08856568u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856568u) goto L_08856568; AOT_REGCACHE_SYNC_OUT(); return; L_08856568: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856528; } goto L_08856570; } L_08856570: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2236u); aot_gpr_31 = (0x08856588u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856588u) goto L_08856588; AOT_REGCACHE_SYNC_OUT(); return; L_08856588: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856528; } goto L_08856590; } L_08856590: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2234u); aot_gpr_31 = (0x088565A8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088565A8u) goto L_088565A8; AOT_REGCACHE_SYNC_OUT(); return; L_088565A8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856528; } goto L_088565B0; } L_088565B0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2238u); aot_gpr_31 = (0x088565C8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088565C8u) goto L_088565C8; AOT_REGCACHE_SYNC_OUT(); return; L_088565C8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856528; } goto L_088565D0; } L_088565D0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2227u); aot_gpr_31 = (0x088565E8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088565E8u) goto L_088565E8; AOT_REGCACHE_SYNC_OUT(); return; L_088565E8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856528; } goto L_088565F0; } L_088565F0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2230u); aot_gpr_31 = (0x08856608u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856608u) goto L_08856608; AOT_REGCACHE_SYNC_OUT(); return; L_08856608: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856528; } goto L_08856610; } L_08856610: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2243u); aot_gpr_31 = (0x08856628u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856628u) goto L_08856628; AOT_REGCACHE_SYNC_OUT(); return; L_08856628: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856528; } goto L_08856630; } L_08856630: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08856644u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856644u) goto L_08856644; AOT_REGCACHE_SYNC_OUT(); return; L_08856644: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08856650: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_088567D0; } goto L_08856674; } L_08856674: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(28560))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_0885668C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2271u); aot_gpr_31 = (0x088566A4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088566A4u) goto L_088566A4; AOT_REGCACHE_SYNC_OUT(); return; L_088566A4: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_088566A8; L_088566A8: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_088567E4; } goto L_088566B0; } L_088566B0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2273u); aot_gpr_31 = (0x088566C8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088566C8u) goto L_088566C8; AOT_REGCACHE_SYNC_OUT(); return; L_088566C8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088566A8; } goto L_088566D0; } L_088566D0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2265u); aot_gpr_31 = (0x088566E8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088566E8u) goto L_088566E8; AOT_REGCACHE_SYNC_OUT(); return; L_088566E8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088566A8; } goto L_088566F0; } L_088566F0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2261u); aot_gpr_31 = (0x08856708u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856708u) goto L_08856708; AOT_REGCACHE_SYNC_OUT(); return; L_08856708: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088566A8; } goto L_08856710; } L_08856710: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2259u); aot_gpr_31 = (0x08856728u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856728u) goto L_08856728; AOT_REGCACHE_SYNC_OUT(); return; L_08856728: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088566A8; } goto L_08856730; } L_08856730: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2263u); aot_gpr_31 = (0x08856748u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856748u) goto L_08856748; AOT_REGCACHE_SYNC_OUT(); return; L_08856748: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088566A8; } goto L_08856750; } L_08856750: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2275u); aot_gpr_31 = (0x08856768u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856768u) goto L_08856768; AOT_REGCACHE_SYNC_OUT(); return; L_08856768: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088566A8; } goto L_08856770; } L_08856770: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2252u); aot_gpr_31 = (0x08856788u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856788u) goto L_08856788; AOT_REGCACHE_SYNC_OUT(); return; L_08856788: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088566A8; } goto L_08856790; } L_08856790: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2255u); aot_gpr_31 = (0x088567A8u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088567A8u) goto L_088567A8; AOT_REGCACHE_SYNC_OUT(); return; L_088567A8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088566A8; } goto L_088567B0; } L_088567B0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2268u); aot_gpr_31 = (0x088567C8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088567C8u) goto L_088567C8; AOT_REGCACHE_SYNC_OUT(); return; L_088567C8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088566A8; } goto L_088567D0; } L_088567D0: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x088567E4u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088567E4u) goto L_088567E4; AOT_REGCACHE_SYNC_OUT(); return; L_088567E4: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088567F0: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08856970; } goto L_08856814; } L_08856814: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(28728))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_0885682C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2295u); aot_gpr_31 = (0x08856844u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856844u) goto L_08856844; AOT_REGCACHE_SYNC_OUT(); return; L_08856844: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08856848; L_08856848: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08856984; } goto L_08856850; } L_08856850: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2297u); aot_gpr_31 = (0x08856868u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856868u) goto L_08856868; AOT_REGCACHE_SYNC_OUT(); return; L_08856868: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856848; } goto L_08856870; } L_08856870: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2289u); aot_gpr_31 = (0x08856888u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856888u) goto L_08856888; AOT_REGCACHE_SYNC_OUT(); return; L_08856888: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856848; } goto L_08856890; } L_08856890: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2285u); aot_gpr_31 = (0x088568A8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088568A8u) goto L_088568A8; AOT_REGCACHE_SYNC_OUT(); return; L_088568A8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856848; } goto L_088568B0; } L_088568B0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2283u); aot_gpr_31 = (0x088568C8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088568C8u) goto L_088568C8; AOT_REGCACHE_SYNC_OUT(); return; L_088568C8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856848; } goto L_088568D0; } L_088568D0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2287u); aot_gpr_31 = (0x088568E8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088568E8u) goto L_088568E8; AOT_REGCACHE_SYNC_OUT(); return; L_088568E8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856848; } goto L_088568F0; } L_088568F0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2300u); aot_gpr_31 = (0x08856908u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856908u) goto L_08856908; AOT_REGCACHE_SYNC_OUT(); return; L_08856908: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856848; } goto L_08856910; } L_08856910: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2276u); aot_gpr_31 = (0x08856928u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856928u) goto L_08856928; AOT_REGCACHE_SYNC_OUT(); return; L_08856928: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856848; } goto L_08856930; } L_08856930: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2279u); aot_gpr_31 = (0x08856948u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856948u) goto L_08856948; AOT_REGCACHE_SYNC_OUT(); return; L_08856948: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856848; } goto L_08856950; } L_08856950: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2292u); aot_gpr_31 = (0x08856968u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856968u) goto L_08856968; AOT_REGCACHE_SYNC_OUT(); return; L_08856968: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856848; } goto L_08856970; } L_08856970: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08856984u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856984u) goto L_08856984; AOT_REGCACHE_SYNC_OUT(); return; L_08856984: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08856990: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08856B10; } goto L_088569B4; } L_088569B4: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(28896))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088569CC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2320u); aot_gpr_31 = (0x088569E4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088569E4u) goto L_088569E4; AOT_REGCACHE_SYNC_OUT(); return; L_088569E4: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_088569E8; L_088569E8: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08856B24; } goto L_088569F0; } L_088569F0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2322u); aot_gpr_31 = (0x08856A08u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856A08u) goto L_08856A08; AOT_REGCACHE_SYNC_OUT(); return; L_08856A08: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088569E8; } goto L_08856A10; } L_08856A10: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2314u); aot_gpr_31 = (0x08856A28u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856A28u) goto L_08856A28; AOT_REGCACHE_SYNC_OUT(); return; L_08856A28: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088569E8; } goto L_08856A30; } L_08856A30: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2310u); aot_gpr_31 = (0x08856A48u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856A48u) goto L_08856A48; AOT_REGCACHE_SYNC_OUT(); return; L_08856A48: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088569E8; } goto L_08856A50; } L_08856A50: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2308u); aot_gpr_31 = (0x08856A68u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856A68u) goto L_08856A68; AOT_REGCACHE_SYNC_OUT(); return; L_08856A68: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088569E8; } goto L_08856A70; } L_08856A70: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2312u); aot_gpr_31 = (0x08856A88u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856A88u) goto L_08856A88; AOT_REGCACHE_SYNC_OUT(); return; L_08856A88: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088569E8; } goto L_08856A90; } L_08856A90: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2325u); aot_gpr_31 = (0x08856AA8u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856AA8u) goto L_08856AA8; AOT_REGCACHE_SYNC_OUT(); return; L_08856AA8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088569E8; } goto L_08856AB0; } L_08856AB0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2301u); aot_gpr_31 = (0x08856AC8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856AC8u) goto L_08856AC8; AOT_REGCACHE_SYNC_OUT(); return; L_08856AC8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088569E8; } goto L_08856AD0; } L_08856AD0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2304u); aot_gpr_31 = (0x08856AE8u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856AE8u) goto L_08856AE8; AOT_REGCACHE_SYNC_OUT(); return; L_08856AE8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088569E8; } goto L_08856AF0; } L_08856AF0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2317u); aot_gpr_31 = (0x08856B08u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856B08u) goto L_08856B08; AOT_REGCACHE_SYNC_OUT(); return; L_08856B08: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088569E8; } goto L_08856B10; } L_08856B10: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08856B24u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856B24u) goto L_08856B24; AOT_REGCACHE_SYNC_OUT(); return; L_08856B24: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08856B30: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08856CB0; } goto L_08856B54; } L_08856B54: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(29064))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08856B6C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2346u); aot_gpr_31 = (0x08856B84u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856B84u) goto L_08856B84; AOT_REGCACHE_SYNC_OUT(); return; L_08856B84: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08856B88; L_08856B88: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08856CC4; } goto L_08856B90; } L_08856B90: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2348u); aot_gpr_31 = (0x08856BA8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856BA8u) goto L_08856BA8; AOT_REGCACHE_SYNC_OUT(); return; L_08856BA8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856B88; } goto L_08856BB0; } L_08856BB0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2340u); aot_gpr_31 = (0x08856BC8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856BC8u) goto L_08856BC8; AOT_REGCACHE_SYNC_OUT(); return; L_08856BC8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856B88; } goto L_08856BD0; } L_08856BD0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2335u); aot_gpr_31 = (0x08856BE8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856BE8u) goto L_08856BE8; AOT_REGCACHE_SYNC_OUT(); return; L_08856BE8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856B88; } goto L_08856BF0; } L_08856BF0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2333u); aot_gpr_31 = (0x08856C08u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856C08u) goto L_08856C08; AOT_REGCACHE_SYNC_OUT(); return; L_08856C08: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856B88; } goto L_08856C10; } L_08856C10: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2338u); aot_gpr_31 = (0x08856C28u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856C28u) goto L_08856C28; AOT_REGCACHE_SYNC_OUT(); return; L_08856C28: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856B88; } goto L_08856C30; } L_08856C30: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2351u); aot_gpr_31 = (0x08856C48u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856C48u) goto L_08856C48; AOT_REGCACHE_SYNC_OUT(); return; L_08856C48: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856B88; } goto L_08856C50; } L_08856C50: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2326u); aot_gpr_31 = (0x08856C68u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856C68u) goto L_08856C68; AOT_REGCACHE_SYNC_OUT(); return; L_08856C68: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856B88; } goto L_08856C70; } L_08856C70: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2329u); aot_gpr_31 = (0x08856C88u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856C88u) goto L_08856C88; AOT_REGCACHE_SYNC_OUT(); return; L_08856C88: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856B88; } goto L_08856C90; } L_08856C90: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2343u); aot_gpr_31 = (0x08856CA8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856CA8u) goto L_08856CA8; AOT_REGCACHE_SYNC_OUT(); return; L_08856CA8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856B88; } goto L_08856CB0; } L_08856CB0: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08856CC4u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856CC4u) goto L_08856CC4; AOT_REGCACHE_SYNC_OUT(); return; L_08856CC4: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08856CD0: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08856E50; } goto L_08856CF4; } L_08856CF4: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(29232))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08856D0C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2371u); aot_gpr_31 = (0x08856D24u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856D24u) goto L_08856D24; AOT_REGCACHE_SYNC_OUT(); return; L_08856D24: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08856D28; L_08856D28: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08856E64; } goto L_08856D30; } L_08856D30: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2373u); aot_gpr_31 = (0x08856D48u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856D48u) goto L_08856D48; AOT_REGCACHE_SYNC_OUT(); return; L_08856D48: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856D28; } goto L_08856D50; } L_08856D50: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2365u); aot_gpr_31 = (0x08856D68u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856D68u) goto L_08856D68; AOT_REGCACHE_SYNC_OUT(); return; L_08856D68: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856D28; } goto L_08856D70; } L_08856D70: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2361u); aot_gpr_31 = (0x08856D88u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856D88u) goto L_08856D88; AOT_REGCACHE_SYNC_OUT(); return; L_08856D88: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856D28; } goto L_08856D90; } L_08856D90: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2359u); aot_gpr_31 = (0x08856DA8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856DA8u) goto L_08856DA8; AOT_REGCACHE_SYNC_OUT(); return; L_08856DA8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856D28; } goto L_08856DB0; } L_08856DB0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2363u); aot_gpr_31 = (0x08856DC8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856DC8u) goto L_08856DC8; AOT_REGCACHE_SYNC_OUT(); return; L_08856DC8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856D28; } goto L_08856DD0; } L_08856DD0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2376u); aot_gpr_31 = (0x08856DE8u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856DE8u) goto L_08856DE8; AOT_REGCACHE_SYNC_OUT(); return; L_08856DE8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856D28; } goto L_08856DF0; } L_08856DF0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2352u); aot_gpr_31 = (0x08856E08u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856E08u) goto L_08856E08; AOT_REGCACHE_SYNC_OUT(); return; L_08856E08: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856D28; } goto L_08856E10; } L_08856E10: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2355u); aot_gpr_31 = (0x08856E28u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856E28u) goto L_08856E28; AOT_REGCACHE_SYNC_OUT(); return; L_08856E28: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856D28; } goto L_08856E30; } L_08856E30: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2368u); aot_gpr_31 = (0x08856E48u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856E48u) goto L_08856E48; AOT_REGCACHE_SYNC_OUT(); return; L_08856E48: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856D28; } goto L_08856E50; } L_08856E50: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08856E64u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856E64u) goto L_08856E64; AOT_REGCACHE_SYNC_OUT(); return; L_08856E64: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08856E70: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (2237u << 16u); aot_gpr_6 = (aot_gpr_6 & 65535u); aot_gpr_7 = (0u | 159u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08856F10; } goto L_08856E90; } L_08856E90: aot_gpr_7 = (0u | 143u); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 137u); if (branch_taken) { goto L_08856EF0; } goto L_08856E9C; } L_08856E9C: { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 119u); if (branch_taken) { goto L_08856ED0; } goto L_08856EA4; } L_08856EA4: { const bool branch_taken = aot_gpr_6 != aot_gpr_7; if (branch_taken) { goto L_08856F30; } goto L_08856EAC; } L_08856EAC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2383u); aot_gpr_31 = (0x08856EC4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856EC4u) goto L_08856EC4; AOT_REGCACHE_SYNC_OUT(); return; L_08856EC4: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08856EC8; L_08856EC8: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08856F40; } goto L_08856ED0; } L_08856ED0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2380u); aot_gpr_31 = (0x08856EE8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856EE8u) goto L_08856EE8; AOT_REGCACHE_SYNC_OUT(); return; L_08856EE8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856EC8; } goto L_08856EF0; } L_08856EF0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2377u); aot_gpr_31 = (0x08856F08u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856F08u) goto L_08856F08; AOT_REGCACHE_SYNC_OUT(); return; L_08856F08: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856EC8; } goto L_08856F10; } L_08856F10: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2386u); aot_gpr_31 = (0x08856F28u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856F28u) goto L_08856F28; AOT_REGCACHE_SYNC_OUT(); return; L_08856F28: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856EC8; } goto L_08856F30; } L_08856F30: aot_gpr_7 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_31 = (0x08856F40u); aot_gpr_5 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856F40u) goto L_08856F40; AOT_REGCACHE_SYNC_OUT(); return; L_08856F40: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08856F4C: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (2237u << 16u); aot_gpr_6 = (aot_gpr_6 & 65535u); aot_gpr_7 = (0u | 159u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08856FEC; } goto L_08856F6C; } L_08856F6C: aot_gpr_7 = (0u | 143u); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 137u); if (branch_taken) { goto L_08856FCC; } goto L_08856F78; } L_08856F78: { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 119u); if (branch_taken) { goto L_08856FAC; } goto L_08856F80; } L_08856F80: { const bool branch_taken = aot_gpr_6 != aot_gpr_7; if (branch_taken) { goto L_0885700C; } goto L_08856F88; } L_08856F88: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2429u); aot_gpr_31 = (0x08856FA0u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856FA0u) goto L_08856FA0; AOT_REGCACHE_SYNC_OUT(); return; L_08856FA0: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08856FA4; L_08856FA4: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_0885701C; } goto L_08856FAC; } L_08856FAC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2427u); aot_gpr_31 = (0x08856FC4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856FC4u) goto L_08856FC4; AOT_REGCACHE_SYNC_OUT(); return; L_08856FC4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856FA4; } goto L_08856FCC; } L_08856FCC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2425u); aot_gpr_31 = (0x08856FE4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08856FE4u) goto L_08856FE4; AOT_REGCACHE_SYNC_OUT(); return; L_08856FE4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856FA4; } goto L_08856FEC; } L_08856FEC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2431u); aot_gpr_31 = (0x08857004u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857004u) goto L_08857004; AOT_REGCACHE_SYNC_OUT(); return; L_08857004: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08856FA4; } goto L_0885700C; } L_0885700C: aot_gpr_7 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_31 = (0x0885701Cu); aot_gpr_5 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x0885701Cu) goto L_0885701C; AOT_REGCACHE_SYNC_OUT(); return; L_0885701C: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08857028: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (2237u << 16u); aot_gpr_6 = (aot_gpr_6 & 65535u); aot_gpr_7 = (0u | 159u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_088570C8; } goto L_08857048; } L_08857048: aot_gpr_7 = (0u | 143u); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 137u); if (branch_taken) { goto L_088570A8; } goto L_08857054; } L_08857054: { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 119u); if (branch_taken) { goto L_08857088; } goto L_0885705C; } L_0885705C: { const bool branch_taken = aot_gpr_6 != aot_gpr_7; if (branch_taken) { goto L_088570E8; } goto L_08857064; } L_08857064: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2438u); aot_gpr_31 = (0x0885707Cu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x0885707Cu) goto L_0885707C; AOT_REGCACHE_SYNC_OUT(); return; L_0885707C: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08857080; L_08857080: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_088570F8; } goto L_08857088; } L_08857088: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2435u); aot_gpr_31 = (0x088570A0u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088570A0u) goto L_088570A0; AOT_REGCACHE_SYNC_OUT(); return; L_088570A0: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857080; } goto L_088570A8; } L_088570A8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2432u); aot_gpr_31 = (0x088570C0u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088570C0u) goto L_088570C0; AOT_REGCACHE_SYNC_OUT(); return; L_088570C0: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857080; } goto L_088570C8; } L_088570C8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2441u); aot_gpr_31 = (0x088570E0u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088570E0u) goto L_088570E0; AOT_REGCACHE_SYNC_OUT(); return; L_088570E0: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857080; } goto L_088570E8; } L_088570E8: aot_gpr_7 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_31 = (0x088570F8u); aot_gpr_5 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088570F8u) goto L_088570F8; AOT_REGCACHE_SYNC_OUT(); return; L_088570F8: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08857104: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (2237u << 16u); aot_gpr_6 = (aot_gpr_6 & 65535u); aot_gpr_7 = (0u | 159u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_088571A4; } goto L_08857124; } L_08857124: aot_gpr_7 = (0u | 143u); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 137u); if (branch_taken) { goto L_08857184; } goto L_08857130; } L_08857130: { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 119u); if (branch_taken) { goto L_08857164; } goto L_08857138; } L_08857138: { const bool branch_taken = aot_gpr_6 != aot_gpr_7; if (branch_taken) { goto L_088571C4; } goto L_08857140; } L_08857140: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2450u); aot_gpr_31 = (0x08857158u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857158u) goto L_08857158; AOT_REGCACHE_SYNC_OUT(); return; L_08857158: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_0885715C; L_0885715C: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_088571D4; } goto L_08857164; } L_08857164: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2447u); aot_gpr_31 = (0x0885717Cu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x0885717Cu) goto L_0885717C; AOT_REGCACHE_SYNC_OUT(); return; L_0885717C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_0885715C; } goto L_08857184; } L_08857184: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2444u); aot_gpr_31 = (0x0885719Cu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x0885719Cu) goto L_0885719C; AOT_REGCACHE_SYNC_OUT(); return; L_0885719C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_0885715C; } goto L_088571A4; } L_088571A4: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2453u); aot_gpr_31 = (0x088571BCu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088571BCu) goto L_088571BC; AOT_REGCACHE_SYNC_OUT(); return; L_088571BC: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_0885715C; } goto L_088571C4; } L_088571C4: aot_gpr_7 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_31 = (0x088571D4u); aot_gpr_5 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088571D4u) goto L_088571D4; AOT_REGCACHE_SYNC_OUT(); return; L_088571D4: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088571E0: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08857360; } goto L_08857204; } L_08857204: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(29400))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_0885721C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2475u); aot_gpr_31 = (0x08857234u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857234u) goto L_08857234; AOT_REGCACHE_SYNC_OUT(); return; L_08857234: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08857238; L_08857238: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08857374; } goto L_08857240; } L_08857240: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2477u); aot_gpr_31 = (0x08857258u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857258u) goto L_08857258; AOT_REGCACHE_SYNC_OUT(); return; L_08857258: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857238; } goto L_08857260; } L_08857260: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2469u); aot_gpr_31 = (0x08857278u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857278u) goto L_08857278; AOT_REGCACHE_SYNC_OUT(); return; L_08857278: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857238; } goto L_08857280; } L_08857280: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2465u); aot_gpr_31 = (0x08857298u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857298u) goto L_08857298; AOT_REGCACHE_SYNC_OUT(); return; L_08857298: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857238; } goto L_088572A0; } L_088572A0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2463u); aot_gpr_31 = (0x088572B8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088572B8u) goto L_088572B8; AOT_REGCACHE_SYNC_OUT(); return; L_088572B8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857238; } goto L_088572C0; } L_088572C0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2467u); aot_gpr_31 = (0x088572D8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088572D8u) goto L_088572D8; AOT_REGCACHE_SYNC_OUT(); return; L_088572D8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857238; } goto L_088572E0; } L_088572E0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2479u); aot_gpr_31 = (0x088572F8u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088572F8u) goto L_088572F8; AOT_REGCACHE_SYNC_OUT(); return; L_088572F8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857238; } goto L_08857300; } L_08857300: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2456u); aot_gpr_31 = (0x08857318u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857318u) goto L_08857318; AOT_REGCACHE_SYNC_OUT(); return; L_08857318: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857238; } goto L_08857320; } L_08857320: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2459u); aot_gpr_31 = (0x08857338u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857338u) goto L_08857338; AOT_REGCACHE_SYNC_OUT(); return; L_08857338: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857238; } goto L_08857340; } L_08857340: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2472u); aot_gpr_31 = (0x08857358u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857358u) goto L_08857358; AOT_REGCACHE_SYNC_OUT(); return; L_08857358: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857238; } goto L_08857360; } L_08857360: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08857374u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C971C, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857374u) goto L_08857374; AOT_REGCACHE_SYNC_OUT(); return; L_08857374: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08857380: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08857500; } goto L_088573A4; } L_088573A4: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(29568))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088573BC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2499u); aot_gpr_31 = (0x088573D4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088573D4u) goto L_088573D4; AOT_REGCACHE_SYNC_OUT(); return; L_088573D4: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_088573D8; L_088573D8: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08857514; } goto L_088573E0; } L_088573E0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2501u); aot_gpr_31 = (0x088573F8u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088573F8u) goto L_088573F8; AOT_REGCACHE_SYNC_OUT(); return; L_088573F8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088573D8; } goto L_08857400; } L_08857400: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2493u); aot_gpr_31 = (0x08857418u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857418u) goto L_08857418; AOT_REGCACHE_SYNC_OUT(); return; L_08857418: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088573D8; } goto L_08857420; } L_08857420: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2489u); aot_gpr_31 = (0x08857438u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857438u) goto L_08857438; AOT_REGCACHE_SYNC_OUT(); return; L_08857438: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088573D8; } goto L_08857440; } L_08857440: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2487u); aot_gpr_31 = (0x08857458u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857458u) goto L_08857458; AOT_REGCACHE_SYNC_OUT(); return; L_08857458: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088573D8; } goto L_08857460; } L_08857460: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2491u); aot_gpr_31 = (0x08857478u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857478u) goto L_08857478; AOT_REGCACHE_SYNC_OUT(); return; L_08857478: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088573D8; } goto L_08857480; } L_08857480: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2505u); aot_gpr_31 = (0x08857498u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857498u) goto L_08857498; AOT_REGCACHE_SYNC_OUT(); return; L_08857498: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088573D8; } goto L_088574A0; } L_088574A0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2480u); aot_gpr_31 = (0x088574B8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088574B8u) goto L_088574B8; AOT_REGCACHE_SYNC_OUT(); return; L_088574B8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088573D8; } goto L_088574C0; } L_088574C0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2483u); aot_gpr_31 = (0x088574D8u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088574D8u) goto L_088574D8; AOT_REGCACHE_SYNC_OUT(); return; L_088574D8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088573D8; } goto L_088574E0; } L_088574E0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2496u); aot_gpr_31 = (0x088574F8u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088574F8u) goto L_088574F8; AOT_REGCACHE_SYNC_OUT(); return; L_088574F8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088573D8; } goto L_08857500; } L_08857500: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08857514u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857514u) goto L_08857514; AOT_REGCACHE_SYNC_OUT(); return; L_08857514: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08857520: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (2237u << 16u); aot_gpr_6 = (aot_gpr_6 & 65535u); aot_gpr_7 = (0u | 159u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_088575C0; } goto L_08857540; } L_08857540: aot_gpr_7 = (0u | 143u); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 137u); if (branch_taken) { goto L_088575A0; } goto L_0885754C; } L_0885754C: { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 119u); if (branch_taken) { goto L_08857580; } goto L_08857554; } L_08857554: { const bool branch_taken = aot_gpr_6 != aot_gpr_7; if (branch_taken) { goto L_088575E0; } goto L_0885755C; } L_0885755C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2519u); aot_gpr_31 = (0x08857574u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857574u) goto L_08857574; AOT_REGCACHE_SYNC_OUT(); return; L_08857574: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08857578; L_08857578: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_088575F0; } goto L_08857580; } L_08857580: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2517u); aot_gpr_31 = (0x08857598u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857598u) goto L_08857598; AOT_REGCACHE_SYNC_OUT(); return; L_08857598: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857578; } goto L_088575A0; } L_088575A0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2515u); aot_gpr_31 = (0x088575B8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088575B8u) goto L_088575B8; AOT_REGCACHE_SYNC_OUT(); return; L_088575B8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857578; } goto L_088575C0; } L_088575C0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2521u); aot_gpr_31 = (0x088575D8u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088575D8u) goto L_088575D8; AOT_REGCACHE_SYNC_OUT(); return; L_088575D8: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857578; } goto L_088575E0; } L_088575E0: aot_gpr_7 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_31 = (0x088575F0u); aot_gpr_5 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C971C, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088575F0u) goto L_088575F0; AOT_REGCACHE_SYNC_OUT(); return; L_088575F0: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088575FC: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_0885777C; } goto L_08857620; } L_08857620: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(29736))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08857638: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2542u); aot_gpr_31 = (0x08857650u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857650u) goto L_08857650; AOT_REGCACHE_SYNC_OUT(); return; L_08857650: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08857654; L_08857654: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08857790; } goto L_0885765C; } L_0885765C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2544u); aot_gpr_31 = (0x08857674u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857674u) goto L_08857674; AOT_REGCACHE_SYNC_OUT(); return; L_08857674: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857654; } goto L_0885767C; } L_0885767C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2536u); aot_gpr_31 = (0x08857694u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857694u) goto L_08857694; AOT_REGCACHE_SYNC_OUT(); return; L_08857694: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857654; } goto L_0885769C; } L_0885769C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2532u); aot_gpr_31 = (0x088576B4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088576B4u) goto L_088576B4; AOT_REGCACHE_SYNC_OUT(); return; L_088576B4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857654; } goto L_088576BC; } L_088576BC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2530u); aot_gpr_31 = (0x088576D4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088576D4u) goto L_088576D4; AOT_REGCACHE_SYNC_OUT(); return; L_088576D4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857654; } goto L_088576DC; } L_088576DC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2534u); aot_gpr_31 = (0x088576F4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088576F4u) goto L_088576F4; AOT_REGCACHE_SYNC_OUT(); return; L_088576F4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857654; } goto L_088576FC; } L_088576FC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2547u); aot_gpr_31 = (0x08857714u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857714u) goto L_08857714; AOT_REGCACHE_SYNC_OUT(); return; L_08857714: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857654; } goto L_0885771C; } L_0885771C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2523u); aot_gpr_31 = (0x08857734u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857734u) goto L_08857734; AOT_REGCACHE_SYNC_OUT(); return; L_08857734: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857654; } goto L_0885773C; } L_0885773C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2526u); aot_gpr_31 = (0x08857754u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857754u) goto L_08857754; AOT_REGCACHE_SYNC_OUT(); return; L_08857754: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857654; } goto L_0885775C; } L_0885775C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2539u); aot_gpr_31 = (0x08857774u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857774u) goto L_08857774; AOT_REGCACHE_SYNC_OUT(); return; L_08857774: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857654; } goto L_0885777C; } L_0885777C: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08857790u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857790u) goto L_08857790; AOT_REGCACHE_SYNC_OUT(); return; L_08857790: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_0885779C: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_0885791C; } goto L_088577C0; } L_088577C0: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(29904))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_088577D8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2567u); aot_gpr_31 = (0x088577F0u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088577F0u) goto L_088577F0; AOT_REGCACHE_SYNC_OUT(); return; L_088577F0: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_088577F4; L_088577F4: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08857930; } goto L_088577FC; } L_088577FC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2569u); aot_gpr_31 = (0x08857814u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857814u) goto L_08857814; AOT_REGCACHE_SYNC_OUT(); return; L_08857814: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088577F4; } goto L_0885781C; } L_0885781C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2561u); aot_gpr_31 = (0x08857834u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857834u) goto L_08857834; AOT_REGCACHE_SYNC_OUT(); return; L_08857834: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088577F4; } goto L_0885783C; } L_0885783C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2557u); aot_gpr_31 = (0x08857854u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857854u) goto L_08857854; AOT_REGCACHE_SYNC_OUT(); return; L_08857854: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088577F4; } goto L_0885785C; } L_0885785C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2555u); aot_gpr_31 = (0x08857874u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857874u) goto L_08857874; AOT_REGCACHE_SYNC_OUT(); return; L_08857874: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088577F4; } goto L_0885787C; } L_0885787C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2559u); aot_gpr_31 = (0x08857894u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857894u) goto L_08857894; AOT_REGCACHE_SYNC_OUT(); return; L_08857894: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088577F4; } goto L_0885789C; } L_0885789C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2572u); aot_gpr_31 = (0x088578B4u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088578B4u) goto L_088578B4; AOT_REGCACHE_SYNC_OUT(); return; L_088578B4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088577F4; } goto L_088578BC; } L_088578BC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2548u); aot_gpr_31 = (0x088578D4u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088578D4u) goto L_088578D4; AOT_REGCACHE_SYNC_OUT(); return; L_088578D4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088577F4; } goto L_088578DC; } L_088578DC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2551u); aot_gpr_31 = (0x088578F4u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088578F4u) goto L_088578F4; AOT_REGCACHE_SYNC_OUT(); return; L_088578F4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088577F4; } goto L_088578FC; } L_088578FC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2564u); aot_gpr_31 = (0x08857914u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857914u) goto L_08857914; AOT_REGCACHE_SYNC_OUT(); return; L_08857914: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_088577F4; } goto L_0885791C; } L_0885791C: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08857930u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857930u) goto L_08857930; AOT_REGCACHE_SYNC_OUT(); return; L_08857930: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_0885793C: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (2237u << 16u); aot_gpr_6 = (aot_gpr_6 & 65535u); aot_gpr_7 = (0u | 159u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_088579DC; } goto L_0885795C; } L_0885795C: aot_gpr_7 = (0u | 143u); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 137u); if (branch_taken) { goto L_088579BC; } goto L_08857968; } L_08857968: { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 119u); if (branch_taken) { goto L_0885799C; } goto L_08857970; } L_08857970: { const bool branch_taken = aot_gpr_6 != aot_gpr_7; if (branch_taken) { goto L_088579FC; } goto L_08857978; } L_08857978: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2749u); aot_gpr_31 = (0x08857990u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857990u) goto L_08857990; AOT_REGCACHE_SYNC_OUT(); return; L_08857990: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08857994; L_08857994: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08857A0C; } goto L_0885799C; } L_0885799C: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2747u); aot_gpr_31 = (0x088579B4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088579B4u) goto L_088579B4; AOT_REGCACHE_SYNC_OUT(); return; L_088579B4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857994; } goto L_088579BC; } L_088579BC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2745u); aot_gpr_31 = (0x088579D4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088579D4u) goto L_088579D4; AOT_REGCACHE_SYNC_OUT(); return; L_088579D4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857994; } goto L_088579DC; } L_088579DC: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2751u); aot_gpr_31 = (0x088579F4u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x088579F4u) goto L_088579F4; AOT_REGCACHE_SYNC_OUT(); return; L_088579F4: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857994; } goto L_088579FC; } L_088579FC: aot_gpr_7 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_31 = (0x08857A0Cu); aot_gpr_5 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857A0Cu) goto L_08857A0C; AOT_REGCACHE_SYNC_OUT(); return; L_08857A0C: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08857A18: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08857B98; } goto L_08857A3C; } L_08857A3C: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(30072))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08857A54: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2715u); aot_gpr_31 = (0x08857A6Cu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857A6Cu) goto L_08857A6C; AOT_REGCACHE_SYNC_OUT(); return; L_08857A6C: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08857A70; L_08857A70: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08857BAC; } goto L_08857A78; } L_08857A78: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2718u); aot_gpr_31 = (0x08857A90u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857A90u) goto L_08857A90; AOT_REGCACHE_SYNC_OUT(); return; L_08857A90: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857A70; } goto L_08857A98; } L_08857A98: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2709u); aot_gpr_31 = (0x08857AB0u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857AB0u) goto L_08857AB0; AOT_REGCACHE_SYNC_OUT(); return; L_08857AB0: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857A70; } goto L_08857AB8; } L_08857AB8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2705u); aot_gpr_31 = (0x08857AD0u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857AD0u) goto L_08857AD0; AOT_REGCACHE_SYNC_OUT(); return; L_08857AD0: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857A70; } goto L_08857AD8; } L_08857AD8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2703u); aot_gpr_31 = (0x08857AF0u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857AF0u) goto L_08857AF0; AOT_REGCACHE_SYNC_OUT(); return; L_08857AF0: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857A70; } goto L_08857AF8; } L_08857AF8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2707u); aot_gpr_31 = (0x08857B10u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857B10u) goto L_08857B10; AOT_REGCACHE_SYNC_OUT(); return; L_08857B10: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857A70; } goto L_08857B18; } L_08857B18: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2721u); aot_gpr_31 = (0x08857B30u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857B30u) goto L_08857B30; AOT_REGCACHE_SYNC_OUT(); return; L_08857B30: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857A70; } goto L_08857B38; } L_08857B38: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2696u); aot_gpr_31 = (0x08857B50u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857B50u) goto L_08857B50; AOT_REGCACHE_SYNC_OUT(); return; L_08857B50: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857A70; } goto L_08857B58; } L_08857B58: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2699u); aot_gpr_31 = (0x08857B70u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857B70u) goto L_08857B70; AOT_REGCACHE_SYNC_OUT(); return; L_08857B70: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857A70; } goto L_08857B78; } L_08857B78: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2712u); aot_gpr_31 = (0x08857B90u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857B90u) goto L_08857B90; AOT_REGCACHE_SYNC_OUT(); return; L_08857B90: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857A70; } goto L_08857B98; } L_08857B98: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08857BACu); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857BACu) goto L_08857BAC; AOT_REGCACHE_SYNC_OUT(); return; L_08857BAC: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08857BB8: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-122)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(37) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08857D18; } goto L_08857BDC; } L_08857BDC: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(30240))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08857BF4: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2741u); aot_gpr_31 = (0x08857C0Cu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857C0Cu) goto L_08857C0C; AOT_REGCACHE_SYNC_OUT(); return; L_08857C0C: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08857C10; L_08857C10: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08857D2C; } goto L_08857C18; } L_08857C18: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2735u); aot_gpr_31 = (0x08857C30u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857C30u) goto L_08857C30; AOT_REGCACHE_SYNC_OUT(); return; L_08857C30: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857C10; } goto L_08857C38; } L_08857C38: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2731u); aot_gpr_31 = (0x08857C50u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857C50u) goto L_08857C50; AOT_REGCACHE_SYNC_OUT(); return; L_08857C50: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857C10; } goto L_08857C58; } L_08857C58: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2729u); aot_gpr_31 = (0x08857C70u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857C70u) goto L_08857C70; AOT_REGCACHE_SYNC_OUT(); return; L_08857C70: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857C10; } goto L_08857C78; } L_08857C78: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2733u); aot_gpr_31 = (0x08857C90u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857C90u) goto L_08857C90; AOT_REGCACHE_SYNC_OUT(); return; L_08857C90: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857C10; } goto L_08857C98; } L_08857C98: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2744u); aot_gpr_31 = (0x08857CB0u); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857CB0u) goto L_08857CB0; AOT_REGCACHE_SYNC_OUT(); return; L_08857CB0: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857C10; } goto L_08857CB8; } L_08857CB8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2722u); aot_gpr_31 = (0x08857CD0u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857CD0u) goto L_08857CD0; AOT_REGCACHE_SYNC_OUT(); return; L_08857CD0: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857C10; } goto L_08857CD8; } L_08857CD8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2725u); aot_gpr_31 = (0x08857CF0u); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857CF0u) goto L_08857CF0; AOT_REGCACHE_SYNC_OUT(); return; L_08857CF0: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857C10; } goto L_08857CF8; } L_08857CF8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2738u); aot_gpr_31 = (0x08857D10u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857D10u) goto L_08857D10; AOT_REGCACHE_SYNC_OUT(); return; L_08857D10: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857C10; } goto L_08857D18; } L_08857D18: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08857D2Cu); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857D2Cu) goto L_08857D2C; AOT_REGCACHE_SYNC_OUT(); return; L_08857D2C: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08857D38: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (2237u << 16u); aot_gpr_6 = (aot_gpr_6 & 65535u); aot_gpr_7 = (0u | 159u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08857DD8; } goto L_08857D58; } L_08857D58: aot_gpr_7 = (0u | 143u); { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 137u); if (branch_taken) { goto L_08857DB8; } goto L_08857D64; } L_08857D64: { const bool branch_taken = aot_gpr_6 == aot_gpr_7; aot_gpr_7 = (0u | 119u); if (branch_taken) { goto L_08857D98; } goto L_08857D6C; } L_08857D6C: { const bool branch_taken = aot_gpr_6 != aot_gpr_7; if (branch_taken) { goto L_08857DF8; } goto L_08857D74; } L_08857D74: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2759u); aot_gpr_31 = (0x08857D8Cu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857D8Cu) goto L_08857D8C; AOT_REGCACHE_SYNC_OUT(); return; L_08857D8C: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08857D90; L_08857D90: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08857E08; } goto L_08857D98; } L_08857D98: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2756u); aot_gpr_31 = (0x08857DB0u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857DB0u) goto L_08857DB0; AOT_REGCACHE_SYNC_OUT(); return; L_08857DB0: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857D90; } goto L_08857DB8; } L_08857DB8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2753u); aot_gpr_31 = (0x08857DD0u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857DD0u) goto L_08857DD0; AOT_REGCACHE_SYNC_OUT(); return; L_08857DD0: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857D90; } goto L_08857DD8; } L_08857DD8: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2762u); aot_gpr_31 = (0x08857DF0u); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857DF0u) goto L_08857DF0; AOT_REGCACHE_SYNC_OUT(); return; L_08857DF0: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857D90; } goto L_08857DF8; } L_08857DF8: aot_gpr_7 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_31 = (0x08857E08u); aot_gpr_5 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C971C, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 302u, 0x088C971Cu>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857E08u) goto L_08857E08; AOT_REGCACHE_SYNC_OUT(); return; L_08857E08: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08857E14: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { goto L_08857F94; } goto L_08857E38; } L_08857E38: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(30392))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08857E50: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2784u); aot_gpr_31 = (0x08857E68u); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857E68u) goto L_08857E68; AOT_REGCACHE_SYNC_OUT(); return; L_08857E68: ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); goto L_08857E6C; L_08857E6C: { const bool branch_taken = 0u == 0u; if (branch_taken) { goto L_08857FA8; } goto L_08857E74; } L_08857E74: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2786u); aot_gpr_31 = (0x08857E8Cu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857E8Cu) goto L_08857E8C; AOT_REGCACHE_SYNC_OUT(); return; L_08857E8C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857E6C; } goto L_08857E94; } L_08857E94: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2778u); aot_gpr_31 = (0x08857EACu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857EACu) goto L_08857EAC; AOT_REGCACHE_SYNC_OUT(); return; L_08857EAC: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857E6C; } goto L_08857EB4; } L_08857EB4: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2774u); aot_gpr_31 = (0x08857ECCu); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857ECCu) goto L_08857ECC; AOT_REGCACHE_SYNC_OUT(); return; L_08857ECC: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857E6C; } goto L_08857ED4; } L_08857ED4: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2772u); aot_gpr_31 = (0x08857EECu); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857EECu) goto L_08857EEC; AOT_REGCACHE_SYNC_OUT(); return; L_08857EEC: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857E6C; } goto L_08857EF4; } L_08857EF4: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2776u); aot_gpr_31 = (0x08857F0Cu); aot_gpr_8 = (0u | 2u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857F0Cu) goto L_08857F0C; AOT_REGCACHE_SYNC_OUT(); return; L_08857F0C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857E6C; } goto L_08857F14; } L_08857F14: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2789u); aot_gpr_31 = (0x08857F2Cu); aot_gpr_8 = (0u | 1u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857F2Cu) goto L_08857F2C; AOT_REGCACHE_SYNC_OUT(); return; L_08857F2C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857E6C; } goto L_08857F34; } L_08857F34: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2765u); aot_gpr_31 = (0x08857F4Cu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857F4Cu) goto L_08857F4C; AOT_REGCACHE_SYNC_OUT(); return; L_08857F4C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857E6C; } goto L_08857F54; } L_08857F54: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2768u); aot_gpr_31 = (0x08857F6Cu); aot_gpr_8 = (0u | 4u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857F6Cu) goto L_08857F6C; AOT_REGCACHE_SYNC_OUT(); return; L_08857F6C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857E6C; } goto L_08857F74; } L_08857F74: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2781u); aot_gpr_31 = (0x08857F8Cu); aot_gpr_8 = (0u | 3u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C95D8, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem, ctx.pc, ctx.hi, ctx.lo, aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[9], ctx.gpr[28], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 283u, 0x088C95D8u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857F8Cu) goto L_08857F8C; AOT_REGCACHE_SYNC_OUT(); return; L_08857F8C: { const bool branch_taken = 0u == 0u; ctx.gpr[2] = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(0))); if (branch_taken) { goto L_08857E6C; } goto L_08857F94; } L_08857F94: aot_gpr_6 = (aot_gpr_4 | 0u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (aot_gpr_6 | 0u); aot_gpr_31 = (0x08857FA8u); aot_gpr_6 = (aot_gpr_7 | 0u); if (([&]() { /*PSPRECOMP_RESIDENT_SCHED_SAFE*/ if (rt.resident_generated_leaf_fast_allowed()) return rt.invoke_resident_generated_leaf<&vcs_resident_region_088C9640, 49u, 289u, 0x088C9640u>(ctx, &aot_mem, ctx.pc, ctx.gpr[1], ctx.gpr[2], aot_gpr_4, aot_gpr_5, aot_gpr_6, aot_gpr_7, aot_gpr_8, ctx.gpr[28], ctx.gpr[29], aot_gpr_31); AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_resident_scheduler_fallback<&recomp_unit_0049_entry, 49u, 289u, 0x088C9640u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()) && ctx.pc == 0x08857FA8u) goto L_08857FA8; AOT_REGCACHE_SYNC_OUT(); return; L_08857FA8: aot_gpr_31 = (aot_mem.aot_direct_load32(ctx.gpr[29] + static_cast(4))); jump_target = aot_gpr_31; ctx.gpr[29] = (ctx.gpr[29] + static_cast(16)); // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08857FB4: ctx.gpr[29] = (ctx.gpr[29] + static_cast(-16)); aot_gpr_7 = (aot_gpr_6 & 65535u); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_6 = (aot_gpr_7 + static_cast(-118)); aot_gpr_5 = (2237u << 16u); aot_gpr_8 = (aot_gpr_6 < static_cast(41) ? 1u : 0u); aot_mem.aot_direct_store32(ctx.gpr[29] + static_cast(4), aot_gpr_31); { const bool branch_taken = aot_gpr_8 == 0u; aot_gpr_5 = (aot_gpr_5 + static_cast(-28320)); if (branch_taken) { (void)([&]() { AOT_REGCACHE_SYNC_OUT(); const bool aot_regcache_same_ = (rt.invoke_chained_trusted_direct<&recomp_unit_0021_entry, 21u, 22u, 0x08858134u>(ctx, &aot_mem)); if (aot_regcache_same_) AOT_REGCACHE_SYNC_IN(); else aot_regcache_valid = false; return aot_regcache_same_; }()); AOT_REGCACHE_SYNC_OUT(); return; } goto L_08857FD8; } L_08857FD8: aot_gpr_6 = (aot_gpr_6 << 2u); ctx.gpr[1] = (2231u << 16u); ctx.gpr[1] = (ctx.gpr[1] + aot_gpr_6); ctx.gpr[1] = (aot_mem.aot_direct_load32(ctx.gpr[1] + static_cast(30560))); jump_target = ctx.gpr[1]; // PSPRECOMP_V813_JR_FAST_EXIT: preserve the exact 256-transfer boundary; common JR path is shared. if (++local_transfers < 256u) goto LOCAL_JR_DISPATCH; // PSPRECOMP_V812_SHARED_SCHED_JUMP goto LOCAL_SCHED_BOUNDARY; L_08857FF0: aot_gpr_6 = (aot_gpr_4 + static_cast(1724)); aot_gpr_4 = (aot_gpr_5 | 0u); aot_gpr_5 = (ctx.gpr[29] | 0u); aot_gpr_7 = (0u | 2809u); ctx.pc = 0x08858000u; AOT_REGCACHE_SYNC_OUT(); return; } #undef AOT_REGCACHE_SYNC_IN #undef AOT_REGCACHE_SYNC_OUT void recomp_unit_0020(Runtime &rt, AllegrexContext &ctx) { auto aot_mem = rt.memory().aot_fast_view(); recomp_unit_0020_entry(rt, ctx, 0u, aot_mem); } void register_generated_unit_20(Runtime &runtime) { runtime.register_generated_unit(20u, 0x08854000u, 16384u, &recomp_unit_0020, &recomp_unit_0020_entry); // PSPRECOMP_V812_COMPACT_REGISTRATION: same entry set, looped once in Runtime instead of source-expanded calls. runtime.register_generated_entry_mask(0x08854000u, &recomp_unit_0020, "recomp_unit_0020", kEntryMasks_recomp_unit_0020, 64u); } } // namespace psprecomp