mirror of
https://github.com/HarbourMasters/SpaghettiKart
synced 2026-08-16 21:37:47 -04:00
Replace mk_Vtx_Flag type with GBI provided Vtx (#160)
There's no reason to have our own special type when it exactly matches a GBI type. This required updating some inc.c data as the old mk_Vtx_Flag type had the 'flag' member in the incorrect location. Signed-off-by: Taggerung <tyler.taggerung@gmail.com>
This commit is contained in:
Tyler McGavran
+27
-66
@@ -541,12 +541,20 @@ GLOBAL_ASM("asm/non_matchings/code_80091750/func_80092258.s")
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#ifdef MIPS_TO_C
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//generated by mips_to_c commit 06ada559d7a32fdab49fa2d619cdfa027615bcda
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static mk_Vtx_Flag *D_800E84C0[3] = { D_02007BB8, D_02007CD8, D_02007DF8 }; /* const */
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static ? D_800E84CC; /* unable to generate initializer; const */
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static Vtx *D_800E84C0[3] = { D_02007BB8, D_02007CD8, D_02007DF8 }; /* const */
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Gfx *D_800E84CC[8] = {
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D_02007838,
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D_02007858,
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D_02007878,
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D_02007898,
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D_020078B8,
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D_020078D8,
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D_020078F8,
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D_02007918,
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}; /* const */
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void func_80092290(s32 arg0, s32 *arg1, s32 *arg2, s32 arg3) {
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mk_Vtx_Flag **temp_s0;
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mk_Vtx_Flag *temp_v0;
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Vtx **temp_s0;
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s32 temp_a0;
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s32 temp_a1;
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s32 temp_s4;
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@@ -557,9 +565,10 @@ void func_80092290(s32 arg0, s32 *arg1, s32 *arg2, s32 arg3) {
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s32 temp_t8_2;
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s32 temp_t9;
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void *temp_a2;
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void *temp_v0;
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void *temp_v1;
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void *temp_v1_2;
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mk_Vtx_Flag **phi_s0;
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Vtx **phi_s0;
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if ((arg0 >= 4) && (arg0 < 6)) {
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temp_t8 = *arg2 + 0x10;
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@@ -592,7 +601,7 @@ void func_80092290(s32 arg0, s32 *arg1, s32 *arg2, s32 arg3) {
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temp_a2->unk1E = (s8) temp_t7;
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temp_a2->unk1F = (s8) temp_t8_2;
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phi_s0 = temp_s0;
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} while (temp_s0 != &D_800E84CC);
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} while (temp_s0 != D_800E84CC);
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}
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}
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#else
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@@ -1940,71 +1949,23 @@ void func_800959CC(s32 arg4) {
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GLOBAL_ASM("asm/non_matchings/code_80091750/func_800959CC.s")
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#endif
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#ifdef MIPS_TO_C
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//generated by mips_to_c commit 06ada559d7a32fdab49fa2d619cdfa027615bcda
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Gfx *D_800E84CC[8] = {
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D_02007838,
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D_02007858,
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D_02007878,
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D_02007898,
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D_020078B8,
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D_020078D8,
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D_020078F8,
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D_02007918,
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}; /* const */
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Gfx *D_800E84EC[8] = {
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D_02007938,
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D_02007958,
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D_02007978,
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D_02007998,
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D_020079B8,
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D_020079D8,
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D_020079F8,
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D_02007A18,
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}; /* const */
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Gfx *D_800E850C[8] = {
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D_02007A38,
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D_02007A58,
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D_02007A78,
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D_02007A98,
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D_02007AB8,
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D_02007AD8,
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D_02007AF8,
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D_02007B18,
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}; /* const */
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Gfx *func_800959F8(Gfx *displayListHead, Vtx *arg1) {
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s32 index;
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Gfx *func_800959F8(Gfx *arg0, mk_Vtx_Flag *arg1) {
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s8 temp_v0;
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s8 phi_v1;
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Gfx *phi_a0;
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temp_v0 = gTextColor;
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phi_a0 = arg0;
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if ((s32) temp_v0 < 4) {
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phi_v1 = temp_v0;
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if ((s32) gTextColor < TEXT_BLUE_GREEN_RED_CYCLE_1) {
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index = gTextColor;
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} else {
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phi_v1 = ((temp_v0 * 2) + ((s32) gGlobalTimer % 2)) - 4;
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index = ((gTextColor * 2) + ((s32) gGlobalTimer % 2)) - 4;
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}
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if (arg1 == D_02007BB8) {
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arg0->words.w0 = 0x06000000;
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arg0->words.w1 = (u32) D_800E84CC[phi_v1];
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return arg0 + 8;
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gSPDisplayList(displayListHead++, D_800E84CC[index]);
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} else if (arg1 == D_02007CD8) {
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gSPDisplayList(displayListHead++, D_800E84EC[index]);
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} else if (arg1 == D_02007DF8) {
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gSPDisplayList(displayListHead++, D_800E850C[index]);
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}
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if (arg1 == 0x02007CD8) {
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arg0->words.w0 = 0x06000000;
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arg0->words.w1 = (u32) D_800E84EC[phi_v1];
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return arg0 + 8;
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}
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if (arg1 == 0x02007DF8) {
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arg0->words.w0 = 0x06000000;
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arg0->words.w1 = (u32) D_800E850C[phi_v1];
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phi_a0 = arg0 + 8;
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}
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return phi_a0;
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return displayListHead;
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}
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#else
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GLOBAL_ASM("asm/non_matchings/code_80091750/func_800959F8.s")
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#endif
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#ifdef MIPS_TO_C
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//generated by mips_to_c commit 06ada559d7a32fdab49fa2d619cdfa027615bcda
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@@ -2072,7 +2033,7 @@ Gfx *func_80095BD0(Gfx *arg0, s32 arg1, s32 arg2, s32 arg3, u32 arg4, s32 arg5,
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s16 temp_v0;
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s32 temp_a3;
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s32 temp_v0_2;
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mk_Vtx_Flag *phi_a1;
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Vtx *phi_a1;
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temp_v0 = D_80164AF0;
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if ((s32) temp_v0 < 0x2F7) {
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@@ -91,6 +91,7 @@ void func_80094A64(Mtx*);
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void func_80094C60();
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void func_80095574();
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Gfx *func_800959A0(Gfx*, s32, s32, s32, s32);
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Gfx *func_800959F8(Gfx*, Vtx*);
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Gfx *func_80098C18(Gfx*, s32, s32, s32, s32, s32, s32, s32, s32);
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Gfx *draw_box(Gfx*, s32, s32, s32, s32, s32, s32, s32, s32);
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Gfx *func_80098FC8(Gfx*, s32, s32, s32, s32);
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@@ -182,6 +183,10 @@ void func_80057CE4();
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extern Gfx D_06009410[];
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extern Gfx *D_800E84CC[];
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extern Gfx *D_800E84EC[];
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extern Gfx *D_800E850C[];
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extern s16 gGlyphDisplayWidth[]; // D_800EF690
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extern RGBA16 D_800E74A8[5];
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extern RGBA16 D_800E74D0[3];
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+29
-27
@@ -1,6 +1,8 @@
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#ifndef DATA_SEGMENT2_H
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#define DATA_SEGMENT2_H
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#include <PR/gbi.h>
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extern s32 D_02007B38[];
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extern Gfx D_02007650[];
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@@ -49,32 +51,32 @@ extern Gfx D_02008058[];
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extern Gfx D_060093F8[];
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extern Gfx D_0D006940[];
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extern mk_Vtx_Flag D_02007BB8[];
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extern mk_Vtx_Flag D_02007BD8[];
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extern mk_Vtx_Flag D_02007BF8[];
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extern mk_Vtx_Flag D_02007C18[];
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extern mk_Vtx_Flag D_02007C38[];
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extern mk_Vtx_Flag D_02007C58[];
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extern mk_Vtx_Flag D_02007C78[];
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extern mk_Vtx_Flag D_02007C98[];
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extern mk_Vtx_Flag D_02007CB8[];
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extern mk_Vtx_Flag D_02007CD8[];
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extern mk_Vtx_Flag D_02007CF8[];
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extern mk_Vtx_Flag D_02007D18[];
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extern mk_Vtx_Flag D_02007D38[];
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extern mk_Vtx_Flag D_02007D58[];
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extern mk_Vtx_Flag D_02007D78[];
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extern mk_Vtx_Flag D_02007D98[];
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extern mk_Vtx_Flag D_02007DB8[];
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extern mk_Vtx_Flag D_02007DD8[];
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extern mk_Vtx_Flag D_02007DF8[];
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extern mk_Vtx_Flag D_02007E18[];
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extern mk_Vtx_Flag D_02007E38[];
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extern mk_Vtx_Flag D_02007E58[];
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extern mk_Vtx_Flag D_02007E78[];
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extern mk_Vtx_Flag D_02007E98[];
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extern mk_Vtx_Flag D_02007EB8[];
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extern mk_Vtx_Flag D_02007ED8[];
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extern mk_Vtx_Flag D_02007EF8[];
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extern Vtx D_02007BB8[];
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extern Vtx D_02007BD8[];
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extern Vtx D_02007BF8[];
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extern Vtx D_02007C18[];
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extern Vtx D_02007C38[];
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extern Vtx D_02007C58[];
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extern Vtx D_02007C78[];
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extern Vtx D_02007C98[];
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extern Vtx D_02007CB8[];
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extern Vtx D_02007CD8[];
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extern Vtx D_02007CF8[];
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extern Vtx D_02007D18[];
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extern Vtx D_02007D38[];
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extern Vtx D_02007D58[];
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extern Vtx D_02007D78[];
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extern Vtx D_02007D98[];
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extern Vtx D_02007DB8[];
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extern Vtx D_02007DD8[];
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extern Vtx D_02007DF8[];
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extern Vtx D_02007E18[];
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extern Vtx D_02007E38[];
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extern Vtx D_02007E58[];
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extern Vtx D_02007E78[];
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extern Vtx D_02007E98[];
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extern Vtx D_02007EB8[];
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extern Vtx D_02007ED8[];
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extern Vtx D_02007EF8[];
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#endif
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+81
-81
@@ -292,139 +292,139 @@ UNUSED s32 D_02007B38[] = {
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// Todo: Place all theces vertices in a single array
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// Access the correct vertex using sym[value]
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mk_Vtx_Flag D_02007BB8[] = {
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{{0, 65520, 0}, {0, 0}, {0, 0}, {0xff, 0xff, 0xff, 0xff}},
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{{26, 65520, 0}, {0, 1600}, {0, 0}, {0xff, 0xff, 0xff, 0xff}},
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Vtx D_02007BB8[] = {
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{{{ 0, 65520, 0}, 0, { 0, 0}, {0xff, 0xff, 0xff, 0xff}}},
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{{{26, 65520, 0}, 0, {1600, 0}, {0xff, 0xff, 0xff, 0xff}}},
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};
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mk_Vtx_Flag D_02007BD8[] = {
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{{26, 0, 0}, {0, 1600}, {3, 192}, {0x00, 0x00, 0xff, 0xff}},
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{{0, 0, 0}, {0, 0}, {3, 192}, {0x00, 0x00, 0xff, 0xff}},
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Vtx D_02007BD8[] = {
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{{{26, 0, 0}, 0, {1600, 960}, {0x00, 0x00, 0xff, 0xff}}},
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{{{ 0, 0, 0}, 0, { 0, 960}, {0x00, 0x00, 0xff, 0xff}}},
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};
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mk_Vtx_Flag D_02007BF8[] = {
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{{26, 0, 0}, {0, 1600}, {3, 192}, {0x00, 0xff, 0x00, 0xff}},
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{{0, 0, 0}, {0, 0}, {3, 192}, {0x00, 0xff, 0x00, 0xff}},
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Vtx D_02007BF8[] = {
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{{{26, 0, 0}, 0, {1600, 960}, {0x00, 0xff, 0x00, 0xff}}},
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{{{ 0, 0, 0}, 0, { 0, 960}, {0x00, 0xff, 0x00, 0xff}}},
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};
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mk_Vtx_Flag D_02007C18[] = {
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{{26, 0, 0}, {0, 1600}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
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{{0, 0, 0}, {0, 0}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
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Vtx D_02007C18[] = {
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{{{26, 0, 0}, 0, {1600, 960}, {0xff, 0x00, 0x00, 0xff}}},
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{{{ 0, 0, 0}, 0, { 0, 960}, {0xff, 0x00, 0x00, 0xff}}},
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};
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mk_Vtx_Flag D_02007C38[] = {
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{{26, 0, 0}, {0, 1600}, {3, 192}, {0xff, 0xff, 0x00, 0xff}},
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{{0, 0, 0}, {0, 0}, {3, 192}, {0xff, 0xff, 0x00, 0xff}},
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Vtx D_02007C38[] = {
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{{{26, 0, 0}, 0, {1600, 960}, {0xff, 0xff, 0x00, 0xff}}},
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{{{ 0, 0, 0}, 0, { 0, 960}, {0xff, 0xff, 0x00, 0xff}}},
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};
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mk_Vtx_Flag D_02007C58[] = {
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{{26, 0, 0}, {0, 1600}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
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{{0, 0, 0}, {0, 0}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
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Vtx D_02007C58[] = {
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{{{26, 0, 0}, 0, {1600, 960}, {0xff, 0x00, 0x00, 0xff}}},
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{{{ 0, 0, 0}, 0, { 0, 960}, {0xff, 0x00, 0x00, 0xff}}},
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};
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mk_Vtx_Flag D_02007C78[] = {
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{{26, 0, 0}, {0, 1600}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
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{{0, 0, 0}, {0, 0}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
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Vtx D_02007C78[] = {
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{{{26, 0, 0}, 0, {1600, 960}, {0xff, 0x00, 0x00, 0xff}}},
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{{{ 0, 0, 0}, 0, { 0, 960}, {0xff, 0x00, 0x00, 0xff}}},
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};
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mk_Vtx_Flag D_02007C98[] = {
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{{26, 0, 0}, {0, 1600}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
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{{0, 0, 0}, {0, 0}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
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Vtx D_02007C98[] = {
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{{{26, 0, 0}, 0, {1600, 960}, {0xff, 0x00, 0x00, 0xff}}},
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{{{ 0, 0, 0}, 0, { 0, 960}, {0xff, 0x00, 0x00, 0xff}}},
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};
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mk_Vtx_Flag D_02007CB8[] = {
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{{26, 0, 0}, {0, 1600}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
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{{0, 0, 0}, {0, 0}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
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Vtx D_02007CB8[] = {
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{{{26, 0, 0}, 0, {1600, 960}, {0xff, 0x00, 0x00, 0xff}}},
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{{{ 0, 0, 0}, 0, { 0, 960}, {0xff, 0x00, 0x00, 0xff}}},
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};
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mk_Vtx_Flag D_02007CD8[] = {
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{{0, 65520, 0}, {0, 0}, {0, 0}, {0xff, 0xff, 0xff, 0xff}},
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{{16, 65520, 0}, {0, 960}, {0, 0}, {0xff, 0xff, 0xff, 0xff}},
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Vtx D_02007CD8[] = {
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{{{ 0, 65520, 0}, 0, { 0, 0}, {0xff, 0xff, 0xff, 0xff}}},
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{{{16, 65520, 0}, 0, {960, 0}, {0xff, 0xff, 0xff, 0xff}}},
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};
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mk_Vtx_Flag D_02007CF8[] = {
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{{16, 0, 0}, {0, 960}, {3, 192}, {0x00, 0x00, 0xff, 0xff}},
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{{0, 0, 0}, {0, 0}, {3, 192}, {0x00, 0x00, 0xff, 0xff}},
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Vtx D_02007CF8[] = {
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{{{16, 0, 0}, 0, {960, 960}, {0x00, 0x00, 0xff, 0xff}}},
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{{{ 0, 0, 0}, 0, { 0, 960}, {0x00, 0x00, 0xff, 0xff}}},
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};
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mk_Vtx_Flag D_02007D18[] = {
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{{16, 0, 0}, {0, 960}, {3, 192}, {0x00, 0xff, 0x00, 0xff}},
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{{0, 0, 0}, {0, 0}, {3, 192}, {0x00, 0xff, 0x00, 0xff}},
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Vtx D_02007D18[] = {
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{{{16, 0, 0}, 0, {960, 960}, {0x00, 0xff, 0x00, 0xff}}},
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{{{ 0, 0, 0}, 0, { 0, 960}, {0x00, 0xff, 0x00, 0xff}}},
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};
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mk_Vtx_Flag D_02007D38[] = {
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{{16, 0, 0}, {0, 960}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
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{{0, 0, 0}, {0, 0}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
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Vtx D_02007D38[] = {
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{{{16, 0, 0}, 0, {960, 960}, {0xff, 0x00, 0x00, 0xff}}},
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{{{ 0, 0, 0}, 0, { 0, 960}, {0xff, 0x00, 0x00, 0xff}}},
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};
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mk_Vtx_Flag D_02007D58[] = {
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{{16, 0, 0}, {0, 960}, {3, 192}, {0xff, 0xff, 0x00, 0xff}},
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{{0, 0, 0}, {0, 0}, {3, 192}, {0xff, 0xff, 0x00, 0xff}},
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Vtx D_02007D58[] = {
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{{{16, 0, 0}, 0, {960, 960}, {0xff, 0xff, 0x00, 0xff}}},
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{{{ 0, 0, 0}, 0, { 0, 960}, {0xff, 0xff, 0x00, 0xff}}},
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};
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mk_Vtx_Flag D_02007D78[] = {
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{{16, 0, 0}, {0, 960}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
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{{0, 0, 0}, {0, 0}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
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Vtx D_02007D78[] = {
|
||||
{{{16, 0, 0}, 0, {960, 960}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
{{{ 0, 0, 0}, 0, { 0, 960}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
};
|
||||
|
||||
mk_Vtx_Flag D_02007D98[] = {
|
||||
{{16, 0, 0}, {0, 960}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
|
||||
{{0, 0, 0}, {0, 0}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
|
||||
Vtx D_02007D98[] = {
|
||||
{{{16, 0, 0}, 0, {960, 960}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
{{{ 0, 0, 0}, 0, { 0, 960}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
};
|
||||
|
||||
mk_Vtx_Flag D_02007DB8[] = {
|
||||
{{16, 0, 0}, {0, 960}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
|
||||
{{0, 0, 0}, {0, 0}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
|
||||
Vtx D_02007DB8[] = {
|
||||
{{{16, 0, 0}, 0, {960, 960}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
{{{ 0, 0, 0}, 0, { 0, 960}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
};
|
||||
|
||||
mk_Vtx_Flag D_02007DD8[] = {
|
||||
{{16, 0, 0}, {0, 960}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
|
||||
{{0, 0, 0}, {0, 0}, {3, 192}, {0xff, 0x00, 0x00, 0xff}},
|
||||
Vtx D_02007DD8[] = {
|
||||
{{{16, 0, 0}, 0, {960, 960}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
{{{ 0, 0, 0}, 0, { 0, 960}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
};
|
||||
|
||||
mk_Vtx_Flag D_02007DF8[] = {
|
||||
{{0, 65504, 0}, {0, 0}, {0, 0}, {0xff, 0xff, 0xff, 0xff}},
|
||||
{{30, 65504, 0}, {0, 1856}, {0, 0}, {0xff, 0xff, 0xff, 0xff}},
|
||||
Vtx D_02007DF8[] = {
|
||||
{{{ 0, 65504, 0}, 0, { 0, 0}, {0xff, 0xff, 0xff, 0xff}}},
|
||||
{{{30, 65504, 0}, 0, {1856, 0}, {0xff, 0xff, 0xff, 0xff}}},
|
||||
};
|
||||
|
||||
mk_Vtx_Flag D_02007E18[] = {
|
||||
{{30, 0, 0}, {0, 1856}, {7, 192}, {0x00, 0x00, 0xff, 0xff}},
|
||||
{{0, 0, 0}, {0, 0}, {7, 192}, {0x00, 0x00, 0xff, 0xff}},
|
||||
Vtx D_02007E18[] = {
|
||||
{{{30, 0, 0}, 0, {1856, 1984}, {0x00, 0x00, 0xff, 0xff}}},
|
||||
{{{ 0, 0, 0}, 0, { 0, 1984}, {0x00, 0x00, 0xff, 0xff}}},
|
||||
};
|
||||
|
||||
mk_Vtx_Flag D_02007E38[] = {
|
||||
{{30, 0, 0}, {0, 1856}, {7, 192}, {0x00, 0xff, 0x00, 0xff}},
|
||||
{{0, 0, 0}, {0, 0}, {7, 192}, {0x00, 0xff, 0x00, 0xff}},
|
||||
Vtx D_02007E38[] = {
|
||||
{{{30, 0, 0}, 0, {1856, 1984}, {0x00, 0xff, 0x00, 0xff}}},
|
||||
{{{ 0, 0, 0}, 0, { 0, 1984}, {0x00, 0xff, 0x00, 0xff}}},
|
||||
};
|
||||
|
||||
mk_Vtx_Flag D_02007E58[] = {
|
||||
{{30, 0, 0}, {0, 1856}, {7, 192}, {0xff, 0x00, 0x00, 0xff}},
|
||||
{{0, 0, 0}, {0, 0}, {7, 192}, {0xff, 0x00, 0x00, 0xff}},
|
||||
Vtx D_02007E58[] = {
|
||||
{{{30, 0, 0}, 0, {1856, 1984}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
{{{ 0, 0, 0}, 0, { 0, 1984}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
};
|
||||
|
||||
mk_Vtx_Flag D_02007E78[] = {
|
||||
{{30, 0, 0}, {0, 1856}, {7, 192}, {0xff, 0xff, 0x00, 0xff}},
|
||||
{{0, 0, 0}, {0, 0}, {7, 192}, {0xff, 0xff, 0x00, 0xff}},
|
||||
Vtx D_02007E78[] = {
|
||||
{{{30, 0, 0}, 0, {1856, 1984}, {0xff, 0xff, 0x00, 0xff}}},
|
||||
{{{ 0, 0, 0}, 0, { 0, 1984}, {0xff, 0xff, 0x00, 0xff}}},
|
||||
};
|
||||
|
||||
mk_Vtx_Flag D_02007E98[] = {
|
||||
{{30, 0, 0}, {0, 1856}, {7, 192}, {0xff, 0x00, 0x00, 0xff}},
|
||||
{{0, 0, 0}, {0, 0}, {7, 192}, {0xff, 0x00, 0x00, 0xff}},
|
||||
Vtx D_02007E98[] = {
|
||||
{{{30, 0, 0}, 0, {1856, 1984}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
{{{ 0, 0, 0}, 0, { 0, 1984}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
};
|
||||
|
||||
mk_Vtx_Flag D_02007EB8[] = {
|
||||
{{30, 0, 0}, {0, 1856}, {7, 192}, {0xff, 0x00, 0x00, 0xff}},
|
||||
{{0, 0, 0}, {0, 0}, {7, 192}, {0xff, 0x00, 0x00, 0xff}},
|
||||
Vtx D_02007EB8[] = {
|
||||
{{{30, 0, 0}, 0, {1856, 1984}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
{{{ 0, 0, 0}, 0, { 0, 1984}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
};
|
||||
|
||||
mk_Vtx_Flag D_02007ED8[] = {
|
||||
{{30, 0, 0}, {0, 1856}, {7, 192}, {0xff, 0x00, 0x00, 0xff}},
|
||||
{{0, 0, 0}, {0, 0}, {7, 192}, {0xff, 0x00, 0x00, 0xff}},
|
||||
Vtx D_02007ED8[] = {
|
||||
{{{30, 0, 0}, 0, {1856, 1984}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
{{{ 0, 0, 0}, 0, { 0, 1984}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
};
|
||||
|
||||
mk_Vtx_Flag D_02007EF8[] = {
|
||||
{{30, 0, 0}, {0, 1856}, {7, 192}, {0xff, 0x00, 0x00, 0xff}},
|
||||
{{0, 0, 0}, {0, 0}, {7, 192}, {0xff, 0x00, 0x00, 0xff}},
|
||||
Vtx D_02007EF8[] = {
|
||||
{{{30, 0, 0}, 0, {1856, 1984}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
{{{ 0, 0, 0}, 0, { 0, 1984}, {0xff, 0x00, 0x00, 0xff}}},
|
||||
};
|
||||
|
||||
Gfx D_02007F18[] = {
|
||||
|
||||
+62
-78
@@ -418,64 +418,48 @@ u32 MIO0_0F(s32 arg0, u32 arg1, u32 arg2) {
|
||||
}
|
||||
|
||||
#ifdef MIPS_TO_C
|
||||
//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
|
||||
//generated by mips_to_c commit 06ada559d7a32fdab49fa2d619cdfa027615bcda
|
||||
extern f32 D_800DC608;
|
||||
// 802A86C0, 00000010
|
||||
struct UnkStruct_802A86A8 {
|
||||
s8 unk0;
|
||||
s8 unk1;
|
||||
s8 unk2;
|
||||
s8 unk3;
|
||||
s16 unk4;
|
||||
s16 unk6;
|
||||
s16 unk8;
|
||||
s16 unkA;
|
||||
s16 unkC;
|
||||
s16 unkE;
|
||||
|
||||
};
|
||||
|
||||
void func_802A86A8(struct UnkStruct_802A86A8 *arg0, u32 arg1) {
|
||||
void func_802A86A8(mk64_Vtx *arg0, u32 arg1) {
|
||||
Vtx *temp_v1;
|
||||
Vtx *temp_v1_2;
|
||||
mk64_Vtx *temp_v0;
|
||||
s8 temp_a0;
|
||||
s8 temp_a3;
|
||||
u32 temp_a2;
|
||||
struct UnkStruct_802A86A8 *temp_v0;
|
||||
u32 temp_v1;
|
||||
struct UnkStruct_802A86A8 *temp_v1_2;
|
||||
struct UnkStruct_802A86A8 *phi_v0;
|
||||
s8 phi_v1;
|
||||
mk64_Vtx *phi_v0;
|
||||
Vtx *phi_v1;
|
||||
u32 phi_a2;
|
||||
|
||||
temp_v1 = gHeapEndPtr - (((arg1 * 0x10) + 0xF) & ~0xF);
|
||||
gHeapEndPtr = temp_v1;
|
||||
phi_v0 = arg0;
|
||||
phi_a2 = 0;
|
||||
// phi_v1 = temp_v1;
|
||||
|
||||
|
||||
phi_a2 = 0U;
|
||||
if (arg1 != 0) {
|
||||
phi_v1 = temp_v1;
|
||||
do {
|
||||
if (gIsMirrorMode != 0) {
|
||||
phi_v1 = -phi_v0->unk0;
|
||||
phi_v1->v.ob[0] = (s16) -(s32) phi_v0->ob[0];
|
||||
} else {
|
||||
phi_v1 = phi_v0->unk0;
|
||||
phi_v1->v.ob[0] = phi_v0->ob[0];
|
||||
}
|
||||
temp_a2 = phi_a2 + 1;
|
||||
temp_v1_2 = phi_v1 + 0x10;
|
||||
temp_v0 = phi_v0 + 0xE;
|
||||
temp_v1_2->unkE = phi_v0->unk2 * D_800DC608;
|
||||
temp_a0 = temp_v0->unk4;
|
||||
temp_a3 = temp_v0->unk3;
|
||||
temp_v1_2->unkC = temp_v0->unkA;
|
||||
temp_v1_2->unk8 = temp_v0->unk8;
|
||||
temp_v1_2->unk4 = temp_a0 & 0xFC;
|
||||
temp_v1_2->unk3 = temp_a3 & 0xFC;
|
||||
temp_v1_2->unk6 = temp_v0->unk6;
|
||||
temp_v1_2->unk2 = temp_v0->unk2;
|
||||
temp_v1_2->unkA = (temp_a0 & 3) | ((temp_a3 * 4) & 0xC);
|
||||
temp_v1_2->unk1 = 0xFF;
|
||||
temp_v1_2->unk-E = (s16) (s32) ((f32) phi_v0->ob[1] * D_800DC608);
|
||||
temp_a0 = temp_v0->unk-4;
|
||||
temp_a3 = temp_v0->unk-3;
|
||||
temp_v1_2->unk-C = (s16) temp_v0->unk-A;
|
||||
temp_v1_2->unk-8 = (s16) temp_v0->unk-8;
|
||||
temp_v1_2->unk-4 = (s8) (temp_a0 & 0xFC);
|
||||
temp_v1_2->unk-3 = (s8) (temp_a3 & 0xFC);
|
||||
temp_v1_2->unk-6 = (s16) temp_v0->unk-6;
|
||||
temp_v1_2->unk-2 = (s8) temp_v0->unk-2;
|
||||
temp_v1_2->unk-A = (s16) (s8) ((temp_a0 & 3) | ((temp_a3 * 4) & 0xC));
|
||||
temp_v1_2->unk-1 = 0xFF;
|
||||
phi_v0 = temp_v0;
|
||||
// phi_v1 = temp_v1_2;
|
||||
phi_v1 = temp_v1_2;
|
||||
phi_a2 = temp_a2;
|
||||
} while (temp_a2 < arg1);
|
||||
}
|
||||
@@ -3587,7 +3571,7 @@ GLOBAL_ASM("asm/non_matchings/memory/func_802AE1C0.s")
|
||||
#endif
|
||||
|
||||
#ifdef MIPS_TO_C
|
||||
//generated by mips_to_c commit 792017ad9d422c2467bd42686f383a5c41f41c75
|
||||
//generated by mips_to_c commit 06ada559d7a32fdab49fa2d619cdfa027615bcda
|
||||
extern s32 D_8015F59C;
|
||||
extern s32 D_8015F5A0;
|
||||
extern s32 D_8015F5A4;
|
||||
@@ -3604,7 +3588,7 @@ static f32 D_802B9E68 = 0.9f;
|
||||
static f32 D_802B9E6C = 0.1f;
|
||||
static f32 D_802B9E70 = -0.1f;
|
||||
|
||||
void func_802AE434(mk_Vtx_Flag *arg0, mk_Vtx_Flag *arg1, mk_Vtx_Flag *arg2, s8 arg3, u16 arg4) {
|
||||
void func_802AE434(Vtx *arg0, Vtx *arg1, Vtx *arg2, s8 arg3, u16 arg4) {
|
||||
s16 spBA;
|
||||
s16 spB8;
|
||||
s16 spB6;
|
||||
@@ -3619,10 +3603,13 @@ void func_802AE434(mk_Vtx_Flag *arg0, mk_Vtx_Flag *arg1, mk_Vtx_Flag *arg2, s8 a
|
||||
s16 sp48;
|
||||
s16 sp44;
|
||||
s16 sp42;
|
||||
mk_Vtx_Flag *sp1C; /* compiler-managed */
|
||||
Vtx *sp1C; /* compiler-managed */
|
||||
f64 sp10;
|
||||
f64 sp8;
|
||||
f64 sp0;
|
||||
Vtx *temp_t1;
|
||||
Vtx *temp_t2;
|
||||
Vtx *temp_t6;
|
||||
f32 temp_f0;
|
||||
f32 temp_f18_2;
|
||||
f32 temp_f4_2;
|
||||
@@ -3634,9 +3621,6 @@ void func_802AE434(mk_Vtx_Flag *arg0, mk_Vtx_Flag *arg1, mk_Vtx_Flag *arg2, s8 a
|
||||
f64 temp_f4;
|
||||
f64 temp_f8;
|
||||
mk64_surface_map_ram *temp_t0;
|
||||
mk_Vtx_Flag *temp_t1;
|
||||
mk_Vtx_Flag *temp_t2;
|
||||
mk_Vtx_Flag *temp_t6;
|
||||
s16 temp_a0;
|
||||
s16 temp_a1;
|
||||
s16 temp_t3;
|
||||
@@ -3669,36 +3653,36 @@ void func_802AE434(mk_Vtx_Flag *arg0, mk_Vtx_Flag *arg1, mk_Vtx_Flag *arg2, s8 a
|
||||
temp_t0->vtxs[0] = arg0;
|
||||
temp_t0->vtxs[1] = arg1;
|
||||
temp_t0->vtxs[2] = arg2;
|
||||
if (((u16) arg0->tc[0] != 4) || ((u16) arg1->tc[0] != 4) || ((u16) temp_t0->vtxs[2]->tc[0] != 4)) {
|
||||
if ((arg0->v.flag != 4) || (arg1->v.flag != 4) || (temp_t0->vtxs[2]->v.flag != 4)) {
|
||||
temp_t6 = temp_t0->vtxs[0];
|
||||
sp1C = temp_t6;
|
||||
temp_t1 = temp_t0->vtxs[1];
|
||||
temp_t2 = temp_t0->vtxs[2];
|
||||
temp_a0 = temp_t6->ob[0];
|
||||
temp_t3 = temp_t1->ob[0];
|
||||
temp_a1 = temp_t6->ob[2];
|
||||
temp_t4 = temp_t1->ob[2];
|
||||
temp_a0 = temp_t6->v.ob[0];
|
||||
temp_t3 = temp_t1->v.ob[0];
|
||||
temp_a1 = temp_t6->v.ob[2];
|
||||
temp_t4 = temp_t1->v.ob[2];
|
||||
phi_a0 = (s32) temp_a0;
|
||||
phi_t3 = (s32) temp_t3;
|
||||
phi_t5 = (s32) temp_t2->ob[0];
|
||||
phi_t5 = (s32) temp_t2->v.ob[0];
|
||||
phi_a1 = (s32) temp_a1;
|
||||
phi_t4 = (s32) temp_t4;
|
||||
phi_v1 = (s32) temp_t2->ob[2];
|
||||
phi_a2 = (s32) temp_t6->ob[1];
|
||||
phi_a3 = (s32) temp_t1->ob[1];
|
||||
phi_v0 = (s32) temp_t2->ob[1];
|
||||
phi_v1 = (s32) temp_t2->v.ob[2];
|
||||
phi_a2 = (s32) temp_t6->v.ob[1];
|
||||
phi_a3 = (s32) temp_t1->v.ob[1];
|
||||
phi_v0 = (s32) temp_t2->v.ob[1];
|
||||
if ((temp_a0 == temp_t3) && (temp_a1 == temp_t4)) {
|
||||
temp_t0->vtxs[2] = arg1;
|
||||
temp_t0->vtxs[1] = arg2;
|
||||
phi_a0 = (s32) arg0->ob[0];
|
||||
phi_t3 = (s32) arg1->ob[0];
|
||||
phi_t5 = (s32) arg2->ob[0];
|
||||
phi_a1 = (s32) arg0->ob[2];
|
||||
phi_t4 = (s32) arg1->ob[2];
|
||||
phi_v1 = (s32) arg2->ob[2];
|
||||
phi_a2 = (s32) arg0->ob[1];
|
||||
phi_a3 = (s32) arg1->ob[1];
|
||||
phi_v0 = (s32) arg2->ob[1];
|
||||
phi_a0 = (s32) arg0->v.ob[0];
|
||||
phi_t3 = (s32) arg1->v.ob[0];
|
||||
phi_t5 = (s32) arg2->v.ob[0];
|
||||
phi_a1 = (s32) arg0->v.ob[2];
|
||||
phi_t4 = (s32) arg1->v.ob[2];
|
||||
phi_v1 = (s32) arg2->v.ob[2];
|
||||
phi_a2 = (s32) arg0->v.ob[1];
|
||||
phi_a3 = (s32) arg1->v.ob[1];
|
||||
phi_v0 = (s32) arg2->v.ob[1];
|
||||
}
|
||||
if (phi_a0 >= phi_t3) {
|
||||
if (phi_a0 >= phi_t5) {
|
||||
@@ -3821,12 +3805,12 @@ block_33:
|
||||
temp_t0->gravity = sp54;
|
||||
temp_t0->rotation = sp50;
|
||||
temp_t0->height2 = sp4C;
|
||||
temp_t0->unk2 = (s16) arg3;
|
||||
temp_t0->surfaceType = (u16) arg3;
|
||||
D_8015F6FA = 0;
|
||||
D_8015F6FC = 0;
|
||||
temp_a3_2 = (u16) temp_t0->vtxs[0]->tc[0];
|
||||
temp_v1_2 = (u16) temp_t0->vtxs[1]->tc[0];
|
||||
temp_a0_3 = (u16) temp_t0->vtxs[2]->tc[0];
|
||||
temp_a3_2 = temp_t0->vtxs[0]->v.flag;
|
||||
temp_v1_2 = temp_t0->vtxs[1]->v.flag;
|
||||
temp_a0_3 = temp_t0->vtxs[2]->v.flag;
|
||||
phi_a1_2 = arg4;
|
||||
if ((temp_a3_2 == 1) && (temp_v1_2 == 1) && (temp_a0_3 == 1)) {
|
||||
phi_t8 = (arg4 | 0x400) & 0xFFFF;
|
||||
@@ -4080,7 +4064,7 @@ GLOBAL_ASM("asm/non_matchings/memory/func_802AEE1C.s")
|
||||
#endif
|
||||
|
||||
#ifdef MIPS_TO_C
|
||||
//generated by mips_to_c commit 792017ad9d422c2467bd42686f383a5c41f41c75
|
||||
//generated by mips_to_c commit 06ada559d7a32fdab49fa2d619cdfa027615bcda
|
||||
s32 func_802AEE1C(s16, s16, s16, s16, s32, s32, s32, s32); /* extern */
|
||||
|
||||
s32 func_802AF0FC(s16 arg0, s16 arg1, s16 arg2, s16 arg3, u16 arg4) {
|
||||
@@ -4090,10 +4074,10 @@ s32 func_802AF0FC(s16 arg0, s16 arg1, s16 arg2, s16 arg3, u16 arg4) {
|
||||
s16 sp2C;
|
||||
s16 sp2A;
|
||||
s16 sp28;
|
||||
Vtx *temp_t0;
|
||||
Vtx *temp_t1;
|
||||
Vtx *temp_v1;
|
||||
mk64_surface_map_ram *temp_v0;
|
||||
mk_Vtx_Flag *temp_t0;
|
||||
mk_Vtx_Flag *temp_t1;
|
||||
mk_Vtx_Flag *temp_v1;
|
||||
s16 temp_a0;
|
||||
s16 temp_a0_2;
|
||||
s16 temp_a1;
|
||||
@@ -4116,12 +4100,12 @@ s32 func_802AF0FC(s16 arg0, s16 arg1, s16 arg2, s16 arg3, u16 arg4) {
|
||||
temp_v1 = temp_v0->vtxs[0];
|
||||
temp_t0 = temp_v0->vtxs[1];
|
||||
temp_t1 = temp_v0->vtxs[2];
|
||||
temp_t2 = temp_v1->ob[0];
|
||||
temp_t3 = temp_v1->ob[2];
|
||||
temp_t4 = temp_t0->ob[0];
|
||||
temp_t5 = temp_t0->ob[2];
|
||||
temp_ra = temp_t1->ob[0];
|
||||
sp28 = temp_t1->ob[2];
|
||||
temp_t2 = temp_v1->v.ob[0];
|
||||
temp_t3 = temp_v1->v.ob[2];
|
||||
temp_t4 = temp_t0->v.ob[0];
|
||||
temp_t5 = temp_t0->v.ob[2];
|
||||
temp_ra = temp_t1->v.ob[0];
|
||||
sp28 = temp_t1->v.ob[2];
|
||||
if (((s32) temp_t2 >= (s32) temp_a0) && ((s32) temp_a1 >= (s32) temp_t2) && ((s32) temp_t3 >= (s32) temp_a2) && ((s32) temp_a3 >= (s32) temp_t3)) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
+1783
-1783
File diff suppressed because it is too large
Load Diff
+1102
-1102
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user