Match/split all of libultra (#23)
* libultra from sm64 integrated; 3 libultra functions matched * All of libultra done! authored-by: farisawan-2000 <farisawan.2000@gmail.com>
This commit is contained in:
Faris Awan
GitHub
parent
f4532f26bb
commit
5c23113592
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@ -54,6 +54,8 @@ context_gen_header.h
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tools/m2ctx.py
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# regardless of the above, the context file itself shouldnt be there
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ctx.c
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# diff.py -o requires a copy of the build folder
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expected/*
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# Assets. Generally ignored, but ones with "custom" in the name are fine.
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/bin/*
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23
Makefile
23
Makefile
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@ -28,8 +28,8 @@ BUILD_DIR := $(BUILD_DIR_BASE)/$(VERSION)
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# Directories containing source files
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INCLUDE_DIRS := include
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SRC_DIRS := src src/audio courses
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ASM_DIRS := asm asm/audio data data/sound_data
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SRC_DIRS := src src/audio src/os src/os/math courses
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ASM_DIRS := asm asm/audio asm/os data data/sound_data
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COURSE_DIRS := \
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courses/mushroom_cup/luigi_raceway courses/mushroom_cup/koopa_beach \
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courses/mushroom_cup/moo_moo_farm courses/mushroom_cup/kalimari_desert courses/flower_cup/toads_turnpike courses/flower_cup/frappe_snowland \
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@ -220,6 +220,7 @@ $(BUILD_DIR)/%.mio0.s: $(BUILD_DIR)/%.mio0
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$(BUILD_DIR)/%.o: %.c
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@$(CC_CHECK) -MMD -MP -MT $@ -MF $(BUILD_DIR)/$*.d $<
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$(CC) -c $(CFLAGS) -o $@ $<
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$(PYTHON) tools/set_o32abi_bit.py $@
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$(BUILD_DIR)/%.o: $(BUILD_DIR)/%.c
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@$(CC_CHECK) -MMD -MP -MT $@ -MF $(BUILD_DIR)/$*.d $<
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@ -233,6 +234,22 @@ $(GLOBAL_ASM_O_FILES): CC := $(PYTHON) tools/asm_processor/build.py $(CC) -- $(A
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$(BUILD_DIR)/$(LD_SCRIPT): $(LD_SCRIPT) #repeat for other files
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$(CPP) $(VERSION_CFLAGS) -DBUILD_DIR=$(BUILD_DIR) -MMD -MP -MT $@ -MF $@.d -o $@ $<
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#################### Libultra #####################
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$(BUILD_DIR)/src/os/%.o: OPT_FLAGS :=
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$(BUILD_DIR)/src/os/math/%.o: OPT_FLAGS := -O2
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$(BUILD_DIR)/src/os/math/ll%.o: OPT_FLAGS :=
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$(BUILD_DIR)/src/os/math/ll%.o: MIPSISET := -mips3 -32
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$(BUILD_DIR)/src/os/ldiv.o: OPT_FLAGS := -O2
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$(BUILD_DIR)/src/os/string.o: OPT_FLAGS := -O2
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$(BUILD_DIR)/src/os/gu%.o: OPT_FLAGS := -O3
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$(BUILD_DIR)/src/os/al%.o: OPT_FLAGS := -O3
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$(BUILD_DIR)/src/os/__osLeoInterrupt.o: OPT_FLAGS := -O1
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$(BUILD_DIR)/src/os/_Printf.o: OPT_FLAGS := -O3
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$(BUILD_DIR)/src/os/_Litob.o: OPT_FLAGS := -O3
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$(BUILD_DIR)/src/os/_Ldtob.o: OPT_FLAGS := -O3
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#################### Compile course vertex to mio0 #####################
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mushroom_cup := $(BUILD_DIR)/courses/mushroom_cup
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@ -396,7 +413,7 @@ $(battle)/skyscraper/%.inc.mio0.o: courses/battle/skyscraper/%.inc.c
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$(BUILD_DIR)/$(TARGET).elf: $(O_FILES) $(COURSE_MIO0_OBJ_FILES) $(BUILD_DIR)/$(LD_SCRIPT) $(LD_COURSE_VERTEX_DEPENDENCIES) undefined_syms.txt
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$(LD) $(LDFLAGS) -o $@ $(O_FILES)
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$(LD) $(LDFLAGS) -o $@
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# -R $(mushroom_cup)/luigi_raceway/model.inc.elf -R $(mushroom_cup)/moo_moo_farm/model.inc.elf -R $(mushroom_cup)/koopa_beach/model.inc.elf -R $(mushroom_cup)/kalimari_desert/model.inc.elf \
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-R $(flower_cup)/toads_turnpike/model.inc.elf -R $(flower_cup)/frappe_snowland/model.inc.elf -R $(flower_cup)/choco_mountain/model.inc.elf -R $(flower_cup)/mario_raceway/model.inc.elf \
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@ -1631,8 +1631,8 @@ glabel audio_init
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/* 0BCD84 800BC184 0601FFFA */ bgez $s0, .L800BC170
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/* 0BCD88 800BC188 24420008 */ addiu $v0, $v0, 8
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.L800BC18C:
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/* 0BCD8C 800BC18C 3C028000 */ lui $v0, %hi(D_80000300) # $v0, 0x8000
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/* 0BCD90 800BC190 8C420300 */ lw $v0, %lo(D_80000300)($v0)
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/* 0BCD8C 800BC18C 3C028000 */ lui $v0, %hi(osTvType) # $v0, 0x8000
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/* 0BCD90 800BC190 8C420300 */ lw $v0, %lo(osTvType)($v0)
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/* 0BCD94 800BC194 10400007 */ beqz $v0, .L800BC1B4
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/* 0BCD98 800BC198 24010001 */ li $at, 1
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/* 0BCD9C 800BC19C 10410015 */ beq $v0, $at, .L800BC1F4
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@ -2738,12 +2738,14 @@ glabel D_80196420
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glabel D_80196438
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.skip 8
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glabel D_80196440
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# seteventmesg bss
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glabel __osEventStateTab
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.skip 128
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glabel D_801964C0
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.skip 64
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# osContStartReadData bss
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glabel _osContCmdBuf
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.skip 60
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@ -2765,77 +2767,16 @@ glabel D_80196568
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glabel D_80196580
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.skip 16
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glabel D_80196590
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# osPfsIsPlug bss
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glabel __osPfsPifRam
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.skip 60
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glabel D_801965CC
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.skip 4
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# guRotateF ?
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glabel D_801965D0
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.skip 16
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glabel D_801965E0
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.skip 4096
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glabel D_801975E0
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.skip 32
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glabel D_80197600
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.skip 4
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glabel D_80197604
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.skip 4
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glabel D_80197608
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.skip 4
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glabel D_8019760C
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.skip 4
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glabel D_80197610
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.skip 16
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glabel D_80197620
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.skip 8
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glabel D_80197628
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.skip 24
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glabel D_80197640
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.skip 8
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glabel D_80197648
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.skip 24
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glabel D_80197660
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.skip 60
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glabel D_8019769C
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.skip 4
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glabel D_801976A0
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.skip 432
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glabel D_80197850
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.skip 4
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glabel D_80197854
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.skip 1
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glabel D_80197855
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.skip 1
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glabel D_80197856
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.skip 2
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glabel D_80197858
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.skip 4
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glabel D_8019785C
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.skip 100
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glabel D_801978C0
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.skip 16
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glabel D_801978D0
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.skip 12
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@ -0,0 +1,6 @@
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.include "macros.inc"
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.section .bss
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glabel D_801978D0
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.skip 12
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@ -0,0 +1,6 @@
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.include "macros.inc"
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.section .bss
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glabel D_801976A0
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.skip 432
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@ -299,7 +299,7 @@ glabel crash_screen_draw_info
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glabel get_faulted_thread
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/* 0050C4 800044C4 27BDFFE8 */ addiu $sp, $sp, -0x18
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/* 0050C8 800044C8 AFBF0014 */ sw $ra, 0x14($sp)
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/* 0050CC 800044CC 0C03384C */ jal func_800CE130
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/* 0050CC 800044CC 0C03384C */ jal __osGetCurrFaultedThread
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/* 0050D0 800044D0 00000000 */ nop
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/* 0050D4 800044D4 8C4E0004 */ lw $t6, 4($v0)
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/* 0050D8 800044D8 2404FFFF */ li $a0, -1
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@ -1120,7 +1120,7 @@ glabel func_80041D34
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/* 042974 80041D74 E7A20018 */ swc1 $f2, 0x18($sp)
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/* 042978 80041D78 E7A2001C */ swc1 $f2, 0x1c($sp)
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/* 04297C 80041D7C E7AC0014 */ swc1 $f12, 0x14($sp)
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/* 042980 80041D80 0C0338A9 */ jal guFrustum
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/* 042980 80041D80 0C0338A9 */ jal guOrtho
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/* 042984 80041D84 E7A00010 */ swc1 $f0, 0x10($sp)
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/* 042988 80041D88 3C013F80 */ li $at, 0x3F800000 # 1.000000
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/* 04298C 80041D8C 44811000 */ mtc1 $at, $f2
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@ -1155,7 +1155,7 @@ glabel func_80041D34
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/* 0429FC 80041DFC E7AC0014 */ swc1 $f12, 0x14($sp)
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/* 042A00 80041E00 E7A20018 */ swc1 $f2, 0x18($sp)
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/* 042A04 80041E04 E7A2001C */ swc1 $f2, 0x1c($sp)
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/* 042A08 80041E08 0C0338A9 */ jal guFrustum
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/* 042A08 80041E08 0C0338A9 */ jal guOrtho
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/* 042A0C 80041E0C 24840140 */ addiu $a0, $a0, 0x140
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/* 042A10 80041E10 10000035 */ b .L80041EE8
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/* 042A14 80041E14 8FBF0024 */ lw $ra, 0x24($sp)
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@ -1168,7 +1168,7 @@ glabel func_80041D34
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/* 042A2C 80041E2C E7AC0014 */ swc1 $f12, 0x14($sp)
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/* 042A30 80041E30 E7A20018 */ swc1 $f2, 0x18($sp)
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/* 042A34 80041E34 E7A2001C */ swc1 $f2, 0x1c($sp)
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/* 042A38 80041E38 0C0338A9 */ jal guFrustum
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/* 042A38 80041E38 0C0338A9 */ jal guOrtho
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/* 042A3C 80041E3C 24840140 */ addiu $a0, $a0, 0x140
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/* 042A40 80041E40 10000029 */ b .L80041EE8
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/* 042A44 80041E44 8FBF0024 */ lw $ra, 0x24($sp)
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@ -1186,7 +1186,7 @@ glabel func_80041D34
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/* 042A70 80041E70 E7AC0014 */ swc1 $f12, 0x14($sp)
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/* 042A74 80041E74 E7A20018 */ swc1 $f2, 0x18($sp)
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/* 042A78 80041E78 E7A2001C */ swc1 $f2, 0x1c($sp)
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/* 042A7C 80041E7C 0C0338A9 */ jal guFrustum
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/* 042A7C 80041E7C 0C0338A9 */ jal guOrtho
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/* 042A80 80041E80 24840140 */ addiu $a0, $a0, 0x140
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/* 042A84 80041E84 10000018 */ b .L80041EE8
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/* 042A88 80041E88 8FBF0024 */ lw $ra, 0x24($sp)
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@ -1199,7 +1199,7 @@ glabel func_80041D34
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/* 042AA0 80041EA0 E7AC0014 */ swc1 $f12, 0x14($sp)
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/* 042AA4 80041EA4 E7A20018 */ swc1 $f2, 0x18($sp)
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/* 042AA8 80041EA8 E7A2001C */ swc1 $f2, 0x1c($sp)
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/* 042AAC 80041EAC 0C0338A9 */ jal guFrustum
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/* 042AAC 80041EAC 0C0338A9 */ jal guOrtho
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/* 042AB0 80041EB0 24840140 */ addiu $a0, $a0, 0x140
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/* 042AB4 80041EB4 1000000C */ b .L80041EE8
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/* 042AB8 80041EB8 8FBF0024 */ lw $ra, 0x24($sp)
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@ -1212,7 +1212,7 @@ glabel func_80041D34
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/* 042AD0 80041ED0 E7AC0014 */ swc1 $f12, 0x14($sp)
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/* 042AD4 80041ED4 E7A20018 */ swc1 $f2, 0x18($sp)
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/* 042AD8 80041ED8 E7A2001C */ swc1 $f2, 0x1c($sp)
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/* 042ADC 80041EDC 0C0338A9 */ jal guFrustum
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/* 042ADC 80041EDC 0C0338A9 */ jal guOrtho
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/* 042AE0 80041EE0 24840140 */ addiu $a0, $a0, 0x140
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/* 042AE4 80041EE4 8FBF0024 */ lw $ra, 0x24($sp)
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.L80041EE8:
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@ -485,7 +485,7 @@ glabel func_80091D74
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/* 0929E8 80091DE8 10000036 */ b .L80091EC4
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/* 0929EC 80091DEC 00001025 */ move $v0, $zero
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.L80091DF0:
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/* 0929F0 80091DF0 0C0338EC */ jal func_800CE3B0
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/* 0929F0 80091DF0 0C0338EC */ jal osPfsIsPlug
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/* 0929F4 80091DF4 27A50067 */ addiu $a1, $sp, 0x67
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/* 0929F8 80091DF8 93AA0067 */ lbu $t2, 0x67($sp)
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/* 0929FC 80091DFC 3C148019 */ lui $s4, %hi(D_8018E868) # $s4, 0x8019
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@ -2774,7 +2774,7 @@ glabel func_80093C98
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/* 094930 80093D30 E7A40014 */ swc1 $f4, 0x14($sp)
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/* 094934 80093D34 E7A00010 */ swc1 $f0, 0x10($sp)
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/* 094938 80093D38 E7A60018 */ swc1 $f6, 0x18($sp)
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/* 09493C 80093D3C 0C0338A9 */ jal guFrustum
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/* 09493C 80093D3C 0C0338A9 */ jal guOrtho
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/* 094940 80093D40 E7A8001C */ swc1 $f8, 0x1c($sp)
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/* 094944 80093D44 3C038015 */ lui $v1, %hi(gDisplayListHead) # $v1, 0x8015
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/* 094948 80093D48 24630298 */ addiu $v1, %lo(gDisplayListHead) # addiu $v1, $v1, 0x298
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@ -2940,7 +2940,7 @@ glabel func_80093F10
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/* 094BA0 80093FA0 E7A40014 */ swc1 $f4, 0x14($sp)
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/* 094BA4 80093FA4 E7A00010 */ swc1 $f0, 0x10($sp)
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/* 094BA8 80093FA8 E7A60018 */ swc1 $f6, 0x18($sp)
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/* 094BAC 80093FAC 0C0338A9 */ jal guFrustum
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/* 094BAC 80093FAC 0C0338A9 */ jal guOrtho
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/* 094BB0 80093FB0 E7A8001C */ swc1 $f8, 0x1c($sp)
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/* 094BB4 80093FB4 8E020000 */ lw $v0, ($s0)
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/* 094BB8 80093FB8 3C0E0103 */ lui $t6, (0x01030040 >> 16) # lui $t6, 0x103
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@ -3071,7 +3071,7 @@ glabel func_800940EC
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/* 094DA4 800941A4 E7A40014 */ swc1 $f4, 0x14($sp)
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/* 094DA8 800941A8 E7A00010 */ swc1 $f0, 0x10($sp)
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/* 094DAC 800941AC E7A60018 */ swc1 $f6, 0x18($sp)
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/* 094DB0 800941B0 0C0338A9 */ jal guFrustum
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/* 094DB0 800941B0 0C0338A9 */ jal guOrtho
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/* 094DB4 800941B4 E7A8001C */ swc1 $f8, 0x1c($sp)
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/* 094DB8 800941B8 8E020000 */ lw $v0, ($s0)
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/* 094DBC 800941BC 3C190103 */ lui $t9, (0x01030040 >> 16) # lui $t9, 0x103
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@ -3683,7 +3683,7 @@ glabel func_80094A64
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/* 09570C 80094B0C E7A40014 */ swc1 $f4, 0x14($sp)
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/* 095710 80094B10 E7A00010 */ swc1 $f0, 0x10($sp)
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/* 095714 80094B14 E7A60018 */ swc1 $f6, 0x18($sp)
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/* 095718 80094B18 0C0338A9 */ jal guFrustum
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/* 095718 80094B18 0C0338A9 */ jal guOrtho
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/* 09571C 80094B1C E7A8001C */ swc1 $f8, 0x1c($sp)
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/* 095720 80094B20 8E020000 */ lw $v0, ($s0)
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/* 095724 80094B24 3C0D0103 */ lui $t5, (0x01030040 >> 16) # lui $t5, 0x103
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@ -22166,7 +22166,7 @@ glabel func_800A54EC
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/* 0A61AC 800A55AC E7A40014 */ swc1 $f4, 0x14($sp)
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/* 0A61B0 800A55B0 E7A00010 */ swc1 $f0, 0x10($sp)
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/* 0A61B4 800A55B4 E7A60018 */ swc1 $f6, 0x18($sp)
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/* 0A61B8 800A55B8 0C0338A9 */ jal guFrustum
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/* 0A61B8 800A55B8 0C0338A9 */ jal guOrtho
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/* 0A61BC 800A55BC E7A8001C */ swc1 $f8, 0x1c($sp)
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/* 0A61C0 800A55C0 3C088015 */ lui $t0, %hi(gDisplayListHead) # $t0, 0x8015
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/* 0A61C4 800A55C4 25080298 */ addiu $t0, %lo(gDisplayListHead) # addiu $t0, $t0, 0x298
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@ -1227,7 +1227,7 @@ glabel func_802A487C
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/* 10DF34 802A4924 E7A40010 */ swc1 $f4, 0x10($sp)
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/* 10DF38 802A4928 E7A00014 */ swc1 $f0, 0x14($sp)
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/* 10DF3C 802A492C E7A60018 */ swc1 $f6, 0x18($sp)
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/* 10DF40 802A4930 0C0338A9 */ jal guFrustum
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/* 10DF40 802A4930 0C0338A9 */ jal guOrtho
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/* 10DF44 802A4934 E7A8001C */ swc1 $f8, 0x1c($sp)
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/* 10DF48 802A4938 3C038015 */ lui $v1, %hi(gDisplayListHead) # $v1, 0x8015
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/* 10DF4C 802A493C 24630298 */ addiu $v1, %lo(gDisplayListHead) # addiu $v1, $v1, 0x298
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@ -1410,7 +1410,7 @@ glabel func_802A4A0C
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/* 10E204 802A4BF4 E7A80010 */ swc1 $f8, 0x10($sp)
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/* 10E208 802A4BF8 E7A00014 */ swc1 $f0, 0x14($sp)
|
||||
/* 10E20C 802A4BFC E7AA0018 */ swc1 $f10, 0x18($sp)
|
||||
/* 10E210 802A4C00 0C0338A9 */ jal guFrustum
|
||||
/* 10E210 802A4C00 0C0338A9 */ jal guOrtho
|
||||
/* 10E214 802A4C04 E7A6001C */ swc1 $f6, 0x1c($sp)
|
||||
/* 10E218 802A4C08 3C038015 */ lui $v1, %hi(gDisplayListHead) # $v1, 0x8015
|
||||
/* 10E21C 802A4C0C 24630298 */ addiu $v1, %lo(gDisplayListHead) # addiu $v1, $v1, 0x298
|
||||
|
|
|
|||
14753
asm/libultra.s
14753
asm/libultra.s
File diff suppressed because it is too large
Load Diff
|
|
@ -408,10 +408,10 @@ glabel L80003000
|
|||
/* 003C0C 8000300C 00000000 */ nop
|
||||
|
||||
glabel func_80003010
|
||||
/* 003C10 80003010 3C038000 */ lui $v1, %hi(D_8000031C) # $v1, 0x8000
|
||||
/* 003C10 80003010 3C038000 */ lui $v1, %hi(osAppNmiBuffer) # $v1, 0x8000
|
||||
/* 003C14 80003014 3C028000 */ lui $v0, %hi(D_8000035C) # $v0, 0x8000
|
||||
/* 003C18 80003018 2442035C */ addiu $v0, %lo(D_8000035C) # addiu $v0, $v0, 0x35c
|
||||
/* 003C1C 8000301C 2463031C */ addiu $v1, %lo(D_8000031C) # addiu $v1, $v1, 0x31c
|
||||
/* 003C1C 8000301C 2463031C */ addiu $v1, %lo(osAppNmiBuffer) # addiu $v1, $v1, 0x31c
|
||||
.L80003020:
|
||||
/* 003C20 80003020 24630010 */ addiu $v1, $v1, 0x10
|
||||
/* 003C24 80003024 AC60FFF4 */ sw $zero, -0xc($v1)
|
||||
|
|
|
|||
|
|
@ -6865,7 +6865,7 @@ glabel func_800B5B2C
|
|||
.L800B5B50:
|
||||
/* 0B6750 800B5B50 3C048015 */ lui $a0, %hi(gSIEventMesgQueue) # $a0, 0x8015
|
||||
/* 0B6754 800B5B54 2484F0B8 */ addiu $a0, %lo(gSIEventMesgQueue) # addiu $a0, $a0, -0xf48
|
||||
/* 0B6758 800B5B58 0C0338EC */ jal func_800CE3B0
|
||||
/* 0B6758 800B5B58 0C0338EC */ jal osPfsIsPlug
|
||||
/* 0B675C 800B5B5C AFA60020 */ sw $a2, 0x20($sp)
|
||||
/* 0B6760 800B5B60 8FA60020 */ lw $a2, 0x20($sp)
|
||||
/* 0B6764 800B5B64 93AE001F */ lbu $t6, 0x1f($sp)
|
||||
|
|
@ -7265,7 +7265,7 @@ glabel func_800B6088
|
|||
/* 0B6CC4 800B60C4 8CA5EB84 */ lw $a1, %lo(D_8018EB84)($a1)
|
||||
/* 0B6CC8 800B60C8 2484E868 */ addiu $a0, %lo(D_8018E868) # addiu $a0, $a0, -0x1798
|
||||
/* 0B6CCC 800B60CC AFA30014 */ sw $v1, 0x14($sp)
|
||||
/* 0B6CD0 800B60D0 0C0340F3 */ jal func_800D03CC
|
||||
/* 0B6CD0 800B60D0 0C0340F3 */ jal osPfsReadWriteFile
|
||||
/* 0B6CD4 800B60D4 24060001 */ li $a2, 1
|
||||
/* 0B6CD8 800B60D8 8FBF001C */ lw $ra, 0x1c($sp)
|
||||
/* 0B6CDC 800B60DC 27BD0020 */ addiu $sp, $sp, 0x20
|
||||
|
|
@ -7376,7 +7376,7 @@ glabel func_800B6178
|
|||
/* 0B6E5C 800B625C 2484E868 */ addiu $a0, %lo(D_8018E868) # addiu $a0, $a0, -0x1798
|
||||
/* 0B6E60 800B6260 25470100 */ addiu $a3, $t2, 0x100
|
||||
/* 0B6E64 800B6264 24060001 */ li $a2, 1
|
||||
/* 0B6E68 800B6268 0C0340F3 */ jal func_800D03CC
|
||||
/* 0B6E68 800B6268 0C0340F3 */ jal osPfsReadWriteFile
|
||||
/* 0B6E6C 800B626C AFAC0014 */ sw $t4, 0x14($sp)
|
||||
/* 0B6E70 800B6270 1440001E */ bnez $v0, .L800B62EC
|
||||
/* 0B6E74 800B6274 00401825 */ move $v1, $v0
|
||||
|
|
@ -7592,7 +7592,7 @@ glabel func_800B64EC
|
|||
/* 0B7148 800B6548 2484E868 */ addiu $a0, %lo(D_8018E868) # addiu $a0, $a0, -0x1798
|
||||
/* 0B714C 800B654C 24E70100 */ addiu $a3, $a3, 0x100
|
||||
/* 0B7150 800B6550 00003025 */ move $a2, $zero
|
||||
/* 0B7154 800B6554 0C0340F3 */ jal func_800D03CC
|
||||
/* 0B7154 800B6554 0C0340F3 */ jal osPfsReadWriteFile
|
||||
/* 0B7158 800B6558 AFAF0014 */ sw $t7, 0x14($sp)
|
||||
/* 0B715C 800B655C 1440001D */ bnez $v0, .L800B65D4
|
||||
/* 0B7160 800B6560 AFA20030 */ sw $v0, 0x30($sp)
|
||||
|
|
@ -7667,7 +7667,7 @@ glabel func_800B65F4
|
|||
/* 0B7254 800B6654 2484E8D0 */ addiu $a0, %lo(D_8018E8D0) # addiu $a0, $a0, -0x1730
|
||||
/* 0B7258 800B6658 24E70100 */ addiu $a3, $a3, 0x100
|
||||
/* 0B725C 800B665C 00003025 */ move $a2, $zero
|
||||
/* 0B7260 800B6660 0C0340F3 */ jal func_800D03CC
|
||||
/* 0B7260 800B6660 0C0340F3 */ jal osPfsReadWriteFile
|
||||
/* 0B7264 800B6664 AFAF0014 */ sw $t7, 0x14($sp)
|
||||
/* 0B7268 800B6668 1440001F */ bnez $v0, .L800B66E8
|
||||
/* 0B726C 800B666C AFA20034 */ sw $v0, 0x34($sp)
|
||||
|
|
@ -7730,7 +7730,7 @@ glabel func_800B6708
|
|||
/* 0B7338 800B6738 2484E868 */ addiu $a0, %lo(D_8018E868) # addiu $a0, $a0, -0x1798
|
||||
/* 0B733C 800B673C AFAF0014 */ sw $t7, 0x14($sp)
|
||||
/* 0B7340 800B6740 00003025 */ move $a2, $zero
|
||||
/* 0B7344 800B6744 0C0340F3 */ jal func_800D03CC
|
||||
/* 0B7344 800B6744 0C0340F3 */ jal osPfsReadWriteFile
|
||||
/* 0B7348 800B6748 00003825 */ move $a3, $zero
|
||||
/* 0B734C 800B674C 3C118019 */ lui $s1, %hi(D_8018EE10) # $s1, 0x8019
|
||||
/* 0B7350 800B6750 2631EE10 */ addiu $s1, %lo(D_8018EE10) # addiu $s1, $s1, -0x11f0
|
||||
|
|
@ -7770,7 +7770,7 @@ glabel func_800B6798
|
|||
/* 0B73C8 800B67C8 2484E8D0 */ addiu $a0, %lo(D_8018E8D0) # addiu $a0, $a0, -0x1730
|
||||
/* 0B73CC 800B67CC 00003025 */ move $a2, $zero
|
||||
/* 0B73D0 800B67D0 00003825 */ move $a3, $zero
|
||||
/* 0B73D4 800B67D4 0C0340F3 */ jal func_800D03CC
|
||||
/* 0B73D4 800B67D4 0C0340F3 */ jal osPfsReadWriteFile
|
||||
/* 0B73D8 800B67D8 AFB20014 */ sw $s2, 0x14($sp)
|
||||
/* 0B73DC 800B67DC 00008025 */ move $s0, $zero
|
||||
/* 0B73E0 800B67E0 24110002 */ li $s1, 2
|
||||
|
|
@ -7940,7 +7940,7 @@ glabel func_800B69BC
|
|||
/* 0B7644 800B6A44 AFA90010 */ sw $t1, 0x10($sp)
|
||||
/* 0B7648 800B6A48 2484E868 */ addiu $a0, %lo(D_8018E868) # addiu $a0, $a0, -0x1798
|
||||
/* 0B764C 800B6A4C 24060001 */ li $a2, 1
|
||||
/* 0B7650 800B6A50 0C0340F3 */ jal func_800D03CC
|
||||
/* 0B7650 800B6A50 0C0340F3 */ jal osPfsReadWriteFile
|
||||
/* 0B7654 800B6A54 AFA80014 */ sw $t0, 0x14($sp)
|
||||
/* 0B7658 800B6A58 8FBF001C */ lw $ra, 0x1c($sp)
|
||||
/* 0B765C 800B6A5C 27BD0030 */ addiu $sp, $sp, 0x30
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@ glabel func_8000105C
|
|||
/* 001C9C 8000109C 0C000456 */ jal dma_copy
|
||||
/* 001CA0 800010A0 3C048028 */ lui $a0, 0x8028
|
||||
/* 001CA4 800010A4 3C048028 */ lui $a0, 0x8028
|
||||
/* 001CA8 800010A8 0C0336C0 */ jal osInvalCache
|
||||
/* 001CA8 800010A8 0C0336C0 */ jal osInvalICache
|
||||
/* 001CAC 800010AC 3405DF00 */ li $a1, 57088
|
||||
/* 001CB0 800010B0 3C048028 */ lui $a0, 0x8028
|
||||
/* 001CB4 800010B4 0C0336E0 */ jal osInvalDCache
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@ glabel func_800010CC
|
|||
/* 001D20 80001120 3C048028 */ lui $a0, (0x8028DF00 >> 16) # lui $a0, 0x8028
|
||||
/* 001D24 80001124 3C050002 */ lui $a1, (0x0002C470 >> 16) # lui $a1, 2
|
||||
/* 001D28 80001128 34A5C470 */ ori $a1, (0x0002C470 & 0xFFFF) # ori $a1, $a1, 0xc470
|
||||
/* 001D2C 8000112C 0C0336C0 */ jal osInvalCache
|
||||
/* 001D2C 8000112C 0C0336C0 */ jal osInvalICache
|
||||
/* 001D30 80001130 3484DF00 */ ori $a0, (0x8028DF00 & 0xFFFF) # ori $a0, $a0, 0xdf00
|
||||
/* 001D34 80001134 3C048028 */ lui $a0, (0x8028DF00 >> 16) # lui $a0, 0x8028
|
||||
/* 001D38 80001138 3C050002 */ lui $a1, (0x0002C470 >> 16) # lui $a1, 2
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@ glabel func_800022DC
|
|||
/* 002EFC 800022FC 00E02025 */ move $a0, $a3
|
||||
/* 002F00 80002300 55C10010 */ bnel $t6, $at, .L80002344
|
||||
/* 002F04 80002304 8CF90000 */ lw $t9, ($a3)
|
||||
/* 002F08 80002308 0C033758 */ jal func_800CDD60
|
||||
/* 002F08 80002308 0C033758 */ jal osSpTaskYielded
|
||||
/* 002F0C 8000230C AFA7001C */ sw $a3, 0x1c($sp)
|
||||
/* 002F10 80002310 14400005 */ bnez $v0, .L80002328
|
||||
/* 002F14 80002314 8FA7001C */ lw $a3, 0x1c($sp)
|
||||
|
|
|
|||
|
|
@ -0,0 +1,18 @@
|
|||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
|
||||
glabel __osDisableInt
|
||||
mfc0 $t0, $12
|
||||
and $t1, $t0, -2
|
||||
mtc0 $t1, $12
|
||||
andi $v0, $t0, 1
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
|
||||
|
|
@ -0,0 +1,639 @@
|
|||
# handwritten (needs data/rodata too)
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
|
||||
glabel __osExceptionPreamble
|
||||
/* 0D1DB0 800D11B0 3C1A800D */ lui $k0, %hi(__osException) # $k0, 0x800d
|
||||
/* 0D1DB4 800D11B4 275A11C0 */ addiu $k0, %lo(__osException) # addiu $k0, $k0, 0x11c0
|
||||
/* 0D1DB8 800D11B8 03400008 */ jr $k0
|
||||
/* 0D1DBC 800D11BC 00000000 */ nop
|
||||
glabel __osException
|
||||
/* 0D1DC0 800D11C0 3C1A8019 */ lui $k0, %hi(D_801976A0) # $k0, 0x8019
|
||||
/* 0D1DC4 800D11C4 275A76A0 */ addiu $k0, %lo(D_801976A0) # addiu $k0, $k0, 0x76a0
|
||||
/* 0D1DC8 800D11C8 FF410020 */ sd $at, 0x20($k0)
|
||||
/* 0D1DCC 800D11CC 401B6000 */ mfc0 $k1, $12
|
||||
/* 0D1DD0 800D11D0 AF5B0118 */ sw $k1, 0x118($k0)
|
||||
/* 0D1DD4 800D11D4 2401FFFC */ li $at, -4
|
||||
/* 0D1DD8 800D11D8 0361D824 */ and $k1, $k1, $at
|
||||
/* 0D1DDC 800D11DC 409B6000 */ mtc0 $k1, $12
|
||||
/* 0D1DE0 800D11E0 FF480058 */ sd $t0, 0x58($k0)
|
||||
/* 0D1DE4 800D11E4 FF490060 */ sd $t1, 0x60($k0)
|
||||
/* 0D1DE8 800D11E8 FF4A0068 */ sd $t2, 0x68($k0)
|
||||
/* 0D1DEC 800D11EC AF400018 */ sw $zero, 0x18($k0)
|
||||
/* 0D1DF0 800D11F0 40086800 */ mfc0 $t0, $13
|
||||
/* 0D1DF4 800D11F4 03404025 */ move $t0, $k0
|
||||
/* 0D1DF8 800D11F8 3C1A800F */ lui $k0, %hi(__osRunningThread) # $k0, 0x800f
|
||||
/* 0D1DFC 800D11FC 8F5AB3B0 */ lw $k0, %lo(__osRunningThread)($k0)
|
||||
/* 0D1E00 800D1200 DD090020 */ ld $t1, 0x20($t0)
|
||||
/* 0D1E04 800D1204 FF490020 */ sd $t1, 0x20($k0)
|
||||
/* 0D1E08 800D1208 DD090118 */ ld $t1, 0x118($t0)
|
||||
/* 0D1E0C 800D120C FF490118 */ sd $t1, 0x118($k0)
|
||||
/* 0D1E10 800D1210 DD090058 */ ld $t1, 0x58($t0)
|
||||
/* 0D1E14 800D1214 FF490058 */ sd $t1, 0x58($k0)
|
||||
/* 0D1E18 800D1218 DD090060 */ ld $t1, 0x60($t0)
|
||||
/* 0D1E1C 800D121C FF490060 */ sd $t1, 0x60($k0)
|
||||
/* 0D1E20 800D1220 DD090068 */ ld $t1, 0x68($t0)
|
||||
/* 0D1E24 800D1224 FF490068 */ sd $t1, 0x68($k0)
|
||||
/* 0D1E28 800D1228 8F5B0118 */ lw $k1, 0x118($k0)
|
||||
/* 0D1E2C 800D122C 00004012 */ mflo $t0
|
||||
/* 0D1E30 800D1230 FF480108 */ sd $t0, 0x108($k0)
|
||||
/* 0D1E34 800D1234 00004010 */ mfhi $t0
|
||||
/* 0D1E38 800D1238 3369FF00 */ andi $t1, $k1, 0xff00
|
||||
/* 0D1E3C 800D123C FF420028 */ sd $v0, 0x28($k0)
|
||||
/* 0D1E40 800D1240 FF430030 */ sd $v1, 0x30($k0)
|
||||
/* 0D1E44 800D1244 FF440038 */ sd $a0, 0x38($k0)
|
||||
/* 0D1E48 800D1248 FF450040 */ sd $a1, 0x40($k0)
|
||||
/* 0D1E4C 800D124C FF460048 */ sd $a2, 0x48($k0)
|
||||
/* 0D1E50 800D1250 FF470050 */ sd $a3, 0x50($k0)
|
||||
/* 0D1E54 800D1254 FF4B0070 */ sd $t3, 0x70($k0)
|
||||
/* 0D1E58 800D1258 FF4C0078 */ sd $t4, 0x78($k0)
|
||||
/* 0D1E5C 800D125C FF4D0080 */ sd $t5, 0x80($k0)
|
||||
/* 0D1E60 800D1260 FF4E0088 */ sd $t6, 0x88($k0)
|
||||
/* 0D1E64 800D1264 FF4F0090 */ sd $t7, 0x90($k0)
|
||||
/* 0D1E68 800D1268 FF500098 */ sd $s0, 0x98($k0)
|
||||
/* 0D1E6C 800D126C FF5100A0 */ sd $s1, 0xa0($k0)
|
||||
/* 0D1E70 800D1270 FF5200A8 */ sd $s2, 0xa8($k0)
|
||||
/* 0D1E74 800D1274 FF5300B0 */ sd $s3, 0xb0($k0)
|
||||
/* 0D1E78 800D1278 FF5400B8 */ sd $s4, 0xb8($k0)
|
||||
/* 0D1E7C 800D127C FF5500C0 */ sd $s5, 0xc0($k0)
|
||||
/* 0D1E80 800D1280 FF5600C8 */ sd $s6, 0xc8($k0)
|
||||
/* 0D1E84 800D1284 FF5700D0 */ sd $s7, 0xd0($k0)
|
||||
/* 0D1E88 800D1288 FF5800D8 */ sd $t8, 0xd8($k0)
|
||||
/* 0D1E8C 800D128C FF5900E0 */ sd $t9, 0xe0($k0)
|
||||
/* 0D1E90 800D1290 FF5C00E8 */ sd $gp, 0xe8($k0)
|
||||
/* 0D1E94 800D1294 FF5D00F0 */ sd $sp, 0xf0($k0)
|
||||
/* 0D1E98 800D1298 FF5E00F8 */ sd $fp, 0xf8($k0)
|
||||
/* 0D1E9C 800D129C FF5F0100 */ sd $ra, 0x100($k0)
|
||||
/* 0D1EA0 800D12A0 1120000D */ beqz $t1, .L800D12D8
|
||||
/* 0D1EA4 800D12A4 FF480110 */ sd $t0, 0x110($k0)
|
||||
/* 0D1EA8 800D12A8 3C08800F */ lui $t0, %hi(__OSGlobalIntMask) # $t0, 0x800f
|
||||
/* 0D1EAC 800D12AC 2508A5EC */ addiu $t0, %lo(__OSGlobalIntMask) # addiu $t0, $t0, -0x5a14
|
||||
/* 0D1EB0 800D12B0 8D080000 */ lw $t0, ($t0)
|
||||
/* 0D1EB4 800D12B4 2401FFFF */ li $at, -1
|
||||
/* 0D1EB8 800D12B8 01014026 */ xor $t0, $t0, $at
|
||||
/* 0D1EBC 800D12BC 3C01FFFF */ lui $at, (0xFFFF00FF >> 16) # lui $at, 0xffff
|
||||
/* 0D1EC0 800D12C0 3108FF00 */ andi $t0, $t0, 0xff00
|
||||
/* 0D1EC4 800D12C4 342100FF */ ori $at, (0xFFFF00FF & 0xFFFF) # ori $at, $at, 0xff
|
||||
/* 0D1EC8 800D12C8 01284825 */ or $t1, $t1, $t0
|
||||
/* 0D1ECC 800D12CC 0361D824 */ and $k1, $k1, $at
|
||||
/* 0D1ED0 800D12D0 0369D825 */ or $k1, $k1, $t1
|
||||
/* 0D1ED4 800D12D4 AF5B0118 */ sw $k1, 0x118($k0)
|
||||
.L800D12D8:
|
||||
/* 0D1ED8 800D12D8 3C09A430 */ lui $t1, %hi(D_A430000C) # $t1, 0xa430
|
||||
/* 0D1EDC 800D12DC 8D29000C */ lw $t1, %lo(D_A430000C)($t1)
|
||||
/* 0D1EE0 800D12E0 1120000B */ beqz $t1, .L800D1310
|
||||
/* 0D1EE4 800D12E4 00000000 */ nop
|
||||
/* 0D1EE8 800D12E8 3C08800F */ lui $t0, %hi(__OSGlobalIntMask) # $t0, 0x800f
|
||||
/* 0D1EEC 800D12EC 2508A5EC */ addiu $t0, %lo(__OSGlobalIntMask) # addiu $t0, $t0, -0x5a14
|
||||
/* 0D1EF0 800D12F0 8D080000 */ lw $t0, ($t0)
|
||||
/* 0D1EF4 800D12F4 8F4C0128 */ lw $t4, 0x128($k0)
|
||||
/* 0D1EF8 800D12F8 2401FFFF */ li $at, -1
|
||||
/* 0D1EFC 800D12FC 00084402 */ srl $t0, $t0, 0x10
|
||||
/* 0D1F00 800D1300 01014026 */ xor $t0, $t0, $at
|
||||
/* 0D1F04 800D1304 3108003F */ andi $t0, $t0, 0x3f
|
||||
/* 0D1F08 800D1308 010C4024 */ and $t0, $t0, $t4
|
||||
/* 0D1F0C 800D130C 01284825 */ or $t1, $t1, $t0
|
||||
.L800D1310:
|
||||
/* 0D1F10 800D1310 AF490128 */ sw $t1, 0x128($k0)
|
||||
/* 0D1F14 800D1314 40087000 */ mfc0 $t0, $14
|
||||
/* 0D1F18 800D1318 AF48011C */ sw $t0, 0x11c($k0)
|
||||
/* 0D1F1C 800D131C 8F480018 */ lw $t0, 0x18($k0)
|
||||
/* 0D1F20 800D1320 11000014 */ beqz $t0, .L800D1374
|
||||
/* 0D1F24 800D1324 00000000 */ nop
|
||||
/* 0D1F28 800D1328 4448F800 */ cfc1 $t0, $31
|
||||
/* 0D1F2C 800D132C 00000000 */ nop
|
||||
/* 0D1F30 800D1330 AF48012C */ sw $t0, 0x12c($k0)
|
||||
/* 0D1F34 800D1334 F7400130 */ sdc1 $f0, 0x130($k0)
|
||||
/* 0D1F38 800D1338 F7420138 */ sdc1 $f2, 0x138($k0)
|
||||
/* 0D1F3C 800D133C F7440140 */ sdc1 $f4, 0x140($k0)
|
||||
/* 0D1F40 800D1340 F7460148 */ sdc1 $f6, 0x148($k0)
|
||||
/* 0D1F44 800D1344 F7480150 */ sdc1 $f8, 0x150($k0)
|
||||
/* 0D1F48 800D1348 F74A0158 */ sdc1 $f10, 0x158($k0)
|
||||
/* 0D1F4C 800D134C F74C0160 */ sdc1 $f12, 0x160($k0)
|
||||
/* 0D1F50 800D1350 F74E0168 */ sdc1 $f14, 0x168($k0)
|
||||
/* 0D1F54 800D1354 F7500170 */ sdc1 $f16, 0x170($k0)
|
||||
/* 0D1F58 800D1358 F7520178 */ sdc1 $f18, 0x178($k0)
|
||||
/* 0D1F5C 800D135C F7540180 */ sdc1 $f20, 0x180($k0)
|
||||
/* 0D1F60 800D1360 F7560188 */ sdc1 $f22, 0x188($k0)
|
||||
/* 0D1F64 800D1364 F7580190 */ sdc1 $f24, 0x190($k0)
|
||||
/* 0D1F68 800D1368 F75A0198 */ sdc1 $f26, 0x198($k0)
|
||||
/* 0D1F6C 800D136C F75C01A0 */ sdc1 $f28, 0x1a0($k0)
|
||||
/* 0D1F70 800D1370 F75E01A8 */ sdc1 $f30, 0x1a8($k0)
|
||||
.L800D1374:
|
||||
/* 0D1F74 800D1374 40086800 */ mfc0 $t0, $13
|
||||
/* 0D1F78 800D1378 AF480120 */ sw $t0, 0x120($k0)
|
||||
/* 0D1F7C 800D137C 24090002 */ li $t1, 2
|
||||
/* 0D1F80 800D1380 A7490010 */ sh $t1, 0x10($k0)
|
||||
/* 0D1F84 800D1384 3109007C */ andi $t1, $t0, 0x7c
|
||||
/* 0D1F88 800D1388 240A0024 */ li $t2, 36
|
||||
/* 0D1F8C 800D138C 112A00B0 */ beq $t1, $t2, .L800D1650
|
||||
/* 0D1F90 800D1390 00000000 */ nop
|
||||
/* 0D1F94 800D1394 240A002C */ li $t2, 44
|
||||
/* 0D1F98 800D1398 112A00FF */ beq $t1, $t2, .L800D1798
|
||||
/* 0D1F9C 800D139C 00000000 */ nop
|
||||
/* 0D1FA0 800D13A0 240A0000 */ li $t2, 0
|
||||
/* 0D1FA4 800D13A4 152A00C3 */ bne $t1, $t2, .L800D16B4
|
||||
/* 0D1FA8 800D13A8 00000000 */ nop
|
||||
/* 0D1FAC 800D13AC 03688024 */ and $s0, $k1, $t0
|
||||
.L800D13B0:
|
||||
/* 0D1FB0 800D13B0 3209FF00 */ andi $t1, $s0, 0xff00
|
||||
/* 0D1FB4 800D13B4 00095302 */ srl $t2, $t1, 0xc
|
||||
/* 0D1FB8 800D13B8 15400003 */ bnez $t2, .L800D13C8
|
||||
/* 0D1FBC 800D13BC 00000000 */ nop
|
||||
/* 0D1FC0 800D13C0 00095202 */ srl $t2, $t1, 8
|
||||
/* 0D1FC4 800D13C4 214A0010 */ addi $t2, $t2, 0x10
|
||||
.L800D13C8:
|
||||
/* 0D1FC8 800D13C8 3C01800F */ lui $at, %hi(D_800F3A00) # 0x800f
|
||||
/* 0D1FCC 800D13CC 002A0821 */ addu $at, $at, $t2
|
||||
/* 0D1FD0 800D13D0 902A3A00 */ lbu $t2, %lo(D_800F3A00)($at) # 0x3a00($at)
|
||||
/* 0D1FD4 800D13D4 3C01800F */ lui $at, %hi(D_800F3A20)
|
||||
/* 0D1FD8 800D13D8 002A0821 */ addu $at, $at, $t2
|
||||
/* 0D1FDC 800D13DC 8C2A3A20 */ lw $t2, %lo(D_800F3A20)($at)
|
||||
/* 0D1FE0 800D13E0 01400008 */ jr $t2
|
||||
/* 0D1FE4 800D13E4 00000000 */ nop
|
||||
glabel L800D13E8
|
||||
/* 0D1FE8 800D13E8 2401DFFF */ li $at, -8193
|
||||
/* 0D1FEC 800D13EC 1000FFF0 */ b .L800D13B0
|
||||
/* 0D1FF0 800D13F0 02018024 */ and $s0, $s0, $at
|
||||
glabel L800D13F4
|
||||
/* 0D1FF4 800D13F4 2401BFFF */ li $at, -16385
|
||||
/* 0D1FF8 800D13F8 1000FFED */ b .L800D13B0
|
||||
/* 0D1FFC 800D13FC 02018024 */ and $s0, $s0, $at
|
||||
glabel L800D1400
|
||||
/* 0D2000 800D1400 40095800 */ mfc0 $t1, $11
|
||||
/* 0D2004 800D1404 40895800 */ mtc0 $t1, $11
|
||||
/* 0D2008 800D1408 0C0345B9 */ jal func_800D16E4
|
||||
/* 0D200C 800D140C 24040018 */ li $a0, 24
|
||||
/* 0D2010 800D1410 3C01FFFF */ lui $at, (0xFFFF7FFF >> 16) # lui $at, 0xffff
|
||||
/* 0D2014 800D1414 34217FFF */ ori $at, (0xFFFF7FFF & 0xFFFF) # ori $at, $at, 0x7fff
|
||||
/* 0D2018 800D1418 1000FFE5 */ b .L800D13B0
|
||||
/* 0D201C 800D141C 02018024 */ and $s0, $s0, $at
|
||||
glabel L800D1420
|
||||
/* 0D2020 800D1420 2401F7FF */ li $at, -2049
|
||||
/* 0D2024 800D1424 02018024 */ and $s0, $s0, $at
|
||||
/* 0D2028 800D1428 240A0004 */ li $t2, 4
|
||||
/* 0D202C 800D142C 3C01800F */ lui $at, %hi(__osHwIntTable) # 0x800f
|
||||
/* 0D2030 800D1430 002A0821 */ addu $at, $at, $t2
|
||||
/* 0D2034 800D1434 8C2AB380 */ lw $t2, %lo(__osHwIntTable)($at) # -0x4c80($at)
|
||||
/* 0D2038 800D1438 3C1D8019 */ lui $sp, %hi(D_801965E0) # $sp, 0x8019
|
||||
/* 0D203C 800D143C 27BD65E0 */ addiu $sp, %lo(D_801965E0) # addiu $sp, $sp, 0x65e0
|
||||
/* 0D2040 800D1440 24040010 */ li $a0, 16
|
||||
/* 0D2044 800D1444 11400007 */ beqz $t2, .L800D1464
|
||||
/* 0D2048 800D1448 27BD0FF0 */ addiu $sp, $sp, 0xff0
|
||||
/* 0D204C 800D144C 0140F809 */ jalr $t2
|
||||
/* 0D2050 800D1450 00000000 */ nop
|
||||
/* 0D2054 800D1454 10400003 */ beqz $v0, .L800D1464
|
||||
/* 0D2058 800D1458 00000000 */ nop
|
||||
/* 0D205C 800D145C 10000082 */ b .L800D1668
|
||||
/* 0D2060 800D1460 00000000 */ nop
|
||||
.L800D1464:
|
||||
/* 0D2064 800D1464 0C0345B9 */ jal func_800D16E4
|
||||
/* 0D2068 800D1468 00000000 */ nop
|
||||
/* 0D206C 800D146C 1000FFD0 */ b .L800D13B0
|
||||
/* 0D2070 800D1470 00000000 */ nop
|
||||
glabel L800D1474
|
||||
/* 0D2074 800D1474 3C08800F */ lui $t0, %hi(__OSGlobalIntMask) # $t0, 0x800f
|
||||
/* 0D2078 800D1478 2508A5EC */ addiu $t0, %lo(__OSGlobalIntMask) # addiu $t0, $t0, -0x5a14
|
||||
/* 0D207C 800D147C 8D080000 */ lw $t0, ($t0)
|
||||
/* 0D2080 800D1480 3C11A430 */ lui $s1, %hi(D_A4300008) # $s1, 0xa430
|
||||
/* 0D2084 800D1484 8E310008 */ lw $s1, %lo(D_A4300008)($s1)
|
||||
/* 0D2088 800D1488 00084402 */ srl $t0, $t0, 0x10
|
||||
/* 0D208C 800D148C 02288824 */ and $s1, $s1, $t0
|
||||
/* 0D2090 800D1490 32290001 */ andi $t1, $s1, 1
|
||||
/* 0D2094 800D1494 11200013 */ beqz $t1, .L800D14E4
|
||||
/* 0D2098 800D1498 00000000 */ nop
|
||||
/* 0D209C 800D149C 3C0CA404 */ lui $t4, %hi(D_A4040010) # $t4, 0xa404
|
||||
/* 0D20A0 800D14A0 8D8C0010 */ lw $t4, %lo(D_A4040010)($t4)
|
||||
/* 0D20A4 800D14A4 24090008 */ li $t1, 8
|
||||
/* 0D20A8 800D14A8 3C01A404 */ lui $at, %hi(D_A4040010) # $at, 0xa404
|
||||
/* 0D20AC 800D14AC 318C0300 */ andi $t4, $t4, 0x300
|
||||
/* 0D20B0 800D14B0 3231003E */ andi $s1, $s1, 0x3e
|
||||
/* 0D20B4 800D14B4 11800007 */ beqz $t4, .L800D14D4
|
||||
/* 0D20B8 800D14B8 AC290010 */ sw $t1, %lo(D_A4040010)($at)
|
||||
/* 0D20BC 800D14BC 0C0345B9 */ jal func_800D16E4
|
||||
/* 0D20C0 800D14C0 24040020 */ li $a0, 32
|
||||
/* 0D20C4 800D14C4 12200038 */ beqz $s1, .L800D15A8
|
||||
/* 0D20C8 800D14C8 00000000 */ nop
|
||||
/* 0D20CC 800D14CC 10000005 */ b .L800D14E4
|
||||
/* 0D20D0 800D14D0 00000000 */ nop
|
||||
.L800D14D4:
|
||||
/* 0D20D4 800D14D4 0C0345B9 */ jal func_800D16E4
|
||||
/* 0D20D8 800D14D8 24040058 */ li $a0, 88
|
||||
/* 0D20DC 800D14DC 12200032 */ beqz $s1, .L800D15A8
|
||||
/* 0D20E0 800D14E0 00000000 */ nop
|
||||
.L800D14E4:
|
||||
/* 0D20E4 800D14E4 32290008 */ andi $t1, $s1, 8
|
||||
/* 0D20E8 800D14E8 11200007 */ beqz $t1, .L800D1508
|
||||
/* 0D20EC 800D14EC 3C01A440 */ lui $at, %hi(D_A4400010) # $at, 0xa440
|
||||
/* 0D20F0 800D14F0 32310037 */ andi $s1, $s1, 0x37
|
||||
/* 0D20F4 800D14F4 AC200010 */ sw $zero, %lo(D_A4400010)($at)
|
||||
/* 0D20F8 800D14F8 0C0345B9 */ jal func_800D16E4
|
||||
/* 0D20FC 800D14FC 24040038 */ li $a0, 56
|
||||
/* 0D2100 800D1500 12200029 */ beqz $s1, .L800D15A8
|
||||
/* 0D2104 800D1504 00000000 */ nop
|
||||
.L800D1508:
|
||||
/* 0D2108 800D1508 32290004 */ andi $t1, $s1, 4
|
||||
/* 0D210C 800D150C 11200009 */ beqz $t1, .L800D1534
|
||||
/* 0D2110 800D1510 00000000 */ nop
|
||||
/* 0D2114 800D1514 24090001 */ li $t1, 1
|
||||
/* 0D2118 800D1518 3C01A450 */ lui $at, %hi(D_A450000C) # $at, 0xa450
|
||||
/* 0D211C 800D151C 3231003B */ andi $s1, $s1, 0x3b
|
||||
/* 0D2120 800D1520 AC29000C */ sw $t1, %lo(D_A450000C)($at)
|
||||
/* 0D2124 800D1524 0C0345B9 */ jal func_800D16E4
|
||||
/* 0D2128 800D1528 24040030 */ li $a0, 48
|
||||
/* 0D212C 800D152C 1220001E */ beqz $s1, .L800D15A8
|
||||
/* 0D2130 800D1530 00000000 */ nop
|
||||
.L800D1534:
|
||||
/* 0D2134 800D1534 32290002 */ andi $t1, $s1, 2
|
||||
/* 0D2138 800D1538 11200007 */ beqz $t1, .L800D1558
|
||||
/* 0D213C 800D153C 3C01A480 */ lui $at, %hi(D_A4800018) # $at, 0xa480
|
||||
/* 0D2140 800D1540 3231003D */ andi $s1, $s1, 0x3d
|
||||
/* 0D2144 800D1544 AC200018 */ sw $zero, %lo(D_A4800018)($at)
|
||||
/* 0D2148 800D1548 0C0345B9 */ jal func_800D16E4
|
||||
/* 0D214C 800D154C 24040028 */ li $a0, 40
|
||||
/* 0D2150 800D1550 12200015 */ beqz $s1, .L800D15A8
|
||||
/* 0D2154 800D1554 00000000 */ nop
|
||||
.L800D1558:
|
||||
/* 0D2158 800D1558 32290010 */ andi $t1, $s1, 0x10
|
||||
/* 0D215C 800D155C 11200009 */ beqz $t1, .L800D1584
|
||||
/* 0D2160 800D1560 00000000 */ nop
|
||||
/* 0D2164 800D1564 24090002 */ li $t1, 2
|
||||
/* 0D2168 800D1568 3C01A460 */ lui $at, %hi(D_A4600010) # $at, 0xa460
|
||||
/* 0D216C 800D156C 3231002F */ andi $s1, $s1, 0x2f
|
||||
/* 0D2170 800D1570 AC290010 */ sw $t1, %lo(D_A4600010)($at)
|
||||
/* 0D2174 800D1574 0C0345B9 */ jal func_800D16E4
|
||||
/* 0D2178 800D1578 24040040 */ li $a0, 64
|
||||
/* 0D217C 800D157C 1220000A */ beqz $s1, .L800D15A8
|
||||
/* 0D2180 800D1580 00000000 */ nop
|
||||
.L800D1584:
|
||||
/* 0D2184 800D1584 32290020 */ andi $t1, $s1, 0x20
|
||||
/* 0D2188 800D1588 11200007 */ beqz $t1, .L800D15A8
|
||||
/* 0D218C 800D158C 00000000 */ nop
|
||||
/* 0D2190 800D1590 24090800 */ li $t1, 2048
|
||||
/* 0D2194 800D1594 3C01A430 */ lui $at, 0xa430
|
||||
/* 0D2198 800D1598 3231001F */ andi $s1, $s1, 0x1f
|
||||
/* 0D219C 800D159C AC290000 */ sw $t1, ($at)
|
||||
/* 0D21A0 800D15A0 0C0345B9 */ jal func_800D16E4
|
||||
/* 0D21A4 800D15A4 24040048 */ li $a0, 72
|
||||
.L800D15A8:
|
||||
/* 0D21A8 800D15A8 2401FBFF */ li $at, -1025
|
||||
/* 0D21AC 800D15AC 1000FF80 */ b .L800D13B0
|
||||
/* 0D21B0 800D15B0 02018024 */ and $s0, $s0, $at
|
||||
glabel L800D15B4
|
||||
/* 0D21B4 800D15B4 8F5B0118 */ lw $k1, 0x118($k0)
|
||||
/* 0D21B8 800D15B8 2401EFFF */ li $at, -4097
|
||||
/* 0D21BC 800D15BC 3C09800F */ lui $t1, %hi(D_800EA5E8) # $t1, 0x800f
|
||||
/* 0D21C0 800D15C0 0361D824 */ and $k1, $k1, $at
|
||||
/* 0D21C4 800D15C4 AF5B0118 */ sw $k1, 0x118($k0)
|
||||
/* 0D21C8 800D15C8 2529A5E8 */ addiu $t1, %lo(D_800EA5E8) # addiu $t1, $t1, -0x5a18
|
||||
/* 0D21CC 800D15CC 8D2A0000 */ lw $t2, ($t1)
|
||||
/* 0D21D0 800D15D0 11400003 */ beqz $t2, .L800D15E0
|
||||
/* 0D21D4 800D15D4 2401EFFF */ li $at, -4097
|
||||
/* 0D21D8 800D15D8 10000023 */ b .L800D1668
|
||||
/* 0D21DC 800D15DC 02018024 */ and $s0, $s0, $at
|
||||
.L800D15E0:
|
||||
/* 0D21E0 800D15E0 240A0001 */ li $t2, 1
|
||||
/* 0D21E4 800D15E4 AD2A0000 */ sw $t2, ($t1)
|
||||
/* 0D21E8 800D15E8 0C0345B9 */ jal func_800D16E4
|
||||
/* 0D21EC 800D15EC 24040070 */ li $a0, 112
|
||||
/* 0D21F0 800D15F0 3C0A800F */ lui $t2, %hi(__osRunQueue) # $t2, 0x800f
|
||||
/* 0D21F4 800D15F4 8D4AB3A8 */ lw $t2, %lo(__osRunQueue)($t2)
|
||||
/* 0D21F8 800D15F8 2401EFFF */ li $at, -4097
|
||||
/* 0D21FC 800D15FC 02018024 */ and $s0, $s0, $at
|
||||
/* 0D2200 800D1600 8D5B0118 */ lw $k1, 0x118($t2)
|
||||
/* 0D2204 800D1604 0361D824 */ and $k1, $k1, $at
|
||||
/* 0D2208 800D1608 10000017 */ b .L800D1668
|
||||
/* 0D220C 800D160C AD5B0118 */ sw $k1, 0x118($t2)
|
||||
glabel L800D1610
|
||||
/* 0D2210 800D1610 2401FDFF */ li $at, -513
|
||||
/* 0D2214 800D1614 01014024 */ and $t0, $t0, $at
|
||||
/* 0D2218 800D1618 40886800 */ mtc0 $t0, $13
|
||||
/* 0D221C 800D161C 0C0345B9 */ jal func_800D16E4
|
||||
/* 0D2220 800D1620 24040008 */ li $a0, 8
|
||||
/* 0D2224 800D1624 2401FDFF */ li $at, -513
|
||||
/* 0D2228 800D1628 1000FF61 */ b .L800D13B0
|
||||
/* 0D222C 800D162C 02018024 */ and $s0, $s0, $at
|
||||
glabel L800D1630
|
||||
/* 0D2230 800D1630 2401FEFF */ li $at, -257
|
||||
/* 0D2234 800D1634 01014024 */ and $t0, $t0, $at
|
||||
/* 0D2238 800D1638 40886800 */ mtc0 $t0, $13
|
||||
/* 0D223C 800D163C 0C0345B9 */ jal func_800D16E4
|
||||
/* 0D2240 800D1640 24040000 */ li $a0, 0
|
||||
/* 0D2244 800D1644 2401FEFF */ li $at, -257
|
||||
/* 0D2248 800D1648 1000FF59 */ b .L800D13B0
|
||||
/* 0D224C 800D164C 02018024 */ and $s0, $s0, $at
|
||||
.L800D1650:
|
||||
/* 0D2250 800D1650 24090001 */ li $t1, 1
|
||||
/* 0D2254 800D1654 A7490012 */ sh $t1, 0x12($k0)
|
||||
/* 0D2258 800D1658 0C0345B9 */ jal func_800D16E4
|
||||
/* 0D225C 800D165C 24040050 */ li $a0, 80
|
||||
/* 0D2260 800D1660 10000001 */ b .L800D1668
|
||||
/* 0D2264 800D1664 00000000 */ nop
|
||||
.L800D1668:
|
||||
glabel L800D1668
|
||||
/* 0D2268 800D1668 3C0A800F */ lui $t2, %hi(__osRunQueue) # $t2, 0x800f
|
||||
/* 0D226C 800D166C 8D4AB3A8 */ lw $t2, %lo(__osRunQueue)($t2)
|
||||
/* 0D2270 800D1670 8F490004 */ lw $t1, 4($k0)
|
||||
/* 0D2274 800D1674 8D4B0004 */ lw $t3, 4($t2)
|
||||
/* 0D2278 800D1678 012B082A */ slt $at, $t1, $t3
|
||||
/* 0D227C 800D167C 10200007 */ beqz $at, .L800D169C
|
||||
/* 0D2280 800D1680 00000000 */ nop
|
||||
/* 0D2284 800D1684 3C04800F */ lui $a0, %hi(__osRunQueue) # $a0, 0x800f
|
||||
/* 0D2288 800D1688 03402825 */ move $a1, $k0
|
||||
/* 0D228C 800D168C 0C034633 */ jal __osEnqueueThread
|
||||
/* 0D2290 800D1690 2484B3A8 */ addiu $a0, %lo(__osRunQueue) # addiu $a0, $a0, -0x4c58
|
||||
/* 0D2294 800D1694 08034649 */ j __osDispatchThread
|
||||
/* 0D2298 800D1698 00000000 */ nop
|
||||
|
||||
.L800D169C:
|
||||
/* 0D229C 800D169C 3C09800F */ lui $t1, %hi(__osRunQueue) # $t1, 0x800f
|
||||
/* 0D22A0 800D16A0 2529B3A8 */ addiu $t1, %lo(__osRunQueue) # addiu $t1, $t1, -0x4c58
|
||||
/* 0D22A4 800D16A4 8D2A0000 */ lw $t2, ($t1)
|
||||
/* 0D22A8 800D16A8 AF4A0000 */ sw $t2, ($k0)
|
||||
/* 0D22AC 800D16AC 08034649 */ j __osDispatchThread
|
||||
/* 0D22B0 800D16B0 AD3A0000 */ sw $k0, ($t1)
|
||||
|
||||
.L800D16B4:
|
||||
/* 0D22B4 800D16B4 3C01800F */ lui $at, %hi(D_800EB3B4) # $at, 0x800f
|
||||
/* 0D22B8 800D16B8 AC3AB3B4 */ sw $k0, %lo(D_800EB3B4)($at)
|
||||
/* 0D22BC 800D16BC 24090001 */ li $t1, 1
|
||||
/* 0D22C0 800D16C0 A7490010 */ sh $t1, 0x10($k0)
|
||||
/* 0D22C4 800D16C4 24090002 */ li $t1, 2
|
||||
/* 0D22C8 800D16C8 A7490012 */ sh $t1, 0x12($k0)
|
||||
/* 0D22CC 800D16CC 400A4000 */ mfc0 $t2, $8
|
||||
/* 0D22D0 800D16D0 AF4A0124 */ sw $t2, 0x124($k0)
|
||||
/* 0D22D4 800D16D4 0C0345B9 */ jal func_800D16E4
|
||||
/* 0D22D8 800D16D8 24040060 */ li $a0, 96
|
||||
/* 0D22DC 800D16DC 08034649 */ j __osDispatchThread
|
||||
/* 0D22E0 800D16E0 00000000 */ nop
|
||||
|
||||
glabel func_800D16E4
|
||||
/* 0D22E4 800D16E4 3C0A8019 */ lui $t2, %hi(__osEventStateTab) # $t2, 0x8019
|
||||
/* 0D22E8 800D16E8 254A6440 */ addiu $t2, %lo(__osEventStateTab) # addiu $t2, $t2, 0x6440
|
||||
/* 0D22EC 800D16EC 01445021 */ addu $t2, $t2, $a0
|
||||
/* 0D22F0 800D16F0 8D490000 */ lw $t1, ($t2)
|
||||
/* 0D22F4 800D16F4 03E09025 */ move $s2, $ra
|
||||
/* 0D22F8 800D16F8 11200025 */ beqz $t1, .L800D1790
|
||||
/* 0D22FC 800D16FC 00000000 */ nop
|
||||
/* 0D2300 800D1700 8D2B0008 */ lw $t3, 8($t1)
|
||||
/* 0D2304 800D1704 8D2C0010 */ lw $t4, 0x10($t1)
|
||||
/* 0D2308 800D1708 016C082A */ slt $at, $t3, $t4
|
||||
/* 0D230C 800D170C 10200020 */ beqz $at, .L800D1790
|
||||
/* 0D2310 800D1710 00000000 */ nop
|
||||
/* 0D2314 800D1714 8D2D000C */ lw $t5, 0xc($t1)
|
||||
/* 0D2318 800D1718 01AB6821 */ addu $t5, $t5, $t3
|
||||
/* 0D231C 800D171C 01AC001A */ div $zero, $t5, $t4
|
||||
/* 0D2320 800D1720 15800002 */ bnez $t4, .L800D172C
|
||||
/* 0D2324 800D1724 00000000 */ nop
|
||||
/* 0D2328 800D1728 0007000D */ break 7
|
||||
.L800D172C:
|
||||
/* 0D232C 800D172C 2401FFFF */ li $at, -1
|
||||
/* 0D2330 800D1730 15810004 */ bne $t4, $at, .L800D1744
|
||||
/* 0D2334 800D1734 3C018000 */ lui $at, 0x8000
|
||||
/* 0D2338 800D1738 15A10002 */ bne $t5, $at, .L800D1744
|
||||
/* 0D233C 800D173C 00000000 */ nop
|
||||
/* 0D2340 800D1740 0006000D */ break 6
|
||||
.L800D1744:
|
||||
/* 0D2344 800D1744 8D2C0014 */ lw $t4, 0x14($t1)
|
||||
/* 0D2348 800D1748 00006810 */ mfhi $t5
|
||||
/* 0D234C 800D174C 000D6880 */ sll $t5, $t5, 2
|
||||
/* 0D2350 800D1750 018D6021 */ addu $t4, $t4, $t5
|
||||
/* 0D2354 800D1754 8D4D0004 */ lw $t5, 4($t2)
|
||||
/* 0D2358 800D1758 256A0001 */ addiu $t2, $t3, 1
|
||||
/* 0D235C 800D175C AD8D0000 */ sw $t5, ($t4)
|
||||
/* 0D2360 800D1760 AD2A0008 */ sw $t2, 8($t1)
|
||||
/* 0D2364 800D1764 8D2A0000 */ lw $t2, ($t1)
|
||||
/* 0D2368 800D1768 8D4B0000 */ lw $t3, ($t2)
|
||||
/* 0D236C 800D176C 11600008 */ beqz $t3, .L800D1790
|
||||
/* 0D2370 800D1770 00000000 */ nop
|
||||
/* 0D2374 800D1774 0C034645 */ jal __osPopThread
|
||||
/* 0D2378 800D1778 01202025 */ move $a0, $t1
|
||||
/* 0D237C 800D177C 00405025 */ move $t2, $v0
|
||||
/* 0D2380 800D1780 3C04800F */ lui $a0, %hi(__osRunQueue) # $a0, 0x800f
|
||||
/* 0D2384 800D1784 01402825 */ move $a1, $t2
|
||||
/* 0D2388 800D1788 0C034633 */ jal __osEnqueueThread
|
||||
/* 0D238C 800D178C 2484B3A8 */ addiu $a0, %lo(__osRunQueue) # addiu $a0, $a0, -0x4c58
|
||||
.L800D1790:
|
||||
/* 0D2390 800D1790 02400008 */ jr $s2
|
||||
/* 0D2394 800D1794 00000000 */ nop
|
||||
.L800D1798:
|
||||
/* 0D2398 800D1798 3C013000 */ lui $at, 0x3000
|
||||
/* 0D239C 800D179C 01014824 */ and $t1, $t0, $at
|
||||
/* 0D23A0 800D17A0 00094F02 */ srl $t1, $t1, 0x1c
|
||||
/* 0D23A4 800D17A4 240A0001 */ li $t2, 1
|
||||
/* 0D23A8 800D17A8 152AFFC2 */ bne $t1, $t2, .L800D16B4
|
||||
/* 0D23AC 800D17AC 00000000 */ nop
|
||||
/* 0D23B0 800D17B0 8F5B0118 */ lw $k1, 0x118($k0)
|
||||
/* 0D23B4 800D17B4 3C012000 */ lui $at, 0x2000
|
||||
/* 0D23B8 800D17B8 24090001 */ li $t1, 1
|
||||
/* 0D23BC 800D17BC 0361D825 */ or $k1, $k1, $at
|
||||
/* 0D23C0 800D17C0 AF490018 */ sw $t1, 0x18($k0)
|
||||
/* 0D23C4 800D17C4 1000FFB5 */ b .L800D169C
|
||||
/* 0D23C8 800D17C8 AF5B0118 */ sw $k1, 0x118($k0)
|
||||
glabel __osEnqueueAndYield
|
||||
/* 0D23CC 800D17CC 3C05800F */ lui $a1, %hi(__osRunningThread) # $a1, 0x800f
|
||||
/* 0D23D0 800D17D0 8CA5B3B0 */ lw $a1, %lo(__osRunningThread)($a1)
|
||||
/* 0D23D4 800D17D4 40086000 */ mfc0 $t0, $12
|
||||
/* 0D23D8 800D17D8 8CBB0018 */ lw $k1, 0x18($a1)
|
||||
/* 0D23DC 800D17DC 35080002 */ ori $t0, $t0, 2
|
||||
/* 0D23E0 800D17E0 ACA80118 */ sw $t0, 0x118($a1)
|
||||
/* 0D23E4 800D17E4 FCB00098 */ sd $s0, 0x98($a1)
|
||||
/* 0D23E8 800D17E8 FCB100A0 */ sd $s1, 0xa0($a1)
|
||||
/* 0D23EC 800D17EC FCB200A8 */ sd $s2, 0xa8($a1)
|
||||
/* 0D23F0 800D17F0 FCB300B0 */ sd $s3, 0xb0($a1)
|
||||
/* 0D23F4 800D17F4 FCB400B8 */ sd $s4, 0xb8($a1)
|
||||
/* 0D23F8 800D17F8 FCB500C0 */ sd $s5, 0xc0($a1)
|
||||
/* 0D23FC 800D17FC FCB600C8 */ sd $s6, 0xc8($a1)
|
||||
/* 0D2400 800D1800 FCB700D0 */ sd $s7, 0xd0($a1)
|
||||
/* 0D2404 800D1804 FCBC00E8 */ sd $gp, 0xe8($a1)
|
||||
/* 0D2408 800D1808 FCBD00F0 */ sd $sp, 0xf0($a1)
|
||||
/* 0D240C 800D180C FCBE00F8 */ sd $fp, 0xf8($a1)
|
||||
/* 0D2410 800D1810 FCBF0100 */ sd $ra, 0x100($a1)
|
||||
/* 0D2414 800D1814 13600009 */ beqz $k1, .L800D183C
|
||||
/* 0D2418 800D1818 ACBF011C */ sw $ra, 0x11c($a1)
|
||||
/* 0D241C 800D181C 445BF800 */ cfc1 $k1, $31
|
||||
/* 0D2420 800D1820 F4B40180 */ sdc1 $f20, 0x180($a1)
|
||||
/* 0D2424 800D1824 F4B60188 */ sdc1 $f22, 0x188($a1)
|
||||
/* 0D2428 800D1828 F4B80190 */ sdc1 $f24, 0x190($a1)
|
||||
/* 0D242C 800D182C F4BA0198 */ sdc1 $f26, 0x198($a1)
|
||||
/* 0D2430 800D1830 F4BC01A0 */ sdc1 $f28, 0x1a0($a1)
|
||||
/* 0D2434 800D1834 F4BE01A8 */ sdc1 $f30, 0x1a8($a1)
|
||||
/* 0D2438 800D1838 ACBB012C */ sw $k1, 0x12c($a1)
|
||||
.L800D183C:
|
||||
/* 0D243C 800D183C 8CBB0118 */ lw $k1, 0x118($a1)
|
||||
/* 0D2440 800D1840 3369FF00 */ andi $t1, $k1, 0xff00
|
||||
/* 0D2444 800D1844 1120000D */ beqz $t1, .L800D187C
|
||||
/* 0D2448 800D1848 00000000 */ nop
|
||||
/* 0D244C 800D184C 3C08800F */ lui $t0, %hi(__OSGlobalIntMask) # $t0, 0x800f
|
||||
/* 0D2450 800D1850 2508A5EC */ addiu $t0, %lo(__OSGlobalIntMask) # addiu $t0, $t0, -0x5a14
|
||||
/* 0D2454 800D1854 8D080000 */ lw $t0, ($t0)
|
||||
/* 0D2458 800D1858 2401FFFF */ li $at, -1
|
||||
/* 0D245C 800D185C 01014026 */ xor $t0, $t0, $at
|
||||
/* 0D2460 800D1860 3C01FFFF */ lui $at, (0xFFFF00FF >> 16) # lui $at, 0xffff
|
||||
/* 0D2464 800D1864 3108FF00 */ andi $t0, $t0, 0xff00
|
||||
/* 0D2468 800D1868 342100FF */ ori $at, (0xFFFF00FF & 0xFFFF) # ori $at, $at, 0xff
|
||||
/* 0D246C 800D186C 01284825 */ or $t1, $t1, $t0
|
||||
/* 0D2470 800D1870 0361D824 */ and $k1, $k1, $at
|
||||
/* 0D2474 800D1874 0369D825 */ or $k1, $k1, $t1
|
||||
/* 0D2478 800D1878 ACBB0118 */ sw $k1, 0x118($a1)
|
||||
.L800D187C:
|
||||
/* 0D247C 800D187C 3C1BA430 */ lui $k1, %hi(D_A430000C) # $k1, 0xa430
|
||||
/* 0D2480 800D1880 8F7B000C */ lw $k1, %lo(D_A430000C)($k1)
|
||||
/* 0D2484 800D1884 1360000B */ beqz $k1, .L800D18B4
|
||||
/* 0D2488 800D1888 00000000 */ nop
|
||||
/* 0D248C 800D188C 3C1A800F */ lui $k0, %hi(__OSGlobalIntMask) # $k0, 0x800f
|
||||
/* 0D2490 800D1890 275AA5EC */ addiu $k0, %lo(__OSGlobalIntMask) # addiu $k0, $k0, -0x5a14
|
||||
/* 0D2494 800D1894 8F5A0000 */ lw $k0, ($k0)
|
||||
/* 0D2498 800D1898 8CA80128 */ lw $t0, 0x128($a1)
|
||||
/* 0D249C 800D189C 2401FFFF */ li $at, -1
|
||||
/* 0D24A0 800D18A0 001AD402 */ srl $k0, $k0, 0x10
|
||||
/* 0D24A4 800D18A4 0341D026 */ xor $k0, $k0, $at
|
||||
/* 0D24A8 800D18A8 335A003F */ andi $k0, $k0, 0x3f
|
||||
/* 0D24AC 800D18AC 0348D024 */ and $k0, $k0, $t0
|
||||
/* 0D24B0 800D18B0 037AD825 */ or $k1, $k1, $k0
|
||||
.L800D18B4:
|
||||
/* 0D24B4 800D18B4 10800003 */ beqz $a0, .L800D18C4
|
||||
/* 0D24B8 800D18B8 ACBB0128 */ sw $k1, 0x128($a1)
|
||||
/* 0D24BC 800D18BC 0C034633 */ jal __osEnqueueThread
|
||||
/* 0D24C0 800D18C0 00000000 */ nop
|
||||
.L800D18C4:
|
||||
/* 0D24C4 800D18C4 08034649 */ j __osDispatchThread
|
||||
/* 0D24C8 800D18C8 00000000 */ nop
|
||||
|
||||
glabel __osEnqueueThread
|
||||
/* 0D24CC 800D18CC 8C980000 */ lw $t8, ($a0)
|
||||
/* 0D24D0 800D18D0 8CAF0004 */ lw $t7, 4($a1)
|
||||
/* 0D24D4 800D18D4 0080C825 */ move $t9, $a0
|
||||
/* 0D24D8 800D18D8 8F0E0004 */ lw $t6, 4($t8)
|
||||
/* 0D24DC 800D18DC 01CF082A */ slt $at, $t6, $t7
|
||||
/* 0D24E0 800D18E0 14200007 */ bnez $at, .L800D1900
|
||||
/* 0D24E4 800D18E4 00000000 */ nop
|
||||
.L800D18E8:
|
||||
/* 0D24E8 800D18E8 0300C825 */ move $t9, $t8
|
||||
/* 0D24EC 800D18EC 8F180000 */ lw $t8, ($t8)
|
||||
/* 0D24F0 800D18F0 8F0E0004 */ lw $t6, 4($t8)
|
||||
/* 0D24F4 800D18F4 01CF082A */ slt $at, $t6, $t7
|
||||
/* 0D24F8 800D18F8 1020FFFB */ beqz $at, .L800D18E8
|
||||
/* 0D24FC 800D18FC 00000000 */ nop
|
||||
.L800D1900:
|
||||
/* 0D2500 800D1900 8F380000 */ lw $t8, ($t9)
|
||||
/* 0D2504 800D1904 ACB80000 */ sw $t8, ($a1)
|
||||
/* 0D2508 800D1908 AF250000 */ sw $a1, ($t9)
|
||||
/* 0D250C 800D190C 03E00008 */ jr $ra
|
||||
/* 0D2510 800D1910 ACA40008 */ sw $a0, 8($a1)
|
||||
|
||||
glabel __osPopThread
|
||||
/* 0D2514 800D1914 8C820000 */ lw $v0, ($a0)
|
||||
/* 0D2518 800D1918 8C590000 */ lw $t9, ($v0)
|
||||
/* 0D251C 800D191C 03E00008 */ jr $ra
|
||||
/* 0D2520 800D1920 AC990000 */ sw $t9, ($a0)
|
||||
|
||||
glabel __osDispatchThread
|
||||
/* 0D2524 800D1924 3C04800F */ lui $a0, %hi(__osRunQueue) # $a0, 0x800f
|
||||
/* 0D2528 800D1928 0C034645 */ jal __osPopThread
|
||||
/* 0D252C 800D192C 2484B3A8 */ addiu $a0, %lo(__osRunQueue) # addiu $a0, $a0, -0x4c58
|
||||
/* 0D2530 800D1930 3C01800F */ lui $at, %hi(__osRunningThread) # $at, 0x800f
|
||||
/* 0D2534 800D1934 AC22B3B0 */ sw $v0, %lo(__osRunningThread)($at)
|
||||
/* 0D2538 800D1938 24080004 */ li $t0, 4
|
||||
/* 0D253C 800D193C A4480010 */ sh $t0, 0x10($v0)
|
||||
/* 0D2540 800D1940 0040D025 */ move $k0, $v0
|
||||
/* 0D2544 800D1944 3C08800F */ lui $t0, %hi(__OSGlobalIntMask) # $t0, 0x800f
|
||||
/* 0D2548 800D1948 8F5B0118 */ lw $k1, 0x118($k0)
|
||||
/* 0D254C 800D194C 2508A5EC */ addiu $t0, %lo(__OSGlobalIntMask) # addiu $t0, $t0, -0x5a14
|
||||
/* 0D2550 800D1950 8D080000 */ lw $t0, ($t0)
|
||||
/* 0D2554 800D1954 3C01FFFF */ lui $at, (0xFFFF00FF >> 16) # lui $at, 0xffff
|
||||
/* 0D2558 800D1958 3369FF00 */ andi $t1, $k1, 0xff00
|
||||
/* 0D255C 800D195C 342100FF */ ori $at, (0xFFFF00FF & 0xFFFF) # ori $at, $at, 0xff
|
||||
/* 0D2560 800D1960 3108FF00 */ andi $t0, $t0, 0xff00
|
||||
/* 0D2564 800D1964 01284824 */ and $t1, $t1, $t0
|
||||
/* 0D2568 800D1968 0361D824 */ and $k1, $k1, $at
|
||||
/* 0D256C 800D196C 0369D825 */ or $k1, $k1, $t1
|
||||
/* 0D2570 800D1970 409B6000 */ mtc0 $k1, $12
|
||||
/* 0D2574 800D1974 DF5B0108 */ ld $k1, 0x108($k0)
|
||||
/* 0D2578 800D1978 DF410020 */ ld $at, 0x20($k0)
|
||||
/* 0D257C 800D197C DF420028 */ ld $v0, 0x28($k0)
|
||||
/* 0D2580 800D1980 03600013 */ mtlo $k1
|
||||
/* 0D2584 800D1984 DF5B0110 */ ld $k1, 0x110($k0)
|
||||
/* 0D2588 800D1988 DF430030 */ ld $v1, 0x30($k0)
|
||||
/* 0D258C 800D198C DF440038 */ ld $a0, 0x38($k0)
|
||||
/* 0D2590 800D1990 DF450040 */ ld $a1, 0x40($k0)
|
||||
/* 0D2594 800D1994 DF460048 */ ld $a2, 0x48($k0)
|
||||
/* 0D2598 800D1998 DF470050 */ ld $a3, 0x50($k0)
|
||||
/* 0D259C 800D199C DF480058 */ ld $t0, 0x58($k0)
|
||||
/* 0D25A0 800D19A0 DF490060 */ ld $t1, 0x60($k0)
|
||||
/* 0D25A4 800D19A4 DF4A0068 */ ld $t2, 0x68($k0)
|
||||
/* 0D25A8 800D19A8 DF4B0070 */ ld $t3, 0x70($k0)
|
||||
/* 0D25AC 800D19AC DF4C0078 */ ld $t4, 0x78($k0)
|
||||
/* 0D25B0 800D19B0 DF4D0080 */ ld $t5, 0x80($k0)
|
||||
/* 0D25B4 800D19B4 DF4E0088 */ ld $t6, 0x88($k0)
|
||||
/* 0D25B8 800D19B8 DF4F0090 */ ld $t7, 0x90($k0)
|
||||
/* 0D25BC 800D19BC DF500098 */ ld $s0, 0x98($k0)
|
||||
/* 0D25C0 800D19C0 DF5100A0 */ ld $s1, 0xa0($k0)
|
||||
/* 0D25C4 800D19C4 DF5200A8 */ ld $s2, 0xa8($k0)
|
||||
/* 0D25C8 800D19C8 DF5300B0 */ ld $s3, 0xb0($k0)
|
||||
/* 0D25CC 800D19CC DF5400B8 */ ld $s4, 0xb8($k0)
|
||||
/* 0D25D0 800D19D0 DF5500C0 */ ld $s5, 0xc0($k0)
|
||||
/* 0D25D4 800D19D4 DF5600C8 */ ld $s6, 0xc8($k0)
|
||||
/* 0D25D8 800D19D8 DF5700D0 */ ld $s7, 0xd0($k0)
|
||||
/* 0D25DC 800D19DC DF5800D8 */ ld $t8, 0xd8($k0)
|
||||
/* 0D25E0 800D19E0 DF5900E0 */ ld $t9, 0xe0($k0)
|
||||
/* 0D25E4 800D19E4 DF5C00E8 */ ld $gp, 0xe8($k0)
|
||||
/* 0D25E8 800D19E8 03600011 */ mthi $k1
|
||||
/* 0D25EC 800D19EC DF5D00F0 */ ld $sp, 0xf0($k0)
|
||||
/* 0D25F0 800D19F0 DF5E00F8 */ ld $fp, 0xf8($k0)
|
||||
/* 0D25F4 800D19F4 DF5F0100 */ ld $ra, 0x100($k0)
|
||||
/* 0D25F8 800D19F8 8F5B011C */ lw $k1, 0x11c($k0)
|
||||
/* 0D25FC 800D19FC 409B7000 */ mtc0 $k1, $14
|
||||
/* 0D2600 800D1A00 8F5B0018 */ lw $k1, 0x18($k0)
|
||||
/* 0D2604 800D1A04 13600013 */ beqz $k1, .L800D1A54
|
||||
/* 0D2608 800D1A08 00000000 */ nop
|
||||
/* 0D260C 800D1A0C 8F5B012C */ lw $k1, 0x12c($k0)
|
||||
/* 0D2610 800D1A10 44DBF800 */ ctc1 $k1, $31
|
||||
/* 0D2614 800D1A14 D7400130 */ ldc1 $f0, 0x130($k0)
|
||||
/* 0D2618 800D1A18 D7420138 */ ldc1 $f2, 0x138($k0)
|
||||
/* 0D261C 800D1A1C D7440140 */ ldc1 $f4, 0x140($k0)
|
||||
/* 0D2620 800D1A20 D7460148 */ ldc1 $f6, 0x148($k0)
|
||||
/* 0D2624 800D1A24 D7480150 */ ldc1 $f8, 0x150($k0)
|
||||
/* 0D2628 800D1A28 D74A0158 */ ldc1 $f10, 0x158($k0)
|
||||
/* 0D262C 800D1A2C D74C0160 */ ldc1 $f12, 0x160($k0)
|
||||
/* 0D2630 800D1A30 D74E0168 */ ldc1 $f14, 0x168($k0)
|
||||
/* 0D2634 800D1A34 D7500170 */ ldc1 $f16, 0x170($k0)
|
||||
/* 0D2638 800D1A38 D7520178 */ ldc1 $f18, 0x178($k0)
|
||||
/* 0D263C 800D1A3C D7540180 */ ldc1 $f20, 0x180($k0)
|
||||
/* 0D2640 800D1A40 D7560188 */ ldc1 $f22, 0x188($k0)
|
||||
/* 0D2644 800D1A44 D7580190 */ ldc1 $f24, 0x190($k0)
|
||||
/* 0D2648 800D1A48 D75A0198 */ ldc1 $f26, 0x198($k0)
|
||||
/* 0D264C 800D1A4C D75C01A0 */ ldc1 $f28, 0x1a0($k0)
|
||||
/* 0D2650 800D1A50 D75E01A8 */ ldc1 $f30, 0x1a8($k0)
|
||||
.L800D1A54:
|
||||
/* 0D2654 800D1A54 8F5B0128 */ lw $k1, 0x128($k0)
|
||||
/* 0D2658 800D1A58 3C1A800F */ lui $k0, %hi(__OSGlobalIntMask) # $k0, 0x800f
|
||||
/* 0D265C 800D1A5C 275AA5EC */ addiu $k0, %lo(__OSGlobalIntMask) # addiu $k0, $k0, -0x5a14
|
||||
/* 0D2660 800D1A60 8F5A0000 */ lw $k0, ($k0)
|
||||
/* 0D2664 800D1A64 001AD402 */ srl $k0, $k0, 0x10
|
||||
/* 0D2668 800D1A68 037AD824 */ and $k1, $k1, $k0
|
||||
/* 0D266C 800D1A6C 001BD840 */ sll $k1, $k1, 1
|
||||
/* 0D2670 800D1A70 3C1A800F */ lui $k0, %hi(D_800F3C10) # $k0, 0x800f
|
||||
/* 0D2674 800D1A74 275A3C10 */ addiu $k0, %lo(D_800F3C10) # addiu $k0, $k0, 0x3c10
|
||||
/* 0D2678 800D1A78 037AD821 */ addu $k1, $k1, $k0
|
||||
/* 0D267C 800D1A7C 977B0000 */ lhu $k1, ($k1)
|
||||
/* 0D2680 800D1A80 3C1AA430 */ lui $k0, %hi(D_A430000C) # $k0, 0xa430
|
||||
/* 0D2684 800D1A84 275A000C */ addiu $k0, %lo(D_A430000C) # addiu $k0, $k0, 0xc
|
||||
/* 0D2688 800D1A88 AF5B0000 */ sw $k1, ($k0)
|
||||
/* 0D268C 800D1A8C 00000000 */ nop
|
||||
/* 0D2690 800D1A90 00000000 */ nop
|
||||
/* 0D2694 800D1A94 00000000 */ nop
|
||||
/* 0D2698 800D1A98 00000000 */ nop
|
||||
/* 0D269C 800D1A9C 42000018 */ eret
|
||||
glabel __osCleanupThread
|
||||
/* 0D26A0 800D1AA0 0C035E9C */ jal osDestroyThread
|
||||
/* 0D26A4 800D1AA4 00002025 */ move $a0, $zero
|
||||
/* 0D26A8 800D1AA8 00000000 */ nop
|
||||
/* 0D26AC 800D1AAC 00000000 */ nop
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel __osGetSR
|
||||
mfc0 $v0, $12
|
||||
jr $ra
|
||||
nop
|
||||
|
||||
nop
|
||||
|
||||
|
|
@ -0,0 +1,602 @@
|
|||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel __osLeoInterrupt
|
||||
/* 0D2990 800D1D90 3C0E800F */ lui $t6, %hi(D_800EA5F0) # $t6, 0x800f
|
||||
/* 0D2994 800D1D94 8DCEA5F0 */ lw $t6, %lo(D_800EA5F0)($t6)
|
||||
/* 0D2998 800D1D98 27BDFFC0 */ addiu $sp, $sp, -0x40
|
||||
/* 0D299C 800D1D9C AFBF001C */ sw $ra, 0x1c($sp)
|
||||
/* 0D29A0 800D1DA0 15C00003 */ bnez $t6, .L800D1DB0
|
||||
/* 0D29A4 800D1DA4 00000000 */ nop
|
||||
/* 0D29A8 800D1DA8 1000019D */ b .L800D2420
|
||||
/* 0D29AC 800D1DAC 00001025 */ move $v0, $zero
|
||||
.L800D1DB0:
|
||||
/* 0D29B0 800D1DB0 3C0F8019 */ lui $t7, %hi(__osDiskHandle) # $t7, 0x8019
|
||||
/* 0D29B4 800D1DB4 8DEF78C0 */ lw $t7, %lo(__osDiskHandle)($t7)
|
||||
/* 0D29B8 800D1DB8 3C0BA460 */ lui $t3, %hi(D_A4600010) # $t3, 0xa460
|
||||
/* 0D29BC 800D1DBC 25F80014 */ addiu $t8, $t7, 0x14
|
||||
/* 0D29C0 800D1DC0 AFB80030 */ sw $t8, 0x30($sp)
|
||||
/* 0D29C4 800D1DC4 95F9001A */ lhu $t9, 0x1a($t7)
|
||||
/* 0D29C8 800D1DC8 00194140 */ sll $t0, $t9, 5
|
||||
/* 0D29CC 800D1DCC 03084821 */ addu $t1, $t8, $t0
|
||||
/* 0D29D0 800D1DD0 252A001C */ addiu $t2, $t1, 0x1c
|
||||
/* 0D29D4 800D1DD4 AFAA002C */ sw $t2, 0x2c($sp)
|
||||
/* 0D29D8 800D1DD8 8D6C0010 */ lw $t4, %lo(D_A4600010)($t3)
|
||||
/* 0D29DC 800D1DDC AFAC0038 */ sw $t4, 0x38($sp)
|
||||
/* 0D29E0 800D1DE0 8FAD0038 */ lw $t5, 0x38($sp)
|
||||
/* 0D29E4 800D1DE4 31AE0001 */ andi $t6, $t5, 1
|
||||
/* 0D29E8 800D1DE8 11C00034 */ beqz $t6, .L800D1EBC
|
||||
/* 0D29EC 800D1DEC 00000000 */ nop
|
||||
/* 0D29F0 800D1DF0 240F0003 */ li $t7, 3
|
||||
/* 0D29F4 800D1DF4 3C19A460 */ lui $t9, %hi(D_A4600010) # $t9, 0xa460
|
||||
/* 0D29F8 800D1DF8 AF2F0010 */ sw $t7, %lo(D_A4600010)($t9)
|
||||
/* 0D29FC 800D1DFC 3C18A460 */ lui $t8, %hi(D_A4600010) # $t8, 0xa460
|
||||
/* 0D2A00 800D1E00 8F080010 */ lw $t0, %lo(D_A4600010)($t8)
|
||||
/* 0D2A04 800D1E04 AFA80038 */ sw $t0, 0x38($sp)
|
||||
/* 0D2A08 800D1E08 8FA90038 */ lw $t1, 0x38($sp)
|
||||
/* 0D2A0C 800D1E0C 312A0002 */ andi $t2, $t1, 2
|
||||
/* 0D2A10 800D1E10 11400008 */ beqz $t2, .L800D1E34
|
||||
/* 0D2A14 800D1E14 00000000 */ nop
|
||||
.L800D1E18:
|
||||
/* 0D2A18 800D1E18 3C0BA460 */ lui $t3, %hi(D_A4600010) # $t3, 0xa460
|
||||
/* 0D2A1C 800D1E1C 8D6C0010 */ lw $t4, %lo(D_A4600010)($t3)
|
||||
/* 0D2A20 800D1E20 AFAC0038 */ sw $t4, 0x38($sp)
|
||||
/* 0D2A24 800D1E24 8FAD0038 */ lw $t5, 0x38($sp)
|
||||
/* 0D2A28 800D1E28 31AE0002 */ andi $t6, $t5, 2
|
||||
/* 0D2A2C 800D1E2C 15C0FFFA */ bnez $t6, .L800D1E18
|
||||
/* 0D2A30 800D1E30 00000000 */ nop
|
||||
.L800D1E34:
|
||||
/* 0D2A34 800D1E34 3C0FA500 */ lui $t7, %hi(D_A5000508) # $t7, 0xa500
|
||||
/* 0D2A38 800D1E38 8DF90508 */ lw $t9, %lo(D_A5000508)($t7)
|
||||
/* 0D2A3C 800D1E3C 3C010200 */ lui $at, 0x200
|
||||
/* 0D2A40 800D1E40 AFB9003C */ sw $t9, 0x3c($sp)
|
||||
/* 0D2A44 800D1E44 8FB8003C */ lw $t8, 0x3c($sp)
|
||||
/* 0D2A48 800D1E48 03014024 */ and $t0, $t8, $at
|
||||
/* 0D2A4C 800D1E4C 11000015 */ beqz $t0, .L800D1EA4
|
||||
/* 0D2A50 800D1E50 00000000 */ nop
|
||||
/* 0D2A54 800D1E54 3C09A460 */ lui $t1, %hi(D_A4600010) # $t1, 0xa460
|
||||
/* 0D2A58 800D1E58 8D2A0010 */ lw $t2, %lo(D_A4600010)($t1)
|
||||
/* 0D2A5C 800D1E5C AFAA0038 */ sw $t2, 0x38($sp)
|
||||
/* 0D2A60 800D1E60 8FAB0038 */ lw $t3, 0x38($sp)
|
||||
/* 0D2A64 800D1E64 316C0002 */ andi $t4, $t3, 2
|
||||
/* 0D2A68 800D1E68 11800008 */ beqz $t4, .L800D1E8C
|
||||
/* 0D2A6C 800D1E6C 00000000 */ nop
|
||||
.L800D1E70:
|
||||
/* 0D2A70 800D1E70 3C0DA460 */ lui $t5, %hi(D_A4600010) # $t5, 0xa460
|
||||
/* 0D2A74 800D1E74 8DAE0010 */ lw $t6, %lo(D_A4600010)($t5)
|
||||
/* 0D2A78 800D1E78 AFAE0038 */ sw $t6, 0x38($sp)
|
||||
/* 0D2A7C 800D1E7C 8FAF0038 */ lw $t7, 0x38($sp)
|
||||
/* 0D2A80 800D1E80 31F90002 */ andi $t9, $t7, 2
|
||||
/* 0D2A84 800D1E84 1720FFFA */ bnez $t9, .L800D1E70
|
||||
/* 0D2A88 800D1E88 00000000 */ nop
|
||||
.L800D1E8C:
|
||||
/* 0D2A8C 800D1E8C 8FB80030 */ lw $t8, 0x30($sp)
|
||||
/* 0D2A90 800D1E90 3C010100 */ lui $at, 0x100
|
||||
/* 0D2A94 800D1E94 3C0AA500 */ lui $t2, %hi(D_A5000510) # $t2, 0xa500
|
||||
/* 0D2A98 800D1E98 8F080014 */ lw $t0, 0x14($t8)
|
||||
/* 0D2A9C 800D1E9C 01014825 */ or $t1, $t0, $at
|
||||
/* 0D2AA0 800D1EA0 AD490510 */ sw $t1, %lo(D_A5000510)($t2)
|
||||
.L800D1EA4:
|
||||
/* 0D2AA4 800D1EA4 8FAC0030 */ lw $t4, 0x30($sp)
|
||||
/* 0D2AA8 800D1EA8 240B004B */ li $t3, 75
|
||||
/* 0D2AAC 800D1EAC 0C03490C */ jal __osLeoAbnormalResume
|
||||
/* 0D2AB0 800D1EB0 AD8B0010 */ sw $t3, 0x10($t4)
|
||||
/* 0D2AB4 800D1EB4 1000015A */ b .L800D2420
|
||||
/* 0D2AB8 800D1EB8 24020001 */ li $v0, 1
|
||||
.L800D1EBC:
|
||||
/* 0D2ABC 800D1EBC 3C0DA460 */ lui $t5, %hi(D_A4600010) # $t5, 0xa460
|
||||
/* 0D2AC0 800D1EC0 8DAE0010 */ lw $t6, %lo(D_A4600010)($t5)
|
||||
/* 0D2AC4 800D1EC4 AFAE0038 */ sw $t6, 0x38($sp)
|
||||
/* 0D2AC8 800D1EC8 8FAF0038 */ lw $t7, 0x38($sp)
|
||||
/* 0D2ACC 800D1ECC 31F90002 */ andi $t9, $t7, 2
|
||||
/* 0D2AD0 800D1ED0 13200008 */ beqz $t9, .L800D1EF4
|
||||
/* 0D2AD4 800D1ED4 00000000 */ nop
|
||||
.L800D1ED8:
|
||||
/* 0D2AD8 800D1ED8 3C18A460 */ lui $t8, %hi(D_A4600010) # $t8, 0xa460
|
||||
/* 0D2ADC 800D1EDC 8F080010 */ lw $t0, %lo(D_A4600010)($t8)
|
||||
/* 0D2AE0 800D1EE0 AFA80038 */ sw $t0, 0x38($sp)
|
||||
/* 0D2AE4 800D1EE4 8FA90038 */ lw $t1, 0x38($sp)
|
||||
/* 0D2AE8 800D1EE8 312A0002 */ andi $t2, $t1, 2
|
||||
/* 0D2AEC 800D1EEC 1540FFFA */ bnez $t2, .L800D1ED8
|
||||
/* 0D2AF0 800D1EF0 00000000 */ nop
|
||||
.L800D1EF4:
|
||||
/* 0D2AF4 800D1EF4 3C0BA500 */ lui $t3, %hi(D_A5000508) # $t3, 0xa500
|
||||
/* 0D2AF8 800D1EF8 8D6C0508 */ lw $t4, %lo(D_A5000508)($t3)
|
||||
/* 0D2AFC 800D1EFC 3C010200 */ lui $at, 0x200
|
||||
/* 0D2B00 800D1F00 AFAC003C */ sw $t4, 0x3c($sp)
|
||||
/* 0D2B04 800D1F04 8FAD003C */ lw $t5, 0x3c($sp)
|
||||
/* 0D2B08 800D1F08 01A17024 */ and $t6, $t5, $at
|
||||
/* 0D2B0C 800D1F0C 11C00019 */ beqz $t6, .L800D1F74
|
||||
/* 0D2B10 800D1F10 00000000 */ nop
|
||||
/* 0D2B14 800D1F14 3C0FA460 */ lui $t7, %hi(D_A4600010) # $t7, 0xa460
|
||||
/* 0D2B18 800D1F18 8DF90010 */ lw $t9, %lo(D_A4600010)($t7)
|
||||
/* 0D2B1C 800D1F1C AFB90038 */ sw $t9, 0x38($sp)
|
||||
/* 0D2B20 800D1F20 8FB80038 */ lw $t8, 0x38($sp)
|
||||
/* 0D2B24 800D1F24 33080002 */ andi $t0, $t8, 2
|
||||
/* 0D2B28 800D1F28 11000008 */ beqz $t0, .L800D1F4C
|
||||
/* 0D2B2C 800D1F2C 00000000 */ nop
|
||||
.L800D1F30:
|
||||
/* 0D2B30 800D1F30 3C09A460 */ lui $t1, %hi(D_A4600010) # $t1, 0xa460
|
||||
/* 0D2B34 800D1F34 8D2A0010 */ lw $t2, %lo(D_A4600010)($t1)
|
||||
/* 0D2B38 800D1F38 AFAA0038 */ sw $t2, 0x38($sp)
|
||||
/* 0D2B3C 800D1F3C 8FAB0038 */ lw $t3, 0x38($sp)
|
||||
/* 0D2B40 800D1F40 316C0002 */ andi $t4, $t3, 2
|
||||
/* 0D2B44 800D1F44 1580FFFA */ bnez $t4, .L800D1F30
|
||||
/* 0D2B48 800D1F48 00000000 */ nop
|
||||
.L800D1F4C:
|
||||
/* 0D2B4C 800D1F4C 8FAD0030 */ lw $t5, 0x30($sp)
|
||||
/* 0D2B50 800D1F50 3C010100 */ lui $at, 0x100
|
||||
/* 0D2B54 800D1F54 3C19A500 */ lui $t9, %hi(D_A5000510) # $t9, 0xa500
|
||||
/* 0D2B58 800D1F58 8DAE0014 */ lw $t6, 0x14($t5)
|
||||
/* 0D2B5C 800D1F5C 00001025 */ move $v0, $zero
|
||||
/* 0D2B60 800D1F60 01C17825 */ or $t7, $t6, $at
|
||||
/* 0D2B64 800D1F64 AF2F0510 */ sw $t7, %lo(D_A5000510)($t9)
|
||||
/* 0D2B68 800D1F68 8FB80030 */ lw $t8, 0x30($sp)
|
||||
/* 0D2B6C 800D1F6C 1000012C */ b .L800D2420
|
||||
/* 0D2B70 800D1F70 AF000010 */ sw $zero, 0x10($t8)
|
||||
.L800D1F74:
|
||||
/* 0D2B74 800D1F74 8FA8003C */ lw $t0, 0x3c($sp)
|
||||
/* 0D2B78 800D1F78 3C010800 */ lui $at, 0x800
|
||||
/* 0D2B7C 800D1F7C 01014824 */ and $t1, $t0, $at
|
||||
/* 0D2B80 800D1F80 11200007 */ beqz $t1, .L800D1FA0
|
||||
/* 0D2B84 800D1F84 00000000 */ nop
|
||||
/* 0D2B88 800D1F88 8FAB0030 */ lw $t3, 0x30($sp)
|
||||
/* 0D2B8C 800D1F8C 240A0003 */ li $t2, 3
|
||||
/* 0D2B90 800D1F90 0C03490C */ jal __osLeoAbnormalResume
|
||||
/* 0D2B94 800D1F94 AD6A0010 */ sw $t2, 0x10($t3)
|
||||
/* 0D2B98 800D1F98 10000121 */ b .L800D2420
|
||||
/* 0D2B9C 800D1F9C 24020001 */ li $v0, 1
|
||||
.L800D1FA0:
|
||||
/* 0D2BA0 800D1FA0 8FAC0030 */ lw $t4, 0x30($sp)
|
||||
/* 0D2BA4 800D1FA4 24010001 */ li $at, 1
|
||||
/* 0D2BA8 800D1FA8 8D8D0000 */ lw $t5, ($t4)
|
||||
/* 0D2BAC 800D1FAC 15A1003A */ bne $t5, $at, .L800D2098
|
||||
/* 0D2BB0 800D1FB0 00000000 */ nop
|
||||
/* 0D2BB4 800D1FB4 8FAE003C */ lw $t6, 0x3c($sp)
|
||||
/* 0D2BB8 800D1FB8 3C014000 */ lui $at, 0x4000
|
||||
/* 0D2BBC 800D1FBC 01C17824 */ and $t7, $t6, $at
|
||||
/* 0D2BC0 800D1FC0 15E00020 */ bnez $t7, .L800D2044
|
||||
/* 0D2BC4 800D1FC4 00000000 */ nop
|
||||
/* 0D2BC8 800D1FC8 95880004 */ lhu $t0, 4($t4)
|
||||
/* 0D2BCC 800D1FCC 8D990008 */ lw $t9, 8($t4)
|
||||
/* 0D2BD0 800D1FD0 00084880 */ sll $t1, $t0, 2
|
||||
/* 0D2BD4 800D1FD4 01284821 */ addu $t1, $t1, $t0
|
||||
/* 0D2BD8 800D1FD8 00094880 */ sll $t1, $t1, 2
|
||||
/* 0D2BDC 800D1FDC 01284821 */ addu $t1, $t1, $t0
|
||||
/* 0D2BE0 800D1FE0 00094880 */ sll $t1, $t1, 2
|
||||
/* 0D2BE4 800D1FE4 01284821 */ addu $t1, $t1, $t0
|
||||
/* 0D2BE8 800D1FE8 27380001 */ addiu $t8, $t9, 1
|
||||
/* 0D2BEC 800D1FEC 13090006 */ beq $t8, $t1, .L800D2008
|
||||
/* 0D2BF0 800D1FF0 00000000 */ nop
|
||||
/* 0D2BF4 800D1FF4 240A0006 */ li $t2, 6
|
||||
/* 0D2BF8 800D1FF8 0C03490C */ jal __osLeoAbnormalResume
|
||||
/* 0D2BFC 800D1FFC AD8A0010 */ sw $t2, 0x10($t4)
|
||||
/* 0D2C00 800D2000 10000107 */ b .L800D2420
|
||||
/* 0D2C04 800D2004 24020001 */ li $v0, 1
|
||||
.L800D2008:
|
||||
/* 0D2C08 800D2008 240B0002 */ li $t3, 2
|
||||
/* 0D2C0C 800D200C 3C0DA460 */ lui $t5, %hi(D_A4600010) # $t5, 0xa460
|
||||
/* 0D2C10 800D2010 ADAB0010 */ sw $t3, %lo(D_A4600010)($t5)
|
||||
/* 0D2C14 800D2014 3C0E800F */ lui $t6, %hi(__OSGlobalIntMask) # $t6, 0x800f
|
||||
/* 0D2C18 800D2018 8DCEA5EC */ lw $t6, %lo(__OSGlobalIntMask)($t6)
|
||||
/* 0D2C1C 800D201C 3C010010 */ lui $at, (0x00100401 >> 16) # lui $at, 0x10
|
||||
/* 0D2C20 800D2020 34210401 */ ori $at, (0x00100401 & 0xFFFF) # ori $at, $at, 0x401
|
||||
/* 0D2C24 800D2024 01C17825 */ or $t7, $t6, $at
|
||||
/* 0D2C28 800D2028 8FB90030 */ lw $t9, 0x30($sp)
|
||||
/* 0D2C2C 800D202C 3C01800F */ lui $at, %hi(__OSGlobalIntMask) # $at, 0x800f
|
||||
/* 0D2C30 800D2030 AC2FA5EC */ sw $t7, %lo(__OSGlobalIntMask)($at)
|
||||
/* 0D2C34 800D2034 0C034946 */ jal __osLeoResume
|
||||
/* 0D2C38 800D2038 AF200010 */ sw $zero, 0x10($t9)
|
||||
/* 0D2C3C 800D203C 100000F8 */ b .L800D2420
|
||||
/* 0D2C40 800D2040 24020001 */ li $v0, 1
|
||||
.L800D2044:
|
||||
/* 0D2C44 800D2044 8FA8002C */ lw $t0, 0x2c($sp)
|
||||
/* 0D2C48 800D2048 3C048019 */ lui $a0, %hi(__osDiskHandle) # $a0, 0x8019
|
||||
/* 0D2C4C 800D204C 3C060500 */ lui $a2, (0x05000400 >> 16) # lui $a2, 0x500
|
||||
/* 0D2C50 800D2050 8D180000 */ lw $t8, ($t0)
|
||||
/* 0D2C54 800D2054 8D090008 */ lw $t1, 8($t0)
|
||||
/* 0D2C58 800D2058 34C60400 */ ori $a2, (0x05000400 & 0xFFFF) # ori $a2, $a2, 0x400
|
||||
/* 0D2C5C 800D205C 24050001 */ li $a1, 1
|
||||
/* 0D2C60 800D2060 03095021 */ addu $t2, $t8, $t1
|
||||
/* 0D2C64 800D2064 AD0A0000 */ sw $t2, ($t0)
|
||||
/* 0D2C68 800D2068 8FAC0030 */ lw $t4, 0x30($sp)
|
||||
/* 0D2C6C 800D206C 8D8B0008 */ lw $t3, 8($t4)
|
||||
/* 0D2C70 800D2070 256D0001 */ addiu $t5, $t3, 1
|
||||
/* 0D2C74 800D2074 AD8D0008 */ sw $t5, 8($t4)
|
||||
/* 0D2C78 800D2078 8FAE002C */ lw $t6, 0x2c($sp)
|
||||
/* 0D2C7C 800D207C 8C8478C0 */ lw $a0, %lo(__osDiskHandle)($a0)
|
||||
/* 0D2C80 800D2080 8DCF0008 */ lw $t7, 8($t6)
|
||||
/* 0D2C84 800D2084 8DC70000 */ lw $a3, ($t6)
|
||||
/* 0D2C88 800D2088 0C034C24 */ jal osEPiRawStartDma
|
||||
/* 0D2C8C 800D208C AFAF0010 */ sw $t7, 0x10($sp)
|
||||
/* 0D2C90 800D2090 100000E3 */ b .L800D2420
|
||||
/* 0D2C94 800D2094 24020001 */ li $v0, 1
|
||||
.L800D2098:
|
||||
/* 0D2C98 800D2098 8FB90030 */ lw $t9, 0x30($sp)
|
||||
/* 0D2C9C 800D209C 8F380000 */ lw $t8, ($t9)
|
||||
/* 0D2CA0 800D20A0 170000DA */ bnez $t8, .L800D240C
|
||||
/* 0D2CA4 800D20A4 00000000 */ nop
|
||||
/* 0D2CA8 800D20A8 97290004 */ lhu $t1, 4($t9)
|
||||
/* 0D2CAC 800D20AC 24010003 */ li $at, 3
|
||||
/* 0D2CB0 800D20B0 15210017 */ bne $t1, $at, .L800D2110
|
||||
/* 0D2CB4 800D20B4 00000000 */ nop
|
||||
/* 0D2CB8 800D20B8 8FA8002C */ lw $t0, 0x2c($sp)
|
||||
/* 0D2CBC 800D20BC 8F2A0008 */ lw $t2, 8($t9)
|
||||
/* 0D2CC0 800D20C0 8D0B000C */ lw $t3, 0xc($t0)
|
||||
/* 0D2CC4 800D20C4 256D0011 */ addiu $t5, $t3, 0x11
|
||||
/* 0D2CC8 800D20C8 01AA082A */ slt $at, $t5, $t2
|
||||
/* 0D2CCC 800D20CC 10200005 */ beqz $at, .L800D20E4
|
||||
/* 0D2CD0 800D20D0 00000000 */ nop
|
||||
/* 0D2CD4 800D20D4 0C03490C */ jal __osLeoAbnormalResume
|
||||
/* 0D2CD8 800D20D8 AF200010 */ sw $zero, 0x10($t9)
|
||||
/* 0D2CDC 800D20DC 100000D0 */ b .L800D2420
|
||||
/* 0D2CE0 800D20E0 24020001 */ li $v0, 1
|
||||
.L800D20E4:
|
||||
/* 0D2CE4 800D20E4 8FAC003C */ lw $t4, 0x3c($sp)
|
||||
/* 0D2CE8 800D20E8 3C014000 */ lui $at, 0x4000
|
||||
/* 0D2CEC 800D20EC 01817024 */ and $t6, $t4, $at
|
||||
/* 0D2CF0 800D20F0 15C0000C */ bnez $t6, .L800D2124
|
||||
/* 0D2CF4 800D20F4 00000000 */ nop
|
||||
/* 0D2CF8 800D20F8 8FB80030 */ lw $t8, 0x30($sp)
|
||||
/* 0D2CFC 800D20FC 240F0011 */ li $t7, 17
|
||||
/* 0D2D00 800D2100 0C03490C */ jal __osLeoAbnormalResume
|
||||
/* 0D2D04 800D2104 AF0F0010 */ sw $t7, 0x10($t8)
|
||||
/* 0D2D08 800D2108 100000C5 */ b .L800D2420
|
||||
/* 0D2D0C 800D210C 24020001 */ li $v0, 1
|
||||
.L800D2110:
|
||||
/* 0D2D10 800D2110 8FA9002C */ lw $t1, 0x2c($sp)
|
||||
/* 0D2D14 800D2114 8D280000 */ lw $t0, ($t1)
|
||||
/* 0D2D18 800D2118 8D2B0008 */ lw $t3, 8($t1)
|
||||
/* 0D2D1C 800D211C 010B5021 */ addu $t2, $t0, $t3
|
||||
/* 0D2D20 800D2120 AD2A0000 */ sw $t2, ($t1)
|
||||
.L800D2124:
|
||||
/* 0D2D24 800D2124 3C0DA500 */ lui $t5, %hi(D_A5000510) # $t5, 0xa500
|
||||
/* 0D2D28 800D2128 8DB90510 */ lw $t9, %lo(D_A5000510)($t5)
|
||||
/* 0D2D2C 800D212C 3C010020 */ lui $at, 0x20
|
||||
/* 0D2D30 800D2130 AFB90034 */ sw $t9, 0x34($sp)
|
||||
/* 0D2D34 800D2134 8FAC0034 */ lw $t4, 0x34($sp)
|
||||
/* 0D2D38 800D2138 01817024 */ and $t6, $t4, $at
|
||||
/* 0D2D3C 800D213C 11C00004 */ beqz $t6, .L800D2150
|
||||
/* 0D2D40 800D2140 3C010040 */ lui $at, 0x40
|
||||
/* 0D2D44 800D2144 01817824 */ and $t7, $t4, $at
|
||||
/* 0D2D48 800D2148 15E00006 */ bnez $t7, .L800D2164
|
||||
/* 0D2D4C 800D214C 00000000 */ nop
|
||||
.L800D2150:
|
||||
/* 0D2D50 800D2150 8FB80034 */ lw $t8, 0x34($sp)
|
||||
/* 0D2D54 800D2154 3C010200 */ lui $at, 0x200
|
||||
/* 0D2D58 800D2158 03014024 */ and $t0, $t8, $at
|
||||
/* 0D2D5C 800D215C 11000022 */ beqz $t0, .L800D21E8
|
||||
/* 0D2D60 800D2160 00000000 */ nop
|
||||
.L800D2164:
|
||||
/* 0D2D64 800D2164 8FAB002C */ lw $t3, 0x2c($sp)
|
||||
/* 0D2D68 800D2168 8D6A000C */ lw $t2, 0xc($t3)
|
||||
/* 0D2D6C 800D216C 2D410004 */ sltiu $at, $t2, 4
|
||||
/* 0D2D70 800D2170 14200010 */ bnez $at, .L800D21B4
|
||||
/* 0D2D74 800D2174 00000000 */ nop
|
||||
/* 0D2D78 800D2178 8FA90030 */ lw $t1, 0x30($sp)
|
||||
/* 0D2D7C 800D217C 24010003 */ li $at, 3
|
||||
/* 0D2D80 800D2180 952D0004 */ lhu $t5, 4($t1)
|
||||
/* 0D2D84 800D2184 15A10005 */ bne $t5, $at, .L800D219C
|
||||
/* 0D2D88 800D2188 00000000 */ nop
|
||||
/* 0D2D8C 800D218C 8D390008 */ lw $t9, 8($t1)
|
||||
/* 0D2D90 800D2190 2B210053 */ slti $at, $t9, 0x53
|
||||
/* 0D2D94 800D2194 14200010 */ bnez $at, .L800D21D8
|
||||
/* 0D2D98 800D2198 00000000 */ nop
|
||||
.L800D219C:
|
||||
/* 0D2D9C 800D219C 8FAC0030 */ lw $t4, 0x30($sp)
|
||||
/* 0D2DA0 800D21A0 240E0011 */ li $t6, 17
|
||||
/* 0D2DA4 800D21A4 0C03490C */ jal __osLeoAbnormalResume
|
||||
/* 0D2DA8 800D21A8 AD8E0010 */ sw $t6, 0x10($t4)
|
||||
/* 0D2DAC 800D21AC 1000009C */ b .L800D2420
|
||||
/* 0D2DB0 800D21B0 24020001 */ li $v0, 1
|
||||
.L800D21B4:
|
||||
/* 0D2DB4 800D21B4 8FAF002C */ lw $t7, 0x2c($sp)
|
||||
/* 0D2DB8 800D21B8 8FA80030 */ lw $t0, 0x30($sp)
|
||||
/* 0D2DBC 800D21BC 8DF8000C */ lw $t8, 0xc($t7)
|
||||
/* 0D2DC0 800D21C0 AFB80028 */ sw $t8, 0x28($sp)
|
||||
/* 0D2DC4 800D21C4 8D0B0008 */ lw $t3, 8($t0)
|
||||
/* 0D2DC8 800D21C8 00186880 */ sll $t5, $t8, 2
|
||||
/* 0D2DCC 800D21CC 01ED4821 */ addu $t1, $t7, $t5
|
||||
/* 0D2DD0 800D21D0 256A0001 */ addiu $t2, $t3, 1
|
||||
/* 0D2DD4 800D21D4 AD2A0010 */ sw $t2, 0x10($t1)
|
||||
.L800D21D8:
|
||||
/* 0D2DD8 800D21D8 8FB9002C */ lw $t9, 0x2c($sp)
|
||||
/* 0D2DDC 800D21DC 8F2E000C */ lw $t6, 0xc($t9)
|
||||
/* 0D2DE0 800D21E0 25CC0001 */ addiu $t4, $t6, 1
|
||||
/* 0D2DE4 800D21E4 AF2C000C */ sw $t4, 0xc($t9)
|
||||
.L800D21E8:
|
||||
/* 0D2DE8 800D21E8 8FA8003C */ lw $t0, 0x3c($sp)
|
||||
/* 0D2DEC 800D21EC 3C011000 */ lui $at, 0x1000
|
||||
/* 0D2DF0 800D21F0 01015824 */ and $t3, $t0, $at
|
||||
/* 0D2DF4 800D21F4 11600034 */ beqz $t3, .L800D22C8
|
||||
/* 0D2DF8 800D21F8 00000000 */ nop
|
||||
/* 0D2DFC 800D21FC 8FB80030 */ lw $t8, 0x30($sp)
|
||||
/* 0D2E00 800D2200 24010057 */ li $at, 87
|
||||
/* 0D2E04 800D2204 8F0F0008 */ lw $t7, 8($t8)
|
||||
/* 0D2E08 800D2208 11E10004 */ beq $t7, $at, .L800D221C
|
||||
/* 0D2E0C 800D220C 00000000 */ nop
|
||||
/* 0D2E10 800D2210 240D0006 */ li $t5, 6
|
||||
/* 0D2E14 800D2214 0C03490C */ jal __osLeoAbnormalResume
|
||||
/* 0D2E18 800D2218 AF0D0010 */ sw $t5, 0x10($t8)
|
||||
.L800D221C:
|
||||
/* 0D2E1C 800D221C 8FAA0030 */ lw $t2, 0x30($sp)
|
||||
/* 0D2E20 800D2220 24010002 */ li $at, 2
|
||||
/* 0D2E24 800D2224 95490004 */ lhu $t1, 4($t2)
|
||||
/* 0D2E28 800D2228 1521000F */ bne $t1, $at, .L800D2268
|
||||
/* 0D2E2C 800D222C 00000000 */ nop
|
||||
/* 0D2E30 800D2230 954E0006 */ lhu $t6, 6($t2)
|
||||
/* 0D2E34 800D2234 15C0000C */ bnez $t6, .L800D2268
|
||||
/* 0D2E38 800D2238 00000000 */ nop
|
||||
/* 0D2E3C 800D223C 240C0001 */ li $t4, 1
|
||||
/* 0D2E40 800D2240 A54C0006 */ sh $t4, 6($t2)
|
||||
/* 0D2E44 800D2244 8FA80030 */ lw $t0, 0x30($sp)
|
||||
/* 0D2E48 800D2248 2419FFFF */ li $t9, -1
|
||||
/* 0D2E4C 800D224C AD190008 */ sw $t9, 8($t0)
|
||||
/* 0D2E50 800D2250 8FAB0030 */ lw $t3, 0x30($sp)
|
||||
/* 0D2E54 800D2254 8D6F003C */ lw $t7, 0x3c($t3)
|
||||
/* 0D2E58 800D2258 8D6D0044 */ lw $t5, 0x44($t3)
|
||||
/* 0D2E5C 800D225C 01EDC023 */ subu $t8, $t7, $t5
|
||||
/* 0D2E60 800D2260 1000000B */ b .L800D2290
|
||||
/* 0D2E64 800D2264 AD78003C */ sw $t8, 0x3c($t3)
|
||||
.L800D2268:
|
||||
/* 0D2E68 800D2268 24090002 */ li $t1, 2
|
||||
/* 0D2E6C 800D226C 3C0EA460 */ lui $t6, %hi(D_A4600010) # $t6, 0xa460
|
||||
/* 0D2E70 800D2270 ADC90010 */ sw $t1, %lo(D_A4600010)($t6)
|
||||
/* 0D2E74 800D2274 3C0C800F */ lui $t4, %hi(__OSGlobalIntMask) # $t4, 0x800f
|
||||
/* 0D2E78 800D2278 8D8CA5EC */ lw $t4, %lo(__OSGlobalIntMask)($t4)
|
||||
/* 0D2E7C 800D227C 3C010010 */ lui $at, (0x00100401 >> 16) # lui $at, 0x10
|
||||
/* 0D2E80 800D2280 34210401 */ ori $at, (0x00100401 & 0xFFFF) # ori $at, $at, 0x401
|
||||
/* 0D2E84 800D2284 01815025 */ or $t2, $t4, $at
|
||||
/* 0D2E88 800D2288 3C01800F */ lui $at, %hi(__OSGlobalIntMask) # $at, 0x800f
|
||||
/* 0D2E8C 800D228C AC2AA5EC */ sw $t2, %lo(__OSGlobalIntMask)($at)
|
||||
.L800D2290:
|
||||
/* 0D2E90 800D2290 8FB9002C */ lw $t9, 0x2c($sp)
|
||||
/* 0D2E94 800D2294 3C048019 */ lui $a0, %hi(__osDiskHandle) # $a0, 0x8019
|
||||
/* 0D2E98 800D2298 8C8478C0 */ lw $a0, %lo(__osDiskHandle)($a0)
|
||||
/* 0D2E9C 800D229C 8F280008 */ lw $t0, 8($t9)
|
||||
/* 0D2EA0 800D22A0 8F270004 */ lw $a3, 4($t9)
|
||||
/* 0D2EA4 800D22A4 00002825 */ move $a1, $zero
|
||||
/* 0D2EA8 800D22A8 00087880 */ sll $t7, $t0, 2
|
||||
/* 0D2EAC 800D22AC AFAF0010 */ sw $t7, 0x10($sp)
|
||||
/* 0D2EB0 800D22B0 0C034C24 */ jal osEPiRawStartDma
|
||||
/* 0D2EB4 800D22B4 3C060500 */ lui $a2, 0x500
|
||||
/* 0D2EB8 800D22B8 8FAD0030 */ lw $t5, 0x30($sp)
|
||||
/* 0D2EBC 800D22BC 24020001 */ li $v0, 1
|
||||
/* 0D2EC0 800D22C0 10000057 */ b .L800D2420
|
||||
/* 0D2EC4 800D22C4 ADA00010 */ sw $zero, 0x10($t5)
|
||||
.L800D22C8:
|
||||
/* 0D2EC8 800D22C8 8FB80030 */ lw $t8, 0x30($sp)
|
||||
/* 0D2ECC 800D22CC 2401FFFF */ li $at, -1
|
||||
/* 0D2ED0 800D22D0 8F0B0008 */ lw $t3, 8($t8)
|
||||
/* 0D2ED4 800D22D4 15610020 */ bne $t3, $at, .L800D2358
|
||||
/* 0D2ED8 800D22D8 00000000 */ nop
|
||||
/* 0D2EDC 800D22DC 97090004 */ lhu $t1, 4($t8)
|
||||
/* 0D2EE0 800D22E0 24010002 */ li $at, 2
|
||||
/* 0D2EE4 800D22E4 1521001C */ bne $t1, $at, .L800D2358
|
||||
/* 0D2EE8 800D22E8 00000000 */ nop
|
||||
/* 0D2EEC 800D22EC 970E0006 */ lhu $t6, 6($t8)
|
||||
/* 0D2EF0 800D22F0 24010001 */ li $at, 1
|
||||
/* 0D2EF4 800D22F4 15C10018 */ bne $t6, $at, .L800D2358
|
||||
/* 0D2EF8 800D22F8 00000000 */ nop
|
||||
/* 0D2EFC 800D22FC 270C001C */ addiu $t4, $t8, 0x1c
|
||||
/* 0D2F00 800D2300 AFAC0024 */ sw $t4, 0x24($sp)
|
||||
/* 0D2F04 800D2304 8F0A0028 */ lw $t2, 0x28($t8)
|
||||
/* 0D2F08 800D2308 15400010 */ bnez $t2, .L800D234C
|
||||
/* 0D2F0C 800D230C 00000000 */ nop
|
||||
/* 0D2F10 800D2310 8F190020 */ lw $t9, 0x20($t8)
|
||||
/* 0D2F14 800D2314 8F280000 */ lw $t0, ($t9)
|
||||
/* 0D2F18 800D2318 8F2F0004 */ lw $t7, 4($t9)
|
||||
/* 0D2F1C 800D231C 8F2B0008 */ lw $t3, 8($t9)
|
||||
/* 0D2F20 800D2320 8F2E000C */ lw $t6, 0xc($t9)
|
||||
/* 0D2F24 800D2324 010F6825 */ or $t5, $t0, $t7
|
||||
/* 0D2F28 800D2328 01AB4825 */ or $t1, $t5, $t3
|
||||
/* 0D2F2C 800D232C 01C96025 */ or $t4, $t6, $t1
|
||||
/* 0D2F30 800D2330 11800006 */ beqz $t4, .L800D234C
|
||||
/* 0D2F34 800D2334 00000000 */ nop
|
||||
/* 0D2F38 800D2338 240A0006 */ li $t2, 6
|
||||
/* 0D2F3C 800D233C 0C03490C */ jal __osLeoAbnormalResume
|
||||
/* 0D2F40 800D2340 AF0A0010 */ sw $t2, 0x10($t8)
|
||||
/* 0D2F44 800D2344 10000036 */ b .L800D2420
|
||||
/* 0D2F48 800D2348 24020001 */ li $v0, 1
|
||||
.L800D234C:
|
||||
/* 0D2F4C 800D234C 8FA80030 */ lw $t0, 0x30($sp)
|
||||
/* 0D2F50 800D2350 0C034946 */ jal __osLeoResume
|
||||
/* 0D2F54 800D2354 AD000010 */ sw $zero, 0x10($t0)
|
||||
.L800D2358:
|
||||
/* 0D2F58 800D2358 8FAF0030 */ lw $t7, 0x30($sp)
|
||||
/* 0D2F5C 800D235C 3C014000 */ lui $at, 0x4000
|
||||
/* 0D2F60 800D2360 8DED0008 */ lw $t5, 8($t7)
|
||||
/* 0D2F64 800D2364 25AB0001 */ addiu $t3, $t5, 1
|
||||
/* 0D2F68 800D2368 ADEB0008 */ sw $t3, 8($t7)
|
||||
/* 0D2F6C 800D236C 8FB9003C */ lw $t9, 0x3c($sp)
|
||||
/* 0D2F70 800D2370 03217024 */ and $t6, $t9, $at
|
||||
/* 0D2F74 800D2374 11C00019 */ beqz $t6, .L800D23DC
|
||||
/* 0D2F78 800D2378 00000000 */ nop
|
||||
/* 0D2F7C 800D237C 8FA90030 */ lw $t1, 0x30($sp)
|
||||
/* 0D2F80 800D2380 8D2C0008 */ lw $t4, 8($t1)
|
||||
/* 0D2F84 800D2384 29810055 */ slti $at, $t4, 0x55
|
||||
/* 0D2F88 800D2388 14200006 */ bnez $at, .L800D23A4
|
||||
/* 0D2F8C 800D238C 00000000 */ nop
|
||||
/* 0D2F90 800D2390 240A0006 */ li $t2, 6
|
||||
/* 0D2F94 800D2394 0C03490C */ jal __osLeoAbnormalResume
|
||||
/* 0D2F98 800D2398 AD2A0010 */ sw $t2, 0x10($t1)
|
||||
/* 0D2F9C 800D239C 10000020 */ b .L800D2420
|
||||
/* 0D2FA0 800D23A0 24020001 */ li $v0, 1
|
||||
.L800D23A4:
|
||||
/* 0D2FA4 800D23A4 8FB8002C */ lw $t8, 0x2c($sp)
|
||||
/* 0D2FA8 800D23A8 3C048019 */ lui $a0, %hi(__osDiskHandle) # $a0, 0x8019
|
||||
/* 0D2FAC 800D23AC 3C060500 */ lui $a2, (0x05000400 >> 16) # lui $a2, 0x500
|
||||
/* 0D2FB0 800D23B0 8F080008 */ lw $t0, 8($t8)
|
||||
/* 0D2FB4 800D23B4 8F070000 */ lw $a3, ($t8)
|
||||
/* 0D2FB8 800D23B8 34C60400 */ ori $a2, (0x05000400 & 0xFFFF) # ori $a2, $a2, 0x400
|
||||
/* 0D2FBC 800D23BC 8C8478C0 */ lw $a0, %lo(__osDiskHandle)($a0)
|
||||
/* 0D2FC0 800D23C0 00002825 */ move $a1, $zero
|
||||
/* 0D2FC4 800D23C4 0C034C24 */ jal osEPiRawStartDma
|
||||
/* 0D2FC8 800D23C8 AFA80010 */ sw $t0, 0x10($sp)
|
||||
/* 0D2FCC 800D23CC 8FAD0030 */ lw $t5, 0x30($sp)
|
||||
/* 0D2FD0 800D23D0 24020001 */ li $v0, 1
|
||||
/* 0D2FD4 800D23D4 10000012 */ b .L800D2420
|
||||
/* 0D2FD8 800D23D8 ADA00010 */ sw $zero, 0x10($t5)
|
||||
.L800D23DC:
|
||||
/* 0D2FDC 800D23DC 8FAB0030 */ lw $t3, 0x30($sp)
|
||||
/* 0D2FE0 800D23E0 8D6F0008 */ lw $t7, 8($t3)
|
||||
/* 0D2FE4 800D23E4 29E10055 */ slti $at, $t7, 0x55
|
||||
/* 0D2FE8 800D23E8 10200006 */ beqz $at, .L800D2404
|
||||
/* 0D2FEC 800D23EC 00000000 */ nop
|
||||
/* 0D2FF0 800D23F0 24190006 */ li $t9, 6
|
||||
/* 0D2FF4 800D23F4 0C03490C */ jal __osLeoAbnormalResume
|
||||
/* 0D2FF8 800D23F8 AD790010 */ sw $t9, 0x10($t3)
|
||||
/* 0D2FFC 800D23FC 10000008 */ b .L800D2420
|
||||
/* 0D3000 800D2400 24020001 */ li $v0, 1
|
||||
.L800D2404:
|
||||
/* 0D3004 800D2404 10000006 */ b .L800D2420
|
||||
/* 0D3008 800D2408 24020001 */ li $v0, 1
|
||||
.L800D240C:
|
||||
/* 0D300C 800D240C 8FAC0030 */ lw $t4, 0x30($sp)
|
||||
/* 0D3010 800D2410 240E004B */ li $t6, 75
|
||||
/* 0D3014 800D2414 0C03490C */ jal __osLeoAbnormalResume
|
||||
/* 0D3018 800D2418 AD8E0010 */ sw $t6, 0x10($t4)
|
||||
/* 0D301C 800D241C 24020001 */ li $v0, 1
|
||||
.L800D2420:
|
||||
/* 0D3020 800D2420 8FBF001C */ lw $ra, 0x1c($sp)
|
||||
/* 0D3024 800D2424 27BD0040 */ addiu $sp, $sp, 0x40
|
||||
/* 0D3028 800D2428 03E00008 */ jr $ra
|
||||
/* 0D302C 800D242C 00000000 */ nop
|
||||
|
||||
glabel __osLeoAbnormalResume
|
||||
/* 0D3030 800D2430 3C0E8019 */ lui $t6, %hi(__osDiskHandle) # $t6, 0x8019
|
||||
/* 0D3034 800D2434 8DCE78C0 */ lw $t6, %lo(__osDiskHandle)($t6)
|
||||
/* 0D3038 800D2438 27BDFFE0 */ addiu $sp, $sp, -0x20
|
||||
/* 0D303C 800D243C AFBF0014 */ sw $ra, 0x14($sp)
|
||||
/* 0D3040 800D2440 25CF0014 */ addiu $t7, $t6, 0x14
|
||||
/* 0D3044 800D2444 AFAF001C */ sw $t7, 0x1c($sp)
|
||||
/* 0D3048 800D2448 3C18A460 */ lui $t8, %hi(D_A4600010) # $t8, 0xa460
|
||||
/* 0D304C 800D244C 8F190010 */ lw $t9, %lo(D_A4600010)($t8)
|
||||
/* 0D3050 800D2450 AFB90018 */ sw $t9, 0x18($sp)
|
||||
/* 0D3054 800D2454 8FA80018 */ lw $t0, 0x18($sp)
|
||||
/* 0D3058 800D2458 31090002 */ andi $t1, $t0, 2
|
||||
/* 0D305C 800D245C 11200008 */ beqz $t1, .L800D2480
|
||||
/* 0D3060 800D2460 00000000 */ nop
|
||||
.L800D2464:
|
||||
/* 0D3064 800D2464 3C0AA460 */ lui $t2, %hi(D_A4600010) # $t2, 0xa460
|
||||
/* 0D3068 800D2468 8D4B0010 */ lw $t3, %lo(D_A4600010)($t2)
|
||||
/* 0D306C 800D246C AFAB0018 */ sw $t3, 0x18($sp)
|
||||
/* 0D3070 800D2470 8FAC0018 */ lw $t4, 0x18($sp)
|
||||
/* 0D3074 800D2474 318D0002 */ andi $t5, $t4, 2
|
||||
/* 0D3078 800D2478 15A0FFFA */ bnez $t5, .L800D2464
|
||||
/* 0D307C 800D247C 00000000 */ nop
|
||||
.L800D2480:
|
||||
/* 0D3080 800D2480 8FAE001C */ lw $t6, 0x1c($sp)
|
||||
/* 0D3084 800D2484 3C011000 */ lui $at, 0x1000
|
||||
/* 0D3088 800D2488 3C19A500 */ lui $t9, %hi(D_A5000510) # $t9, 0xa500
|
||||
/* 0D308C 800D248C 8DCF0014 */ lw $t7, 0x14($t6)
|
||||
/* 0D3090 800D2490 3C08A460 */ lui $t0, %hi(D_A4600010) # $t0, 0xa460
|
||||
/* 0D3094 800D2494 01E1C025 */ or $t8, $t7, $at
|
||||
/* 0D3098 800D2498 AF380510 */ sw $t8, %lo(D_A5000510)($t9)
|
||||
/* 0D309C 800D249C 8D090010 */ lw $t1, %lo(D_A4600010)($t0)
|
||||
/* 0D30A0 800D24A0 AFA90018 */ sw $t1, 0x18($sp)
|
||||
/* 0D30A4 800D24A4 8FAA0018 */ lw $t2, 0x18($sp)
|
||||
/* 0D30A8 800D24A8 314B0002 */ andi $t3, $t2, 2
|
||||
/* 0D30AC 800D24AC 11600008 */ beqz $t3, .L800D24D0
|
||||
/* 0D30B0 800D24B0 00000000 */ nop
|
||||
.L800D24B4:
|
||||
/* 0D30B4 800D24B4 3C0CA460 */ lui $t4, %hi(D_A4600010) # $t4, 0xa460
|
||||
/* 0D30B8 800D24B8 8D8D0010 */ lw $t5, %lo(D_A4600010)($t4)
|
||||
/* 0D30BC 800D24BC AFAD0018 */ sw $t5, 0x18($sp)
|
||||
/* 0D30C0 800D24C0 8FAE0018 */ lw $t6, 0x18($sp)
|
||||
/* 0D30C4 800D24C4 31CF0002 */ andi $t7, $t6, 2
|
||||
/* 0D30C8 800D24C8 15E0FFFA */ bnez $t7, .L800D24B4
|
||||
/* 0D30CC 800D24CC 00000000 */ nop
|
||||
.L800D24D0:
|
||||
/* 0D30D0 800D24D0 8FB8001C */ lw $t8, 0x1c($sp)
|
||||
/* 0D30D4 800D24D4 3C08A500 */ lui $t0, %hi(D_A5000510) # $t0, 0xa500
|
||||
/* 0D30D8 800D24D8 8F190014 */ lw $t9, 0x14($t8)
|
||||
/* 0D30DC 800D24DC 0C034946 */ jal __osLeoResume
|
||||
/* 0D30E0 800D24E0 AD190510 */ sw $t9, %lo(D_A5000510)($t0)
|
||||
/* 0D30E4 800D24E4 24090002 */ li $t1, 2
|
||||
/* 0D30E8 800D24E8 3C0AA460 */ lui $t2, %hi(D_A4600010) # $t2, 0xa460
|
||||
/* 0D30EC 800D24EC AD490010 */ sw $t1, %lo(D_A4600010)($t2)
|
||||
/* 0D30F0 800D24F0 3C0B800F */ lui $t3, %hi(__OSGlobalIntMask) # $t3, 0x800f
|
||||
/* 0D30F4 800D24F4 8D6BA5EC */ lw $t3, %lo(__OSGlobalIntMask)($t3)
|
||||
/* 0D30F8 800D24F8 3C010010 */ lui $at, (0x00100401 >> 16) # lui $at, 0x10
|
||||
/* 0D30FC 800D24FC 8FBF0014 */ lw $ra, 0x14($sp)
|
||||
/* 0D3100 800D2500 34210401 */ ori $at, (0x00100401 & 0xFFFF) # ori $at, $at, 0x401
|
||||
/* 0D3104 800D2504 01616025 */ or $t4, $t3, $at
|
||||
/* 0D3108 800D2508 3C01800F */ lui $at, %hi(__OSGlobalIntMask) # $at, 0x800f
|
||||
/* 0D310C 800D250C AC2CA5EC */ sw $t4, %lo(__OSGlobalIntMask)($at)
|
||||
/* 0D3110 800D2510 03E00008 */ jr $ra
|
||||
/* 0D3114 800D2514 27BD0020 */ addiu $sp, $sp, 0x20
|
||||
|
||||
glabel __osLeoResume
|
||||
/* 0D3118 800D2518 27BDFFD0 */ addiu $sp, $sp, -0x30
|
||||
/* 0D311C 800D251C 3C0E8019 */ lui $t6, %hi(__osEventStateTab) # $t6, 0x8019
|
||||
/* 0D3120 800D2520 25CE6440 */ addiu $t6, %lo(__osEventStateTab) # addiu $t6, $t6, 0x6440
|
||||
/* 0D3124 800D2524 25CF0040 */ addiu $t7, $t6, 0x40
|
||||
/* 0D3128 800D2528 AFBF001C */ sw $ra, 0x1c($sp)
|
||||
/* 0D312C 800D252C AFB00018 */ sw $s0, 0x18($sp)
|
||||
/* 0D3130 800D2530 AFAF002C */ sw $t7, 0x2c($sp)
|
||||
/* 0D3134 800D2534 8DD80040 */ lw $t8, 0x40($t6)
|
||||
/* 0D3138 800D2538 1300002D */ beqz $t8, .L800D25F0
|
||||
/* 0D313C 800D253C AFB80028 */ sw $t8, 0x28($sp)
|
||||
/* 0D3140 800D2540 8F190008 */ lw $t9, 8($t8)
|
||||
/* 0D3144 800D2544 8F080010 */ lw $t0, 0x10($t8)
|
||||
/* 0D3148 800D2548 0328082A */ slt $at, $t9, $t0
|
||||
/* 0D314C 800D254C 10200028 */ beqz $at, .L800D25F0
|
||||
/* 0D3150 800D2550 00000000 */ nop
|
||||
/* 0D3154 800D2554 8FA90028 */ lw $t1, 0x28($sp)
|
||||
/* 0D3158 800D2558 8FAE002C */ lw $t6, 0x2c($sp)
|
||||
/* 0D315C 800D255C 8D2A000C */ lw $t2, 0xc($t1)
|
||||
/* 0D3160 800D2560 8D2B0008 */ lw $t3, 8($t1)
|
||||
/* 0D3164 800D2564 8D2D0010 */ lw $t5, 0x10($t1)
|
||||
/* 0D3168 800D2568 014B6021 */ addu $t4, $t2, $t3
|
||||
/* 0D316C 800D256C 018D001A */ div $zero, $t4, $t5
|
||||
/* 0D3170 800D2570 00007810 */ mfhi $t7
|
||||
/* 0D3174 800D2574 AFAF0024 */ sw $t7, 0x24($sp)
|
||||
/* 0D3178 800D2578 8D280014 */ lw $t0, 0x14($t1)
|
||||
/* 0D317C 800D257C 8DD80004 */ lw $t8, 4($t6)
|
||||
/* 0D3180 800D2580 000FC880 */ sll $t9, $t7, 2
|
||||
/* 0D3184 800D2584 01195021 */ addu $t2, $t0, $t9
|
||||
/* 0D3188 800D2588 AD580000 */ sw $t8, ($t2)
|
||||
/* 0D318C 800D258C 8FAB0028 */ lw $t3, 0x28($sp)
|
||||
/* 0D3190 800D2590 15A00002 */ bnez $t5, .L800D259C
|
||||
/* 0D3194 800D2594 00000000 */ nop
|
||||
/* 0D3198 800D2598 0007000D */ break 7
|
||||
.L800D259C:
|
||||
/* 0D319C 800D259C 2401FFFF */ li $at, -1
|
||||
/* 0D31A0 800D25A0 15A10004 */ bne $t5, $at, .L800D25B4
|
||||
/* 0D31A4 800D25A4 3C018000 */ lui $at, 0x8000
|
||||
/* 0D31A8 800D25A8 15810002 */ bne $t4, $at, .L800D25B4
|
||||
/* 0D31AC 800D25AC 00000000 */ nop
|
||||
/* 0D31B0 800D25B0 0006000D */ break 6
|
||||
.L800D25B4:
|
||||
/* 0D31B4 800D25B4 8D6C0008 */ lw $t4, 8($t3)
|
||||
/* 0D31B8 800D25B8 258D0001 */ addiu $t5, $t4, 1
|
||||
/* 0D31BC 800D25BC AD6D0008 */ sw $t5, 8($t3)
|
||||
/* 0D31C0 800D25C0 8FAE0028 */ lw $t6, 0x28($sp)
|
||||
/* 0D31C4 800D25C4 8DCF0000 */ lw $t7, ($t6)
|
||||
/* 0D31C8 800D25C8 8DE90000 */ lw $t1, ($t7)
|
||||
/* 0D31CC 800D25CC 11200008 */ beqz $t1, .L800D25F0
|
||||
/* 0D31D0 800D25D0 00000000 */ nop
|
||||
/* 0D31D4 800D25D4 0C034645 */ jal __osPopThread
|
||||
/* 0D31D8 800D25D8 01C02025 */ move $a0, $t6
|
||||
/* 0D31DC 800D25DC 00408025 */ move $s0, $v0
|
||||
/* 0D31E0 800D25E0 3C04800F */ lui $a0, %hi(__osRunQueue) # $a0, 0x800f
|
||||
/* 0D31E4 800D25E4 2484B3A8 */ addiu $a0, %lo(__osRunQueue) # addiu $a0, $a0, -0x4c58
|
||||
/* 0D31E8 800D25E8 0C034633 */ jal __osEnqueueThread
|
||||
/* 0D31EC 800D25EC 02002825 */ move $a1, $s0
|
||||
.L800D25F0:
|
||||
/* 0D31F0 800D25F0 8FBF001C */ lw $ra, 0x1c($sp)
|
||||
/* 0D31F4 800D25F4 8FB00018 */ lw $s0, 0x18($sp)
|
||||
/* 0D31F8 800D25F8 27BD0030 */ addiu $sp, $sp, 0x30
|
||||
/* 0D31FC 800D25FC 03E00008 */ jr $ra
|
||||
/* 0D3200 800D2600 00000000 */ nop
|
||||
|
||||
/* 0D3204 800D2604 00000000 */ nop
|
||||
/* 0D3208 800D2608 00000000 */ nop
|
||||
/* 0D320C 800D260C 00000000 */ nop
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel __osProbeTLB
|
||||
mfc0 $t0, $10
|
||||
andi $t1, $t0, 0xff
|
||||
li $at, -8192
|
||||
and $t2, $a0, $at
|
||||
or $t1, $t1, $t2
|
||||
mtc0 $t1, $10
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
tlbp
|
||||
nop
|
||||
nop
|
||||
mfc0 $t3, $0
|
||||
lui $at, 0x8000
|
||||
and $t3, $t3, $at
|
||||
bnez $t3, .L8032A0D8
|
||||
nop
|
||||
tlbr
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
mfc0 $t3, $5
|
||||
addi $t3, $t3, 0x2000
|
||||
srl $t3, $t3, 1
|
||||
and $t4, $t3, $a0
|
||||
bnez $t4, .L8032A0A8
|
||||
addi $t3, $t3, -1
|
||||
mfc0 $v0, $2
|
||||
b .L8032A0AC
|
||||
nop
|
||||
.L8032A0A8:
|
||||
mfc0 $v0, $3
|
||||
.L8032A0AC:
|
||||
andi $t5, $v0, 2
|
||||
beqz $t5, .L8032A0D8
|
||||
nop
|
||||
lui $at, (0x3FFFFFC0 >> 16) # lui $at, 0x3fff
|
||||
ori $at, (0x3FFFFFC0 & 0xFFFF) # ori $at, $at, 0xffc0
|
||||
and $v0, $v0, $at
|
||||
sll $v0, $v0, 6
|
||||
and $t5, $a0, $t3
|
||||
add $v0, $v0, $t5
|
||||
b .L8032A0DC
|
||||
nop
|
||||
.L8032A0D8:
|
||||
li $v0, -1
|
||||
.L8032A0DC:
|
||||
mtc0 $t0, $10
|
||||
jr $ra
|
||||
nop
|
||||
|
||||
nop
|
||||
nop
|
||||
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel __osRestoreInt
|
||||
mfc0 $t0, $12
|
||||
or $t0, $t0, $a0
|
||||
mtc0 $t0, $12
|
||||
nop
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
|
||||
nop
|
||||
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel __osSetCompare
|
||||
mtc0 $a0, $11
|
||||
jr $ra
|
||||
nop
|
||||
|
||||
nop
|
||||
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel __osSetFpcCsr
|
||||
cfc1 $v0, $31
|
||||
ctc1 $a0, $31
|
||||
jr $ra
|
||||
nop
|
||||
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel __osSetSR
|
||||
mtc0 $a0, $12
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
|
||||
|
|
@ -0,0 +1,232 @@
|
|||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel bcopy
|
||||
beqz $a2, .L80323A4C
|
||||
move $a3, $a1
|
||||
beq $a0, $a1, .L80323A4C
|
||||
slt $at, $a1, $a0
|
||||
bnezl $at, .L80323A14
|
||||
slti $at, $a2, 0x10
|
||||
add $v0, $a0, $a2
|
||||
slt $at, $a1, $v0
|
||||
beql $at, $zero, .L80323A14
|
||||
slti $at, $a2, 0x10
|
||||
b .L80323B78
|
||||
slti $at, $a2, 0x10
|
||||
slti $at, $a2, 0x10
|
||||
.L80323A14:
|
||||
bnez $at, .L80323A2C
|
||||
nop
|
||||
andi $v0, $a0, 3
|
||||
andi $v1, $a1, 3
|
||||
beq $v0, $v1, .L80323A54
|
||||
nop
|
||||
.L80323A2C:
|
||||
beqz $a2, .L80323A4C
|
||||
nop
|
||||
addu $v1, $a0, $a2
|
||||
.L80323A38:
|
||||
lb $v0, ($a0)
|
||||
addiu $a0, $a0, 1
|
||||
addiu $a1, $a1, 1
|
||||
bne $a0, $v1, .L80323A38
|
||||
sb $v0, -1($a1)
|
||||
.L80323A4C:
|
||||
jr $ra
|
||||
move $v0, $a3
|
||||
|
||||
.L80323A54:
|
||||
beqz $v0, .L80323AB8
|
||||
li $at, 1
|
||||
beq $v0, $at, .L80323A9C
|
||||
li $at, 2
|
||||
beql $v0, $at, .L80323A88
|
||||
lh $v0, ($a0)
|
||||
lb $v0, ($a0)
|
||||
addiu $a0, $a0, 1
|
||||
addiu $a1, $a1, 1
|
||||
addiu $a2, $a2, -1
|
||||
b .L80323AB8
|
||||
sb $v0, -1($a1)
|
||||
lh $v0, ($a0)
|
||||
.L80323A88:
|
||||
addiu $a0, $a0, 2
|
||||
addiu $a1, $a1, 2
|
||||
addiu $a2, $a2, -2
|
||||
b .L80323AB8
|
||||
sh $v0, -2($a1)
|
||||
.L80323A9C:
|
||||
lb $v0, ($a0)
|
||||
lh $v1, 1($a0)
|
||||
addiu $a0, $a0, 3
|
||||
addiu $a1, $a1, 3
|
||||
addiu $a2, $a2, -3
|
||||
sb $v0, -3($a1)
|
||||
sh $v1, -2($a1)
|
||||
.L80323AB8:
|
||||
slti $at, $a2, 0x20
|
||||
bnezl $at, .L80323B18
|
||||
slti $at, $a2, 0x10
|
||||
lw $v0, ($a0)
|
||||
lw $v1, 4($a0)
|
||||
lw $t0, 8($a0)
|
||||
lw $t1, 0xc($a0)
|
||||
lw $t2, 0x10($a0)
|
||||
lw $t3, 0x14($a0)
|
||||
lw $t4, 0x18($a0)
|
||||
lw $t5, 0x1c($a0)
|
||||
addiu $a0, $a0, 0x20
|
||||
addiu $a1, $a1, 0x20
|
||||
addiu $a2, $a2, -0x20
|
||||
sw $v0, -0x20($a1)
|
||||
sw $v1, -0x1c($a1)
|
||||
sw $t0, -0x18($a1)
|
||||
sw $t1, -0x14($a1)
|
||||
sw $t2, -0x10($a1)
|
||||
sw $t3, -0xc($a1)
|
||||
sw $t4, -8($a1)
|
||||
b .L80323AB8
|
||||
sw $t5, -4($a1)
|
||||
.L80323B14:
|
||||
slti $at, $a2, 0x10
|
||||
.L80323B18:
|
||||
bnezl $at, .L80323B54
|
||||
slti $at, $a2, 4
|
||||
lw $v0, ($a0)
|
||||
lw $v1, 4($a0)
|
||||
lw $t0, 8($a0)
|
||||
lw $t1, 0xc($a0)
|
||||
addiu $a0, $a0, 0x10
|
||||
addiu $a1, $a1, 0x10
|
||||
addiu $a2, $a2, -0x10
|
||||
sw $v0, -0x10($a1)
|
||||
sw $v1, -0xc($a1)
|
||||
sw $t0, -8($a1)
|
||||
b .L80323B14
|
||||
sw $t1, -4($a1)
|
||||
.L80323B50:
|
||||
slti $at, $a2, 4
|
||||
.L80323B54:
|
||||
bnez $at, .L80323A2C
|
||||
nop
|
||||
lw $v0, ($a0)
|
||||
addiu $a0, $a0, 4
|
||||
addiu $a1, $a1, 4
|
||||
addiu $a2, $a2, -4
|
||||
b .L80323B50
|
||||
sw $v0, -4($a1)
|
||||
slti $at, $a2, 0x10
|
||||
.L80323B78:
|
||||
add $a0, $a0, $a2
|
||||
bnez $at, .L80323B94
|
||||
add $a1, $a1, $a2
|
||||
andi $v0, $a0, 3
|
||||
andi $v1, $a1, 3
|
||||
beq $v0, $v1, .L80323BC4
|
||||
nop
|
||||
.L80323B94:
|
||||
beqz $a2, .L80323A4C
|
||||
nop
|
||||
addiu $a0, $a0, -1
|
||||
addiu $a1, $a1, -1
|
||||
subu $v1, $a0, $a2
|
||||
.L80323BA8:
|
||||
lb $v0, ($a0)
|
||||
addiu $a0, $a0, -1
|
||||
addiu $a1, $a1, -1
|
||||
bne $a0, $v1, .L80323BA8
|
||||
sb $v0, 1($a1)
|
||||
jr $ra
|
||||
move $v0, $a3
|
||||
|
||||
.L80323BC4:
|
||||
beqz $v0, .L80323C28
|
||||
li $at, 3
|
||||
beq $v0, $at, .L80323C0C
|
||||
li $at, 2
|
||||
beql $v0, $at, .L80323BF8
|
||||
lh $v0, -2($a0)
|
||||
lb $v0, -1($a0)
|
||||
addiu $a0, $a0, -1
|
||||
addiu $a1, $a1, -1
|
||||
addiu $a2, $a2, -1
|
||||
b .L80323C28
|
||||
sb $v0, ($a1)
|
||||
lh $v0, -2($a0)
|
||||
.L80323BF8:
|
||||
addiu $a0, $a0, -2
|
||||
addiu $a1, $a1, -2
|
||||
addiu $a2, $a2, -2
|
||||
b .L80323C28
|
||||
sh $v0, ($a1)
|
||||
.L80323C0C:
|
||||
lb $v0, -1($a0)
|
||||
lh $v1, -3($a0)
|
||||
addiu $a0, $a0, -3
|
||||
addiu $a1, $a1, -3
|
||||
addiu $a2, $a2, -3
|
||||
sb $v0, 2($a1)
|
||||
sh $v1, ($a1)
|
||||
.L80323C28:
|
||||
slti $at, $a2, 0x20
|
||||
bnezl $at, .L80323C88
|
||||
slti $at, $a2, 0x10
|
||||
lw $v0, -4($a0)
|
||||
lw $v1, -8($a0)
|
||||
lw $t0, -0xc($a0)
|
||||
lw $t1, -0x10($a0)
|
||||
lw $t2, -0x14($a0)
|
||||
lw $t3, -0x18($a0)
|
||||
lw $t4, -0x1c($a0)
|
||||
lw $t5, -0x20($a0)
|
||||
addiu $a0, $a0, -0x20
|
||||
addiu $a1, $a1, -0x20
|
||||
addiu $a2, $a2, -0x20
|
||||
sw $v0, 0x1c($a1)
|
||||
sw $v1, 0x18($a1)
|
||||
sw $t0, 0x14($a1)
|
||||
sw $t1, 0x10($a1)
|
||||
sw $t2, 0xc($a1)
|
||||
sw $t3, 8($a1)
|
||||
sw $t4, 4($a1)
|
||||
b .L80323C28
|
||||
sw $t5, ($a1)
|
||||
.L80323C84:
|
||||
slti $at, $a2, 0x10
|
||||
.L80323C88:
|
||||
bnezl $at, .L80323CC4
|
||||
slti $at, $a2, 4
|
||||
lw $v0, -4($a0)
|
||||
lw $v1, -8($a0)
|
||||
lw $t0, -0xc($a0)
|
||||
lw $t1, -0x10($a0)
|
||||
addiu $a0, $a0, -0x10
|
||||
addiu $a1, $a1, -0x10
|
||||
addiu $a2, $a2, -0x10
|
||||
sw $v0, 0xc($a1)
|
||||
sw $v1, 8($a1)
|
||||
sw $t0, 4($a1)
|
||||
b .L80323C84
|
||||
sw $t1, ($a1)
|
||||
.L80323CC0:
|
||||
slti $at, $a2, 4
|
||||
.L80323CC4:
|
||||
bnez $at, .L80323B94
|
||||
nop
|
||||
lw $v0, -4($a0)
|
||||
addiu $a0, $a0, -4
|
||||
addiu $a1, $a1, -4
|
||||
addiu $a2, $a2, -4
|
||||
b .L80323CC0
|
||||
sw $v0, ($a1)
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
# handwritten
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
|
||||
glabel bzero
|
||||
/* 0CE660 800CDA60 28A1000C */ slti $at, $a1, 0xc
|
||||
/* 0CE664 800CDA64 1420001D */ bnez $at, .L800CDADC
|
||||
/* 0CE668 800CDA68 00041823 */ negu $v1, $a0
|
||||
/* 0CE66C 800CDA6C 30630003 */ andi $v1, $v1, 3
|
||||
/* 0CE670 800CDA70 10600003 */ beqz $v1, .L800CDA80
|
||||
/* 0CE674 800CDA74 00A32823 */ subu $a1, $a1, $v1
|
||||
/* 0CE678 800CDA78 A8800000 */ swl $zero, ($a0)
|
||||
/* 0CE67C 800CDA7C 00832021 */ addu $a0, $a0, $v1
|
||||
.L800CDA80:
|
||||
/* 0CE680 800CDA80 2401FFE0 */ li $at, -32
|
||||
/* 0CE684 800CDA84 00A13824 */ and $a3, $a1, $at
|
||||
/* 0CE688 800CDA88 10E0000C */ beqz $a3, .L800CDABC
|
||||
/* 0CE68C 800CDA8C 00A72823 */ subu $a1, $a1, $a3
|
||||
/* 0CE690 800CDA90 00E43821 */ addu $a3, $a3, $a0
|
||||
.L800CDA94:
|
||||
/* 0CE694 800CDA94 24840020 */ addiu $a0, $a0, 0x20
|
||||
/* 0CE698 800CDA98 AC80FFE0 */ sw $zero, -0x20($a0)
|
||||
/* 0CE69C 800CDA9C AC80FFE4 */ sw $zero, -0x1c($a0)
|
||||
/* 0CE6A0 800CDAA0 AC80FFE8 */ sw $zero, -0x18($a0)
|
||||
/* 0CE6A4 800CDAA4 AC80FFEC */ sw $zero, -0x14($a0)
|
||||
/* 0CE6A8 800CDAA8 AC80FFF0 */ sw $zero, -0x10($a0)
|
||||
/* 0CE6AC 800CDAAC AC80FFF4 */ sw $zero, -0xc($a0)
|
||||
/* 0CE6B0 800CDAB0 AC80FFF8 */ sw $zero, -8($a0)
|
||||
/* 0CE6B4 800CDAB4 1487FFF7 */ bne $a0, $a3, .L800CDA94
|
||||
/* 0CE6B8 800CDAB8 AC80FFFC */ sw $zero, -4($a0)
|
||||
.L800CDABC:
|
||||
/* 0CE6BC 800CDABC 2401FFFC */ li $at, -4
|
||||
/* 0CE6C0 800CDAC0 00A13824 */ and $a3, $a1, $at
|
||||
/* 0CE6C4 800CDAC4 10E00005 */ beqz $a3, .L800CDADC
|
||||
/* 0CE6C8 800CDAC8 00A72823 */ subu $a1, $a1, $a3
|
||||
/* 0CE6CC 800CDACC 00E43821 */ addu $a3, $a3, $a0
|
||||
.L800CDAD0:
|
||||
/* 0CE6D0 800CDAD0 24840004 */ addiu $a0, $a0, 4
|
||||
/* 0CE6D4 800CDAD4 1487FFFE */ bne $a0, $a3, .L800CDAD0
|
||||
/* 0CE6D8 800CDAD8 AC80FFFC */ sw $zero, -4($a0)
|
||||
.L800CDADC:
|
||||
/* 0CE6DC 800CDADC 18A00005 */ blez $a1, .L800CDAF4
|
||||
/* 0CE6E0 800CDAE0 00000000 */ nop
|
||||
/* 0CE6E4 800CDAE4 00A42821 */ addu $a1, $a1, $a0
|
||||
.L800CDAE8:
|
||||
/* 0CE6E8 800CDAE8 24840001 */ addiu $a0, $a0, 1
|
||||
/* 0CE6EC 800CDAEC 1485FFFE */ bne $a0, $a1, .L800CDAE8
|
||||
/* 0CE6F0 800CDAF0 A080FFFF */ sb $zero, -1($a0)
|
||||
.L800CDAF4:
|
||||
/* 0CE6F4 800CDAF4 03E00008 */ jr $ra
|
||||
/* 0CE6F8 800CDAF8 00000000 */ nop
|
||||
|
||||
/* 0CE6FC 800CDAFC 00000000 */ nop
|
||||
|
|
@ -0,0 +1,265 @@
|
|||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel __osContRamRead
|
||||
/* 0D68B0 800D5CB0 27BDFFA0 */ addiu $sp, $sp, -0x60
|
||||
/* 0D68B4 800D5CB4 3C0E8019 */ lui $t6, %hi(__osPfsPifRam) # $t6, 0x8019
|
||||
/* 0D68B8 800D5CB8 AFBF001C */ sw $ra, 0x1c($sp)
|
||||
/* 0D68BC 800D5CBC 25CE6590 */ addiu $t6, %lo(__osPfsPifRam) # addiu $t6, $t6, 0x6590
|
||||
/* 0D68C0 800D5CC0 240F0002 */ li $t7, 2
|
||||
/* 0D68C4 800D5CC4 AFA40060 */ sw $a0, 0x60($sp)
|
||||
/* 0D68C8 800D5CC8 AFA50064 */ sw $a1, 0x64($sp)
|
||||
/* 0D68CC 800D5CCC AFA60068 */ sw $a2, 0x68($sp)
|
||||
/* 0D68D0 800D5CD0 AFA7006C */ sw $a3, 0x6c($sp)
|
||||
/* 0D68D4 800D5CD4 AFB00018 */ sw $s0, 0x18($sp)
|
||||
/* 0D68D8 800D5CD8 AFA0005C */ sw $zero, 0x5c($sp)
|
||||
/* 0D68DC 800D5CDC AFAE0054 */ sw $t6, 0x54($sp)
|
||||
/* 0D68E0 800D5CE0 0C034EE8 */ jal __osSiGetAccess
|
||||
/* 0D68E4 800D5CE4 AFAF0028 */ sw $t7, 0x28($sp)
|
||||
/* 0D68E8 800D5CE8 24180002 */ li $t8, 2
|
||||
/* 0D68EC 800D5CEC 3C018019 */ lui $at, %hi(_osLastSentSiCmd) # $at, 0x8019
|
||||
/* 0D68F0 800D5CF0 A0386540 */ sb $t8, %lo(_osLastSentSiCmd)($at)
|
||||
/* 0D68F4 800D5CF4 8FA40064 */ lw $a0, 0x64($sp)
|
||||
/* 0D68F8 800D5CF8 0C0357BD */ jal __osPackRamReadData
|
||||
/* 0D68FC 800D5CFC 97A5006A */ lhu $a1, 0x6a($sp)
|
||||
/* 0D6900 800D5D00 3C058019 */ lui $a1, %hi(__osPfsPifRam) # $a1, 0x8019
|
||||
/* 0D6904 800D5D04 24A56590 */ addiu $a1, %lo(__osPfsPifRam) # addiu $a1, $a1, 0x6590
|
||||
/* 0D6908 800D5D08 0C034EA8 */ jal __osSiRawStartDma
|
||||
/* 0D690C 800D5D0C 24040001 */ li $a0, 1
|
||||
/* 0D6910 800D5D10 AFA2005C */ sw $v0, 0x5c($sp)
|
||||
/* 0D6914 800D5D14 8FA40060 */ lw $a0, 0x60($sp)
|
||||
/* 0D6918 800D5D18 00002825 */ move $a1, $zero
|
||||
/* 0D691C 800D5D1C 0C0335D4 */ jal osRecvMesg
|
||||
/* 0D6920 800D5D20 24060001 */ li $a2, 1
|
||||
.L800D5D24:
|
||||
/* 0D6924 800D5D24 AFA00058 */ sw $zero, 0x58($sp)
|
||||
.L800D5D28:
|
||||
/* 0D6928 800D5D28 8FA80058 */ lw $t0, 0x58($sp)
|
||||
/* 0D692C 800D5D2C 8FAA0058 */ lw $t2, 0x58($sp)
|
||||
/* 0D6930 800D5D30 3C018019 */ lui $at, %hi(__osPfsPifRam) # 0x8019
|
||||
/* 0D6934 800D5D34 00084880 */ sll $t1, $t0, 2
|
||||
/* 0D6938 800D5D38 00290821 */ addu $at, $at, $t1
|
||||
/* 0D693C 800D5D3C 241900FF */ li $t9, 255
|
||||
/* 0D6940 800D5D40 AC396590 */ sw $t9, %lo(__osPfsPifRam)($at) # 0x6590($at)
|
||||
/* 0D6944 800D5D44 254B0001 */ addiu $t3, $t2, 1
|
||||
/* 0D6948 800D5D48 29610010 */ slti $at, $t3, 0x10
|
||||
/* 0D694C 800D5D4C 1420FFF6 */ bnez $at, .L800D5D28
|
||||
/* 0D6950 800D5D50 AFAB0058 */ sw $t3, 0x58($sp)
|
||||
/* 0D6954 800D5D54 3C018019 */ lui $at, %hi(D_801965CC) # $at, 0x8019
|
||||
/* 0D6958 800D5D58 3C058019 */ lui $a1, %hi(__osPfsPifRam) # $a1, 0x8019
|
||||
/* 0D695C 800D5D5C AC2065CC */ sw $zero, %lo(D_801965CC)($at)
|
||||
/* 0D6960 800D5D60 24A56590 */ addiu $a1, %lo(__osPfsPifRam) # addiu $a1, $a1, 0x6590
|
||||
/* 0D6964 800D5D64 0C034EA8 */ jal __osSiRawStartDma
|
||||
/* 0D6968 800D5D68 00002025 */ move $a0, $zero
|
||||
/* 0D696C 800D5D6C AFA2005C */ sw $v0, 0x5c($sp)
|
||||
/* 0D6970 800D5D70 8FA40060 */ lw $a0, 0x60($sp)
|
||||
/* 0D6974 800D5D74 00002825 */ move $a1, $zero
|
||||
/* 0D6978 800D5D78 0C0335D4 */ jal osRecvMesg
|
||||
/* 0D697C 800D5D7C 24060001 */ li $a2, 1
|
||||
/* 0D6980 800D5D80 8FAD0064 */ lw $t5, 0x64($sp)
|
||||
/* 0D6984 800D5D84 3C0C8019 */ lui $t4, %hi(__osPfsPifRam) # $t4, 0x8019
|
||||
/* 0D6988 800D5D88 258C6590 */ addiu $t4, %lo(__osPfsPifRam) # addiu $t4, $t4, 0x6590
|
||||
/* 0D698C 800D5D8C 11A0000C */ beqz $t5, .L800D5DC0
|
||||
/* 0D6990 800D5D90 AFAC0054 */ sw $t4, 0x54($sp)
|
||||
/* 0D6994 800D5D94 19A0000A */ blez $t5, .L800D5DC0
|
||||
/* 0D6998 800D5D98 AFA00058 */ sw $zero, 0x58($sp)
|
||||
.L800D5D9C:
|
||||
/* 0D699C 800D5D9C 8FB80058 */ lw $t8, 0x58($sp)
|
||||
/* 0D69A0 800D5DA0 8FB90064 */ lw $t9, 0x64($sp)
|
||||
/* 0D69A4 800D5DA4 8FAE0054 */ lw $t6, 0x54($sp)
|
||||
/* 0D69A8 800D5DA8 27080001 */ addiu $t0, $t8, 1
|
||||
/* 0D69AC 800D5DAC 0119082A */ slt $at, $t0, $t9
|
||||
/* 0D69B0 800D5DB0 25CF0001 */ addiu $t7, $t6, 1
|
||||
/* 0D69B4 800D5DB4 AFA80058 */ sw $t0, 0x58($sp)
|
||||
/* 0D69B8 800D5DB8 1420FFF8 */ bnez $at, .L800D5D9C
|
||||
/* 0D69BC 800D5DBC AFAF0054 */ sw $t7, 0x54($sp)
|
||||
.L800D5DC0:
|
||||
/* 0D69C0 800D5DC0 8FAA0054 */ lw $t2, 0x54($sp)
|
||||
/* 0D69C4 800D5DC4 27A9002C */ addiu $t1, $sp, 0x2c
|
||||
/* 0D69C8 800D5DC8 254C0024 */ addiu $t4, $t2, 0x24
|
||||
.L800D5DCC:
|
||||
/* 0D69CC 800D5DCC 89410000 */ lwl $at, ($t2)
|
||||
/* 0D69D0 800D5DD0 99410003 */ lwr $at, 3($t2)
|
||||
/* 0D69D4 800D5DD4 254A000C */ addiu $t2, $t2, 0xc
|
||||
/* 0D69D8 800D5DD8 2529000C */ addiu $t1, $t1, 0xc
|
||||
/* 0D69DC 800D5DDC AD21FFF4 */ sw $at, -0xc($t1)
|
||||
/* 0D69E0 800D5DE0 8941FFF8 */ lwl $at, -8($t2)
|
||||
/* 0D69E4 800D5DE4 9941FFFB */ lwr $at, -5($t2)
|
||||
/* 0D69E8 800D5DE8 AD21FFF8 */ sw $at, -8($t1)
|
||||
/* 0D69EC 800D5DEC 8941FFFC */ lwl $at, -4($t2)
|
||||
/* 0D69F0 800D5DF0 9941FFFF */ lwr $at, -1($t2)
|
||||
/* 0D69F4 800D5DF4 154CFFF5 */ bne $t2, $t4, .L800D5DCC
|
||||
/* 0D69F8 800D5DF8 AD21FFFC */ sw $at, -4($t1)
|
||||
/* 0D69FC 800D5DFC 89410000 */ lwl $at, ($t2)
|
||||
/* 0D6A00 800D5E00 99410003 */ lwr $at, 3($t2)
|
||||
/* 0D6A04 800D5E04 AD210000 */ sw $at, ($t1)
|
||||
/* 0D6A08 800D5E08 93AD002E */ lbu $t5, 0x2e($sp)
|
||||
/* 0D6A0C 800D5E0C 31AE00C0 */ andi $t6, $t5, 0xc0
|
||||
/* 0D6A10 800D5E10 000E7903 */ sra $t7, $t6, 4
|
||||
/* 0D6A14 800D5E14 15E00025 */ bnez $t7, .L800D5EAC
|
||||
/* 0D6A18 800D5E18 AFAF005C */ sw $t7, 0x5c($sp)
|
||||
/* 0D6A1C 800D5E1C 27A4002C */ addiu $a0, $sp, 0x2c
|
||||
/* 0D6A20 800D5E20 0C035FC4 */ jal __osContDataCrc
|
||||
/* 0D6A24 800D5E24 24840006 */ addiu $a0, $a0, 6
|
||||
/* 0D6A28 800D5E28 A3A20027 */ sb $v0, 0x27($sp)
|
||||
/* 0D6A2C 800D5E2C 93B80027 */ lbu $t8, 0x27($sp)
|
||||
/* 0D6A30 800D5E30 93A80052 */ lbu $t0, 0x52($sp)
|
||||
/* 0D6A34 800D5E34 1308000F */ beq $t8, $t0, .L800D5E74
|
||||
/* 0D6A38 800D5E38 00000000 */ nop
|
||||
/* 0D6A3C 800D5E3C 8FA40060 */ lw $a0, 0x60($sp)
|
||||
/* 0D6A40 800D5E40 0C0339F5 */ jal func_800CE7D4
|
||||
/* 0D6A44 800D5E44 8FA50064 */ lw $a1, 0x64($sp)
|
||||
/* 0D6A48 800D5E48 AFA2005C */ sw $v0, 0x5c($sp)
|
||||
/* 0D6A4C 800D5E4C 8FB9005C */ lw $t9, 0x5c($sp)
|
||||
/* 0D6A50 800D5E50 13200005 */ beqz $t9, .L800D5E68
|
||||
/* 0D6A54 800D5E54 00000000 */ nop
|
||||
/* 0D6A58 800D5E58 0C034EF9 */ jal __osSiRelAccess
|
||||
/* 0D6A5C 800D5E5C 00000000 */ nop
|
||||
/* 0D6A60 800D5E60 1000001F */ b .L800D5EE0
|
||||
/* 0D6A64 800D5E64 8FA2005C */ lw $v0, 0x5c($sp)
|
||||
.L800D5E68:
|
||||
/* 0D6A68 800D5E68 240B0004 */ li $t3, 4
|
||||
/* 0D6A6C 800D5E6C 1000000F */ b .L800D5EAC
|
||||
/* 0D6A70 800D5E70 AFAB005C */ sw $t3, 0x5c($sp)
|
||||
.L800D5E74:
|
||||
/* 0D6A74 800D5E74 AFA00058 */ sw $zero, 0x58($sp)
|
||||
.L800D5E78:
|
||||
/* 0D6A78 800D5E78 8FAC0058 */ lw $t4, 0x58($sp)
|
||||
/* 0D6A7C 800D5E7C 8FA9006C */ lw $t1, 0x6c($sp)
|
||||
/* 0D6A80 800D5E80 03AC5021 */ addu $t2, $sp, $t4
|
||||
/* 0D6A84 800D5E84 914A0032 */ lbu $t2, 0x32($t2)
|
||||
/* 0D6A88 800D5E88 A12A0000 */ sb $t2, ($t1)
|
||||
/* 0D6A8C 800D5E8C 8FAF0058 */ lw $t7, 0x58($sp)
|
||||
/* 0D6A90 800D5E90 8FAD006C */ lw $t5, 0x6c($sp)
|
||||
/* 0D6A94 800D5E94 25F80001 */ addiu $t8, $t7, 1
|
||||
/* 0D6A98 800D5E98 2B010020 */ slti $at, $t8, 0x20
|
||||
/* 0D6A9C 800D5E9C 25AE0001 */ addiu $t6, $t5, 1
|
||||
/* 0D6AA0 800D5EA0 AFB80058 */ sw $t8, 0x58($sp)
|
||||
/* 0D6AA4 800D5EA4 1420FFF4 */ bnez $at, .L800D5E78
|
||||
/* 0D6AA8 800D5EA8 AFAE006C */ sw $t6, 0x6c($sp)
|
||||
.L800D5EAC:
|
||||
/* 0D6AAC 800D5EAC 8FA8005C */ lw $t0, 0x5c($sp)
|
||||
/* 0D6AB0 800D5EB0 24010004 */ li $at, 4
|
||||
/* 0D6AB4 800D5EB4 15010007 */ bne $t0, $at, .L800D5ED4
|
||||
/* 0D6AB8 800D5EB8 00000000 */ nop
|
||||
/* 0D6ABC 800D5EBC 8FB90028 */ lw $t9, 0x28($sp)
|
||||
/* 0D6AC0 800D5EC0 2B300000 */ slti $s0, $t9, 0
|
||||
/* 0D6AC4 800D5EC4 3A100001 */ xori $s0, $s0, 1
|
||||
/* 0D6AC8 800D5EC8 272BFFFF */ addiu $t3, $t9, -1
|
||||
/* 0D6ACC 800D5ECC 1600FF95 */ bnez $s0, .L800D5D24
|
||||
/* 0D6AD0 800D5ED0 AFAB0028 */ sw $t3, 0x28($sp)
|
||||
.L800D5ED4:
|
||||
/* 0D6AD4 800D5ED4 0C034EF9 */ jal __osSiRelAccess
|
||||
/* 0D6AD8 800D5ED8 00000000 */ nop
|
||||
/* 0D6ADC 800D5EDC 8FA2005C */ lw $v0, 0x5c($sp)
|
||||
.L800D5EE0:
|
||||
/* 0D6AE0 800D5EE0 8FBF001C */ lw $ra, 0x1c($sp)
|
||||
/* 0D6AE4 800D5EE4 8FB00018 */ lw $s0, 0x18($sp)
|
||||
/* 0D6AE8 800D5EE8 27BD0060 */ addiu $sp, $sp, 0x60
|
||||
/* 0D6AEC 800D5EEC 03E00008 */ jr $ra
|
||||
/* 0D6AF0 800D5EF0 00000000 */ nop
|
||||
|
||||
glabel __osPackRamReadData
|
||||
/* 0D6AF4 800D5EF4 27BDFFB8 */ addiu $sp, $sp, -0x48
|
||||
/* 0D6AF8 800D5EF8 3C0E8019 */ lui $t6, %hi(__osPfsPifRam) # $t6, 0x8019
|
||||
/* 0D6AFC 800D5EFC 25CE6590 */ addiu $t6, %lo(__osPfsPifRam) # addiu $t6, $t6, 0x6590
|
||||
/* 0D6B00 800D5F00 AFBF0014 */ sw $ra, 0x14($sp)
|
||||
/* 0D6B04 800D5F04 AFA40048 */ sw $a0, 0x48($sp)
|
||||
/* 0D6B08 800D5F08 AFA5004C */ sw $a1, 0x4c($sp)
|
||||
/* 0D6B0C 800D5F0C AFAE0044 */ sw $t6, 0x44($sp)
|
||||
/* 0D6B10 800D5F10 AFA00018 */ sw $zero, 0x18($sp)
|
||||
.L800D5F14:
|
||||
/* 0D6B14 800D5F14 8FAF0018 */ lw $t7, 0x18($sp)
|
||||
/* 0D6B18 800D5F18 8FB90018 */ lw $t9, 0x18($sp)
|
||||
/* 0D6B1C 800D5F1C 3C018019 */ lui $at, %hi(__osPfsPifRam) # 0x8019
|
||||
/* 0D6B20 800D5F20 000FC080 */ sll $t8, $t7, 2
|
||||
/* 0D6B24 800D5F24 00380821 */ addu $at, $at, $t8
|
||||
/* 0D6B28 800D5F28 AC206590 */ sw $zero, %lo(__osPfsPifRam)($at) # 0x6590($at)
|
||||
/* 0D6B2C 800D5F2C 27280001 */ addiu $t0, $t9, 1
|
||||
/* 0D6B30 800D5F30 29010010 */ slti $at, $t0, 0x10
|
||||
/* 0D6B34 800D5F34 1420FFF7 */ bnez $at, .L800D5F14
|
||||
/* 0D6B38 800D5F38 AFA80018 */ sw $t0, 0x18($sp)
|
||||
/* 0D6B3C 800D5F3C 24090001 */ li $t1, 1
|
||||
/* 0D6B40 800D5F40 3C018019 */ lui $at, %hi(D_801965CC) # $at, 0x8019
|
||||
/* 0D6B44 800D5F44 240A00FF */ li $t2, 255
|
||||
/* 0D6B48 800D5F48 240B0003 */ li $t3, 3
|
||||
/* 0D6B4C 800D5F4C 240C0021 */ li $t4, 33
|
||||
/* 0D6B50 800D5F50 240D0002 */ li $t5, 2
|
||||
/* 0D6B54 800D5F54 AC2965CC */ sw $t1, %lo(D_801965CC)($at)
|
||||
/* 0D6B58 800D5F58 A3AA001C */ sb $t2, 0x1c($sp)
|
||||
/* 0D6B5C 800D5F5C A3AB001D */ sb $t3, 0x1d($sp)
|
||||
/* 0D6B60 800D5F60 A3AC001E */ sb $t4, 0x1e($sp)
|
||||
/* 0D6B64 800D5F64 A3AD001F */ sb $t5, 0x1f($sp)
|
||||
/* 0D6B68 800D5F68 0C035F98 */ jal __osContAddressCrc
|
||||
/* 0D6B6C 800D5F6C 97A4004E */ lhu $a0, 0x4e($sp)
|
||||
/* 0D6B70 800D5F70 97AE004E */ lhu $t6, 0x4e($sp)
|
||||
/* 0D6B74 800D5F74 241900FF */ li $t9, 255
|
||||
/* 0D6B78 800D5F78 A3B90042 */ sb $t9, 0x42($sp)
|
||||
/* 0D6B7C 800D5F7C 000E7940 */ sll $t7, $t6, 5
|
||||
/* 0D6B80 800D5F80 004FC025 */ or $t8, $v0, $t7
|
||||
/* 0D6B84 800D5F84 A7B80020 */ sh $t8, 0x20($sp)
|
||||
/* 0D6B88 800D5F88 AFA00018 */ sw $zero, 0x18($sp)
|
||||
.L800D5F8C:
|
||||
/* 0D6B8C 800D5F8C 8FA90018 */ lw $t1, 0x18($sp)
|
||||
/* 0D6B90 800D5F90 240800FF */ li $t0, 255
|
||||
/* 0D6B94 800D5F94 03A95021 */ addu $t2, $sp, $t1
|
||||
/* 0D6B98 800D5F98 A1480022 */ sb $t0, 0x22($t2)
|
||||
/* 0D6B9C 800D5F9C 8FAB0018 */ lw $t3, 0x18($sp)
|
||||
/* 0D6BA0 800D5FA0 256C0001 */ addiu $t4, $t3, 1
|
||||
/* 0D6BA4 800D5FA4 29810020 */ slti $at, $t4, 0x20
|
||||
/* 0D6BA8 800D5FA8 1420FFF8 */ bnez $at, .L800D5F8C
|
||||
/* 0D6BAC 800D5FAC AFAC0018 */ sw $t4, 0x18($sp)
|
||||
/* 0D6BB0 800D5FB0 8FAD0048 */ lw $t5, 0x48($sp)
|
||||
/* 0D6BB4 800D5FB4 11A0000E */ beqz $t5, .L800D5FF0
|
||||
/* 0D6BB8 800D5FB8 00000000 */ nop
|
||||
/* 0D6BBC 800D5FBC 19A0000C */ blez $t5, .L800D5FF0
|
||||
/* 0D6BC0 800D5FC0 AFA00018 */ sw $zero, 0x18($sp)
|
||||
.L800D5FC4:
|
||||
/* 0D6BC4 800D5FC4 8FAE0044 */ lw $t6, 0x44($sp)
|
||||
/* 0D6BC8 800D5FC8 A1C00000 */ sb $zero, ($t6)
|
||||
/* 0D6BCC 800D5FCC 8FB90018 */ lw $t9, 0x18($sp)
|
||||
/* 0D6BD0 800D5FD0 8FA90048 */ lw $t1, 0x48($sp)
|
||||
/* 0D6BD4 800D5FD4 8FAF0044 */ lw $t7, 0x44($sp)
|
||||
/* 0D6BD8 800D5FD8 27280001 */ addiu $t0, $t9, 1
|
||||
/* 0D6BDC 800D5FDC 0109082A */ slt $at, $t0, $t1
|
||||
/* 0D6BE0 800D5FE0 25F80001 */ addiu $t8, $t7, 1
|
||||
/* 0D6BE4 800D5FE4 AFA80018 */ sw $t0, 0x18($sp)
|
||||
/* 0D6BE8 800D5FE8 1420FFF6 */ bnez $at, .L800D5FC4
|
||||
/* 0D6BEC 800D5FEC AFB80044 */ sw $t8, 0x44($sp)
|
||||
.L800D5FF0:
|
||||
/* 0D6BF0 800D5FF0 27AB001C */ addiu $t3, $sp, 0x1c
|
||||
/* 0D6BF4 800D5FF4 256D0024 */ addiu $t5, $t3, 0x24
|
||||
/* 0D6BF8 800D5FF8 8FAA0044 */ lw $t2, 0x44($sp)
|
||||
.L800D5FFC:
|
||||
/* 0D6BFC 800D5FFC 8D610000 */ lw $at, ($t3)
|
||||
/* 0D6C00 800D6000 256B000C */ addiu $t3, $t3, 0xc
|
||||
/* 0D6C04 800D6004 254A000C */ addiu $t2, $t2, 0xc
|
||||
/* 0D6C08 800D6008 A941FFF4 */ swl $at, -0xc($t2)
|
||||
/* 0D6C0C 800D600C B941FFF7 */ swr $at, -9($t2)
|
||||
/* 0D6C10 800D6010 8D61FFF8 */ lw $at, -8($t3)
|
||||
/* 0D6C14 800D6014 A941FFF8 */ swl $at, -8($t2)
|
||||
/* 0D6C18 800D6018 B941FFFB */ swr $at, -5($t2)
|
||||
/* 0D6C1C 800D601C 8D61FFFC */ lw $at, -4($t3)
|
||||
/* 0D6C20 800D6020 A941FFFC */ swl $at, -4($t2)
|
||||
/* 0D6C24 800D6024 156DFFF5 */ bne $t3, $t5, .L800D5FFC
|
||||
/* 0D6C28 800D6028 B941FFFF */ swr $at, -1($t2)
|
||||
/* 0D6C2C 800D602C 8D610000 */ lw $at, ($t3)
|
||||
/* 0D6C30 800D6030 241800FE */ li $t8, 254
|
||||
/* 0D6C34 800D6034 A9410000 */ swl $at, ($t2)
|
||||
/* 0D6C38 800D6038 B9410003 */ swr $at, 3($t2)
|
||||
/* 0D6C3C 800D603C 8FAE0044 */ lw $t6, 0x44($sp)
|
||||
/* 0D6C40 800D6040 25CF0028 */ addiu $t7, $t6, 0x28
|
||||
/* 0D6C44 800D6044 AFAF0044 */ sw $t7, 0x44($sp)
|
||||
/* 0D6C48 800D6048 A1F80000 */ sb $t8, ($t7)
|
||||
/* 0D6C4C 800D604C 8FBF0014 */ lw $ra, 0x14($sp)
|
||||
/* 0D6C50 800D6050 27BD0048 */ addiu $sp, $sp, 0x48
|
||||
/* 0D6C54 800D6054 03E00008 */ jr $ra
|
||||
/* 0D6C58 800D6058 00000000 */ nop
|
||||
|
||||
/* 0D6C5C 800D605C 00000000 */ nop
|
||||
|
|
@ -0,0 +1,264 @@
|
|||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel __osContRamWrite
|
||||
/* 0D7EF0 800D72F0 27BDFFA0 */ addiu $sp, $sp, -0x60
|
||||
/* 0D7EF4 800D72F4 8FB80070 */ lw $t8, 0x70($sp)
|
||||
/* 0D7EF8 800D72F8 3C0E8019 */ lui $t6, %hi(__osPfsPifRam) # $t6, 0x8019
|
||||
/* 0D7EFC 800D72FC 25CE6590 */ addiu $t6, %lo(__osPfsPifRam) # addiu $t6, $t6, 0x6590
|
||||
/* 0D7F00 800D7300 240F0002 */ li $t7, 2
|
||||
/* 0D7F04 800D7304 24010001 */ li $at, 1
|
||||
/* 0D7F08 800D7308 AFBF001C */ sw $ra, 0x1c($sp)
|
||||
/* 0D7F0C 800D730C AFA40060 */ sw $a0, 0x60($sp)
|
||||
/* 0D7F10 800D7310 AFA50064 */ sw $a1, 0x64($sp)
|
||||
/* 0D7F14 800D7314 AFA60068 */ sw $a2, 0x68($sp)
|
||||
/* 0D7F18 800D7318 AFA7006C */ sw $a3, 0x6c($sp)
|
||||
/* 0D7F1C 800D731C AFB00018 */ sw $s0, 0x18($sp)
|
||||
/* 0D7F20 800D7320 AFA0005C */ sw $zero, 0x5c($sp)
|
||||
/* 0D7F24 800D7324 AFAE0054 */ sw $t6, 0x54($sp)
|
||||
/* 0D7F28 800D7328 13010009 */ beq $t8, $at, .L800D7350
|
||||
/* 0D7F2C 800D732C AFAF0028 */ sw $t7, 0x28($sp)
|
||||
/* 0D7F30 800D7330 97B9006A */ lhu $t9, 0x6a($sp)
|
||||
/* 0D7F34 800D7334 2B210007 */ slti $at, $t9, 7
|
||||
/* 0D7F38 800D7338 10200005 */ beqz $at, .L800D7350
|
||||
/* 0D7F3C 800D733C 00000000 */ nop
|
||||
/* 0D7F40 800D7340 13200003 */ beqz $t9, .L800D7350
|
||||
/* 0D7F44 800D7344 00000000 */ nop
|
||||
/* 0D7F48 800D7348 10000070 */ b .L800D750C
|
||||
/* 0D7F4C 800D734C 00001025 */ move $v0, $zero
|
||||
.L800D7350:
|
||||
/* 0D7F50 800D7350 0C034EE8 */ jal __osSiGetAccess
|
||||
/* 0D7F54 800D7354 00000000 */ nop
|
||||
/* 0D7F58 800D7358 24080003 */ li $t0, 3
|
||||
/* 0D7F5C 800D735C 3C018019 */ lui $at, %hi(_osLastSentSiCmd) # $at, 0x8019
|
||||
/* 0D7F60 800D7360 A0286540 */ sb $t0, %lo(_osLastSentSiCmd)($at)
|
||||
/* 0D7F64 800D7364 8FA40064 */ lw $a0, 0x64($sp)
|
||||
/* 0D7F68 800D7368 97A5006A */ lhu $a1, 0x6a($sp)
|
||||
/* 0D7F6C 800D736C 0C035D48 */ jal __osPackRamWriteData
|
||||
/* 0D7F70 800D7370 8FA6006C */ lw $a2, 0x6c($sp)
|
||||
/* 0D7F74 800D7374 3C058019 */ lui $a1, %hi(__osPfsPifRam) # $a1, 0x8019
|
||||
/* 0D7F78 800D7378 24A56590 */ addiu $a1, %lo(__osPfsPifRam) # addiu $a1, $a1, 0x6590
|
||||
/* 0D7F7C 800D737C 0C034EA8 */ jal __osSiRawStartDma
|
||||
/* 0D7F80 800D7380 24040001 */ li $a0, 1
|
||||
/* 0D7F84 800D7384 AFA2005C */ sw $v0, 0x5c($sp)
|
||||
/* 0D7F88 800D7388 8FA40060 */ lw $a0, 0x60($sp)
|
||||
/* 0D7F8C 800D738C 00002825 */ move $a1, $zero
|
||||
/* 0D7F90 800D7390 0C0335D4 */ jal osRecvMesg
|
||||
/* 0D7F94 800D7394 24060001 */ li $a2, 1
|
||||
.L800D7398:
|
||||
/* 0D7F98 800D7398 AFA00058 */ sw $zero, 0x58($sp)
|
||||
.L800D739C:
|
||||
/* 0D7F9C 800D739C 8FAA0058 */ lw $t2, 0x58($sp)
|
||||
/* 0D7FA0 800D73A0 8FAC0058 */ lw $t4, 0x58($sp)
|
||||
/* 0D7FA4 800D73A4 3C018019 */ lui $at, %hi(__osPfsPifRam) # 0x8019
|
||||
/* 0D7FA8 800D73A8 000A5880 */ sll $t3, $t2, 2
|
||||
/* 0D7FAC 800D73AC 002B0821 */ addu $at, $at, $t3
|
||||
/* 0D7FB0 800D73B0 240900FF */ li $t1, 255
|
||||
/* 0D7FB4 800D73B4 AC296590 */ sw $t1, %lo(__osPfsPifRam)($at) # 0x6590($at)
|
||||
/* 0D7FB8 800D73B8 258D0001 */ addiu $t5, $t4, 1
|
||||
/* 0D7FBC 800D73BC 29A10010 */ slti $at, $t5, 0x10
|
||||
/* 0D7FC0 800D73C0 1420FFF6 */ bnez $at, .L800D739C
|
||||
/* 0D7FC4 800D73C4 AFAD0058 */ sw $t5, 0x58($sp)
|
||||
/* 0D7FC8 800D73C8 3C018019 */ lui $at, %hi(D_801965CC) # $at, 0x8019
|
||||
/* 0D7FCC 800D73CC 3C058019 */ lui $a1, %hi(__osPfsPifRam) # $a1, 0x8019
|
||||
/* 0D7FD0 800D73D0 AC2065CC */ sw $zero, %lo(D_801965CC)($at)
|
||||
/* 0D7FD4 800D73D4 24A56590 */ addiu $a1, %lo(__osPfsPifRam) # addiu $a1, $a1, 0x6590
|
||||
/* 0D7FD8 800D73D8 0C034EA8 */ jal __osSiRawStartDma
|
||||
/* 0D7FDC 800D73DC 00002025 */ move $a0, $zero
|
||||
/* 0D7FE0 800D73E0 AFA2005C */ sw $v0, 0x5c($sp)
|
||||
/* 0D7FE4 800D73E4 8FA40060 */ lw $a0, 0x60($sp)
|
||||
/* 0D7FE8 800D73E8 00002825 */ move $a1, $zero
|
||||
/* 0D7FEC 800D73EC 0C0335D4 */ jal osRecvMesg
|
||||
/* 0D7FF0 800D73F0 24060001 */ li $a2, 1
|
||||
/* 0D7FF4 800D73F4 8FAF0064 */ lw $t7, 0x64($sp)
|
||||
/* 0D7FF8 800D73F8 3C0E8019 */ lui $t6, %hi(__osPfsPifRam) # $t6, 0x8019
|
||||
/* 0D7FFC 800D73FC 25CE6590 */ addiu $t6, %lo(__osPfsPifRam) # addiu $t6, $t6, 0x6590
|
||||
/* 0D8000 800D7400 11E0000C */ beqz $t7, .L800D7434
|
||||
/* 0D8004 800D7404 AFAE0054 */ sw $t6, 0x54($sp)
|
||||
/* 0D8008 800D7408 19E0000A */ blez $t7, .L800D7434
|
||||
/* 0D800C 800D740C AFA00058 */ sw $zero, 0x58($sp)
|
||||
.L800D7410:
|
||||
/* 0D8010 800D7410 8FA80058 */ lw $t0, 0x58($sp)
|
||||
/* 0D8014 800D7414 8FA90064 */ lw $t1, 0x64($sp)
|
||||
/* 0D8018 800D7418 8FB80054 */ lw $t8, 0x54($sp)
|
||||
/* 0D801C 800D741C 250A0001 */ addiu $t2, $t0, 1
|
||||
/* 0D8020 800D7420 0149082A */ slt $at, $t2, $t1
|
||||
/* 0D8024 800D7424 27190001 */ addiu $t9, $t8, 1
|
||||
/* 0D8028 800D7428 AFAA0058 */ sw $t2, 0x58($sp)
|
||||
/* 0D802C 800D742C 1420FFF8 */ bnez $at, .L800D7410
|
||||
/* 0D8030 800D7430 AFB90054 */ sw $t9, 0x54($sp)
|
||||
.L800D7434:
|
||||
/* 0D8034 800D7434 8FAC0054 */ lw $t4, 0x54($sp)
|
||||
/* 0D8038 800D7438 27AB002C */ addiu $t3, $sp, 0x2c
|
||||
/* 0D803C 800D743C 258E0024 */ addiu $t6, $t4, 0x24
|
||||
.L800D7440:
|
||||
/* 0D8040 800D7440 89810000 */ lwl $at, ($t4)
|
||||
/* 0D8044 800D7444 99810003 */ lwr $at, 3($t4)
|
||||
/* 0D8048 800D7448 258C000C */ addiu $t4, $t4, 0xc
|
||||
/* 0D804C 800D744C 256B000C */ addiu $t3, $t3, 0xc
|
||||
/* 0D8050 800D7450 AD61FFF4 */ sw $at, -0xc($t3)
|
||||
/* 0D8054 800D7454 8981FFF8 */ lwl $at, -8($t4)
|
||||
/* 0D8058 800D7458 9981FFFB */ lwr $at, -5($t4)
|
||||
/* 0D805C 800D745C AD61FFF8 */ sw $at, -8($t3)
|
||||
/* 0D8060 800D7460 8981FFFC */ lwl $at, -4($t4)
|
||||
/* 0D8064 800D7464 9981FFFF */ lwr $at, -1($t4)
|
||||
/* 0D8068 800D7468 158EFFF5 */ bne $t4, $t6, .L800D7440
|
||||
/* 0D806C 800D746C AD61FFFC */ sw $at, -4($t3)
|
||||
/* 0D8070 800D7470 89810000 */ lwl $at, ($t4)
|
||||
/* 0D8074 800D7474 99810003 */ lwr $at, 3($t4)
|
||||
/* 0D8078 800D7478 AD610000 */ sw $at, ($t3)
|
||||
/* 0D807C 800D747C 93AF002E */ lbu $t7, 0x2e($sp)
|
||||
/* 0D8080 800D7480 31F800C0 */ andi $t8, $t7, 0xc0
|
||||
/* 0D8084 800D7484 0018C903 */ sra $t9, $t8, 4
|
||||
/* 0D8088 800D7488 17200013 */ bnez $t9, .L800D74D8
|
||||
/* 0D808C 800D748C AFB9005C */ sw $t9, 0x5c($sp)
|
||||
/* 0D8090 800D7490 0C035FC4 */ jal __osContDataCrc
|
||||
/* 0D8094 800D7494 8FA4006C */ lw $a0, 0x6c($sp)
|
||||
/* 0D8098 800D7498 93A80052 */ lbu $t0, 0x52($sp)
|
||||
/* 0D809C 800D749C 1048000E */ beq $v0, $t0, .L800D74D8
|
||||
/* 0D80A0 800D74A0 00000000 */ nop
|
||||
/* 0D80A4 800D74A4 8FA40060 */ lw $a0, 0x60($sp)
|
||||
/* 0D80A8 800D74A8 0C0339F5 */ jal func_800CE7D4
|
||||
/* 0D80AC 800D74AC 8FA50064 */ lw $a1, 0x64($sp)
|
||||
/* 0D80B0 800D74B0 AFA2005C */ sw $v0, 0x5c($sp)
|
||||
/* 0D80B4 800D74B4 8FAA005C */ lw $t2, 0x5c($sp)
|
||||
/* 0D80B8 800D74B8 11400005 */ beqz $t2, .L800D74D0
|
||||
/* 0D80BC 800D74BC 00000000 */ nop
|
||||
/* 0D80C0 800D74C0 0C034EF9 */ jal __osSiRelAccess
|
||||
/* 0D80C4 800D74C4 00000000 */ nop
|
||||
/* 0D80C8 800D74C8 10000010 */ b .L800D750C
|
||||
/* 0D80CC 800D74CC 8FA2005C */ lw $v0, 0x5c($sp)
|
||||
.L800D74D0:
|
||||
/* 0D80D0 800D74D0 24090004 */ li $t1, 4
|
||||
/* 0D80D4 800D74D4 AFA9005C */ sw $t1, 0x5c($sp)
|
||||
.L800D74D8:
|
||||
/* 0D80D8 800D74D8 8FAD005C */ lw $t5, 0x5c($sp)
|
||||
/* 0D80DC 800D74DC 24010004 */ li $at, 4
|
||||
/* 0D80E0 800D74E0 15A10007 */ bne $t5, $at, .L800D7500
|
||||
/* 0D80E4 800D74E4 00000000 */ nop
|
||||
/* 0D80E8 800D74E8 8FAE0028 */ lw $t6, 0x28($sp)
|
||||
/* 0D80EC 800D74EC 29D00000 */ slti $s0, $t6, 0
|
||||
/* 0D80F0 800D74F0 3A100001 */ xori $s0, $s0, 1
|
||||
/* 0D80F4 800D74F4 25CCFFFF */ addiu $t4, $t6, -1
|
||||
/* 0D80F8 800D74F8 1600FFA7 */ bnez $s0, .L800D7398
|
||||
/* 0D80FC 800D74FC AFAC0028 */ sw $t4, 0x28($sp)
|
||||
.L800D7500:
|
||||
/* 0D8100 800D7500 0C034EF9 */ jal __osSiRelAccess
|
||||
/* 0D8104 800D7504 00000000 */ nop
|
||||
/* 0D8108 800D7508 8FA2005C */ lw $v0, 0x5c($sp)
|
||||
.L800D750C:
|
||||
/* 0D810C 800D750C 8FBF001C */ lw $ra, 0x1c($sp)
|
||||
/* 0D8110 800D7510 8FB00018 */ lw $s0, 0x18($sp)
|
||||
/* 0D8114 800D7514 27BD0060 */ addiu $sp, $sp, 0x60
|
||||
/* 0D8118 800D7518 03E00008 */ jr $ra
|
||||
/* 0D811C 800D751C 00000000 */ nop
|
||||
|
||||
glabel __osPackRamWriteData
|
||||
/* 0D8120 800D7520 27BDFFB8 */ addiu $sp, $sp, -0x48
|
||||
/* 0D8124 800D7524 3C0E8019 */ lui $t6, %hi(__osPfsPifRam) # $t6, 0x8019
|
||||
/* 0D8128 800D7528 25CE6590 */ addiu $t6, %lo(__osPfsPifRam) # addiu $t6, $t6, 0x6590
|
||||
/* 0D812C 800D752C AFBF0014 */ sw $ra, 0x14($sp)
|
||||
/* 0D8130 800D7530 AFA40048 */ sw $a0, 0x48($sp)
|
||||
/* 0D8134 800D7534 AFA5004C */ sw $a1, 0x4c($sp)
|
||||
/* 0D8138 800D7538 AFA60050 */ sw $a2, 0x50($sp)
|
||||
/* 0D813C 800D753C AFAE0044 */ sw $t6, 0x44($sp)
|
||||
/* 0D8140 800D7540 AFA00018 */ sw $zero, 0x18($sp)
|
||||
.L800D7544:
|
||||
/* 0D8144 800D7544 8FAF0018 */ lw $t7, 0x18($sp)
|
||||
/* 0D8148 800D7548 8FB90018 */ lw $t9, 0x18($sp)
|
||||
/* 0D814C 800D754C 3C018019 */ lui $at, %hi(__osPfsPifRam) # 0x8019
|
||||
/* 0D8150 800D7550 000FC080 */ sll $t8, $t7, 2
|
||||
/* 0D8154 800D7554 00380821 */ addu $at, $at, $t8
|
||||
/* 0D8158 800D7558 AC206590 */ sw $zero, %lo(__osPfsPifRam)($at) # 0x6590($at)
|
||||
/* 0D815C 800D755C 27280001 */ addiu $t0, $t9, 1
|
||||
/* 0D8160 800D7560 29010010 */ slti $at, $t0, 0x10
|
||||
/* 0D8164 800D7564 1420FFF7 */ bnez $at, .L800D7544
|
||||
/* 0D8168 800D7568 AFA80018 */ sw $t0, 0x18($sp)
|
||||
/* 0D816C 800D756C 24090001 */ li $t1, 1
|
||||
/* 0D8170 800D7570 3C018019 */ lui $at, %hi(D_801965CC) # $at, 0x8019
|
||||
/* 0D8174 800D7574 240A00FF */ li $t2, 255
|
||||
/* 0D8178 800D7578 240B0023 */ li $t3, 35
|
||||
/* 0D817C 800D757C 240C0001 */ li $t4, 1
|
||||
/* 0D8180 800D7580 240D0003 */ li $t5, 3
|
||||
/* 0D8184 800D7584 AC2965CC */ sw $t1, %lo(D_801965CC)($at)
|
||||
/* 0D8188 800D7588 A3AA001C */ sb $t2, 0x1c($sp)
|
||||
/* 0D818C 800D758C A3AB001D */ sb $t3, 0x1d($sp)
|
||||
/* 0D8190 800D7590 A3AC001E */ sb $t4, 0x1e($sp)
|
||||
/* 0D8194 800D7594 A3AD001F */ sb $t5, 0x1f($sp)
|
||||
/* 0D8198 800D7598 0C035F98 */ jal __osContAddressCrc
|
||||
/* 0D819C 800D759C 97A4004E */ lhu $a0, 0x4e($sp)
|
||||
/* 0D81A0 800D75A0 97AE004E */ lhu $t6, 0x4e($sp)
|
||||
/* 0D81A4 800D75A4 241900FF */ li $t9, 255
|
||||
/* 0D81A8 800D75A8 A3B90042 */ sb $t9, 0x42($sp)
|
||||
/* 0D81AC 800D75AC 000E7940 */ sll $t7, $t6, 5
|
||||
/* 0D81B0 800D75B0 004FC025 */ or $t8, $v0, $t7
|
||||
/* 0D81B4 800D75B4 A7B80020 */ sh $t8, 0x20($sp)
|
||||
/* 0D81B8 800D75B8 AFA00018 */ sw $zero, 0x18($sp)
|
||||
.L800D75BC:
|
||||
/* 0D81BC 800D75BC 8FA80050 */ lw $t0, 0x50($sp)
|
||||
/* 0D81C0 800D75C0 8FAA0018 */ lw $t2, 0x18($sp)
|
||||
/* 0D81C4 800D75C4 91090000 */ lbu $t1, ($t0)
|
||||
/* 0D81C8 800D75C8 03AA5821 */ addu $t3, $sp, $t2
|
||||
/* 0D81CC 800D75CC A1690022 */ sb $t1, 0x22($t3)
|
||||
/* 0D81D0 800D75D0 8FAE0018 */ lw $t6, 0x18($sp)
|
||||
/* 0D81D4 800D75D4 8FAC0050 */ lw $t4, 0x50($sp)
|
||||
/* 0D81D8 800D75D8 25CF0001 */ addiu $t7, $t6, 1
|
||||
/* 0D81DC 800D75DC 29E10020 */ slti $at, $t7, 0x20
|
||||
/* 0D81E0 800D75E0 258D0001 */ addiu $t5, $t4, 1
|
||||
/* 0D81E4 800D75E4 AFAF0018 */ sw $t7, 0x18($sp)
|
||||
/* 0D81E8 800D75E8 1420FFF4 */ bnez $at, .L800D75BC
|
||||
/* 0D81EC 800D75EC AFAD0050 */ sw $t5, 0x50($sp)
|
||||
/* 0D81F0 800D75F0 8FB80048 */ lw $t8, 0x48($sp)
|
||||
/* 0D81F4 800D75F4 1300000E */ beqz $t8, .L800D7630
|
||||
/* 0D81F8 800D75F8 00000000 */ nop
|
||||
/* 0D81FC 800D75FC 1B00000C */ blez $t8, .L800D7630
|
||||
/* 0D8200 800D7600 AFA00018 */ sw $zero, 0x18($sp)
|
||||
.L800D7604:
|
||||
/* 0D8204 800D7604 8FB90044 */ lw $t9, 0x44($sp)
|
||||
/* 0D8208 800D7608 A3200000 */ sb $zero, ($t9)
|
||||
/* 0D820C 800D760C 8FAA0018 */ lw $t2, 0x18($sp)
|
||||
/* 0D8210 800D7610 8FAC0048 */ lw $t4, 0x48($sp)
|
||||
/* 0D8214 800D7614 8FA80044 */ lw $t0, 0x44($sp)
|
||||
/* 0D8218 800D7618 254B0001 */ addiu $t3, $t2, 1
|
||||
/* 0D821C 800D761C 016C082A */ slt $at, $t3, $t4
|
||||
/* 0D8220 800D7620 25090001 */ addiu $t1, $t0, 1
|
||||
/* 0D8224 800D7624 AFAB0018 */ sw $t3, 0x18($sp)
|
||||
/* 0D8228 800D7628 1420FFF6 */ bnez $at, .L800D7604
|
||||
/* 0D822C 800D762C AFA90044 */ sw $t1, 0x44($sp)
|
||||
.L800D7630:
|
||||
/* 0D8230 800D7630 27AE001C */ addiu $t6, $sp, 0x1c
|
||||
/* 0D8234 800D7634 25D80024 */ addiu $t8, $t6, 0x24
|
||||
/* 0D8238 800D7638 8FAD0044 */ lw $t5, 0x44($sp)
|
||||
.L800D763C:
|
||||
/* 0D823C 800D763C 8DC10000 */ lw $at, ($t6)
|
||||
/* 0D8240 800D7640 25CE000C */ addiu $t6, $t6, 0xc
|
||||
/* 0D8244 800D7644 25AD000C */ addiu $t5, $t5, 0xc
|
||||
/* 0D8248 800D7648 A9A1FFF4 */ swl $at, -0xc($t5)
|
||||
/* 0D824C 800D764C B9A1FFF7 */ swr $at, -9($t5)
|
||||
/* 0D8250 800D7650 8DC1FFF8 */ lw $at, -8($t6)
|
||||
/* 0D8254 800D7654 A9A1FFF8 */ swl $at, -8($t5)
|
||||
/* 0D8258 800D7658 B9A1FFFB */ swr $at, -5($t5)
|
||||
/* 0D825C 800D765C 8DC1FFFC */ lw $at, -4($t6)
|
||||
/* 0D8260 800D7660 A9A1FFFC */ swl $at, -4($t5)
|
||||
/* 0D8264 800D7664 15D8FFF5 */ bne $t6, $t8, .L800D763C
|
||||
/* 0D8268 800D7668 B9A1FFFF */ swr $at, -1($t5)
|
||||
/* 0D826C 800D766C 8DC10000 */ lw $at, ($t6)
|
||||
/* 0D8270 800D7670 240900FE */ li $t1, 254
|
||||
/* 0D8274 800D7674 A9A10000 */ swl $at, ($t5)
|
||||
/* 0D8278 800D7678 B9A10003 */ swr $at, 3($t5)
|
||||
/* 0D827C 800D767C 8FB90044 */ lw $t9, 0x44($sp)
|
||||
/* 0D8280 800D7680 27280028 */ addiu $t0, $t9, 0x28
|
||||
/* 0D8284 800D7684 AFA80044 */ sw $t0, 0x44($sp)
|
||||
/* 0D8288 800D7688 A1090000 */ sb $t1, ($t0)
|
||||
/* 0D828C 800D768C 8FBF0014 */ lw $ra, 0x14($sp)
|
||||
/* 0D8290 800D7690 27BD0048 */ addiu $sp, $sp, 0x48
|
||||
/* 0D8294 800D7694 03E00008 */ jr $ra
|
||||
/* 0D8298 800D7698 00000000 */ nop
|
||||
|
||||
/* 0D829C 800D769C 00000000 */ nop
|
||||
|
|
@ -0,0 +1,132 @@
|
|||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel func_800CE720
|
||||
/* 0CF320 800CE720 27BDFFE0 */ addiu $sp, $sp, -0x20
|
||||
/* 0CF324 800CE724 AFBF0014 */ sw $ra, 0x14($sp)
|
||||
/* 0CF328 800CE728 AFA40020 */ sw $a0, 0x20($sp)
|
||||
/* 0CF32C 800CE72C AFA50024 */ sw $a1, 0x24($sp)
|
||||
/* 0CF330 800CE730 AFA60028 */ sw $a2, 0x28($sp)
|
||||
/* 0CF334 800CE734 0C034EE8 */ jal __osSiGetAccess
|
||||
/* 0CF338 800CE738 AFA0001C */ sw $zero, 0x1c($sp)
|
||||
/* 0CF33C 800CE73C 8FA40020 */ lw $a0, 0x20($sp)
|
||||
/* 0CF340 800CE740 0C0339F5 */ jal func_800CE7D4
|
||||
/* 0CF344 800CE744 8FA50028 */ lw $a1, 0x28($sp)
|
||||
/* 0CF348 800CE748 0C034EF9 */ jal __osSiRelAccess
|
||||
/* 0CF34C 800CE74C AFA2001C */ sw $v0, 0x1c($sp)
|
||||
/* 0CF350 800CE750 8FAE001C */ lw $t6, 0x1c($sp)
|
||||
/* 0CF354 800CE754 11C00003 */ beqz $t6, .L800CE764
|
||||
/* 0CF358 800CE758 00000000 */ nop
|
||||
/* 0CF35C 800CE75C 10000019 */ b .L800CE7C4
|
||||
/* 0CF360 800CE760 01C01025 */ move $v0, $t6
|
||||
.L800CE764:
|
||||
/* 0CF364 800CE764 8FAF0020 */ lw $t7, 0x20($sp)
|
||||
/* 0CF368 800CE768 8FB80024 */ lw $t8, 0x24($sp)
|
||||
/* 0CF36C 800CE76C AF0F0004 */ sw $t7, 4($t8)
|
||||
/* 0CF370 800CE770 8FA80024 */ lw $t0, 0x24($sp)
|
||||
/* 0CF374 800CE774 8FB90028 */ lw $t9, 0x28($sp)
|
||||
/* 0CF378 800CE778 AD190008 */ sw $t9, 8($t0)
|
||||
/* 0CF37C 800CE77C 8FA90024 */ lw $t1, 0x24($sp)
|
||||
/* 0CF380 800CE780 AD200000 */ sw $zero, ($t1)
|
||||
/* 0CF384 800CE784 0C0352D9 */ jal __osGetId
|
||||
/* 0CF388 800CE788 8FA40024 */ lw $a0, 0x24($sp)
|
||||
/* 0CF38C 800CE78C AFA2001C */ sw $v0, 0x1c($sp)
|
||||
/* 0CF390 800CE790 8FAA001C */ lw $t2, 0x1c($sp)
|
||||
/* 0CF394 800CE794 11400003 */ beqz $t2, .L800CE7A4
|
||||
/* 0CF398 800CE798 00000000 */ nop
|
||||
/* 0CF39C 800CE79C 10000009 */ b .L800CE7C4
|
||||
/* 0CF3A0 800CE7A0 01401025 */ move $v0, $t2
|
||||
.L800CE7A4:
|
||||
/* 0CF3A4 800CE7A4 0C035494 */ jal osPfsChecker
|
||||
/* 0CF3A8 800CE7A8 8FA40024 */ lw $a0, 0x24($sp)
|
||||
/* 0CF3AC 800CE7AC 8FAB0024 */ lw $t3, 0x24($sp)
|
||||
/* 0CF3B0 800CE7B0 AFA2001C */ sw $v0, 0x1c($sp)
|
||||
/* 0CF3B4 800CE7B4 8D6C0000 */ lw $t4, ($t3)
|
||||
/* 0CF3B8 800CE7B8 358D0001 */ ori $t5, $t4, 1
|
||||
/* 0CF3BC 800CE7BC AD6D0000 */ sw $t5, ($t3)
|
||||
/* 0CF3C0 800CE7C0 8FA2001C */ lw $v0, 0x1c($sp)
|
||||
.L800CE7C4:
|
||||
/* 0CF3C4 800CE7C4 8FBF0014 */ lw $ra, 0x14($sp)
|
||||
/* 0CF3C8 800CE7C8 27BD0020 */ addiu $sp, $sp, 0x20
|
||||
/* 0CF3CC 800CE7CC 03E00008 */ jr $ra
|
||||
/* 0CF3D0 800CE7D0 00000000 */ nop
|
||||
|
||||
glabel func_800CE7D4
|
||||
/* 0CF3D4 800CE7D4 27BDFFC8 */ addiu $sp, $sp, -0x38
|
||||
/* 0CF3D8 800CE7D8 AFBF0014 */ sw $ra, 0x14($sp)
|
||||
/* 0CF3DC 800CE7DC AFA40038 */ sw $a0, 0x38($sp)
|
||||
/* 0CF3E0 800CE7E0 AFA5003C */ sw $a1, 0x3c($sp)
|
||||
/* 0CF3E4 800CE7E4 AFA00034 */ sw $zero, 0x34($sp)
|
||||
/* 0CF3E8 800CE7E8 0C033954 */ jal __osPfsRequestData
|
||||
/* 0CF3EC 800CE7EC 00002025 */ move $a0, $zero
|
||||
/* 0CF3F0 800CE7F0 3C058019 */ lui $a1, %hi(__osPfsPifRam) # $a1, 0x8019
|
||||
/* 0CF3F4 800CE7F4 24A56590 */ addiu $a1, %lo(__osPfsPifRam) # addiu $a1, $a1, 0x6590
|
||||
/* 0CF3F8 800CE7F8 0C034EA8 */ jal __osSiRawStartDma
|
||||
/* 0CF3FC 800CE7FC 24040001 */ li $a0, 1
|
||||
/* 0CF400 800CE800 AFA20034 */ sw $v0, 0x34($sp)
|
||||
/* 0CF404 800CE804 8FA40038 */ lw $a0, 0x38($sp)
|
||||
/* 0CF408 800CE808 27A50030 */ addiu $a1, $sp, 0x30
|
||||
/* 0CF40C 800CE80C 0C0335D4 */ jal osRecvMesg
|
||||
/* 0CF410 800CE810 24060001 */ li $a2, 1
|
||||
/* 0CF414 800CE814 3C058019 */ lui $a1, %hi(__osPfsPifRam) # $a1, 0x8019
|
||||
/* 0CF418 800CE818 24A56590 */ addiu $a1, %lo(__osPfsPifRam) # addiu $a1, $a1, 0x6590
|
||||
/* 0CF41C 800CE81C 0C034EA8 */ jal __osSiRawStartDma
|
||||
/* 0CF420 800CE820 00002025 */ move $a0, $zero
|
||||
/* 0CF424 800CE824 AFA20034 */ sw $v0, 0x34($sp)
|
||||
/* 0CF428 800CE828 8FA40038 */ lw $a0, 0x38($sp)
|
||||
/* 0CF42C 800CE82C 27A50030 */ addiu $a1, $sp, 0x30
|
||||
/* 0CF430 800CE830 0C0335D4 */ jal osRecvMesg
|
||||
/* 0CF434 800CE834 24060001 */ li $a2, 1
|
||||
/* 0CF438 800CE838 27A4002F */ addiu $a0, $sp, 0x2f
|
||||
/* 0CF43C 800CE83C 0C033993 */ jal __osPfsGetInitData
|
||||
/* 0CF440 800CE840 27A5001C */ addiu $a1, $sp, 0x1c
|
||||
/* 0CF444 800CE844 8FAE003C */ lw $t6, 0x3c($sp)
|
||||
/* 0CF448 800CE848 000E7880 */ sll $t7, $t6, 2
|
||||
/* 0CF44C 800CE84C 03AFC021 */ addu $t8, $sp, $t7
|
||||
/* 0CF450 800CE850 9318001E */ lbu $t8, 0x1e($t8)
|
||||
/* 0CF454 800CE854 33190001 */ andi $t9, $t8, 1
|
||||
/* 0CF458 800CE858 13200006 */ beqz $t9, .L800CE874
|
||||
/* 0CF45C 800CE85C 00000000 */ nop
|
||||
/* 0CF460 800CE860 33080002 */ andi $t0, $t8, 2
|
||||
/* 0CF464 800CE864 11000003 */ beqz $t0, .L800CE874
|
||||
/* 0CF468 800CE868 00000000 */ nop
|
||||
/* 0CF46C 800CE86C 10000018 */ b .L800CE8D0
|
||||
/* 0CF470 800CE870 24020002 */ li $v0, 2
|
||||
.L800CE874:
|
||||
/* 0CF474 800CE874 8FA9003C */ lw $t1, 0x3c($sp)
|
||||
/* 0CF478 800CE878 27AB001C */ addiu $t3, $sp, 0x1c
|
||||
/* 0CF47C 800CE87C 00095080 */ sll $t2, $t1, 2
|
||||
/* 0CF480 800CE880 014B6021 */ addu $t4, $t2, $t3
|
||||
/* 0CF484 800CE884 918D0003 */ lbu $t5, 3($t4)
|
||||
/* 0CF488 800CE888 15A00005 */ bnez $t5, .L800CE8A0
|
||||
/* 0CF48C 800CE88C 00000000 */ nop
|
||||
/* 0CF490 800CE890 918E0002 */ lbu $t6, 2($t4)
|
||||
/* 0CF494 800CE894 31CF0001 */ andi $t7, $t6, 1
|
||||
/* 0CF498 800CE898 15E00003 */ bnez $t7, .L800CE8A8
|
||||
/* 0CF49C 800CE89C 00000000 */ nop
|
||||
.L800CE8A0:
|
||||
/* 0CF4A0 800CE8A0 1000000B */ b .L800CE8D0
|
||||
/* 0CF4A4 800CE8A4 24020001 */ li $v0, 1
|
||||
.L800CE8A8:
|
||||
/* 0CF4A8 800CE8A8 8FB9003C */ lw $t9, 0x3c($sp)
|
||||
/* 0CF4AC 800CE8AC 0019C080 */ sll $t8, $t9, 2
|
||||
/* 0CF4B0 800CE8B0 03B84021 */ addu $t0, $sp, $t8
|
||||
/* 0CF4B4 800CE8B4 9108001E */ lbu $t0, 0x1e($t0)
|
||||
/* 0CF4B8 800CE8B8 31090004 */ andi $t1, $t0, 4
|
||||
/* 0CF4BC 800CE8BC 11200003 */ beqz $t1, .L800CE8CC
|
||||
/* 0CF4C0 800CE8C0 00000000 */ nop
|
||||
/* 0CF4C4 800CE8C4 10000002 */ b .L800CE8D0
|
||||
/* 0CF4C8 800CE8C8 24020004 */ li $v0, 4
|
||||
.L800CE8CC:
|
||||
/* 0CF4CC 800CE8CC 8FA20034 */ lw $v0, 0x34($sp)
|
||||
.L800CE8D0:
|
||||
/* 0CF4D0 800CE8D0 8FBF0014 */ lw $ra, 0x14($sp)
|
||||
/* 0CF4D4 800CE8D4 27BD0038 */ addiu $sp, $sp, 0x38
|
||||
/* 0CF4D8 800CE8D8 03E00008 */ jr $ra
|
||||
/* 0CF4DC 800CE8DC 00000000 */ nop
|
||||
|
|
@ -0,0 +1,184 @@
|
|||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel guPerspectiveF
|
||||
/* 0CFD00 800CF100 27BDFFD0 */ addiu $sp, $sp, -0x30
|
||||
/* 0CFD04 800CF104 44867000 */ mtc1 $a2, $f14
|
||||
/* 0CFD08 800CF108 AFBF0014 */ sw $ra, 0x14($sp)
|
||||
/* 0CFD0C 800CF10C AFA7003C */ sw $a3, 0x3c($sp)
|
||||
/* 0CFD10 800CF110 AFA40030 */ sw $a0, 0x30($sp)
|
||||
/* 0CFD14 800CF114 AFA50034 */ sw $a1, 0x34($sp)
|
||||
/* 0CFD18 800CF118 0C034FA8 */ jal guMtxIdentF
|
||||
/* 0CFD1C 800CF11C E7AE0038 */ swc1 $f14, 0x38($sp)
|
||||
/* 0CFD20 800CF120 C7AE0038 */ lwc1 $f14, 0x38($sp)
|
||||
/* 0CFD24 800CF124 3C01800F */ lui $at, %hi(D_800F39F0)
|
||||
/* 0CFD28 800CF128 D42639F0 */ ldc1 $f6, %lo(D_800F39F0)($at)
|
||||
/* 0CFD2C 800CF12C 46007121 */ cvt.d.s $f4, $f14
|
||||
/* 0CFD30 800CF130 3C014000 */ li $at, 0x40000000 # 2.000000
|
||||
/* 0CFD34 800CF134 46262202 */ mul.d $f8, $f4, $f6
|
||||
/* 0CFD38 800CF138 44815000 */ mtc1 $at, $f10
|
||||
/* 0CFD3C 800CF13C 462043A0 */ cvt.s.d $f14, $f8
|
||||
/* 0CFD40 800CF140 460A7303 */ div.s $f12, $f14, $f10
|
||||
/* 0CFD44 800CF144 0C0358AC */ jal cosf
|
||||
/* 0CFD48 800CF148 E7AC001C */ swc1 $f12, 0x1c($sp)
|
||||
/* 0CFD4C 800CF14C C7AC001C */ lwc1 $f12, 0x1c($sp)
|
||||
/* 0CFD50 800CF150 0C03583C */ jal sinf
|
||||
/* 0CFD54 800CF154 E7A00020 */ swc1 $f0, 0x20($sp)
|
||||
/* 0CFD58 800CF158 C7A40020 */ lwc1 $f4, 0x20($sp)
|
||||
/* 0CFD5C 800CF15C C7A6003C */ lwc1 $f6, 0x3c($sp)
|
||||
/* 0CFD60 800CF160 C7AE0040 */ lwc1 $f14, 0x40($sp)
|
||||
/* 0CFD64 800CF164 46002083 */ div.s $f2, $f4, $f0
|
||||
/* 0CFD68 800CF168 C7B00044 */ lwc1 $f16, 0x44($sp)
|
||||
/* 0CFD6C 800CF16C 3C01BF80 */ li $at, 0xBF800000 # -1.000000
|
||||
/* 0CFD70 800CF170 44812000 */ mtc1 $at, $f4
|
||||
/* 0CFD74 800CF174 46107480 */ add.s $f18, $f14, $f16
|
||||
/* 0CFD78 800CF178 8FA20030 */ lw $v0, 0x30($sp)
|
||||
/* 0CFD7C 800CF17C 3C014000 */ li $at, 0x40000000 # 2.000000
|
||||
/* 0CFD80 800CF180 46107301 */ sub.s $f12, $f14, $f16
|
||||
/* 0CFD84 800CF184 8FA50034 */ lw $a1, 0x34($sp)
|
||||
/* 0CFD88 800CF188 E444002C */ swc1 $f4, 0x2c($v0)
|
||||
/* 0CFD8C 800CF18C 00001825 */ move $v1, $zero
|
||||
/* 0CFD90 800CF190 24040004 */ li $a0, 4
|
||||
/* 0CFD94 800CF194 460C9283 */ div.s $f10, $f18, $f12
|
||||
/* 0CFD98 800CF198 E4420014 */ swc1 $f2, 0x14($v0)
|
||||
/* 0CFD9C 800CF19C 46061203 */ div.s $f8, $f2, $f6
|
||||
/* 0CFDA0 800CF1A0 44813000 */ mtc1 $at, $f6
|
||||
/* 0CFDA4 800CF1A4 E44A0028 */ swc1 $f10, 0x28($v0)
|
||||
/* 0CFDA8 800CF1A8 E4480000 */ swc1 $f8, ($v0)
|
||||
/* 0CFDAC 800CF1AC 460E3202 */ mul.s $f8, $f6, $f14
|
||||
/* 0CFDB0 800CF1B0 44803000 */ mtc1 $zero, $f6
|
||||
/* 0CFDB4 800CF1B4 00000000 */ nop
|
||||
/* 0CFDB8 800CF1B8 E446003C */ swc1 $f6, 0x3c($v0)
|
||||
/* 0CFDBC 800CF1BC 46104282 */ mul.s $f10, $f8, $f16
|
||||
/* 0CFDC0 800CF1C0 460C5103 */ div.s $f4, $f10, $f12
|
||||
/* 0CFDC4 800CF1C4 E4440038 */ swc1 $f4, 0x38($v0)
|
||||
/* 0CFDC8 800CF1C8 C7A00048 */ lwc1 $f0, 0x48($sp)
|
||||
/* 0CFDCC 800CF1CC C4460000 */ lwc1 $f6, ($v0)
|
||||
/* 0CFDD0 800CF1D0 24630001 */ addiu $v1, $v1, 1
|
||||
/* 0CFDD4 800CF1D4 C4500004 */ lwc1 $f16, 4($v0)
|
||||
/* 0CFDD8 800CF1D8 46003282 */ mul.s $f10, $f6, $f0
|
||||
/* 0CFDDC 800CF1DC C44C0008 */ lwc1 $f12, 8($v0)
|
||||
/* 0CFDE0 800CF1E0 10640010 */ beq $v1, $a0, .L800CF224
|
||||
/* 0CFDE4 800CF1E4 C44E000C */ lwc1 $f14, 0xc($v0)
|
||||
.L800CF1E8:
|
||||
/* 0CFDE8 800CF1E8 46008202 */ mul.s $f8, $f16, $f0
|
||||
/* 0CFDEC 800CF1EC C4460010 */ lwc1 $f6, 0x10($v0)
|
||||
/* 0CFDF0 800CF1F0 C4500014 */ lwc1 $f16, 0x14($v0)
|
||||
/* 0CFDF4 800CF1F4 46006102 */ mul.s $f4, $f12, $f0
|
||||
/* 0CFDF8 800CF1F8 C44C0018 */ lwc1 $f12, 0x18($v0)
|
||||
/* 0CFDFC 800CF1FC 24630001 */ addiu $v1, $v1, 1
|
||||
/* 0CFE00 800CF200 46007082 */ mul.s $f2, $f14, $f0
|
||||
/* 0CFE04 800CF204 C44E001C */ lwc1 $f14, 0x1c($v0)
|
||||
/* 0CFE08 800CF208 E44A0000 */ swc1 $f10, ($v0)
|
||||
/* 0CFE0C 800CF20C 46003282 */ mul.s $f10, $f6, $f0
|
||||
/* 0CFE10 800CF210 E4480004 */ swc1 $f8, 4($v0)
|
||||
/* 0CFE14 800CF214 E4440008 */ swc1 $f4, 8($v0)
|
||||
/* 0CFE18 800CF218 24420010 */ addiu $v0, $v0, 0x10
|
||||
/* 0CFE1C 800CF21C 1464FFF2 */ bne $v1, $a0, .L800CF1E8
|
||||
/* 0CFE20 800CF220 E442FFFC */ swc1 $f2, -4($v0)
|
||||
.L800CF224:
|
||||
/* 0CFE24 800CF224 46008202 */ mul.s $f8, $f16, $f0
|
||||
/* 0CFE28 800CF228 24420010 */ addiu $v0, $v0, 0x10
|
||||
/* 0CFE2C 800CF22C E44AFFF0 */ swc1 $f10, -0x10($v0)
|
||||
/* 0CFE30 800CF230 46006102 */ mul.s $f4, $f12, $f0
|
||||
/* 0CFE34 800CF234 00000000 */ nop
|
||||
/* 0CFE38 800CF238 46007082 */ mul.s $f2, $f14, $f0
|
||||
/* 0CFE3C 800CF23C E448FFF4 */ swc1 $f8, -0xc($v0)
|
||||
/* 0CFE40 800CF240 E444FFF8 */ swc1 $f4, -8($v0)
|
||||
/* 0CFE44 800CF244 E442FFFC */ swc1 $f2, -4($v0)
|
||||
/* 0CFE48 800CF248 10A00035 */ beqz $a1, .L800CF320
|
||||
/* 0CFE4C 800CF24C 3C014000 */ li $at, 0x40000000 # 2.000000
|
||||
/* 0CFE50 800CF250 44814800 */ mtc1 $at, $f9
|
||||
/* 0CFE54 800CF254 44804000 */ mtc1 $zero, $f8
|
||||
/* 0CFE58 800CF258 46009021 */ cvt.d.s $f0, $f18
|
||||
/* 0CFE5C 800CF25C 340EFFFF */ li $t6, 65535
|
||||
/* 0CFE60 800CF260 4628003E */ c.le.d $f0, $f8
|
||||
/* 0CFE64 800CF264 3C014100 */ li $at, 0x41000000 # 8.000000
|
||||
/* 0CFE68 800CF268 45020004 */ bc1fl .L800CF27C
|
||||
/* 0CFE6C 800CF26C 44815800 */ mtc1 $at, $f11
|
||||
/* 0CFE70 800CF270 1000002B */ b .L800CF320
|
||||
/* 0CFE74 800CF274 A4AE0000 */ sh $t6, ($a1)
|
||||
/* 0CFE78 800CF278 44815800 */ mtc1 $at, $f11
|
||||
.L800CF27C:
|
||||
/* 0CFE7C 800CF27C 44805000 */ mtc1 $zero, $f10
|
||||
/* 0CFE80 800CF280 24180001 */ li $t8, 1
|
||||
/* 0CFE84 800CF284 3C0141E0 */ li $at, 0x41E00000 # 28.000000
|
||||
/* 0CFE88 800CF288 46205103 */ div.d $f4, $f10, $f0
|
||||
/* 0CFE8C 800CF28C 24080001 */ li $t0, 1
|
||||
/* 0CFE90 800CF290 444FF800 */ cfc1 $t7, $31
|
||||
/* 0CFE94 800CF294 44D8F800 */ ctc1 $t8, $31
|
||||
/* 0CFE98 800CF298 00000000 */ nop
|
||||
/* 0CFE9C 800CF29C 462021A4 */ cvt.w.d $f6, $f4
|
||||
/* 0CFEA0 800CF2A0 4458F800 */ cfc1 $t8, $31
|
||||
/* 0CFEA4 800CF2A4 00000000 */ nop
|
||||
/* 0CFEA8 800CF2A8 33180078 */ andi $t8, $t8, 0x78
|
||||
/* 0CFEAC 800CF2AC 53000014 */ beql $t8, $zero, .L800CF300
|
||||
/* 0CFEB0 800CF2B0 44183000 */ mfc1 $t8, $f6
|
||||
/* 0CFEB4 800CF2B4 44813800 */ mtc1 $at, $f7
|
||||
/* 0CFEB8 800CF2B8 44803000 */ mtc1 $zero, $f6
|
||||
/* 0CFEBC 800CF2BC 24180001 */ li $t8, 1
|
||||
/* 0CFEC0 800CF2C0 46262181 */ sub.d $f6, $f4, $f6
|
||||
/* 0CFEC4 800CF2C4 44D8F800 */ ctc1 $t8, $31
|
||||
/* 0CFEC8 800CF2C8 00000000 */ nop
|
||||
/* 0CFECC 800CF2CC 462031A4 */ cvt.w.d $f6, $f6
|
||||
/* 0CFED0 800CF2D0 4458F800 */ cfc1 $t8, $31
|
||||
/* 0CFED4 800CF2D4 00000000 */ nop
|
||||
/* 0CFED8 800CF2D8 33180078 */ andi $t8, $t8, 0x78
|
||||
/* 0CFEDC 800CF2DC 17000005 */ bnez $t8, .L800CF2F4
|
||||
/* 0CFEE0 800CF2E0 00000000 */ nop
|
||||
/* 0CFEE4 800CF2E4 44183000 */ mfc1 $t8, $f6
|
||||
/* 0CFEE8 800CF2E8 3C018000 */ lui $at, 0x8000
|
||||
/* 0CFEEC 800CF2EC 10000007 */ b .L800CF30C
|
||||
/* 0CFEF0 800CF2F0 0301C025 */ or $t8, $t8, $at
|
||||
.L800CF2F4:
|
||||
/* 0CFEF4 800CF2F4 10000005 */ b .L800CF30C
|
||||
/* 0CFEF8 800CF2F8 2418FFFF */ li $t8, -1
|
||||
/* 0CFEFC 800CF2FC 44183000 */ mfc1 $t8, $f6
|
||||
.L800CF300:
|
||||
/* 0CFF00 800CF300 00000000 */ nop
|
||||
/* 0CFF04 800CF304 0700FFFB */ bltz $t8, .L800CF2F4
|
||||
/* 0CFF08 800CF308 00000000 */ nop
|
||||
.L800CF30C:
|
||||
/* 0CFF0C 800CF30C 44CFF800 */ ctc1 $t7, $31
|
||||
/* 0CFF10 800CF310 3319FFFF */ andi $t9, $t8, 0xffff
|
||||
/* 0CFF14 800CF314 1F200002 */ bgtz $t9, .L800CF320
|
||||
/* 0CFF18 800CF318 A4B80000 */ sh $t8, ($a1)
|
||||
/* 0CFF1C 800CF31C A4A80000 */ sh $t0, ($a1)
|
||||
.L800CF320:
|
||||
/* 0CFF20 800CF320 8FBF0014 */ lw $ra, 0x14($sp)
|
||||
/* 0CFF24 800CF324 27BD0030 */ addiu $sp, $sp, 0x30
|
||||
/* 0CFF28 800CF328 03E00008 */ jr $ra
|
||||
/* 0CFF2C 800CF32C 00000000 */ nop
|
||||
|
||||
glabel guPerspective
|
||||
/* 0CFF30 800CF330 27BDFF98 */ addiu $sp, $sp, -0x68
|
||||
/* 0CFF34 800CF334 44866000 */ mtc1 $a2, $f12
|
||||
/* 0CFF38 800CF338 44877000 */ mtc1 $a3, $f14
|
||||
/* 0CFF3C 800CF33C C7A40078 */ lwc1 $f4, 0x78($sp)
|
||||
/* 0CFF40 800CF340 C7A6007C */ lwc1 $f6, 0x7c($sp)
|
||||
/* 0CFF44 800CF344 C7A80080 */ lwc1 $f8, 0x80($sp)
|
||||
/* 0CFF48 800CF348 AFBF0024 */ sw $ra, 0x24($sp)
|
||||
/* 0CFF4C 800CF34C AFA40068 */ sw $a0, 0x68($sp)
|
||||
/* 0CFF50 800CF350 44066000 */ mfc1 $a2, $f12
|
||||
/* 0CFF54 800CF354 44077000 */ mfc1 $a3, $f14
|
||||
/* 0CFF58 800CF358 27A40028 */ addiu $a0, $sp, 0x28
|
||||
/* 0CFF5C 800CF35C E7A40010 */ swc1 $f4, 0x10($sp)
|
||||
/* 0CFF60 800CF360 E7A60014 */ swc1 $f6, 0x14($sp)
|
||||
/* 0CFF64 800CF364 0C033C40 */ jal guPerspectiveF
|
||||
/* 0CFF68 800CF368 E7A80018 */ swc1 $f8, 0x18($sp)
|
||||
/* 0CFF6C 800CF36C 27A40028 */ addiu $a0, $sp, 0x28
|
||||
/* 0CFF70 800CF370 0C034F68 */ jal guMtxF2L
|
||||
/* 0CFF74 800CF374 8FA50068 */ lw $a1, 0x68($sp)
|
||||
/* 0CFF78 800CF378 8FBF0024 */ lw $ra, 0x24($sp)
|
||||
/* 0CFF7C 800CF37C 27BD0068 */ addiu $sp, $sp, 0x68
|
||||
/* 0CFF80 800CF380 03E00008 */ jr $ra
|
||||
/* 0CFF84 800CF384 00000000 */ nop
|
||||
|
||||
/* 0CFF88 800CF388 00000000 */ nop
|
||||
/* 0CFF8C 800CF38C 00000000 */ nop
|
||||
|
|
@ -0,0 +1,137 @@
|
|||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel guRotateF
|
||||
/* 0CFA70 800CEE70 27BDFFC8 */ addiu $sp, $sp, -0x38
|
||||
/* 0CFA74 800CEE74 3C01800F */ lui $at, %hi(D_800F39E0) # $at, 0x800f
|
||||
/* 0CFA78 800CEE78 C42439E0 */ lwc1 $f4, %lo(D_800F39E0)($at)
|
||||
/* 0CFA7C 800CEE7C AFB00018 */ sw $s0, 0x18($sp)
|
||||
/* 0CFA80 800CEE80 00808025 */ move $s0, $a0
|
||||
/* 0CFA84 800CEE84 3C018019 */ lui $at, %hi(D_801965D0)
|
||||
/* 0CFA88 800CEE88 AFBF001C */ sw $ra, 0x1c($sp)
|
||||
/* 0CFA8C 800CEE8C AFA5003C */ sw $a1, 0x3c($sp)
|
||||
/* 0CFA90 800CEE90 AFA60040 */ sw $a2, 0x40($sp)
|
||||
/* 0CFA94 800CEE94 AFA70044 */ sw $a3, 0x44($sp)
|
||||
/* 0CFA98 800CEE98 27A60048 */ addiu $a2, $sp, 0x48
|
||||
/* 0CFA9C 800CEE9C 27A50044 */ addiu $a1, $sp, 0x44
|
||||
/* 0CFAA0 800CEEA0 27A40040 */ addiu $a0, $sp, 0x40
|
||||
/* 0CFAA4 800CEEA4 0C035818 */ jal guNormalize
|
||||
/* 0CFAA8 800CEEA8 E42465D0 */ swc1 $f4, %lo(D_801965D0)($at)
|
||||
/* 0CFAAC 800CEEAC 3C018019 */ lui $at, %hi(D_801965D0)
|
||||
/* 0CFAB0 800CEEB0 C7AC003C */ lwc1 $f12, 0x3c($sp)
|
||||
/* 0CFAB4 800CEEB4 C42665D0 */ lwc1 $f6, %lo(D_801965D0)($at)
|
||||
/* 0CFAB8 800CEEB8 46066302 */ mul.s $f12, $f12, $f6
|
||||
/* 0CFABC 800CEEBC 0C03583C */ jal sinf
|
||||
/* 0CFAC0 800CEEC0 E7AC003C */ swc1 $f12, 0x3c($sp)
|
||||
/* 0CFAC4 800CEEC4 C7AC003C */ lwc1 $f12, 0x3c($sp)
|
||||
/* 0CFAC8 800CEEC8 0C0358AC */ jal cosf
|
||||
/* 0CFACC 800CEECC E7A00034 */ swc1 $f0, 0x34($sp)
|
||||
/* 0CFAD0 800CEED0 C7AA0040 */ lwc1 $f10, 0x40($sp)
|
||||
/* 0CFAD4 800CEED4 C7A40044 */ lwc1 $f4, 0x44($sp)
|
||||
/* 0CFAD8 800CEED8 3C013F80 */ li $at, 0x3F800000 # 1.000000
|
||||
/* 0CFADC 800CEEDC 44814000 */ mtc1 $at, $f8
|
||||
/* 0CFAE0 800CEEE0 46045182 */ mul.s $f6, $f10, $f4
|
||||
/* 0CFAE4 800CEEE4 02002025 */ move $a0, $s0
|
||||
/* 0CFAE8 800CEEE8 46004081 */ sub.s $f2, $f8, $f0
|
||||
/* 0CFAEC 800CEEEC C7A80048 */ lwc1 $f8, 0x48($sp)
|
||||
/* 0CFAF0 800CEEF0 E7A00030 */ swc1 $f0, 0x30($sp)
|
||||
/* 0CFAF4 800CEEF4 46023402 */ mul.s $f16, $f6, $f2
|
||||
/* 0CFAF8 800CEEF8 00000000 */ nop
|
||||
/* 0CFAFC 800CEEFC 46082182 */ mul.s $f6, $f4, $f8
|
||||
/* 0CFB00 800CEF00 E7B0002C */ swc1 $f16, 0x2c($sp)
|
||||
/* 0CFB04 800CEF04 46023482 */ mul.s $f18, $f6, $f2
|
||||
/* 0CFB08 800CEF08 00000000 */ nop
|
||||
/* 0CFB0C 800CEF0C 460A4102 */ mul.s $f4, $f8, $f10
|
||||
/* 0CFB10 800CEF10 E7B20028 */ swc1 $f18, 0x28($sp)
|
||||
/* 0CFB14 800CEF14 46022182 */ mul.s $f6, $f4, $f2
|
||||
/* 0CFB18 800CEF18 0C034FA8 */ jal guMtxIdentF
|
||||
/* 0CFB1C 800CEF1C E7A60024 */ swc1 $f6, 0x24($sp)
|
||||
/* 0CFB20 800CEF20 C7A80040 */ lwc1 $f8, 0x40($sp)
|
||||
/* 0CFB24 800CEF24 3C013F80 */ li $at, 0x3F800000 # 1.000000
|
||||
/* 0CFB28 800CEF28 44815000 */ mtc1 $at, $f10
|
||||
/* 0CFB2C 800CEF2C 46084002 */ mul.s $f0, $f8, $f8
|
||||
/* 0CFB30 800CEF30 C7AC0030 */ lwc1 $f12, 0x30($sp)
|
||||
/* 0CFB34 800CEF34 C7AE0034 */ lwc1 $f14, 0x34($sp)
|
||||
/* 0CFB38 800CEF38 C7B0002C */ lwc1 $f16, 0x2c($sp)
|
||||
/* 0CFB3C 800CEF3C C7B20028 */ lwc1 $f18, 0x28($sp)
|
||||
/* 0CFB40 800CEF40 46005101 */ sub.s $f4, $f10, $f0
|
||||
/* 0CFB44 800CEF44 460C2182 */ mul.s $f6, $f4, $f12
|
||||
/* 0CFB48 800CEF48 46003200 */ add.s $f8, $f6, $f0
|
||||
/* 0CFB4C 800CEF4C E6080000 */ swc1 $f8, ($s0)
|
||||
/* 0CFB50 800CEF50 C7AA0040 */ lwc1 $f10, 0x40($sp)
|
||||
/* 0CFB54 800CEF54 460E5102 */ mul.s $f4, $f10, $f14
|
||||
/* 0CFB58 800CEF58 46049181 */ sub.s $f6, $f18, $f4
|
||||
/* 0CFB5C 800CEF5C E6060024 */ swc1 $f6, 0x24($s0)
|
||||
/* 0CFB60 800CEF60 C7A80040 */ lwc1 $f8, 0x40($sp)
|
||||
/* 0CFB64 800CEF64 460E4282 */ mul.s $f10, $f8, $f14
|
||||
/* 0CFB68 800CEF68 44814000 */ mtc1 $at, $f8
|
||||
/* 0CFB6C 800CEF6C 46125100 */ add.s $f4, $f10, $f18
|
||||
/* 0CFB70 800CEF70 E6040018 */ swc1 $f4, 0x18($s0)
|
||||
/* 0CFB74 800CEF74 C7A60044 */ lwc1 $f6, 0x44($sp)
|
||||
/* 0CFB78 800CEF78 46063082 */ mul.s $f2, $f6, $f6
|
||||
/* 0CFB7C 800CEF7C 46024281 */ sub.s $f10, $f8, $f2
|
||||
/* 0CFB80 800CEF80 460C5102 */ mul.s $f4, $f10, $f12
|
||||
/* 0CFB84 800CEF84 46022180 */ add.s $f6, $f4, $f2
|
||||
/* 0CFB88 800CEF88 E6060014 */ swc1 $f6, 0x14($s0)
|
||||
/* 0CFB8C 800CEF8C C7A80044 */ lwc1 $f8, 0x44($sp)
|
||||
/* 0CFB90 800CEF90 C7A40024 */ lwc1 $f4, 0x24($sp)
|
||||
/* 0CFB94 800CEF94 460E4282 */ mul.s $f10, $f8, $f14
|
||||
/* 0CFB98 800CEF98 46045180 */ add.s $f6, $f10, $f4
|
||||
/* 0CFB9C 800CEF9C E6060020 */ swc1 $f6, 0x20($s0)
|
||||
/* 0CFBA0 800CEFA0 C7AA0044 */ lwc1 $f10, 0x44($sp)
|
||||
/* 0CFBA4 800CEFA4 C7A80024 */ lwc1 $f8, 0x24($sp)
|
||||
/* 0CFBA8 800CEFA8 460E5102 */ mul.s $f4, $f10, $f14
|
||||
/* 0CFBAC 800CEFAC 46044181 */ sub.s $f6, $f8, $f4
|
||||
/* 0CFBB0 800CEFB0 44814000 */ mtc1 $at, $f8
|
||||
/* 0CFBB4 800CEFB4 E6060008 */ swc1 $f6, 8($s0)
|
||||
/* 0CFBB8 800CEFB8 C7AA0048 */ lwc1 $f10, 0x48($sp)
|
||||
/* 0CFBBC 800CEFBC 460A5002 */ mul.s $f0, $f10, $f10
|
||||
/* 0CFBC0 800CEFC0 46004101 */ sub.s $f4, $f8, $f0
|
||||
/* 0CFBC4 800CEFC4 460C2182 */ mul.s $f6, $f4, $f12
|
||||
/* 0CFBC8 800CEFC8 46003280 */ add.s $f10, $f6, $f0
|
||||
/* 0CFBCC 800CEFCC E60A0028 */ swc1 $f10, 0x28($s0)
|
||||
/* 0CFBD0 800CEFD0 C7A80048 */ lwc1 $f8, 0x48($sp)
|
||||
/* 0CFBD4 800CEFD4 460E4102 */ mul.s $f4, $f8, $f14
|
||||
/* 0CFBD8 800CEFD8 46048181 */ sub.s $f6, $f16, $f4
|
||||
/* 0CFBDC 800CEFDC E6060010 */ swc1 $f6, 0x10($s0)
|
||||
/* 0CFBE0 800CEFE0 C7AA0048 */ lwc1 $f10, 0x48($sp)
|
||||
/* 0CFBE4 800CEFE4 460E5202 */ mul.s $f8, $f10, $f14
|
||||
/* 0CFBE8 800CEFE8 46104100 */ add.s $f4, $f8, $f16
|
||||
/* 0CFBEC 800CEFEC E6040004 */ swc1 $f4, 4($s0)
|
||||
/* 0CFBF0 800CEFF0 8FBF001C */ lw $ra, 0x1c($sp)
|
||||
/* 0CFBF4 800CEFF4 8FB00018 */ lw $s0, 0x18($sp)
|
||||
/* 0CFBF8 800CEFF8 27BD0038 */ addiu $sp, $sp, 0x38
|
||||
/* 0CFBFC 800CEFFC 03E00008 */ jr $ra
|
||||
/* 0CFC00 800CF000 00000000 */ nop
|
||||
|
||||
glabel guRotate
|
||||
/* 0CFC04 800CF004 44856000 */ mtc1 $a1, $f12
|
||||
/* 0CFC08 800CF008 44867000 */ mtc1 $a2, $f14
|
||||
/* 0CFC0C 800CF00C 44878000 */ mtc1 $a3, $f16
|
||||
/* 0CFC10 800CF010 27BDFFA0 */ addiu $sp, $sp, -0x60
|
||||
/* 0CFC14 800CF014 C7A40070 */ lwc1 $f4, 0x70($sp)
|
||||
/* 0CFC18 800CF018 AFBF001C */ sw $ra, 0x1c($sp)
|
||||
/* 0CFC1C 800CF01C AFA40060 */ sw $a0, 0x60($sp)
|
||||
/* 0CFC20 800CF020 44056000 */ mfc1 $a1, $f12
|
||||
/* 0CFC24 800CF024 44067000 */ mfc1 $a2, $f14
|
||||
/* 0CFC28 800CF028 44078000 */ mfc1 $a3, $f16
|
||||
/* 0CFC2C 800CF02C 27A40020 */ addiu $a0, $sp, 0x20
|
||||
/* 0CFC30 800CF030 0C033B9C */ jal guRotateF
|
||||
/* 0CFC34 800CF034 E7A40010 */ swc1 $f4, 0x10($sp)
|
||||
/* 0CFC38 800CF038 27A40020 */ addiu $a0, $sp, 0x20
|
||||
/* 0CFC3C 800CF03C 0C034F68 */ jal guMtxF2L
|
||||
/* 0CFC40 800CF040 8FA50060 */ lw $a1, 0x60($sp)
|
||||
/* 0CFC44 800CF044 8FBF001C */ lw $ra, 0x1c($sp)
|
||||
/* 0CFC48 800CF048 27BD0060 */ addiu $sp, $sp, 0x60
|
||||
/* 0CFC4C 800CF04C 03E00008 */ jr $ra
|
||||
/* 0CFC50 800CF050 00000000 */ nop
|
||||
|
||||
/* 0CFC54 800CF054 00000000 */ nop
|
||||
/* 0CFC58 800CF058 00000000 */ nop
|
||||
/* 0CFC5C 800CF05C 00000000 */ nop
|
||||
|
|
@ -0,0 +1,265 @@
|
|||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel osContInit
|
||||
/* 0CDD30 800CD130 27BDFF80 */ addiu $sp, $sp, -0x80
|
||||
/* 0CDD34 800CD134 3C0E800F */ lui $t6, %hi(D_800EB360) # $t6, 0x800f
|
||||
/* 0CDD38 800CD138 8DCEB360 */ lw $t6, %lo(D_800EB360)($t6)
|
||||
/* 0CDD3C 800CD13C AFBF0024 */ sw $ra, 0x24($sp)
|
||||
/* 0CDD40 800CD140 AFA40080 */ sw $a0, 0x80($sp)
|
||||
/* 0CDD44 800CD144 AFA50084 */ sw $a1, 0x84($sp)
|
||||
/* 0CDD48 800CD148 AFA60088 */ sw $a2, 0x88($sp)
|
||||
/* 0CDD4C 800CD14C 11C00003 */ beqz $t6, .L800CD15C
|
||||
/* 0CDD50 800CD150 AFA00078 */ sw $zero, 0x78($sp)
|
||||
/* 0CDD54 800CD154 10000070 */ b .L800CD318
|
||||
/* 0CDD58 800CD158 00001025 */ move $v0, $zero
|
||||
.L800CD15C:
|
||||
/* 0CDD5C 800CD15C 240F0001 */ li $t7, 1
|
||||
/* 0CDD60 800CD160 3C01800F */ lui $at, %hi(D_800EB360) # $at, 0x800f
|
||||
/* 0CDD64 800CD164 0C033778 */ jal osGetTime
|
||||
/* 0CDD68 800CD168 AC2FB360 */ sw $t7, %lo(D_800EB360)($at)
|
||||
/* 0CDD6C 800CD16C 3C050007 */ lui $a1, (0x0007A120 >> 16) # lui $a1, 7
|
||||
/* 0CDD70 800CD170 3C06800F */ lui $a2, %hi(osClockRate) # $a2, 0x800f
|
||||
/* 0CDD74 800CD174 3C07800F */ lui $a3, %hi(osClockRate + 4) # $a3, 0x800f
|
||||
/* 0CDD78 800CD178 AFA20070 */ sw $v0, 0x70($sp)
|
||||
/* 0CDD7C 800CD17C AFA30074 */ sw $v1, 0x74($sp)
|
||||
/* 0CDD80 800CD180 8CE7A5E4 */ lw $a3, %lo(osClockRate + 4)($a3)
|
||||
/* 0CDD84 800CD184 8CC6A5E0 */ lw $a2, %lo(osClockRate)($a2)
|
||||
/* 0CDD88 800CD188 34A5A120 */ ori $a1, (0x0007A120 & 0xFFFF) # ori $a1, $a1, 0xa120
|
||||
/* 0CDD8C 800CD18C 0C0337F6 */ jal __ll_mul
|
||||
/* 0CDD90 800CD190 24040000 */ li $a0, 0
|
||||
/* 0CDD94 800CD194 AFA20030 */ sw $v0, 0x30($sp)
|
||||
/* 0CDD98 800CD198 AFA30034 */ sw $v1, 0x34($sp)
|
||||
/* 0CDD9C 800CD19C 3C07000F */ lui $a3, (0x000F4240 >> 16) # lui $a3, 0xf
|
||||
/* 0CDDA0 800CD1A0 34E74240 */ ori $a3, (0x000F4240 & 0xFFFF) # ori $a3, $a3, 0x4240
|
||||
/* 0CDDA4 800CD1A4 8FA50034 */ lw $a1, 0x34($sp)
|
||||
/* 0CDDA8 800CD1A8 8FA40030 */ lw $a0, 0x30($sp)
|
||||
/* 0CDDAC 800CD1AC 0C0337B6 */ jal __ull_div
|
||||
/* 0CDDB0 800CD1B0 24060000 */ li $a2, 0
|
||||
/* 0CDDB4 800CD1B4 8FB80070 */ lw $t8, 0x70($sp)
|
||||
/* 0CDDB8 800CD1B8 8FB90074 */ lw $t9, 0x74($sp)
|
||||
/* 0CDDBC 800CD1BC 0058082B */ sltu $at, $v0, $t8
|
||||
/* 0CDDC0 800CD1C0 14200031 */ bnez $at, .L800CD288
|
||||
/* 0CDDC4 800CD1C4 0302082B */ sltu $at, $t8, $v0
|
||||
/* 0CDDC8 800CD1C8 14200003 */ bnez $at, .L800CD1D8
|
||||
/* 0CDDCC 800CD1CC 0323082B */ sltu $at, $t9, $v1
|
||||
/* 0CDDD0 800CD1D0 1020002D */ beqz $at, .L800CD288
|
||||
/* 0CDDD4 800CD1D4 00000000 */ nop
|
||||
.L800CD1D8:
|
||||
/* 0CDDD8 800CD1D8 27A40038 */ addiu $a0, $sp, 0x38
|
||||
/* 0CDDDC 800CD1DC 27A5007C */ addiu $a1, $sp, 0x7c
|
||||
/* 0CDDE0 800CD1E0 0C033358 */ jal osCreateMesgQueue
|
||||
/* 0CDDE4 800CD1E4 24060001 */ li $a2, 1
|
||||
/* 0CDDE8 800CD1E8 3C050007 */ lui $a1, (0x0007A120 >> 16) # lui $a1, 7
|
||||
/* 0CDDEC 800CD1EC 3C06800F */ lui $a2, %hi(osClockRate) # $a2, 0x800f
|
||||
/* 0CDDF0 800CD1F0 3C07800F */ lui $a3, %hi(osClockRate + 4) # $a3, 0x800f
|
||||
/* 0CDDF4 800CD1F4 8CE7A5E4 */ lw $a3, %lo(osClockRate + 4)($a3)
|
||||
/* 0CDDF8 800CD1F8 8CC6A5E0 */ lw $a2, %lo(osClockRate)($a2)
|
||||
/* 0CDDFC 800CD1FC 34A5A120 */ ori $a1, (0x0007A120 & 0xFFFF) # ori $a1, $a1, 0xa120
|
||||
/* 0CDE00 800CD200 0C0337F6 */ jal __ll_mul
|
||||
/* 0CDE04 800CD204 24040000 */ li $a0, 0
|
||||
/* 0CDE08 800CD208 AFA20028 */ sw $v0, 0x28($sp)
|
||||
/* 0CDE0C 800CD20C AFA3002C */ sw $v1, 0x2c($sp)
|
||||
/* 0CDE10 800CD210 3C07000F */ lui $a3, (0x000F4240 >> 16) # lui $a3, 0xf
|
||||
/* 0CDE14 800CD214 34E74240 */ ori $a3, (0x000F4240 & 0xFFFF) # ori $a3, $a3, 0x4240
|
||||
/* 0CDE18 800CD218 8FA5002C */ lw $a1, 0x2c($sp)
|
||||
/* 0CDE1C 800CD21C 8FA40028 */ lw $a0, 0x28($sp)
|
||||
/* 0CDE20 800CD220 0C0337B6 */ jal __ull_div
|
||||
/* 0CDE24 800CD224 24060000 */ li $a2, 0
|
||||
/* 0CDE28 800CD228 AFA20030 */ sw $v0, 0x30($sp)
|
||||
/* 0CDE2C 800CD22C AFA30034 */ sw $v1, 0x34($sp)
|
||||
/* 0CDE30 800CD230 8FA90034 */ lw $t1, 0x34($sp)
|
||||
/* 0CDE34 800CD234 8FA80030 */ lw $t0, 0x30($sp)
|
||||
/* 0CDE38 800CD238 8FAA0070 */ lw $t2, 0x70($sp)
|
||||
/* 0CDE3C 800CD23C 8FAB0074 */ lw $t3, 0x74($sp)
|
||||
/* 0CDE40 800CD240 240C0000 */ li $t4, 0
|
||||
/* 0CDE44 800CD244 240D0000 */ li $t5, 0
|
||||
/* 0CDE48 800CD248 27AE0038 */ addiu $t6, $sp, 0x38
|
||||
/* 0CDE4C 800CD24C 27AF007C */ addiu $t7, $sp, 0x7c
|
||||
/* 0CDE50 800CD250 010A3023 */ subu $a2, $t0, $t2
|
||||
/* 0CDE54 800CD254 012B082B */ sltu $at, $t1, $t3
|
||||
/* 0CDE58 800CD258 00C13023 */ subu $a2, $a2, $at
|
||||
/* 0CDE5C 800CD25C AFAF001C */ sw $t7, 0x1c($sp)
|
||||
/* 0CDE60 800CD260 AFAE0018 */ sw $t6, 0x18($sp)
|
||||
/* 0CDE64 800CD264 AFAD0014 */ sw $t5, 0x14($sp)
|
||||
/* 0CDE68 800CD268 AFAC0010 */ sw $t4, 0x10($sp)
|
||||
/* 0CDE6C 800CD26C 27A40050 */ addiu $a0, $sp, 0x50
|
||||
/* 0CDE70 800CD270 0C034E70 */ jal osSetTimer
|
||||
/* 0CDE74 800CD274 012B3823 */ subu $a3, $t1, $t3
|
||||
/* 0CDE78 800CD278 27A40038 */ addiu $a0, $sp, 0x38
|
||||
/* 0CDE7C 800CD27C 27A5007C */ addiu $a1, $sp, 0x7c
|
||||
/* 0CDE80 800CD280 0C0335D4 */ jal osRecvMesg
|
||||
/* 0CDE84 800CD284 24060001 */ li $a2, 1
|
||||
.L800CD288:
|
||||
/* 0CDE88 800CD288 24180004 */ li $t8, 4
|
||||
/* 0CDE8C 800CD28C 3C018019 */ lui $at, %hi(_osContNumControllers) # $at, 0x8019
|
||||
/* 0CDE90 800CD290 A0386541 */ sb $t8, %lo(_osContNumControllers)($at)
|
||||
/* 0CDE94 800CD294 0C0334FE */ jal __osPackRequestData
|
||||
/* 0CDE98 800CD298 00002025 */ move $a0, $zero
|
||||
/* 0CDE9C 800CD29C 3C058019 */ lui $a1, %hi(_osContCmdBuf) # $a1, 0x8019
|
||||
/* 0CDEA0 800CD2A0 24A56500 */ addiu $a1, %lo(_osContCmdBuf) # addiu $a1, $a1, 0x6500
|
||||
/* 0CDEA4 800CD2A4 0C034EA8 */ jal __osSiRawStartDma
|
||||
/* 0CDEA8 800CD2A8 24040001 */ li $a0, 1
|
||||
/* 0CDEAC 800CD2AC AFA20078 */ sw $v0, 0x78($sp)
|
||||
/* 0CDEB0 800CD2B0 8FA40080 */ lw $a0, 0x80($sp)
|
||||
/* 0CDEB4 800CD2B4 27A5007C */ addiu $a1, $sp, 0x7c
|
||||
/* 0CDEB8 800CD2B8 0C0335D4 */ jal osRecvMesg
|
||||
/* 0CDEBC 800CD2BC 24060001 */ li $a2, 1
|
||||
/* 0CDEC0 800CD2C0 3C058019 */ lui $a1, %hi(_osContCmdBuf) # $a1, 0x8019
|
||||
/* 0CDEC4 800CD2C4 24A56500 */ addiu $a1, %lo(_osContCmdBuf) # addiu $a1, $a1, 0x6500
|
||||
/* 0CDEC8 800CD2C8 0C034EA8 */ jal __osSiRawStartDma
|
||||
/* 0CDECC 800CD2CC 00002025 */ move $a0, $zero
|
||||
/* 0CDED0 800CD2D0 AFA20078 */ sw $v0, 0x78($sp)
|
||||
/* 0CDED4 800CD2D4 8FA40080 */ lw $a0, 0x80($sp)
|
||||
/* 0CDED8 800CD2D8 27A5007C */ addiu $a1, $sp, 0x7c
|
||||
/* 0CDEDC 800CD2DC 0C0335D4 */ jal osRecvMesg
|
||||
/* 0CDEE0 800CD2E0 24060001 */ li $a2, 1
|
||||
/* 0CDEE4 800CD2E4 8FA40084 */ lw $a0, 0x84($sp)
|
||||
/* 0CDEE8 800CD2E8 0C0334CA */ jal __osContGetInitData
|
||||
/* 0CDEEC 800CD2EC 8FA50088 */ lw $a1, 0x88($sp)
|
||||
/* 0CDEF0 800CD2F0 3C018019 */ lui $at, %hi(_osLastSentSiCmd) # $at, 0x8019
|
||||
/* 0CDEF4 800CD2F4 0C034ED4 */ jal __osSiCreateAccessQueue
|
||||
/* 0CDEF8 800CD2F8 A0206540 */ sb $zero, %lo(_osLastSentSiCmd)($at)
|
||||
/* 0CDEFC 800CD2FC 3C048019 */ lui $a0, %hi(D_80196568) # $a0, 0x8019
|
||||
/* 0CDF00 800CD300 3C058019 */ lui $a1, %hi(D_80196580) # $a1, 0x8019
|
||||
/* 0CDF04 800CD304 24A56580 */ addiu $a1, %lo(D_80196580) # addiu $a1, $a1, 0x6580
|
||||
/* 0CDF08 800CD308 24846568 */ addiu $a0, %lo(D_80196568) # addiu $a0, $a0, 0x6568
|
||||
/* 0CDF0C 800CD30C 0C033358 */ jal osCreateMesgQueue
|
||||
/* 0CDF10 800CD310 24060001 */ li $a2, 1
|
||||
/* 0CDF14 800CD314 8FA20078 */ lw $v0, 0x78($sp)
|
||||
.L800CD318:
|
||||
/* 0CDF18 800CD318 8FBF0024 */ lw $ra, 0x24($sp)
|
||||
/* 0CDF1C 800CD31C 27BD0080 */ addiu $sp, $sp, 0x80
|
||||
/* 0CDF20 800CD320 03E00008 */ jr $ra
|
||||
/* 0CDF24 800CD324 00000000 */ nop
|
||||
|
||||
glabel __osContGetInitData
|
||||
/* 0CDF28 800CD328 3C0F8019 */ lui $t7, %hi(_osContNumControllers) # $t7, 0x8019
|
||||
/* 0CDF2C 800CD32C 91EF6541 */ lbu $t7, %lo(_osContNumControllers)($t7)
|
||||
/* 0CDF30 800CD330 27BDFFE8 */ addiu $sp, $sp, -0x18
|
||||
/* 0CDF34 800CD334 3C0E8019 */ lui $t6, %hi(_osContCmdBuf) # $t6, 0x8019
|
||||
/* 0CDF38 800CD338 25CE6500 */ addiu $t6, %lo(_osContCmdBuf) # addiu $t6, $t6, 0x6500
|
||||
/* 0CDF3C 800CD33C A3A00007 */ sb $zero, 7($sp)
|
||||
/* 0CDF40 800CD340 AFAE0014 */ sw $t6, 0x14($sp)
|
||||
/* 0CDF44 800CD344 19E00028 */ blez $t7, .L800CD3E8
|
||||
/* 0CDF48 800CD348 AFA00008 */ sw $zero, 8($sp)
|
||||
.L800CD34C:
|
||||
/* 0CDF4C 800CD34C 8FB90014 */ lw $t9, 0x14($sp)
|
||||
/* 0CDF50 800CD350 27B8000C */ addiu $t8, $sp, 0xc
|
||||
/* 0CDF54 800CD354 8B210000 */ lwl $at, ($t9)
|
||||
/* 0CDF58 800CD358 9B210003 */ lwr $at, 3($t9)
|
||||
/* 0CDF5C 800CD35C AF010000 */ sw $at, ($t8)
|
||||
/* 0CDF60 800CD360 8B290004 */ lwl $t1, 4($t9)
|
||||
/* 0CDF64 800CD364 9B290007 */ lwr $t1, 7($t9)
|
||||
/* 0CDF68 800CD368 AF090004 */ sw $t1, 4($t8)
|
||||
/* 0CDF6C 800CD36C 93AA000E */ lbu $t2, 0xe($sp)
|
||||
/* 0CDF70 800CD370 314B00C0 */ andi $t3, $t2, 0xc0
|
||||
/* 0CDF74 800CD374 000B6103 */ sra $t4, $t3, 4
|
||||
/* 0CDF78 800CD378 A0AC0003 */ sb $t4, 3($a1)
|
||||
/* 0CDF7C 800CD37C 90AD0003 */ lbu $t5, 3($a1)
|
||||
/* 0CDF80 800CD380 15A0000E */ bnez $t5, .L800CD3BC
|
||||
/* 0CDF84 800CD384 00000000 */ nop
|
||||
/* 0CDF88 800CD388 93AE0011 */ lbu $t6, 0x11($sp)
|
||||
/* 0CDF8C 800CD38C 93A80010 */ lbu $t0, 0x10($sp)
|
||||
/* 0CDF90 800CD390 240B0001 */ li $t3, 1
|
||||
/* 0CDF94 800CD394 000E7A00 */ sll $t7, $t6, 8
|
||||
/* 0CDF98 800CD398 01E8C025 */ or $t8, $t7, $t0
|
||||
/* 0CDF9C 800CD39C A4B80000 */ sh $t8, ($a1)
|
||||
/* 0CDFA0 800CD3A0 93B90012 */ lbu $t9, 0x12($sp)
|
||||
/* 0CDFA4 800CD3A4 A0B90002 */ sb $t9, 2($a1)
|
||||
/* 0CDFA8 800CD3A8 8FAA0008 */ lw $t2, 8($sp)
|
||||
/* 0CDFAC 800CD3AC 93A90007 */ lbu $t1, 7($sp)
|
||||
/* 0CDFB0 800CD3B0 014B6004 */ sllv $t4, $t3, $t2
|
||||
/* 0CDFB4 800CD3B4 012C6825 */ or $t5, $t1, $t4
|
||||
/* 0CDFB8 800CD3B8 A3AD0007 */ sb $t5, 7($sp)
|
||||
.L800CD3BC:
|
||||
/* 0CDFBC 800CD3BC 8FAE0008 */ lw $t6, 8($sp)
|
||||
/* 0CDFC0 800CD3C0 3C198019 */ lui $t9, %hi(_osContNumControllers) # $t9, 0x8019
|
||||
/* 0CDFC4 800CD3C4 93396541 */ lbu $t9, %lo(_osContNumControllers)($t9)
|
||||
/* 0CDFC8 800CD3C8 8FA80014 */ lw $t0, 0x14($sp)
|
||||
/* 0CDFCC 800CD3CC 25CF0001 */ addiu $t7, $t6, 1
|
||||
/* 0CDFD0 800CD3D0 01F9082A */ slt $at, $t7, $t9
|
||||
/* 0CDFD4 800CD3D4 25180008 */ addiu $t8, $t0, 8
|
||||
/* 0CDFD8 800CD3D8 AFB80014 */ sw $t8, 0x14($sp)
|
||||
/* 0CDFDC 800CD3DC AFAF0008 */ sw $t7, 8($sp)
|
||||
/* 0CDFE0 800CD3E0 1420FFDA */ bnez $at, .L800CD34C
|
||||
/* 0CDFE4 800CD3E4 24A50004 */ addiu $a1, $a1, 4
|
||||
.L800CD3E8:
|
||||
/* 0CDFE8 800CD3E8 93AB0007 */ lbu $t3, 7($sp)
|
||||
/* 0CDFEC 800CD3EC 27BD0018 */ addiu $sp, $sp, 0x18
|
||||
/* 0CDFF0 800CD3F0 03E00008 */ jr $ra
|
||||
/* 0CDFF4 800CD3F4 A08B0000 */ sb $t3, ($a0)
|
||||
|
||||
glabel __osPackRequestData
|
||||
/* 0CDFF8 800CD3F8 27BDFFF0 */ addiu $sp, $sp, -0x10
|
||||
/* 0CDFFC 800CD3FC 308400FF */ andi $a0, $a0, 0xff
|
||||
/* 0CE000 800CD400 AFA00000 */ sw $zero, ($sp)
|
||||
.L800CD404:
|
||||
/* 0CE004 800CD404 8FAE0000 */ lw $t6, ($sp)
|
||||
/* 0CE008 800CD408 8FB80000 */ lw $t8, ($sp)
|
||||
/* 0CE00C 800CD40C 3C018019 */ lui $at, %hi(_osContCmdBuf) # 0x8019
|
||||
/* 0CE010 800CD410 000E7880 */ sll $t7, $t6, 2
|
||||
/* 0CE014 800CD414 002F0821 */ addu $at, $at, $t7
|
||||
/* 0CE018 800CD418 AC206500 */ sw $zero, %lo(_osContCmdBuf)($at) # 0x6500($at)
|
||||
/* 0CE01C 800CD41C 27190001 */ addiu $t9, $t8, 1
|
||||
/* 0CE020 800CD420 2B210010 */ slti $at, $t9, 0x10
|
||||
/* 0CE024 800CD424 1420FFF7 */ bnez $at, .L800CD404
|
||||
/* 0CE028 800CD428 AFB90000 */ sw $t9, ($sp)
|
||||
/* 0CE02C 800CD42C 3C198019 */ lui $t9, %hi(_osContNumControllers) # $t9, 0x8019
|
||||
/* 0CE030 800CD430 93396541 */ lbu $t9, %lo(_osContNumControllers)($t9)
|
||||
/* 0CE034 800CD434 3C098019 */ lui $t1, %hi(_osContCmdBuf) # $t1, 0x8019
|
||||
/* 0CE038 800CD438 24080001 */ li $t0, 1
|
||||
/* 0CE03C 800CD43C 3C018019 */ lui $at, %hi(_osContPifCtrl) # $at, 0x8019
|
||||
/* 0CE040 800CD440 25296500 */ addiu $t1, %lo(_osContCmdBuf) # addiu $t1, $t1, 0x6500
|
||||
/* 0CE044 800CD444 240A00FF */ li $t2, 255
|
||||
/* 0CE048 800CD448 240B0001 */ li $t3, 1
|
||||
/* 0CE04C 800CD44C 240C0003 */ li $t4, 3
|
||||
/* 0CE050 800CD450 240D00FF */ li $t5, 255
|
||||
/* 0CE054 800CD454 240E00FF */ li $t6, 255
|
||||
/* 0CE058 800CD458 240F00FF */ li $t7, 255
|
||||
/* 0CE05C 800CD45C 241800FF */ li $t8, 255
|
||||
/* 0CE060 800CD460 AC28653C */ sw $t0, %lo(_osContPifCtrl)($at)
|
||||
/* 0CE064 800CD464 AFA9000C */ sw $t1, 0xc($sp)
|
||||
/* 0CE068 800CD468 A3AA0004 */ sb $t2, 4($sp)
|
||||
/* 0CE06C 800CD46C A3AB0005 */ sb $t3, 5($sp)
|
||||
/* 0CE070 800CD470 A3AC0006 */ sb $t4, 6($sp)
|
||||
/* 0CE074 800CD474 A3A40007 */ sb $a0, 7($sp)
|
||||
/* 0CE078 800CD478 A3AD0008 */ sb $t5, 8($sp)
|
||||
/* 0CE07C 800CD47C A3AE0009 */ sb $t6, 9($sp)
|
||||
/* 0CE080 800CD480 A3AF000A */ sb $t7, 0xa($sp)
|
||||
/* 0CE084 800CD484 A3B8000B */ sb $t8, 0xb($sp)
|
||||
/* 0CE088 800CD488 1B200013 */ blez $t9, .L800CD4D8
|
||||
/* 0CE08C 800CD48C AFA00000 */ sw $zero, ($sp)
|
||||
.L800CD490:
|
||||
/* 0CE090 800CD490 27A90004 */ addiu $t1, $sp, 4
|
||||
/* 0CE094 800CD494 8D210000 */ lw $at, ($t1)
|
||||
/* 0CE098 800CD498 8FA8000C */ lw $t0, 0xc($sp)
|
||||
/* 0CE09C 800CD49C 3C188019 */ lui $t8, %hi(_osContNumControllers) # $t8, 0x8019
|
||||
/* 0CE0A0 800CD4A0 A9010000 */ swl $at, ($t0)
|
||||
/* 0CE0A4 800CD4A4 B9010003 */ swr $at, 3($t0)
|
||||
/* 0CE0A8 800CD4A8 8D2B0004 */ lw $t3, 4($t1)
|
||||
/* 0CE0AC 800CD4AC A90B0004 */ swl $t3, 4($t0)
|
||||
/* 0CE0B0 800CD4B0 B90B0007 */ swr $t3, 7($t0)
|
||||
/* 0CE0B4 800CD4B4 8FAE0000 */ lw $t6, ($sp)
|
||||
/* 0CE0B8 800CD4B8 93186541 */ lbu $t8, %lo(_osContNumControllers)($t8)
|
||||
/* 0CE0BC 800CD4BC 8FAC000C */ lw $t4, 0xc($sp)
|
||||
/* 0CE0C0 800CD4C0 25CF0001 */ addiu $t7, $t6, 1
|
||||
/* 0CE0C4 800CD4C4 01F8082A */ slt $at, $t7, $t8
|
||||
/* 0CE0C8 800CD4C8 258D0008 */ addiu $t5, $t4, 8
|
||||
/* 0CE0CC 800CD4CC AFAF0000 */ sw $t7, ($sp)
|
||||
/* 0CE0D0 800CD4D0 1420FFEF */ bnez $at, .L800CD490
|
||||
/* 0CE0D4 800CD4D4 AFAD000C */ sw $t5, 0xc($sp)
|
||||
.L800CD4D8:
|
||||
/* 0CE0D8 800CD4D8 8FAA000C */ lw $t2, 0xc($sp)
|
||||
/* 0CE0DC 800CD4DC 241900FE */ li $t9, 254
|
||||
/* 0CE0E0 800CD4E0 27BD0010 */ addiu $sp, $sp, 0x10
|
||||
/* 0CE0E4 800CD4E4 03E00008 */ jr $ra
|
||||
/* 0CE0E8 800CD4E8 A1590000 */ sb $t9, ($t2)
|
||||
|
||||
/* 0CE0EC 800CD4EC 00000000 */ nop
|
||||
|
||||
|
|
@ -0,0 +1,114 @@
|
|||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel osCreatePiManager
|
||||
/* 0CD6F0 800CCAF0 27BDFFD0 */ addiu $sp, $sp, -0x30
|
||||
/* 0CD6F4 800CCAF4 3C0E800F */ lui $t6, %hi(__osPiDevMgr) # $t6, 0x800f
|
||||
/* 0CD6F8 800CCAF8 8DCEB340 */ lw $t6, %lo(__osPiDevMgr)($t6)
|
||||
/* 0CD6FC 800CCAFC AFBF001C */ sw $ra, 0x1c($sp)
|
||||
/* 0CD700 800CCB00 AFA40030 */ sw $a0, 0x30($sp)
|
||||
/* 0CD704 800CCB04 AFA50034 */ sw $a1, 0x34($sp)
|
||||
/* 0CD708 800CCB08 AFA60038 */ sw $a2, 0x38($sp)
|
||||
/* 0CD70C 800CCB0C 15C00056 */ bnez $t6, .L800CCC68
|
||||
/* 0CD710 800CCB10 AFA7003C */ sw $a3, 0x3c($sp)
|
||||
/* 0CD714 800CCB14 8FA40034 */ lw $a0, 0x34($sp)
|
||||
/* 0CD718 800CCB18 8FA50038 */ lw $a1, 0x38($sp)
|
||||
/* 0CD71C 800CCB1C 0C033358 */ jal osCreateMesgQueue
|
||||
/* 0CD720 800CCB20 8FA6003C */ lw $a2, 0x3c($sp)
|
||||
/* 0CD724 800CCB24 3C048019 */ lui $a0, %hi(D_80196420) # $a0, 0x8019
|
||||
/* 0CD728 800CCB28 3C058019 */ lui $a1, %hi(D_80196438) # $a1, 0x8019
|
||||
/* 0CD72C 800CCB2C 24A56438 */ addiu $a1, %lo(D_80196438) # addiu $a1, $a1, 0x6438
|
||||
/* 0CD730 800CCB30 24846420 */ addiu $a0, %lo(D_80196420) # addiu $a0, $a0, 0x6420
|
||||
/* 0CD734 800CCB34 0C033358 */ jal osCreateMesgQueue
|
||||
/* 0CD738 800CCB38 24060001 */ li $a2, 1
|
||||
/* 0CD73C 800CCB3C 3C0F800F */ lui $t7, %hi(gOsPiAccessQueueCreated) # $t7, 0x800f
|
||||
/* 0CD740 800CCB40 8DEFB440 */ lw $t7, %lo(gOsPiAccessQueueCreated)($t7)
|
||||
/* 0CD744 800CCB44 15E00003 */ bnez $t7, .L800CCB54
|
||||
/* 0CD748 800CCB48 00000000 */ nop
|
||||
/* 0CD74C 800CCB4C 0C034BBC */ jal __osPiCreateAccessQueue
|
||||
/* 0CD750 800CCB50 00000000 */ nop
|
||||
.L800CCB54:
|
||||
/* 0CD754 800CCB54 3C058019 */ lui $a1, %hi(D_80196420) # $a1, 0x8019
|
||||
/* 0CD758 800CCB58 3C062222 */ lui $a2, (0x22222222 >> 16) # lui $a2, 0x2222
|
||||
/* 0CD75C 800CCB5C 34C62222 */ ori $a2, (0x22222222 & 0xFFFF) # ori $a2, $a2, 0x2222
|
||||
/* 0CD760 800CCB60 24A56420 */ addiu $a1, %lo(D_80196420) # addiu $a1, $a1, 0x6420
|
||||
/* 0CD764 800CCB64 0C033380 */ jal osSetEventMesg
|
||||
/* 0CD768 800CCB68 24040008 */ li $a0, 8
|
||||
/* 0CD76C 800CCB6C 2418FFFF */ li $t8, -1
|
||||
/* 0CD770 800CCB70 AFB80028 */ sw $t8, 0x28($sp)
|
||||
/* 0CD774 800CCB74 0C034A84 */ jal osGetThreadPri
|
||||
/* 0CD778 800CCB78 00002025 */ move $a0, $zero
|
||||
/* 0CD77C 800CCB7C AFA20024 */ sw $v0, 0x24($sp)
|
||||
/* 0CD780 800CCB80 8FB90024 */ lw $t9, 0x24($sp)
|
||||
/* 0CD784 800CCB84 8FA80030 */ lw $t0, 0x30($sp)
|
||||
/* 0CD788 800CCB88 0328082A */ slt $at, $t9, $t0
|
||||
/* 0CD78C 800CCB8C 10200005 */ beqz $at, .L800CCBA4
|
||||
/* 0CD790 800CCB90 00000000 */ nop
|
||||
/* 0CD794 800CCB94 AFB90028 */ sw $t9, 0x28($sp)
|
||||
/* 0CD798 800CCB98 00002025 */ move $a0, $zero
|
||||
/* 0CD79C 800CCB9C 0C033320 */ jal osSetThreadPri
|
||||
/* 0CD7A0 800CCBA0 01002825 */ move $a1, $t0
|
||||
.L800CCBA4:
|
||||
/* 0CD7A4 800CCBA4 0C0346AC */ jal __osDisableInt
|
||||
/* 0CD7A8 800CCBA8 00000000 */ nop
|
||||
/* 0CD7AC 800CCBAC 3C01800F */ lui $at, %hi(__osPiDevMgr) # $at, 0x800f
|
||||
/* 0CD7B0 800CCBB0 8FAB0034 */ lw $t3, 0x34($sp)
|
||||
/* 0CD7B4 800CCBB4 3C0A8019 */ lui $t2, %hi(D_80195270) # $t2, 0x8019
|
||||
/* 0CD7B8 800CCBB8 3C0C8019 */ lui $t4, %hi(D_80196420) # $t4, 0x8019
|
||||
/* 0CD7BC 800CCBBC 24090001 */ li $t1, 1
|
||||
/* 0CD7C0 800CCBC0 254A5270 */ addiu $t2, %lo(D_80195270) # addiu $t2, $t2, 0x5270
|
||||
/* 0CD7C4 800CCBC4 258C6420 */ addiu $t4, %lo(D_80196420) # addiu $t4, $t4, 0x6420
|
||||
/* 0CD7C8 800CCBC8 AC29B340 */ sw $t1, %lo(__osPiDevMgr)($at)
|
||||
/* 0CD7CC 800CCBCC AC2AB344 */ sw $t2, %lo(__osPiDevMgr+0x4)($at)
|
||||
/* 0CD7D0 800CCBD0 AC2CB34C */ sw $t4, %lo(__osPiDevMgr+0xC)($at)
|
||||
/* 0CD7D4 800CCBD4 3C188019 */ lui $t8, %hi(D_80195420) # $t8, 0x8019
|
||||
/* 0CD7D8 800CCBD8 AC2BB348 */ sw $t3, %lo(__osPiDevMgr+0x8)($at)
|
||||
/* 0CD7DC 800CCBDC 8FA80030 */ lw $t0, 0x30($sp)
|
||||
/* 0CD7E0 800CCBE0 3C01800F */ lui $at, %hi(__osPiDevMgr+0x18) # $at, 0x800f
|
||||
/* 0CD7E4 800CCBE4 3C0D8019 */ lui $t5, %hi(gOsPiMessageQueue) # $t5, 0x8019
|
||||
/* 0CD7E8 800CCBE8 3C0E800D */ lui $t6, %hi(osPiRawStartDma) # $t6, 0x800d
|
||||
/* 0CD7EC 800CCBEC 3C0F800D */ lui $t7, %hi(osEPiRawStartDma) # $t7, 0x800d
|
||||
/* 0CD7F0 800CCBF0 27185420 */ addiu $t8, %lo(D_80195420) # addiu $t8, $t8, 0x5420
|
||||
/* 0CD7F4 800CCBF4 25AD7628 */ addiu $t5, %lo(gOsPiMessageQueue) # addiu $t5, $t5, 0x7628
|
||||
/* 0CD7F8 800CCBF8 25CE2FB0 */ addiu $t6, %lo(osPiRawStartDma) # addiu $t6, $t6, 0x2fb0
|
||||
/* 0CD7FC 800CCBFC 25EF3090 */ addiu $t7, %lo(osEPiRawStartDma) # addiu $t7, $t7, 0x3090
|
||||
/* 0CD800 800CCC00 27191000 */ addiu $t9, $t8, 0x1000
|
||||
/* 0CD804 800CCC04 3C06800D */ lui $a2, %hi(__osDevMgrMain) # $a2, 0x800d
|
||||
/* 0CD808 800CCC08 3C07800F */ lui $a3, %hi(__osPiDevMgr) # $a3, 0x800f
|
||||
/* 0CD80C 800CCC0C AFA2002C */ sw $v0, 0x2c($sp)
|
||||
/* 0CD810 800CCC10 AC2DB350 */ sw $t5, %lo(__osPiDevMgr+0x10)($at)
|
||||
/* 0CD814 800CCC14 AC2EB354 */ sw $t6, %lo(__osPiDevMgr+0x14)($at)
|
||||
/* 0CD818 800CCC18 AC2FB358 */ sw $t7, %lo(__osPiDevMgr+0x18)($at)
|
||||
/* 0CD81C 800CCC1C 24E7B340 */ addiu $a3, %lo(__osPiDevMgr) # addiu $a3, $a3, -0x4cc0
|
||||
/* 0CD820 800CCC20 24C63170 */ addiu $a2, %lo(__osDevMgrMain) # addiu $a2, $a2, 0x3170
|
||||
/* 0CD824 800CCC24 AFB90010 */ sw $t9, 0x10($sp)
|
||||
/* 0CD828 800CCC28 01402025 */ move $a0, $t2
|
||||
/* 0CD82C 800CCC2C 00002825 */ move $a1, $zero
|
||||
/* 0CD830 800CCC30 0C032FDC */ jal osCreateThread
|
||||
/* 0CD834 800CCC34 AFA80014 */ sw $t0, 0x14($sp)
|
||||
/* 0CD838 800CCC38 3C048019 */ lui $a0, %hi(D_80195270) # $a0, 0x8019
|
||||
/* 0CD83C 800CCC3C 0C0330D8 */ jal osStartThread
|
||||
/* 0CD840 800CCC40 24845270 */ addiu $a0, %lo(D_80195270) # addiu $a0, $a0, 0x5270
|
||||
/* 0CD844 800CCC44 0C0346B4 */ jal __osRestoreInt
|
||||
/* 0CD848 800CCC48 8FA4002C */ lw $a0, 0x2c($sp)
|
||||
/* 0CD84C 800CCC4C 8FA90028 */ lw $t1, 0x28($sp)
|
||||
/* 0CD850 800CCC50 2401FFFF */ li $at, -1
|
||||
/* 0CD854 800CCC54 11210004 */ beq $t1, $at, .L800CCC68
|
||||
/* 0CD858 800CCC58 00000000 */ nop
|
||||
/* 0CD85C 800CCC5C 00002025 */ move $a0, $zero
|
||||
/* 0CD860 800CCC60 0C033320 */ jal osSetThreadPri
|
||||
/* 0CD864 800CCC64 01202825 */ move $a1, $t1
|
||||
.L800CCC68:
|
||||
/* 0CD868 800CCC68 8FBF001C */ lw $ra, 0x1c($sp)
|
||||
/* 0CD86C 800CCC6C 27BD0030 */ addiu $sp, $sp, 0x30
|
||||
/* 0CD870 800CCC70 03E00008 */ jr $ra
|
||||
/* 0CD874 800CCC74 00000000 */ nop
|
||||
|
||||
/* 0CD878 800CCC78 00000000 */ nop
|
||||
/* 0CD87C 800CCC7C 00000000 */ nop
|
||||
|
|
@ -0,0 +1,254 @@
|
|||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel osCreateViManager
|
||||
/* 0CD0B0 800CC4B0 3C0E800F */ lui $t6, %hi(viMgrMainArgs) # $t6, 0x800f
|
||||
/* 0CD0B4 800CC4B4 8DCEA600 */ lw $t6, %lo(viMgrMainArgs)($t6)
|
||||
/* 0CD0B8 800CC4B8 27BDFFD0 */ addiu $sp, $sp, -0x30
|
||||
/* 0CD0BC 800CC4BC AFBF001C */ sw $ra, 0x1c($sp)
|
||||
/* 0CD0C0 800CC4C0 15C00059 */ bnez $t6, .L800CC628
|
||||
/* 0CD0C4 800CC4C4 AFA40030 */ sw $a0, 0x30($sp)
|
||||
/* 0CD0C8 800CC4C8 0C034984 */ jal __osTimerServicesInit
|
||||
/* 0CD0CC 800CC4CC 00000000 */ nop
|
||||
/* 0CD0D0 800CC4D0 3C048019 */ lui $a0, %hi(D_80195200) # $a0, 0x8019
|
||||
/* 0CD0D4 800CC4D4 3C058019 */ lui $a1, %hi(D_80195218) # $a1, 0x8019
|
||||
/* 0CD0D8 800CC4D8 24A55218 */ addiu $a1, %lo(D_80195218) # addiu $a1, $a1, 0x5218
|
||||
/* 0CD0DC 800CC4DC 24845200 */ addiu $a0, %lo(D_80195200) # addiu $a0, $a0, 0x5200
|
||||
/* 0CD0E0 800CC4E0 0C033358 */ jal osCreateMesgQueue
|
||||
/* 0CD0E4 800CC4E4 24060005 */ li $a2, 5
|
||||
/* 0CD0E8 800CC4E8 3C018019 */ lui $at, %hi(D_80195230) # $at, 0x8019
|
||||
/* 0CD0EC 800CC4EC 240F000D */ li $t7, 13
|
||||
/* 0CD0F0 800CC4F0 A42F5230 */ sh $t7, %lo(D_80195230)($at)
|
||||
/* 0CD0F4 800CC4F4 A0205232 */ sb $zero, %lo(D_80195230+0x2)($at)
|
||||
/* 0CD0F8 800CC4F8 AC205234 */ sw $zero, %lo(D_80195230+0x4)($at)
|
||||
/* 0CD0FC 800CC4FC 3C018019 */ lui $at, %hi(D_80195248) # $at, 0x8019
|
||||
/* 0CD100 800CC500 2418000E */ li $t8, 14
|
||||
/* 0CD104 800CC504 3C058019 */ lui $a1, %hi(D_80195200) # $a1, 0x8019
|
||||
/* 0CD108 800CC508 3C068019 */ lui $a2, %hi(D_80195230) # $a2, 0x8019
|
||||
/* 0CD10C 800CC50C A4385248 */ sh $t8, %lo(D_80195248)($at)
|
||||
/* 0CD110 800CC510 A020524A */ sb $zero, %lo(D_80195248+0x2)($at)
|
||||
/* 0CD114 800CC514 AC20524C */ sw $zero, %lo(D_80195248+0x4)($at)
|
||||
/* 0CD118 800CC518 24C65230 */ addiu $a2, %lo(D_80195230) # addiu $a2, $a2, 0x5230
|
||||
/* 0CD11C 800CC51C 24A55200 */ addiu $a1, %lo(D_80195200) # addiu $a1, $a1, 0x5200
|
||||
/* 0CD120 800CC520 0C033380 */ jal osSetEventMesg
|
||||
/* 0CD124 800CC524 24040007 */ li $a0, 7
|
||||
/* 0CD128 800CC528 3C058019 */ lui $a1, %hi(D_80195200) # $a1, 0x8019
|
||||
/* 0CD12C 800CC52C 3C068019 */ lui $a2, %hi(D_80195248) # $a2, 0x8019
|
||||
/* 0CD130 800CC530 24C65248 */ addiu $a2, %lo(D_80195248) # addiu $a2, $a2, 0x5248
|
||||
/* 0CD134 800CC534 24A55200 */ addiu $a1, %lo(D_80195200) # addiu $a1, $a1, 0x5200
|
||||
/* 0CD138 800CC538 0C033380 */ jal osSetEventMesg
|
||||
/* 0CD13C 800CC53C 24040003 */ li $a0, 3
|
||||
/* 0CD140 800CC540 2419FFFF */ li $t9, -1
|
||||
/* 0CD144 800CC544 AFB90028 */ sw $t9, 0x28($sp)
|
||||
/* 0CD148 800CC548 0C034A84 */ jal osGetThreadPri
|
||||
/* 0CD14C 800CC54C 00002025 */ move $a0, $zero
|
||||
/* 0CD150 800CC550 AFA20024 */ sw $v0, 0x24($sp)
|
||||
/* 0CD154 800CC554 8FA80024 */ lw $t0, 0x24($sp)
|
||||
/* 0CD158 800CC558 8FA90030 */ lw $t1, 0x30($sp)
|
||||
/* 0CD15C 800CC55C 0109082A */ slt $at, $t0, $t1
|
||||
/* 0CD160 800CC560 10200005 */ beqz $at, .L800CC578
|
||||
/* 0CD164 800CC564 00000000 */ nop
|
||||
/* 0CD168 800CC568 AFA80028 */ sw $t0, 0x28($sp)
|
||||
/* 0CD16C 800CC56C 00002025 */ move $a0, $zero
|
||||
/* 0CD170 800CC570 0C033320 */ jal osSetThreadPri
|
||||
/* 0CD174 800CC574 01202825 */ move $a1, $t1
|
||||
.L800CC578:
|
||||
/* 0CD178 800CC578 0C0346AC */ jal __osDisableInt
|
||||
/* 0CD17C 800CC57C 00000000 */ nop
|
||||
/* 0CD180 800CC580 3C01800F */ lui $at, %hi(viMgrMainArgs) # $at, 0x800f
|
||||
/* 0CD184 800CC584 3C0C8019 */ lui $t4, %hi(D_80195200) # $t4, 0x8019
|
||||
/* 0CD188 800CC588 3C0B8019 */ lui $t3, %hi(D_80194050) # $t3, 0x8019
|
||||
/* 0CD18C 800CC58C 258C5200 */ addiu $t4, %lo(D_80195200) # addiu $t4, $t4, 0x5200
|
||||
/* 0CD190 800CC590 240A0001 */ li $t2, 1
|
||||
/* 0CD194 800CC594 256B4050 */ addiu $t3, %lo(D_80194050) # addiu $t3, $t3, 0x4050
|
||||
/* 0CD198 800CC598 AC2AA600 */ sw $t2, %lo(viMgrMainArgs)($at)
|
||||
/* 0CD19C 800CC59C AC2BA604 */ sw $t3, %lo(viMgrMainArgs+0x4)($at)
|
||||
/* 0CD1A0 800CC5A0 AC2CA608 */ sw $t4, %lo(viMgrMainArgs+0x8)($at)
|
||||
/* 0CD1A4 800CC5A4 AC2CA60C */ sw $t4, %lo(viMgrMainArgs+0xC)($at)
|
||||
/* 0CD1A8 800CC5A8 3C0D8019 */ lui $t5, %hi(D_80194200) # $t5, 0x8019
|
||||
/* 0CD1AC 800CC5AC 8FAF0030 */ lw $t7, 0x30($sp)
|
||||
/* 0CD1B0 800CC5B0 3C01800F */ lui $at, %hi(D_800EA610) # $at, 0x800f
|
||||
/* 0CD1B4 800CC5B4 25AD4200 */ addiu $t5, %lo(D_80194200) # addiu $t5, $t5, 0x4200
|
||||
/* 0CD1B8 800CC5B8 25AE1000 */ addiu $t6, $t5, 0x1000
|
||||
/* 0CD1BC 800CC5BC 3C06800D */ lui $a2, %hi(__osViDevMgrMain) # $a2, 0x800d
|
||||
/* 0CD1C0 800CC5C0 3C07800F */ lui $a3, %hi(viMgrMainArgs) # $a3, 0x800f
|
||||
/* 0CD1C4 800CC5C4 AFA2002C */ sw $v0, 0x2c($sp)
|
||||
/* 0CD1C8 800CC5C8 AC20A610 */ sw $zero, %lo(D_800EA610)($at)
|
||||
/* 0CD1CC 800CC5CC AC20A614 */ sw $zero, %lo(D_800EA610+0x4)($at)
|
||||
/* 0CD1D0 800CC5D0 AC20A618 */ sw $zero, %lo(D_800EA610+0x8)($at)
|
||||
/* 0CD1D4 800CC5D4 24E7A600 */ addiu $a3, %lo(viMgrMainArgs) # addiu $a3, $a3, -0x5a00
|
||||
/* 0CD1D8 800CC5D8 24C6C638 */ addiu $a2, %lo(__osViDevMgrMain) # addiu $a2, $a2, -0x39c8
|
||||
/* 0CD1DC 800CC5DC AFAE0010 */ sw $t6, 0x10($sp)
|
||||
/* 0CD1E0 800CC5E0 01602025 */ move $a0, $t3
|
||||
/* 0CD1E4 800CC5E4 00002825 */ move $a1, $zero
|
||||
/* 0CD1E8 800CC5E8 0C032FDC */ jal osCreateThread
|
||||
/* 0CD1EC 800CC5EC AFAF0014 */ sw $t7, 0x14($sp)
|
||||
/* 0CD1F0 800CC5F0 0C034A8C */ jal __osViInit
|
||||
/* 0CD1F4 800CC5F4 00000000 */ nop
|
||||
/* 0CD1F8 800CC5F8 3C048019 */ lui $a0, %hi(D_80194050) # $a0, 0x8019
|
||||
/* 0CD1FC 800CC5FC 0C0330D8 */ jal osStartThread
|
||||
/* 0CD200 800CC600 24844050 */ addiu $a0, %lo(D_80194050) # addiu $a0, $a0, 0x4050
|
||||
/* 0CD204 800CC604 0C0346B4 */ jal __osRestoreInt
|
||||
/* 0CD208 800CC608 8FA4002C */ lw $a0, 0x2c($sp)
|
||||
/* 0CD20C 800CC60C 8FB80028 */ lw $t8, 0x28($sp)
|
||||
/* 0CD210 800CC610 2401FFFF */ li $at, -1
|
||||
/* 0CD214 800CC614 13010004 */ beq $t8, $at, .L800CC628
|
||||
/* 0CD218 800CC618 00000000 */ nop
|
||||
/* 0CD21C 800CC61C 00002025 */ move $a0, $zero
|
||||
/* 0CD220 800CC620 0C033320 */ jal osSetThreadPri
|
||||
/* 0CD224 800CC624 03002825 */ move $a1, $t8
|
||||
.L800CC628:
|
||||
/* 0CD228 800CC628 8FBF001C */ lw $ra, 0x1c($sp)
|
||||
/* 0CD22C 800CC62C 27BD0030 */ addiu $sp, $sp, 0x30
|
||||
/* 0CD230 800CC630 03E00008 */ jr $ra
|
||||
/* 0CD234 800CC634 00000000 */ nop
|
||||
|
||||
glabel __osViDevMgrMain
|
||||
/* 0CD238 800CC638 27BDFFC8 */ addiu $sp, $sp, -0x38
|
||||
/* 0CD23C 800CC63C AFBF001C */ sw $ra, 0x1c($sp)
|
||||
/* 0CD240 800CC640 AFA40038 */ sw $a0, 0x38($sp)
|
||||
/* 0CD244 800CC644 AFB00018 */ sw $s0, 0x18($sp)
|
||||
/* 0CD248 800CC648 AFA0002C */ sw $zero, 0x2c($sp)
|
||||
/* 0CD24C 800CC64C 0C034AE0 */ jal __osViGetCurrentContext
|
||||
/* 0CD250 800CC650 AFA00028 */ sw $zero, 0x28($sp)
|
||||
/* 0CD254 800CC654 AFA20034 */ sw $v0, 0x34($sp)
|
||||
/* 0CD258 800CC658 8FAE0034 */ lw $t6, 0x34($sp)
|
||||
/* 0CD25C 800CC65C 3C018019 */ lui $at, %hi(D_80195260) # $at, 0x8019
|
||||
/* 0CD260 800CC660 95CF0002 */ lhu $t7, 2($t6)
|
||||
/* 0CD264 800CC664 15E00004 */ bnez $t7, .L800CC678
|
||||
/* 0CD268 800CC668 A42F5260 */ sh $t7, %lo(D_80195260)($at)
|
||||
/* 0CD26C 800CC66C 24180001 */ li $t8, 1
|
||||
/* 0CD270 800CC670 3C018019 */ lui $at, %hi(D_80195260) # $at, 0x8019
|
||||
/* 0CD274 800CC674 A4385260 */ sh $t8, %lo(D_80195260)($at)
|
||||
.L800CC678:
|
||||
/* 0CD278 800CC678 8FB90038 */ lw $t9, 0x38($sp)
|
||||
/* 0CD27C 800CC67C AFB90030 */ sw $t9, 0x30($sp)
|
||||
.L800CC680:
|
||||
/* 0CD280 800CC680 8FA80030 */ lw $t0, 0x30($sp)
|
||||
/* 0CD284 800CC684 27A5002C */ addiu $a1, $sp, 0x2c
|
||||
/* 0CD288 800CC688 24060001 */ li $a2, 1
|
||||
/* 0CD28C 800CC68C 0C0335D4 */ jal osRecvMesg
|
||||
/* 0CD290 800CC690 8D04000C */ lw $a0, 0xc($t0)
|
||||
/* 0CD294 800CC694 8FA9002C */ lw $t1, 0x2c($sp)
|
||||
/* 0CD298 800CC698 2401000D */ li $at, 13
|
||||
/* 0CD29C 800CC69C 95300000 */ lhu $s0, ($t1)
|
||||
/* 0CD2A0 800CC6A0 12010005 */ beq $s0, $at, .L800CC6B8
|
||||
/* 0CD2A4 800CC6A4 2401000E */ li $at, 14
|
||||
/* 0CD2A8 800CC6A8 12010047 */ beq $s0, $at, .L800CC7C8
|
||||
/* 0CD2AC 800CC6AC 00000000 */ nop
|
||||
/* 0CD2B0 800CC6B0 1000FFF3 */ b .L800CC680
|
||||
/* 0CD2B4 800CC6B4 00000000 */ nop
|
||||
.L800CC6B8:
|
||||
/* 0CD2B8 800CC6B8 0C034AE4 */ jal __osViSwapContext
|
||||
/* 0CD2BC 800CC6BC 00000000 */ nop
|
||||
/* 0CD2C0 800CC6C0 3C0A8019 */ lui $t2, %hi(D_80195260) # $t2, 0x8019
|
||||
/* 0CD2C4 800CC6C4 954A5260 */ lhu $t2, %lo(D_80195260)($t2)
|
||||
/* 0CD2C8 800CC6C8 3C018019 */ lui $at, %hi(D_80195260) # $at, 0x8019
|
||||
/* 0CD2CC 800CC6CC 254BFFFF */ addiu $t3, $t2, -1
|
||||
/* 0CD2D0 800CC6D0 316CFFFF */ andi $t4, $t3, 0xffff
|
||||
/* 0CD2D4 800CC6D4 15800010 */ bnez $t4, .L800CC718
|
||||
/* 0CD2D8 800CC6D8 A42B5260 */ sh $t3, %lo(D_80195260)($at)
|
||||
/* 0CD2DC 800CC6DC 0C034AE0 */ jal __osViGetCurrentContext
|
||||
/* 0CD2E0 800CC6E0 00000000 */ nop
|
||||
/* 0CD2E4 800CC6E4 AFA20034 */ sw $v0, 0x34($sp)
|
||||
/* 0CD2E8 800CC6E8 8FAD0034 */ lw $t5, 0x34($sp)
|
||||
/* 0CD2EC 800CC6EC 8DAE0010 */ lw $t6, 0x10($t5)
|
||||
/* 0CD2F0 800CC6F0 11C00005 */ beqz $t6, .L800CC708
|
||||
/* 0CD2F4 800CC6F4 00000000 */ nop
|
||||
/* 0CD2F8 800CC6F8 01C02025 */ move $a0, $t6
|
||||
/* 0CD2FC 800CC6FC 8DA50014 */ lw $a1, 0x14($t5)
|
||||
/* 0CD300 800CC700 0C033630 */ jal osSendMesg
|
||||
/* 0CD304 800CC704 00003025 */ move $a2, $zero
|
||||
.L800CC708:
|
||||
/* 0CD308 800CC708 8FAF0034 */ lw $t7, 0x34($sp)
|
||||
/* 0CD30C 800CC70C 3C018019 */ lui $at, %hi(D_80195260) # $at, 0x8019
|
||||
/* 0CD310 800CC710 95F80002 */ lhu $t8, 2($t7)
|
||||
/* 0CD314 800CC714 A4385260 */ sh $t8, %lo(D_80195260)($at)
|
||||
.L800CC718:
|
||||
/* 0CD318 800CC718 3C198019 */ lui $t9, %hi(__osViIntrCount) # $t9, 0x8019
|
||||
/* 0CD31C 800CC71C 8F39760C */ lw $t9, %lo(__osViIntrCount)($t9)
|
||||
/* 0CD320 800CC720 8FA90028 */ lw $t1, 0x28($sp)
|
||||
/* 0CD324 800CC724 3C018019 */ lui $at, %hi(__osViIntrCount) # $at, 0x8019
|
||||
/* 0CD328 800CC728 27280001 */ addiu $t0, $t9, 1
|
||||
/* 0CD32C 800CC72C 1120000C */ beqz $t1, .L800CC760
|
||||
/* 0CD330 800CC730 AC28760C */ sw $t0, %lo(__osViIntrCount)($at)
|
||||
/* 0CD334 800CC734 0C034468 */ jal osGetCount
|
||||
/* 0CD338 800CC738 00000000 */ nop
|
||||
/* 0CD33C 800CC73C AFA20024 */ sw $v0, 0x24($sp)
|
||||
/* 0CD340 800CC740 8FAA0024 */ lw $t2, 0x24($sp)
|
||||
/* 0CD344 800CC744 240C0000 */ li $t4, 0
|
||||
/* 0CD348 800CC748 3C018019 */ lui $at, %hi(__osCurrentTime) # $at, 0x8019
|
||||
/* 0CD34C 800CC74C AC2C7600 */ sw $t4, %lo(__osCurrentTime)($at)
|
||||
/* 0CD350 800CC750 3C018019 */ lui $at, %hi(__osCurrentTime) # $at, 0x8019
|
||||
/* 0CD354 800CC754 01406825 */ move $t5, $t2
|
||||
/* 0CD358 800CC758 AC2D7604 */ sw $t5, %lo(__osCurrentTime+ 4)($at)
|
||||
/* 0CD35C 800CC75C AFA00028 */ sw $zero, 0x28($sp)
|
||||
.L800CC760:
|
||||
/* 0CD360 800CC760 3C0B8019 */ lui $t3, %hi(__osBaseCounter) # $t3, 0x8019
|
||||
/* 0CD364 800CC764 8D6B7608 */ lw $t3, %lo(__osBaseCounter)($t3)
|
||||
/* 0CD368 800CC768 0C034468 */ jal osGetCount
|
||||
/* 0CD36C 800CC76C AFAB0024 */ sw $t3, 0x24($sp)
|
||||
/* 0CD370 800CC770 3C018019 */ lui $at, %hi(__osBaseCounter) # $at, 0x8019
|
||||
/* 0CD374 800CC774 AC227608 */ sw $v0, %lo(__osBaseCounter)($at)
|
||||
/* 0CD378 800CC778 3C0E8019 */ lui $t6, %hi(__osBaseCounter) # $t6, 0x8019
|
||||
/* 0CD37C 800CC77C 8DCE7608 */ lw $t6, %lo(__osBaseCounter)($t6)
|
||||
/* 0CD380 800CC780 8FAF0024 */ lw $t7, 0x24($sp)
|
||||
/* 0CD384 800CC784 3C0B8019 */ lui $t3, %hi(__osCurrentTime) # $t3, 0x8019
|
||||
/* 0CD388 800CC788 8D6B7604 */ lw $t3, %lo(__osCurrentTime + 4)($t3)
|
||||
/* 0CD38C 800CC78C 01CFC023 */ subu $t8, $t6, $t7
|
||||
/* 0CD390 800CC790 03004825 */ move $t1, $t8
|
||||
/* 0CD394 800CC794 3C0A8019 */ lui $t2, %hi(__osCurrentTime) # $t2, 0x8019
|
||||
/* 0CD398 800CC798 012B6821 */ addu $t5, $t1, $t3
|
||||
/* 0CD39C 800CC79C 8D4A7600 */ lw $t2, %lo(__osCurrentTime)($t2)
|
||||
/* 0CD3A0 800CC7A0 24080000 */ li $t0, 0
|
||||
/* 0CD3A4 800CC7A4 01AB082B */ sltu $at, $t5, $t3
|
||||
/* 0CD3A8 800CC7A8 00286021 */ addu $t4, $at, $t0
|
||||
/* 0CD3AC 800CC7AC 3C018019 */ lui $at, %hi(__osCurrentTime) # $at, 0x8019
|
||||
/* 0CD3B0 800CC7B0 018A6021 */ addu $t4, $t4, $t2
|
||||
/* 0CD3B4 800CC7B4 AC2C7600 */ sw $t4, %lo(__osCurrentTime)($at)
|
||||
/* 0CD3B8 800CC7B8 3C018019 */ lui $at, %hi(__osCurrentTime) # $at, 0x8019
|
||||
/* 0CD3BC 800CC7BC AFB80024 */ sw $t8, 0x24($sp)
|
||||
/* 0CD3C0 800CC7C0 1000FFAF */ b .L800CC680
|
||||
/* 0CD3C4 800CC7C4 AC2D7604 */ sw $t5, %lo(__osCurrentTime + 4)($at)
|
||||
.L800CC7C8:
|
||||
/* 0CD3C8 800CC7C8 0C0349A7 */ jal __osTimerInterrupt
|
||||
/* 0CD3CC 800CC7CC 00000000 */ nop
|
||||
/* 0CD3D0 800CC7D0 1000FFAB */ b .L800CC680
|
||||
/* 0CD3D4 800CC7D4 00000000 */ nop
|
||||
/* 0CD3D8 800CC7D8 00000000 */ nop
|
||||
/* 0CD3DC 800CC7DC 00000000 */ nop
|
||||
/* 0CD3E0 800CC7E0 00000000 */ nop
|
||||
/* 0CD3E4 800CC7E4 00000000 */ nop
|
||||
/* 0CD3E8 800CC7E8 00000000 */ nop
|
||||
/* 0CD3EC 800CC7EC 00000000 */ nop
|
||||
/* 0CD3F0 800CC7F0 8FBF001C */ lw $ra, 0x1c($sp)
|
||||
/* 0CD3F4 800CC7F4 8FB00018 */ lw $s0, 0x18($sp)
|
||||
/* 0CD3F8 800CC7F8 27BD0038 */ addiu $sp, $sp, 0x38
|
||||
/* 0CD3FC 800CC7FC 03E00008 */ jr $ra
|
||||
/* 0CD400 800CC800 00000000 */ nop
|
||||
|
||||
/* 0CD404 800CC804 00000000 */ nop
|
||||
/* 0CD408 800CC808 00000000 */ nop
|
||||
/* 0CD40C 800CC80C 00000000 */ nop
|
||||
/* 0CD410 800CC810 00000000 */ nop
|
||||
/* 0CD414 800CC814 00000000 */ nop
|
||||
/* 0CD418 800CC818 00000000 */ nop
|
||||
/* 0CD41C 800CC81C 00000000 */ nop
|
||||
/* 0CD420 800CC820 00000000 */ nop
|
||||
/* 0CD424 800CC824 00000000 */ nop
|
||||
/* 0CD428 800CC828 00000000 */ nop
|
||||
/* 0CD42C 800CC82C 00000000 */ nop
|
||||
/* 0CD430 800CC830 00000000 */ nop
|
||||
/* 0CD434 800CC834 00000000 */ nop
|
||||
/* 0CD438 800CC838 00000000 */ nop
|
||||
/* 0CD43C 800CC83C 00000000 */ nop
|
||||
/* 0CD440 800CC840 00000000 */ nop
|
||||
/* 0CD444 800CC844 00000000 */ nop
|
||||
/* 0CD448 800CC848 00000000 */ nop
|
||||
/* 0CD44C 800CC84C 00000000 */ nop
|
||||
|
|
@ -0,0 +1,183 @@
|
|||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel osEepromLongWrite
|
||||
/* 0D0C50 800D0050 27BDFFC0 */ addiu $sp, $sp, -0x40
|
||||
/* 0D0C54 800D0054 AFA50044 */ sw $a1, 0x44($sp)
|
||||
/* 0D0C58 800D0058 93AE0047 */ lbu $t6, 0x47($sp)
|
||||
/* 0D0C5C 800D005C AFBF0024 */ sw $ra, 0x24($sp)
|
||||
/* 0D0C60 800D0060 AFA40040 */ sw $a0, 0x40($sp)
|
||||
/* 0D0C64 800D0064 29C10041 */ slti $at, $t6, 0x41
|
||||
/* 0D0C68 800D0068 AFA60048 */ sw $a2, 0x48($sp)
|
||||
/* 0D0C6C 800D006C AFA7004C */ sw $a3, 0x4c($sp)
|
||||
/* 0D0C70 800D0070 14200003 */ bnez $at, .L800D0080
|
||||
/* 0D0C74 800D0074 AFA0003C */ sw $zero, 0x3c($sp)
|
||||
/* 0D0C78 800D0078 10000040 */ b .L800D017C
|
||||
/* 0D0C7C 800D007C 2402FFFF */ li $v0, -1
|
||||
.L800D0080:
|
||||
/* 0D0C80 800D0080 8FAF004C */ lw $t7, 0x4c($sp)
|
||||
/* 0D0C84 800D0084 19E0003C */ blez $t7, .L800D0178
|
||||
/* 0D0C88 800D0088 00000000 */ nop
|
||||
.L800D008C:
|
||||
/* 0D0C8C 800D008C 8FA40040 */ lw $a0, 0x40($sp)
|
||||
/* 0D0C90 800D0090 93A50047 */ lbu $a1, 0x47($sp)
|
||||
/* 0D0C94 800D0094 0C035004 */ jal osEepromWrite
|
||||
/* 0D0C98 800D0098 8FA60048 */ lw $a2, 0x48($sp)
|
||||
/* 0D0C9C 800D009C AFA2003C */ sw $v0, 0x3c($sp)
|
||||
/* 0D0CA0 800D00A0 8FB8003C */ lw $t8, 0x3c($sp)
|
||||
/* 0D0CA4 800D00A4 13000003 */ beqz $t8, .L800D00B4
|
||||
/* 0D0CA8 800D00A8 00000000 */ nop
|
||||
/* 0D0CAC 800D00AC 10000033 */ b .L800D017C
|
||||
/* 0D0CB0 800D00B0 03001025 */ move $v0, $t8
|
||||
.L800D00B4:
|
||||
/* 0D0CB4 800D00B4 8FB9004C */ lw $t9, 0x4c($sp)
|
||||
/* 0D0CB8 800D00B8 93A90047 */ lbu $t1, 0x47($sp)
|
||||
/* 0D0CBC 800D00BC 8FAB0048 */ lw $t3, 0x48($sp)
|
||||
/* 0D0CC0 800D00C0 3C06800F */ lui $a2, %hi(osClockRate) # $a2, 0x800f
|
||||
/* 0D0CC4 800D00C4 3C07800F */ lui $a3, %hi(osClockRate + 4) # $a3, 0x800f
|
||||
/* 0D0CC8 800D00C8 2728FFF8 */ addiu $t0, $t9, -8
|
||||
/* 0D0CCC 800D00CC 252A0001 */ addiu $t2, $t1, 1
|
||||
/* 0D0CD0 800D00D0 256C0008 */ addiu $t4, $t3, 8
|
||||
/* 0D0CD4 800D00D4 AFA8004C */ sw $t0, 0x4c($sp)
|
||||
/* 0D0CD8 800D00D8 A3AA0047 */ sb $t2, 0x47($sp)
|
||||
/* 0D0CDC 800D00DC AFAC0048 */ sw $t4, 0x48($sp)
|
||||
/* 0D0CE0 800D00E0 8CE7A5E4 */ lw $a3, %lo(osClockRate + 4)($a3)
|
||||
/* 0D0CE4 800D00E4 8CC6A5E0 */ lw $a2, %lo(osClockRate)($a2)
|
||||
/* 0D0CE8 800D00E8 24040000 */ li $a0, 0
|
||||
/* 0D0CEC 800D00EC 0C0337F6 */ jal __ll_mul
|
||||
/* 0D0CF0 800D00F0 24052EE0 */ li $a1, 12000
|
||||
/* 0D0CF4 800D00F4 AFA20028 */ sw $v0, 0x28($sp)
|
||||
/* 0D0CF8 800D00F8 AFA3002C */ sw $v1, 0x2c($sp)
|
||||
/* 0D0CFC 800D00FC 3C07000F */ lui $a3, (0x000F4240 >> 16) # lui $a3, 0xf
|
||||
/* 0D0D00 800D0100 34E74240 */ ori $a3, (0x000F4240 & 0xFFFF) # ori $a3, $a3, 0x4240
|
||||
/* 0D0D04 800D0104 8FA5002C */ lw $a1, 0x2c($sp)
|
||||
/* 0D0D08 800D0108 8FA40028 */ lw $a0, 0x28($sp)
|
||||
/* 0D0D0C 800D010C 0C0337B6 */ jal __ull_div
|
||||
/* 0D0D10 800D0110 24060000 */ li $a2, 0
|
||||
/* 0D0D14 800D0114 3C0D8019 */ lui $t5, %hi(D_80196568) # $t5, 0x8019
|
||||
/* 0D0D18 800D0118 3C188019 */ lui $t8, %hi(D_80196580) # $t8, 0x8019
|
||||
/* 0D0D1C 800D011C 27186580 */ addiu $t8, %lo(D_80196580) # addiu $t8, $t8, 0x6580
|
||||
/* 0D0D20 800D0120 25AD6568 */ addiu $t5, %lo(D_80196568) # addiu $t5, $t5, 0x6568
|
||||
/* 0D0D24 800D0124 AFA20030 */ sw $v0, 0x30($sp)
|
||||
/* 0D0D28 800D0128 AFA30034 */ sw $v1, 0x34($sp)
|
||||
/* 0D0D2C 800D012C 3C048019 */ lui $a0, %hi(D_80196548) # $a0, 0x8019
|
||||
/* 0D0D30 800D0130 240E0000 */ li $t6, 0
|
||||
/* 0D0D34 800D0134 240F0000 */ li $t7, 0
|
||||
/* 0D0D38 800D0138 AFAF0014 */ sw $t7, 0x14($sp)
|
||||
/* 0D0D3C 800D013C AFAE0010 */ sw $t6, 0x10($sp)
|
||||
/* 0D0D40 800D0140 24846548 */ addiu $a0, %lo(D_80196548) # addiu $a0, $a0, 0x6548
|
||||
/* 0D0D44 800D0144 8FA70034 */ lw $a3, 0x34($sp)
|
||||
/* 0D0D48 800D0148 8FA60030 */ lw $a2, 0x30($sp)
|
||||
/* 0D0D4C 800D014C AFAD0018 */ sw $t5, 0x18($sp)
|
||||
/* 0D0D50 800D0150 0C034E70 */ jal osSetTimer
|
||||
/* 0D0D54 800D0154 AFB8001C */ sw $t8, 0x1c($sp)
|
||||
/* 0D0D58 800D0158 3C048019 */ lui $a0, %hi(D_80196568) # $a0, 0x8019
|
||||
/* 0D0D5C 800D015C 24846568 */ addiu $a0, %lo(D_80196568) # addiu $a0, $a0, 0x6568
|
||||
/* 0D0D60 800D0160 00002825 */ move $a1, $zero
|
||||
/* 0D0D64 800D0164 0C0335D4 */ jal osRecvMesg
|
||||
/* 0D0D68 800D0168 24060001 */ li $a2, 1
|
||||
/* 0D0D6C 800D016C 8FB9004C */ lw $t9, 0x4c($sp)
|
||||
/* 0D0D70 800D0170 1F20FFC6 */ bgtz $t9, .L800D008C
|
||||
/* 0D0D74 800D0174 00000000 */ nop
|
||||
.L800D0178:
|
||||
/* 0D0D78 800D0178 8FA2003C */ lw $v0, 0x3c($sp)
|
||||
.L800D017C:
|
||||
/* 0D0D7C 800D017C 8FBF0024 */ lw $ra, 0x24($sp)
|
||||
/* 0D0D80 800D0180 27BD0040 */ addiu $sp, $sp, 0x40
|
||||
/* 0D0D84 800D0184 03E00008 */ jr $ra
|
||||
/* 0D0D88 800D0188 00000000 */ nop
|
||||
|
||||
/* 0D0D8C 800D018C 00000000 */ nop
|
||||
glabel osEepromLongRead
|
||||
/* 0D0D90 800D0190 27BDFFC0 */ addiu $sp, $sp, -0x40
|
||||
/* 0D0D94 800D0194 AFA50044 */ sw $a1, 0x44($sp)
|
||||
/* 0D0D98 800D0198 93AE0047 */ lbu $t6, 0x47($sp)
|
||||
/* 0D0D9C 800D019C AFBF0024 */ sw $ra, 0x24($sp)
|
||||
/* 0D0DA0 800D01A0 AFA40040 */ sw $a0, 0x40($sp)
|
||||
/* 0D0DA4 800D01A4 29C10041 */ slti $at, $t6, 0x41
|
||||
/* 0D0DA8 800D01A8 AFA60048 */ sw $a2, 0x48($sp)
|
||||
/* 0D0DAC 800D01AC AFA7004C */ sw $a3, 0x4c($sp)
|
||||
/* 0D0DB0 800D01B0 14200003 */ bnez $at, .L800D01C0
|
||||
/* 0D0DB4 800D01B4 AFA0003C */ sw $zero, 0x3c($sp)
|
||||
/* 0D0DB8 800D01B8 10000040 */ b .L800D02BC
|
||||
/* 0D0DBC 800D01BC 2402FFFF */ li $v0, -1
|
||||
.L800D01C0:
|
||||
/* 0D0DC0 800D01C0 8FAF004C */ lw $t7, 0x4c($sp)
|
||||
/* 0D0DC4 800D01C4 19E0003C */ blez $t7, .L800D02B8
|
||||
/* 0D0DC8 800D01C8 00000000 */ nop
|
||||
.L800D01CC:
|
||||
/* 0D0DCC 800D01CC 8FA40040 */ lw $a0, 0x40($sp)
|
||||
/* 0D0DD0 800D01D0 93A50047 */ lbu $a1, 0x47($sp)
|
||||
/* 0D0DD4 800D01D4 0C035DA8 */ jal osEepromRead
|
||||
/* 0D0DD8 800D01D8 8FA60048 */ lw $a2, 0x48($sp)
|
||||
/* 0D0DDC 800D01DC AFA2003C */ sw $v0, 0x3c($sp)
|
||||
/* 0D0DE0 800D01E0 8FB8003C */ lw $t8, 0x3c($sp)
|
||||
/* 0D0DE4 800D01E4 13000003 */ beqz $t8, .L800D01F4
|
||||
/* 0D0DE8 800D01E8 00000000 */ nop
|
||||
/* 0D0DEC 800D01EC 10000033 */ b .L800D02BC
|
||||
/* 0D0DF0 800D01F0 03001025 */ move $v0, $t8
|
||||
.L800D01F4:
|
||||
/* 0D0DF4 800D01F4 8FB9004C */ lw $t9, 0x4c($sp)
|
||||
/* 0D0DF8 800D01F8 93A90047 */ lbu $t1, 0x47($sp)
|
||||
/* 0D0DFC 800D01FC 8FAB0048 */ lw $t3, 0x48($sp)
|
||||
/* 0D0E00 800D0200 3C06800F */ lui $a2, %hi(osClockRate) # $a2, 0x800f
|
||||
/* 0D0E04 800D0204 3C07800F */ lui $a3, %hi(osClockRate + 4) # $a3, 0x800f
|
||||
/* 0D0E08 800D0208 2728FFF8 */ addiu $t0, $t9, -8
|
||||
/* 0D0E0C 800D020C 252A0001 */ addiu $t2, $t1, 1
|
||||
/* 0D0E10 800D0210 256C0008 */ addiu $t4, $t3, 8
|
||||
/* 0D0E14 800D0214 AFA8004C */ sw $t0, 0x4c($sp)
|
||||
/* 0D0E18 800D0218 A3AA0047 */ sb $t2, 0x47($sp)
|
||||
/* 0D0E1C 800D021C AFAC0048 */ sw $t4, 0x48($sp)
|
||||
/* 0D0E20 800D0220 8CE7A5E4 */ lw $a3, %lo(osClockRate + 4)($a3)
|
||||
/* 0D0E24 800D0224 8CC6A5E0 */ lw $a2, %lo(osClockRate)($a2)
|
||||
/* 0D0E28 800D0228 24040000 */ li $a0, 0
|
||||
/* 0D0E2C 800D022C 0C0337F6 */ jal __ll_mul
|
||||
/* 0D0E30 800D0230 24052EE0 */ li $a1, 12000
|
||||
/* 0D0E34 800D0234 AFA20028 */ sw $v0, 0x28($sp)
|
||||
/* 0D0E38 800D0238 AFA3002C */ sw $v1, 0x2c($sp)
|
||||
/* 0D0E3C 800D023C 3C07000F */ lui $a3, (0x000F4240 >> 16) # lui $a3, 0xf
|
||||
/* 0D0E40 800D0240 34E74240 */ ori $a3, (0x000F4240 & 0xFFFF) # ori $a3, $a3, 0x4240
|
||||
/* 0D0E44 800D0244 8FA5002C */ lw $a1, 0x2c($sp)
|
||||
/* 0D0E48 800D0248 8FA40028 */ lw $a0, 0x28($sp)
|
||||
/* 0D0E4C 800D024C 0C0337B6 */ jal __ull_div
|
||||
/* 0D0E50 800D0250 24060000 */ li $a2, 0
|
||||
/* 0D0E54 800D0254 3C0D8019 */ lui $t5, %hi(D_80196568) # $t5, 0x8019
|
||||
/* 0D0E58 800D0258 3C188019 */ lui $t8, %hi(D_80196580) # $t8, 0x8019
|
||||
/* 0D0E5C 800D025C 27186580 */ addiu $t8, %lo(D_80196580) # addiu $t8, $t8, 0x6580
|
||||
/* 0D0E60 800D0260 25AD6568 */ addiu $t5, %lo(D_80196568) # addiu $t5, $t5, 0x6568
|
||||
/* 0D0E64 800D0264 AFA20030 */ sw $v0, 0x30($sp)
|
||||
/* 0D0E68 800D0268 AFA30034 */ sw $v1, 0x34($sp)
|
||||
/* 0D0E6C 800D026C 3C048019 */ lui $a0, %hi(D_80196548) # $a0, 0x8019
|
||||
/* 0D0E70 800D0270 240E0000 */ li $t6, 0
|
||||
/* 0D0E74 800D0274 240F0000 */ li $t7, 0
|
||||
/* 0D0E78 800D0278 AFAF0014 */ sw $t7, 0x14($sp)
|
||||
/* 0D0E7C 800D027C AFAE0010 */ sw $t6, 0x10($sp)
|
||||
/* 0D0E80 800D0280 24846548 */ addiu $a0, %lo(D_80196548) # addiu $a0, $a0, 0x6548
|
||||
/* 0D0E84 800D0284 8FA70034 */ lw $a3, 0x34($sp)
|
||||
/* 0D0E88 800D0288 8FA60030 */ lw $a2, 0x30($sp)
|
||||
/* 0D0E8C 800D028C AFAD0018 */ sw $t5, 0x18($sp)
|
||||
/* 0D0E90 800D0290 0C034E70 */ jal osSetTimer
|
||||
/* 0D0E94 800D0294 AFB8001C */ sw $t8, 0x1c($sp)
|
||||
/* 0D0E98 800D0298 3C048019 */ lui $a0, %hi(D_80196568) # $a0, 0x8019
|
||||
/* 0D0E9C 800D029C 24846568 */ addiu $a0, %lo(D_80196568) # addiu $a0, $a0, 0x6568
|
||||
/* 0D0EA0 800D02A0 00002825 */ move $a1, $zero
|
||||
/* 0D0EA4 800D02A4 0C0335D4 */ jal osRecvMesg
|
||||
/* 0D0EA8 800D02A8 24060001 */ li $a2, 1
|
||||
/* 0D0EAC 800D02AC 8FB9004C */ lw $t9, 0x4c($sp)
|
||||
/* 0D0EB0 800D02B0 1F20FFC6 */ bgtz $t9, .L800D01CC
|
||||
/* 0D0EB4 800D02B4 00000000 */ nop
|
||||
.L800D02B8:
|
||||
/* 0D0EB8 800D02B8 8FA2003C */ lw $v0, 0x3c($sp)
|
||||
.L800D02BC:
|
||||
/* 0D0EBC 800D02BC 8FBF0024 */ lw $ra, 0x24($sp)
|
||||
/* 0D0EC0 800D02C0 27BD0040 */ addiu $sp, $sp, 0x40
|
||||
/* 0D0EC4 800D02C4 03E00008 */ jr $ra
|
||||
/* 0D0EC8 800D02C8 00000000 */ nop
|
||||
|
||||
/* 0D0ECC 800D02CC 00000000 */ nop
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel osGetCount
|
||||
mfc0 $v0, $9
|
||||
jr $ra
|
||||
nop
|
||||
|
||||
nop
|
||||
|
||||
|
|
@ -0,0 +1,62 @@
|
|||
# handwritten
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel osInvalDCache
|
||||
/* 0CE780 800CDB80 18A0001F */ blez $a1, .L800CDC00
|
||||
/* 0CE784 800CDB84 00000000 */ nop
|
||||
/* 0CE788 800CDB88 240B2000 */ li $t3, 8192
|
||||
/* 0CE78C 800CDB8C 00AB082B */ sltu $at, $a1, $t3
|
||||
/* 0CE790 800CDB90 1020001D */ beqz $at, .L800CDC08
|
||||
/* 0CE794 800CDB94 00000000 */ nop
|
||||
/* 0CE798 800CDB98 00804025 */ move $t0, $a0
|
||||
/* 0CE79C 800CDB9C 00854821 */ addu $t1, $a0, $a1
|
||||
/* 0CE7A0 800CDBA0 0109082B */ sltu $at, $t0, $t1
|
||||
/* 0CE7A4 800CDBA4 10200016 */ beqz $at, .L800CDC00
|
||||
/* 0CE7A8 800CDBA8 00000000 */ nop
|
||||
/* 0CE7AC 800CDBAC 310A000F */ andi $t2, $t0, 0xf
|
||||
/* 0CE7B0 800CDBB0 11400007 */ beqz $t2, .L800CDBD0
|
||||
/* 0CE7B4 800CDBB4 2529FFF0 */ addiu $t1, $t1, -0x10
|
||||
/* 0CE7B8 800CDBB8 010A4023 */ subu $t0, $t0, $t2
|
||||
/* 0CE7BC 800CDBBC BD150000 */ cache 0x15, ($t0)
|
||||
/* 0CE7C0 800CDBC0 0109082B */ sltu $at, $t0, $t1
|
||||
/* 0CE7C4 800CDBC4 1020000E */ beqz $at, .L800CDC00
|
||||
/* 0CE7C8 800CDBC8 00000000 */ nop
|
||||
/* 0CE7CC 800CDBCC 25080010 */ addiu $t0, $t0, 0x10
|
||||
.L800CDBD0:
|
||||
/* 0CE7D0 800CDBD0 312A000F */ andi $t2, $t1, 0xf
|
||||
/* 0CE7D4 800CDBD4 11400006 */ beqz $t2, .L800CDBF0
|
||||
/* 0CE7D8 800CDBD8 00000000 */ nop
|
||||
/* 0CE7DC 800CDBDC 012A4823 */ subu $t1, $t1, $t2
|
||||
/* 0CE7E0 800CDBE0 BD350010 */ cache 0x15, 0x10($t1)
|
||||
/* 0CE7E4 800CDBE4 0128082B */ sltu $at, $t1, $t0
|
||||
/* 0CE7E8 800CDBE8 14200005 */ bnez $at, .L800CDC00
|
||||
/* 0CE7EC 800CDBEC 00000000 */ nop
|
||||
.L800CDBF0:
|
||||
/* 0CE7F0 800CDBF0 BD110000 */ cache 0x11, ($t0)
|
||||
/* 0CE7F4 800CDBF4 0109082B */ sltu $at, $t0, $t1
|
||||
/* 0CE7F8 800CDBF8 1420FFFD */ bnez $at, .L800CDBF0
|
||||
/* 0CE7FC 800CDBFC 25080010 */ addiu $t0, $t0, 0x10
|
||||
.L800CDC00:
|
||||
/* 0CE800 800CDC00 03E00008 */ jr $ra
|
||||
/* 0CE804 800CDC04 00000000 */ nop
|
||||
|
||||
.L800CDC08:
|
||||
/* 0CE808 800CDC08 3C088000 */ li $t0, 0x80000000
|
||||
/* 0CE80C 800CDC0C 010B4821 */ addu $t1, $t0, $t3
|
||||
/* 0CE810 800CDC10 2529FFF0 */ addiu $t1, $t1, -0x10
|
||||
.L800CDC14:
|
||||
/* 0CE814 800CDC14 BD010000 */ cache 1, ($t0)
|
||||
/* 0CE818 800CDC18 0109082B */ sltu $at, $t0, $t1
|
||||
/* 0CE81C 800CDC1C 1420FFFD */ bnez $at, .L800CDC14
|
||||
/* 0CE820 800CDC20 25080010 */ addiu $t0, $t0, 0x10
|
||||
/* 0CE824 800CDC24 03E00008 */ jr $ra
|
||||
/* 0CE828 800CDC28 00000000 */ nop
|
||||
|
||||
/* 0CE82C 800CDC2C 00000000 */ nop
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
# handwritten
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
|
||||
glabel osInvalICache
|
||||
/* 0CE700 800CDB00 18A00011 */ blez $a1, .L800CDB48
|
||||
/* 0CE704 800CDB04 00000000 */ nop
|
||||
/* 0CE708 800CDB08 240B4000 */ li $t3, 16384
|
||||
/* 0CE70C 800CDB0C 00AB082B */ sltu $at, $a1, $t3
|
||||
/* 0CE710 800CDB10 1020000F */ beqz $at, .L800CDB50
|
||||
/* 0CE714 800CDB14 00000000 */ nop
|
||||
/* 0CE718 800CDB18 00804025 */ move $t0, $a0
|
||||
/* 0CE71C 800CDB1C 00854821 */ addu $t1, $a0, $a1
|
||||
/* 0CE720 800CDB20 0109082B */ sltu $at, $t0, $t1
|
||||
/* 0CE724 800CDB24 10200008 */ beqz $at, .L800CDB48
|
||||
/* 0CE728 800CDB28 00000000 */ nop
|
||||
/* 0CE72C 800CDB2C 310A001F */ andi $t2, $t0, 0x1f
|
||||
/* 0CE730 800CDB30 2529FFE0 */ addiu $t1, $t1, -0x20
|
||||
/* 0CE734 800CDB34 010A4023 */ subu $t0, $t0, $t2
|
||||
.L800CDB38:
|
||||
/* 0CE738 800CDB38 BD100000 */ cache 0x10, ($t0)
|
||||
/* 0CE73C 800CDB3C 0109082B */ sltu $at, $t0, $t1
|
||||
/* 0CE740 800CDB40 1420FFFD */ bnez $at, .L800CDB38
|
||||
/* 0CE744 800CDB44 25080020 */ addiu $t0, $t0, 0x20
|
||||
.L800CDB48:
|
||||
/* 0CE748 800CDB48 03E00008 */ jr $ra
|
||||
/* 0CE74C 800CDB4C 00000000 */ nop
|
||||
|
||||
.L800CDB50:
|
||||
/* 0CE750 800CDB50 3C088000 */ li $t0, 0x80000000
|
||||
/* 0CE754 800CDB54 010B4821 */ addu $t1, $t0, $t3
|
||||
/* 0CE758 800CDB58 2529FFE0 */ addiu $t1, $t1, -0x20
|
||||
.L800CDB5C:
|
||||
/* 0CE75C 800CDB5C BD000000 */ cache 0, ($t0)
|
||||
/* 0CE760 800CDB60 0109082B */ sltu $at, $t0, $t1
|
||||
/* 0CE764 800CDB64 1420FFFD */ bnez $at, .L800CDB5C
|
||||
/* 0CE768 800CDB68 25080020 */ addiu $t0, $t0, 0x20
|
||||
/* 0CE76C 800CDB6C 03E00008 */ jr $ra
|
||||
/* 0CE770 800CDB70 00000000 */ nop
|
||||
|
||||
/* 0CE774 800CDB74 00000000 */ nop
|
||||
/* 0CE778 800CDB78 00000000 */ nop
|
||||
/* 0CE77C 800CDB7C 00000000 */ nop
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel osMapTLBRdb
|
||||
mfc0 $t0, $10
|
||||
li $t1, 31
|
||||
mtc0 $t1, $0
|
||||
mtc0 $zero, $5
|
||||
li $t2, 23
|
||||
lui $t1, 0xc000
|
||||
mtc0 $t1, $10
|
||||
lui $t1, 0x8000
|
||||
srl $t3, $t1, 6
|
||||
or $t3, $t3, $t2
|
||||
mtc0 $t3, $2
|
||||
li $t1, 1
|
||||
mtc0 $t1, $3
|
||||
nop
|
||||
tlbwi
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
mtc0 $t0, $10
|
||||
jr $ra
|
||||
nop
|
||||
|
||||
nop
|
||||
nop
|
||||
|
||||
|
|
@ -0,0 +1,140 @@
|
|||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.eqv MI_INTR_MASK_REG, 0xA430000C
|
||||
|
||||
.set VERSION_EU_SH, 1
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel osSetIntMask
|
||||
.ifdef VERSION_EU_SH
|
||||
mfc0 $t4, $12
|
||||
andi $v0, $t4, 0xff01
|
||||
lui $t0, %hi(__OSGlobalIntMask) # $t0, 0x8030
|
||||
addiu $t0, %lo(__OSGlobalIntMask) # addiu $t0, $t0, 0x208c
|
||||
lw $t3, ($t0)
|
||||
li $at, -1
|
||||
xor $t0, $t3, $at
|
||||
andi $t0, $t0, 0xff00
|
||||
or $v0, $v0, $t0
|
||||
.else
|
||||
mfc0 $t1, $12
|
||||
andi $v0, $t1, 0xff01
|
||||
.endif
|
||||
lui $t2, %hi(MI_INTR_MASK_REG) # $t2, 0xa430
|
||||
lw $t2, %lo(MI_INTR_MASK_REG)($t2)
|
||||
.ifdef VERSION_EU_SH
|
||||
beqz $t2, .L80200074
|
||||
srl $t1, $t3, 0x10
|
||||
li $at, -1
|
||||
xor $t1, $t1, $at
|
||||
andi $t1, $t1, 0x3f
|
||||
or $t2, $t2, $t1
|
||||
.L80200074:
|
||||
.endif
|
||||
sll $t2, $t2, 0x10
|
||||
or $v0, $v0, $t2
|
||||
lui $at, 0x3f
|
||||
and $t0, $a0, $at
|
||||
.ifdef VERSION_EU_SH
|
||||
and $t0, $t0, $t3
|
||||
.endif
|
||||
srl $t0, $t0, 0xf
|
||||
lui $t2, %hi(D_800F3C10)
|
||||
addu $t2, $t2, $t0
|
||||
lhu $t2, %lo(D_800F3C10)($t2)
|
||||
lui $at, %hi(MI_INTR_MASK_REG) # $at, 0xa430
|
||||
sw $t2, %lo(MI_INTR_MASK_REG)($at)
|
||||
andi $t0, $a0, 0xff01
|
||||
.ifdef VERSION_EU_SH
|
||||
andi $t1, $t3, 0xff00
|
||||
and $t0, $t0, $t1
|
||||
.endif
|
||||
lui $at, (0xFFFF00FF >> 16) # lui $at, 0xffff
|
||||
ori $at, (0xFFFF00FF & 0xFFFF) # ori $at, $at, 0xff
|
||||
.ifdef VERSION_EU_SH
|
||||
and $t4, $t4, $at
|
||||
or $t4, $t4, $t0
|
||||
mtc0 $t4, $12
|
||||
.else
|
||||
and $t1, $t1, $at
|
||||
or $t1, $t1, $t0
|
||||
mtc0 $t1, $12
|
||||
.endif
|
||||
nop
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
|
||||
|
||||
.section .rodata
|
||||
|
||||
glabel D_800F3C10
|
||||
.half 0x0555
|
||||
.half 0x0556
|
||||
.half 0x0559
|
||||
.half 0x055A
|
||||
.half 0x0565
|
||||
.half 0x0566
|
||||
.half 0x0569
|
||||
.half 0x056A
|
||||
.half 0x0595
|
||||
.half 0x0596
|
||||
.half 0x0599
|
||||
.half 0x059A
|
||||
.half 0x05A5
|
||||
.half 0x05A6
|
||||
.half 0x05A9
|
||||
.half 0x05AA
|
||||
.half 0x0655
|
||||
.half 0x0656
|
||||
.half 0x0659
|
||||
.half 0x065A
|
||||
.half 0x0665
|
||||
.half 0x0666
|
||||
.half 0x0669
|
||||
.half 0x066A
|
||||
.half 0x0695
|
||||
.half 0x0696
|
||||
.half 0x0699
|
||||
.half 0x069A
|
||||
.half 0x06A5
|
||||
.half 0x06A6
|
||||
.half 0x06A9
|
||||
.half 0x06AA
|
||||
.half 0x0955
|
||||
.half 0x0956
|
||||
.half 0x0959
|
||||
.half 0x095A
|
||||
.half 0x0965
|
||||
.half 0x0966
|
||||
.half 0x0969
|
||||
.half 0x096A
|
||||
.half 0x0995
|
||||
.half 0x0996
|
||||
.half 0x0999
|
||||
.half 0x099A
|
||||
.half 0x09A5
|
||||
.half 0x09A6
|
||||
.half 0x09A9
|
||||
.half 0x09AA
|
||||
.half 0x0A55
|
||||
.half 0x0A56
|
||||
.half 0x0A59
|
||||
.half 0x0A5A
|
||||
.half 0x0A65
|
||||
.half 0x0A66
|
||||
.half 0x0A69
|
||||
.half 0x0A6A
|
||||
.half 0x0A95
|
||||
.half 0x0A96
|
||||
.half 0x0A99
|
||||
.half 0x0A9A
|
||||
.half 0x0AA5
|
||||
.half 0x0AA6
|
||||
.half 0x0AA9
|
||||
.half 0x0AAA
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel osSyncPrintf
|
||||
/* 0D0360 800CF760 AFA40000 */ sw $a0, ($sp)
|
||||
/* 0D0364 800CF764 AFA50004 */ sw $a1, 4($sp)
|
||||
/* 0D0368 800CF768 AFA60008 */ sw $a2, 8($sp)
|
||||
/* 0D036C 800CF76C 03E00008 */ jr $ra
|
||||
/* 0D0370 800CF770 24020001 */ li $v0, 1
|
||||
|
||||
glabel func_800CF774
|
||||
/* 0D0374 800CF774 27BDFFE0 */ addiu $sp, $sp, -0x20
|
||||
/* 0D0378 800CF778 AFA40020 */ sw $a0, 0x20($sp)
|
||||
/* 0D037C 800CF77C AFBF0014 */ sw $ra, 0x14($sp)
|
||||
/* 0D0380 800CF780 AFA50024 */ sw $a1, 0x24($sp)
|
||||
/* 0D0384 800CF784 AFA60028 */ sw $a2, 0x28($sp)
|
||||
/* 0D0388 800CF788 AFA7002C */ sw $a3, 0x2c($sp)
|
||||
/* 0D038C 800CF78C 3C04800D */ lui $a0, %hi(osSyncPrintf) # $a0, 0x800d
|
||||
/* 0D0390 800CF790 2484F760 */ addiu $a0, %lo(osSyncPrintf) # addiu $a0, $a0, -0x8a0
|
||||
/* 0D0394 800CF794 27A70024 */ addiu $a3, $sp, 0x24
|
||||
/* 0D0398 800CF798 8FA60020 */ lw $a2, 0x20($sp)
|
||||
/* 0D039C 800CF79C 0C035AA4 */ jal _Printf
|
||||
/* 0D03A0 800CF7A0 00002825 */ move $a1, $zero
|
||||
/* 0D03A4 800CF7A4 8FBF0014 */ lw $ra, 0x14($sp)
|
||||
/* 0D03A8 800CF7A8 27BD0020 */ addiu $sp, $sp, 0x20
|
||||
/* 0D03AC 800CF7AC 03E00008 */ jr $ra
|
||||
/* 0D03B0 800CF7B0 00000000 */ nop
|
||||
|
||||
/* 0D03B4 800CF7B4 00000000 */ nop
|
||||
/* 0D03B8 800CF7B8 00000000 */ nop
|
||||
/* 0D03BC 800CF7BC 00000000 */ nop
|
||||
|
|
@ -0,0 +1,39 @@
|
|||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel osWritebackDCache
|
||||
blez $a1, .osWritebackDCacheReturn
|
||||
nop
|
||||
li $t3, 8192
|
||||
bgeu $a1, $t3, .L80324E40
|
||||
nop
|
||||
move $t0, $a0
|
||||
addu $t1, $a0, $a1
|
||||
bgeu $t0, $t1, .osWritebackDCacheReturn
|
||||
nop
|
||||
andi $t2, $t0, 0xf
|
||||
addiu $t1, $t1, -0x10
|
||||
subu $t0, $t0, $t2
|
||||
.L80324E28:
|
||||
cache 0x19, ($t0)
|
||||
bltu $t0, $t1, .L80324E28
|
||||
addiu $t0, $t0, 0x10
|
||||
.osWritebackDCacheReturn:
|
||||
jr $ra
|
||||
nop
|
||||
|
||||
.L80324E40:
|
||||
lui $t0, 0x8000
|
||||
addu $t1, $t0, $t3
|
||||
addiu $t1, $t1, -0x10
|
||||
.L80324E4C:
|
||||
cache 1, ($t0)
|
||||
bltu $t0, $t1, .L80324E4C
|
||||
addiu $t0, 0x10 # addiu $t0, $t0, 0x10
|
||||
jr $ra
|
||||
nop
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
# handwritten
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel osWritebackDCacheAll
|
||||
/* 0CE490 800CD890 3C088000 */ li $t0, 0x80000000 # $t0, 0x8000
|
||||
/* 0CE494 800CD894 240A2000 */ li $t2, 8192
|
||||
/* 0CE498 800CD898 010A4821 */ addu $t1, $t0, $t2
|
||||
/* 0CE49C 800CD89C 2529FFF0 */ addiu $t1, $t1, -0x10
|
||||
.L800CD8A0:
|
||||
/* 0CE4A0 800CD8A0 BD010000 */ cache 1, ($t0)
|
||||
/* 0CE4A4 800CD8A4 0109082B */ sltu $at, $t0, $t1
|
||||
/* 0CE4A8 800CD8A8 1420FFFD */ bnez $at, .L800CD8A0
|
||||
/* 0CE4AC 800CD8AC 25080010 */ addiu $t0, $t0, 0x10
|
||||
/* 0CE4B0 800CD8B0 03E00008 */ jr $ra
|
||||
/* 0CE4B4 800CD8B4 00000000 */ nop
|
||||
|
||||
/* 0CE4B8 800CD8B8 00000000 */ nop
|
||||
/* 0CE4BC 800CD8BC 00000000 */ nop
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
# Handwritten
|
||||
# assembler directives
|
||||
.set noat # allow manual use of $at
|
||||
.set noreorder # don't insert nops after branches
|
||||
.set gp=64
|
||||
|
||||
.include "macros.inc"
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
glabel sqrtf
|
||||
/* 0CED40 800CE140 03E00008 */ jr $ra
|
||||
/* 0CED44 800CE144 46006004 */ sqrt.s $f0, $f12
|
||||
|
||||
/* 0CED48 800CE148 00000000 */ nop
|
||||
/* 0CED4C 800CE14C 00000000 */ nop
|
||||
|
|
@ -224,7 +224,7 @@ glabel D_800DC5FC
|
|||
.hword 0x0000, 0x0000
|
||||
|
||||
glabel D_800DC600
|
||||
.word D_8000031C
|
||||
.word osAppNmiBuffer
|
||||
|
||||
glabel gIsMirrorMode
|
||||
.word 0x00000000
|
||||
|
|
|
|||
|
|
@ -3455,403 +3455,3 @@ glabel D_800EA5D8
|
|||
|
||||
glabel D_800EA5DC
|
||||
.word 0x00000000
|
||||
|
||||
glabel osClockRate
|
||||
.dword 0x0000000003b9aca0
|
||||
|
||||
glabel D_800EA5E8
|
||||
.word 0x00000000
|
||||
|
||||
glabel D_800EA5EC
|
||||
.word 0x003fff01
|
||||
|
||||
glabel D_800EA5F0
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800EA600
|
||||
.word 0x00000000
|
||||
.word 0x00000000
|
||||
.word 0x00000000
|
||||
.word 0x00000000
|
||||
|
||||
glabel D_800EA610
|
||||
.word 0x00000000
|
||||
|
||||
.word 0x00000000
|
||||
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x0000320e
|
||||
.word 0x00000140, 0x03e52239, 0x0000020d, 0x00000c15
|
||||
.word 0x0c150c15, 0x006c02ec, 0x00000200, 0x00000000
|
||||
.word 0x00000280, 0x00000400, 0x002501ff, 0x000e0204
|
||||
.word 0x00000002, 0x00000280, 0x00000400, 0x002501ff
|
||||
.word 0x000e0204, 0x00000002, 0x01000000, 0x0000324e
|
||||
.word 0x00000140, 0x03e52239, 0x0000020c, 0x00000c15
|
||||
.word 0x0c150c15, 0x006c02ec, 0x00000200, 0x00000000
|
||||
.word 0x00000280, 0x01000400, 0x002301fd, 0x000e0204
|
||||
.word 0x00000002, 0x00000280, 0x03000400, 0x002501ff
|
||||
.word 0x000e0204, 0x00000002
|
||||
|
||||
glabel D_800EA6C0 # OSViMode
|
||||
.word 0x02000000, 0x0000311e, 0x00000140, 0x03e52239
|
||||
.word 0x0000020d, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000280
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x03000000, 0x0000305e, 0x00000140, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x01000400
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00000280
|
||||
.word 0x03000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x04000000, 0x0000330f, 0x00000140, 0x03e52239
|
||||
.word 0x0000020d, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000500
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x05000000, 0x0000324f, 0x00000140, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x01000400
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00000500
|
||||
.word 0x03000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x06000000, 0x0000301f, 0x00000140, 0x03e52239
|
||||
.word 0x0000020d, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000500
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x07000000, 0x0000305f, 0x00000140, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x01000400
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00000500
|
||||
.word 0x03000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x08000000, 0x0000324e, 0x00000500, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00000a00
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x09000000, 0x0000324e, 0x00000280, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x02000800
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00000a00
|
||||
.word 0x02000800, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x0a000000, 0x0000305e, 0x00000500, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00000a00
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x0b000000, 0x0000305e, 0x00000280, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x02000800
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00000a00
|
||||
.word 0x02000800, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x0c000000, 0x0000334f, 0x00000500, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000a00, 0x00000400
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00001400
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x0D000000, 0x0000324f, 0x00000280, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000a00, 0x02000800
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00001400
|
||||
.word 0x02000800, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x0e000000, 0x0000320e, 0x00000140, 0x0404233a
|
||||
.word 0x00000271, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x00000400
|
||||
.word 0x005f0239, 0x0009026b, 0x00000002, 0x00000280
|
||||
.word 0x00000400, 0x005f0239, 0x0009026b, 0x00000002
|
||||
.word 0x0f000000, 0x0000324e, 0x00000140, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x01000400
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00000280
|
||||
.word 0x03000400, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x10000000, 0x0000311e, 0x00000140, 0x0404233a
|
||||
.word 0x00000271, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x00000400
|
||||
.word 0x005f0239, 0x0009026b, 0x00000002, 0x00000280
|
||||
.word 0x00000400, 0x005f0239, 0x0009026b, 0x00000002
|
||||
.word 0x11000000, 0x0000305e, 0x00000140, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x01000400
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00000280
|
||||
.word 0x03000400, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x12000000, 0x0000330f, 0x00000140, 0x0404233a
|
||||
.word 0x00000271, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x005f0239, 0x0009026b, 0x00000002, 0x00000500
|
||||
.word 0x00000400, 0x005f0239, 0x0009026b, 0x00000002
|
||||
.word 0x13000000, 0x0000324f, 0x00000140, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x01000400
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00000500
|
||||
.word 0x03000400, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x14000000, 0x0000301f, 0x00000140, 0x0404233a
|
||||
.word 0x00000271, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x005f0239, 0x0009026b, 0x00000002, 0x00000500
|
||||
.word 0x00000400, 0x005f0239, 0x0009026b, 0x00000002
|
||||
.word 0x15000000, 0x0000305f, 0x00000140, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x01000400
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00000500
|
||||
.word 0x03000400, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x16000000, 0x0000324e, 0x00000500, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00000a00
|
||||
.word 0x00000400, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x17000000, 0x0000324e, 0x00000280, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x02000800
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00000a00
|
||||
.word 0x02000800, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x18000000, 0x0000305e, 0x00000500, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00000a00
|
||||
.word 0x00000400, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x19000000, 0x0000305e, 0x00000280, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x02000800
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00000a00
|
||||
.word 0x02000800, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x1a000000, 0x0000334f, 0x00000500, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000400, 0x00000000, 0x00000a00, 0x00000400
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00001400
|
||||
.word 0x00000400, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x1b000000, 0x0000324f, 0x00000280, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000400, 0x00000000, 0x00000a00, 0x02000800
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00001400
|
||||
.word 0x02000800, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x1c000000, 0x0000320e, 0x00000140, 0x04651e39
|
||||
.word 0x0000020d, 0x00040c11, 0x0c190c1a, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000280
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x1d000000, 0x0000324e, 0x00000140, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x01000400
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00000280
|
||||
.word 0x03000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
|
||||
glabel D_800EAF80
|
||||
.word 0x1e000000, 0x0000311e, 0x00000140, 0x04651e39
|
||||
.word 0x0000020d, 0x00040c11, 0x0c190c1a, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000280
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x1f000000, 0x0000305e, 0x00000140, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x01000400
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00000280
|
||||
.word 0x03000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x20000000, 0x0000330f, 0x00000140, 0x04651e39
|
||||
.word 0x0000020d, 0x00040c11, 0x0c190c1a, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000500
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x21000000, 0x0000324f, 0x00000140, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x01000400
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00000500
|
||||
.word 0x03000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x22000000, 0x0000301f, 0x00000140, 0x04651e39
|
||||
.word 0x0000020d, 0x00040c11, 0x0c190c1a, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000500
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x23000000, 0x0000305f, 0x00000140, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x01000400
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00000500
|
||||
.word 0x03000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x24000000, 0x0000324e, 0x00000500, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00000a00
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x25000000, 0x0000324e, 0x00000280, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x02000800
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00000a00
|
||||
.word 0x02000800, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x26000000, 0x0000305e, 0x00000500, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00000a00
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x27000000, 0x0000305e, 0x00000280, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x02000800
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00000a00
|
||||
.word 0x02000800, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x28000000, 0x0000334f, 0x00000500, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000a00, 0x00000400
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00001400
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x29000000, 0x0000324f, 0x00000280, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000a00, 0x02000800
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00001400
|
||||
.word 0x02000800, 0x002501ff, 0x000e0204, 0x00000002
|
||||
|
||||
glabel D_800EB340
|
||||
.word 0x00000000
|
||||
|
||||
.word 0x00000000
|
||||
|
||||
.word 0x00000000
|
||||
|
||||
.word 0x00000000
|
||||
|
||||
|
||||
.word 0x00000000
|
||||
|
||||
.word 0x00000000
|
||||
|
||||
.word 0x00000000
|
||||
|
||||
glabel D_800EB35C
|
||||
.word 0x00000000
|
||||
|
||||
glabel D_800EB360
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800EB370
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800EB380
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800EB3A0
|
||||
.word 0x00000000, 0xffffffff
|
||||
|
||||
glabel D_800EB3A8
|
||||
.word D_800EB3A0
|
||||
|
||||
glabel D_800EB3AC
|
||||
.word D_800EB3A0
|
||||
|
||||
glabel D_800EB3B0
|
||||
.word 0x00000000
|
||||
|
||||
glabel D_800EB3B4
|
||||
.word 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800EB3C0
|
||||
.word D_801975E0, 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800EB3D0
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800EB400
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800EB430
|
||||
.word D_800EB3D0
|
||||
|
||||
glabel D_800EB434
|
||||
.word D_800EB400
|
||||
|
||||
glabel D_800EB438
|
||||
.word 0x02e6d354, 0x00000000
|
||||
|
||||
glabel D_800EB440
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800EB450
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800EB460
|
||||
.word 0x20202020, 0x20202020, 0x20202020, 0x20202020
|
||||
.word 0x20202020, 0x20202020, 0x20202020, 0x20202020
|
||||
.word 0x00000000
|
||||
|
||||
glabel D_800EB484
|
||||
.word 0x30303030, 0x30303030, 0x30303030, 0x30303030
|
||||
.word 0x30303030, 0x30303030, 0x30303030, 0x30303030
|
||||
.word 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800EB4B0
|
||||
.word 0x10000000, 0x0000311e, 0x00000140, 0x0404233a
|
||||
.word 0x00000271, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x00000400
|
||||
.word 0x005f0239, 0x0009026b, 0x00000002, 0x00000280
|
||||
.word 0x00000400, 0x005f0239, 0x0009026b, 0x00000002
|
||||
|
||||
glabel D_800EB500
|
||||
.word 0x1e000000, 0x0000311e, 0x00000140, 0x04651e39
|
||||
.word 0x0000020d, 0x00040c11, 0x0c190c1a, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000280
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
|
||||
glabel D_800EB550
|
||||
.word 0x02000000, 0x0000311e, 0x00000140, 0x03e52239
|
||||
.word 0x0000020d, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000280
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
|
||||
.balign 4
|
||||
glabel D_800EB5A0
|
||||
.asciiz "0123456789abcdef"
|
||||
|
||||
.balign 4
|
||||
glabel D_800EB5B4
|
||||
.asciiz "0123456789ABCDEF"
|
||||
|
||||
.balign 4
|
||||
.word 0x00000000, 0x00000000
|
||||
|
||||
.balign 4
|
||||
glabel D_800EB5D0
|
||||
.asciiz "SOUTH "
|
||||
|
||||
.balign 4
|
||||
glabel D_800EB5D8
|
||||
.asciiz "EAST "
|
||||
|
||||
.balign 4
|
||||
glabel D_800EB5E0
|
||||
.asciiz "NORTH "
|
||||
.balign 4
|
||||
|
||||
glabel D_800EB5E8
|
||||
.asciiz "WEST "
|
||||
|
||||
.balign 4
|
||||
glabel D_800EB5F0
|
||||
.asciiz "SOUTH "
|
||||
|
||||
.balign 4
|
||||
glabel D_800EB5F8
|
||||
.double 0.01666666
|
||||
|
||||
glabel D_800EB600
|
||||
.double 0.01666666
|
||||
|
||||
glabel D_800EB608
|
||||
.double 0.01666666
|
||||
|
||||
glabel D_800EB610
|
||||
.double 0.01666666
|
||||
|
||||
glabel D_800EB618
|
||||
.word L80001F0C, L80001F0C, L80001F0C, L80001F0C
|
||||
.word L80001F38, L80001F48, L80001F60, L80001EFC
|
||||
.word L80001F60, L80001F58
|
||||
|
||||
glabel D_800EB640
|
||||
.double 0.01666666
|
||||
|
||||
glabel D_800EB648
|
||||
.word L800026B4, L800026CC, L800026E4, L800026FC
|
||||
.word L80002714, L8000272C, L8000276C, L8000276C
|
||||
.word L8000276C, L8000274C
|
||||
glabel D_800EB670
|
||||
|
|
@ -0,0 +1,288 @@
|
|||
.include "macros.inc"
|
||||
|
||||
.section .data
|
||||
|
||||
# createvimanager .data
|
||||
|
||||
glabel D_800EA5F0
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel viMgrMainArgs
|
||||
.word 0, 0, 0, 0
|
||||
|
||||
glabel D_800EA610
|
||||
.word 0x00000000
|
||||
.word 0x00000000
|
||||
.word 0x00000000
|
||||
|
||||
|
||||
.word 0x00000000
|
||||
.word 0x00000000, 0x0000320e
|
||||
.word 0x00000140, 0x03e52239, 0x0000020d, 0x00000c15
|
||||
.word 0x0c150c15, 0x006c02ec, 0x00000200, 0x00000000
|
||||
.word 0x00000280, 0x00000400, 0x002501ff, 0x000e0204
|
||||
.word 0x00000002, 0x00000280, 0x00000400, 0x002501ff
|
||||
.word 0x000e0204, 0x00000002, 0x01000000, 0x0000324e
|
||||
.word 0x00000140, 0x03e52239, 0x0000020c, 0x00000c15
|
||||
.word 0x0c150c15, 0x006c02ec, 0x00000200, 0x00000000
|
||||
.word 0x00000280, 0x01000400, 0x002301fd, 0x000e0204
|
||||
.word 0x00000002, 0x00000280, 0x03000400, 0x002501ff
|
||||
.word 0x000e0204, 0x00000002
|
||||
|
||||
glabel D_800EA6C0 # OSViMode
|
||||
.word 0x02000000, 0x0000311e, 0x00000140, 0x03e52239
|
||||
.word 0x0000020d, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000280
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x03000000, 0x0000305e, 0x00000140, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x01000400
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00000280
|
||||
.word 0x03000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x04000000, 0x0000330f, 0x00000140, 0x03e52239
|
||||
.word 0x0000020d, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000500
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x05000000, 0x0000324f, 0x00000140, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x01000400
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00000500
|
||||
.word 0x03000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x06000000, 0x0000301f, 0x00000140, 0x03e52239
|
||||
.word 0x0000020d, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000500
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x07000000, 0x0000305f, 0x00000140, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x01000400
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00000500
|
||||
.word 0x03000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x08000000, 0x0000324e, 0x00000500, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00000a00
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x09000000, 0x0000324e, 0x00000280, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x02000800
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00000a00
|
||||
.word 0x02000800, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x0a000000, 0x0000305e, 0x00000500, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00000a00
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x0b000000, 0x0000305e, 0x00000280, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x02000800
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00000a00
|
||||
.word 0x02000800, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x0c000000, 0x0000334f, 0x00000500, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000a00, 0x00000400
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00001400
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x0D000000, 0x0000324f, 0x00000280, 0x03e52239
|
||||
.word 0x0000020c, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000a00, 0x02000800
|
||||
.word 0x002301fd, 0x000e0204, 0x00000002, 0x00001400
|
||||
.word 0x02000800, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x0e000000, 0x0000320e, 0x00000140, 0x0404233a
|
||||
.word 0x00000271, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x00000400
|
||||
.word 0x005f0239, 0x0009026b, 0x00000002, 0x00000280
|
||||
.word 0x00000400, 0x005f0239, 0x0009026b, 0x00000002
|
||||
.word 0x0f000000, 0x0000324e, 0x00000140, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x01000400
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00000280
|
||||
.word 0x03000400, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x10000000, 0x0000311e, 0x00000140, 0x0404233a
|
||||
.word 0x00000271, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x00000400
|
||||
.word 0x005f0239, 0x0009026b, 0x00000002, 0x00000280
|
||||
.word 0x00000400, 0x005f0239, 0x0009026b, 0x00000002
|
||||
.word 0x11000000, 0x0000305e, 0x00000140, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x01000400
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00000280
|
||||
.word 0x03000400, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x12000000, 0x0000330f, 0x00000140, 0x0404233a
|
||||
.word 0x00000271, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x005f0239, 0x0009026b, 0x00000002, 0x00000500
|
||||
.word 0x00000400, 0x005f0239, 0x0009026b, 0x00000002
|
||||
.word 0x13000000, 0x0000324f, 0x00000140, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x01000400
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00000500
|
||||
.word 0x03000400, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x14000000, 0x0000301f, 0x00000140, 0x0404233a
|
||||
.word 0x00000271, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x005f0239, 0x0009026b, 0x00000002, 0x00000500
|
||||
.word 0x00000400, 0x005f0239, 0x0009026b, 0x00000002
|
||||
.word 0x15000000, 0x0000305f, 0x00000140, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x01000400
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00000500
|
||||
.word 0x03000400, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x16000000, 0x0000324e, 0x00000500, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00000a00
|
||||
.word 0x00000400, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x17000000, 0x0000324e, 0x00000280, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x02000800
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00000a00
|
||||
.word 0x02000800, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x18000000, 0x0000305e, 0x00000500, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00000a00
|
||||
.word 0x00000400, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x19000000, 0x0000305e, 0x00000280, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x02000800
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00000a00
|
||||
.word 0x02000800, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x1a000000, 0x0000334f, 0x00000500, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000400, 0x00000000, 0x00000a00, 0x00000400
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00001400
|
||||
.word 0x00000400, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x1b000000, 0x0000324f, 0x00000280, 0x0404233a
|
||||
.word 0x00000270, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000400, 0x00000000, 0x00000a00, 0x02000800
|
||||
.word 0x005d0237, 0x0009026b, 0x00000002, 0x00001400
|
||||
.word 0x02000800, 0x005f0239, 0x000d0269, 0x00000002
|
||||
.word 0x1c000000, 0x0000320e, 0x00000140, 0x04651e39
|
||||
.word 0x0000020d, 0x00040c11, 0x0c190c1a, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000280
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x1d000000, 0x0000324e, 0x00000140, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x01000400
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00000280
|
||||
.word 0x03000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
|
||||
glabel D_800EAF80
|
||||
.word 0x1e000000, 0x0000311e, 0x00000140, 0x04651e39
|
||||
.word 0x0000020d, 0x00040c11, 0x0c190c1a, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000280
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x1f000000, 0x0000305e, 0x00000140, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x01000400
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00000280
|
||||
.word 0x03000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x20000000, 0x0000330f, 0x00000140, 0x04651e39
|
||||
.word 0x0000020d, 0x00040c11, 0x0c190c1a, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000500
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x21000000, 0x0000324f, 0x00000140, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x01000400
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00000500
|
||||
.word 0x03000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x22000000, 0x0000301f, 0x00000140, 0x04651e39
|
||||
.word 0x0000020d, 0x00040c11, 0x0c190c1a, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000500
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x23000000, 0x0000305f, 0x00000140, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000500, 0x01000400
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00000500
|
||||
.word 0x03000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x24000000, 0x0000324e, 0x00000500, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00000a00
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x25000000, 0x0000324e, 0x00000280, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x02000800
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00000a00
|
||||
.word 0x02000800, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x26000000, 0x0000305e, 0x00000500, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x00000400
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00000a00
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x27000000, 0x0000305e, 0x00000280, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000500, 0x02000800
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00000a00
|
||||
.word 0x02000800, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x28000000, 0x0000334f, 0x00000500, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000a00, 0x00000400
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00001400
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
.word 0x29000000, 0x0000324f, 0x00000280, 0x04651e39
|
||||
.word 0x0000020c, 0x00000c10, 0x0c1c0c1c, 0x006c02ec
|
||||
.word 0x00000400, 0x00000000, 0x00000a00, 0x02000800
|
||||
.word 0x002301fd, 0x000b0202, 0x00000002, 0x00001400
|
||||
.word 0x02000800, 0x002501ff, 0x000e0204, 0x00000002
|
||||
|
||||
|
||||
# osPiStartDma .data
|
||||
glabel __osPiDevMgr
|
||||
.word 0x00000000
|
||||
|
||||
.word 0x00000000
|
||||
|
||||
.word 0x00000000
|
||||
|
||||
.word 0x00000000
|
||||
|
||||
|
||||
.word 0x00000000
|
||||
|
||||
.word 0x00000000
|
||||
|
||||
.word 0x00000000
|
||||
|
||||
glabel __osPiTable
|
||||
.word 0x00000000
|
||||
|
||||
glabel D_800EB360
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800EB370
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel __osHwIntTable
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
.word 0x00000000, 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800EB3A0
|
||||
.word 0x00000000, 0xffffffff
|
||||
|
||||
glabel __osRunQueue
|
||||
.word D_800EB3A0
|
||||
|
||||
glabel __osActiveQueue
|
||||
.word D_800EB3A0
|
||||
|
||||
glabel __osRunningThread
|
||||
.word 0x00000000
|
||||
|
||||
glabel D_800EB3B4
|
||||
.word 0x00000000
|
||||
|
||||
.balign 16
|
||||
|
||||
# glabel __osTimerList
|
||||
# .word __osBaseTimer
|
||||
|
||||
# .word 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
|
|
@ -7335,14 +7335,15 @@ glabel D_800F39C0
|
|||
.word L800CBE60, L800CBE78, L800CBE90, L800CBEA8
|
||||
.word L800CBEC0, L800CBECC, L800CBF08, L800CBEEC
|
||||
|
||||
|
||||
# guRotateF rodata
|
||||
glabel D_800F39E0
|
||||
.float 0.017453292
|
||||
|
||||
.balign 16
|
||||
|
||||
# guPerspectiveF rodata
|
||||
glabel D_800F39F0
|
||||
.double 0.017453292222222222
|
||||
|
||||
.word 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800F3A00
|
||||
|
|
@ -7358,77 +7359,7 @@ glabel D_800F3A20
|
|||
|
||||
.word 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800F3A50
|
||||
.word L800D3480, L800D3374, L800D33B4, L800D34A0
|
||||
.word L800D34A0, L800D33F0, L800D3438, 0x00000000
|
||||
# glabel D_800F3A50
|
||||
# .word L800D3480, L800D3374, L800D33B4, L800D34A0
|
||||
# .word L800D34A0, L800D33F0, L800D3438, 0x00000000
|
||||
|
||||
glabel D_800F3A70
|
||||
.double 1.0
|
||||
.double -0.16666659550427756
|
||||
.double 0.0083330662460821547
|
||||
.double -0.00019809602901937949
|
||||
.double 2.6057806379680372e-06
|
||||
|
||||
glabel D_800F3A98
|
||||
.double 0.31830988618379069
|
||||
|
||||
glabel D_800F3AA0
|
||||
.double 3.1415926218032837
|
||||
|
||||
glabel D_800F3AA8
|
||||
.double 3.1786509547056392e-08
|
||||
|
||||
glabel D_800F3AB0
|
||||
.float 0.0
|
||||
|
||||
.word 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800F3AC0
|
||||
.double 1.0
|
||||
.double -0.16666659550427756
|
||||
.double 0.0083330662460821547
|
||||
.double -0.00019809602901937949
|
||||
.double 2.6057806379680372e-06
|
||||
|
||||
glabel D_800F3AE8
|
||||
.double 0.31830988618379069
|
||||
|
||||
glabel D_800F3AF0
|
||||
.double 3.1415926218032837
|
||||
|
||||
glabel D_800F3AF8
|
||||
.double 3.1786509547056392e-08
|
||||
|
||||
glabel D_800F3B00
|
||||
.float 0.0
|
||||
|
||||
.word 0x00000000, 0x00000000, 0x00000000
|
||||
|
||||
glabel D_800F3B10
|
||||
.asciiz "hlL"
|
||||
|
||||
.balign 4
|
||||
glabel D_800F3B14
|
||||
.asciiz " +-#0"
|
||||
|
||||
.balign 4
|
||||
glabel D_800F3B1C
|
||||
.word 0x00000001, 0x00000002, 0x00000004, 0x00000008
|
||||
.word 0x00000010, 0x00000000
|
||||
|
||||
glabel D_800F3B34
|
||||
.word L800D6788, L800D6A68, L800D6788, L800D6A68
|
||||
.word L800D6A68, L800D6A68, L800D6A68, L800D6A68
|
||||
.word L800D6A68, L800D6A68, L800D6A68, L800D6A68
|
||||
.word L800D6A68, L800D6A68, L800D6A68, L800D6A68
|
||||
.word L800D6A68, L800D6A68, L800D6A68, L800D6638
|
||||
.word L800D6A68, L800D6A68, L800D6A68, L800D6A68
|
||||
.word L800D6A68, L800D6A68, L800D6A68, L800D6A68
|
||||
.word L800D6A68, L800D6A68, L800D6490, L800D64C8
|
||||
.word L800D6788, L800D6788, L800D6788, L800D6A68
|
||||
.word L800D64C8, L800D6A68, L800D6A68, L800D6A68
|
||||
.word L800D6A68, L800D68EC, L800D6638, L800D69BC
|
||||
.word L800D6A68, L800D6A68, L800D6A04, L800D6A68
|
||||
.word L800D6638, L800D6A68, L800D6A68, L800D6638
|
||||
|
||||
.word 0x00000000, 0x00000000, 0x00000000
|
||||
|
|
|
|||
|
|
@ -0,0 +1,25 @@
|
|||
.include "macros.inc"
|
||||
|
||||
.section .rodata
|
||||
|
||||
glabel osViModePalLan1
|
||||
.word 0x10000000, 0x0000311e, 0x00000140, 0x0404233a
|
||||
.word 0x00000271, 0x00150c69, 0x0c6f0c6e, 0x00800300
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x00000400
|
||||
.word 0x005f0239, 0x0009026b, 0x00000002, 0x00000280
|
||||
.word 0x00000400, 0x005f0239, 0x0009026b, 0x00000002
|
||||
|
||||
glabel osViModeMpalLan1
|
||||
.word 0x1e000000, 0x0000311e, 0x00000140, 0x04651e39
|
||||
.word 0x0000020d, 0x00040c11, 0x0c190c1a, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000280
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
|
||||
glabel osViModeNtscLan1
|
||||
.word 0x02000000, 0x0000311e, 0x00000140, 0x03e52239
|
||||
.word 0x0000020d, 0x00000c15, 0x0c150c15, 0x006c02ec
|
||||
.word 0x00000200, 0x00000000, 0x00000280, 0x00000400
|
||||
.word 0x002501ff, 0x000e0204, 0x00000002, 0x00000280
|
||||
.word 0x00000400, 0x002501ff, 0x000e0204, 0x00000002
|
||||
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
.include "macros.inc"
|
||||
|
||||
.section .rodata
|
||||
|
||||
.balign 4
|
||||
glabel D_800EB5D0
|
||||
.asciiz "SOUTH "
|
||||
|
||||
.balign 4
|
||||
glabel D_800EB5D8
|
||||
.asciiz "EAST "
|
||||
|
||||
.balign 4
|
||||
glabel D_800EB5E0
|
||||
.asciiz "NORTH "
|
||||
.balign 4
|
||||
|
||||
glabel D_800EB5E8
|
||||
.asciiz "WEST "
|
||||
|
||||
.balign 4
|
||||
glabel D_800EB5F0
|
||||
.asciiz "SOUTH "
|
||||
|
||||
.balign 4
|
||||
glabel D_800EB5F8
|
||||
.double 0.01666666
|
||||
|
||||
glabel D_800EB600
|
||||
.double 0.01666666
|
||||
|
||||
glabel D_800EB608
|
||||
.double 0.01666666
|
||||
|
||||
glabel D_800EB610
|
||||
.double 0.01666666
|
||||
|
||||
glabel D_800EB618
|
||||
.word L80001F0C, L80001F0C, L80001F0C, L80001F0C
|
||||
.word L80001F38, L80001F48, L80001F60, L80001EFC
|
||||
.word L80001F60, L80001F58
|
||||
|
||||
glabel D_800EB640
|
||||
.double 0.01666666
|
||||
|
||||
glabel D_800EB648
|
||||
.word L800026B4, L800026CC, L800026E4, L800026FC
|
||||
.word L80002714, L8000272C, L8000276C, L8000276C
|
||||
.word L8000276C, L8000274C
|
||||
glabel D_800EB670
|
||||
|
|
@ -0,0 +1,453 @@
|
|||
/**************************************************************************
|
||||
* *
|
||||
* Copyright (C) 1995, Silicon Graphics, Inc. *
|
||||
* *
|
||||
* These coded instructions, statements, and computer programs contain *
|
||||
* unpublished proprietary information of Silicon Graphics, Inc., and *
|
||||
* are protected by Federal copyright law. They may not be disclosed *
|
||||
* to third parties or copied or duplicated in any form, in whole or *
|
||||
* in part, without the prior written consent of Silicon Graphics, Inc. *
|
||||
* *
|
||||
**************************************************************************/
|
||||
|
||||
/**************************************************************************
|
||||
*
|
||||
* $Revision: 1.13 $
|
||||
* $Date: 1997/02/11 08:15:34 $
|
||||
* $Source: /disk6/Master/cvsmdev2/PR/include/R4300.h,v $
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
#ifndef __R4300_H__
|
||||
#define __R4300_H__
|
||||
|
||||
#include <PR/ultratypes.h>
|
||||
|
||||
/*
|
||||
* Segment base addresses and sizes
|
||||
*/
|
||||
#define KUBASE 0
|
||||
#define KUSIZE 0x80000000
|
||||
#define K0BASE 0x80000000
|
||||
#define K0SIZE 0x20000000
|
||||
#define K1BASE 0xA0000000
|
||||
#define K1SIZE 0x20000000
|
||||
#define K2BASE 0xC0000000
|
||||
#define K2SIZE 0x20000000
|
||||
|
||||
/*
|
||||
* Exception vectors
|
||||
*/
|
||||
#define SIZE_EXCVEC 0x80 /* Size of an exc. vec */
|
||||
#define UT_VEC K0BASE /* utlbmiss vector */
|
||||
#define R_VEC (K1BASE+0x1fc00000) /* reset vector */
|
||||
#define XUT_VEC (K0BASE+0x80) /* extended address tlbmiss */
|
||||
#define ECC_VEC (K0BASE+0x100) /* Ecc exception vector */
|
||||
#define E_VEC (K0BASE+0x180) /* Gen. exception vector */
|
||||
|
||||
/*
|
||||
* Address conversion macros
|
||||
*/
|
||||
#ifdef _LANGUAGE_ASSEMBLY
|
||||
|
||||
#define K0_TO_K1(x) ((x)|0xA0000000) /* kseg0 to kseg1 */
|
||||
#define K1_TO_K0(x) ((x)&0x9FFFFFFF) /* kseg1 to kseg0 */
|
||||
#define K0_TO_PHYS(x) ((x)&0x1FFFFFFF) /* kseg0 to physical */
|
||||
#define K1_TO_PHYS(x) ((x)&0x1FFFFFFF) /* kseg1 to physical */
|
||||
#define KDM_TO_PHYS(x) ((x)&0x1FFFFFFF) /* direct mapped to physical */
|
||||
#define PHYS_TO_K0(x) ((x)|0x80000000) /* physical to kseg0 */
|
||||
#define PHYS_TO_K1(x) ((x)|0xA0000000) /* physical to kseg1 */
|
||||
|
||||
#else /* _LANGUAGE_C */
|
||||
|
||||
#define K0_TO_K1(x) ((u32)(x)|0xA0000000) /* kseg0 to kseg1 */
|
||||
#define K1_TO_K0(x) ((u32)(x)&0x9FFFFFFF) /* kseg1 to kseg0 */
|
||||
#define K0_TO_PHYS(x) ((u32)(x)&0x1FFFFFFF) /* kseg0 to physical */
|
||||
#define K1_TO_PHYS(x) ((u32)(x)&0x1FFFFFFF) /* kseg1 to physical */
|
||||
#define KDM_TO_PHYS(x) ((u32)(x)&0x1FFFFFFF) /* direct mapped to physical */
|
||||
#define PHYS_TO_K0(x) ((u32)(x)|0x80000000) /* physical to kseg0 */
|
||||
#define PHYS_TO_K1(x) ((u32)(x)|0xA0000000) /* physical to kseg1 */
|
||||
|
||||
#endif /* _LANGUAGE_ASSEMBLY */
|
||||
|
||||
/*
|
||||
* Address predicates
|
||||
*/
|
||||
#define IS_KSEG0(x) ((u32)(x) >= K0BASE && (u32)(x) < K1BASE)
|
||||
#define IS_KSEG1(x) ((u32)(x) >= K1BASE && (u32)(x) < K2BASE)
|
||||
#define IS_KSEGDM(x) ((u32)(x) >= K0BASE && (u32)(x) < K2BASE)
|
||||
#define IS_KSEG2(x) ((u32)(x) >= K2BASE && (u32)(x) < KPTE_SHDUBASE)
|
||||
#define IS_KPTESEG(x) ((u32)(x) >= KPTE_SHDUBASE)
|
||||
#define IS_KUSEG(x) ((u32)(x) < K0BASE)
|
||||
|
||||
/*
|
||||
* TLB size constants
|
||||
*/
|
||||
|
||||
#define NTLBENTRIES 31 /* entry 31 is reserved by rdb */
|
||||
|
||||
#define TLBHI_VPN2MASK 0xffffe000
|
||||
#define TLBHI_VPN2SHIFT 13
|
||||
#define TLBHI_PIDMASK 0xff
|
||||
#define TLBHI_PIDSHIFT 0
|
||||
#define TLBHI_NPID 255 /* 255 to fit in 8 bits */
|
||||
|
||||
#define TLBLO_PFNMASK 0x3fffffc0
|
||||
#define TLBLO_PFNSHIFT 6
|
||||
#define TLBLO_CACHMASK 0x38 /* cache coherency algorithm */
|
||||
#define TLBLO_CACHSHIFT 3
|
||||
#define TLBLO_UNCACHED 0x10 /* not cached */
|
||||
#define TLBLO_NONCOHRNT 0x18 /* Cacheable non-coherent */
|
||||
#define TLBLO_EXLWR 0x28 /* Exclusive write */
|
||||
#define TLBLO_D 0x4 /* writeable */
|
||||
#define TLBLO_V 0x2 /* valid bit */
|
||||
#define TLBLO_G 0x1 /* global access bit */
|
||||
|
||||
#define TLBINX_PROBE 0x80000000
|
||||
#define TLBINX_INXMASK 0x3f
|
||||
#define TLBINX_INXSHIFT 0
|
||||
|
||||
#define TLBRAND_RANDMASK 0x3f
|
||||
#define TLBRAND_RANDSHIFT 0
|
||||
|
||||
#define TLBWIRED_WIREDMASK 0x3f
|
||||
|
||||
#define TLBCTXT_BASEMASK 0xff800000
|
||||
#define TLBCTXT_BASESHIFT 23
|
||||
#define TLBCTXT_BASEBITS 9
|
||||
|
||||
#define TLBCTXT_VPNMASK 0x7ffff0
|
||||
#define TLBCTXT_VPNSHIFT 4
|
||||
|
||||
#define TLBPGMASK_4K 0x0
|
||||
#define TLBPGMASK_16K 0x6000
|
||||
#define TLBPGMASK_64K 0x1e000
|
||||
|
||||
/*
|
||||
* Status register
|
||||
*/
|
||||
#define SR_CUMASK 0xf0000000 /* coproc usable bits */
|
||||
|
||||
#define SR_CU3 0x80000000 /* Coprocessor 3 usable */
|
||||
#define SR_CU2 0x40000000 /* Coprocessor 2 usable */
|
||||
#define SR_CU1 0x20000000 /* Coprocessor 1 usable */
|
||||
#define SR_CU0 0x10000000 /* Coprocessor 0 usable */
|
||||
#define SR_RP 0x08000000 /* Reduced power (quarter speed) */
|
||||
#define SR_FR 0x04000000 /* MIPS III FP register mode */
|
||||
#define SR_RE 0x02000000 /* Reverse endian */
|
||||
#define SR_ITS 0x01000000 /* Instruction trace support */
|
||||
#define SR_BEV 0x00400000 /* Use boot exception vectors */
|
||||
#define SR_TS 0x00200000 /* TLB shutdown */
|
||||
#define SR_SR 0x00100000 /* Soft reset occured */
|
||||
#define SR_CH 0x00040000 /* Cache hit for last 'cache' op */
|
||||
#define SR_CE 0x00020000 /* Create ECC */
|
||||
#define SR_DE 0x00010000 /* ECC of parity does not cause error */
|
||||
|
||||
/*
|
||||
* Interrupt enable bits
|
||||
* (NOTE: bits set to 1 enable the corresponding level interrupt)
|
||||
*/
|
||||
#define SR_IMASK 0x0000ff00 /* Interrupt mask */
|
||||
#define SR_IMASK8 0x00000000 /* mask level 8 */
|
||||
#define SR_IMASK7 0x00008000 /* mask level 7 */
|
||||
#define SR_IMASK6 0x0000c000 /* mask level 6 */
|
||||
#define SR_IMASK5 0x0000e000 /* mask level 5 */
|
||||
#define SR_IMASK4 0x0000f000 /* mask level 4 */
|
||||
#define SR_IMASK3 0x0000f800 /* mask level 3 */
|
||||
#define SR_IMASK2 0x0000fc00 /* mask level 2 */
|
||||
#define SR_IMASK1 0x0000fe00 /* mask level 1 */
|
||||
#define SR_IMASK0 0x0000ff00 /* mask level 0 */
|
||||
|
||||
#define SR_IBIT8 0x00008000 /* bit level 8 */
|
||||
#define SR_IBIT7 0x00004000 /* bit level 7 */
|
||||
#define SR_IBIT6 0x00002000 /* bit level 6 */
|
||||
#define SR_IBIT5 0x00001000 /* bit level 5 */
|
||||
#define SR_IBIT4 0x00000800 /* bit level 4 */
|
||||
#define SR_IBIT3 0x00000400 /* bit level 3 */
|
||||
#define SR_IBIT2 0x00000200 /* bit level 2 */
|
||||
#define SR_IBIT1 0x00000100 /* bit level 1 */
|
||||
|
||||
#define SR_IMASKSHIFT 8
|
||||
|
||||
#define SR_KX 0x00000080 /* extended-addr TLB vec in kernel */
|
||||
#define SR_SX 0x00000040 /* xtended-addr TLB vec supervisor */
|
||||
#define SR_UX 0x00000020 /* xtended-addr TLB vec in user mode */
|
||||
#define SR_KSU_MASK 0x00000018 /* mode mask */
|
||||
#define SR_KSU_USR 0x00000010 /* user mode */
|
||||
#define SR_KSU_SUP 0x00000008 /* supervisor mode */
|
||||
#define SR_KSU_KER 0x00000000 /* kernel mode */
|
||||
#define SR_ERL 0x00000004 /* Error level, 1=>cache error */
|
||||
#define SR_EXL 0x00000002 /* Exception level, 1=>exception */
|
||||
#define SR_IE 0x00000001 /* interrupt enable, 1=>enable */
|
||||
|
||||
/*
|
||||
* Cause Register
|
||||
*/
|
||||
#define CAUSE_BD 0x80000000 /* Branch delay slot */
|
||||
#define CAUSE_CEMASK 0x30000000 /* coprocessor error */
|
||||
#define CAUSE_CESHIFT 28
|
||||
|
||||
/* Interrupt pending bits */
|
||||
#define CAUSE_IP8 0x00008000 /* External level 8 pending - COMPARE */
|
||||
#define CAUSE_IP7 0x00004000 /* External level 7 pending - INT4 */
|
||||
#define CAUSE_IP6 0x00002000 /* External level 6 pending - INT3 */
|
||||
#define CAUSE_IP5 0x00001000 /* External level 5 pending - INT2 */
|
||||
#define CAUSE_IP4 0x00000800 /* External level 4 pending - INT1 */
|
||||
#define CAUSE_IP3 0x00000400 /* External level 3 pending - INT0 */
|
||||
#define CAUSE_SW2 0x00000200 /* Software level 2 pending */
|
||||
#define CAUSE_SW1 0x00000100 /* Software level 1 pending */
|
||||
|
||||
#define CAUSE_IPMASK 0x0000FF00 /* Pending interrupt mask */
|
||||
#define CAUSE_IPSHIFT 8
|
||||
|
||||
#define CAUSE_EXCMASK 0x0000007C /* Cause code bits */
|
||||
|
||||
#define CAUSE_EXCSHIFT 2
|
||||
|
||||
/* Cause register exception codes */
|
||||
|
||||
#define EXC_CODE(x) ((x)<<2)
|
||||
|
||||
/* Hardware exception codes */
|
||||
#define EXC_INT EXC_CODE(0) /* interrupt */
|
||||
#define EXC_MOD EXC_CODE(1) /* TLB mod */
|
||||
#define EXC_RMISS EXC_CODE(2) /* Read TLB Miss */
|
||||
#define EXC_WMISS EXC_CODE(3) /* Write TLB Miss */
|
||||
#define EXC_RADE EXC_CODE(4) /* Read Address Error */
|
||||
#define EXC_WADE EXC_CODE(5) /* Write Address Error */
|
||||
#define EXC_IBE EXC_CODE(6) /* Instruction Bus Error */
|
||||
#define EXC_DBE EXC_CODE(7) /* Data Bus Error */
|
||||
#define EXC_SYSCALL EXC_CODE(8) /* SYSCALL */
|
||||
#define EXC_BREAK EXC_CODE(9) /* BREAKpoint */
|
||||
#define EXC_II EXC_CODE(10) /* Illegal Instruction */
|
||||
#define EXC_CPU EXC_CODE(11) /* CoProcessor Unusable */
|
||||
#define EXC_OV EXC_CODE(12) /* OVerflow */
|
||||
#define EXC_TRAP EXC_CODE(13) /* Trap exception */
|
||||
#define EXC_VCEI EXC_CODE(14) /* Virt. Coherency on Inst. fetch */
|
||||
#define EXC_FPE EXC_CODE(15) /* Floating Point Exception */
|
||||
#define EXC_WATCH EXC_CODE(23) /* Watchpoint reference */
|
||||
#define EXC_VCED EXC_CODE(31) /* Virt. Coherency on data read */
|
||||
|
||||
/* C0_PRID Defines */
|
||||
#define C0_IMPMASK 0xff00
|
||||
#define C0_IMPSHIFT 8
|
||||
#define C0_REVMASK 0xff
|
||||
#define C0_MAJREVMASK 0xf0
|
||||
#define C0_MAJREVSHIFT 4
|
||||
#define C0_MINREVMASK 0xf
|
||||
|
||||
/*
|
||||
* Coprocessor 0 operations
|
||||
*/
|
||||
#define C0_READI 0x1 /* read ITLB entry addressed by C0_INDEX */
|
||||
#define C0_WRITEI 0x2 /* write ITLB entry addressed by C0_INDEX */
|
||||
#define C0_WRITER 0x6 /* write ITLB entry addressed by C0_RAND */
|
||||
#define C0_PROBE 0x8 /* probe for ITLB entry addressed by TLBHI */
|
||||
#define C0_RFE 0x10 /* restore for exception */
|
||||
|
||||
/*
|
||||
* 'cache' instruction definitions
|
||||
*/
|
||||
|
||||
/* Target cache */
|
||||
#define CACH_PI 0x0 /* specifies primary inst. cache */
|
||||
#define CACH_PD 0x1 /* primary data cache */
|
||||
#define CACH_SI 0x2 /* secondary instruction cache */
|
||||
#define CACH_SD 0x3 /* secondary data cache */
|
||||
|
||||
/* Cache operations */
|
||||
#define C_IINV 0x0 /* index invalidate (inst, 2nd inst) */
|
||||
#define C_IWBINV 0x0 /* index writeback inval (d, sd) */
|
||||
#define C_ILT 0x4 /* index load tag (all) */
|
||||
#define C_IST 0x8 /* index store tag (all) */
|
||||
#define C_CDX 0xc /* create dirty exclusive (d, sd) */
|
||||
#define C_HINV 0x10 /* hit invalidate (all) */
|
||||
#define C_HWBINV 0x14 /* hit writeback inv. (d, sd) */
|
||||
#define C_FILL 0x14 /* fill (i) */
|
||||
#define C_HWB 0x18 /* hit writeback (i, d, sd) */
|
||||
#define C_HSV 0x1c /* hit set virt. (si, sd) */
|
||||
|
||||
/*
|
||||
* Cache size definitions
|
||||
*/
|
||||
#define ICACHE_SIZE 0x4000 /* 16K */
|
||||
#define ICACHE_LINESIZE 32 /* 8 words */
|
||||
#define ICACHE_LINEMASK (ICACHE_LINESIZE-1)
|
||||
|
||||
#define DCACHE_SIZE 0x2000 /* 8K */
|
||||
#define DCACHE_LINESIZE 16 /* 4 words */
|
||||
#define DCACHE_LINEMASK (DCACHE_LINESIZE-1)
|
||||
|
||||
/*
|
||||
* C0_CONFIG register definitions
|
||||
*/
|
||||
#define CONFIG_CM 0x80000000 /* 1 == Master-Checker enabled */
|
||||
#define CONFIG_EC 0x70000000 /* System Clock ratio */
|
||||
#define CONFIG_EC_1_1 0x6 /* System Clock ratio 1 :1 */
|
||||
#define CONFIG_EC_3_2 0x7 /* System Clock ratio 1.5 :1 */
|
||||
#define CONFIG_EC_2_1 0x0 /* System Clock ratio 2 :1 */
|
||||
#define CONFIG_EC_3_1 0x1 /* System Clock ratio 3 :1 */
|
||||
#define CONFIG_EP 0x0f000000 /* Transmit Data Pattern */
|
||||
#define CONFIG_SB 0x00c00000 /* Secondary cache block size */
|
||||
|
||||
#define CONFIG_SS 0x00200000 /* Split scache: 0 == I&D combined */
|
||||
#define CONFIG_SW 0x00100000 /* scache port: 0==128, 1==64 */
|
||||
#define CONFIG_EW 0x000c0000 /* System Port width: 0==64, 1==32 */
|
||||
#define CONFIG_SC 0x00020000 /* 0 -> 2nd cache present */
|
||||
#define CONFIG_SM 0x00010000 /* 0 -> Dirty Shared Coherency enabled*/
|
||||
#define CONFIG_BE 0x00008000 /* Endian-ness: 1 --> BE */
|
||||
#define CONFIG_EM 0x00004000 /* 1 -> ECC mode, 0 -> parity */
|
||||
#define CONFIG_EB 0x00002000 /* Block order:1->sequent,0->subblock */
|
||||
|
||||
#define CONFIG_IC 0x00000e00 /* Primary Icache size */
|
||||
#define CONFIG_DC 0x000001c0 /* Primary Dcache size */
|
||||
#define CONFIG_IB 0x00000020 /* Icache block size */
|
||||
#define CONFIG_DB 0x00000010 /* Dcache block size */
|
||||
#define CONFIG_CU 0x00000008 /* Update on Store-conditional */
|
||||
#define CONFIG_K0 0x00000007 /* K0SEG Coherency algorithm */
|
||||
|
||||
#define CONFIG_UNCACHED 0x00000002 /* K0 is uncached */
|
||||
#define CONFIG_NONCOHRNT 0x00000003
|
||||
#define CONFIG_COHRNT_EXLWR 0x00000005
|
||||
#define CONFIG_SB_SHFT 22 /* shift SB to bit position 0 */
|
||||
#define CONFIG_IC_SHFT 9 /* shift IC to bit position 0 */
|
||||
#define CONFIG_DC_SHFT 6 /* shift DC to bit position 0 */
|
||||
#define CONFIG_BE_SHFT 15 /* shift BE to bit position 0 */
|
||||
|
||||
/*
|
||||
* C0_TAGLO definitions for setting/getting cache states and physaddr bits
|
||||
*/
|
||||
#define SADDRMASK 0xFFFFE000 /* 31..13 -> scache paddr bits 35..17 */
|
||||
#define SVINDEXMASK 0x00000380 /* 9..7: prim virt index bits 14..12 */
|
||||
#define SSTATEMASK 0x00001c00 /* bits 12..10 hold scache line state */
|
||||
#define SINVALID 0x00000000 /* invalid --> 000 == state 0 */
|
||||
#define SCLEANEXCL 0x00001000 /* clean exclusive --> 100 == state 4 */
|
||||
#define SDIRTYEXCL 0x00001400 /* dirty exclusive --> 101 == state 5 */
|
||||
#define SECC_MASK 0x0000007f /* low 7 bits are ecc for the tag */
|
||||
#define SADDR_SHIFT 4 /* shift STagLo (31..13) to 35..17 */
|
||||
|
||||
#define PADDRMASK 0xFFFFFF00 /* PTagLo31..8->prim paddr bits35..12 */
|
||||
#define PADDR_SHIFT 4 /* roll bits 35..12 down to 31..8 */
|
||||
#define PSTATEMASK 0x00C0 /* bits 7..6 hold primary line state */
|
||||
#define PINVALID 0x0000 /* invalid --> 000 == state 0 */
|
||||
#define PCLEANEXCL 0x0080 /* clean exclusive --> 10 == state 2 */
|
||||
#define PDIRTYEXCL 0x00C0 /* dirty exclusive --> 11 == state 3 */
|
||||
#define PPARITY_MASK 0x0001 /* low bit is parity bit (even). */
|
||||
|
||||
/*
|
||||
* C0_CACHE_ERR definitions.
|
||||
*/
|
||||
#define CACHERR_ER 0x80000000 /* 0: inst ref, 1: data ref */
|
||||
#define CACHERR_EC 0x40000000 /* 0: primary, 1: secondary */
|
||||
#define CACHERR_ED 0x20000000 /* 1: data error */
|
||||
#define CACHERR_ET 0x10000000 /* 1: tag error */
|
||||
#define CACHERR_ES 0x08000000 /* 1: external ref, e.g. snoop*/
|
||||
#define CACHERR_EE 0x04000000 /* error on SysAD bus */
|
||||
#define CACHERR_EB 0x02000000 /* complicated, see spec. */
|
||||
#define CACHERR_EI 0x01000000 /* complicated, see spec. */
|
||||
#define CACHERR_SIDX_MASK 0x003ffff8 /* secondary cache index */
|
||||
#define CACHERR_PIDX_MASK 0x00000007 /* primary cache index */
|
||||
#define CACHERR_PIDX_SHIFT 12 /* bits 2..0 are paddr14..12 */
|
||||
|
||||
/* R4000 family supports hardware watchpoints:
|
||||
* C0_WATCHLO:
|
||||
* bits 31..3 are bits 31..3 of physaddr to watch
|
||||
* bit 2: reserved; must be written as 0.
|
||||
* bit 1: when set causes a watchpoint trap on load accesses to paddr.
|
||||
* bit 0: when set traps on stores to paddr;
|
||||
* C0_WATCHHI
|
||||
* bits 31..4 are reserved and must be written as zeros.
|
||||
* bits 3..0 are bits 35..32 of the physaddr to watch
|
||||
*/
|
||||
#define WATCHLO_WTRAP 0x00000001
|
||||
#define WATCHLO_RTRAP 0x00000002
|
||||
#define WATCHLO_ADDRMASK 0xfffffff8
|
||||
#define WATCHLO_VALIDMASK 0xfffffffb
|
||||
#define WATCHHI_VALIDMASK 0x0000000f
|
||||
|
||||
/*
|
||||
* Coprocessor 0 registers
|
||||
*/
|
||||
#ifdef _LANGUAGE_ASSEMBLY
|
||||
#define C0_INX $0
|
||||
#define C0_RAND $1
|
||||
#define C0_ENTRYLO0 $2
|
||||
#define C0_ENTRYLO1 $3
|
||||
#define C0_CONTEXT $4
|
||||
#define C0_PAGEMASK $5 /* page mask */
|
||||
#define C0_WIRED $6 /* # wired entries in tlb */
|
||||
#define C0_BADVADDR $8
|
||||
#define C0_COUNT $9 /* free-running counter */
|
||||
#define C0_ENTRYHI $10
|
||||
#define C0_SR $12
|
||||
#define C0_CAUSE $13
|
||||
#define C0_EPC $14
|
||||
#define C0_PRID $15 /* revision identifier */
|
||||
#define C0_COMPARE $11 /* counter comparison reg. */
|
||||
#define C0_CONFIG $16 /* hardware configuration */
|
||||
#define C0_LLADDR $17 /* load linked address */
|
||||
#define C0_WATCHLO $18 /* watchpoint */
|
||||
#define C0_WATCHHI $19 /* watchpoint */
|
||||
#define C0_ECC $26 /* S-cache ECC and primary parity */
|
||||
#define C0_CACHE_ERR $27 /* cache error status */
|
||||
#define C0_TAGLO $28 /* cache operations */
|
||||
#define C0_TAGHI $29 /* cache operations */
|
||||
#define C0_ERROR_EPC $30 /* ECC error prg. counter */
|
||||
|
||||
# else /* ! _LANGUAGE_ASSEMBLY */
|
||||
|
||||
#define C0_INX 0
|
||||
#define C0_RAND 1
|
||||
#define C0_ENTRYLO0 2
|
||||
#define C0_ENTRYLO1 3
|
||||
#define C0_CONTEXT 4
|
||||
#define C0_PAGEMASK 5 /* page mask */
|
||||
#define C0_WIRED 6 /* # wired entries in tlb */
|
||||
#define C0_BADVADDR 8
|
||||
#define C0_COUNT 9 /* free-running counter */
|
||||
#define C0_ENTRYHI 10
|
||||
#define C0_SR 12
|
||||
#define C0_CAUSE 13
|
||||
#define C0_EPC 14
|
||||
#define C0_PRID 15 /* revision identifier */
|
||||
#define C0_COMPARE 11 /* counter comparison reg. */
|
||||
#define C0_CONFIG 16 /* hardware configuration */
|
||||
#define C0_LLADDR 17 /* load linked address */
|
||||
#define C0_WATCHLO 18 /* watchpoint */
|
||||
#define C0_WATCHHI 19 /* watchpoint */
|
||||
#define C0_ECC 26 /* S-cache ECC and primary parity */
|
||||
#define C0_CACHE_ERR 27 /* cache error status */
|
||||
#define C0_TAGLO 28 /* cache operations */
|
||||
#define C0_TAGHI 29 /* cache operations */
|
||||
#define C0_ERROR_EPC 30 /* ECC error prg. counter */
|
||||
|
||||
#endif /* _LANGUAGE_ASSEMBLY */
|
||||
|
||||
/*
|
||||
* floating-point status register
|
||||
*/
|
||||
#define FPCSR_FS 0x01000000 /* flush denorm to zero */
|
||||
#define FPCSR_C 0x00800000 /* condition bit */
|
||||
#define FPCSR_CE 0x00020000 /* cause: unimplemented operation */
|
||||
#define FPCSR_CV 0x00010000 /* cause: invalid operation */
|
||||
#define FPCSR_CZ 0x00008000 /* cause: division by zero */
|
||||
#define FPCSR_CO 0x00004000 /* cause: overflow */
|
||||
#define FPCSR_CU 0x00002000 /* cause: underflow */
|
||||
#define FPCSR_CI 0x00001000 /* cause: inexact operation */
|
||||
#define FPCSR_EV 0x00000800 /* enable: invalid operation */
|
||||
#define FPCSR_EZ 0x00000400 /* enable: division by zero */
|
||||
#define FPCSR_EO 0x00000200 /* enable: overflow */
|
||||
#define FPCSR_EU 0x00000100 /* enable: underflow */
|
||||
#define FPCSR_EI 0x00000080 /* enable: inexact operation */
|
||||
#define FPCSR_FV 0x00000040 /* flag: invalid operation */
|
||||
#define FPCSR_FZ 0x00000020 /* flag: division by zero */
|
||||
#define FPCSR_FO 0x00000010 /* flag: overflow */
|
||||
#define FPCSR_FU 0x00000008 /* flag: underflow */
|
||||
#define FPCSR_FI 0x00000004 /* flag: inexact operation */
|
||||
#define FPCSR_RM_MASK 0x00000003 /* rounding mode mask */
|
||||
#define FPCSR_RM_RN 0x00000000 /* round to nearest */
|
||||
#define FPCSR_RM_RZ 0x00000001 /* round to zero */
|
||||
#define FPCSR_RM_RP 0x00000002 /* round to positive infinity */
|
||||
#define FPCSR_RM_RM 0x00000003 /* round to negative infinity */
|
||||
|
||||
#endif /* __R4300_H */
|
||||
|
|
@ -0,0 +1,800 @@
|
|||
|
||||
/*====================================================================
|
||||
* os.h
|
||||
*
|
||||
* Copyright 1995, Silicon Graphics, Inc.
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* This is UNPUBLISHED PROPRIETARY SOURCE CODE of Silicon Graphics,
|
||||
* Inc.; the contents of this file may not be disclosed to third
|
||||
* parties, copied or duplicated in any form, in whole or in part,
|
||||
* without the prior written permission of Silicon Graphics, Inc.
|
||||
*
|
||||
* RESTRICTED RIGHTS LEGEND:
|
||||
* Use, duplication or disclosure by the Government is subject to
|
||||
* restrictions as set forth in subdivision (c)(1)(ii) of the Rights
|
||||
* in Technical Data and Computer Software clause at DFARS
|
||||
* 252.227-7013, and/or in similar or successor clauses in the FAR,
|
||||
* DOD or NASA FAR Supplement. Unpublished - rights reserved under the
|
||||
* Copyright Laws of the United States.
|
||||
*====================================================================*/
|
||||
|
||||
/**************************************************************************
|
||||
*
|
||||
* $Revision: 1.149 $
|
||||
* $Date: 1997/12/15 04:30:52 $
|
||||
* $Source: /disk6/Master/cvsmdev2/PR/include/os.h,v $
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
|
||||
#ifndef _OS_H_
|
||||
#define _OS_H_
|
||||
|
||||
#ifdef _LANGUAGE_C_PLUS_PLUS
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <PR/ultratypes.h>
|
||||
#include "PR/os_message.h"
|
||||
|
||||
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
|
||||
|
||||
/**************************************************************************
|
||||
*
|
||||
* Type definitions
|
||||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
* Structure for device manager block
|
||||
*/
|
||||
typedef struct {
|
||||
s32 active; /* Status flag */
|
||||
OSThread *thread; /* Calling thread */
|
||||
OSMesgQueue *cmdQueue; /* Command queue */
|
||||
OSMesgQueue *evtQueue; /* Event queue */
|
||||
OSMesgQueue *acsQueue; /* Access queue */
|
||||
/* Raw DMA routine */
|
||||
s32 (*dma)(s32, u32, void *, u32);
|
||||
s32 (*edma)(OSPiHandle *, s32, u32, void *, u32);
|
||||
} OSDevMgr;
|
||||
|
||||
/*
|
||||
* Structure for file system
|
||||
*/
|
||||
|
||||
|
||||
|
||||
typedef struct {
|
||||
int status;
|
||||
OSMesgQueue *queue;
|
||||
int channel;
|
||||
u8 id[32];
|
||||
u8 label[32];
|
||||
int version;
|
||||
int dir_size;
|
||||
int inode_table; /* block location */
|
||||
int minode_table; /* mirrioring inode_table */
|
||||
int dir_table; /* block location */
|
||||
int inode_start_page; /* page # */
|
||||
u8 banks;
|
||||
u8 activebank;
|
||||
} OSPfs;
|
||||
|
||||
|
||||
typedef struct {
|
||||
u32 file_size; /* bytes */
|
||||
u32 game_code;
|
||||
u16 company_code;
|
||||
char ext_name[4];
|
||||
char game_name[16];
|
||||
} OSPfsState;
|
||||
|
||||
/*
|
||||
* Structure for Profiler
|
||||
*/
|
||||
typedef struct {
|
||||
u16 *histo_base; /* histogram base */
|
||||
u32 histo_size; /* histogram size */
|
||||
u32 *text_start; /* start of text segment */
|
||||
u32 *text_end; /* end of text segment */
|
||||
} OSProf;
|
||||
|
||||
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
|
||||
|
||||
/**************************************************************************
|
||||
*
|
||||
* Global definitions
|
||||
*
|
||||
*/
|
||||
|
||||
/* Thread states */
|
||||
|
||||
#define OS_STATE_STOPPED 1
|
||||
#define OS_STATE_RUNNABLE 2
|
||||
#define OS_STATE_RUNNING 4
|
||||
#define OS_STATE_WAITING 8
|
||||
|
||||
/* Events */
|
||||
#ifdef _FINALROM
|
||||
#define OS_NUM_EVENTS 15
|
||||
#else
|
||||
#define OS_NUM_EVENTS 23
|
||||
#endif
|
||||
|
||||
#define OS_EVENT_SW1 0 /* CPU SW1 interrupt */
|
||||
#define OS_EVENT_SW2 1 /* CPU SW2 interrupt */
|
||||
#define OS_EVENT_CART 2 /* Cartridge interrupt: used by rmon */
|
||||
#define OS_EVENT_COUNTER 3 /* Counter int: used by VI/Timer Mgr */
|
||||
#define OS_EVENT_SP 4 /* SP task done interrupt */
|
||||
#define OS_EVENT_SI 5 /* SI (controller) interrupt */
|
||||
#define OS_EVENT_AI 6 /* AI interrupt */
|
||||
#define OS_EVENT_VI 7 /* VI interrupt: used by VI/Timer Mgr */
|
||||
#define OS_EVENT_PI 8 /* PI interrupt: used by PI Manager */
|
||||
#define OS_EVENT_DP 9 /* DP full sync interrupt */
|
||||
#define OS_EVENT_CPU_BREAK 10 /* CPU breakpoint: used by rmon */
|
||||
#define OS_EVENT_SP_BREAK 11 /* SP breakpoint: used by rmon */
|
||||
#define OS_EVENT_FAULT 12 /* CPU fault event: used by rmon */
|
||||
#define OS_EVENT_THREADSTATUS 13 /* CPU thread status: used by rmon */
|
||||
#define OS_EVENT_PRENMI 14 /* Pre NMI interrupt */
|
||||
#ifndef _FINALROM
|
||||
#define OS_EVENT_RDB_READ_DONE 15 /* RDB read ok event: used by rmon */
|
||||
#define OS_EVENT_RDB_LOG_DONE 16 /* read of log data complete */
|
||||
#define OS_EVENT_RDB_DATA_DONE 17 /* read of hostio data complete */
|
||||
#define OS_EVENT_RDB_REQ_RAMROM 18 /* host needs ramrom access */
|
||||
#define OS_EVENT_RDB_FREE_RAMROM 19 /* host is done with ramrom access */
|
||||
#define OS_EVENT_RDB_DBG_DONE 20
|
||||
#define OS_EVENT_RDB_FLUSH_PROF 21
|
||||
#define OS_EVENT_RDB_ACK_PROF 22
|
||||
#endif
|
||||
|
||||
/* Flags for debugging purpose */
|
||||
|
||||
#define OS_FLAG_CPU_BREAK 1 /* Break exception has occurred */
|
||||
#define OS_FLAG_FAULT 2 /* CPU fault has occurred */
|
||||
|
||||
/* Interrupt masks */
|
||||
|
||||
#define OS_IM_NONE 0x00000001
|
||||
#define OS_IM_SW1 0x00000501
|
||||
#define OS_IM_SW2 0x00000601
|
||||
#define OS_IM_CART 0x00000c01
|
||||
#define OS_IM_PRENMI 0x00001401
|
||||
#define OS_IM_RDBWRITE 0x00002401
|
||||
#define OS_IM_RDBREAD 0x00004401
|
||||
#define OS_IM_COUNTER 0x00008401
|
||||
#define OS_IM_CPU 0x0000ff01
|
||||
#define OS_IM_SP 0x00010401
|
||||
#define OS_IM_SI 0x00020401
|
||||
#define OS_IM_AI 0x00040401
|
||||
#define OS_IM_VI 0x00080401
|
||||
#define OS_IM_PI 0x00100401
|
||||
#define OS_IM_DP 0x00200401
|
||||
#define OS_IM_ALL 0x003fff01
|
||||
#define RCP_IMASK 0x003f0000
|
||||
#define RCP_IMASKSHIFT 16
|
||||
|
||||
/* Recommended thread priorities for the system threads */
|
||||
|
||||
#define OS_PRIORITY_MAX 255
|
||||
#define OS_PRIORITY_VIMGR 254
|
||||
#define OS_PRIORITY_RMON 250
|
||||
#define OS_PRIORITY_RMONSPIN 200
|
||||
#define OS_PRIORITY_PIMGR 150
|
||||
#define OS_PRIORITY_SIMGR 140
|
||||
#define OS_PRIORITY_APPMAX 127
|
||||
#define OS_PRIORITY_IDLE 0 /* Must be 0 */
|
||||
|
||||
|
||||
/* Flags to turn blocking on/off when sending/receiving message */
|
||||
|
||||
#define OS_MESG_NOBLOCK 0
|
||||
#define OS_MESG_BLOCK 1
|
||||
|
||||
/* Flags to indicate direction of data transfer */
|
||||
|
||||
#define OS_READ 0 /* device -> RDRAM */
|
||||
#define OS_WRITE 1 /* device <- RDRAM */
|
||||
#define OS_OTHERS 2 /* for Leo disk only */
|
||||
|
||||
/*
|
||||
* I/O message types
|
||||
*/
|
||||
#define OS_MESG_TYPE_BASE (10)
|
||||
#define OS_MESG_TYPE_LOOPBACK (OS_MESG_TYPE_BASE+0)
|
||||
#define OS_MESG_TYPE_DMAREAD (OS_MESG_TYPE_BASE+1)
|
||||
#define OS_MESG_TYPE_DMAWRITE (OS_MESG_TYPE_BASE+2)
|
||||
#define OS_MESG_TYPE_VRETRACE (OS_MESG_TYPE_BASE+3)
|
||||
#define OS_MESG_TYPE_COUNTER (OS_MESG_TYPE_BASE+4)
|
||||
#define OS_MESG_TYPE_EDMAREAD (OS_MESG_TYPE_BASE+5)
|
||||
#define OS_MESG_TYPE_EDMAWRITE (OS_MESG_TYPE_BASE+6)
|
||||
|
||||
/*
|
||||
* I/O message priority
|
||||
*/
|
||||
#define OS_MESG_PRI_NORMAL 0
|
||||
#define OS_MESG_PRI_HIGH 1
|
||||
|
||||
/*
|
||||
* Page size argument for TLB routines
|
||||
*/
|
||||
#define OS_PM_4K 0x0000000
|
||||
#define OS_PM_16K 0x0006000
|
||||
#define OS_PM_64K 0x001e000
|
||||
#define OS_PM_256K 0x007e000
|
||||
#define OS_PM_1M 0x01fe000
|
||||
#define OS_PM_4M 0x07fe000
|
||||
#define OS_PM_16M 0x1ffe000
|
||||
|
||||
/*
|
||||
* Stack size for I/O device managers: PIM (PI Manager), VIM (VI Manager),
|
||||
* SIM (SI Manager)
|
||||
*
|
||||
*/
|
||||
#define OS_PIM_STACKSIZE 4096
|
||||
#define OS_VIM_STACKSIZE 4096
|
||||
#define OS_SIM_STACKSIZE 4096
|
||||
|
||||
#define OS_MIN_STACKSIZE 72
|
||||
|
||||
/*
|
||||
* Values for osTvType
|
||||
*/
|
||||
#define OS_TV_PAL 0
|
||||
#define OS_TV_NTSC 1
|
||||
#define OS_TV_MPAL 2
|
||||
|
||||
/*
|
||||
* Video Interface (VI) mode type
|
||||
*/
|
||||
#define OS_VI_NTSC_LPN1 0 /* NTSC */
|
||||
#define OS_VI_NTSC_LPF1 1
|
||||
#define OS_VI_NTSC_LAN1 2
|
||||
#define OS_VI_NTSC_LAF1 3
|
||||
#define OS_VI_NTSC_LPN2 4
|
||||
#define OS_VI_NTSC_LPF2 5
|
||||
#define OS_VI_NTSC_LAN2 6
|
||||
#define OS_VI_NTSC_LAF2 7
|
||||
#define OS_VI_NTSC_HPN1 8
|
||||
#define OS_VI_NTSC_HPF1 9
|
||||
#define OS_VI_NTSC_HAN1 10
|
||||
#define OS_VI_NTSC_HAF1 11
|
||||
#define OS_VI_NTSC_HPN2 12
|
||||
#define OS_VI_NTSC_HPF2 13
|
||||
|
||||
#define OS_VI_PAL_LPN1 14 /* PAL */
|
||||
#define OS_VI_PAL_LPF1 15
|
||||
#define OS_VI_PAL_LAN1 16
|
||||
#define OS_VI_PAL_LAF1 17
|
||||
#define OS_VI_PAL_LPN2 18
|
||||
#define OS_VI_PAL_LPF2 19
|
||||
#define OS_VI_PAL_LAN2 20
|
||||
#define OS_VI_PAL_LAF2 21
|
||||
#define OS_VI_PAL_HPN1 22
|
||||
#define OS_VI_PAL_HPF1 23
|
||||
#define OS_VI_PAL_HAN1 24
|
||||
#define OS_VI_PAL_HAF1 25
|
||||
#define OS_VI_PAL_HPN2 26
|
||||
#define OS_VI_PAL_HPF2 27
|
||||
|
||||
#define OS_VI_MPAL_LPN1 28 /* MPAL - mainly Brazil */
|
||||
#define OS_VI_MPAL_LPF1 29
|
||||
#define OS_VI_MPAL_LAN1 30
|
||||
#define OS_VI_MPAL_LAF1 31
|
||||
#define OS_VI_MPAL_LPN2 32
|
||||
#define OS_VI_MPAL_LPF2 33
|
||||
#define OS_VI_MPAL_LAN2 34
|
||||
#define OS_VI_MPAL_LAF2 35
|
||||
#define OS_VI_MPAL_HPN1 36
|
||||
#define OS_VI_MPAL_HPF1 37
|
||||
#define OS_VI_MPAL_HAN1 38
|
||||
#define OS_VI_MPAL_HAF1 39
|
||||
#define OS_VI_MPAL_HPN2 40
|
||||
#define OS_VI_MPAL_HPF2 41
|
||||
|
||||
/*
|
||||
* Video Interface (VI) special features
|
||||
*/
|
||||
#define OS_VI_GAMMA_ON 0x0001
|
||||
#define OS_VI_GAMMA_OFF 0x0002
|
||||
#define OS_VI_GAMMA_DITHER_ON 0x0004
|
||||
#define OS_VI_GAMMA_DITHER_OFF 0x0008
|
||||
#define OS_VI_DIVOT_ON 0x0010
|
||||
#define OS_VI_DIVOT_OFF 0x0020
|
||||
#define OS_VI_DITHER_FILTER_ON 0x0040
|
||||
#define OS_VI_DITHER_FILTER_OFF 0x0080
|
||||
|
||||
/*
|
||||
* Video Interface (VI) mode attribute bit
|
||||
*/
|
||||
#define OS_VI_BIT_NONINTERLACE 0x0001 /* lo-res */
|
||||
#define OS_VI_BIT_INTERLACE 0x0002 /* lo-res */
|
||||
#define OS_VI_BIT_NORMALINTERLACE 0x0004 /* hi-res */
|
||||
#define OS_VI_BIT_DEFLICKINTERLACE 0x0008 /* hi-res */
|
||||
#define OS_VI_BIT_ANTIALIAS 0x0010
|
||||
#define OS_VI_BIT_POINTSAMPLE 0x0020
|
||||
#define OS_VI_BIT_16PIXEL 0x0040
|
||||
#define OS_VI_BIT_32PIXEL 0x0080
|
||||
#define OS_VI_BIT_LORES 0x0100
|
||||
#define OS_VI_BIT_HIRES 0x0200
|
||||
#define OS_VI_BIT_NTSC 0x0400
|
||||
#define OS_VI_BIT_PAL 0x0800
|
||||
|
||||
/*
|
||||
* Leo Disk
|
||||
*/
|
||||
|
||||
/* transfer mode */
|
||||
|
||||
#define LEO_BLOCK_MODE 1
|
||||
#define LEO_TRACK_MODE 2
|
||||
#define LEO_SECTOR_MODE 3
|
||||
|
||||
/*
|
||||
* Controllers number
|
||||
*/
|
||||
|
||||
#ifndef _HW_VERSION_1
|
||||
#define MAXCONTROLLERS 4
|
||||
#else
|
||||
#define MAXCONTROLLERS 6
|
||||
#endif
|
||||
|
||||
/* controller errors */
|
||||
#define CONT_NO_RESPONSE_ERROR 0x8
|
||||
#define CONT_OVERRUN_ERROR 0x4
|
||||
#ifdef _HW_VERSION_1
|
||||
#define CONT_FRAME_ERROR 0x2
|
||||
#define CONT_COLLISION_ERROR 0x1
|
||||
#endif
|
||||
|
||||
/* Controller type */
|
||||
|
||||
#define CONT_ABSOLUTE 0x0001
|
||||
#define CONT_RELATIVE 0x0002
|
||||
#define CONT_JOYPORT 0x0004
|
||||
#define CONT_EEPROM 0x8000
|
||||
#define CONT_EEP16K 0x4000
|
||||
#define CONT_TYPE_MASK 0x1f07
|
||||
#define CONT_TYPE_NORMAL 0x0005
|
||||
#define CONT_TYPE_MOUSE 0x0002
|
||||
|
||||
/* Controller status */
|
||||
|
||||
#define CONT_CARD_ON 0x01
|
||||
#define CONT_CARD_PULL 0x02
|
||||
#define CONT_ADDR_CRC_ER 0x04
|
||||
#define CONT_EEPROM_BUSY 0x80
|
||||
|
||||
/* EEPROM TYPE */
|
||||
|
||||
#define EEPROM_TYPE_4K 0x01
|
||||
#define EEPROM_TYPE_16K 0x02
|
||||
|
||||
/* Buttons */
|
||||
|
||||
#define CONT_A 0x8000
|
||||
#define CONT_B 0x4000
|
||||
#define CONT_G 0x2000
|
||||
#define CONT_START 0x1000
|
||||
#define CONT_UP 0x0800
|
||||
#define CONT_DOWN 0x0400
|
||||
#define CONT_LEFT 0x0200
|
||||
#define CONT_RIGHT 0x0100
|
||||
#define CONT_L 0x0020
|
||||
#define CONT_R 0x0010
|
||||
#define CONT_E 0x0008
|
||||
#define CONT_D 0x0004
|
||||
#define CONT_C 0x0002
|
||||
#define CONT_F 0x0001
|
||||
|
||||
/* Nintendo's official button names */
|
||||
|
||||
#define A_BUTTON CONT_A
|
||||
#define B_BUTTON CONT_B
|
||||
#define L_TRIG CONT_L
|
||||
#define R_TRIG CONT_R
|
||||
#define Z_TRIG CONT_G
|
||||
#define START_BUTTON CONT_START
|
||||
#define U_JPAD CONT_UP
|
||||
#define L_JPAD CONT_LEFT
|
||||
#define R_JPAD CONT_RIGHT
|
||||
#define D_JPAD CONT_DOWN
|
||||
#define U_CBUTTONS CONT_E
|
||||
#define L_CBUTTONS CONT_C
|
||||
#define R_CBUTTONS CONT_F
|
||||
#define D_CBUTTONS CONT_D
|
||||
|
||||
/* File System size */
|
||||
#define OS_PFS_VERSION 0x0200
|
||||
#define OS_PFS_VERSION_HI (OS_PFS_VERSION >> 8)
|
||||
#define OS_PFS_VERSION_LO (OS_PFS_VERSION & 255)
|
||||
|
||||
#define PFS_FILE_NAME_LEN 16
|
||||
#define PFS_FILE_EXT_LEN 4
|
||||
#define BLOCKSIZE 32 /* bytes */
|
||||
#define PFS_ONE_PAGE 8 /* blocks */
|
||||
#define PFS_MAX_BANKS 62
|
||||
|
||||
/* File System flag */
|
||||
|
||||
#define PFS_READ 0
|
||||
#define PFS_WRITE 1
|
||||
#define PFS_CREATE 2
|
||||
|
||||
/* File System status */
|
||||
#define PFS_INITIALIZED 0x1
|
||||
#define PFS_CORRUPTED 0x2 /* File system was corrupted */
|
||||
|
||||
/* File System error number */
|
||||
|
||||
#define PFS_ERR_NOPACK 1 /* no memory card is plugged or */
|
||||
#define PFS_ERR_NEW_PACK 2 /* ram pack has been changed to a */
|
||||
/* different one */
|
||||
#define PFS_ERR_INCONSISTENT 3 /* need to run Pfschecker */
|
||||
#define PFS_ERR_CONTRFAIL CONT_OVERRUN_ERROR
|
||||
#define PFS_ERR_INVALID 5 /* invalid parameter or file not exist*/
|
||||
#define PFS_ERR_BAD_DATA 6 /* the data read from pack are bad*/
|
||||
#define PFS_DATA_FULL 7 /* no free pages on ram pack */
|
||||
#define PFS_DIR_FULL 8 /* no free directories on ram pack*/
|
||||
#define PFS_ERR_EXIST 9 /* file exists */
|
||||
#define PFS_ERR_ID_FATAL 10 /* dead ram pack */
|
||||
#define PFS_ERR_DEVICE 11 /* wrong device type*/
|
||||
|
||||
/* definition for EEPROM */
|
||||
|
||||
#define EEPROM_MAXBLOCKS 64
|
||||
#define EEP16K_MAXBLOCKS 256
|
||||
#define EEPROM_BLOCK_SIZE 8
|
||||
|
||||
/*
|
||||
* PI/EPI
|
||||
*/
|
||||
#define PI_DOMAIN1 0
|
||||
#define PI_DOMAIN2 1
|
||||
|
||||
/*
|
||||
* Profiler constants
|
||||
*/
|
||||
#define PROF_MIN_INTERVAL 50 /* microseconds */
|
||||
|
||||
/*
|
||||
* Boot addresses
|
||||
*/
|
||||
#define BOOT_ADDRESS_ULTRA 0x80000400
|
||||
#define BOOT_ADDRESS_COSIM 0x80002000
|
||||
#define BOOT_ADDRESS_EMU 0x20010000
|
||||
#define BOOT_ADDRESS_INDY 0x88100000
|
||||
|
||||
/*
|
||||
* Size of buffer the retains contents after NMI
|
||||
*/
|
||||
#define OS_APP_NMI_BUFSIZE 64
|
||||
|
||||
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
|
||||
|
||||
/**************************************************************************
|
||||
*
|
||||
* Macro definitions
|
||||
*
|
||||
*/
|
||||
|
||||
/* PARTNER-N64 */
|
||||
#ifdef PTN64
|
||||
#define osReadHost osReadHost_pt
|
||||
#define osWriteHost osWriteHost_pt
|
||||
#endif
|
||||
|
||||
/* Get count of valid messages in queue */
|
||||
#define MQ_GET_COUNT(mq) ((mq)->validCount)
|
||||
|
||||
/* Figure out if message queue is empty or full */
|
||||
#define MQ_IS_EMPTY(mq) (MQ_GET_COUNT(mq) == 0)
|
||||
#define MQ_IS_FULL(mq) (MQ_GET_COUNT(mq) >= (mq)->msgCount)
|
||||
|
||||
/*
|
||||
* CPU counter increments at 3/4 of bus clock rate:
|
||||
*
|
||||
* Bus Clock Proc Clock Counter (1/2 Proc Clock)
|
||||
* --------- ---------- ------------------------
|
||||
* 62.5 Mhz 93.75 Mhz 46.875 Mhz
|
||||
*/
|
||||
extern u64 osClockRate;
|
||||
|
||||
#define OS_CLOCK_RATE 62500000LL
|
||||
#define OS_CPU_COUNTER (OS_CLOCK_RATE*3/4)
|
||||
#define OS_NSEC_TO_CYCLES(n) (((u64)(n)*(OS_CPU_COUNTER/15625000LL))/(1000000000LL/15625000LL))
|
||||
#define OS_USEC_TO_CYCLES(n) (((u64)(n)*(OS_CPU_COUNTER/15625LL))/(1000000LL/15625LL))
|
||||
#define OS_CYCLES_TO_NSEC(c) (((u64)(c)*(1000000000LL/15625000LL))/(OS_CPU_COUNTER/15625000LL))
|
||||
#define OS_CYCLES_TO_USEC(c) (((u64)(c)*(1000000LL/15625LL))/(OS_CPU_COUNTER/15625LL))
|
||||
|
||||
/**************************************************************************
|
||||
*
|
||||
* Extern variables
|
||||
*
|
||||
*/
|
||||
extern OSViMode osViModeTable[]; /* Global VI mode table */
|
||||
|
||||
extern OSViMode osViModeNtscLpn1; /* Individual VI NTSC modes */
|
||||
extern OSViMode osViModeNtscLpf1;
|
||||
extern OSViMode osViModeNtscLan1;
|
||||
extern OSViMode osViModeNtscLaf1;
|
||||
extern OSViMode osViModeNtscLpn2;
|
||||
extern OSViMode osViModeNtscLpf2;
|
||||
extern OSViMode osViModeNtscLan2;
|
||||
extern OSViMode osViModeNtscLaf2;
|
||||
extern OSViMode osViModeNtscHpn1;
|
||||
extern OSViMode osViModeNtscHpf1;
|
||||
extern OSViMode osViModeNtscHan1;
|
||||
extern OSViMode osViModeNtscHaf1;
|
||||
extern OSViMode osViModeNtscHpn2;
|
||||
extern OSViMode osViModeNtscHpf2;
|
||||
|
||||
extern OSViMode osViModePalLpn1; /* Individual VI PAL modes */
|
||||
extern OSViMode osViModePalLpf1;
|
||||
extern OSViMode osViModePalLan1;
|
||||
extern OSViMode osViModePalLaf1;
|
||||
extern OSViMode osViModePalLpn2;
|
||||
extern OSViMode osViModePalLpf2;
|
||||
extern OSViMode osViModePalLan2;
|
||||
extern OSViMode osViModePalLaf2;
|
||||
extern OSViMode osViModePalHpn1;
|
||||
extern OSViMode osViModePalHpf1;
|
||||
extern OSViMode osViModePalHan1;
|
||||
extern OSViMode osViModePalHaf1;
|
||||
extern OSViMode osViModePalHpn2;
|
||||
extern OSViMode osViModePalHpf2;
|
||||
|
||||
extern OSViMode osViModeMpalLpn1; /* Individual VI MPAL modes */
|
||||
extern OSViMode osViModeMpalLpf1;
|
||||
extern OSViMode osViModeMpalLan1;
|
||||
extern OSViMode osViModeMpalLaf1;
|
||||
extern OSViMode osViModeMpalLpn2;
|
||||
extern OSViMode osViModeMpalLpf2;
|
||||
extern OSViMode osViModeMpalLan2;
|
||||
extern OSViMode osViModeMpalLaf2;
|
||||
extern OSViMode osViModeMpalHpn1;
|
||||
extern OSViMode osViModeMpalHpf1;
|
||||
extern OSViMode osViModeMpalHan1;
|
||||
extern OSViMode osViModeMpalHaf1;
|
||||
extern OSViMode osViModeMpalHpn2;
|
||||
extern OSViMode osViModeMpalHpf2;
|
||||
|
||||
extern s32 osRomType; /* Bulk or cartridge ROM. 0=cartridge 1=bulk */
|
||||
extern u32 osRomBase; /* Rom base address of the game image */
|
||||
extern u32 osTvType; /* 0 = PAL, 1 = NTSC, 2 = MPAL */
|
||||
extern u32 osResetType; /* 0 = cold reset, 1 = NMI */
|
||||
extern s32 osCicId;
|
||||
extern s32 osVersion;
|
||||
extern u32 osMemSize; /* Memory Size */
|
||||
extern s32 osAppNMIBuffer[];
|
||||
|
||||
extern OSIntMask __OSGlobalIntMask; /* global interrupt mask */
|
||||
extern OSPiHandle *__osPiTable; /* The head of OSPiHandle link list */
|
||||
extern OSPiHandle *__osDiskHandle; /* For exceptasm to get disk info*/
|
||||
|
||||
|
||||
|
||||
/**************************************************************************
|
||||
*
|
||||
* Function prototypes
|
||||
*
|
||||
*/
|
||||
|
||||
/* Thread operations */
|
||||
|
||||
extern void osCreateThread(OSThread *, OSId, void (*)(void *),
|
||||
void *, void *, OSPri);
|
||||
extern void osDestroyThread(OSThread *);
|
||||
extern void osYieldThread(void);
|
||||
extern void osStartThread(OSThread *);
|
||||
extern void osStopThread(OSThread *);
|
||||
extern OSId osGetThreadId(OSThread *);
|
||||
extern void osSetThreadPri(OSThread *, OSPri);
|
||||
extern OSPri osGetThreadPri(OSThread *);
|
||||
|
||||
/* Message operations */
|
||||
|
||||
extern void osCreateMesgQueue(OSMesgQueue *, OSMesg *, s32);
|
||||
extern s32 osSendMesg(OSMesgQueue *, OSMesg, s32);
|
||||
extern s32 osJamMesg(OSMesgQueue *, OSMesg, s32);
|
||||
extern s32 osRecvMesg(OSMesgQueue *, OSMesg *, s32);
|
||||
|
||||
/* Event operations */
|
||||
|
||||
extern void osSetEventMesg(OSEvent, OSMesgQueue *, OSMesg);
|
||||
|
||||
/* Interrupt operations */
|
||||
|
||||
extern OSIntMask osGetIntMask(void);
|
||||
extern OSIntMask osSetIntMask(OSIntMask);
|
||||
|
||||
/* RDB port operations */
|
||||
|
||||
extern void osInitRdb(u8 *sendBuf, u32 sendSize);
|
||||
|
||||
/* Cache operations and macros */
|
||||
|
||||
extern void osInvalDCache(void *, size_t);
|
||||
extern void osInvalICache(void *, size_t);
|
||||
extern void osWritebackDCache(void *, size_t);
|
||||
extern void osWritebackDCacheAll(void);
|
||||
|
||||
#define OS_DCACHE_ROUNDUP_ADDR(x) (void *)(((((u32)(x)+0xf)/0x10)*0x10))
|
||||
#define OS_DCACHE_ROUNDUP_SIZE(x) (u32)(((((u32)(x)+0xf)/0x10)*0x10))
|
||||
|
||||
/* TLB management routines */
|
||||
|
||||
extern void osMapTLB(s32, OSPageMask, void *, u32, u32, s32);
|
||||
extern void osMapTLBRdb(void);
|
||||
extern void osUnmapTLB(s32);
|
||||
extern void osUnmapTLBAll(void);
|
||||
extern void osSetTLBASID(s32);
|
||||
|
||||
/* Address translation routines and macros */
|
||||
|
||||
extern u32 osVirtualToPhysical(void *);
|
||||
extern void * osPhysicalToVirtual(u32);
|
||||
|
||||
#define OS_K0_TO_PHYSICAL(x) (u32)(((char *)(x)-0x80000000))
|
||||
#define OS_K1_TO_PHYSICAL(x) (u32)(((char *)(x)-0xa0000000))
|
||||
|
||||
#define OS_PHYSICAL_TO_K0(x) (void *)(((u32)(x)+0x80000000))
|
||||
#define OS_PHYSICAL_TO_K1(x) (void *)(((u32)(x)+0xa0000000))
|
||||
|
||||
/* I/O operations */
|
||||
|
||||
/* Audio interface (Ai) */
|
||||
extern u32 osAiGetStatus(void);
|
||||
extern u32 osAiGetLength(void);
|
||||
extern s32 osAiSetFrequency(u32);
|
||||
extern s32 osAiSetNextBuffer(void *, u32);
|
||||
|
||||
/* Display processor interface (Dp) */
|
||||
extern u32 osDpGetStatus(void);
|
||||
extern void osDpSetStatus(u32);
|
||||
extern void osDpGetCounters(u32 *);
|
||||
extern s32 osDpSetNextBuffer(void *, u64);
|
||||
|
||||
/* Peripheral interface (Pi) */
|
||||
extern u32 osPiGetStatus(void);
|
||||
extern s32 osPiGetDeviceType(void);
|
||||
extern s32 osPiRawWriteIo(u32, u32);
|
||||
extern s32 osPiRawReadIo(u32, u32 *);
|
||||
extern s32 osPiRawStartDma(s32, u32, void *, u32);
|
||||
extern s32 osPiWriteIo(u32, u32);
|
||||
extern s32 osPiReadIo(u32, u32 *);
|
||||
extern s32 osPiStartDma(OSIoMesg *, s32, s32, u32, void *, u32,
|
||||
OSMesgQueue *);
|
||||
extern void osCreatePiManager(OSPri, OSMesgQueue *, OSMesg *, s32);
|
||||
|
||||
/* Video interface (Vi) */
|
||||
extern u32 osViGetStatus(void);
|
||||
extern u32 osViGetCurrentMode(void);
|
||||
extern u32 osViGetCurrentLine(void);
|
||||
extern u32 osViGetCurrentField(void);
|
||||
extern void *osViGetCurrentFramebuffer(void);
|
||||
extern void *osViGetNextFramebuffer(void);
|
||||
extern void osViSetXScale(f32);
|
||||
extern void osViSetYScale(f32);
|
||||
extern void osViSetSpecialFeatures(u32);
|
||||
extern void osViSetMode(OSViMode *);
|
||||
extern void osViSetEvent(OSMesgQueue *, OSMesg, u32);
|
||||
extern void osViSwapBuffer(void *);
|
||||
extern void osViBlack(u8);
|
||||
extern void osViFade(u8, u16);
|
||||
extern void osViRepeatLine(u8);
|
||||
extern void osCreateViManager(OSPri);
|
||||
|
||||
/* Timer interface */
|
||||
|
||||
extern OSTime osGetTime(void);
|
||||
extern void osSetTime(OSTime);
|
||||
extern u32 osSetTimer(OSTimer *, OSTime, OSTime,
|
||||
OSMesgQueue *, OSMesg);
|
||||
extern int osStopTimer(OSTimer *);
|
||||
|
||||
/* Controller interface */
|
||||
|
||||
extern s32 osContInit(OSMesgQueue *, u8 *, OSContStatus *);
|
||||
extern s32 osContReset(OSMesgQueue *, OSContStatus *);
|
||||
extern s32 osContStartQuery(OSMesgQueue *);
|
||||
extern s32 osContStartReadData(OSMesgQueue *);
|
||||
#ifndef _HW_VERSION_1
|
||||
extern s32 osContSetCh(u8);
|
||||
#endif
|
||||
extern void osContGetQuery(OSContStatus *);
|
||||
extern void osContGetReadData(OSContPad *);
|
||||
|
||||
/* file system interface */
|
||||
|
||||
extern s32 osPfsInitPak(OSMesgQueue *, OSPfs *, int);
|
||||
extern s32 osPfsRepairId(OSPfs *);
|
||||
extern s32 osPfsInit(OSMesgQueue *, OSPfs *, int);
|
||||
extern s32 osPfsReFormat(OSPfs *, OSMesgQueue *, int);
|
||||
extern s32 osPfsChecker(OSPfs *);
|
||||
extern s32 osPfsAllocateFile(OSPfs *, u16, u32, u8 *, u8 *, int, s32 *);
|
||||
extern s32 osPfsFindFile(OSPfs *, u16, u32, u8 *, u8 *, s32 *);
|
||||
extern s32 osPfsDeleteFile(OSPfs *, u16, u32, u8 *, u8 *);
|
||||
extern s32 osPfsReadWriteFile(OSPfs *, s32, u8, int, int, u8 *);
|
||||
extern s32 osPfsFileState(OSPfs *, s32, OSPfsState *);
|
||||
extern s32 osPfsGetLabel(OSPfs *, u8 *, int *);
|
||||
extern s32 osPfsSetLabel(OSPfs *, u8 *);
|
||||
extern s32 osPfsIsPlug(OSMesgQueue *, u8 *);
|
||||
extern s32 osPfsFreeBlocks(OSPfs *, s32 *);
|
||||
extern s32 osPfsNumFiles(OSPfs *, s32 *, s32 *);
|
||||
|
||||
/* EEPROM interface */
|
||||
|
||||
extern s32 osEepromProbe(OSMesgQueue *);
|
||||
extern s32 osEepromRead(OSMesgQueue *, u8, u8 *);
|
||||
extern s32 osEepromWrite(OSMesgQueue *, u8, u8 *);
|
||||
extern s32 osEepromLongRead(OSMesgQueue *, u8, u8 *, int);
|
||||
extern s32 osEepromLongWrite(OSMesgQueue *, u8, u8 *, int);
|
||||
|
||||
/* MOTOR interface */
|
||||
|
||||
extern s32 osMotorInit(OSMesgQueue *, OSPfs *, int);
|
||||
extern s32 osMotorStop(OSPfs *);
|
||||
extern s32 osMotorStart(OSPfs *);
|
||||
|
||||
/* Enhanced PI interface */
|
||||
|
||||
extern OSPiHandle *osCartRomInit(void);
|
||||
extern OSPiHandle *osLeoDiskInit(void);
|
||||
extern OSPiHandle *osDriveRomInit(void);
|
||||
|
||||
extern s32 osEPiDeviceType(OSPiHandle *, OSPiInfo *);
|
||||
extern s32 osEPiRawWriteIo(OSPiHandle *, u32 , u32);
|
||||
extern s32 osEPiRawReadIo(OSPiHandle *, u32 , u32 *);
|
||||
extern s32 osEPiRawStartDma(OSPiHandle *, s32 , u32 , void *, u32 );
|
||||
extern s32 osEPiWriteIo(OSPiHandle *, u32 , u32 );
|
||||
extern s32 osEPiReadIo(OSPiHandle *, u32 , u32 *);
|
||||
extern s32 osEPiStartDma(OSPiHandle *, OSIoMesg *, s32);
|
||||
extern s32 osEPiLinkHandle(OSPiHandle *);
|
||||
|
||||
/* Profiler Interface */
|
||||
|
||||
extern void osProfileInit(OSProf *, u32 profcnt);
|
||||
extern void osProfileStart(u32);
|
||||
extern void osProfileFlush(void);
|
||||
extern void osProfileStop(void);
|
||||
|
||||
/* Game <> Host data transfer functions */
|
||||
|
||||
extern s32 osTestHost(void);
|
||||
extern void osReadHost(void *, u32);
|
||||
extern void osWriteHost(void *, u32);
|
||||
extern void osAckRamromRead(void);
|
||||
extern void osAckRamromWrite(void);
|
||||
|
||||
|
||||
/* byte string operations */
|
||||
|
||||
extern void bcopy(const void *, void *, size_t);
|
||||
extern int bcmp(const void *, const void *, int);
|
||||
extern void bzero(void *, size_t);
|
||||
|
||||
/* Miscellaneous operations */
|
||||
|
||||
extern void osInitialize(void);
|
||||
extern u32 osGetCount(void);
|
||||
extern void osExit(void);
|
||||
extern u32 osGetMemSize(void);
|
||||
|
||||
/* Printf */
|
||||
|
||||
extern int sprintf(char *s, const char *fmt, ...);
|
||||
extern void osSyncPrintf(const char *fmt, ...);
|
||||
extern void osAsyncPrintf(const char *fmt, ...);
|
||||
extern int osSyncGetChars(char *buf);
|
||||
extern int osAsyncGetChars(char *buf);
|
||||
|
||||
#endif /* defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS) */
|
||||
|
||||
#ifdef _LANGUAGE_C_PLUS_PLUS
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* !_OS_H */
|
||||
|
|
@ -5,6 +5,8 @@
|
|||
|
||||
/* Types */
|
||||
|
||||
|
||||
#ifndef MK64
|
||||
typedef struct {
|
||||
#if !defined(VERSION_EU) && !defined(VERSION_SH)
|
||||
u32 errStatus;
|
||||
|
|
@ -15,6 +17,15 @@ typedef struct {
|
|||
u32 C1ErrNum;
|
||||
u32 C1ErrSector[4];
|
||||
} __OSBlockInfo;
|
||||
#else
|
||||
typedef struct {
|
||||
void *dramAddr;
|
||||
void *C2Addr;
|
||||
u32 sectorSize;
|
||||
u32 C1ErrNum;
|
||||
u32 C1ErrSector[4];
|
||||
} __OSBlockInfo;
|
||||
#endif
|
||||
|
||||
typedef struct {
|
||||
u32 cmdType; // 0
|
||||
|
|
@ -22,9 +33,7 @@ typedef struct {
|
|||
u16 blockNum; // 6
|
||||
s32 sectorNum; // 8
|
||||
uintptr_t devAddr; // c
|
||||
#if defined(VERSION_EU) || defined(VERSION_SH)
|
||||
u32 unk10; //error status added moved to blockinfo
|
||||
#endif
|
||||
u32 errStatus; //error status added moved to blockinfo
|
||||
u32 bmCtlShadow; // 10
|
||||
u32 seqCtlShadow; // 14
|
||||
__OSBlockInfo block[2]; // 18
|
||||
|
|
@ -60,9 +69,7 @@ typedef struct {
|
|||
/*0x08*/ void *dramAddr;
|
||||
/*0x0C*/ uintptr_t devAddr;
|
||||
/*0x10*/ size_t size;
|
||||
#if defined(VERSION_EU) || defined(VERSION_SH)
|
||||
OSPiHandle *piHandle; // from the official definition
|
||||
#endif
|
||||
} OSIoMesg;
|
||||
|
||||
/* Definitions */
|
||||
|
|
|
|||
|
|
@ -61,7 +61,7 @@ typedef struct
|
|||
/* 0x00 */ u16 unk00; //some kind of flags. swap buffer sets to 0x10
|
||||
/* 0x02 */ u16 retraceCount;
|
||||
/* 0x04 */ void* buffer;
|
||||
/* 0x08 */ OSViMode *unk08;
|
||||
/* 0x08 */ OSViMode *modep;
|
||||
/* 0x0c */ u32 features;
|
||||
/* 0x10 */ OSMesgQueue *mq;
|
||||
/* 0x14 */ OSMesg *msg;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,881 @@
|
|||
#ifndef _RCP_H_
|
||||
#define _RCP_H_
|
||||
|
||||
/**************************************************************************
|
||||
* *
|
||||
* Copyright (C) 1995, Silicon Graphics, Inc. *
|
||||
* *
|
||||
* These coded instructions, statements, and computer programs contain *
|
||||
* unpublished proprietary information of Silicon Graphics, Inc., and *
|
||||
* are protected by Federal copyright law. They may not be disclosed *
|
||||
* to third parties or copied or duplicated in any form, in whole or *
|
||||
* in part, without the prior written consent of Silicon Graphics, Inc. *
|
||||
* *
|
||||
**************************************************************************/
|
||||
|
||||
/**************************************************************************
|
||||
*
|
||||
* File: rcp.h
|
||||
*
|
||||
* This file contains register and bit definitions for RCP memory map.
|
||||
* $Revision: 1.20 $
|
||||
* $Date: 1997/07/23 08:35:21 $
|
||||
* $Source: /disk6/Master/cvsmdev2/PR/include/rcp.h,v $
|
||||
*
|
||||
**************************************************************************/
|
||||
|
||||
#include <PR/R4300.h>
|
||||
#include <PR/ultratypes.h>
|
||||
|
||||
/**********************************************************************
|
||||
*
|
||||
* Here is a quick overview of the RCP memory map:
|
||||
*
|
||||
|
||||
0x0000_0000 .. 0x03ef_ffff RDRAM memory
|
||||
0x03f0_0000 .. 0x03ff_ffff RDRAM registers
|
||||
|
||||
RCP registers (see below)
|
||||
0x0400_0000 .. 0x040f_ffff SP registers
|
||||
0x0410_0000 .. 0x041f_ffff DP command registers
|
||||
0x0420_0000 .. 0x042f_ffff DP span registers
|
||||
0x0430_0000 .. 0x043f_ffff MI registers
|
||||
0x0440_0000 .. 0x044f_ffff VI registers
|
||||
0x0450_0000 .. 0x045f_ffff AI registers
|
||||
0x0460_0000 .. 0x046f_ffff PI registers
|
||||
0x0470_0000 .. 0x047f_ffff RI registers
|
||||
0x0480_0000 .. 0x048f_ffff SI registers
|
||||
0x0490_0000 .. 0x04ff_ffff unused
|
||||
|
||||
0x0500_0000 .. 0x05ff_ffff cartridge domain 2
|
||||
0x0600_0000 .. 0x07ff_ffff cartridge domain 1
|
||||
0x0800_0000 .. 0x0fff_ffff cartridge domain 2
|
||||
0x1000_0000 .. 0x1fbf_ffff cartridge domain 1
|
||||
|
||||
0x1fc0_0000 .. 0x1fc0_07bf PIF Boot Rom (1984 bytes)
|
||||
0x1fc0_07c0 .. 0x1fc0_07ff PIF (JoyChannel) RAM (64 bytes)
|
||||
0x1fc0_0800 .. 0x1fcf_ffff Reserved
|
||||
0x1fd0_0000 .. 0x7fff_ffff cartridge domain 1
|
||||
0x8000_0000 .. 0xffff_ffff external SysAD device
|
||||
|
||||
The Indy development board use cartridge domain 1:
|
||||
0x1000_0000 .. 0x10ff_ffff RAMROM
|
||||
0x1800_0000 .. 0x1800_0003 GIO interrupt (6 bits valid in 4 bytes)
|
||||
0x1800_0400 .. 0x1800_0403 GIO sync (6 bits valid in 4 bytes)
|
||||
0x1800_0800 .. 0x1800_0803 CART interrupt (6 bits valid in 4 bytes)
|
||||
|
||||
|
||||
|
||||
**************************************************************************/
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* RDRAM Memory (Assumes that maximum size is 4 MB)
|
||||
*/
|
||||
#define RDRAM_0_START 0x00000000
|
||||
#define RDRAM_0_END 0x001FFFFF
|
||||
#define RDRAM_1_START 0x00200000
|
||||
#define RDRAM_1_END 0x003FFFFF
|
||||
|
||||
#define RDRAM_START RDRAM_0_START
|
||||
#define RDRAM_END RDRAM_1_END
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* Address predicates
|
||||
*/
|
||||
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
|
||||
#define IS_RDRAM(x) ((unsigned)(x) >= RDRAM_START && \
|
||||
(unsigned)(x) < RDRAM_END)
|
||||
#endif
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* RDRAM Registers (0x03f0_0000 .. 0x03ff_ffff)
|
||||
*/
|
||||
#define RDRAM_BASE_REG 0x03F00000
|
||||
|
||||
#define RDRAM_CONFIG_REG (RDRAM_BASE_REG+0x00)
|
||||
#define RDRAM_DEVICE_TYPE_REG (RDRAM_BASE_REG+0x00)
|
||||
#define RDRAM_DEVICE_ID_REG (RDRAM_BASE_REG+0x04)
|
||||
#define RDRAM_DELAY_REG (RDRAM_BASE_REG+0x08)
|
||||
#define RDRAM_MODE_REG (RDRAM_BASE_REG+0x0c)
|
||||
#define RDRAM_REF_INTERVAL_REG (RDRAM_BASE_REG+0x10)
|
||||
#define RDRAM_REF_ROW_REG (RDRAM_BASE_REG+0x14)
|
||||
#define RDRAM_RAS_INTERVAL_REG (RDRAM_BASE_REG+0x18)
|
||||
#define RDRAM_MIN_INTERVAL_REG (RDRAM_BASE_REG+0x1c)
|
||||
#define RDRAM_ADDR_SELECT_REG (RDRAM_BASE_REG+0x20)
|
||||
#define RDRAM_DEVICE_MANUF_REG (RDRAM_BASE_REG+0x24)
|
||||
|
||||
#define RDRAM_0_DEVICE_ID 0
|
||||
#define RDRAM_1_DEVICE_ID 1
|
||||
|
||||
#define RDRAM_RESET_MODE 0
|
||||
#define RDRAM_ACTIVE_MODE 1
|
||||
#define RDRAM_STANDBY_MODE 2
|
||||
|
||||
#define RDRAM_LENGTH (2*512*2048)
|
||||
#define RDRAM_0_BASE_ADDRESS (RDRAM_0_DEVICE_ID*RDRAM_LENGTH)
|
||||
#define RDRAM_1_BASE_ADDRESS (RDRAM_1_DEVICE_ID*RDRAM_LENGTH)
|
||||
|
||||
#define RDRAM_0_CONFIG 0x00000
|
||||
#define RDRAM_1_CONFIG 0x00400
|
||||
#define RDRAM_GLOBAL_CONFIG 0x80000
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* PIF Physical memory map (total size = 2 KB)
|
||||
*
|
||||
* Size Description Mode
|
||||
* 1FC007FF +-------+-----------------+-----+
|
||||
* | 64 B | JoyChannel RAM | R/W |
|
||||
* 1FC007C0 +-------+-----------------+-----+
|
||||
* |1984 B | Boot ROM | * | * = Reserved
|
||||
* 1FC00000 +-------+-----------------+-----+
|
||||
*
|
||||
*/
|
||||
#define PIF_ROM_START 0x1FC00000
|
||||
#define PIF_ROM_END 0x1FC007BF
|
||||
#define PIF_RAM_START 0x1FC007C0
|
||||
#define PIF_RAM_END 0x1FC007FF
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* Controller channel
|
||||
* Each game controller channel has 4 error bits that are defined in bit 6-7 of
|
||||
* the Rx and Tx data size area bytes. Programmers need to clear these bits
|
||||
* when setting the Tx/Rx size area values for a channel
|
||||
*/
|
||||
#define CHNL_ERR_NORESP 0x80 /* Bit 7 (Rx): No response error */
|
||||
#define CHNL_ERR_OVERRUN 0x40 /* Bit 6 (Rx): Overrun error */
|
||||
#define CHNL_ERR_FRAME 0x80 /* Bit 7 (Tx): Frame error */
|
||||
#define CHNL_ERR_COLLISION 0x40 /* Bit 6 (Tx): Collision error */
|
||||
|
||||
#define CHNL_ERR_MASK 0xC0 /* Bit 6-7: channel errors */
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* External device info
|
||||
*/
|
||||
#define DEVICE_TYPE_CART 0 /* ROM cartridge */
|
||||
#define DEVICE_TYPE_BULK 1 /* ROM bulk */
|
||||
#define DEVICE_TYPE_64DD 2 /* 64 Disk Drive */
|
||||
#define DEVICE_TYPE_SRAM 3 /* SRAM */
|
||||
|
||||
/*************************************************************************
|
||||
* SP Memory
|
||||
*/
|
||||
#define SP_DMEM_START 0x04000000 /* read/write */
|
||||
#define SP_DMEM_END 0x04000FFF
|
||||
#define SP_IMEM_START 0x04001000 /* read/write */
|
||||
#define SP_IMEM_END 0x04001FFF
|
||||
|
||||
/*************************************************************************
|
||||
* SP CP0 Registers
|
||||
*/
|
||||
|
||||
#define SP_BASE_REG 0x04040000
|
||||
|
||||
/* SP memory address (R/W): [11:0] DMEM/IMEM address; [12] 0=DMEM,1=IMEM */
|
||||
#define SP_MEM_ADDR_REG (SP_BASE_REG+0x00) /* Master */
|
||||
|
||||
/* SP DRAM DMA address (R/W): [23:0] RDRAM address */
|
||||
#define SP_DRAM_ADDR_REG (SP_BASE_REG+0x04) /* Slave */
|
||||
|
||||
/* SP read DMA length (R/W): [11:0] length, [19:12] count, [31:20] skip */
|
||||
/* direction: I/DMEM <- RDRAM */
|
||||
#define SP_RD_LEN_REG (SP_BASE_REG+0x08) /* R/W: read len */
|
||||
|
||||
/* SP write DMA length (R/W): [11:0] length, [19:12] count, [31:20] skip */
|
||||
/* direction: I/DMEM -> RDRAM */
|
||||
#define SP_WR_LEN_REG (SP_BASE_REG+0x0C) /* R/W: write len */
|
||||
|
||||
/* SP status (R/W): [14:0] valid bits; see below for write/read mode */
|
||||
#define SP_STATUS_REG (SP_BASE_REG+0x10)
|
||||
|
||||
/* SP DMA full (R): [0] valid bit; dma full */
|
||||
#define SP_DMA_FULL_REG (SP_BASE_REG+0x14)
|
||||
|
||||
/* SP DMA busy (R): [0] valid bit; dma busy */
|
||||
#define SP_DMA_BUSY_REG (SP_BASE_REG+0x18)
|
||||
|
||||
/* SP semaphore (R/W): Read: [0] semaphore flag (set on read) */
|
||||
/* Write: [] clear semaphore flag */
|
||||
#define SP_SEMAPHORE_REG (SP_BASE_REG+0x1C)
|
||||
|
||||
/* SP PC (R/W): [11:0] program counter */
|
||||
#define SP_PC_REG 0x04080000
|
||||
|
||||
/* SP MEM address: bit 12 specifies if address is IMEM or DMEM */
|
||||
#define SP_DMA_DMEM 0x0000 /* Bit 12: 0=DMEM, 1=IMEM */
|
||||
#define SP_DMA_IMEM 0x1000 /* Bit 12: 0=DMEM, 1=IMEM */
|
||||
|
||||
/*
|
||||
* Values to clear/set bit in status reg (SP_STATUS_REG - write)
|
||||
*/
|
||||
#define SP_CLR_HALT 0x00001 /* Bit 0: clear halt */
|
||||
#define SP_SET_HALT 0x00002 /* Bit 1: set halt */
|
||||
#define SP_CLR_BROKE 0x00004 /* Bit 2: clear broke */
|
||||
#define SP_CLR_INTR 0x00008 /* Bit 3: clear intr */
|
||||
#define SP_SET_INTR 0x00010 /* Bit 4: set intr */
|
||||
#define SP_CLR_SSTEP 0x00020 /* Bit 5: clear sstep */
|
||||
#define SP_SET_SSTEP 0x00040 /* Bit 6: set sstep */
|
||||
#define SP_CLR_INTR_BREAK 0x00080 /* Bit 7: clear intr on break */
|
||||
#define SP_SET_INTR_BREAK 0x00100 /* Bit 8: set intr on break */
|
||||
#define SP_CLR_SIG0 0x00200 /* Bit 9: clear signal 0 */
|
||||
#define SP_SET_SIG0 0x00400 /* Bit 10: set signal 0 */
|
||||
#define SP_CLR_SIG1 0x00800 /* Bit 11: clear signal 1 */
|
||||
#define SP_SET_SIG1 0x01000 /* Bit 12: set signal 1 */
|
||||
#define SP_CLR_SIG2 0x02000 /* Bit 13: clear signal 2 */
|
||||
#define SP_SET_SIG2 0x04000 /* Bit 14: set signal 2 */
|
||||
#define SP_CLR_SIG3 0x08000 /* Bit 15: clear signal 3 */
|
||||
#define SP_SET_SIG3 0x10000 /* Bit 16: set signal 3 */
|
||||
#define SP_CLR_SIG4 0x20000 /* Bit 17: clear signal 4 */
|
||||
#define SP_SET_SIG4 0x40000 /* Bit 18: set signal 4 */
|
||||
#define SP_CLR_SIG5 0x80000 /* Bit 19: clear signal 5 */
|
||||
#define SP_SET_SIG5 0x100000 /* Bit 20: set signal 5 */
|
||||
#define SP_CLR_SIG6 0x200000 /* Bit 21: clear signal 6 */
|
||||
#define SP_SET_SIG6 0x400000 /* Bit 22: set signal 6 */
|
||||
#define SP_CLR_SIG7 0x800000 /* Bit 23: clear signal 7 */
|
||||
#define SP_SET_SIG7 0x1000000 /* Bit 24: set signal 7 */
|
||||
|
||||
/*
|
||||
* Patterns to interpret status reg (SP_STATUS_REG - read)
|
||||
*/
|
||||
#define SP_STATUS_HALT 0x001 /* Bit 0: halt */
|
||||
#define SP_STATUS_BROKE 0x002 /* Bit 1: broke */
|
||||
#define SP_STATUS_DMA_BUSY 0x004 /* Bit 2: dma busy */
|
||||
#define SP_STATUS_DMA_FULL 0x008 /* Bit 3: dma full */
|
||||
#define SP_STATUS_IO_FULL 0x010 /* Bit 4: io full */
|
||||
#define SP_STATUS_SSTEP 0x020 /* Bit 5: single step */
|
||||
#define SP_STATUS_INTR_BREAK 0x040 /* Bit 6: interrupt on break */
|
||||
#define SP_STATUS_SIG0 0x080 /* Bit 7: signal 0 set */
|
||||
#define SP_STATUS_SIG1 0x100 /* Bit 8: signal 1 set */
|
||||
#define SP_STATUS_SIG2 0x200 /* Bit 9: signal 2 set */
|
||||
#define SP_STATUS_SIG3 0x400 /* Bit 10: signal 3 set */
|
||||
#define SP_STATUS_SIG4 0x800 /* Bit 11: signal 4 set */
|
||||
#define SP_STATUS_SIG5 0x1000 /* Bit 12: signal 5 set */
|
||||
#define SP_STATUS_SIG6 0x2000 /* Bit 13: signal 6 set */
|
||||
#define SP_STATUS_SIG7 0x4000 /* Bit 14: signal 7 set */
|
||||
|
||||
/*
|
||||
* Use of SIG bits
|
||||
*/
|
||||
#define SP_CLR_YIELD SP_CLR_SIG0
|
||||
#define SP_SET_YIELD SP_SET_SIG0
|
||||
#define SP_STATUS_YIELD SP_STATUS_SIG0
|
||||
#define SP_CLR_YIELDED SP_CLR_SIG1
|
||||
#define SP_SET_YIELDED SP_SET_SIG1
|
||||
#define SP_STATUS_YIELDED SP_STATUS_SIG1
|
||||
#define SP_CLR_TASKDONE SP_CLR_SIG2
|
||||
#define SP_SET_TASKDONE SP_SET_SIG2
|
||||
#define SP_STATUS_TASKDONE SP_STATUS_SIG2
|
||||
#define SP_CLR_RSPSIGNAL SP_CLR_SIG3
|
||||
#define SP_SET_RSPSIGNAL SP_SET_SIG3
|
||||
#define SP_STATUS_RSPSIGNAL SP_STATUS_SIG3
|
||||
#define SP_CLR_CPUSIGNAL SP_CLR_SIG4
|
||||
#define SP_SET_CPUSIGNAL SP_SET_SIG4
|
||||
#define SP_STATUS_CPUSIGNAL SP_STATUS_SIG4
|
||||
|
||||
/* SP IMEM BIST REG (R/W): [6:0] BIST status bits; see below for detail */
|
||||
#define SP_IBIST_REG 0x04080004
|
||||
|
||||
/*
|
||||
* Patterns to interpret status reg (SP_BIST_REG - write)
|
||||
*/
|
||||
#define SP_IBIST_CHECK 0x01 /* Bit 0: BIST check */
|
||||
#define SP_IBIST_GO 0x02 /* Bit 1: BIST go */
|
||||
#define SP_IBIST_CLEAR 0x04 /* Bit 2: BIST clear */
|
||||
|
||||
/*
|
||||
* Patterns to interpret status reg (SP_BIST_REG - read)
|
||||
*/
|
||||
/* First 2 bits are same as in write mode:
|
||||
* Bit 0: BIST check; Bit 1: BIST go
|
||||
*/
|
||||
#define SP_IBIST_DONE 0x04 /* Bit 2: BIST done */
|
||||
#define SP_IBIST_FAILED 0x78 /* Bit [6:3]: BIST fail */
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* DP Command Registers
|
||||
*/
|
||||
#define DPC_BASE_REG 0x04100000
|
||||
|
||||
/* DP CMD DMA start (R/W): [23:0] DMEM/RDRAM start address */
|
||||
#define DPC_START_REG (DPC_BASE_REG+0x00)
|
||||
|
||||
/* DP CMD DMA end (R/W): [23:0] DMEM/RDRAM end address */
|
||||
#define DPC_END_REG (DPC_BASE_REG+0x04)
|
||||
|
||||
/* DP CMD DMA end (R): [23:0] DMEM/RDRAM current address */
|
||||
#define DPC_CURRENT_REG (DPC_BASE_REG+0x08)
|
||||
|
||||
/* DP CMD status (R/W): [9:0] valid bits - see below for definitions */
|
||||
#define DPC_STATUS_REG (DPC_BASE_REG+0x0C)
|
||||
|
||||
/* DP clock counter (R): [23:0] clock counter */
|
||||
#define DPC_CLOCK_REG (DPC_BASE_REG+0x10)
|
||||
|
||||
/* DP buffer busy counter (R): [23:0] clock counter */
|
||||
#define DPC_BUFBUSY_REG (DPC_BASE_REG+0x14)
|
||||
|
||||
/* DP pipe busy counter (R): [23:0] clock counter */
|
||||
#define DPC_PIPEBUSY_REG (DPC_BASE_REG+0x18)
|
||||
|
||||
/* DP TMEM load counter (R): [23:0] clock counter */
|
||||
#define DPC_TMEM_REG (DPC_BASE_REG+0x1C)
|
||||
|
||||
/*
|
||||
* Values to clear/set bit in status reg (DPC_STATUS_REG - write)
|
||||
*/
|
||||
#define DPC_CLR_XBUS_DMEM_DMA 0x0001 /* Bit 0: clear xbus_dmem_dma */
|
||||
#define DPC_SET_XBUS_DMEM_DMA 0x0002 /* Bit 1: set xbus_dmem_dma */
|
||||
#define DPC_CLR_FREEZE 0x0004 /* Bit 2: clear freeze */
|
||||
#define DPC_SET_FREEZE 0x0008 /* Bit 3: set freeze */
|
||||
#define DPC_CLR_FLUSH 0x0010 /* Bit 4: clear flush */
|
||||
#define DPC_SET_FLUSH 0x0020 /* Bit 5: set flush */
|
||||
#define DPC_CLR_TMEM_CTR 0x0040 /* Bit 6: clear tmem ctr */
|
||||
#define DPC_CLR_PIPE_CTR 0x0080 /* Bit 7: clear pipe ctr */
|
||||
#define DPC_CLR_CMD_CTR 0x0100 /* Bit 8: clear cmd ctr */
|
||||
#define DPC_CLR_CLOCK_CTR 0x0200 /* Bit 9: clear clock ctr */
|
||||
|
||||
/*
|
||||
* Patterns to interpret status reg (DPC_STATUS_REG - read)
|
||||
*/
|
||||
#define DPC_STATUS_XBUS_DMEM_DMA 0x001 /* Bit 0: xbus_dmem_dma */
|
||||
#define DPC_STATUS_FREEZE 0x002 /* Bit 1: freeze */
|
||||
#define DPC_STATUS_FLUSH 0x004 /* Bit 2: flush */
|
||||
/*#define DPC_STATUS_FROZEN 0x008*/ /* Bit 3: frozen */
|
||||
#define DPC_STATUS_START_GCLK 0x008 /* Bit 3: start gclk */
|
||||
#define DPC_STATUS_TMEM_BUSY 0x010 /* Bit 4: tmem busy */
|
||||
#define DPC_STATUS_PIPE_BUSY 0x020 /* Bit 5: pipe busy */
|
||||
#define DPC_STATUS_CMD_BUSY 0x040 /* Bit 6: cmd busy */
|
||||
#define DPC_STATUS_CBUF_READY 0x080 /* Bit 7: cbuf ready */
|
||||
#define DPC_STATUS_DMA_BUSY 0x100 /* Bit 8: dma busy */
|
||||
#define DPC_STATUS_END_VALID 0x200 /* Bit 9: end valid */
|
||||
#define DPC_STATUS_START_VALID 0x400 /* Bit 10: start valid */
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* DP Span Registers
|
||||
*/
|
||||
#define DPS_BASE_REG 0x04200000
|
||||
|
||||
/* DP tmem bist (R/W): [10:0] BIST status bits; see below for detail */
|
||||
#define DPS_TBIST_REG (DPS_BASE_REG+0x00)
|
||||
|
||||
/* DP span test mode (R/W): [0] Span buffer test access enable */
|
||||
#define DPS_TEST_MODE_REG (DPS_BASE_REG+0x04)
|
||||
|
||||
/* DP span buffer test address (R/W): [6:0] bits; see below for detail */
|
||||
#define DPS_BUFTEST_ADDR_REG (DPS_BASE_REG+0x08)
|
||||
|
||||
/* DP span buffer test data (R/W): [31:0] span buffer data */
|
||||
#define DPS_BUFTEST_DATA_REG (DPS_BASE_REG+0x0C)
|
||||
|
||||
/*
|
||||
* Patterns to interpret status reg (DPS_TMEM_BIST_REG - write)
|
||||
*/
|
||||
#define DPS_TBIST_CHECK 0x01 /* Bit 0: BIST check */
|
||||
#define DPS_TBIST_GO 0x02 /* Bit 1: BIST go */
|
||||
#define DPS_TBIST_CLEAR 0x04 /* Bit 2: BIST clear */
|
||||
|
||||
/*
|
||||
* Patterns to interpret status reg (DPS_TMEM_BIST_REG - read)
|
||||
*/
|
||||
/* First 2 bits are same as in write mode:
|
||||
* Bit 0: BIST check; Bit 1: BIST go
|
||||
*/
|
||||
#define DPS_TBIST_DONE 0x004 /* Bit 2: BIST done */
|
||||
#define DPS_TBIST_FAILED 0x7F8 /* Bit [10:3]: BIST fail */
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* MIPS Interface (MI) Registers
|
||||
*/
|
||||
#define MI_BASE_REG 0x04300000
|
||||
|
||||
/*
|
||||
* MI init mode (W): [6:0] init length, [7] clear init mode, [8] set init mode
|
||||
* [9/10] clear/set ebus test mode, [11] clear DP interrupt
|
||||
* (R): [6:0] init length, [7] init mode, [8] ebus test mode
|
||||
*/
|
||||
#define MI_INIT_MODE_REG (MI_BASE_REG+0x00)
|
||||
#define MI_MODE_REG MI_INIT_MODE_REG
|
||||
|
||||
/*
|
||||
* Values to clear/set bit in mode reg (MI_MODE_REG - write)
|
||||
*/
|
||||
#define MI_CLR_INIT 0x0080 /* Bit 7: clear init mode */
|
||||
#define MI_SET_INIT 0x0100 /* Bit 8: set init mode */
|
||||
#define MI_CLR_EBUS 0x0200 /* Bit 9: clear ebus test */
|
||||
#define MI_SET_EBUS 0x0400 /* Bit 10: set ebus test mode */
|
||||
#define MI_CLR_DP_INTR 0x0800 /* Bit 11: clear dp interrupt */
|
||||
#define MI_CLR_RDRAM 0x1000 /* Bit 12: clear RDRAM reg */
|
||||
#define MI_SET_RDRAM 0x2000 /* Bit 13: set RDRAM reg mode */
|
||||
|
||||
/*
|
||||
* Patterns to interpret mode reg (MI_MODE_REG - read)
|
||||
*/
|
||||
#define MI_MODE_INIT 0x0080 /* Bit 7: init mode */
|
||||
#define MI_MODE_EBUS 0x0100 /* Bit 8: ebus test mode */
|
||||
#define MI_MODE_RDRAM 0x0200 /* Bit 9: RDRAM reg mode */
|
||||
|
||||
/* MI version (R): [7:0] io, [15:8] rac, [23:16] rdp, [31:24] rsp */
|
||||
#define MI_VERSION_REG (MI_BASE_REG+0x04)
|
||||
#define MI_NOOP_REG MI_VERSION_REG
|
||||
|
||||
/* MI interrupt (R): [5:0] valid bits - see below for bit patterns */
|
||||
#define MI_INTR_REG (MI_BASE_REG+0x08)
|
||||
|
||||
/*
|
||||
* MI interrupt mask (W): [11:0] valid bits - see below for bit patterns
|
||||
* (R): [5:0] valid bits - see below for bit patterns
|
||||
*/
|
||||
#define MI_INTR_MASK_REG (MI_BASE_REG+0x0C)
|
||||
|
||||
/*
|
||||
* The following are values to check for interrupt setting (MI_INTR_REG)
|
||||
*/
|
||||
#define MI_INTR_SP 0x01 /* Bit 0: SP intr */
|
||||
#define MI_INTR_SI 0x02 /* Bit 1: SI intr */
|
||||
#define MI_INTR_AI 0x04 /* Bit 2: AI intr */
|
||||
#define MI_INTR_VI 0x08 /* Bit 3: VI intr */
|
||||
#define MI_INTR_PI 0x10 /* Bit 4: PI intr */
|
||||
#define MI_INTR_DP 0x20 /* Bit 5: DP intr */
|
||||
|
||||
/*
|
||||
* The following are values to clear/set various interrupt bit mask
|
||||
* They can be ORed together to manipulate multiple bits
|
||||
* (MI_INTR_MASK_REG - write)
|
||||
*/
|
||||
#define MI_INTR_MASK_CLR_SP 0x0001 /* Bit 0: clear SP mask */
|
||||
#define MI_INTR_MASK_SET_SP 0x0002 /* Bit 1: set SP mask */
|
||||
#define MI_INTR_MASK_CLR_SI 0x0004 /* Bit 2: clear SI mask */
|
||||
#define MI_INTR_MASK_SET_SI 0x0008 /* Bit 3: set SI mask */
|
||||
#define MI_INTR_MASK_CLR_AI 0x0010 /* Bit 4: clear AI mask */
|
||||
#define MI_INTR_MASK_SET_AI 0x0020 /* Bit 5: set AI mask */
|
||||
#define MI_INTR_MASK_CLR_VI 0x0040 /* Bit 6: clear VI mask */
|
||||
#define MI_INTR_MASK_SET_VI 0x0080 /* Bit 7: set VI mask */
|
||||
#define MI_INTR_MASK_CLR_PI 0x0100 /* Bit 8: clear PI mask */
|
||||
#define MI_INTR_MASK_SET_PI 0x0200 /* Bit 9: set PI mask */
|
||||
#define MI_INTR_MASK_CLR_DP 0x0400 /* Bit 10: clear DP mask */
|
||||
#define MI_INTR_MASK_SET_DP 0x0800 /* Bit 11: set DP mask */
|
||||
|
||||
/*
|
||||
* The following are values to check for interrupt mask setting
|
||||
* (MI_INTR_MASK_REG - read)
|
||||
*/
|
||||
#define MI_INTR_MASK_SP 0x01 /* Bit 0: SP intr mask */
|
||||
#define MI_INTR_MASK_SI 0x02 /* Bit 1: SI intr mask */
|
||||
#define MI_INTR_MASK_AI 0x04 /* Bit 2: AI intr mask */
|
||||
#define MI_INTR_MASK_VI 0x08 /* Bit 3: VI intr mask */
|
||||
#define MI_INTR_MASK_PI 0x10 /* Bit 4: PI intr mask */
|
||||
#define MI_INTR_MASK_DP 0x20 /* Bit 5: DP intr mask */
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* Video Interface (VI) Registers
|
||||
*/
|
||||
#define VI_BASE_REG 0x04400000
|
||||
|
||||
/* VI status/control (R/W): [15-0] valid bits:
|
||||
* [1:0] = type[1:0] (pixel size)
|
||||
* 0: blank (no data, no sync)
|
||||
* 1: reserved
|
||||
* 2: 5/5/5/3 ("16" bit)
|
||||
* 3: 8/8/8/8 (32 bit)
|
||||
* [2] = gamma_dither_enable (normally on, unless "special effect")
|
||||
* [3] = gamma_enable (normally on, unless MPEG/JPEG)
|
||||
* [4] = divot_enable (normally on if antialiased, unless decal lines)
|
||||
* [5] = reserved - always off
|
||||
* [6] = serrate (always on if interlaced, off if not)
|
||||
* [7] = reserved - diagnostics only
|
||||
* [9:8] = anti-alias (aa) mode[1:0]
|
||||
* 0: aa & resamp (always fetch extra lines)
|
||||
* 1: aa & resamp (fetch extra lines if needed)
|
||||
* 2: resamp only (treat as all fully covered)
|
||||
* 3: neither (replicate pixels, no interpolate)
|
||||
* [11] = reserved - diagnostics only
|
||||
* [15:12] = reserved
|
||||
*
|
||||
*/
|
||||
#define VI_STATUS_REG (VI_BASE_REG+0x00)
|
||||
#define VI_CONTROL_REG VI_STATUS_REG
|
||||
|
||||
/* VI origin (R/W): [23:0] frame buffer origin in bytes */
|
||||
#define VI_ORIGIN_REG (VI_BASE_REG+0x04)
|
||||
#define VI_DRAM_ADDR_REG VI_ORIGIN_REG
|
||||
|
||||
/* VI width (R/W): [11:0] frame buffer line width in pixels */
|
||||
#define VI_WIDTH_REG (VI_BASE_REG+0x08)
|
||||
#define VI_H_WIDTH_REG VI_WIDTH_REG
|
||||
|
||||
/* VI vertical intr (R/W): [9:0] interrupt when current half-line = V_INTR */
|
||||
#define VI_INTR_REG (VI_BASE_REG+0x0C)
|
||||
#define VI_V_INTR_REG VI_INTR_REG
|
||||
|
||||
/*
|
||||
* VI current vertical line (R/W): [9:0] current half line, sampled once per
|
||||
* line (the lsb of V_CURRENT is constant within a field, and in
|
||||
* interlaced modes gives the field number - which is constant for non-
|
||||
* interlaced modes)
|
||||
* - Any write to this register will clear interrupt line
|
||||
*/
|
||||
#define VI_CURRENT_REG (VI_BASE_REG+0x10)
|
||||
#define VI_V_CURRENT_LINE_REG VI_CURRENT_REG
|
||||
|
||||
/*
|
||||
* VI video timing (R/W): [ 7: 0] horizontal sync width in pixels,
|
||||
* [15: 8] color burst width in pixels,
|
||||
* [19:16] vertical sync width in half lines,
|
||||
* [29:20] start of color burst in pixels from h-sync
|
||||
*/
|
||||
#define VI_BURST_REG (VI_BASE_REG+0x14)
|
||||
#define VI_TIMING_REG VI_BURST_REG
|
||||
|
||||
/* VI vertical sync (R/W): [9:0] number of half-lines per field */
|
||||
#define VI_V_SYNC_REG (VI_BASE_REG+0x18)
|
||||
|
||||
/* VI horizontal sync (R/W): [11: 0] total duration of a line in 1/4 pixel
|
||||
* [20:16] a 5-bit leap pattern used for PAL only
|
||||
* (h_sync_period)
|
||||
*/
|
||||
#define VI_H_SYNC_REG (VI_BASE_REG+0x1C)
|
||||
|
||||
/*
|
||||
* VI horizontal sync leap (R/W): [11: 0] identical to h_sync_period
|
||||
* [27:16] identical to h_sync_period
|
||||
*/
|
||||
#define VI_LEAP_REG (VI_BASE_REG+0x20)
|
||||
#define VI_H_SYNC_LEAP_REG VI_LEAP_REG
|
||||
|
||||
/*
|
||||
* VI horizontal video (R/W): [ 9: 0] end of active video in screen pixels
|
||||
* : [25:16] start of active video in screen pixels
|
||||
*/
|
||||
#define VI_H_START_REG (VI_BASE_REG+0x24)
|
||||
#define VI_H_VIDEO_REG VI_H_START_REG
|
||||
|
||||
/*
|
||||
* VI vertical video (R/W): [ 9: 0] end of active video in screen half-lines
|
||||
* : [25:16] start of active video in screen half-lines
|
||||
*/
|
||||
#define VI_V_START_REG (VI_BASE_REG+0x28)
|
||||
#define VI_V_VIDEO_REG VI_V_START_REG
|
||||
|
||||
/*
|
||||
* VI vertical burst (R/W): [ 9: 0] end of color burst enable in half-lines
|
||||
* : [25:16] start of color burst enable in half-lines
|
||||
*/
|
||||
#define VI_V_BURST_REG (VI_BASE_REG+0x2C)
|
||||
|
||||
/* VI x-scale (R/W): [11: 0] 1/horizontal scale up factor (2.10 format)
|
||||
* [27:16] horizontal subpixel offset (2.10 format)
|
||||
*/
|
||||
#define VI_X_SCALE_REG (VI_BASE_REG+0x30)
|
||||
|
||||
/* VI y-scale (R/W): [11: 0] 1/vertical scale up factor (2.10 format)
|
||||
* [27:16] vertical subpixel offset (2.10 format)
|
||||
*/
|
||||
#define VI_Y_SCALE_REG (VI_BASE_REG+0x34)
|
||||
|
||||
/*
|
||||
* Patterns to interpret VI_CONTROL_REG
|
||||
*/
|
||||
#define VI_CTRL_TYPE_16 0x00002 /* Bit [1:0] pixel size: 16 bit */
|
||||
#define VI_CTRL_TYPE_32 0x00003 /* Bit [1:0] pixel size: 32 bit */
|
||||
#define VI_CTRL_GAMMA_DITHER_ON 0x00004 /* Bit 2: default = on */
|
||||
#define VI_CTRL_GAMMA_ON 0x00008 /* Bit 3: default = on */
|
||||
#define VI_CTRL_DIVOT_ON 0x00010 /* Bit 4: default = on */
|
||||
#define VI_CTRL_SERRATE_ON 0x00040 /* Bit 6: on if interlaced */
|
||||
#define VI_CTRL_ANTIALIAS_MASK 0x00300 /* Bit [9:8] anti-alias mode */
|
||||
#define VI_CTRL_DITHER_FILTER_ON 0x10000 /* Bit 16: dither-filter mode */
|
||||
|
||||
/*
|
||||
* Possible video clocks (NTSC or PAL)
|
||||
*/
|
||||
#define VI_NTSC_CLOCK 48681812 /* Hz = 48.681812 MHz */
|
||||
#define VI_PAL_CLOCK 49656530 /* Hz = 49.656530 MHz */
|
||||
#define VI_MPAL_CLOCK 48628316 /* Hz = 48.628316 MHz */
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* Audio Interface (AI) Registers
|
||||
*
|
||||
* The address and length registers are double buffered; that is, they
|
||||
* can be written twice before becoming full.
|
||||
* The address must be written before the length.
|
||||
*/
|
||||
#define AI_BASE_REG 0x04500000
|
||||
|
||||
/* AI DRAM address (W): [23:0] starting RDRAM address (8B-aligned) */
|
||||
#define AI_DRAM_ADDR_REG (AI_BASE_REG+0x00) /* R0: DRAM address */
|
||||
|
||||
/* AI length (R/W): [14:0] transfer length (v1.0) - Bottom 3 bits are ignored */
|
||||
/* [17:0] transfer length (v2.0) - Bottom 3 bits are ignored */
|
||||
#define AI_LEN_REG (AI_BASE_REG+0x04) /* R1: Length */
|
||||
|
||||
/* AI control (W): [0] DMA enable - if LSB == 1, DMA is enabled */
|
||||
#define AI_CONTROL_REG (AI_BASE_REG+0x08) /* R2: DMA Control */
|
||||
|
||||
/*
|
||||
* AI status (R): [31]/[0] ai_full (addr & len buffer full), [30] ai_busy
|
||||
* Note that a 1->0 transition in ai_full will set interrupt
|
||||
* (W): clear audio interrupt
|
||||
*/
|
||||
#define AI_STATUS_REG (AI_BASE_REG+0x0C) /* R3: Status */
|
||||
|
||||
/*
|
||||
* AI DAC sample period register (W): [13:0] dac rate
|
||||
* - vid_clock/(dperiod + 1) is the DAC sample rate
|
||||
* - (dperiod + 1) >= 66 * (aclockhp + 1) must be true
|
||||
*/
|
||||
#define AI_DACRATE_REG (AI_BASE_REG+0x10) /* R4: DAC rate 14-lsb*/
|
||||
|
||||
/*
|
||||
* AI bit rate (W): [3:0] bit rate (abus clock half period register - aclockhp)
|
||||
* - vid_clock/(2 * (aclockhp + 1)) is the DAC clock rate
|
||||
* - The abus clock stops if aclockhp is zero
|
||||
*/
|
||||
#define AI_BITRATE_REG (AI_BASE_REG+0x14) /* R5: Bit rate 4-lsb */
|
||||
|
||||
/* Value for control register */
|
||||
#define AI_CONTROL_DMA_ON 0x01 /* LSB = 1: DMA enable*/
|
||||
#define AI_CONTROL_DMA_OFF 0x00 /* LSB = 1: DMA enable*/
|
||||
|
||||
/* Value for status register */
|
||||
#define AI_STATUS_FIFO_FULL 0x80000000 /* Bit 31: full */
|
||||
#define AI_STATUS_DMA_BUSY 0x40000000 /* Bit 30: busy */
|
||||
|
||||
/* DAC rate = video clock / audio frequency
|
||||
* - DAC rate >= (66 * Bit rate) must be true
|
||||
*/
|
||||
#define AI_MAX_DAC_RATE 16384 /* 14-bit+1 */
|
||||
#define AI_MIN_DAC_RATE 132
|
||||
|
||||
/* Bit rate <= (DAC rate / 66) */
|
||||
#define AI_MAX_BIT_RATE 16 /* 4-bit+1 */
|
||||
#define AI_MIN_BIT_RATE 2
|
||||
|
||||
/*
|
||||
* Maximum and minimum values for audio frequency based on video clocks
|
||||
* max frequency = (video clock / min dac rate)
|
||||
* min frequency = (video clock / max dac rate)
|
||||
*/
|
||||
#define AI_NTSC_MAX_FREQ 368000 /* 368 KHz */
|
||||
#define AI_NTSC_MIN_FREQ 3000 /* 3 KHz ~ 2971 Hz */
|
||||
|
||||
#define AI_PAL_MAX_FREQ 376000 /* 376 KHz */
|
||||
#define AI_PAL_MIN_FREQ 3050 /* 3 KHz ~ 3031 Hz */
|
||||
|
||||
#define AI_MPAL_MAX_FREQ 368000 /* 368 KHz */
|
||||
#define AI_MPAL_MIN_FREQ 3000 /* 3 KHz ~ 2968 Hz */
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* Peripheral Interface (PI) Registers
|
||||
*/
|
||||
#define PI_BASE_REG 0x04600000
|
||||
|
||||
/* PI DRAM address (R/W): [23:0] starting RDRAM address */
|
||||
#define PI_DRAM_ADDR_REG (PI_BASE_REG+0x00) /* DRAM address */
|
||||
|
||||
/* PI pbus (cartridge) address (R/W): [31:0] starting AD16 address */
|
||||
#define PI_CART_ADDR_REG (PI_BASE_REG+0x04)
|
||||
|
||||
/* PI read length (R/W): [23:0] read data length */
|
||||
#define PI_RD_LEN_REG (PI_BASE_REG+0x08)
|
||||
|
||||
/* PI write length (R/W): [23:0] write data length */
|
||||
#define PI_WR_LEN_REG (PI_BASE_REG+0x0C)
|
||||
|
||||
/*
|
||||
* PI status (R): [0] DMA busy, [1] IO busy, [2], error
|
||||
* (W): [0] reset controller (and abort current op), [1] clear intr
|
||||
*/
|
||||
#define PI_STATUS_REG (PI_BASE_REG+0x10)
|
||||
|
||||
/* PI dom1 latency (R/W): [7:0] domain 1 device latency */
|
||||
#define PI_BSD_DOM1_LAT_REG (PI_BASE_REG+0x14)
|
||||
|
||||
/* PI dom1 pulse width (R/W): [7:0] domain 1 device R/W strobe pulse width */
|
||||
#define PI_BSD_DOM1_PWD_REG (PI_BASE_REG+0x18)
|
||||
|
||||
/* PI dom1 page size (R/W): [3:0] domain 1 device page size */
|
||||
#define PI_BSD_DOM1_PGS_REG (PI_BASE_REG+0x1C) /* page size */
|
||||
|
||||
/* PI dom1 release (R/W): [1:0] domain 1 device R/W release duration */
|
||||
#define PI_BSD_DOM1_RLS_REG (PI_BASE_REG+0x20)
|
||||
|
||||
/* PI dom2 latency (R/W): [7:0] domain 2 device latency */
|
||||
#define PI_BSD_DOM2_LAT_REG (PI_BASE_REG+0x24) /* Domain 2 latency */
|
||||
|
||||
/* PI dom2 pulse width (R/W): [7:0] domain 2 device R/W strobe pulse width */
|
||||
#define PI_BSD_DOM2_PWD_REG (PI_BASE_REG+0x28) /* pulse width */
|
||||
|
||||
/* PI dom2 page size (R/W): [3:0] domain 2 device page size */
|
||||
#define PI_BSD_DOM2_PGS_REG (PI_BASE_REG+0x2C) /* page size */
|
||||
|
||||
/* PI dom2 release (R/W): [1:0] domain 2 device R/W release duration */
|
||||
#define PI_BSD_DOM2_RLS_REG (PI_BASE_REG+0x30) /* release duration */
|
||||
|
||||
#define PI_DOMAIN1_REG PI_BSD_DOM1_LAT_REG
|
||||
#define PI_DOMAIN2_REG PI_BSD_DOM2_LAT_REG
|
||||
|
||||
#define PI_DOM_LAT_OFS 0x00
|
||||
#define PI_DOM_PWD_OFS 0x04
|
||||
#define PI_DOM_PGS_OFS 0x08
|
||||
#define PI_DOM_RLS_OFS 0x0C
|
||||
|
||||
/*
|
||||
* PI status register has 3 bits active when read from (PI_STATUS_REG - read)
|
||||
* Bit 0: DMA busy - set when DMA is in progress
|
||||
* Bit 1: IO busy - set when IO is in progress
|
||||
* Bit 2: Error - set when CPU issues IO request while DMA is busy
|
||||
*/
|
||||
#define PI_STATUS_ERROR 0x04
|
||||
#define PI_STATUS_IO_BUSY 0x02
|
||||
#define PI_STATUS_DMA_BUSY 0x01
|
||||
|
||||
/* PI status register has 2 bits active when written to:
|
||||
* Bit 0: When set, reset PIC
|
||||
* Bit 1: When set, clear interrupt flag
|
||||
* The values of the two bits can be ORed together to both reset PIC and
|
||||
* clear interrupt at the same time.
|
||||
*
|
||||
* Note:
|
||||
* - The PIC does generate an interrupt at the end of each DMA. CPU
|
||||
* needs to clear the interrupt flag explicitly (from an interrupt
|
||||
* handler) by writing into the STATUS register with bit 1 set.
|
||||
*
|
||||
* - When a DMA completes, the interrupt flag is set. CPU can issue
|
||||
* another request even while the interrupt flag is set (as long as
|
||||
* PIC is idle). However, it is the CPU's responsibility for
|
||||
* maintaining accurate correspondence between DMA completions and
|
||||
* interrupts.
|
||||
*
|
||||
* - When PIC is reset, if PIC happens to be busy, an interrupt will
|
||||
* be generated as PIC returns to idle. Otherwise, no interrupt will
|
||||
* be generated and PIC remains idle.
|
||||
*/
|
||||
/*
|
||||
* Values to clear interrupt/reset PIC (PI_STATUS_REG - write)
|
||||
*/
|
||||
#define PI_STATUS_RESET 0x01
|
||||
#define PI_SET_RESET PI_STATUS_RESET
|
||||
|
||||
#define PI_STATUS_CLR_INTR 0x02
|
||||
#define PI_CLR_INTR PI_STATUS_CLR_INTR
|
||||
|
||||
#define PI_DMA_BUFFER_SIZE 128
|
||||
|
||||
#define PI_DOM1_ADDR1 0x06000000 /* to 0x07FFFFFF */
|
||||
#define PI_DOM1_ADDR2 0x10000000 /* to 0x1FBFFFFF */
|
||||
#define PI_DOM1_ADDR3 0x1FD00000 /* to 0x7FFFFFFF */
|
||||
#define PI_DOM2_ADDR1 0x05000000 /* to 0x05FFFFFF */
|
||||
#define PI_DOM2_ADDR2 0x08000000 /* to 0x0FFFFFFF */
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* RDRAM Interface (RI) Registers
|
||||
*/
|
||||
#define RI_BASE_REG 0x04700000
|
||||
|
||||
/* RI mode (R/W): [1:0] operating mode, [2] stop T active, [3] stop R active */
|
||||
#define RI_MODE_REG (RI_BASE_REG+0x00)
|
||||
|
||||
/* RI config (R/W): [5:0] current control input, [6] current control enable */
|
||||
#define RI_CONFIG_REG (RI_BASE_REG+0x04)
|
||||
|
||||
/* RI current load (W): [] any write updates current control register */
|
||||
#define RI_CURRENT_LOAD_REG (RI_BASE_REG+0x08)
|
||||
|
||||
/* RI select (R/W): [2:0] receive select, [2:0] transmit select */
|
||||
#define RI_SELECT_REG (RI_BASE_REG+0x0C)
|
||||
|
||||
/* RI refresh (R/W): [7:0] clean refresh delay, [15:8] dirty refresh delay,
|
||||
* [16] refresh bank, [17] refresh enable
|
||||
* [18] refresh optimize
|
||||
*/
|
||||
#define RI_REFRESH_REG (RI_BASE_REG+0x10)
|
||||
#define RI_COUNT_REG RI_REFRESH_REG
|
||||
|
||||
/* RI latency (R/W): [3:0] DMA latency/overlap */
|
||||
#define RI_LATENCY_REG (RI_BASE_REG+0x14)
|
||||
|
||||
/* RI error (R): [0] nack error, [1] ack error */
|
||||
#define RI_RERROR_REG (RI_BASE_REG+0x18)
|
||||
|
||||
/* RI error (W): [] any write clears all error bits */
|
||||
#define RI_WERROR_REG (RI_BASE_REG+0x1C)
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* Serial Interface (SI) Registers
|
||||
*/
|
||||
#define SI_BASE_REG 0x04800000
|
||||
|
||||
/* SI DRAM address (R/W): [23:0] starting RDRAM address */
|
||||
#define SI_DRAM_ADDR_REG (SI_BASE_REG+0x00) /* R0: DRAM address */
|
||||
|
||||
/* SI address read 64B (W): [] any write causes a 64B DMA write */
|
||||
#define SI_PIF_ADDR_RD64B_REG (SI_BASE_REG+0x04) /* R1: 64B PIF->DRAM */
|
||||
|
||||
/* Address SI_BASE_REG + (0x08, 0x0c, 0x14) are reserved */
|
||||
|
||||
/* SI address write 64B (W): [] any write causes a 64B DMA read */
|
||||
#define SI_PIF_ADDR_WR64B_REG (SI_BASE_REG+0x10) /* R4: 64B DRAM->PIF */
|
||||
|
||||
/*
|
||||
* SI status (W): [] any write clears interrupt
|
||||
* (R): [0] DMA busy, [1] IO read busy, [2] reserved
|
||||
* [3] DMA error, [12] interrupt
|
||||
*/
|
||||
#define SI_STATUS_REG (SI_BASE_REG+0x18) /* R6: Status */
|
||||
|
||||
/* SI status register has the following bits active:
|
||||
* 0: DMA busy - set when DMA is in progress
|
||||
* 1: IO busy - set when IO access is in progress
|
||||
* 3: DMA error - set when there are overlapping DMA requests
|
||||
* 12: Interrupt - Interrupt set
|
||||
*/
|
||||
#define SI_STATUS_DMA_BUSY 0x0001
|
||||
#define SI_STATUS_RD_BUSY 0x0002
|
||||
#define SI_STATUS_DMA_ERROR 0x0008
|
||||
#define SI_STATUS_INTERRUPT 0x1000
|
||||
|
||||
/*************************************************************************
|
||||
* Development Board GIO Control Registers
|
||||
*/
|
||||
|
||||
#define GIO_BASE_REG 0x18000000
|
||||
|
||||
/* Game to Host Interrupt */
|
||||
#define GIO_GIO_INTR_REG (GIO_BASE_REG+0x000)
|
||||
|
||||
/* Game to Host SYNC */
|
||||
#define GIO_GIO_SYNC_REG (GIO_BASE_REG+0x400)
|
||||
|
||||
/* Host to Game Interrupt */
|
||||
#define GIO_CART_INTR_REG (GIO_BASE_REG+0x800)
|
||||
|
||||
|
||||
/*************************************************************************
|
||||
* Common macros
|
||||
*/
|
||||
#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
|
||||
#define IO_READ(addr) (*(vu32 *)PHYS_TO_K1(addr))
|
||||
#define IO_WRITE(addr,data) (*(vu32 *)PHYS_TO_K1(addr)=(u32)(data))
|
||||
#define RCP_STAT_PRINT \
|
||||
rmonPrintf("current=%x start=%x end=%x dpstat=%x spstat=%x\n", \
|
||||
IO_READ(DPC_CURRENT_REG), \
|
||||
IO_READ(DPC_START_REG), \
|
||||
IO_READ(DPC_END_REG), \
|
||||
IO_READ(DPC_STATUS_REG), \
|
||||
IO_READ(SP_STATUS_REG))
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* _RCP_H_ */
|
||||
142
mk64.ld
142
mk64.ld
|
|
@ -96,13 +96,146 @@ SECTIONS
|
|||
BUILD_DIR/asm/audio/seqplayer.o(.text);
|
||||
BUILD_DIR/asm/audio/external.o(.text);
|
||||
BUILD_DIR/asm/audio/port_eu.o(.text);
|
||||
BUILD_DIR/asm/libultra.o(.text);
|
||||
|
||||
BUILD_DIR/src/os/osCreateThread.o(.text);
|
||||
BUILD_DIR/src/os/osInitialize.o(.text);
|
||||
BUILD_DIR/src/os/osStartThread.o(.text);
|
||||
BUILD_DIR/asm/os/osCreateViManager.o(.text);
|
||||
BUILD_DIR/src/os/osViSetMode.o(.text);
|
||||
BUILD_DIR/src/os/osViBlack.o(.text);
|
||||
BUILD_DIR/src/os/osViSetSpecialFeatures.o(.text);
|
||||
BUILD_DIR/asm/os/osCreatePiManager.o(.text);
|
||||
BUILD_DIR/src/os/osSetThreadPri.o(.text);
|
||||
BUILD_DIR/src/os/osCreateMesgQueue.o(.text);
|
||||
BUILD_DIR/src/os/osViSetEvent.o(.text);
|
||||
BUILD_DIR/src/os/osSetEventMesg.o(.text);
|
||||
BUILD_DIR/src/os/osSpTaskLoadGo.o(.text);
|
||||
BUILD_DIR/asm/os/osContInit.o(.text);
|
||||
BUILD_DIR/src/os/osContStartReadData.o(.text);
|
||||
BUILD_DIR/src/os/osRecvMesg.o(.text);
|
||||
BUILD_DIR/asm/os/osWritebackDCacheAll.o(.text);
|
||||
BUILD_DIR/src/os/osSendMesg.o(.text);
|
||||
BUILD_DIR/src/os/osViSwapBuffer.o(.text);
|
||||
BUILD_DIR/asm/os/bzero.o(.text);
|
||||
BUILD_DIR/asm/os/osInvalICache.o(.text);
|
||||
BUILD_DIR/asm/os/osInvalDCache.o(.text);
|
||||
BUILD_DIR/src/os/osPiStartDma.o(.text);
|
||||
BUILD_DIR/src/os/osSpTaskYield.o(.text);
|
||||
BUILD_DIR/src/os/osSpTaskYielded.o(.text);
|
||||
BUILD_DIR/src/os/osGetTime.o(.text);
|
||||
BUILD_DIR/src/os/math/llmuldiv.o(.text);
|
||||
BUILD_DIR/src/os/__osGetCurrFaultedThread.o(.text);
|
||||
BUILD_DIR/asm/os/sqrtf.o(.text);
|
||||
BUILD_DIR/src/os/guOrthoF.o(.text);
|
||||
BUILD_DIR/src/os/osSetTime.o(.text);
|
||||
BUILD_DIR/src/os/osEepromProbe.o(.text);
|
||||
BUILD_DIR/src/os/osPfsIsPlug.o(.text);
|
||||
BUILD_DIR/asm/os/func_800CE720.o(.text);
|
||||
BUILD_DIR/src/os/osPfsNumFiles.o(.text);
|
||||
BUILD_DIR/src/os/osPfsFileState.o(.text);
|
||||
BUILD_DIR/src/os/osPfsFreeBlocks.o(.text);
|
||||
BUILD_DIR/asm/os/guRotateF.o(.text);
|
||||
BUILD_DIR/src/os/guScaleF.o(.text);
|
||||
BUILD_DIR/asm/os/guPerspectiveF.o(.text);
|
||||
BUILD_DIR/src/os/guLookAtF.o(.text);
|
||||
BUILD_DIR/src/os/guTranslateF.o(.text);
|
||||
BUILD_DIR/asm/os/osSyncPrintf.o(.text);
|
||||
BUILD_DIR/src/os/guMtxCatL.o(.text);
|
||||
BUILD_DIR/src/os/osPfsSearchFile.o(.text);
|
||||
BUILD_DIR/src/os/osPfsDeleteFile.o(.text);
|
||||
BUILD_DIR/asm/os/osEeprom.o(.text);
|
||||
BUILD_DIR/src/os/osPfsReadWriteFile.o(.text);
|
||||
BUILD_DIR/src/os/osPfsAllocateFile.o(.text);
|
||||
BUILD_DIR/src/os/osAiSetFrequency.o(.text);
|
||||
BUILD_DIR/src/os/osAiGetLength.o(.text);
|
||||
BUILD_DIR/src/os/osAiSetNextBuffer.o(.text);
|
||||
BUILD_DIR/asm/os/osGetCount.o(.text);
|
||||
BUILD_DIR/asm/os/__osException.o(.text);
|
||||
BUILD_DIR/asm/os/__osDisableInt.o(.text);
|
||||
BUILD_DIR/asm/os/__osRestoreInt.o(.text);
|
||||
BUILD_DIR/src/os/__osDequeueThread.o(.text);
|
||||
BUILD_DIR/asm/os/__osSetSR.o(.text);
|
||||
BUILD_DIR/asm/os/__osGetSR.o(.text);
|
||||
BUILD_DIR/asm/os/__osSetFpcCsr.o(.text);
|
||||
BUILD_DIR/src/os/__osSiRawReadIo.o(.text);
|
||||
BUILD_DIR/src/os/__osSiRawWriteIo.o(.text);
|
||||
BUILD_DIR/asm/os/osWritebackDCache.o(.text);
|
||||
BUILD_DIR/asm/os/osMapTLBRdb.o(.text);
|
||||
BUILD_DIR/src/os/osPiRawReadIo.o(.text);
|
||||
BUILD_DIR/src/os/__osSetHWIntrRoutine.o(.text);
|
||||
BUILD_DIR/asm/os/__osLeoInterrupt.o(.text);
|
||||
BUILD_DIR/src/os/osTimer.o(.text);
|
||||
BUILD_DIR/src/os/osGetThreadPri.o(.text);
|
||||
BUILD_DIR/src/os/__osViInit.o(.text);
|
||||
BUILD_DIR/src/os/__osViGetCurrentContext.o(.text);
|
||||
BUILD_DIR/src/os/__osViSwapContext.o(.text);
|
||||
BUILD_DIR/src/os/__osPiCreateAccessQueue.o(.text);
|
||||
BUILD_DIR/src/os/osPiRawStartDma.o(.text);
|
||||
BUILD_DIR/src/os/osEPiRawStartDma.o(.text);
|
||||
BUILD_DIR/src/os/__osDevMgrMain.o(.text);
|
||||
BUILD_DIR/asm/os/bcopy.o(.text);
|
||||
BUILD_DIR/src/os/osVirtualToPhysical.o(.text);
|
||||
BUILD_DIR/src/os/__osSpSetStatus.o(.text);
|
||||
BUILD_DIR/src/os/__osSpSetPc.o(.text);
|
||||
BUILD_DIR/src/os/__osSpRawStartDma.o(.text);
|
||||
BUILD_DIR/src/os/__osSpDeviceBusy.o(.text);
|
||||
BUILD_DIR/src/os/osSetTimer.o(.text);
|
||||
BUILD_DIR/src/os/__osSiRawStartDma.o(.text);
|
||||
BUILD_DIR/src/os/__osSiCreateAccessQueue.o(.text);
|
||||
BUILD_DIR/src/os/osJamMesg.o(.text);
|
||||
BUILD_DIR/src/os/osPiGetCmdQueue.o(.text);
|
||||
BUILD_DIR/src/os/__osSpGetStatus.o(.text);
|
||||
BUILD_DIR/src/os/guMtxF2L.o(.text);
|
||||
BUILD_DIR/src/os/osEepromWrite.o(.text);
|
||||
BUILD_DIR/src/os/contpfs.o(.text);
|
||||
BUILD_DIR/src/os/osPfsChecker.o(.text);
|
||||
BUILD_DIR/asm/os/contramread.o(.text);
|
||||
BUILD_DIR/src/os/guNormalize.o(.text);
|
||||
BUILD_DIR/src/os/math/sinf.o(.text);
|
||||
BUILD_DIR/src/os/math/cosf.o(.text);
|
||||
BUILD_DIR/src/os/_Printf.o(.text);
|
||||
BUILD_DIR/src/os/guMtxCatF.o(.text);
|
||||
BUILD_DIR/asm/os/contramwrite.o(.text);
|
||||
BUILD_DIR/src/os/osEepromRead.o(.text);
|
||||
BUILD_DIR/src/os/__osAiDeviceBusy.o(.text);
|
||||
BUILD_DIR/asm/os/osSetIntMask.o(.text);
|
||||
BUILD_DIR/src/os/osDestroyThread.o(.text);
|
||||
BUILD_DIR/src/os/__osSiDeviceBusy.o(.text);
|
||||
BUILD_DIR/src/os/osLeoDiskInit.o(.text);
|
||||
BUILD_DIR/asm/os/__osSetCompare.o(.text);
|
||||
BUILD_DIR/src/os/__osResetGlobalIntMask.o(.text);
|
||||
BUILD_DIR/src/os/__osEPiRawWriteIo.o(.text);
|
||||
BUILD_DIR/src/os/osYieldThread.o(.text);
|
||||
BUILD_DIR/asm/os/__osProbeTLB.o(.text);
|
||||
BUILD_DIR/src/os/crc.o(.text);
|
||||
BUILD_DIR/src/os/string.o(.text);
|
||||
BUILD_DIR/src/os/_Litob.o(.text);
|
||||
BUILD_DIR/src/os/_Ldtob.o(.text);
|
||||
BUILD_DIR/src/os/ldiv.o(.text);
|
||||
|
||||
BUILD_DIR/data/rsp.o(.text);
|
||||
BUILD_DIR/data/data_0DD0A0.o(.data);
|
||||
BUILD_DIR/src/kart_attributes.inc.o(.data);
|
||||
BUILD_DIR/data/data_0DD0A0_2.o(.rodata);
|
||||
BUILD_DIR/src/os/osInitialize.o(.data);
|
||||
/*BUILD_DIR/src/os/osCreateViManager.o(.data);*/
|
||||
BUILD_DIR/data/data_0DD0A0_2_1.o(.data);
|
||||
BUILD_DIR/src/os/osTimer.o(.data);
|
||||
BUILD_DIR/src/os/__osViInit.o(.data);
|
||||
BUILD_DIR/src/os/__osPiCreateAccessQueue.o(.data);
|
||||
BUILD_DIR/src/os/__osSiCreateAccessQueue.o(.data);
|
||||
BUILD_DIR/src/os/_Printf.o(.data);
|
||||
BUILD_DIR/data/rodata_libultra.o(.rodata);
|
||||
BUILD_DIR/src/os/_Litob.o(.data);
|
||||
BUILD_DIR/data/rodata_main.o(.rodata);
|
||||
BUILD_DIR/src/code_800029B0.o(.rodata);
|
||||
BUILD_DIR/data/data_0DD0A0_3.o(.rodata);
|
||||
BUILD_DIR/src/os/__osDevMgrMain.o(.rodata);
|
||||
BUILD_DIR/src/os/math/sinf.o(.rodata);
|
||||
BUILD_DIR/src/os/math/cosf.o(.rodata);
|
||||
BUILD_DIR/src/os/_Printf.o(.rodata);
|
||||
BUILD_DIR/asm/os/osSetIntMask.o(.rodata);
|
||||
BUILD_DIR/src/os/_Ldtob.o(.rodata);
|
||||
BUILD_DIR/src/data_0DD0A0_3.inc.o(.data);
|
||||
BUILD_DIR/data/rsp.o(.data);
|
||||
BUILD_DIR/src/audio/data.o(.data);
|
||||
|
|
@ -120,6 +253,13 @@ SECTIONS
|
|||
BUILD_DIR/asm/bss_80004EF0.o(.bss);
|
||||
BUILD_DIR/asm/bss_80005FD0.o(.bss);
|
||||
BUILD_DIR/asm/bss_MainSeg.o(.bss);
|
||||
BUILD_DIR/src/os/osTimer.o(.bss);
|
||||
BUILD_DIR/src/os/__osPiCreateAccessQueue.o(.bss);
|
||||
BUILD_DIR/src/os/__osSiCreateAccessQueue.o(.bss);
|
||||
BUILD_DIR/src/os/osEepromWrite.o(.bss);
|
||||
BUILD_DIR/asm/bss_after_ostimer.o(.bss);
|
||||
BUILD_DIR/src/os/osLeoDiskInit.o(.bss);
|
||||
BUILD_DIR/asm/bss_after_diskinit.o(.bss);
|
||||
}
|
||||
END_NOLOAD(main)
|
||||
|
||||
|
|
|
|||
|
|
@ -10,4 +10,4 @@ fi
|
|||
|
||||
#echo "Replace $1 with $2?"
|
||||
#read
|
||||
grep -rl "$1" asm/**/*.s data/*.s src/*.c include/*.h undefined_syms.txt | xargs sed -i "s/\b$1\b/$2/g"
|
||||
grep -rl "$1" asm/**/*.s data/*.s src/*.c src/os/*.{c,h} undefined_syms.txt | xargs sed -i "s/\b$1\b/$2/g"
|
||||
|
|
|
|||
|
|
@ -54,8 +54,6 @@ extern u32 *D_802B91C8;
|
|||
|
||||
void load_giant_egg(f32 *, f32, f32, f32);
|
||||
|
||||
extern u32 D_8000031C[];
|
||||
|
||||
// gfx?
|
||||
extern u32 *D_0F04FE28;
|
||||
extern u32 *D_0F050118;
|
||||
|
|
@ -223,7 +221,7 @@ void func_80003010(void) {
|
|||
int i;
|
||||
|
||||
for (i = 0; i < 16; i++) {
|
||||
D_8000031C[i] = 0;
|
||||
((u32 *)osAppNmiBuffer)[i] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -2,6 +2,8 @@
|
|||
#include <macros.h>
|
||||
#include <types.h>
|
||||
|
||||
// audio rodata
|
||||
|
||||
/*
|
||||
struct D_800F2F90 D_800F2F90[] = {
|
||||
L800C0124, L800C0078, L800C0140, L800C0150,
|
||||
|
|
@ -360,28 +362,3 @@ s32 D_800F3B1C[] = {
|
|||
};
|
||||
|
||||
*/
|
||||
|
||||
u16 D_800F3C10[] = {
|
||||
0x0555, 0x0556, 0x0559, 0x055a, 0x0565, 0x0566, 0x0569, 0x056a,
|
||||
0x0595, 0x0596, 0x0599, 0x059a, 0x05a5, 0x05a6, 0x05a9, 0x05aa,
|
||||
0x0655, 0x0656, 0x0659, 0x065a, 0x0665, 0x0666, 0x0669, 0x066a,
|
||||
0x0695, 0x0696, 0x0699, 0x069a, 0x06a5, 0x06a6, 0x06a9, 0x06aa,
|
||||
0x0955, 0x0956, 0x0959, 0x095a, 0x0965, 0x0966, 0x0969, 0x096a,
|
||||
0x0995, 0x0996, 0x0999, 0x099a, 0x09a5, 0x09a6, 0x09a9, 0x09aa,
|
||||
0x0a55, 0x0a56, 0x0a59, 0x0a5a, 0x0a65, 0x0a66, 0x0a69, 0x0a6a,
|
||||
0x0a95, 0x0a96, 0x0a99, 0x0a9a, 0x0aa5, 0x0aa6, 0x0aa9, 0x0aaa,
|
||||
};
|
||||
int D_800F3C90[] = {0x7f810000, 0x00000000, 0x00000000, 0x00000000 }; // NaN?
|
||||
|
||||
double D_800F3CA0[] = {
|
||||
10.0, 100.0, 10000.0, 100000000.0, 10000000000000000.0,
|
||||
1.0e+32, 1.0e+64, 1.0e+128, 1.0e+256
|
||||
};
|
||||
|
||||
char D_800F3CE8[] = "NaN";
|
||||
char D_800F3CEC[] = "Inf";
|
||||
|
||||
|
||||
char D_800F3CF0[] = "0";
|
||||
float D_800F3CF4 = 0x00000000; // .word
|
||||
double D_800F3CF8 = 100000000.0;
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@ void gfx_func_80040D00(void) {
|
|||
gDPSetCombineMode(gDisplayListHead++, G_CC_SHADE, G_CC_SHADE);
|
||||
gDPSetRenderMode(gDisplayListHead++, G_RM_AA_ZB_OPA_SURF, G_RM_AA_ZB_OPA_SURF2);
|
||||
gSPClearGeometryMode(gDisplayListHead++, G_LIGHTING);
|
||||
guFrustum((Mtx *) gGfxPool, 0.0f, 320.0f, 0.0f, 240.0f, -1.0f, 1.0f, 1.0f);
|
||||
guOrtho((Mtx *) gGfxPool, 0.0f, 320.0f, 0.0f, 240.0f, -1.0f, 1.0f, 1.0f);
|
||||
gDPHalf1(gDisplayListHead++, 0x0000FFFF);
|
||||
gSPMatrix(gDisplayListHead++, (u32) gGfxPool & 0x1FFFFFFF, G_MTX_NOPUSH | G_MTX_LOAD | G_MTX_PROJECTION);
|
||||
gSPMatrix(gDisplayListHead++, (u32) &D_0D008E98 & 0x1FFFFFFF, G_MTX_NOPUSH | G_MTX_LOAD | G_MTX_MODELVIEW);
|
||||
|
|
|
|||
12
src/main.c
12
src/main.c
|
|
@ -30,11 +30,9 @@ extern s32 D_800DC52C;
|
|||
extern OSThread D_801524C0;
|
||||
extern OSThread D_80154670;
|
||||
extern OSViMode D_800EA6C0, D_800EAF80;
|
||||
extern s32 D_80000300;
|
||||
extern s16 D_8015011C;
|
||||
extern OSMesgQueue D_8015F460;
|
||||
extern OSMesg D_8015F3E0;
|
||||
extern s32 D_8000030C;
|
||||
extern s32 D_80156820;
|
||||
extern struct SPTask *gActiveSPTask;
|
||||
extern s16 sNumVBlanks;
|
||||
|
|
@ -119,7 +117,7 @@ void main_func(void) {
|
|||
|
||||
void thread1_idle(void *arg0) {
|
||||
osCreateViManager(OS_PRIORITY_VIMGR);
|
||||
if (D_80000300 == 1) {
|
||||
if (osTvType == 1) {
|
||||
osViSetMode(&D_800EA6C0);
|
||||
} else {
|
||||
osViSetMode(&D_800EAF80);
|
||||
|
|
@ -127,7 +125,7 @@ void thread1_idle(void *arg0) {
|
|||
osViBlack(TRUE);
|
||||
osViSetSpecialFeatures(OS_VI_GAMMA_OFF);
|
||||
osCreatePiManager(OS_PRIORITY_PIMGR, &D_8015F460, &D_8015F3E0, 0x20);
|
||||
D_8015011C = (s16) D_8000030C;
|
||||
D_8015011C = (s16) osResetType;
|
||||
create_debug_thread();
|
||||
start_debug_thread();
|
||||
create_thread(&D_80154670, 3, &thread3_video, arg0, &D_80156820, 100);
|
||||
|
|
@ -399,7 +397,7 @@ void func_8000105C(void) {
|
|||
bzero(SEG_80280000, 0xDF00);
|
||||
osWritebackDCacheAll();
|
||||
dma_copy(SEG_80280000, &_code_80280000SegmentRomStart, ALIGN16((u32)&_code_80280000SegmentRomEnd - (u32)&_code_80280000SegmentRomStart));
|
||||
osInvalCache(SEG_80280000, 0xDF00);
|
||||
osInvalICache(SEG_80280000, 0xDF00);
|
||||
osInvalDCache(SEG_80280000, 0xDF00);
|
||||
}
|
||||
|
||||
|
|
@ -407,7 +405,7 @@ void func_800010CC(void) {
|
|||
bzero(SEG_8028DF00, 0x2C470);
|
||||
osWritebackDCacheAll();
|
||||
dma_copy(SEG_8028DF00, &_code_8028DF00SegmentRomStart, ALIGN16((u32)&_code_8028DF00SegmentRomEnd - (u32)&_code_8028DF00SegmentRomStart));
|
||||
osInvalCache(SEG_8028DF00, 0x2C470);
|
||||
osInvalICache(SEG_8028DF00, 0x2C470);
|
||||
osInvalDCache(SEG_8028DF00, 0x2C470);
|
||||
}
|
||||
|
||||
|
|
@ -1004,7 +1002,7 @@ void *func_800022DC(void) {
|
|||
gActiveSPTask = NULL;
|
||||
if (temp_a3->unk48 == 2) {
|
||||
sp1C = temp_a3;
|
||||
if (func_800CDD60(temp_a3, temp_a3) == 0) {
|
||||
if (osSpTaskYielded(temp_a3, temp_a3) == 0) {
|
||||
temp_a3->unk48 = 3;
|
||||
profiler_log_gfx_time(1, temp_a3);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,5 @@
|
|||
typedef union {
|
||||
int i;
|
||||
float f;
|
||||
} fu;
|
||||
const fu NAN = { 0x7f810000 };
|
||||
|
|
@ -0,0 +1,288 @@
|
|||
#include "libultra_internal.h"
|
||||
#include <macros.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include "printf.h"
|
||||
|
||||
#define BUFF_LEN 0x20
|
||||
|
||||
static s16 _Ldunscale(s16 *, printf_struct *);
|
||||
static void _Genld(printf_struct *, u8, u8 *, s16, s16);
|
||||
|
||||
const int NAN[] = {0x7f810000, 0x00000000, 0x00000000, 0x00000000 }; // NaN?
|
||||
const double D_80338670[] = { 10e0L, 10e1L, 10e3L, 10e7L, 10e15L, 10e31L, 10e63L, 10e127L, 10e255L };
|
||||
|
||||
/* float properties */
|
||||
#define _D0 0
|
||||
#define _DBIAS 0x3ff
|
||||
#define _DLONG 1
|
||||
#define _DOFF 4
|
||||
#define _FBIAS 0x7e
|
||||
#define _FOFF 7
|
||||
#define _FRND 1
|
||||
#define _LBIAS 0x3ffe
|
||||
#define _LOFF 15
|
||||
/* integer properties */
|
||||
#define _C2 1
|
||||
#define _CSIGN 1
|
||||
#define _ILONG 0
|
||||
#define _MBMAX 8
|
||||
#define NAN 2
|
||||
#define INF 1
|
||||
#define FINITE -1
|
||||
#define _DFRAC ((1 << _DOFF) - 1)
|
||||
#define _DMASK (0x7fff & ~_DFRAC)
|
||||
#define _DMAX ((1 << (15 - _DOFF)) - 1)
|
||||
#define _DNAN (0x8000 | _DMAX << _DOFF | 1 << (_DOFF - 1))
|
||||
#define _DSIGN 0x8000
|
||||
#if _D0 == 3
|
||||
#define _D1 2 /* little-endian order */
|
||||
#define _D2 1
|
||||
#define _D3 0
|
||||
#else
|
||||
#define _D1 1 /* big-endian order */
|
||||
#define _D2 2
|
||||
#define _D3 3
|
||||
#endif
|
||||
|
||||
void _Ldtob(printf_struct *args, u8 type) {
|
||||
u8 buff[BUFF_LEN];
|
||||
u8 *ptr;
|
||||
UNUSED u32 sp70;
|
||||
f64 val;
|
||||
/* maybe struct? */
|
||||
s16 err;
|
||||
s16 nsig;
|
||||
s16 exp;
|
||||
|
||||
s32 i;
|
||||
s32 n;
|
||||
f64 factor;
|
||||
s32 gen;
|
||||
s32 j;
|
||||
s32 lo;
|
||||
ldiv_t qr;
|
||||
u8 drop;
|
||||
s32 n2;
|
||||
/* */
|
||||
UNUSED u8 unused[0x4];
|
||||
ptr = buff;
|
||||
val = args->value.f64;
|
||||
if (args->precision < 0) {
|
||||
args->precision = 6;
|
||||
} else {
|
||||
if (args->precision == 0 && (type == 'g' || type == 'G')) {
|
||||
args->precision = 1;
|
||||
}
|
||||
}
|
||||
err = _Ldunscale(&exp, args);
|
||||
if (err > 0) {
|
||||
memcpy(args->buff, err == 2 ? "NaN" : "Inf", args->part2_len = 3);
|
||||
return;
|
||||
}
|
||||
if (err == 0) {
|
||||
nsig = 0;
|
||||
exp = 0;
|
||||
} else {
|
||||
if (val < 0) {
|
||||
val = -val;
|
||||
}
|
||||
exp = exp * 30103 / 0x000186A0 - 4;
|
||||
if (exp < 0) {
|
||||
n = (3 - exp) & ~3;
|
||||
exp = -n;
|
||||
for (i = 0; n > 0; n >>= 1, i++) {
|
||||
if ((n & 1) != 0) {
|
||||
val *= D_80338670[i];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
if (exp > 0) {
|
||||
factor = 1;
|
||||
exp &= ~3;
|
||||
for (n = exp, i = 0; n > 0; n >>= 1, i++) {
|
||||
if ((n & 1) != 0) {
|
||||
factor *= D_80338670[i];
|
||||
}
|
||||
}
|
||||
val /= factor;
|
||||
}
|
||||
}
|
||||
gen = ((type == 'f') ? exp + 10 : 6) + args->precision;
|
||||
if (gen > 0x13) {
|
||||
gen = 0x13;
|
||||
}
|
||||
*ptr++ = '0';
|
||||
while (gen > 0 && 0 < val) {
|
||||
lo = val;
|
||||
if ((gen -= 8) > 0) {
|
||||
val = (val - lo) * 1.0e8;
|
||||
}
|
||||
ptr = ptr + 8;
|
||||
for (j = 8; lo > 0 && --j >= 0;) {
|
||||
qr = ldiv(lo, 10);
|
||||
*--ptr = qr.rem + '0';
|
||||
lo = qr.quot;
|
||||
}
|
||||
while (--j >= 0) {
|
||||
ptr--;
|
||||
*ptr = '0';
|
||||
}
|
||||
ptr += 8;
|
||||
}
|
||||
|
||||
gen = ptr - &buff[1];
|
||||
for (ptr = &buff[1], exp += 7; *ptr == '0'; ptr++) {
|
||||
--gen, --exp;
|
||||
}
|
||||
|
||||
nsig = ((type == 'f') ? exp + 1 : ((type == 'e' || type == 'E') ? 1 : 0)) + args->precision;
|
||||
if (gen < nsig) {
|
||||
nsig = gen;
|
||||
}
|
||||
if (nsig > 0) {
|
||||
if (nsig < gen && ptr[nsig] > '4') {
|
||||
drop = '9';
|
||||
} else {
|
||||
drop = '0';
|
||||
}
|
||||
|
||||
for (n2 = nsig; ptr[--n2] == drop;) {
|
||||
nsig--;
|
||||
}
|
||||
if (drop == '9') {
|
||||
ptr[n2]++;
|
||||
}
|
||||
if (n2 < 0) {
|
||||
--ptr, ++nsig, ++exp;
|
||||
}
|
||||
}
|
||||
}
|
||||
_Genld(args, type, ptr, nsig, exp);
|
||||
}
|
||||
|
||||
static s16 _Ldunscale(s16 *pex, printf_struct *px) {
|
||||
|
||||
unsigned short *ps = (unsigned short *) px;
|
||||
short xchar = (ps[_D0] & _DMASK) >> _DOFF;
|
||||
if (xchar == _DMAX) { /* NaN or INF */
|
||||
*pex = 0;
|
||||
return (s16)(ps[_D0] & _DFRAC || ps[_D1] || ps[_D2] || ps[_D3] ? NAN : INF);
|
||||
} else if (0 < xchar) {
|
||||
ps[_D0] = (ps[_D0] & ~_DMASK) | (_DBIAS << _DOFF);
|
||||
*pex = xchar - (_DBIAS - 1);
|
||||
return (FINITE);
|
||||
}
|
||||
if (0 > xchar) {
|
||||
return NAN;
|
||||
} else {
|
||||
*pex = 0;
|
||||
return (0);
|
||||
}
|
||||
}
|
||||
|
||||
static void _Genld(printf_struct *px, u8 code, u8 *p, s16 nsig, s16 xexp) {
|
||||
u8 point = '.';
|
||||
if (nsig <= 0) {
|
||||
nsig = 1,
|
||||
|
||||
p = (u8 *) "0";
|
||||
}
|
||||
|
||||
if (code == 'f'
|
||||
|| ((code == 'g' || code == 'G') && (-4 <= xexp) && (xexp < px->precision))) { /* 'f' format */
|
||||
++xexp; /* change to leading digit count */
|
||||
if (code != 'f') { /* fixup for 'g' */
|
||||
if (!(px->flags & FLAGS_HASH) && nsig < px->precision) {
|
||||
px->precision = nsig;
|
||||
}
|
||||
if ((px->precision -= xexp) < 0) {
|
||||
px->precision = 0;
|
||||
}
|
||||
}
|
||||
if (xexp <= 0) { /* digits only to right of point */
|
||||
px->buff[px->part2_len++] = '0';
|
||||
if (0 < px->precision || px->flags & FLAGS_HASH) {
|
||||
px->buff[px->part2_len++] = point;
|
||||
}
|
||||
if (px->precision < -xexp) {
|
||||
xexp = -px->precision;
|
||||
}
|
||||
px->num_mid_zeros = -xexp;
|
||||
px->precision += xexp;
|
||||
if (px->precision < nsig) {
|
||||
nsig = px->precision;
|
||||
}
|
||||
memcpy(&px->buff[px->part2_len], p, px->part3_len = nsig);
|
||||
px->num_trailing_zeros = px->precision - nsig;
|
||||
} else if (nsig < xexp) { /* zeros before point */
|
||||
memcpy(&px->buff[px->part2_len], p, nsig);
|
||||
px->part2_len += nsig;
|
||||
px->num_mid_zeros = xexp - nsig;
|
||||
if (0 < px->precision || px->flags & FLAGS_HASH) {
|
||||
px->buff[px->part2_len] = point, ++px->part3_len;
|
||||
}
|
||||
px->num_trailing_zeros = px->precision;
|
||||
} else { /* enough digits before point */
|
||||
memcpy(&px->buff[px->part2_len], p, xexp);
|
||||
px->part2_len += xexp;
|
||||
nsig -= xexp;
|
||||
if (0 < px->precision || px->flags & FLAGS_HASH) {
|
||||
px->buff[px->part2_len++] = point;
|
||||
}
|
||||
if (px->precision < nsig) {
|
||||
nsig = px->precision;
|
||||
}
|
||||
memcpy(&px->buff[px->part2_len], p + xexp, nsig);
|
||||
px->part2_len += nsig;
|
||||
px->num_mid_zeros = px->precision - nsig;
|
||||
}
|
||||
} else { /* 'e' format */
|
||||
if (code == 'g' || code == 'G') { /* fixup for 'g' */
|
||||
if (nsig < px->precision) {
|
||||
px->precision = nsig;
|
||||
}
|
||||
if (--px->precision < 0) {
|
||||
px->precision = 0;
|
||||
}
|
||||
code = code == 'g' ? 'e' : 'E';
|
||||
}
|
||||
px->buff[px->part2_len++] = *p++;
|
||||
if (0 < px->precision || px->flags & FLAGS_HASH) {
|
||||
px->buff[px->part2_len++] = point;
|
||||
}
|
||||
if (0 < px->precision) { /* put fraction digits */
|
||||
if (px->precision < --nsig) {
|
||||
nsig = px->precision;
|
||||
}
|
||||
memcpy(&px->buff[px->part2_len], p, nsig);
|
||||
px->part2_len += nsig;
|
||||
px->num_mid_zeros = px->precision - nsig;
|
||||
}
|
||||
p = (u8 *) &px->buff[px->part2_len]; /* put exponent */
|
||||
*p++ = code;
|
||||
if (0 <= xexp) {
|
||||
*p++ = '+';
|
||||
} else { /* negative exponent */
|
||||
*p++ = '-';
|
||||
xexp = -xexp;
|
||||
}
|
||||
if (100 <= xexp) { /* put oversize exponent */
|
||||
if (1000 <= xexp) {
|
||||
*p++ = xexp / 1000 + '0', xexp %= 1000;
|
||||
}
|
||||
*p++ = xexp / 100 + '0', xexp %= 100;
|
||||
}
|
||||
*p++ = xexp / 10 + '0', xexp %= 10;
|
||||
*p++ = xexp + '0';
|
||||
px->part3_len = p - (u8 *) &px->buff[px->part2_len];
|
||||
}
|
||||
if ((px->flags & (FLAGS_ZERO | FLAGS_MINUS)) == FLAGS_ZERO) { /* pad with leading zeros */
|
||||
int n =
|
||||
px->part1_len + px->part2_len + px->num_mid_zeros + px->part3_len + px->num_trailing_zeros;
|
||||
|
||||
if (n < px->width) {
|
||||
px->num_leading_zeros = px->width - n;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
#include "libultra_internal.h"
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include "printf.h"
|
||||
|
||||
#define BUFF_LEN 0x18
|
||||
|
||||
static u8 D_80334960[] = "0123456789abcdef";
|
||||
static u8 D_80334974[] = "0123456789ABCDEF";
|
||||
|
||||
void _Litob(printf_struct *args, u8 type) {
|
||||
u8 buff[BUFF_LEN];
|
||||
const u8 *num_map;
|
||||
s32 base;
|
||||
s32 buff_ind;
|
||||
u64 num;
|
||||
lldiv_t quotrem;
|
||||
|
||||
if (type == 'X') {
|
||||
num_map = D_80334974;
|
||||
} else {
|
||||
num_map = D_80334960;
|
||||
}
|
||||
|
||||
base = (type == 'o') ? 8 : ((type != 'x' && type != 'X') ? 10 : 16);
|
||||
buff_ind = BUFF_LEN;
|
||||
num = args->value.s64;
|
||||
|
||||
if ((type == 'd' || type == 'i') && args->value.s64 < 0) {
|
||||
num = -num;
|
||||
}
|
||||
|
||||
if (num != 0 || args->precision != 0) {
|
||||
buff[--buff_ind] = num_map[num % base];
|
||||
}
|
||||
|
||||
args->value.s64 = num / base;
|
||||
|
||||
while (args->value.s64 > 0 && buff_ind > 0) {
|
||||
quotrem = lldiv(args->value.s64, base);
|
||||
args->value.s64 = quotrem.quot;
|
||||
buff[--buff_ind] = num_map[quotrem.rem];
|
||||
}
|
||||
|
||||
args->part2_len = BUFF_LEN - buff_ind;
|
||||
|
||||
memcpy(args->buff, buff + buff_ind, args->part2_len);
|
||||
|
||||
if (args->part2_len < args->precision) {
|
||||
args->num_leading_zeros = args->precision - args->part2_len;
|
||||
}
|
||||
|
||||
if (args->precision < 0 && (args->flags & (FLAGS_ZERO | FLAGS_MINUS)) == FLAGS_ZERO) {
|
||||
buff_ind = args->width - args->part1_len - args->num_leading_zeros - args->part2_len;
|
||||
if (buff_ind > 0) {
|
||||
args->num_leading_zeros += buff_ind;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,236 @@
|
|||
#include "libultra_internal.h"
|
||||
#include <stdarg.h>
|
||||
#include <string.h>
|
||||
#include "printf.h"
|
||||
|
||||
#define ATOI(i, a) \
|
||||
for (i = 0; *a >= '0' && *a <= '9'; a++) \
|
||||
if (i < 999) \
|
||||
i = *a + i * 10 - '0';
|
||||
#define _PROUT(dst, fmt, _size) \
|
||||
if (_size > 0) { \
|
||||
dst = prout(dst, fmt, _size); \
|
||||
if (dst != 0) \
|
||||
sp78.size += _size; \
|
||||
else \
|
||||
return sp78.size; \
|
||||
}
|
||||
#define _PAD(i, m, c, src, extracond) \
|
||||
if (extracond && m > 0) \
|
||||
for (i = m; i > 0; i -= c) { \
|
||||
if ((u32) i > 32) \
|
||||
c = 32; \
|
||||
else \
|
||||
c = i; \
|
||||
_PROUT(dst, src, c); \
|
||||
}
|
||||
|
||||
const char length_str[] = "hlL";
|
||||
const char flags_str[] = " +-#0";
|
||||
const u32 flags_arr[] = { FLAGS_SPACE, FLAGS_PLUS, FLAGS_MINUS, FLAGS_HASH, FLAGS_ZERO, 0 };
|
||||
char _spaces[] = " ";
|
||||
char _zeroes[] = "00000000000000000000000000000000";
|
||||
|
||||
static void _Putfld(printf_struct *, va_list *, u8, u8 *);
|
||||
|
||||
s32 _Printf(char *(*prout)(char *, const char *, size_t), char *dst, const char *fmt, va_list args) {
|
||||
printf_struct sp78;
|
||||
const u8 *fmt_ptr;
|
||||
u8 c;
|
||||
const char *flag_index;
|
||||
u8 sp4c[0x20]; // probably a buffer?
|
||||
s32 sp48, sp44, sp40, sp3c, sp38, sp34, sp30, sp2c, sp28, sp24;
|
||||
sp78.size = 0;
|
||||
while (TRUE) {
|
||||
fmt_ptr = (u8 *) fmt;
|
||||
#ifdef VERSION_SH
|
||||
// new version: don't point fmt_ptr beyond NUL character
|
||||
while ((c = *fmt_ptr) != 0 && c != '%') {
|
||||
fmt_ptr++;
|
||||
}
|
||||
#else
|
||||
while ((c = *fmt_ptr++) > 0) {
|
||||
if (c == '%') {
|
||||
fmt_ptr--;
|
||||
break;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
_PROUT(dst, fmt, fmt_ptr - (u8 *) fmt);
|
||||
if (c == 0) {
|
||||
return sp78.size;
|
||||
}
|
||||
fmt = (char *) ++fmt_ptr;
|
||||
sp78.flags = 0;
|
||||
for (; (flag_index = strchr(flags_str, *fmt_ptr)) != NULL; fmt_ptr++) {
|
||||
sp78.flags |= flags_arr[flag_index - flags_str];
|
||||
}
|
||||
if (*fmt_ptr == '*') {
|
||||
sp78.width = va_arg(args, s32);
|
||||
if (sp78.width < 0) {
|
||||
sp78.width = -sp78.width;
|
||||
sp78.flags |= FLAGS_MINUS;
|
||||
}
|
||||
fmt_ptr++;
|
||||
} else {
|
||||
ATOI(sp78.width, fmt_ptr);
|
||||
}
|
||||
if (*fmt_ptr != '.') {
|
||||
sp78.precision = -1;
|
||||
} else {
|
||||
fmt_ptr++;
|
||||
if (*fmt_ptr == '*') {
|
||||
sp78.precision = va_arg(args, s32);
|
||||
fmt_ptr++;
|
||||
} else {
|
||||
ATOI(sp78.precision, fmt_ptr);
|
||||
}
|
||||
}
|
||||
if (strchr(length_str, *fmt_ptr) != NULL) {
|
||||
sp78.length = *fmt_ptr++;
|
||||
} else {
|
||||
sp78.length = 0;
|
||||
}
|
||||
|
||||
if (sp78.length == 'l' && *fmt_ptr == 'l') {
|
||||
sp78.length = 'L';
|
||||
fmt_ptr++;
|
||||
}
|
||||
_Putfld(&sp78, &args, *fmt_ptr, sp4c);
|
||||
sp78.width -= sp78.part1_len + sp78.num_leading_zeros + sp78.part2_len + sp78.num_mid_zeros
|
||||
+ sp78.part3_len + sp78.num_trailing_zeros;
|
||||
_PAD(sp44, sp78.width, sp48, _spaces, !(sp78.flags & FLAGS_MINUS));
|
||||
_PROUT(dst, (char *) sp4c, sp78.part1_len);
|
||||
_PAD(sp3c, sp78.num_leading_zeros, sp40, _zeroes, 1);
|
||||
_PROUT(dst, sp78.buff, sp78.part2_len);
|
||||
_PAD(sp34, sp78.num_mid_zeros, sp38, _zeroes, 1);
|
||||
_PROUT(dst, (char *) (&sp78.buff[sp78.part2_len]), sp78.part3_len)
|
||||
_PAD(sp2c, sp78.num_trailing_zeros, sp30, _zeroes, 1);
|
||||
_PAD(sp24, sp78.width, sp28, _spaces, sp78.flags & FLAGS_MINUS);
|
||||
fmt = (char *) fmt_ptr + 1;
|
||||
}
|
||||
}
|
||||
|
||||
static void _Putfld(printf_struct *a0, va_list *args, u8 type, u8 *buff) {
|
||||
a0->part1_len = a0->num_leading_zeros = a0->part2_len = a0->num_mid_zeros = a0->part3_len =
|
||||
a0->num_trailing_zeros = 0;
|
||||
|
||||
switch (type) {
|
||||
|
||||
case 'c':
|
||||
buff[a0->part1_len++] = va_arg(*args, u32);
|
||||
break;
|
||||
|
||||
case 'd':
|
||||
case 'i':
|
||||
if (a0->length == 'l') {
|
||||
a0->value.s64 = va_arg(*args, s32);
|
||||
} else if (a0->length == 'L') {
|
||||
a0->value.s64 = va_arg(*args, s64);
|
||||
} else {
|
||||
a0->value.s64 = va_arg(*args, s32);
|
||||
}
|
||||
|
||||
if (a0->length == 'h') {
|
||||
a0->value.s64 = (s16) a0->value.s64;
|
||||
}
|
||||
|
||||
if (a0->value.s64 < 0) {
|
||||
buff[a0->part1_len++] = '-';
|
||||
} else if (a0->flags & FLAGS_PLUS) {
|
||||
buff[a0->part1_len++] = '+';
|
||||
} else if (a0->flags & FLAGS_SPACE) {
|
||||
buff[a0->part1_len++] = ' ';
|
||||
}
|
||||
|
||||
a0->buff = (char *) &buff[a0->part1_len];
|
||||
|
||||
_Litob(a0, type);
|
||||
break;
|
||||
|
||||
case 'x':
|
||||
case 'X':
|
||||
case 'u':
|
||||
case 'o':
|
||||
if (a0->length == 'l') {
|
||||
a0->value.s64 = va_arg(*args, s32);
|
||||
} else if (a0->length == 'L') {
|
||||
a0->value.s64 = va_arg(*args, s64);
|
||||
} else {
|
||||
a0->value.s64 = va_arg(*args, s32);
|
||||
}
|
||||
|
||||
if (a0->length == 'h') {
|
||||
a0->value.s64 = (u16) a0->value.s64;
|
||||
} else if (a0->length == 0) {
|
||||
a0->value.s64 = (u32) a0->value.s64;
|
||||
}
|
||||
|
||||
if (a0->flags & FLAGS_HASH) {
|
||||
buff[a0->part1_len++] = '0';
|
||||
if (type == 'x' || type == 'X') {
|
||||
|
||||
buff[a0->part1_len++] = type;
|
||||
}
|
||||
}
|
||||
a0->buff = (char *) &buff[a0->part1_len];
|
||||
_Litob(a0, type);
|
||||
break;
|
||||
|
||||
case 'e':
|
||||
case 'f':
|
||||
case 'g':
|
||||
case 'E':
|
||||
case 'G':
|
||||
//... okay?
|
||||
a0->value.f64 = a0->length == 'L' ? va_arg(*args, f64) : va_arg(*args, f64);
|
||||
|
||||
if (a0->value.u16 & 0x8000) {
|
||||
buff[a0->part1_len++] = '-';
|
||||
} else {
|
||||
if (a0->flags & FLAGS_PLUS) {
|
||||
buff[a0->part1_len++] = '+';
|
||||
} else if (a0->flags & FLAGS_SPACE) {
|
||||
buff[a0->part1_len++] = ' ';
|
||||
}
|
||||
}
|
||||
|
||||
a0->buff = (char *) &buff[a0->part1_len];
|
||||
_Ldtob(a0, type);
|
||||
break;
|
||||
|
||||
case 'n':
|
||||
if (a0->length == 'h') {
|
||||
*(va_arg(*args, u16 *)) = a0->size;
|
||||
} else if (a0->length == 'l') {
|
||||
*va_arg(*args, u32 *) = a0->size;
|
||||
} else if (a0->length == 'L') {
|
||||
*va_arg(*args, u64 *) = a0->size;
|
||||
} else {
|
||||
*va_arg(*args, u32 *) = a0->size;
|
||||
}
|
||||
break;
|
||||
|
||||
case 'p':
|
||||
a0->value.s64 = (intptr_t) va_arg(*args, void *);
|
||||
a0->buff = (char *) &buff[a0->part1_len];
|
||||
_Litob(a0, 'x');
|
||||
break;
|
||||
|
||||
case 's':
|
||||
a0->buff = va_arg(*args, char *);
|
||||
a0->part2_len = strlen(a0->buff);
|
||||
if (a0->precision >= 0 && a0->part2_len > a0->precision) {
|
||||
a0->part2_len = a0->precision;
|
||||
}
|
||||
break;
|
||||
|
||||
case '%':
|
||||
buff[a0->part1_len++] = '%';
|
||||
break;
|
||||
|
||||
default:
|
||||
buff[a0->part1_len++] = type;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,11 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "hardware.h"
|
||||
|
||||
s32 __osAiDeviceBusy(void) {
|
||||
register s32 status = HW_REG(AI_STATUS_REG, u32);
|
||||
if ((status & AI_STATUS_AI_FULL) != 0) {
|
||||
return 1;
|
||||
} else {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
#include "libultra_internal.h"
|
||||
|
||||
s32 __osAtomicDec(u32 *a0) {
|
||||
s32 sp1c;
|
||||
s32 sp18;
|
||||
sp1c = __osDisableInt();
|
||||
|
||||
if (*a0 != 0) {
|
||||
(*a0)--;
|
||||
sp18 = 1;
|
||||
} else {
|
||||
sp18 = 0;
|
||||
}
|
||||
|
||||
__osRestoreInt(sp1c);
|
||||
return sp18;
|
||||
}
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
#include "libultra_internal.h"
|
||||
|
||||
// these don't feel like they belong here
|
||||
// but it makes the most logical since there was printf data before
|
||||
// OSThread *D_800EB3A0 = NULL;
|
||||
// u32 D_80334894 = -1;
|
||||
// OSThread *__osRunQueue = (OSThread *) &D_800EB3A0;
|
||||
// OSThread *__osActiveQueue = (OSThread *) &D_800EB3A0;
|
||||
// OSThread *__osRunningThread = NULL;
|
||||
// u32 D_803348A4 = 0; // UNKNOWN
|
||||
|
||||
void __osDequeueThread(OSThread **queue, OSThread *thread) {
|
||||
register OSThread **a2;
|
||||
register OSThread *a3;
|
||||
a2 = queue;
|
||||
a3 = *a2;
|
||||
while (a3 != NULL) {
|
||||
if (a3 == thread) {
|
||||
*a2 = thread->next;
|
||||
return;
|
||||
}
|
||||
a2 = &a3->next;
|
||||
a3 = *a2;
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,93 @@
|
|||
#define MK64
|
||||
|
||||
#include "libultra_internal.h"
|
||||
#include "macros.h"
|
||||
|
||||
#include "new_func.h"
|
||||
|
||||
void __osDevMgrMain(void *args) {
|
||||
OSIoMesg *mb;
|
||||
OSMesg em;
|
||||
OSMesg dummy;
|
||||
s32 ret;
|
||||
OSMgrArgs *sp34;
|
||||
UNUSED u32 sp30;
|
||||
u32 sp2c;
|
||||
__OSBlockInfo *sp28;
|
||||
__OSTranxInfo *sp24;
|
||||
sp30 = 0;
|
||||
sp2c = 0;
|
||||
mb = NULL;
|
||||
ret = 0;
|
||||
sp34 = (OSMgrArgs *) args;
|
||||
while (TRUE) {
|
||||
osRecvMesg(sp34->cmdQueue, (OSMesg) &mb, OS_MESG_BLOCK);
|
||||
if (mb->piHandle != NULL && mb->piHandle->type == 2
|
||||
&& (mb->piHandle->transferInfo.cmdType == 0
|
||||
|| mb->piHandle->transferInfo.cmdType == 1)) {
|
||||
sp24 = &mb->piHandle->transferInfo;
|
||||
sp28 = &sp24->block[sp24->blockNum];
|
||||
sp24->sectorNum = -1;
|
||||
if (sp24->transferMode != 3) {
|
||||
sp28->dramAddr = (void *) ((u32) sp28->dramAddr - sp28->sectorSize);
|
||||
}
|
||||
if (sp24->transferMode == 2 && mb->piHandle->transferInfo.cmdType == 0) {
|
||||
sp2c = 1;
|
||||
} else {
|
||||
sp2c = 0;
|
||||
}
|
||||
osRecvMesg(sp34->accessQueue, &dummy, OS_MESG_BLOCK);
|
||||
__osResetGlobalIntMask(0x00100401); // remove magic constant!
|
||||
__osEPiRawWriteIo(mb->piHandle, 0x05000510, (sp24->bmCtlShadow | 0x80000000));
|
||||
while (TRUE) {
|
||||
osRecvMesg(sp34->eventQueue, &em, OS_MESG_BLOCK);
|
||||
sp30 = osSendMesg(mb->hdr.retQueue, mb, OS_MESG_NOBLOCK);
|
||||
if (sp2c != 1 || mb->piHandle->transferInfo.errStatus != 0) {
|
||||
break;
|
||||
}
|
||||
sp2c = 0;
|
||||
}
|
||||
osSendMesg(sp34->accessQueue, NULL, OS_MESG_NOBLOCK);
|
||||
if (mb->piHandle->transferInfo.blockNum == 1) {
|
||||
osYieldThread();
|
||||
}
|
||||
} else {
|
||||
switch (mb->hdr.type) {
|
||||
case 11:
|
||||
osRecvMesg(sp34->accessQueue, &dummy, OS_MESG_BLOCK);
|
||||
ret = sp34->dma_func(OS_READ, mb->devAddr, mb->dramAddr, mb->size);
|
||||
break;
|
||||
case 12:
|
||||
osRecvMesg(sp34->accessQueue, &dummy, OS_MESG_BLOCK);
|
||||
ret = sp34->dma_func(OS_WRITE, mb->devAddr, mb->dramAddr, mb->size);
|
||||
break;
|
||||
case 15:
|
||||
osRecvMesg(sp34->accessQueue, &dummy, OS_MESG_BLOCK);
|
||||
ret = sp34->edma_func(mb->piHandle, OS_READ, mb->devAddr, mb->dramAddr,
|
||||
mb->size);
|
||||
break;
|
||||
case 16:
|
||||
osRecvMesg(sp34->accessQueue, &dummy, OS_MESG_BLOCK);
|
||||
ret = sp34->edma_func(mb->piHandle, OS_WRITE, mb->devAddr, mb->dramAddr,
|
||||
mb->size);
|
||||
break;
|
||||
case 10:
|
||||
osSendMesg(mb->hdr.retQueue, mb, OS_MESG_NOBLOCK);
|
||||
ret = -1;
|
||||
break;
|
||||
break;
|
||||
default:
|
||||
ret = -1;
|
||||
break;
|
||||
}
|
||||
if (ret == 0) {
|
||||
osRecvMesg(sp34->eventQueue, &em, OS_MESG_BLOCK);
|
||||
sp30 =
|
||||
osSendMesg(mb->hdr.retQueue, mb, OS_MESG_NOBLOCK);
|
||||
osSendMesg(sp34->accessQueue, NULL, OS_MESG_NOBLOCK);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#undef MK64
|
||||
|
|
@ -0,0 +1,11 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "hardware.h"
|
||||
|
||||
s32 __osEPiRawReadIo(OSPiHandle *arg0, u32 devAddr, u32 *data) {
|
||||
register s32 stat;
|
||||
while (stat = HW_REG(PI_STATUS_REG, s32), stat & (PI_STATUS_BUSY | PI_STATUS_IOBUSY | PI_STATUS_ERROR)) {
|
||||
;
|
||||
}
|
||||
*data = HW_REG(arg0->baseAddress | devAddr, s32);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,35 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "hardware.h"
|
||||
|
||||
s32 __osEPiRawWriteIo(OSPiHandle *a0, u32 a1, u32 a2) {
|
||||
register u32 a3 = HW_REG(PI_STATUS_REG, u32);
|
||||
while (a3 & PI_STATUS_ERROR)
|
||||
a3 = HW_REG(PI_STATUS_REG, u32);
|
||||
HW_REG(a0->baseAddress | a1, u32) = a2;
|
||||
return 0;
|
||||
}
|
||||
/*
|
||||
/ 0B69A0 802F71A0 3C0EA460 / lui $t6, %hi(PI_STATUS_REG) # $t6, 0xa460
|
||||
/ 0B69A4 802F71A4 8DC70010 / lw $a3, %lo(PI_STATUS_REG)($t6)
|
||||
/ 0B69A8 802F71A8 27BDFFF8 / addiu $sp, $sp, -8
|
||||
/ 0B69AC 802F71AC 30EF0003 / andi $t7, $a3, 3
|
||||
|
||||
/ 0B69B0 802F71B0 11E00006 / beqz $t7, .L802F71CC
|
||||
/ 0B69B4 802F71B4 00000000 / nop
|
||||
.L802F71B8:
|
||||
/ 0B69B8 802F71B8 3C18A460 / lui $t8, %hi(PI_STATUS_REG) # $t8, 0xa460
|
||||
/ 0B69BC 802F71BC 8F070010 / lw $a3, %lo(PI_STATUS_REG)($t8)
|
||||
/ 0B69C0 802F71C0 30F90003 / andi $t9, $a3, 3
|
||||
/ 0B69C4 802F71C4 1720FFFC / bnez $t9, .L802F71B8
|
||||
/ 0B69C8 802F71C8 00000000 / nop
|
||||
.L802F71CC:
|
||||
/ 0B69CC 802F71CC 8C88000C / lw $t0, 0xc($a0)
|
||||
/ 0B69D0 802F71D0 3C01A000 / lui $at, 0xa000
|
||||
/ 0B69D4 802F71D4 27BD0008 / addiu $sp, $sp, 8
|
||||
/ 0B69D8 802F71D8 01054825 / or $t1, $t0, $a1
|
||||
/ 0B69DC 802F71DC 01215025 / or $t2, $t1, $at
|
||||
/ 0B69E0 802F71E0 AD460000 / sw $a2, ($t2)
|
||||
/ 0B69E4 802F71E4 03E00008 / jr $ra
|
||||
/ 0B69E8 802F71E8 00001025 / move $v0, $zero
|
||||
|
||||
/ 0B69EC 802F71EC 00000000 / nop */
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
#include "libultra_internal.h"
|
||||
|
||||
OSThread *__osGetCurrFaultedThread() {
|
||||
return __osActiveQueue; // 80302efc
|
||||
}
|
||||
|
|
@ -0,0 +1,213 @@
|
|||
// not matching
|
||||
|
||||
#include "libultra_internal.h"
|
||||
#include "osint.h"
|
||||
#include "piint.h"
|
||||
#include "ultra64.h"
|
||||
|
||||
extern OSThread *__osRunQueue;
|
||||
static void __osLeoResume(void);
|
||||
static void __osLeoAbnormalResume(void);
|
||||
extern u8 leoDiskStack[OS_PIM_STACKSIZE]; //technically should have a OS_LEO_STACKSIZE or something..
|
||||
|
||||
extern u32 D_800EA5F0;
|
||||
|
||||
s32 __osLeoInterrupt()
|
||||
{
|
||||
u32 stat;
|
||||
volatile u32 pi_stat;
|
||||
u32 bm_stat;
|
||||
__OSTranxInfo *info;
|
||||
__OSBlockInfo *blockInfo;
|
||||
|
||||
// addition to mk64
|
||||
if (D_800EA5F0 == 0) return 0;
|
||||
|
||||
stat = 0;
|
||||
info = &__osDiskHandle->transferInfo;
|
||||
blockInfo = &info->block[info->blockNum];
|
||||
pi_stat = IO_READ(PI_STATUS_REG);
|
||||
if (pi_stat & PI_STATUS_DMA_BUSY)
|
||||
{
|
||||
__OSGlobalIntMask = __OSGlobalIntMask & ~SR_IBIT4; //cartridge interrupt
|
||||
blockInfo->errStatus = LEO_ERROR_29;
|
||||
__osLeoResume();
|
||||
return 1;
|
||||
}
|
||||
WAIT_ON_IOBUSY(pi_stat);
|
||||
stat = IO_READ(LEO_STATUS);
|
||||
if (stat & LEO_STATUS_MECHANIC_INTERRUPT)
|
||||
{
|
||||
WAIT_ON_IOBUSY(pi_stat);
|
||||
IO_WRITE(LEO_BM_CTL, info->bmCtlShadow | LEO_BM_CTL_CLR_MECHANIC_INTR);
|
||||
blockInfo->errStatus = LEO_ERROR_GOOD;
|
||||
return 0;
|
||||
}
|
||||
if (info->cmdType == LEO_CMD_TYPE_2)
|
||||
return 1;
|
||||
if (stat & LEO_STATUS_BUFFER_MANAGER_ERROR)
|
||||
{
|
||||
WAIT_ON_IOBUSY(pi_stat);
|
||||
stat = IO_READ(LEO_STATUS);
|
||||
blockInfo->errStatus = LEO_ERROR_22;
|
||||
__osLeoResume();
|
||||
IO_WRITE(PI_STATUS_REG, PI_STATUS_CLR_INTR);
|
||||
__OSGlobalIntMask |= OS_IM_PI;
|
||||
return 1;
|
||||
}
|
||||
if (info->cmdType == LEO_CMD_TYPE_1)
|
||||
{
|
||||
if ((stat & LEO_STATUS_DATA_REQUEST) == 0)
|
||||
{
|
||||
if (info->sectorNum + 1 != info->transferMode * 85)
|
||||
{
|
||||
blockInfo->errStatus = LEO_ERROR_24;
|
||||
__osLeoAbnormalResume();
|
||||
return 1;
|
||||
}
|
||||
IO_WRITE(PI_STATUS_REG, PI_STATUS_CLR_INTR);
|
||||
__OSGlobalIntMask |= OS_IM_PI;
|
||||
blockInfo->errStatus = LEO_ERROR_GOOD;
|
||||
__osLeoResume();
|
||||
return 1;
|
||||
}
|
||||
blockInfo->dramAddr = (void *)((u32)blockInfo->dramAddr + blockInfo->sectorSize);
|
||||
info->sectorNum++;
|
||||
osEPiRawStartDma(__osDiskHandle, OS_WRITE, LEO_SECTOR_BUFF, blockInfo->dramAddr, blockInfo->sectorSize);
|
||||
return 1;
|
||||
}
|
||||
if (info->cmdType == LEO_CMD_TYPE_0)
|
||||
{
|
||||
if (info->transferMode == LEO_SECTOR_MODE)
|
||||
{
|
||||
if ((s32)blockInfo->C1ErrNum + 17 < info->sectorNum)
|
||||
{
|
||||
blockInfo->errStatus = LEO_ERROR_GOOD;
|
||||
__osLeoAbnormalResume();
|
||||
return 1;
|
||||
}
|
||||
if ((stat & LEO_STATUS_DATA_REQUEST) == 0)
|
||||
{
|
||||
blockInfo->errStatus = LEO_ERROR_23;
|
||||
__osLeoAbnormalResume();
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
blockInfo->dramAddr = (void *)((u32)blockInfo->dramAddr + blockInfo->sectorSize);
|
||||
}
|
||||
bm_stat = IO_READ(LEO_BM_STATUS);
|
||||
if ((bm_stat & LEO_BM_STATUS_C1SINGLE && bm_stat & LEO_BM_STATUS_C1DOUBLE) || bm_stat & LEO_BM_STATUS_MICRO)
|
||||
{
|
||||
if (blockInfo->C1ErrNum > 3)
|
||||
{
|
||||
if (info->transferMode != LEO_SECTOR_MODE || info->sectorNum > 0x52)
|
||||
{
|
||||
blockInfo->errStatus = LEO_ERROR_23;
|
||||
__osLeoAbnormalResume();
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
int errNum = blockInfo->C1ErrNum;
|
||||
blockInfo->C1ErrSector[errNum] = info->sectorNum + 1;
|
||||
}
|
||||
blockInfo->C1ErrNum += 1;
|
||||
}
|
||||
if (stat & LEO_STATUS_C2_TRANSFER)
|
||||
{
|
||||
if (info->sectorNum != 87)
|
||||
{
|
||||
blockInfo->errStatus = LEO_ERROR_24;
|
||||
__osLeoAbnormalResume();
|
||||
}
|
||||
if (info->transferMode == LEO_TRACK_MODE && info->blockNum == 0)
|
||||
{
|
||||
info->blockNum = 1;
|
||||
info->sectorNum = -1;
|
||||
info->block[1].dramAddr = (void *)((u32)info->block[1].dramAddr - info->block[1].sectorSize);
|
||||
|
||||
blockInfo->errStatus = LEO_ERROR_22;
|
||||
}
|
||||
else
|
||||
{
|
||||
IO_WRITE(PI_STATUS_REG, PI_STATUS_CLR_INTR);
|
||||
__OSGlobalIntMask |= OS_IM_PI;
|
||||
info->cmdType = LEO_CMD_TYPE_2;
|
||||
blockInfo->errStatus = LEO_ERROR_GOOD;
|
||||
}
|
||||
osEPiRawStartDma(__osDiskHandle, OS_READ, LEO_C2_BUFF, blockInfo->C2Addr, blockInfo->sectorSize * 4);
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (info->sectorNum == -1 && info->transferMode == LEO_TRACK_MODE && info->blockNum == 1)
|
||||
{
|
||||
__OSBlockInfo *bptr = &info->block[0];
|
||||
if (bptr->C1ErrNum == 0)
|
||||
{
|
||||
if (((u32 *)bptr->C2Addr)[0] | ((u32 *)bptr->C2Addr)[1] | ((u32 *)bptr->C2Addr)[2] | ((u32 *)bptr->C2Addr)[3])
|
||||
{
|
||||
bptr->errStatus = LEO_ERROR_24;
|
||||
__osLeoAbnormalResume();
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
bptr->errStatus = 0;
|
||||
__osLeoResume();
|
||||
}
|
||||
info->sectorNum++;
|
||||
if (stat & LEO_STATUS_DATA_REQUEST)
|
||||
{
|
||||
if (info->sectorNum > 0x54)
|
||||
{
|
||||
blockInfo->errStatus = LEO_ERROR_24;
|
||||
__osLeoAbnormalResume();
|
||||
return 1;
|
||||
}
|
||||
osEPiRawStartDma(__osDiskHandle, 0, LEO_SECTOR_BUFF, blockInfo->dramAddr, blockInfo->sectorSize);
|
||||
blockInfo->errStatus = LEO_ERROR_GOOD;
|
||||
return 1;
|
||||
}
|
||||
if (info->sectorNum <= 0x54)
|
||||
{
|
||||
blockInfo->errStatus = LEO_ERROR_24;
|
||||
__osLeoAbnormalResume();
|
||||
return 1;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
blockInfo->errStatus = LEO_ERROR_4;
|
||||
__osLeoAbnormalResume();
|
||||
return 1;
|
||||
}
|
||||
|
||||
void __osLeoAbnormalResume(void)
|
||||
{
|
||||
__OSTranxInfo *info;
|
||||
u32 pi_stat;
|
||||
info = &__osDiskHandle->transferInfo;
|
||||
WAIT_ON_IOBUSY(pi_stat);
|
||||
IO_WRITE(LEO_BM_CTL, info->bmCtlShadow | LEO_BM_CTL_RESET);
|
||||
WAIT_ON_IOBUSY(pi_stat);
|
||||
IO_WRITE(LEO_BM_CTL, info->bmCtlShadow);
|
||||
__osLeoResume();
|
||||
IO_WRITE(PI_STATUS_REG, PI_STATUS_CLR_INTR);
|
||||
__OSGlobalIntMask |= OS_IM_PI;
|
||||
}
|
||||
void __osLeoResume(void)
|
||||
{
|
||||
__OSEventState *es;
|
||||
OSMesgQueue *mq;
|
||||
s32 last;
|
||||
es = &__osEventStateTab[OS_EVENT_PI];
|
||||
mq = es->messageQueue;
|
||||
if (mq == NULL || MQ_IS_FULL(mq))
|
||||
return;
|
||||
last = (mq->first + mq->validCount) % mq->msgCount;
|
||||
mq->msg[last] = es->message;
|
||||
mq->validCount++;
|
||||
if (mq->mtqueue->next != NULL)
|
||||
__osEnqueueThread(&__osRunQueue, __osPopThread(&mq->mtqueue));
|
||||
}
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
#include "libultra_internal.h"
|
||||
|
||||
#define PIAccessQueueSize 2
|
||||
|
||||
OSMesg osPiMesgBuff[PIAccessQueueSize];
|
||||
OSMesgQueue gOsPiMessageQueue;
|
||||
u32 gOsPiAccessQueueCreated = 0;
|
||||
|
||||
void __osPiCreateAccessQueue(void) {
|
||||
gOsPiAccessQueueCreated = 1;
|
||||
osCreateMesgQueue(&gOsPiMessageQueue, &osPiMesgBuff[0], PIAccessQueueSize - 1);
|
||||
osSendMesg(&gOsPiMessageQueue, NULL, OS_MESG_NOBLOCK);
|
||||
}
|
||||
|
||||
void __osPiGetAccess(void) {
|
||||
OSMesg sp1c;
|
||||
if (!gOsPiAccessQueueCreated) {
|
||||
__osPiCreateAccessQueue();
|
||||
}
|
||||
osRecvMesg(&gOsPiMessageQueue, &sp1c, OS_MESG_BLOCK);
|
||||
}
|
||||
|
||||
void __osPiRelAccess(void) {
|
||||
osSendMesg(&gOsPiMessageQueue, NULL, OS_MESG_NOBLOCK);
|
||||
}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "new_func.h"
|
||||
|
||||
void __osResetGlobalIntMask(u32 mask) {
|
||||
register u32 prev;
|
||||
prev = __osDisableInt();
|
||||
__OSGlobalIntMask &= ~(-0x402 & mask);
|
||||
__osRestoreInt(prev);
|
||||
}
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "hardware.h"
|
||||
#include "new_func.h"
|
||||
|
||||
void __osSetGlobalIntMask(s32 arg0) {
|
||||
register u32 prev = __osDisableInt();
|
||||
__OSGlobalIntMask |= arg0;
|
||||
__osRestoreInt(prev);
|
||||
}
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
#include "libultra_internal.h"
|
||||
|
||||
extern s32 (*__osHwIntTable[])(void);
|
||||
void __osSetHWIntrRoutine(OSHWIntr interrupt, s32 (*handler)(void))
|
||||
{
|
||||
register u32 saveMask;
|
||||
saveMask = __osDisableInt();
|
||||
__osHwIntTable[interrupt] = handler;
|
||||
__osRestoreInt(saveMask);
|
||||
}
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
#include "libultra_internal.h"
|
||||
|
||||
#define SIAccessQueueSize 2
|
||||
|
||||
OSMesg osSiMesgBuff[SIAccessQueueSize];
|
||||
OSMesgQueue gOsSiMessageQueue;
|
||||
u32 gOsSiAccessQueueCreated = 0;
|
||||
|
||||
void __osSiCreateAccessQueue() {
|
||||
gOsSiAccessQueueCreated = 1;
|
||||
osCreateMesgQueue(&gOsSiMessageQueue, &osSiMesgBuff[0], SIAccessQueueSize - 1);
|
||||
osSendMesg(&gOsSiMessageQueue, NULL, OS_MESG_NOBLOCK);
|
||||
}
|
||||
|
||||
void __osSiGetAccess(void) {
|
||||
OSMesg sp1c;
|
||||
if (!gOsSiAccessQueueCreated) {
|
||||
__osSiCreateAccessQueue();
|
||||
}
|
||||
osRecvMesg(&gOsSiMessageQueue, &sp1c, OS_MESG_BLOCK);
|
||||
}
|
||||
|
||||
void __osSiRelAccess(void) {
|
||||
osSendMesg(&gOsSiMessageQueue, NULL, OS_MESG_NOBLOCK);
|
||||
}
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "hardware.h"
|
||||
|
||||
s32 __osSiDeviceBusy() {
|
||||
register u32 status;
|
||||
status = HW_REG(SI_STATUS_REG, u32);
|
||||
if (status & (SI_STATUS_DMA_BUSY | SI_STATUS_IO_READ_BUSY)) {
|
||||
return 1;
|
||||
} else {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "hardware.h"
|
||||
|
||||
s32 __osSiRawReadIo(void *a0, u32 *a1) {
|
||||
if (__osSiDeviceBusy()) {
|
||||
return -1;
|
||||
}
|
||||
*a1 = HW_REG((uintptr_t) a0, u32);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "hardware.h"
|
||||
|
||||
s32 __osSiRawStartDma(s32 dir, void *addr) {
|
||||
if (__osSiDeviceBusy()) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (dir == OS_WRITE) {
|
||||
osWritebackDCache(addr, 64);
|
||||
}
|
||||
|
||||
HW_REG(SI_DRAM_ADDR_REG, void *) = (void *) osVirtualToPhysical(addr);
|
||||
|
||||
if (dir == OS_READ) {
|
||||
HW_REG(SI_PIF_ADDR_RD64B_REG, u32) = 0x1FC007C0;
|
||||
} else {
|
||||
HW_REG(SI_PIF_ADDR_WR64B_REG, u32) = 0x1FC007C0;
|
||||
}
|
||||
|
||||
if (dir == OS_READ) {
|
||||
osInvalDCache(addr, 64);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "hardware.h"
|
||||
|
||||
s32 __osSiRawWriteIo(void *a0, u32 a1) {
|
||||
if (__osSiDeviceBusy()) {
|
||||
return -1;
|
||||
}
|
||||
HW_REG((uintptr_t) a0, u32) = a1;
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "hardware.h"
|
||||
|
||||
s32 __osSpDeviceBusy() {
|
||||
register u32 status = HW_REG(SP_STATUS_REG, u32);
|
||||
if (status & (SPSTATUS_IO_FULL | SPSTATUS_DMA_FULL | SPSTATUS_DMA_BUSY)) {
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "hardware.h"
|
||||
|
||||
u32 __osSpGetStatus() {
|
||||
return HW_REG(SP_STATUS_REG, u32);
|
||||
}
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "hardware.h"
|
||||
|
||||
s32 __osSpRawStartDma(u32 dir, void *sp_ptr, void *dram_ptr, size_t size) {
|
||||
if (__osSpDeviceBusy()) {
|
||||
return -1;
|
||||
}
|
||||
HW_REG(SP_MEM_ADDR_REG, void *) = sp_ptr;
|
||||
HW_REG(SP_DRAM_ADDR_REG, void *) = (void *) osVirtualToPhysical(dram_ptr);
|
||||
if (dir == 0) {
|
||||
HW_REG(SP_WR_LEN_REG, u32) = size - 1;
|
||||
} else {
|
||||
HW_REG(SP_RD_LEN_REG, u32) = size - 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "hardware.h"
|
||||
|
||||
s32 __osSpSetPc(void *pc) {
|
||||
register u32 status = HW_REG(SP_STATUS_REG, u32);
|
||||
if (!(status & SPSTATUS_HALT)) {
|
||||
return -1;
|
||||
} else {
|
||||
HW_REG(SP_PC_REG, void *) = pc;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "hardware.h"
|
||||
|
||||
void __osSpSetStatus(u32 status) {
|
||||
HW_REG(SP_STATUS_REG, u32) = status;
|
||||
}
|
||||
|
|
@ -0,0 +1,38 @@
|
|||
#include "libultra_internal.h"
|
||||
|
||||
typedef struct {
|
||||
u8 unk00 : 2;
|
||||
u8 pad : 4;
|
||||
u8 unk01 : 2;
|
||||
u8 unk2[3];
|
||||
} unkStruct;
|
||||
|
||||
u32 D_80334A40 = 0;
|
||||
u32 D_80334A44 = 1;
|
||||
|
||||
void __osSyncPutChars(s32 a0, s32 a1, u8 *a2) {
|
||||
unkStruct sp24;
|
||||
s32 sp20;
|
||||
u32 sp1c;
|
||||
sp24.unk00 = a0;
|
||||
sp24.unk01 = a1;
|
||||
|
||||
for (sp20 = 0; sp20 < a1; sp20++) {
|
||||
sp24.unk2[sp20] = a2[sp20];
|
||||
}
|
||||
|
||||
while (!__osAtomicDec(&D_80334A44)) {
|
||||
;
|
||||
}
|
||||
|
||||
sp1c = __osDisableInt();
|
||||
|
||||
*(u32 *) 0xC0000000 = *(u32 *) &sp24;
|
||||
while (!(__osGetCause() & 0x2000)) {
|
||||
;
|
||||
}
|
||||
*(u32 *) 0xC000000C = 0;
|
||||
D_80334A44++;
|
||||
|
||||
__osRestoreInt(sp1c);
|
||||
}
|
||||
|
|
@ -0,0 +1,7 @@
|
|||
#include "libultra_internal.h"
|
||||
|
||||
extern OSViContext *__osViCurr;
|
||||
|
||||
OSViContext *__osViGetCurrentContext() {
|
||||
return __osViCurr;
|
||||
}
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "hardware.h"
|
||||
|
||||
extern u32 osTvType;
|
||||
|
||||
OSViContext sViContexts[2] = { 0 };
|
||||
OSViContext *__osViCurr = &sViContexts[0];
|
||||
OSViContext *__osViNext = &sViContexts[1];
|
||||
|
||||
u32 osViClock = 0x02E6D354; // used for audio frequency calculations
|
||||
|
||||
extern OSViMode osViModePalLan1;
|
||||
extern OSViMode osViModeMpalLan1;
|
||||
extern OSViMode osViModeNtscLan1;
|
||||
|
||||
void __osViInit(void) {
|
||||
bzero(sViContexts, sizeof(sViContexts));
|
||||
__osViCurr = &sViContexts[0];
|
||||
__osViNext = &sViContexts[1];
|
||||
__osViNext->retraceCount = 1;
|
||||
__osViCurr->retraceCount = 1;
|
||||
|
||||
if (osTvType == TV_TYPE_PAL) {
|
||||
__osViNext->modep = &osViModePalLan1;
|
||||
osViClock = 0x02F5B2D2;
|
||||
} else if (osTvType == TV_TYPE_MPAL) {
|
||||
__osViNext->modep = &osViModeMpalLan1;
|
||||
osViClock = 0x02E6025C;
|
||||
} else {
|
||||
__osViNext->modep = &osViModeNtscLan1;
|
||||
osViClock = 0x02E6D354;
|
||||
}
|
||||
|
||||
__osViNext->unk00 = 0x20;
|
||||
__osViNext->features = __osViNext->modep->comRegs.ctrl;
|
||||
while (HW_REG(VI_CURRENT_REG, u32) > 0xa) {
|
||||
;
|
||||
}
|
||||
HW_REG(VI_STATUS_REG, u32) = 0;
|
||||
__osViSwapContext();
|
||||
}
|
||||
|
|
@ -0,0 +1,61 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "hardware.h"
|
||||
|
||||
extern OSViContext *__osViNext;
|
||||
extern OSViContext *__osViCurr;
|
||||
|
||||
void __osViSwapContext() {
|
||||
register OSViMode *s0;
|
||||
register OSViContext *s1;
|
||||
u32 origin;
|
||||
u32 hStart;
|
||||
u32 sp34;
|
||||
u32 field;
|
||||
register u32 s2;
|
||||
field = 0;
|
||||
s1 = __osViNext;
|
||||
s0 = s1->modep;
|
||||
field = HW_REG(VI_V_CURRENT_LINE_REG, u32) & 1;
|
||||
s2 = osVirtualToPhysical(s1->buffer);
|
||||
origin = (s0->fldRegs[field].origin) + s2;
|
||||
if (s1->unk00 & 2) {
|
||||
s1->unk20 |= s0->comRegs.xScale & ~0xfff;
|
||||
} else {
|
||||
s1->unk20 = s0->comRegs.xScale;
|
||||
}
|
||||
if (s1->unk00 & 4) {
|
||||
sp34 = (u32)(s0->fldRegs[field].yScale & 0xfff);
|
||||
s1->unk2c = s1->unk24 * sp34;
|
||||
s1->unk2c |= s0->fldRegs[field].yScale & ~0xfff;
|
||||
} else {
|
||||
s1->unk2c = s0->fldRegs[field].yScale;
|
||||
}
|
||||
hStart = s0->comRegs.hStart;
|
||||
if (s1->unk00 & 0x20) {
|
||||
hStart = 0;
|
||||
}
|
||||
if (s1->unk00 & 0x40) {
|
||||
s1->unk2c = 0;
|
||||
origin = osVirtualToPhysical(s1->buffer);
|
||||
}
|
||||
if (s1->unk00 & 0x80) {
|
||||
s1->unk2c = (s1->unk28 << 0x10) & 0x3ff0000;
|
||||
origin = osVirtualToPhysical(s1->buffer);
|
||||
}
|
||||
HW_REG(VI_ORIGIN_REG, u32) = origin;
|
||||
HW_REG(VI_WIDTH_REG, u32) = s0->comRegs.width;
|
||||
HW_REG(VI_BURST_REG, u32) = s0->comRegs.burst;
|
||||
HW_REG(VI_V_SYNC_REG, u32) = s0->comRegs.vSync;
|
||||
HW_REG(VI_H_SYNC_REG, u32) = s0->comRegs.hSync;
|
||||
HW_REG(VI_LEAP_REG, u32) = s0->comRegs.leap;
|
||||
HW_REG(VI_H_START_REG, u32) = hStart;
|
||||
HW_REG(VI_V_START_REG, u32) = s0->fldRegs[field].vStart;
|
||||
HW_REG(VI_V_BURST_REG, u32) = s0->fldRegs[field].vBurst;
|
||||
HW_REG(VI_INTR_REG, u32) = s0->fldRegs[field].vIntr;
|
||||
HW_REG(VI_X_SCALE_REG, u32) = s1->unk20;
|
||||
HW_REG(VI_Y_SCALE_REG, u32) = s1->unk2c;
|
||||
HW_REG(VI_CONTROL_REG, u32) = s1->features;
|
||||
__osViNext = __osViCurr;
|
||||
__osViCurr = s1;
|
||||
*__osViNext = *__osViCurr;
|
||||
}
|
||||
|
|
@ -0,0 +1,93 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "libaudio_internal.h"
|
||||
|
||||
#define PATCH(SRC, BASE, TYPE) SRC = (TYPE)((uintptr_t) SRC + (uintptr_t) BASE)
|
||||
|
||||
void alSeqFileNew(ALSeqFile *f, u8 *base) {
|
||||
int i;
|
||||
for (i = 0; i < f->seqCount; i++) {
|
||||
PATCH(f->seqArray[i].offset, base, u8 *);
|
||||
}
|
||||
}
|
||||
|
||||
static void _bnkfPatchBank(ALInstrument *inst, ALBankFile *f, u8 *table) {
|
||||
int i;
|
||||
ALSound *sound;
|
||||
ALWaveTable *wavetable;
|
||||
u8 *table2;
|
||||
|
||||
if (inst->flags) {
|
||||
return;
|
||||
}
|
||||
|
||||
inst->flags = 1;
|
||||
|
||||
for (i = 0; i < inst->soundCount; i++) {
|
||||
PATCH(inst->soundArray[i], f, ALSound *);
|
||||
sound = inst->soundArray[i];
|
||||
if (sound->flags) {
|
||||
continue;
|
||||
}
|
||||
|
||||
table2 = table;
|
||||
|
||||
sound->flags = 1;
|
||||
PATCH(sound->envelope, f, ALEnvelope *);
|
||||
PATCH(sound->keyMap, f, ALKeyMap *);
|
||||
PATCH(sound->wavetable, f, ALWaveTable *);
|
||||
wavetable = sound->wavetable;
|
||||
if (wavetable->flags) {
|
||||
continue;
|
||||
}
|
||||
|
||||
wavetable->flags = 1;
|
||||
PATCH(wavetable->base, table2, u8 *);
|
||||
if (wavetable->type == 0) {
|
||||
PATCH(wavetable->waveInfo.adpcmWave.book, f, ALADPCMBook *);
|
||||
if (wavetable->waveInfo.adpcmWave.loop != NULL) {
|
||||
PATCH(wavetable->waveInfo.adpcmWave.loop, f, ALADPCMloop *);
|
||||
}
|
||||
} else if (wavetable->type == 1) {
|
||||
if (wavetable->waveInfo.rawWave.loop != NULL) {
|
||||
PATCH(wavetable->waveInfo.rawWave.loop, f, ALRawLoop *);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Force adding another jr $ra. Has to be called or it doesn't get put in the
|
||||
// right place.
|
||||
static void unused(void) {
|
||||
}
|
||||
|
||||
void alBnkfNew(ALBankFile *f, u8 *table) {
|
||||
ALBank *bank;
|
||||
int i;
|
||||
int j;
|
||||
unused();
|
||||
if (f->revision != AL_BANK_VERSION) {
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < f->bankCount; i++) {
|
||||
PATCH(f->bankArray[i], f, ALBank *);
|
||||
if (f->bankArray[i] == NULL) {
|
||||
continue;
|
||||
}
|
||||
|
||||
bank = f->bankArray[i];
|
||||
if (bank->flags == 0) {
|
||||
bank->flags = 1;
|
||||
if (bank->percussion != NULL) {
|
||||
PATCH(bank->percussion, f, ALInstrument *);
|
||||
_bnkfPatchBank(bank->percussion, f, table);
|
||||
}
|
||||
for (j = 0; j < bank->instCount; j++) {
|
||||
PATCH(bank->instArray[j], f, ALInstrument *);
|
||||
if (bank->instArray[j] != NULL) {
|
||||
_bnkfPatchBank(bank->instArray[j], f, table);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
#ifndef __BSTRING_H__
|
||||
#define __BSTRING_H__
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* bstring(3C) -- byte string operations
|
||||
*
|
||||
* Copyright 1990, Silicon Graphics, Inc.
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* This is UNPUBLISHED PROPRIETARY SOURCE CODE of Silicon Graphics, Inc.;
|
||||
* the contents of this file may not be disclosed to third parties, copied or
|
||||
* duplicated in any form, in whole or in part, without the prior written
|
||||
* permission of Silicon Graphics, Inc.
|
||||
*
|
||||
* RESTRICTED RIGHTS LEGEND:
|
||||
* Use, duplication or disclosure by the Government is subject to restrictions
|
||||
* as set forth in subdivision (c)(1)(ii) of the Rights in Technical Data
|
||||
* and Computer Software clause at DFARS 252.227-7013, and/or in similar or
|
||||
* successor clauses in the FAR, DOD or NASA FAR Supplement. Unpublished -
|
||||
* rights reserved under the Copyright Laws of the United States.
|
||||
*/
|
||||
|
||||
#ident "$Revision: 1.4 $"
|
||||
|
||||
extern void bcopy(const void *, void *, size_t);
|
||||
extern int bcmp(const void *, const void *, int);
|
||||
extern void bzero(void *, size_t);
|
||||
extern void blkclr(void *, int);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* !__BSTRING_H__ */
|
||||
|
|
@ -0,0 +1,298 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "controller.h"
|
||||
|
||||
u16 __osSumcalc(u8 *ptr, int length)
|
||||
{
|
||||
int i;
|
||||
u32 sum;
|
||||
u8 *tmp;
|
||||
|
||||
sum = 0;
|
||||
tmp = ptr;
|
||||
for (i = 0; i < length; i++)
|
||||
{
|
||||
sum += *tmp++;
|
||||
sum &= 0xffff;
|
||||
}
|
||||
return sum;
|
||||
}
|
||||
s32 __osIdCheckSum(u16 *ptr, u16 *csum, u16 *icsum)
|
||||
{
|
||||
u16 data;
|
||||
u32 j;
|
||||
data = 0;
|
||||
*icsum = 0;
|
||||
*csum = *icsum;
|
||||
for (j = 0; j < 28; j += 2)
|
||||
{
|
||||
//feels like this should be a compiler optimization not manual..
|
||||
//but it doesn't match and I'm pretty sure this is just -O1
|
||||
data = *(u16 *)((u8 *)ptr + j);
|
||||
//data = ptr[j]
|
||||
*csum += data;
|
||||
*icsum += ~data;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
s32 __osRepairPackId(OSPfs *pfs, __OSPackId *badid, __OSPackId *newid)
|
||||
{
|
||||
|
||||
s32 ret;
|
||||
u8 temp[32];
|
||||
u8 comp[32];
|
||||
u8 mask;
|
||||
int i;
|
||||
int j;
|
||||
u16 index[4];
|
||||
|
||||
ret = 0;
|
||||
mask = 0;
|
||||
SET_ACTIVEBANK_TO_ZERO;
|
||||
newid->repaired = -1;
|
||||
newid->random = osGetCount();
|
||||
newid->serial_mid = badid->serial_mid;
|
||||
newid->serial_low = badid->serial_low;
|
||||
for (j = 0; j < PFS_MAX_BANKS;)
|
||||
{
|
||||
pfs->activebank = j;
|
||||
ERRCK(__osPfsSelectBank(pfs))
|
||||
ERRCK(__osContRamRead(pfs->queue, pfs->channel, 0, (u8*)&temp)); //TODO: fix magic number
|
||||
temp[0] = j | 0x80;
|
||||
for (i = 1; i < ARRLEN(temp); i++)
|
||||
{
|
||||
|
||||
temp[i] = ~temp[i];
|
||||
}
|
||||
|
||||
ERRCK(__osContRamWrite(pfs->queue, pfs->channel, 0, (u8*)temp, FALSE)); //oddr 0, don't force
|
||||
ERRCK(__osContRamRead(pfs->queue, pfs->channel, 0, (u8*)&comp));
|
||||
|
||||
for (i = 0; i < ARRLEN(temp); i++)
|
||||
{
|
||||
if (comp[i] != temp[i])
|
||||
break;
|
||||
}
|
||||
if (i != ARRLEN(temp))
|
||||
break;
|
||||
if (j > 0)
|
||||
{
|
||||
pfs->activebank = 0;
|
||||
ERRCK(__osPfsSelectBank(pfs));
|
||||
ERRCK(__osContRamRead(pfs->queue, pfs->channel, 0, (u8*)temp));
|
||||
if (temp[0] != 128)
|
||||
break; //TODO: remove magic constant
|
||||
}
|
||||
j++;
|
||||
}
|
||||
pfs->activebank = 0;
|
||||
ERRCK(__osPfsSelectBank(pfs));
|
||||
if (j > 0)
|
||||
mask = 1;
|
||||
else
|
||||
mask = 0;
|
||||
newid->deviceid = (badid->deviceid & (u16)~1) | mask;
|
||||
newid->banks = j;
|
||||
newid->version = badid->version;
|
||||
__osIdCheckSum((u16*)newid, &newid->checksum, &newid->inverted_checksum);
|
||||
index[0] = 1;
|
||||
index[1] = 3;
|
||||
index[2] = 4;
|
||||
index[3] = 6;
|
||||
for (i = 0; i < ARRLEN(index); i++)
|
||||
{
|
||||
ERRCK(__osContRamWrite(pfs->queue, pfs->channel, index[i], (u8*)newid, TRUE));
|
||||
}
|
||||
ERRCK(__osContRamRead(pfs->queue, pfs->channel, 1, (u8*)temp));
|
||||
for (i = 0; i < ARRLEN(temp); i++)
|
||||
{
|
||||
if (temp[i] != ((u8 *)newid)[i])
|
||||
return PFS_ERR_ID_FATAL;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
s32 __osCheckPackId(OSPfs *pfs, __OSPackId *temp)
|
||||
{
|
||||
u16 index[4];
|
||||
s32 ret;
|
||||
u16 sum;
|
||||
u16 isum;
|
||||
int i;
|
||||
int j;
|
||||
|
||||
ret = 0;
|
||||
SET_ACTIVEBANK_TO_ZERO;
|
||||
index[0] = 1;
|
||||
index[1] = 3;
|
||||
index[2] = 4;
|
||||
index[3] = 6;
|
||||
for (i = 1; i < ARRLEN(index); i++)
|
||||
{
|
||||
ERRCK(__osContRamRead(pfs->queue, pfs->channel, index[i], (u8*)temp));
|
||||
__osIdCheckSum((u16 *)temp, &sum, &isum);
|
||||
if (temp->checksum == sum && temp->inverted_checksum == isum)
|
||||
break;
|
||||
}
|
||||
if (i == ARRLEN(index))
|
||||
return PFS_ERR_ID_FATAL;
|
||||
|
||||
for (j = 0; j < ARRLEN(index); j++)
|
||||
{
|
||||
if (j != i)
|
||||
{
|
||||
ERRCK(__osContRamWrite(pfs->queue, pfs->channel, index[j], (u8*)temp, TRUE));
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
s32 __osGetId(OSPfs *pfs)
|
||||
{
|
||||
int k;
|
||||
u16 sum;
|
||||
u16 isum;
|
||||
u8 temp[32];
|
||||
__OSPackId newid;
|
||||
s32 ret;
|
||||
__OSPackId *id;
|
||||
|
||||
SET_ACTIVEBANK_TO_ZERO;
|
||||
ERRCK(__osContRamRead(pfs->queue, pfs->channel, 1, (u8*)temp));
|
||||
__osIdCheckSum((u16*)temp, &sum, &isum);
|
||||
id = (__OSPackId*)temp;
|
||||
if (id->checksum != sum || id->inverted_checksum != isum)
|
||||
{
|
||||
ret = __osCheckPackId(pfs, id);
|
||||
if (ret == PFS_ERR_ID_FATAL)
|
||||
{
|
||||
ERRCK(__osRepairPackId(pfs, id, &newid));
|
||||
id = &newid;
|
||||
}
|
||||
else if (ret != 0)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
if ((id->deviceid & 1) == 0) //TODO: remove magic constant
|
||||
{
|
||||
ERRCK(__osRepairPackId(pfs, id, &newid));
|
||||
id = &newid;
|
||||
if ((id->deviceid & 1) == 0)
|
||||
return PFS_ERR_DEVICE;
|
||||
}
|
||||
for (k = 0; k < ARRLEN(pfs->id); k++)
|
||||
{
|
||||
pfs->id[k] = ((u8 *)id)[k];
|
||||
}
|
||||
pfs->version = id->version;
|
||||
pfs->banks = id->banks;
|
||||
pfs->inode_start_page = pfs->banks * 2 + 3; //TODO: loads of magic constants..
|
||||
pfs->dir_size = 16;
|
||||
pfs->inode_table = 8;
|
||||
pfs->minode_table = pfs->banks * PFS_ONE_PAGE + 8;
|
||||
pfs->dir_table = pfs->minode_table + pfs->banks * PFS_ONE_PAGE;
|
||||
ERRCK(__osContRamRead(pfs->queue, pfs->channel, 7, pfs->label));
|
||||
return 0;
|
||||
}
|
||||
|
||||
s32 __osCheckId(OSPfs *pfs)
|
||||
{
|
||||
int k;
|
||||
u8 temp[32];
|
||||
s32 ret;
|
||||
|
||||
SET_ACTIVEBANK_TO_ZERO;
|
||||
ret = __osContRamRead(pfs->queue, pfs->channel, 1, (u8*)temp);
|
||||
if (ret != 0)
|
||||
{
|
||||
if (ret != 2)
|
||||
return ret;
|
||||
else
|
||||
ERRCK(__osContRamRead(pfs->queue, pfs->channel, 1, (u8*)temp));
|
||||
}
|
||||
|
||||
for (k = 0; k < ARRLEN(temp); k++)
|
||||
{
|
||||
if (pfs->id[k] != temp[k])
|
||||
return PFS_ERR_NEW_PACK;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
s32 __osPfsRWInode(OSPfs *pfs, __OSInode *inode, u8 flag, u8 bank)
|
||||
{
|
||||
u8 sum;
|
||||
int j;
|
||||
s32 ret;
|
||||
int offset;
|
||||
u8 *addr;
|
||||
|
||||
SET_ACTIVEBANK_TO_ZERO;
|
||||
|
||||
if (bank > 0)
|
||||
offset = 1;
|
||||
else
|
||||
offset = pfs->inode_start_page;
|
||||
|
||||
if (flag == PFS_WRITE)
|
||||
inode->inode_page[0].inode_t.page = __osSumcalc((u8*)&inode->inode_page[offset], (-offset) * 2 + 256);
|
||||
|
||||
for (j = 0; j < 8; j++)
|
||||
{
|
||||
addr = ((u8 *)inode->inode_page + j * 32); //TODO: don't like this =/ //maybe &inode->inode_table[j*PFS_ONE_PAGE].ipage or something
|
||||
if (flag == PFS_WRITE)
|
||||
{
|
||||
ret = __osContRamWrite(pfs->queue, pfs->channel, pfs->inode_table + bank * 8 + j, addr, FALSE);
|
||||
ret = __osContRamWrite(pfs->queue, pfs->channel, pfs->minode_table + bank * 8 + j, addr, FALSE);
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = __osContRamRead(pfs->queue, pfs->channel, pfs->inode_table + bank * 8 + j, addr);
|
||||
}
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
}
|
||||
if (flag == PFS_READ)
|
||||
{
|
||||
sum = __osSumcalc((u8*)&inode->inode_page[offset], (-offset) * 2 + 256);
|
||||
if (sum != inode->inode_page[0].inode_t.page)
|
||||
{
|
||||
for (j = 0; j < PFS_ONE_PAGE; j++)
|
||||
{
|
||||
addr = ((u8 *)inode->inode_page + j * 32);
|
||||
ret = __osContRamRead(pfs->queue, pfs->channel, pfs->minode_table + bank * PFS_ONE_PAGE + j, addr);
|
||||
}
|
||||
if (sum != inode->inode_page[0].inode_t.page)
|
||||
return PFS_ERR_INCONSISTENT;
|
||||
for (j = 0; j < PFS_ONE_PAGE; j++)
|
||||
{
|
||||
addr = ((u8 *)inode->inode_page + j * 32);
|
||||
ret = __osContRamWrite(pfs->queue, pfs->channel, pfs->inode_table + bank * PFS_ONE_PAGE + j, addr, FALSE);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
for (j = 0; j < PFS_ONE_PAGE; j++)
|
||||
{
|
||||
addr = ((u8 *)inode->inode_page + j * 32);
|
||||
ret = __osContRamWrite(pfs->queue, pfs->channel, pfs->minode_table + bank * PFS_ONE_PAGE + j, addr, FALSE);
|
||||
}
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
s32 __osPfsSelectBank(OSPfs *pfs)
|
||||
{
|
||||
u8 temp[BLOCKSIZE];
|
||||
int i;
|
||||
s32 ret;
|
||||
ret = 0;
|
||||
for (i = 0; i < ARRLEN(temp); i++)
|
||||
{
|
||||
temp[i] = pfs->activebank;
|
||||
}
|
||||
ret = __osContRamWrite(pfs->queue, pfs->channel, 1024, (u8*)temp, FALSE);
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -0,0 +1,96 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "PR/rcp.h"
|
||||
#include "controller.h"
|
||||
|
||||
extern s32 func_800CE7D4(OSMesgQueue *, s32);
|
||||
void __osPackRamReadData(int channel, u16 address);
|
||||
|
||||
extern u32 D_801965CC;
|
||||
|
||||
s32 __osContRamRead(OSMesgQueue *mq, int channel, u16 address, u8 *buffer) {
|
||||
s32 ret;
|
||||
int i;
|
||||
u8 *ptr;
|
||||
__OSContRamReadFormat ramreadformat;
|
||||
int retry;
|
||||
ret = 0;
|
||||
ptr = (u8 *)&__osPfsPifRam;
|
||||
retry = 2;
|
||||
__osSiGetAccess();
|
||||
_osLastSentSiCmd = CONT_CMD_READ_MEMPACK;
|
||||
__osPackRamReadData(channel, address);
|
||||
ret = __osSiRawStartDma(OS_WRITE, &__osPfsPifRam);
|
||||
osRecvMesg(mq, NULL, OS_MESG_BLOCK);
|
||||
for (i = 0; i < 16; i++) {
|
||||
__osPfsPifRam.ramarray[i] = 0xFF;
|
||||
}
|
||||
do {
|
||||
D_801965CC = 0;
|
||||
ret = __osSiRawStartDma(OS_READ, &__osPfsPifRam);
|
||||
osRecvMesg(mq, NULL, OS_MESG_BLOCK);
|
||||
ptr = (u8 *)&__osPfsPifRam;
|
||||
if (channel != 0) {
|
||||
for (i = 0; i < channel; i++) {
|
||||
ptr++;
|
||||
}
|
||||
}
|
||||
ramreadformat = *(__OSContRamReadFormat *)ptr;
|
||||
ret = CHNL_ERR(ramreadformat);
|
||||
if (ret == 0) {
|
||||
u8 c;
|
||||
c = __osContDataCrc((u8*)&ramreadformat.data);
|
||||
if (c != ramreadformat.datacrc) {
|
||||
ret = func_800CE7D4(mq, channel);
|
||||
if (ret != 0) {
|
||||
__osSiRelAccess();
|
||||
return ret;
|
||||
}
|
||||
ret = PFS_ERR_CONTRFAIL;
|
||||
} else {
|
||||
for (i = 0; i < ARRLEN(ramreadformat.data); i++) {
|
||||
*buffer++ = ramreadformat.data[i];
|
||||
}
|
||||
}
|
||||
}
|
||||
// diff here somewhere
|
||||
else {
|
||||
ret = 1/* PFS_ERR_NOPACK */;
|
||||
}
|
||||
if (ret != PFS_ERR_CONTRFAIL) {
|
||||
break;
|
||||
}
|
||||
} while (retry-- >= 0);
|
||||
__osSiRelAccess();
|
||||
return ret;
|
||||
}
|
||||
|
||||
void __osPackRamReadData(int channel, u16 address) {
|
||||
u8 *ptr;
|
||||
__OSContRamReadFormat ramreadformat;
|
||||
int i;
|
||||
|
||||
ptr = (u8 *)__osPfsPifRam.ramarray;
|
||||
|
||||
for (i = 0; i < ARRLEN(__osPfsPifRam.ramarray) + 1; i++) { // also clear pifstatus
|
||||
__osPfsPifRam.ramarray[i] = 0;
|
||||
}
|
||||
|
||||
__osPfsPifRam.pifstatus = CONT_CMD_EXE;
|
||||
ramreadformat.dummy = CONT_CMD_NOP;
|
||||
ramreadformat.txsize = CONT_CMD_READ_MEMPACK_TX;
|
||||
ramreadformat.rxsize = CONT_CMD_READ_MEMPACK_RX;
|
||||
ramreadformat.cmd = CONT_CMD_READ_MEMPACK;
|
||||
ramreadformat.address = (address << 0x5) | __osContAddressCrc(address);
|
||||
ramreadformat.datacrc = CONT_CMD_NOP;
|
||||
for (i = 0; i < ARRLEN(ramreadformat.data); i++) {
|
||||
ramreadformat.data[i] = CONT_CMD_NOP;
|
||||
}
|
||||
if (channel != 0) {
|
||||
for (i = 0; i < channel; i++) {
|
||||
*ptr++ = 0;
|
||||
}
|
||||
}
|
||||
*(__OSContRamReadFormat *)ptr = ramreadformat;
|
||||
ptr += sizeof(__OSContRamReadFormat);
|
||||
ptr[0] = CONT_CMD_END;
|
||||
}
|
||||
|
|
@ -0,0 +1,94 @@
|
|||
#include "libultra_internal.h"
|
||||
#include "PR/rcp.h"
|
||||
#include "controller.h"
|
||||
|
||||
extern s32 func_800CE7D4(OSMesgQueue *, s32);
|
||||
void __osPackRamWriteData(int channel, u16 address, u8 *buffer);
|
||||
extern u32 D_801965CC;
|
||||
|
||||
s32 __osContRamWrite(OSMesgQueue *mq, int channel, u16 address, u8 *buffer, int force) {
|
||||
s32 ret;
|
||||
int i;
|
||||
u8 *ptr;
|
||||
__OSContRamReadFormat ramreadformat;
|
||||
int retry;
|
||||
|
||||
ret = 0;
|
||||
ptr = (u8 *)&__osPfsPifRam;
|
||||
retry = 2;
|
||||
if (force != 1 && address < 7 && address != 0) {
|
||||
return 0;
|
||||
}
|
||||
__osSiGetAccess();
|
||||
_osLastSentSiCmd = CONT_CMD_WRITE_MEMPACK;
|
||||
__osPackRamWriteData(channel, address, buffer);
|
||||
ret = __osSiRawStartDma(OS_WRITE, &__osPfsPifRam);
|
||||
osRecvMesg(mq, NULL, OS_MESG_BLOCK);
|
||||
for (i = 0; i < 16; i++) {
|
||||
__osPfsPifRam.ramarray[i] = 0xFF;
|
||||
}
|
||||
do {
|
||||
D_801965CC = 0;
|
||||
ret = __osSiRawStartDma(OS_READ, &__osPfsPifRam);
|
||||
osRecvMesg(mq, NULL, OS_MESG_BLOCK);
|
||||
ptr = (u8 *)&__osPfsPifRam;
|
||||
if (channel != 0) {
|
||||
for (i = 0; i < channel; i++) {
|
||||
ptr++;
|
||||
}
|
||||
}
|
||||
|
||||
ramreadformat = *(__OSContRamReadFormat *)ptr;
|
||||
|
||||
ret = CHNL_ERR(ramreadformat);
|
||||
if (ret == 0) {
|
||||
if (__osContDataCrc(buffer) != ramreadformat.datacrc) {
|
||||
ret = func_800CE7D4(mq, channel);
|
||||
if (ret != 0) {
|
||||
__osSiRelAccess();
|
||||
return ret;
|
||||
}
|
||||
ret = PFS_ERR_CONTRFAIL;
|
||||
}
|
||||
// same diff as contramread
|
||||
} else {
|
||||
ret = PFS_ERR_NOPACK;
|
||||
}
|
||||
if (ret != PFS_ERR_CONTRFAIL) {
|
||||
break;
|
||||
}
|
||||
} while ((retry-- >= 0));
|
||||
__osSiRelAccess();
|
||||
return ret;
|
||||
}
|
||||
|
||||
void __osPackRamWriteData(int channel, u16 address, u8 *buffer) {
|
||||
u8 *ptr;
|
||||
__OSContRamReadFormat ramreadformat;
|
||||
int i;
|
||||
|
||||
ptr = (u8 *)__osPfsPifRam.ramarray;
|
||||
|
||||
for (i = 0; i < ARRLEN(__osPfsPifRam.ramarray) + 1; i++) { // also clear pifstatus
|
||||
__osPfsPifRam.ramarray[i] = 0;
|
||||
}
|
||||
|
||||
__osPfsPifRam.pifstatus = CONT_CMD_EXE;
|
||||
ramreadformat.dummy = CONT_CMD_NOP;
|
||||
ramreadformat.txsize = CONT_CMD_WRITE_MEMPACK_TX;
|
||||
ramreadformat.rxsize = CONT_CMD_WRITE_MEMPACK_RX;
|
||||
ramreadformat.cmd = CONT_CMD_WRITE_MEMPACK;
|
||||
ramreadformat.address = (address << 0x5) | __osContAddressCrc(address);
|
||||
ramreadformat.datacrc = CONT_CMD_NOP;
|
||||
for (i = 0; i < ARRLEN(ramreadformat.data); i++) {
|
||||
ramreadformat.data[i] = *buffer++;
|
||||
}
|
||||
if (channel != 0) {
|
||||
for (i = 0; i < channel; i++) {
|
||||
*ptr++ = 0;
|
||||
}
|
||||
}
|
||||
*(__OSContRamReadFormat *)ptr = ramreadformat;
|
||||
ptr += sizeof(__OSContRamReadFormat);
|
||||
ptr[0] = CONT_CMD_END;
|
||||
}
|
||||
|
|
@ -0,0 +1,208 @@
|
|||
#ifndef _CONTROLLER_H
|
||||
#define _CONTROLLER_H
|
||||
#include "PR/os_internal.h"
|
||||
#include "PR/os.h"
|
||||
#include "PR/rcp.h"
|
||||
|
||||
//should go somewhere else but
|
||||
#define ARRLEN(x) ((s32)(sizeof(x) / sizeof(x[0])))
|
||||
#define CHNL_ERR(format) ((format.rxsize & CHNL_ERR_MASK) >> 4)
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* 0x0 */ u32 ramarray[15];
|
||||
/* 0x3C */ u32 pifstatus;
|
||||
} OSPifRam;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* 0x0 */ u8 dummy;
|
||||
/* 0x1 */ u8 txsize;
|
||||
/* 0x2 */ u8 rxsize;
|
||||
/* 0x3 */ u8 cmd;
|
||||
/* 0x4 */ u16 button;
|
||||
/* 0x6 */ s8 stick_x;
|
||||
/* 0x7 */ s8 stick_y;
|
||||
} __OSContReadFormat;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* 0x0 */ u8 dummy;
|
||||
/* 0x1 */ u8 txsize;
|
||||
/* 0x2 */ u8 rxsize;
|
||||
/* 0x3 */ u8 cmd;
|
||||
/* 0x4 */ u8 typeh;
|
||||
/* 0x5 */ u8 typel;
|
||||
/* 0x6 */ u8 status;
|
||||
/* 0x7 */ u8 dummy1;
|
||||
} __OSContRequesFormat;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* 0x0 */ u8 txsize;
|
||||
/* 0x1 */ u8 rxsize;
|
||||
/* 0x2 */ u8 cmd;
|
||||
/* 0x3 */ u8 typeh;
|
||||
/* 0x4 */ u8 typel;
|
||||
/* 0x5 */ u8 status;
|
||||
} __OSContRequesFormatShort;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* 0x0 */ u8 dummy;
|
||||
/* 0x1 */ u8 txsize;
|
||||
/* 0x2 */ u8 rxsize;
|
||||
/* 0x3 */ u8 cmd;
|
||||
/* 0x4 */ u16 address;
|
||||
/* 0x6 */ u8 data[BLOCKSIZE];
|
||||
/* 0x26 */ u8 datacrc;
|
||||
} __OSContRamReadFormat;
|
||||
|
||||
typedef union {
|
||||
/* 0x0 */ struct
|
||||
{
|
||||
/* 0x0 */ u8 bank;
|
||||
/* 0x1 */ u8 page;
|
||||
} inode_t;
|
||||
/* 0x0 */ u16 ipage;
|
||||
} __OSInodeUnit;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* 0x0 */ u32 game_code;
|
||||
/* 0x4 */ u16 company_code;
|
||||
/* 0x6 */ __OSInodeUnit start_page;
|
||||
/* 0x8 */ u8 status;
|
||||
/* 0x9 */ s8 reserved;
|
||||
/* 0xA */ u16 data_sum;
|
||||
/* 0xC */ u8 ext_name[PFS_FILE_EXT_LEN];
|
||||
/* 0x10 */ u8 game_name[PFS_FILE_NAME_LEN];
|
||||
} __OSDir;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* 0x0 */ __OSInodeUnit inode_page[128];
|
||||
} __OSInode;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* 0x0 */ u32 repaired;
|
||||
/* 0x4 */ u32 random;
|
||||
/* 0x8 */ u64 serial_mid;
|
||||
/* 0x10 */ u64 serial_low;
|
||||
/* 0x18 */ u16 deviceid;
|
||||
/* 0x1A */ u8 banks;
|
||||
/* 0x1B */ u8 version;
|
||||
/* 0x1C */ u16 checksum;
|
||||
/* 0x1E */ u16 inverted_checksum;
|
||||
} __OSPackId;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* 0x0 */ u8 txsize;
|
||||
/* 0x1 */ u8 rxsize;
|
||||
/* 0x2 */ u8 cmd;
|
||||
/* 0x3 */ u8 address;
|
||||
/* 0x4 */ u8 data[EEPROM_BLOCK_SIZE];
|
||||
} __OSContEepromFormat;
|
||||
|
||||
//from: http://en64.shoutwiki.com/wiki/SI_Registers_Detailed#CONT_CMD_Usage
|
||||
#define CONT_CMD_REQUEST_STATUS 0
|
||||
#define CONT_CMD_READ_BUTTON 1
|
||||
#define CONT_CMD_READ_MEMPACK 2
|
||||
#define CONT_CMD_WRITE_MEMPACK 3
|
||||
#define CONT_CMD_READ_EEPROM 4
|
||||
#define CONT_CMD_WRITE_EEPROM 5
|
||||
#define CONT_CMD_RESET 0xff
|
||||
|
||||
#define CONT_CMD_REQUEST_STATUS_TX 1
|
||||
#define CONT_CMD_READ_BUTTON_TX 1
|
||||
#define CONT_CMD_READ_MEMPACK_TX 3
|
||||
#define CONT_CMD_WRITE_MEMPACK_TX 35
|
||||
#define CONT_CMD_READ_EEPROM_TX 2
|
||||
#define CONT_CMD_WRITE_EEPROM_TX 10
|
||||
#define CONT_CMD_RESET_TX 1
|
||||
|
||||
#define CONT_CMD_REQUEST_STATUS_RX 3
|
||||
#define CONT_CMD_READ_BUTTON_RX 4
|
||||
#define CONT_CMD_READ_MEMPACK_RX 33
|
||||
#define CONT_CMD_WRITE_MEMPACK_RX 1
|
||||
#define CONT_CMD_READ_EEPROM_RX 8
|
||||
#define CONT_CMD_WRITE_EEPROM_RX 1
|
||||
#define CONT_CMD_RESET_RX 3
|
||||
|
||||
#define CONT_CMD_NOP 0xff
|
||||
#define CONT_CMD_END 0xfe //indicates end of a command
|
||||
#define CONT_CMD_EXE 1 //set pif ram status byte to this to do a command
|
||||
|
||||
#define DIR_STATUS_EMPTY 0
|
||||
#define DIR_STATUS_UNKNOWN 1
|
||||
#define DIR_STATUS_OCCUPIED 2
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* 0x0 */ __OSInode inode;
|
||||
/* 0x100 */ u8 bank;
|
||||
/* 0x101 */ u8 map[256];
|
||||
} __OSInodeCache;
|
||||
|
||||
extern s32 __osEepStatus(OSMesgQueue *, OSContStatus *);
|
||||
u16 __osSumcalc(u8 *ptr, int length);
|
||||
s32 __osIdCheckSum(u16 *ptr, u16 *csum, u16 *icsum);
|
||||
s32 __osRepairPackId(OSPfs *pfs, __OSPackId *badid, __OSPackId *newid);
|
||||
s32 __osCheckPackId(OSPfs *pfs, __OSPackId *temp);
|
||||
s32 __osGetId(OSPfs *pfs);
|
||||
s32 __osCheckId(OSPfs *pfs);
|
||||
s32 __osPfsRWInode(OSPfs *pfs, __OSInode *inode, u8 flag, u8 bank);
|
||||
s32 __osPfsSelectBank(OSPfs *pfs);
|
||||
s32 __osPfsDeclearPage(OSPfs *pfs, __OSInode *inode, int file_size_in_pages, int *first_page, u8 bank, int *decleared, int *last_page);
|
||||
s32 __osPfsReleasePages(OSPfs *pfs, __OSInode *inode, u8 start_page, u16 *sum, u8 bank, __OSInodeUnit *last_page, int flag);
|
||||
s32 __osBlockSum(OSPfs *pfs, u8 page_no, u16 *sum, u8 bank);
|
||||
s32 __osContRamRead(OSMesgQueue *mq, int channel, u16 address, u8 *buffer);
|
||||
s32 __osContRamWrite(OSMesgQueue *mq, int channel, u16 address, u8 *buffer, int force);
|
||||
void __osContGetInitData(u8 *pattern, OSContStatus *data);
|
||||
void __osPackRequestData(u8 cmd);
|
||||
void __osPfsRequestData(u8 cmd);
|
||||
void __osPfsGetInitData(u8* pattern, OSContStatus* data);
|
||||
u8 __osContAddressCrc(u16 addr);
|
||||
u8 __osContDataCrc(u8 *data);
|
||||
s32 __osPfsGetStatus(OSMesgQueue *queue, int channel);
|
||||
|
||||
extern u8 _osLastSentSiCmd;
|
||||
extern OSTimer __osEepromTimer;
|
||||
extern OSMesg __osEepromTimerMsg;
|
||||
extern OSMesgQueue __osEepromTimerQ;
|
||||
extern OSPifRam __osEepPifRam;
|
||||
extern OSPifRam __osContPifRam;
|
||||
extern OSPifRam __osPfsPifRam;
|
||||
extern u8 _osContNumControllers;
|
||||
|
||||
//some version of this almost certainly existed since there's plenty of times where it's used right before a return 0
|
||||
#define ERRCK(fn) \
|
||||
ret = fn; \
|
||||
if (ret != 0) \
|
||||
return ret;
|
||||
|
||||
#define SET_ACTIVEBANK_TO_ZERO \
|
||||
if (pfs->activebank != 0) \
|
||||
{ \
|
||||
pfs->activebank = 0; \
|
||||
ERRCK(__osPfsSelectBank(pfs)) \
|
||||
}
|
||||
|
||||
#define PFS_CHECK_ID \
|
||||
if (__osCheckId(pfs) == PFS_ERR_NEW_PACK) \
|
||||
return PFS_ERR_NEW_PACK;
|
||||
#endif
|
||||
|
||||
#define PFS_CHECK_STATUS \
|
||||
if ((pfs->status & PFS_INITIALIZED) == 0) \
|
||||
return PFS_ERR_INVALID;
|
||||
|
||||
#define PFS_GET_STATUS \
|
||||
__osSiGetAccess(); \
|
||||
ret = __osPfsGetStatus(queue, channel); \
|
||||
__osSiRelAccess(); \
|
||||
if (ret != 0) \
|
||||
return ret;
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
#include "libultra_internal.h"
|
||||
|
||||
u8 __osContAddressCrc(u16 addr) {
|
||||
u8 temp;
|
||||
u8 temp2;
|
||||
int i;
|
||||
temp = 0;
|
||||
for (i = 0; i < 16; i++) {
|
||||
if (temp & 0x10) {
|
||||
temp2 = 21;
|
||||
} else {
|
||||
temp2 = 0;
|
||||
}
|
||||
|
||||
temp <<= 1;
|
||||
temp |= (u8)((addr & 0x400) ? 1 : 0);
|
||||
addr <<= 1;
|
||||
temp ^= temp2;
|
||||
}
|
||||
return temp & 0x1f;
|
||||
}
|
||||
|
||||
u8 __osContDataCrc(u8 *data) {
|
||||
u8 temp;
|
||||
u8 temp2;
|
||||
int i;
|
||||
int j;
|
||||
temp = 0;
|
||||
for (i = 0; i <= 32; i++, data++) {
|
||||
for (j = 7; j >= 0; j--) {
|
||||
if (temp & 0x80) {
|
||||
temp2 = 133;
|
||||
} else {
|
||||
temp2 = 0;
|
||||
}
|
||||
temp <<= 1;
|
||||
if (i == 32) {
|
||||
temp &= -1;
|
||||
} else {
|
||||
temp |= ((*data & (1 << j)) ? 1 : 0);
|
||||
}
|
||||
temp ^= temp2;
|
||||
}
|
||||
}
|
||||
return temp;
|
||||
}
|
||||
|
|
@ -0,0 +1,26 @@
|
|||
#ifdef VERSION_SH
|
||||
|
||||
#include "PR/os_internal.h"
|
||||
#include "piint.h"
|
||||
|
||||
s32 osEPiStartDma(OSPiHandle *pihandle, OSIoMesg *mb, s32 direction) {
|
||||
register s32 ret;
|
||||
|
||||
if (!__osPiDevMgr.active) {
|
||||
return -1;
|
||||
}
|
||||
mb->piHandle = pihandle;
|
||||
if (direction == OS_READ) {
|
||||
mb->hdr.type = OS_MESG_TYPE_EDMAREAD;
|
||||
} else {
|
||||
mb->hdr.type = OS_MESG_TYPE_EDMAWRITE;
|
||||
}
|
||||
if (mb->hdr.pri == OS_MESG_PRI_HIGH) {
|
||||
ret = osJamMesg(osPiGetCmdQueue(), mb, OS_MESG_NOBLOCK);
|
||||
} else {
|
||||
ret = osSendMesg(osPiGetCmdQueue(), mb, OS_MESG_NOBLOCK);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue