mirror of
https://github.com/HarbourMasters/Starship
synced 2026-09-02 18:52:52 -04:00
support for EU rev 0, updates to tools, other cleanup (#255)
* srceu * remove warning * and some cleanup
This commit is contained in:
petrie911
@@ -0,0 +1,120 @@
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// Signal Processor Registers
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SP_MEM_ADDR_REG = 0xA4040000; // defined:True
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SP_DRAM_ADDR_REG = 0xA4040004; // defined:True
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SP_RD_LEN_REG = 0xA4040008; // defined:True
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SP_WR_LEN_REG = 0xA404000C; // defined:True
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SP_STATUS_REG = 0xA4040010; // defined:True
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SP_DMA_FULL_REG = 0xA4040014; // defined:True
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SP_DMA_BUSY_REG = 0xA4040018; // defined:True
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SP_SEMAPHORE_REG = 0xA404001C; // defined:True
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SP_PC = 0xA4080000; // defined:True
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// Display Processor Command Registers / Rasterizer Interface
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DPC_START_REG = 0xA4100000; // defined:True
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DPC_END_REG = 0xA4100004; // defined:True
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DPC_CURRENT_REG = 0xA4100008; // defined:True
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DPC_STATUS_REG = 0xA410000C; // defined:True
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DPC_CLOCK_REG = 0xA4100010; // defined:True
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DPC_BUFBUSY_REG = 0xA4100014; // defined:True
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DPC_PIPEBUSY_REG = 0xA4100018; // defined:True
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DPC_TMEM_REG = 0xA410001C; // defined:True
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// Display Processor Span Registers
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DPS_TBIST_REG = 0xA4200000; // defined:True // DPS_TBIST_REG / DP_TMEM_BIST
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DPS_TEST_MODE_REG = 0xA4200004; // defined:True
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DPS_BUFTEST_ADDR_REG = 0xA4200008; // defined:True
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DPS_BUFTEST_DATA_REG = 0xA420000C; // defined:True
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// MIPS Interface Registers
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MI_MODE_REG = 0xA4300000; // defined:True // MI_MODE_REG / MI_INIT_MODE_REG
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MI_VERSION_REG = 0xA4300004; // defined:True
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MI_INTR_REG = 0xA4300008; // defined:True
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MI_INTR_MASK_REG = 0xA430000C; // defined:True
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// Video Interface Registers
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VI_STATUS_REG = 0xA4400000; // defined:True // VI_STATUS_REG / VI_CONTROL_REG
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VI_DRAM_ADDR_REG = 0xA4400004; // defined:True // VI_DRAM_ADDR_REG / VI_ORIGIN_REG
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VI_WIDTH_REG = 0xA4400008; // defined:True
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VI_INTR_REG = 0xA440000C; // defined:True
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VI_CURRENT_REG = 0xA4400010; // defined:True
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VI_BURST_REG = 0xA4400014; // defined:True // VI_BURST_REG / VI_TIMING_REG
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VI_V_SYNC_REG = 0xA4400018; // defined:True
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VI_H_SYNC_REG = 0xA440001C; // defined:True
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VI_LEAP_REG = 0xA4400020; // defined:True
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VI_H_START_REG = 0xA4400024; // defined:True
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VI_V_START_REG = 0xA4400028; // defined:True
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VI_V_BURST_REG = 0xA440002C; // defined:True
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VI_X_SCALE_REG = 0xA4400030; // defined:True
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VI_Y_SCALE_REG = 0xA4400034; // defined:True
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// Audio Interface Registers
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AI_DRAM_ADDR_REG = 0xA4500000; // defined:True
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AI_LEN_REG = 0xA4500004; // defined:True
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AI_CONTROL_REG = 0xA4500008; // defined:True
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AI_STATUS_REG = 0xA450000C; // defined:True
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AI_DACRATE_REG = 0xA4500010; // defined:True
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AI_BITRATE_REG = 0xA4500014; // defined:True
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// Peripheral/Parallel Interface Registers
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PI_DRAM_ADDR_REG = 0xA4600000; // defined:True
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PI_CART_ADDR_REG = 0xA4600004; // defined:True
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D_A4600005 = 0xA4600005; // defined:True // TODO figure out its name
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D_A4600006 = 0xA4600006; // defined:True // TODO figure out its name
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D_A4600007 = 0xA4600007; // defined:True // TODO figure out its name
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PI_RD_LEN_REG = 0xA4600008; // defined:True
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PI_WR_LEN_REG = 0xA460000C; // defined:True
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PI_STATUS_REG = 0xA4600010; // defined:True
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PI_BSD_DOM1_LAT_REG = 0xA4600014; // defined:True // PI dom1 latency
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PI_BSD_DOM1_PWD_REG = 0xA4600018; // defined:True // PI dom1 pulse width
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PI_BSD_DOM1_PGS_REG = 0xA460001C; // defined:True // PI dom1 page size
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PI_BSD_DOM1_RLS_REG = 0xA4600020; // defined:True // PI dom1 release
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PI_BSD_DOM2_LAT_REG = 0xA4600024; // defined:True // PI dom2 latency
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PI_BSD_DOM2_LWD_REG = 0xA4600028; // defined:True // PI dom2 pulse width
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PI_BSD_DOM2_PGS_REG = 0xA460002C; // defined:True // PI dom2 page size
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PI_BSD_DOM2_RLS_REG = 0xA4600030; // defined:True // PI dom2 release
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// RDRAM Interface Registers
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RI_MODE_REG = 0xA4700000; // defined:True
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RI_CONFIG_REG = 0xA4700004; // defined:True
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RI_CURRENT_LOAD_REG = 0xA4700008; // defined:True
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RI_SELECT_REG = 0xA470000C; // defined:True
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RI_REFRESH_REG = 0xA4700010; // defined:True
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RI_LATENCY_REG = 0xA4700014; // defined:True
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RI_RERROR_REG = 0xA4700018; // defined:True
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RI_WERROR_REG = 0xA470001C; // defined:True
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// Serial Interface Registers
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SI_DRAM_ADDR_REG = 0xA4800000; // defined:True
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SI_PIF_ADDR_RD64B_REG = 0xA4800004; // defined:True
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D_A4800008 = 0xA4800008; // defined:True // reserved
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D_A480000C = 0xA480000C; // defined:True // reserved
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SI_PIF_ADDR_WR64B_REG = 0xA4800010; // defined:True
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D_A4800014 = 0xA4800014; // defined:True // reserved
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SI_STATUS_REG = 0xA4800018; // defined:True
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LEO_CMD = 0xA5000508;
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LEO_STATUS = 0xA5000508;
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LEO_BM_CTL = 0xA5000510;
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LEO_BM_STATUS = 0xA5000510;
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LEO_SEQ_CTL = 0xA5000518;
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LEO_SEQ_STATUS = 0xA5000518;
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LEO_C2_BUFF = 0xA5000000;
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LEO_SECTOR_BUFF = 0xA5000400;
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LEO_DATA = 0xA5000500;
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LEO_MISC_REG = 0xA5000504;
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LEO_CUR_TK = 0xA500050C;
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LEO_ERR_SECTOR = 0xA5000514;
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LEO_CUR_SECTOR = 0xA500051C;
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LEO_HARD_RESET = 0xA5000520;
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LEO_C1_S0 = 0xA5000524;
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LEO_HOST_SECBYTE = 0xA5000528;
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LEO_C1_S2 = 0xA500052C;
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LEO_SEC_BYTE = 0xA5000530;
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LEO_C1_S4 = 0xA5000534;
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LEO_C1_S6 = 0xA5000538;
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LEO_CUR_ADDR = 0xA500053C;
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LEO_ID_REG = 0xA5000540;
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LEO_TEST_REG = 0xA5000544;
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LEO_TEST_PIN_SEL = 0xA5000548;
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LEO_RAM_ADDR = 0xA5000580;
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@@ -0,0 +1,10 @@
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// libultra OS symbols
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osTvType = 0x80000300;
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osRomType = 0x80000304;
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osRomBase = 0x80000308;
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osResetType = 0x8000030C;
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osCicId = 0x80000310;
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osVersion = 0x80000314;
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osMemSize = 0x80000318;
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osAppNMIBuffer = 0x8000031C;
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@@ -0,0 +1,119 @@
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// hallucinated symbols
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D_400001 = 0x400001; //ignore:true
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D_7FFFFFFE = 0x7FFFFFFE; //ignore:True
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D_80000000 = 0x80000000; //ignore:True
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D_80000001 = 0x80000001; //ignore:true
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D_80000002 = 0x80000002; //ignore:True
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D_80000003 = 0x80000003; //ignore:True
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D_80000004 = 0x80000004; //ignore:True
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D_80000006 = 0x80000006; //ignore:True
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D_80000008 = 0x80000008; //ignore:True
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D_8000000A = 0x8000000A; //ignore:True
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D_8000000C = 0x8000000C; //ignore:True
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D_8000000D = 0x8000000D; //ignore:True
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D_8000000E = 0x8000000E; //ignore:True
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D_8000000F = 0x8000000F; //ignore:True
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D_80000014 = 0x80000014; //ignore:True
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D_80000018 = 0x80000018; //ignore:True
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D_8000001C = 0x8000001C; //ignore:True
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D_80000024 = 0x80000024; //ignore:True
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D_800F0032 = 0x800F0032; //ignore:True
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D_80100032 = 0x80100032; //ignore:True
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D_80110000 = 0x80110000; //ignore:True
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D_801100C8 = 0x801100C8; //ignore:True
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D_80120000 = 0x80120000; //ignore:True
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D_801200C8 = 0x801200C8; //ignore:True
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D_80130001 = 0x80130001; //ignore:True
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D_801300C8 = 0x801300C8; //ignore:True
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D_80140001 = 0x80140001; //ignore:true
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D_80150000 = 0x80150000; //ignore:true
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D_80160000 = 0x80160000; //ignore:true
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D_80170000 = 0x80170000; //ignore:true
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D_80170001 = 0x80170001; //ignore:true
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D_80180001 = 0x80180001; //ignore:True
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D_80180058 = 0x80180058; //ignore:True
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// mirage symbols
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D_3000000 = 0x3000000; //ignore:true
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D_6000000 = 0x6000000; //ignore:true
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D_7000000 = 0x7000000; //ignore:true
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D_8000000 = 0x8000000; //ignore:true
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D_A000000 = 0xA000000; //ignore:true
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D_C000000 = 0xC000000; //ignore:true
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// rsp
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rspbootTextStart = 0x800004D0;//name_end:rspbootTextEnd
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aspMainTextStart = 0x800005A0;//name_end:aspMainTextEnd
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gspF3DEX_fifoTextStart = 0x80001490;//name_end:gspF3DEX_fifoTextEnd
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gspF3DEX_fifoDataStart = 0x800C4980; //name_end:gspF3DEX_fifoDataEnd
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aspMainDataStart = 0x800C3E70; //name_end:aspMainDataEnd
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// redundant rodata
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D_800D63EC = 0x800D63EC; //force_migration:true
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D_800D65F8 = 0x800D65F8; //force_migration:true
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D_800D660C = 0x800D660C; //force_migration:true
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D_800D99D0 = 0x800D99D0; //force_migration:true
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D_800D99E0 = 0x800D99E0; //force_migration:true
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D_800D9A04 = 0x800D9A04; //force_migration:true
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D_800DA7B0 = 0x800DA7B0; //force_migration:true
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D_i3_801C517C = 0x801C517C; //force_migration:true segment:ovl_i3
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D_i3_801C5188 = 0x801C5188; //force_migration:true segment:ovl_i3
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D_i3_801C5190 = 0x801C5190; //force_migration:true segment:ovl_i3
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D_i3_801C51B8 = 0x801C51B8; //force_migration:true segment:ovl_i3
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D_i4_801A3754 = 0x801A3754; //force_migration:true segment:ovl_i4
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D_i5_801BF248 = 0x801BF248; //force_migration:true segment:ovl_i5
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D_i5_801BF27C = 0x801BF27C; //force_migration:true segment:ovl_i5
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D_i5_801BF510 = 0x801BF510; //force_migration:true segment:ovl_i5
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D_i5_801BF524 = 0x801BF524; //force_migration:true segment:ovl_i5
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D_i6_801AAF70 = 0x801AAF70; //force_migration:true segment:ovl_i6
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// constant for K1 access
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D_A0000000 = 0xA0000000;//ignore:true
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// hardcoded address used in sys_rdram
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D_A0300000 = 0xA0300000;//ignore:true
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D_A4000000 = 0xA4000000;//ignore:true
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// hardcoded addresses in libultra
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D_BFF00000 = 0xBFF00000;//ignore:true
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D_BFF08000 = 0xBFF08000;//ignore:true
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D_BFF08004 = 0xBFF08004;//ignore:true
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// RDB regs used only in exceptasm. Also -2.0f
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D_C0000000 = 0xC0000000;//ignore:true
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D_C0000008 = 0xC0000008;//ignore:true
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D_C000000C = 0xC000000C;//ignore:true
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// hidden symbols
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sSamplesPerWavePeriod = 0x800C63E8; //size:0x4 type:u8
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sOvlUnused_Unk = 0x800CCBAC;
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D_800D6994 = 0x800D6994;
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D_80161A91 = 0x80161A91;
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D_801BE59C = 0x801BE59C; //segment:ovl_i5
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// fake symbol removal
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D_800CCC44 = 0x800CCC44; //size:0x98
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gDmaTable = 0x8017ABE0; //size:0x650
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// dma symbols
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dma_table_ROM_START = 0xE0570;
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audio_seq_ROM_START = 0xE0BC0;
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audio_bank_ROM_START = 0x127F50;
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audio_table_ROM_START = 0x1471E0;
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ast_radio_de_ROM_START = 0xDE12C0;
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ast_radio_de_VRAM = 0x8017B230;
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ast_radio_de_ROM_END = 0xDF10B0;
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ast_radio_en_ROM_START = 0xEFB1A0;
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ast_radio_fr_ROM_START = 0xF08CF0;
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ast_radio_fr_ROM_END = 0xF17200;
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// buffers
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gDramStack = 0x80289000; //size:0x400 segment:buffers defined:true
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gOSYieldData = 0x80289400; //size:0xC00 segment:buffers defined:true
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gZBuffer = 0x8028A000; //size:0x25800 segment:buffers defined:true
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gTaskOutputBuffer = 0x802AF800; //size:0x30000 name_end:gTaskOutputBufferEnd segment:buffers defined:true
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gAudioHeap = 0x802DF800; //size:0xB0000 segment:buffers defined:true
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gFillBuffer = 0x8038F800; //size:0x780 segment:buffers defined:true
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D_8038FA80 = 0x8038FA80;//ignore:true segment:buffers
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gFrameBuffers = 0x8038FF80; //size:0x70800 segment:buffers defined:true
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File diff suppressed because it is too large
Load Diff
@@ -1,6 +1,3 @@
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D_80000450 = 0x80000450;
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D_80000520 = 0x80000520;
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D_80001420 = 0x80001420;
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func_80002850 = 0x80002850;
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func_8000292C = 0x8000292C;
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func_800029B8 = 0x800029B8;
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@@ -1604,12 +1601,10 @@ func_800C007C = 0x800C007C;
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func_800C0100 = 0x800C0100;
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func_800C01D4 = 0x800C01D4;
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func_800C02E4 = 0x800C02E4;
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D_800C0430 = 0x800C0430;
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D_800C0760 = 0x800C0760;
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D_800C07B0 = 0x800C07B0;
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D_800C0BE0 = 0x800C0BE0;
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D_800C0E00 = 0x800C0E00;
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D_800C0F20 = 0x800C0F20;
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D_800C1720 = 0x800C1720;
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D_800C1730 = 0x800C1730;
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D_800C1770 = 0x800C1770;
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@@ -35,16 +35,37 @@ D_80170000 = 0x80170000; //ignore:true
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D_80170001 = 0x80170001; //ignore:true
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D_80180000 = 0x80180000; //ignore:true
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D_80180001 = 0x80180001; //ignore:true
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D_80180058 = 0x80180058; //ignore:true
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D_801B0130 = 0x801B0130; //ignore:true
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D_801C0001 = 0x801C0001; //ignore:true
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// mirage symbols
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D_6000000 = 0x0A000000; //ignore:true
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D_7000000 = 0x0A000000; //ignore:true
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D_8000000 = 0x0A000000; //ignore:true
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||||
D_6000000 = 0x06000000; //ignore:true
|
||||
D_7000000 = 0x07000000; //ignore:true
|
||||
D_8000000 = 0x08000000; //ignore:true
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||||
D_A000000 = 0x0A000000; //ignore:true
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D_F000000 = 0x0F000000; //ignore:true
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|
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// rsp
|
||||
rspbootTextStart = 0x80000450;//name_end:rspbootTextEnd
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aspMainTextStart = 0x80000520;//name_end:aspMainTextEnd
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||||
gspF3DEX_fifoTextStart = 0x80001420;//name_end:gspF3DEX_fifoTextEnd
|
||||
gspF3DEX_fifoDataStart = 0x800C0F20; //name_end:gspF3DEX_fifoDataEnd
|
||||
aspMainDataStart = 0x800C0430; //name_end:aspMainDataEnd
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||||
|
||||
// constant for K1 access
|
||||
D_A0000000 = 0xA0000000;//ignore:true
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|
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// hardcoded addresses in libultra
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||||
D_BFF00000 = 0xBFF00000;//ignore:true
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||||
D_BFF08000 = 0xBFF08000;//ignore:true
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||||
D_BFF08004 = 0xBFF08004;//ignore:true
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|
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// RDB regs used only in exceptasm. Also -2.0f
|
||||
D_C0000000 = 0xC0000000;//ignore:true
|
||||
D_C0000008 = 0xC0000008;//ignore:true
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||||
D_C000000C = 0xC000000C;//ignore:true
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||||
|
||||
// redundant rodata
|
||||
D_800DB02C = 0x800DB02C; // force_migration:True
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||||
D_800DB24C = 0x800DB24C; // force_migration:True
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||||
@@ -65,12 +86,12 @@ D_i5_801B2DE0 = 0x801B2DE0; // force_migration:True segment:ovl_i5
|
||||
D_i5_801B2DF4 = 0x801B2DF4; // force_migration:True segment:ovl_i5
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D_i6_8019E810 = 0x8019E810; // force_migration:True segment:ovl_i6
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||||
|
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// symbol collisions
|
||||
D_i1_80192958 = 0x80192958; //segment:ovl_i1 // i4 func collision
|
||||
D_menu_801AE894 = 0x801AE894; // force_migration:True segment:ovl_menu // i5 data collision
|
||||
jtbl_menu_801AED88 = 0x801AED88; // force_migration:True segment:ovl_menu // i3 func collision
|
||||
D_ending_8018D5D4 = 0x8018D5D4; // force_migration:True segment:ovl_ending // i6 func collision
|
||||
D_ending_8018DC28 = 0x8018DC28; // force_migration:True segment:ovl_ending // i6 func collision
|
||||
// constant for K1 access
|
||||
D_A0000000 = 0xA0000000;//ignore:true
|
||||
|
||||
// hardcoded address used in sys_rdram
|
||||
D_A0300000 = 0xA0300000;//ignore:true
|
||||
D_A4000000 = 0xA4000000;//ignore:true
|
||||
|
||||
// hidden vars
|
||||
D_800C5118 = 0x800C5118;
|
||||
|
||||
@@ -243,7 +243,6 @@ D_50070A0 = 0x50070A0;
|
||||
D_5007770 = 0x5007770;
|
||||
D_5008A50 = 0x5008A50;
|
||||
D_500A040 = 0x500A040;
|
||||
D_6000000 = 0x6000000;
|
||||
D_6000290 = 0x6000290;
|
||||
D_6000320 = 0x6000320;
|
||||
D_6000604 = 0x6000604;
|
||||
@@ -849,7 +848,6 @@ D_60492B0 = 0x60492B0;
|
||||
D_6049B50 = 0x6049B50;
|
||||
D_60565F0 = 0x60565F0;
|
||||
D_6058700 = 0x6058700;
|
||||
D_7000000 = 0x7000000;
|
||||
D_7001540 = 0x7001540;
|
||||
D_70017F0 = 0x70017F0;
|
||||
D_7001A10 = 0x7001A10;
|
||||
@@ -922,7 +920,6 @@ D_7011DB0 = 0x7011DB0;
|
||||
D_7011EB0 = 0x7011EB0;
|
||||
D_7012B00 = 0x7012B00;
|
||||
D_7012FC0 = 0x7012FC0;
|
||||
D_8000000 = 0x8000000;
|
||||
D_8000708 = 0x8000708;
|
||||
D_8000D80 = 0x8000D80;
|
||||
D_8000D90 = 0x8000D90;
|
||||
@@ -997,7 +994,6 @@ D_901C0F4 = 0x901C0F4;
|
||||
D_901DA50 = 0x901DA50;
|
||||
D_9023290 = 0x9023290;
|
||||
D_90234D0 = 0x90234D0;
|
||||
D_A000000 = 0xA000000;
|
||||
D_A0002BC = 0xA0002BC;
|
||||
D_A00047C = 0xA00047C;
|
||||
D_A000568 = 0xA000568;
|
||||
@@ -1067,7 +1063,6 @@ D_E00DF80 = 0xE00DF80;
|
||||
D_E00EEA0 = 0xE00EEA0;
|
||||
D_E00FDC0 = 0xE00FDC0;
|
||||
D_E010CE0 = 0xE010CE0;
|
||||
D_F000000 = 0xF000000;
|
||||
D_F000800 = 0xF000800;
|
||||
D_F000F20 = 0xF000F20;
|
||||
D_F001000 = 0xF001000;
|
||||
@@ -1091,7 +1086,3 @@ D_F00F200 = 0xF00F200;
|
||||
D_F0103D0 = 0xF0103D0;
|
||||
D_F014180 = 0xF014180;
|
||||
D_F014310 = 0xF014310;
|
||||
|
||||
D_A0000000 = 0xA0000000;
|
||||
D_A0300000 = 0xA0300000;
|
||||
D_A4000000 = 0xA4000000;
|
||||
|
||||
@@ -29,9 +29,11 @@ D_80180000 = 0x80180000;//ignore:true
|
||||
D_80160000 = 0x80160000;//ignore:true
|
||||
D_800D0000 = 0x800D0000;//ignore:true
|
||||
D_7FFFFFFE = 0x7FFFFFFE;//ignore:true
|
||||
D_1000000 = 0x01000000;//ignore:true
|
||||
D_TI_A000000 = 0x0A000000;//ignore:true
|
||||
D_ENMY_PLANET_4000000 = 0x04000000;//ignore:true
|
||||
D_1000000 = 0x01000000;//ignore:true
|
||||
|
||||
// mirage symbols
|
||||
D_A000000 = 0x0A000000;//ignore:true
|
||||
D_4000000 = 0x04000000;//ignore:true
|
||||
|
||||
// constant for K1 access
|
||||
D_TI_A0000000 = 0xA0000000;//ignore:true
|
||||
@@ -41,13 +43,14 @@ D_BFF00000 = 0xBFF00000;//ignore:true
|
||||
D_BFF08000 = 0xBFF08000;//ignore:true
|
||||
D_BFF08004 = 0xBFF08004;//ignore:true
|
||||
|
||||
// RDB regs used only in exceptasm. Also 2.0f
|
||||
// RDB regs used only in exceptasm. Also -2.0f
|
||||
D_C0000000 = 0xC0000000;//ignore:true
|
||||
D_C0000008 = 0xC0000008;//ignore:true
|
||||
D_C000000C = 0xC000000C;//ignore:true
|
||||
|
||||
D_80151650 = 0x80151650; //ignore:true
|
||||
|
||||
// dma symbols
|
||||
dma_table_ROM_START = 0xDE480; //defined:true
|
||||
audio_seq_ROM_START = 0xDEA20; //defined:true
|
||||
audio_bank_ROM_START = 0x119710; //defined:true
|
||||
|
||||
Reference in New Issue
Block a user