dol2asm OK

This commit is contained in:
Julgodis
2021-03-28 22:49:05 +02:00
parent 3d66902e1a
commit 1e95d29b60
60106 changed files with 4755966 additions and 1107376 deletions
@@ -0,0 +1,7 @@
lbl_80314ABC:
/* 80314ABC 3C C0 80 3D */ lis r6, __vt__12J3DShapeDraw@ha
/* 80314AC0 38 06 DC 68 */ addi r0, r6, __vt__12J3DShapeDraw@l
/* 80314AC4 90 03 00 00 */ stw r0, 0(r3)
/* 80314AC8 90 83 00 08 */ stw r4, 8(r3)
/* 80314ACC 90 A3 00 04 */ stw r5, 4(r3)
/* 80314AD0 4E 80 00 20 */ blr
@@ -0,0 +1,20 @@
lbl_80314B00:
/* 80314B00 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80314B04 7C 08 02 A6 */ mflr r0
/* 80314B08 90 01 00 14 */ stw r0, 0x14(r1)
/* 80314B0C 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80314B10 7C 7F 1B 79 */ or. r31, r3, r3
/* 80314B14 41 82 00 1C */ beq lbl_80314B30
/* 80314B18 3C A0 80 3D */ lis r5, __vt__12J3DShapeDraw@ha
/* 80314B1C 38 05 DC 68 */ addi r0, r5, __vt__12J3DShapeDraw@l
/* 80314B20 90 1F 00 00 */ stw r0, 0(r31)
/* 80314B24 7C 80 07 35 */ extsh. r0, r4
/* 80314B28 40 81 00 08 */ ble lbl_80314B30
/* 80314B2C 4B FB A2 11 */ bl __dl__FPv
lbl_80314B30:
/* 80314B30 7F E3 FB 78 */ mr r3, r31
/* 80314B34 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80314B38 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80314B3C 7C 08 03 A6 */ mtlr r0
/* 80314B40 38 21 00 10 */ addi r1, r1, 0x10
/* 80314B44 4E 80 00 20 */ blr
@@ -0,0 +1,91 @@
lbl_80314974:
/* 80314974 94 21 FF C0 */ stwu r1, -0x40(r1)
/* 80314978 7C 08 02 A6 */ mflr r0
/* 8031497C 90 01 00 44 */ stw r0, 0x44(r1)
/* 80314980 39 61 00 40 */ addi r11, r1, 0x40
/* 80314984 48 04 D8 2D */ bl _savegpr_18
/* 80314988 7C 79 1B 78 */ mr r25, r3
/* 8031498C 7C 9A 23 78 */ mr r26, r4
/* 80314990 7C BB 2B 78 */ mr r27, r5
/* 80314994 7C DC 33 78 */ mr r28, r6
/* 80314998 4B FF FF 8D */ bl countVertex__12J3DShapeDrawFUl
/* 8031499C 80 99 00 04 */ lwz r4, 4(r25)
/* 803149A0 38 03 00 1F */ addi r0, r3, 0x1f
/* 803149A4 7C 04 02 14 */ add r0, r4, r0
/* 803149A8 54 1F 00 34 */ rlwinm r31, r0, 0, 0, 0x1a
/* 803149AC 7F E3 FB 78 */ mr r3, r31
/* 803149B0 38 80 00 20 */ li r4, 0x20
/* 803149B4 4B FB A3 39 */ bl __nwa__FUli
/* 803149B8 7C 7E 1B 78 */ mr r30, r3
/* 803149BC 82 F9 00 08 */ lwz r23, 8(r25)
/* 803149C0 7E F6 BB 78 */ mr r22, r23
/* 803149C4 7F DD F3 78 */ mr r29, r30
/* 803149C8 7F 1B D0 50 */ subf r24, r27, r26
/* 803149CC 48 00 00 8C */ b lbl_80314A58
lbl_803149D0:
/* 803149D0 88 16 00 00 */ lbz r0, 0(r22)
/* 803149D4 98 1D 00 00 */ stb r0, 0(r29)
/* 803149D8 28 00 00 A0 */ cmplwi r0, 0xa0
/* 803149DC 3B BD 00 01 */ addi r29, r29, 1
/* 803149E0 41 82 00 0C */ beq lbl_803149EC
/* 803149E4 28 00 00 98 */ cmplwi r0, 0x98
/* 803149E8 40 82 00 80 */ bne lbl_80314A68
lbl_803149EC:
/* 803149EC A2 B6 00 01 */ lhz r21, 1(r22)
/* 803149F0 B2 BD 00 00 */ sth r21, 0(r29)
/* 803149F4 3A 80 00 00 */ li r20, 0
/* 803149F8 3B BD 00 02 */ addi r29, r29, 2
/* 803149FC 48 00 00 48 */ b lbl_80314A44
lbl_80314A00:
/* 80314A00 7C 1A A1 D6 */ mullw r0, r26, r20
/* 80314A04 7E 76 02 14 */ add r19, r22, r0
/* 80314A08 8E 53 00 03 */ lbzu r18, 3(r19)
/* 80314A0C 7F A3 EB 78 */ mr r3, r29
/* 80314A10 7E 64 9B 78 */ mr r4, r19
/* 80314A14 7F 65 DB 78 */ mr r5, r27
/* 80314A18 4B CE EB 29 */ bl memcpy
/* 80314A1C 7F BD DA 14 */ add r29, r29, r27
/* 80314A20 7C 1C 92 14 */ add r0, r28, r18
/* 80314A24 98 1D 00 00 */ stb r0, 0(r29)
/* 80314A28 3B BD 00 01 */ addi r29, r29, 1
/* 80314A2C 7F A3 EB 78 */ mr r3, r29
/* 80314A30 7C 93 DA 14 */ add r4, r19, r27
/* 80314A34 7F 05 C3 78 */ mr r5, r24
/* 80314A38 4B CE EB 09 */ bl memcpy
/* 80314A3C 7F BD C2 14 */ add r29, r29, r24
/* 80314A40 3A 94 00 01 */ addi r20, r20, 1
lbl_80314A44:
/* 80314A44 7C 14 A8 00 */ cmpw r20, r21
/* 80314A48 41 80 FF B8 */ blt lbl_80314A00
/* 80314A4C 7C 1A A9 D6 */ mullw r0, r26, r21
/* 80314A50 7E D6 02 14 */ add r22, r22, r0
/* 80314A54 3A D6 00 03 */ addi r22, r22, 3
lbl_80314A58:
/* 80314A58 7C 77 B0 50 */ subf r3, r23, r22
/* 80314A5C 80 19 00 04 */ lwz r0, 4(r25)
/* 80314A60 7C 03 00 40 */ cmplw r3, r0
/* 80314A64 41 80 FF 6C */ blt lbl_803149D0
lbl_80314A68:
/* 80314A68 7C 7E E8 50 */ subf r3, r30, r29
/* 80314A6C 38 03 00 1F */ addi r0, r3, 0x1f
/* 80314A70 54 04 00 34 */ rlwinm r4, r0, 0, 0, 0x1a
/* 80314A74 38 60 00 00 */ li r3, 0
/* 80314A78 48 00 00 0C */ b lbl_80314A84
lbl_80314A7C:
/* 80314A7C 98 7D 00 00 */ stb r3, 0(r29)
/* 80314A80 3B BD 00 01 */ addi r29, r29, 1
lbl_80314A84:
/* 80314A84 7C 1E E8 50 */ subf r0, r30, r29
/* 80314A88 7C 00 F8 40 */ cmplw r0, r31
/* 80314A8C 41 80 FF F0 */ blt lbl_80314A7C
/* 80314A90 90 99 00 04 */ stw r4, 4(r25)
/* 80314A94 93 D9 00 08 */ stw r30, 8(r25)
/* 80314A98 7F C3 F3 78 */ mr r3, r30
/* 80314A9C 80 99 00 04 */ lwz r4, 4(r25)
/* 80314AA0 48 02 6B 3D */ bl DCStoreRange
/* 80314AA4 39 61 00 40 */ addi r11, r1, 0x40
/* 80314AA8 48 04 D7 55 */ bl _restgpr_18
/* 80314AAC 80 01 00 44 */ lwz r0, 0x44(r1)
/* 80314AB0 7C 08 03 A6 */ mtlr r0
/* 80314AB4 38 21 00 40 */ addi r1, r1, 0x40
/* 80314AB8 4E 80 00 20 */ blr
@@ -0,0 +1,25 @@
lbl_80314924:
/* 80314924 38 A0 00 00 */ li r5, 0
/* 80314928 80 C3 00 08 */ lwz r6, 8(r3)
/* 8031492C 7C C7 33 78 */ mr r7, r6
/* 80314930 80 63 00 04 */ lwz r3, 4(r3)
/* 80314934 48 00 00 2C */ b lbl_80314960
lbl_80314938:
/* 80314938 88 07 00 00 */ lbz r0, 0(r7)
/* 8031493C 28 00 00 A0 */ cmplwi r0, 0xa0
/* 80314940 41 82 00 0C */ beq lbl_8031494C
/* 80314944 28 00 00 98 */ cmplwi r0, 0x98
/* 80314948 40 82 00 24 */ bne lbl_8031496C
lbl_8031494C:
/* 8031494C A0 07 00 01 */ lhz r0, 1(r7)
/* 80314950 7C A5 02 14 */ add r5, r5, r0
/* 80314954 7C 04 01 D6 */ mullw r0, r4, r0
/* 80314958 7C E7 02 14 */ add r7, r7, r0
/* 8031495C 38 E7 00 03 */ addi r7, r7, 3
lbl_80314960:
/* 80314960 7C 06 38 50 */ subf r0, r6, r7
/* 80314964 7C 00 18 40 */ cmplw r0, r3
/* 80314968 41 80 FF D0 */ blt lbl_80314938
lbl_8031496C:
/* 8031496C 7C A3 2B 78 */ mr r3, r5
/* 80314970 4E 80 00 20 */ blr
@@ -0,0 +1,12 @@
lbl_80314AD4:
/* 80314AD4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80314AD8 7C 08 02 A6 */ mflr r0
/* 80314ADC 90 01 00 14 */ stw r0, 0x14(r1)
/* 80314AE0 7C 64 1B 78 */ mr r4, r3
/* 80314AE4 80 63 00 08 */ lwz r3, 8(r3)
/* 80314AE8 80 84 00 04 */ lwz r4, 4(r4)
/* 80314AEC 48 04 B4 05 */ bl GXCallDisplayList
/* 80314AF0 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80314AF4 7C 08 03 A6 */ mtlr r0
/* 80314AF8 38 21 00 10 */ addi r1, r1, 0x10
/* 80314AFC 4E 80 00 20 */ blr